net/hns3: add abnormal interrupt process
[dpdk.git] / drivers / net / hns3 / hns3_mbx.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2018-2019 Hisilicon Limited.
3  */
4
5 #include <errno.h>
6 #include <stdbool.h>
7 #include <stdint.h>
8 #include <stdio.h>
9 #include <string.h>
10 #include <inttypes.h>
11 #include <unistd.h>
12 #include <rte_byteorder.h>
13 #include <rte_common.h>
14 #include <rte_cycles.h>
15 #include <rte_dev.h>
16 #include <rte_ethdev_driver.h>
17 #include <rte_io.h>
18 #include <rte_spinlock.h>
19 #include <rte_pci.h>
20 #include <rte_bus_pci.h>
21
22 #include "hns3_ethdev.h"
23 #include "hns3_regs.h"
24 #include "hns3_logs.h"
25 #include "hns3_intr.h"
26
27 #define HNS3_REG_MSG_DATA_OFFSET        4
28 #define HNS3_CMD_CODE_OFFSET            2
29
30 static const struct errno_respcode_map err_code_map[] = {
31         {0, 0},
32         {1, -EPERM},
33         {2, -ENOENT},
34         {5, -EIO},
35         {11, -EAGAIN},
36         {12, -ENOMEM},
37         {16, -EBUSY},
38         {22, -EINVAL},
39         {28, -ENOSPC},
40         {95, -EOPNOTSUPP},
41 };
42
43 static int
44 hns3_resp_to_errno(uint16_t resp_code)
45 {
46         uint32_t i, num;
47
48         num = sizeof(err_code_map) / sizeof(struct errno_respcode_map);
49         for (i = 0; i < num; i++) {
50                 if (err_code_map[i].resp_code == resp_code)
51                         return err_code_map[i].err_no;
52         }
53
54         return -EIO;
55 }
56
57 static void
58 hns3_poll_all_sync_msg(void)
59 {
60         struct rte_eth_dev *eth_dev;
61         struct hns3_adapter *adapter;
62         const char *name;
63         uint16_t port_id;
64
65         RTE_ETH_FOREACH_DEV(port_id) {
66                 eth_dev = &rte_eth_devices[port_id];
67                 name = eth_dev->device->driver->name;
68                 if (strcmp(name, "net_hns3") && strcmp(name, "net_hns3_vf"))
69                         continue;
70                 adapter = eth_dev->data->dev_private;
71                 if (!adapter || adapter->hw.adapter_state == HNS3_NIC_CLOSED)
72                         continue;
73                 /* Synchronous msg, the mbx_resp.req_msg_data is non-zero */
74                 if (adapter->hw.mbx_resp.req_msg_data)
75                         hns3_dev_handle_mbx_msg(&adapter->hw);
76         }
77 }
78
79 static int
80 hns3_get_mbx_resp(struct hns3_hw *hw, uint16_t code0, uint16_t code1,
81                   uint8_t *resp_data, uint16_t resp_len)
82 {
83 #define HNS3_MAX_RETRY_MS       500
84         struct hns3_mbx_resp_status *mbx_resp;
85         bool in_irq = false;
86         uint64_t now;
87         uint64_t end;
88
89         if (resp_len > HNS3_MBX_MAX_RESP_DATA_SIZE) {
90                 hns3_err(hw, "VF mbx response len(=%d) exceeds maximum(=%d)",
91                          resp_len, HNS3_MBX_MAX_RESP_DATA_SIZE);
92                 return -EINVAL;
93         }
94
95         now = get_timeofday_ms();
96         end = now + HNS3_MAX_RETRY_MS;
97         while ((hw->mbx_resp.head != hw->mbx_resp.tail + hw->mbx_resp.lost) &&
98                (now < end)) {
99                 /*
100                  * The mbox response is running on the interrupt thread.
101                  * Sending mbox in the interrupt thread cannot wait for the
102                  * response, so polling the mbox response on the irq thread.
103                  */
104                 if (pthread_equal(hw->irq_thread_id, pthread_self())) {
105                         in_irq = true;
106                         hns3_poll_all_sync_msg();
107                 } else {
108                         rte_delay_ms(HNS3_POLL_RESPONE_MS);
109                 }
110                 now = get_timeofday_ms();
111         }
112         hw->mbx_resp.req_msg_data = 0;
113         if (now >= end) {
114                 hw->mbx_resp.lost++;
115                 hns3_err(hw,
116                          "VF could not get mbx(%d,%d) head(%d) tail(%d) lost(%d) from PF in_irq:%d",
117                          code0, code1, hw->mbx_resp.head, hw->mbx_resp.tail,
118                          hw->mbx_resp.lost, in_irq);
119                 return -ETIME;
120         }
121         rte_io_rmb();
122         mbx_resp = &hw->mbx_resp;
123
124         if (mbx_resp->resp_status)
125                 return mbx_resp->resp_status;
126
127         if (resp_data)
128                 memcpy(resp_data, &mbx_resp->additional_info[0], resp_len);
129
130         return 0;
131 }
132
133 int
134 hns3_send_mbx_msg(struct hns3_hw *hw, uint16_t code, uint16_t subcode,
135                   const uint8_t *msg_data, uint8_t msg_len, bool need_resp,
136                   uint8_t *resp_data, uint16_t resp_len)
137 {
138         struct hns3_mbx_vf_to_pf_cmd *req;
139         struct hns3_cmd_desc desc;
140         int ret;
141
142         req = (struct hns3_mbx_vf_to_pf_cmd *)desc.data;
143
144         /* first two bytes are reserved for code & subcode */
145         if (msg_len > (HNS3_MBX_MAX_MSG_SIZE - HNS3_CMD_CODE_OFFSET)) {
146                 hns3_err(hw,
147                          "VF send mbx msg fail, msg len %d exceeds max payload len %d",
148                          msg_len, HNS3_MBX_MAX_MSG_SIZE - HNS3_CMD_CODE_OFFSET);
149                 return -EINVAL;
150         }
151
152         hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_MBX_VF_TO_PF, false);
153         req->msg[0] = code;
154         req->msg[1] = subcode;
155         if (msg_data)
156                 memcpy(&req->msg[HNS3_CMD_CODE_OFFSET], msg_data, msg_len);
157
158         /* synchronous send */
159         if (need_resp) {
160                 req->mbx_need_resp |= HNS3_MBX_NEED_RESP_BIT;
161                 rte_spinlock_lock(&hw->mbx_resp.lock);
162                 hw->mbx_resp.req_msg_data = (uint32_t)code << 16 | subcode;
163                 hw->mbx_resp.head++;
164                 ret = hns3_cmd_send(hw, &desc, 1);
165                 if (ret) {
166                         rte_spinlock_unlock(&hw->mbx_resp.lock);
167                         hns3_err(hw, "VF failed(=%d) to send mbx message to PF",
168                                  ret);
169                         return ret;
170                 }
171
172                 ret = hns3_get_mbx_resp(hw, code, subcode, resp_data, resp_len);
173                 rte_spinlock_unlock(&hw->mbx_resp.lock);
174         } else {
175                 /* asynchronous send */
176                 ret = hns3_cmd_send(hw, &desc, 1);
177                 if (ret) {
178                         hns3_err(hw, "VF failed(=%d) to send mbx message to PF",
179                                  ret);
180                         return ret;
181                 }
182         }
183
184         return ret;
185 }
186
187 static bool
188 hns3_cmd_crq_empty(struct hns3_hw *hw)
189 {
190         uint32_t tail = hns3_read_dev(hw, HNS3_CMDQ_RX_TAIL_REG);
191
192         return tail == hw->cmq.crq.next_to_use;
193 }
194
195 static void
196 hns3_mbx_handler(struct hns3_hw *hw)
197 {
198         struct hns3_mac *mac = &hw->mac;
199         enum hns3_reset_level reset_level;
200         uint16_t *msg_q;
201         uint32_t tail;
202
203         tail = hw->arq.tail;
204
205         /* process all the async queue messages */
206         while (tail != hw->arq.head) {
207                 msg_q = hw->arq.msg_q[hw->arq.head];
208
209                 switch (msg_q[0]) {
210                 case HNS3_MBX_LINK_STAT_CHANGE:
211                         memcpy(&mac->link_speed, &msg_q[2],
212                                    sizeof(mac->link_speed));
213                         mac->link_status = rte_le_to_cpu_16(msg_q[1]);
214                         mac->link_duplex = (uint8_t)rte_le_to_cpu_16(msg_q[4]);
215                         break;
216                 case HNS3_MBX_ASSERTING_RESET:
217                         /* PF has asserted reset hence VF should go in pending
218                          * state and poll for the hardware reset status till it
219                          * has been completely reset. After this stack should
220                          * eventually be re-initialized.
221                          */
222                         reset_level = rte_le_to_cpu_16(msg_q[1]);
223                         hns3_atomic_set_bit(reset_level, &hw->reset.pending);
224
225                         hns3_warn(hw, "PF inform reset level %d", reset_level);
226                         hw->reset.stats.request_cnt++;
227                         break;
228                 default:
229                         hns3_err(hw, "Fetched unsupported(%d) message from arq",
230                                  msg_q[0]);
231                         break;
232                 }
233
234                 hns3_mbx_head_ptr_move_arq(hw->arq);
235                 msg_q = hw->arq.msg_q[hw->arq.head];
236         }
237 }
238
239 /*
240  * Case1: receive response after timeout, req_msg_data
241  *        is 0, not equal resp_msg, do lost--
242  * Case2: receive last response during new send_mbx_msg,
243  *        req_msg_data is different with resp_msg, let
244  *        lost--, continue to wait for response.
245  */
246 static void
247 hns3_update_resp_position(struct hns3_hw *hw, uint32_t resp_msg)
248 {
249         struct hns3_mbx_resp_status *resp = &hw->mbx_resp;
250         uint32_t tail = resp->tail + 1;
251
252         if (tail > resp->head)
253                 tail = resp->head;
254         if (resp->req_msg_data != resp_msg) {
255                 if (resp->lost)
256                         resp->lost--;
257                 hns3_warn(hw, "Received a mismatched response req_msg(%x) "
258                           "resp_msg(%x) head(%d) tail(%d) lost(%d)",
259                           resp->req_msg_data, resp_msg, resp->head, tail,
260                           resp->lost);
261         } else if (tail + resp->lost > resp->head) {
262                 resp->lost--;
263                 hns3_warn(hw, "Received a new response again resp_msg(%x) "
264                           "head(%d) tail(%d) lost(%d)", resp_msg,
265                           resp->head, tail, resp->lost);
266         }
267         rte_io_wmb();
268         resp->tail = tail;
269 }
270
271 void
272 hns3_dev_handle_mbx_msg(struct hns3_hw *hw)
273 {
274         struct hns3_mbx_resp_status *resp = &hw->mbx_resp;
275         struct hns3_cmq_ring *crq = &hw->cmq.crq;
276         struct hns3_mbx_pf_to_vf_cmd *req;
277         struct hns3_cmd_desc *desc;
278         uint32_t msg_data;
279         uint16_t *msg_q;
280         uint16_t flag;
281         uint8_t *temp;
282         int i;
283
284         while (!hns3_cmd_crq_empty(hw)) {
285                 if (rte_atomic16_read(&hw->reset.disable_cmd))
286                         return;
287
288                 desc = &crq->desc[crq->next_to_use];
289                 req = (struct hns3_mbx_pf_to_vf_cmd *)desc->data;
290
291                 flag = rte_le_to_cpu_16(crq->desc[crq->next_to_use].flag);
292                 if (unlikely(!hns3_get_bit(flag, HNS3_CMDQ_RX_OUTVLD_B))) {
293                         hns3_warn(hw,
294                                   "dropped invalid mailbox message, code = %d",
295                                   req->msg[0]);
296
297                         /* dropping/not processing this invalid message */
298                         crq->desc[crq->next_to_use].flag = 0;
299                         hns3_mbx_ring_ptr_move_crq(crq);
300                         continue;
301                 }
302
303                 switch (req->msg[0]) {
304                 case HNS3_MBX_PF_VF_RESP:
305                         resp->resp_status = hns3_resp_to_errno(req->msg[3]);
306
307                         temp = (uint8_t *)&req->msg[4];
308                         for (i = 0; i < HNS3_MBX_MAX_RESP_DATA_SIZE &&
309                              i < HNS3_REG_MSG_DATA_OFFSET; i++) {
310                                 resp->additional_info[i] = *temp;
311                                 temp++;
312                         }
313                         msg_data = (uint32_t)req->msg[1] << 16 | req->msg[2];
314                         hns3_update_resp_position(hw, msg_data);
315                         break;
316                 case HNS3_MBX_LINK_STAT_CHANGE:
317                 case HNS3_MBX_ASSERTING_RESET:
318                         msg_q = hw->arq.msg_q[hw->arq.tail];
319                         memcpy(&msg_q[0], req->msg,
320                                HNS3_MBX_MAX_ARQ_MSG_SIZE * sizeof(uint16_t));
321                         hns3_mbx_tail_ptr_move_arq(hw->arq);
322
323                         hns3_mbx_handler(hw);
324                         break;
325                 default:
326                         hns3_err(hw,
327                                  "VF received unsupported(%d) mbx msg from PF",
328                                  req->msg[0]);
329                         break;
330                 }
331
332                 crq->desc[crq->next_to_use].flag = 0;
333                 hns3_mbx_ring_ptr_move_crq(crq);
334         }
335
336         /* Write back CMDQ_RQ header pointer, IMP need this pointer */
337         hns3_write_dev(hw, HNS3_CMDQ_RX_HEAD_REG, crq->next_to_use);
338 }