drivers/net/i40e/i40e_ethdev_vf.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2010-2016 Intel Corporation
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdio.h>
   7 #include <errno.h>
   8 #include <stdint.h>
   9 #include <string.h>
  10 #include <unistd.h>
  11 #include <stdarg.h>
  12 #include <inttypes.h>
  13 #include <rte_byteorder.h>
  14 #include <rte_common.h>
  15 #include <rte_cycles.h>
  16
  17 #include <rte_interrupts.h>
  18 #include <rte_log.h>
  19 #include <rte_debug.h>
  20 #include <rte_pci.h>
  21 #include <rte_bus_pci.h>
  22 #include <rte_atomic.h>
  23 #include <rte_branch_prediction.h>
  24 #include <rte_memory.h>
  25 #include <rte_eal.h>
  26 #include <rte_alarm.h>
  27 #include <rte_ether.h>
  28 #include <rte_ethdev_driver.h>
  29 #include <rte_ethdev_pci.h>
  30 #include <rte_malloc.h>
  31 #include <rte_dev.h>
  32
  33 #include "i40e_logs.h"
  34 #include "base/i40e_prototype.h"
  35 #include "base/i40e_adminq_cmd.h"
  36 #include "base/i40e_type.h"
  37
  38 #include "i40e_rxtx.h"
  39 #include "i40e_ethdev.h"
  40 #include "i40e_pf.h"
  41
  42 /* busy wait delay in msec */
  43 #define I40EVF_BUSY_WAIT_DELAY 10
  44 #define I40EVF_BUSY_WAIT_COUNT 50
  45 #define MAX_RESET_WAIT_CNT     20
  46
  47 #define I40EVF_ALARM_INTERVAL 50000 /* us */
  48
  49 struct i40evf_arq_msg_info {
  50         enum virtchnl_ops ops;
  51         enum i40e_status_code result;
  52         uint16_t buf_len;
  53         uint16_t msg_len;
  54         uint8_t *msg;
  55 };
  56
  57 struct vf_cmd_info {
  58         enum virtchnl_ops ops;
  59         uint8_t *in_args;
  60         uint32_t in_args_size;
  61         uint8_t *out_buffer;
  62         /* Input & output type. pass in buffer size and pass out
  63          * actual return result
  64          */
  65         uint32_t out_size;
  66 };
  67
  68 enum i40evf_aq_result {
  69         I40EVF_MSG_ERR = -1, /* Meet error when accessing admin queue */
  70         I40EVF_MSG_NON,      /* Read nothing from admin queue */
  71         I40EVF_MSG_SYS,      /* Read system msg from admin queue */
  72         I40EVF_MSG_CMD,      /* Read async command result */
  73 };
  74
  75 static int i40evf_dev_configure(struct rte_eth_dev *dev);
  76 static int i40evf_dev_start(struct rte_eth_dev *dev);
  77 static void i40evf_dev_stop(struct rte_eth_dev *dev);
  78 static void i40evf_dev_info_get(struct rte_eth_dev *dev,
  79                                 struct rte_eth_dev_info *dev_info);
  80 static int i40evf_dev_link_update(struct rte_eth_dev *dev,
  81                                   int wait_to_complete);
  82 static int i40evf_dev_stats_get(struct rte_eth_dev *dev,
  83                                 struct rte_eth_stats *stats);
  84 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
  85                                  struct rte_eth_xstat *xstats, unsigned n);
  86 static int i40evf_dev_xstats_get_names(struct rte_eth_dev *dev,
  87                                        struct rte_eth_xstat_name *xstats_names,
  88                                        unsigned limit);
  89 static void i40evf_dev_xstats_reset(struct rte_eth_dev *dev);
  90 static int i40evf_vlan_filter_set(struct rte_eth_dev *dev,
  91                                   uint16_t vlan_id, int on);
  92 static int i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask);
  93 static void i40evf_dev_close(struct rte_eth_dev *dev);
  94 static int  i40evf_dev_reset(struct rte_eth_dev *dev);
  95 static void i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev);
  96 static void i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev);
  97 static void i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev);
  98 static void i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev);
  99 static int i40evf_init_vlan(struct rte_eth_dev *dev);
 100 static int i40evf_dev_rx_queue_start(struct rte_eth_dev *dev,
 101                                      uint16_t rx_queue_id);
 102 static int i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev,
 103                                     uint16_t rx_queue_id);
 104 static int i40evf_dev_tx_queue_start(struct rte_eth_dev *dev,
 105                                      uint16_t tx_queue_id);
 106 static int i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev,
 107                                     uint16_t tx_queue_id);
 108 static int i40evf_add_mac_addr(struct rte_eth_dev *dev,
 109                                struct ether_addr *addr,
 110                                uint32_t index,
 111                                uint32_t pool);
 112 static void i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index);
 113 static int i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
 114                         struct rte_eth_rss_reta_entry64 *reta_conf,
 115                         uint16_t reta_size);
 116 static int i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
 117                         struct rte_eth_rss_reta_entry64 *reta_conf,
 118                         uint16_t reta_size);
 119 static int i40evf_config_rss(struct i40e_vf *vf);
 120 static int i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
 121                                       struct rte_eth_rss_conf *rss_conf);
 122 static int i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
 123                                         struct rte_eth_rss_conf *rss_conf);
 124 static int i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
 125 static int i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
 126                                         struct ether_addr *mac_addr);
 127 static int
 128 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id);
 129 static int
 130 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id);
 131 static void i40evf_handle_pf_event(struct rte_eth_dev *dev,
 132                                    uint8_t *msg,
 133                                    uint16_t msglen);
 134
 135 static int
 136 i40evf_add_del_mc_addr_list(struct rte_eth_dev *dev,
 137                         struct ether_addr *mc_addr_set,
 138                         uint32_t nb_mc_addr, bool add);
 139 static int
 140 i40evf_set_mc_addr_list(struct rte_eth_dev *dev, struct ether_addr *mc_addr_set,
 141                         uint32_t nb_mc_addr);
 142
 143 /* Default hash key buffer for RSS */
 144 static uint32_t rss_key_default[I40E_VFQF_HKEY_MAX_INDEX + 1];
 145
 146 struct rte_i40evf_xstats_name_off {
 147         char name[RTE_ETH_XSTATS_NAME_SIZE];
 148         unsigned offset;
 149 };
 150
 151 static const struct rte_i40evf_xstats_name_off rte_i40evf_stats_strings[] = {
 152         {"rx_bytes", offsetof(struct i40e_eth_stats, rx_bytes)},
 153         {"rx_unicast_packets", offsetof(struct i40e_eth_stats, rx_unicast)},
 154         {"rx_multicast_packets", offsetof(struct i40e_eth_stats, rx_multicast)},
 155         {"rx_broadcast_packets", offsetof(struct i40e_eth_stats, rx_broadcast)},
 156         {"rx_dropped_packets", offsetof(struct i40e_eth_stats, rx_discards)},
 157         {"rx_unknown_protocol_packets", offsetof(struct i40e_eth_stats,
 158                 rx_unknown_protocol)},
 159         {"tx_bytes", offsetof(struct i40e_eth_stats, tx_bytes)},
 160         {"tx_unicast_packets", offsetof(struct i40e_eth_stats, tx_unicast)},
 161         {"tx_multicast_packets", offsetof(struct i40e_eth_stats, tx_multicast)},
 162         {"tx_broadcast_packets", offsetof(struct i40e_eth_stats, tx_broadcast)},
 163         {"tx_dropped_packets", offsetof(struct i40e_eth_stats, tx_discards)},
 164         {"tx_error_packets", offsetof(struct i40e_eth_stats, tx_errors)},
 165 };
 166
 167 #define I40EVF_NB_XSTATS (sizeof(rte_i40evf_stats_strings) / \
 168                 sizeof(rte_i40evf_stats_strings[0]))
 169
 170 static const struct eth_dev_ops i40evf_eth_dev_ops = {
 171         .dev_configure        = i40evf_dev_configure,
 172         .dev_start            = i40evf_dev_start,
 173         .dev_stop             = i40evf_dev_stop,
 174         .promiscuous_enable   = i40evf_dev_promiscuous_enable,
 175         .promiscuous_disable  = i40evf_dev_promiscuous_disable,
 176         .allmulticast_enable  = i40evf_dev_allmulticast_enable,
 177         .allmulticast_disable = i40evf_dev_allmulticast_disable,
 178         .link_update          = i40evf_dev_link_update,
 179         .stats_get            = i40evf_dev_stats_get,
 180         .stats_reset          = i40evf_dev_xstats_reset,
 181         .xstats_get           = i40evf_dev_xstats_get,
 182         .xstats_get_names     = i40evf_dev_xstats_get_names,
 183         .xstats_reset         = i40evf_dev_xstats_reset,
 184         .dev_close            = i40evf_dev_close,
 185         .dev_reset            = i40evf_dev_reset,
 186         .dev_infos_get        = i40evf_dev_info_get,
 187         .dev_supported_ptypes_get = i40e_dev_supported_ptypes_get,
 188         .vlan_filter_set      = i40evf_vlan_filter_set,
 189         .vlan_offload_set     = i40evf_vlan_offload_set,
 190         .rx_queue_start       = i40evf_dev_rx_queue_start,
 191         .rx_queue_stop        = i40evf_dev_rx_queue_stop,
 192         .tx_queue_start       = i40evf_dev_tx_queue_start,
 193         .tx_queue_stop        = i40evf_dev_tx_queue_stop,
 194         .rx_queue_setup       = i40e_dev_rx_queue_setup,
 195         .rx_queue_release     = i40e_dev_rx_queue_release,
 196         .rx_queue_intr_enable = i40evf_dev_rx_queue_intr_enable,
 197         .rx_queue_intr_disable = i40evf_dev_rx_queue_intr_disable,
 198         .rx_descriptor_done   = i40e_dev_rx_descriptor_done,
 199         .rx_descriptor_status = i40e_dev_rx_descriptor_status,
 200         .tx_descriptor_status = i40e_dev_tx_descriptor_status,
 201         .tx_queue_setup       = i40e_dev_tx_queue_setup,
 202         .tx_queue_release     = i40e_dev_tx_queue_release,
 203         .rx_queue_count       = i40e_dev_rx_queue_count,
 204         .rxq_info_get         = i40e_rxq_info_get,
 205         .txq_info_get         = i40e_txq_info_get,
 206         .mac_addr_add         = i40evf_add_mac_addr,
 207         .mac_addr_remove      = i40evf_del_mac_addr,
 208         .set_mc_addr_list     = i40evf_set_mc_addr_list,
 209         .reta_update          = i40evf_dev_rss_reta_update,
 210         .reta_query           = i40evf_dev_rss_reta_query,
 211         .rss_hash_update      = i40evf_dev_rss_hash_update,
 212         .rss_hash_conf_get    = i40evf_dev_rss_hash_conf_get,
 213         .mtu_set              = i40evf_dev_mtu_set,
 214         .mac_addr_set         = i40evf_set_default_mac_addr,
 215 };
 216
 217 /*
 218  * Read data in admin queue to get msg from pf driver
 219  */
 220 static enum i40evf_aq_result
 221 i40evf_read_pfmsg(struct rte_eth_dev *dev, struct i40evf_arq_msg_info *data)
 222 {
 223         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 224         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 225         struct i40e_arq_event_info event;
 226         enum virtchnl_ops opcode;
 227         enum i40e_status_code retval;
 228         int ret;
 229         enum i40evf_aq_result result = I40EVF_MSG_NON;
 230
 231         event.buf_len = data->buf_len;
 232         event.msg_buf = data->msg;
 233         ret = i40e_clean_arq_element(hw, &event, NULL);
 234         /* Can't read any msg from adminQ */
 235         if (ret) {
 236                 if (ret != I40E_ERR_ADMIN_QUEUE_NO_WORK)
 237                         result = I40EVF_MSG_ERR;
 238                 return result;
 239         }
 240
 241         opcode = (enum virtchnl_ops)rte_le_to_cpu_32(event.desc.cookie_high);
 242         retval = (enum i40e_status_code)rte_le_to_cpu_32(event.desc.cookie_low);
 243         /* pf sys event */
 244         if (opcode == VIRTCHNL_OP_EVENT) {
 245                 struct virtchnl_pf_event *vpe =
 246                         (struct virtchnl_pf_event *)event.msg_buf;
 247
 248                 result = I40EVF_MSG_SYS;
 249                 switch (vpe->event) {
 250                 case VIRTCHNL_EVENT_LINK_CHANGE:
 251                         vf->link_up =
 252                                 vpe->event_data.link_event.link_status;
 253                         vf->link_speed =
 254                                 vpe->event_data.link_event.link_speed;
 255                         vf->pend_msg |= PFMSG_LINK_CHANGE;
 256                         PMD_DRV_LOG(INFO, "Link status update:%s",
 257                                     vf->link_up ? "up" : "down");
 258                         break;
 259                 case VIRTCHNL_EVENT_RESET_IMPENDING:
 260                         vf->vf_reset = true;
 261                         vf->pend_msg |= PFMSG_RESET_IMPENDING;
 262                         PMD_DRV_LOG(INFO, "vf is reseting");
 263                         break;
 264                 case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
 265                         vf->dev_closed = true;
 266                         vf->pend_msg |= PFMSG_DRIVER_CLOSE;
 267                         PMD_DRV_LOG(INFO, "PF driver closed");
 268                         break;
 269                 default:
 270                         PMD_DRV_LOG(ERR, "%s: Unknown event %d from pf",
 271                                     __func__, vpe->event);
 272                 }
 273         } else {
 274                 /* async reply msg on command issued by vf previously */
 275                 result = I40EVF_MSG_CMD;
 276                 /* Actual data length read from PF */
 277                 data->msg_len = event.msg_len;
 278         }
 279
 280         data->result = retval;
 281         data->ops = opcode;
 282
 283         return result;
 284 }
 285
 286 /**
 287  * clear current command. Only call in case execute
 288  * _atomic_set_cmd successfully.
 289  */
 290 static inline void
 291 _clear_cmd(struct i40e_vf *vf)
 292 {
 293         rte_wmb();
 294         vf->pend_cmd = VIRTCHNL_OP_UNKNOWN;
 295 }
 296
 297 /*
 298  * Check there is pending cmd in execution. If none, set new command.
 299  */
 300 static inline int
 301 _atomic_set_cmd(struct i40e_vf *vf, enum virtchnl_ops ops)
 302 {
 303         int ret = rte_atomic32_cmpset(&vf->pend_cmd,
 304                         VIRTCHNL_OP_UNKNOWN, ops);
 305
 306         if (!ret)
 307                 PMD_DRV_LOG(ERR, "There is incomplete cmd %d", vf->pend_cmd);
 308
 309         return !ret;
 310 }
 311
 312 #define MAX_TRY_TIMES 200
 313 #define ASQ_DELAY_MS  10
 314
 315 static int
 316 i40evf_execute_vf_cmd(struct rte_eth_dev *dev, struct vf_cmd_info *args)
 317 {
 318         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 319         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 320         struct i40evf_arq_msg_info info;
 321         enum i40evf_aq_result ret;
 322         int err, i = 0;
 323
 324         if (_atomic_set_cmd(vf, args->ops))
 325                 return -1;
 326
 327         info.msg = args->out_buffer;
 328         info.buf_len = args->out_size;
 329         info.ops = VIRTCHNL_OP_UNKNOWN;
 330         info.result = I40E_SUCCESS;
 331
 332         err = i40e_aq_send_msg_to_pf(hw, args->ops, I40E_SUCCESS,
 333                      args->in_args, args->in_args_size, NULL);
 334         if (err) {
 335                 PMD_DRV_LOG(ERR, "fail to send cmd %d", args->ops);
 336                 _clear_cmd(vf);
 337                 return err;
 338         }
 339
 340         switch (args->ops) {
 341         case VIRTCHNL_OP_RESET_VF:
 342                 /*no need to process in this function */
 343                 err = 0;
 344                 break;
 345         case VIRTCHNL_OP_VERSION:
 346         case VIRTCHNL_OP_GET_VF_RESOURCES:
 347                 /* for init adminq commands, need to poll the response */
 348                 err = -1;
 349                 do {
 350                         ret = i40evf_read_pfmsg(dev, &info);
 351                         vf->cmd_retval = info.result;
 352                         if (ret == I40EVF_MSG_CMD) {
 353                                 err = 0;
 354                                 break;
 355                         } else if (ret == I40EVF_MSG_ERR)
 356                                 break;
 357                         rte_delay_ms(ASQ_DELAY_MS);
 358                         /* If don't read msg or read sys event, continue */
 359                 } while (i++ < MAX_TRY_TIMES);
 360                 _clear_cmd(vf);
 361                 break;
 362
 363         default:
 364                 /* for other adminq in running time, waiting the cmd done flag */
 365                 err = -1;
 366                 do {
 367                         if (vf->pend_cmd == VIRTCHNL_OP_UNKNOWN) {
 368                                 err = 0;
 369                                 break;
 370                         }
 371                         rte_delay_ms(ASQ_DELAY_MS);
 372                         /* If don't read msg or read sys event, continue */
 373                 } while (i++ < MAX_TRY_TIMES);
 374                 /* If there's no response is received, clear command */
 375                 if (i >= MAX_TRY_TIMES) {
 376                         PMD_DRV_LOG(WARNING, "No response for %d", args->ops);
 377                         _clear_cmd(vf);
 378                 }
 379                 break;
 380         }
 381
 382         return err | vf->cmd_retval;
 383 }
 384
 385 /*
 386  * Check API version with sync wait until version read or fail from admin queue
 387  */
 388 static int
 389 i40evf_check_api_version(struct rte_eth_dev *dev)
 390 {
 391         struct virtchnl_version_info version, *pver;
 392         int err;
 393         struct vf_cmd_info args;
 394         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 395
 396         version.major = VIRTCHNL_VERSION_MAJOR;
 397         version.minor = VIRTCHNL_VERSION_MINOR;
 398
 399         args.ops = VIRTCHNL_OP_VERSION;
 400         args.in_args = (uint8_t *)&version;
 401         args.in_args_size = sizeof(version);
 402         args.out_buffer = vf->aq_resp;
 403         args.out_size = I40E_AQ_BUF_SZ;
 404
 405         err = i40evf_execute_vf_cmd(dev, &args);
 406         if (err) {
 407                 PMD_INIT_LOG(ERR, "fail to execute command OP_VERSION");
 408                 return err;
 409         }
 410
 411         pver = (struct virtchnl_version_info *)args.out_buffer;
 412         vf->version_major = pver->major;
 413         vf->version_minor = pver->minor;
 414         if ((vf->version_major == VIRTCHNL_VERSION_MAJOR) &&
 415                 (vf->version_minor <= VIRTCHNL_VERSION_MINOR))
 416                 PMD_DRV_LOG(INFO, "Peer is Linux PF host");
 417         else {
 418                 PMD_INIT_LOG(ERR, "PF/VF API version mismatch:(%u.%u)-(%u.%u)",
 419                                         vf->version_major, vf->version_minor,
 420                                                 VIRTCHNL_VERSION_MAJOR,
 421                                                 VIRTCHNL_VERSION_MINOR);
 422                 return -1;
 423         }
 424
 425         return 0;
 426 }
 427
 428 static int
 429 i40evf_get_vf_resource(struct rte_eth_dev *dev)
 430 {
 431         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 432         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 433         int err;
 434         struct vf_cmd_info args;
 435         uint32_t caps, len;
 436
 437         args.ops = VIRTCHNL_OP_GET_VF_RESOURCES;
 438         args.out_buffer = vf->aq_resp;
 439         args.out_size = I40E_AQ_BUF_SZ;
 440         if (PF_IS_V11(vf)) {
 441                 caps = VIRTCHNL_VF_OFFLOAD_L2 |
 442                        VIRTCHNL_VF_OFFLOAD_RSS_AQ |
 443                        VIRTCHNL_VF_OFFLOAD_RSS_REG |
 444                        VIRTCHNL_VF_OFFLOAD_VLAN |
 445                        VIRTCHNL_VF_OFFLOAD_RX_POLLING;
 446                 args.in_args = (uint8_t *)&caps;
 447                 args.in_args_size = sizeof(caps);
 448         } else {
 449                 args.in_args = NULL;
 450                 args.in_args_size = 0;
 451         }
 452         err = i40evf_execute_vf_cmd(dev, &args);
 453
 454         if (err) {
 455                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_VF_RESOURCE");
 456                 return err;
 457         }
 458
 459         len =  sizeof(struct virtchnl_vf_resource) +
 460                 I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource);
 461
 462         rte_memcpy(vf->vf_res, args.out_buffer,
 463                         RTE_MIN(args.out_size, len));
 464         i40e_vf_parse_hw_config(hw, vf->vf_res);
 465
 466         return 0;
 467 }
 468
 469 static int
 470 i40evf_config_promisc(struct rte_eth_dev *dev,
 471                       bool enable_unicast,
 472                       bool enable_multicast)
 473 {
 474         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 475         int err;
 476         struct vf_cmd_info args;
 477         struct virtchnl_promisc_info promisc;
 478
 479         promisc.flags = 0;
 480         promisc.vsi_id = vf->vsi_res->vsi_id;
 481
 482         if (enable_unicast)
 483                 promisc.flags |= FLAG_VF_UNICAST_PROMISC;
 484
 485         if (enable_multicast)
 486                 promisc.flags |= FLAG_VF_MULTICAST_PROMISC;
 487
 488         args.ops = VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE;
 489         args.in_args = (uint8_t *)&promisc;
 490         args.in_args_size = sizeof(promisc);
 491         args.out_buffer = vf->aq_resp;
 492         args.out_size = I40E_AQ_BUF_SZ;
 493
 494         err = i40evf_execute_vf_cmd(dev, &args);
 495
 496         if (err)
 497                 PMD_DRV_LOG(ERR, "fail to execute command "
 498                             "CONFIG_PROMISCUOUS_MODE");
 499         return err;
 500 }
 501
 502 static int
 503 i40evf_enable_vlan_strip(struct rte_eth_dev *dev)
 504 {
 505         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 506         struct vf_cmd_info args;
 507         int ret;
 508
 509         memset(&args, 0, sizeof(args));
 510         args.ops = VIRTCHNL_OP_ENABLE_VLAN_STRIPPING;
 511         args.in_args = NULL;
 512         args.in_args_size = 0;
 513         args.out_buffer = vf->aq_resp;
 514         args.out_size = I40E_AQ_BUF_SZ;
 515         ret = i40evf_execute_vf_cmd(dev, &args);
 516         if (ret)
 517                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 518                             "VIRTCHNL_OP_ENABLE_VLAN_STRIPPING");
 519
 520         return ret;
 521 }
 522
 523 static int
 524 i40evf_disable_vlan_strip(struct rte_eth_dev *dev)
 525 {
 526         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 527         struct vf_cmd_info args;
 528         int ret;
 529
 530         memset(&args, 0, sizeof(args));
 531         args.ops = VIRTCHNL_OP_DISABLE_VLAN_STRIPPING;
 532         args.in_args = NULL;
 533         args.in_args_size = 0;
 534         args.out_buffer = vf->aq_resp;
 535         args.out_size = I40E_AQ_BUF_SZ;
 536         ret = i40evf_execute_vf_cmd(dev, &args);
 537         if (ret)
 538                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 539                             "VIRTCHNL_OP_DISABLE_VLAN_STRIPPING");
 540
 541         return ret;
 542 }
 543
 544 static void
 545 i40evf_fill_virtchnl_vsi_txq_info(struct virtchnl_txq_info *txq_info,
 546                                   uint16_t vsi_id,
 547                                   uint16_t queue_id,
 548                                   uint16_t nb_txq,
 549                                   struct i40e_tx_queue *txq)
 550 {
 551         txq_info->vsi_id = vsi_id;
 552         txq_info->queue_id = queue_id;
 553         if (queue_id < nb_txq) {
 554                 txq_info->ring_len = txq->nb_tx_desc;
 555                 txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
 556         }
 557 }
 558
 559 static void
 560 i40evf_fill_virtchnl_vsi_rxq_info(struct virtchnl_rxq_info *rxq_info,
 561                                   uint16_t vsi_id,
 562                                   uint16_t queue_id,
 563                                   uint16_t nb_rxq,
 564                                   uint32_t max_pkt_size,
 565                                   struct i40e_rx_queue *rxq)
 566 {
 567         rxq_info->vsi_id = vsi_id;
 568         rxq_info->queue_id = queue_id;
 569         rxq_info->max_pkt_size = max_pkt_size;
 570         if (queue_id < nb_rxq) {
 571                 rxq_info->ring_len = rxq->nb_rx_desc;
 572                 rxq_info->dma_ring_addr = rxq->rx_ring_phys_addr;
 573                 rxq_info->databuffer_size =
 574                         (rte_pktmbuf_data_room_size(rxq->mp) -
 575                                 RTE_PKTMBUF_HEADROOM);
 576         }
 577 }
 578
 579 static int
 580 i40evf_configure_vsi_queues(struct rte_eth_dev *dev)
 581 {
 582         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 583         struct i40e_rx_queue **rxq =
 584                 (struct i40e_rx_queue **)dev->data->rx_queues;
 585         struct i40e_tx_queue **txq =
 586                 (struct i40e_tx_queue **)dev->data->tx_queues;
 587         struct virtchnl_vsi_queue_config_info *vc_vqci;
 588         struct virtchnl_queue_pair_info *vc_qpi;
 589         struct vf_cmd_info args;
 590         uint16_t i, nb_qp = vf->num_queue_pairs;
 591         const uint32_t size =
 592                 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqci, nb_qp);
 593         uint8_t buff[size];
 594         int ret;
 595
 596         memset(buff, 0, sizeof(buff));
 597         vc_vqci = (struct virtchnl_vsi_queue_config_info *)buff;
 598         vc_vqci->vsi_id = vf->vsi_res->vsi_id;
 599         vc_vqci->num_queue_pairs = nb_qp;
 600
 601         for (i = 0, vc_qpi = vc_vqci->qpair; i < nb_qp; i++, vc_qpi++) {
 602                 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpi->txq,
 603                         vc_vqci->vsi_id, i, dev->data->nb_tx_queues, txq[i]);
 604                 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpi->rxq,
 605                         vc_vqci->vsi_id, i, dev->data->nb_rx_queues,
 606                                         vf->max_pkt_len, rxq[i]);
 607         }
 608         memset(&args, 0, sizeof(args));
 609         args.ops = VIRTCHNL_OP_CONFIG_VSI_QUEUES;
 610         args.in_args = (uint8_t *)vc_vqci;
 611         args.in_args_size = size;
 612         args.out_buffer = vf->aq_resp;
 613         args.out_size = I40E_AQ_BUF_SZ;
 614         ret = i40evf_execute_vf_cmd(dev, &args);
 615         if (ret)
 616                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 617                         "VIRTCHNL_OP_CONFIG_VSI_QUEUES");
 618
 619         return ret;
 620 }
 621
 622 static int
 623 i40evf_config_irq_map(struct rte_eth_dev *dev)
 624 {
 625         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 626         struct vf_cmd_info args;
 627         uint8_t cmd_buffer[sizeof(struct virtchnl_irq_map_info) + \
 628                 sizeof(struct virtchnl_vector_map)];
 629         struct virtchnl_irq_map_info *map_info;
 630         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
 631         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 632         uint32_t vector_id;
 633         int i, err;
 634
 635         if (dev->data->dev_conf.intr_conf.rxq != 0 &&
 636             rte_intr_allow_others(intr_handle))
 637                 vector_id = I40E_RX_VEC_START;
 638         else
 639                 vector_id = I40E_MISC_VEC_ID;
 640
 641         map_info = (struct virtchnl_irq_map_info *)cmd_buffer;
 642         map_info->num_vectors = 1;
 643         map_info->vecmap[0].rxitr_idx = I40E_ITR_INDEX_DEFAULT;
 644         map_info->vecmap[0].vsi_id = vf->vsi_res->vsi_id;
 645         /* Alway use default dynamic MSIX interrupt */
 646         map_info->vecmap[0].vector_id = vector_id;
 647         /* Don't map any tx queue */
 648         map_info->vecmap[0].txq_map = 0;
 649         map_info->vecmap[0].rxq_map = 0;
 650         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 651                 map_info->vecmap[0].rxq_map |= 1 << i;
 652                 if (rte_intr_dp_is_en(intr_handle))
 653                         intr_handle->intr_vec[i] = vector_id;
 654         }
 655
 656         args.ops = VIRTCHNL_OP_CONFIG_IRQ_MAP;
 657         args.in_args = (u8 *)cmd_buffer;
 658         args.in_args_size = sizeof(cmd_buffer);
 659         args.out_buffer = vf->aq_resp;
 660         args.out_size = I40E_AQ_BUF_SZ;
 661         err = i40evf_execute_vf_cmd(dev, &args);
 662         if (err)
 663                 PMD_DRV_LOG(ERR, "fail to execute command OP_ENABLE_QUEUES");
 664
 665         return err;
 666 }
 667
 668 static int
 669 i40evf_switch_queue(struct rte_eth_dev *dev, bool isrx, uint16_t qid,
 670                                 bool on)
 671 {
 672         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 673         struct virtchnl_queue_select queue_select;
 674         int err;
 675         struct vf_cmd_info args;
 676         memset(&queue_select, 0, sizeof(queue_select));
 677         queue_select.vsi_id = vf->vsi_res->vsi_id;
 678
 679         if (isrx)
 680                 queue_select.rx_queues |= 1 << qid;
 681         else
 682                 queue_select.tx_queues |= 1 << qid;
 683
 684         if (on)
 685                 args.ops = VIRTCHNL_OP_ENABLE_QUEUES;
 686         else
 687                 args.ops = VIRTCHNL_OP_DISABLE_QUEUES;
 688         args.in_args = (u8 *)&queue_select;
 689         args.in_args_size = sizeof(queue_select);
 690         args.out_buffer = vf->aq_resp;
 691         args.out_size = I40E_AQ_BUF_SZ;
 692         err = i40evf_execute_vf_cmd(dev, &args);
 693         if (err)
 694                 PMD_DRV_LOG(ERR, "fail to switch %s %u %s",
 695                             isrx ? "RX" : "TX", qid, on ? "on" : "off");
 696
 697         return err;
 698 }
 699
 700 static int
 701 i40evf_start_queues(struct rte_eth_dev *dev)
 702 {
 703         struct rte_eth_dev_data *dev_data = dev->data;
 704         int i;
 705         struct i40e_rx_queue *rxq;
 706         struct i40e_tx_queue *txq;
 707
 708         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 709                 rxq = dev_data->rx_queues[i];
 710                 if (rxq->rx_deferred_start)
 711                         continue;
 712                 if (i40evf_dev_rx_queue_start(dev, i) != 0) {
 713                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 714                         return -1;
 715                 }
 716         }
 717
 718         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 719                 txq = dev_data->tx_queues[i];
 720                 if (txq->tx_deferred_start)
 721                         continue;
 722                 if (i40evf_dev_tx_queue_start(dev, i) != 0) {
 723                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 724                         return -1;
 725                 }
 726         }
 727
 728         return 0;
 729 }
 730
 731 static int
 732 i40evf_stop_queues(struct rte_eth_dev *dev)
 733 {
 734         int i;
 735
 736         /* Stop TX queues first */
 737         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 738                 if (i40evf_dev_tx_queue_stop(dev, i) != 0) {
 739                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 740                         return -1;
 741                 }
 742         }
 743
 744         /* Then stop RX queues */
 745         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 746                 if (i40evf_dev_rx_queue_stop(dev, i) != 0) {
 747                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 748                         return -1;
 749                 }
 750         }
 751
 752         return 0;
 753 }
 754
 755 static int
 756 i40evf_add_mac_addr(struct rte_eth_dev *dev,
 757                     struct ether_addr *addr,
 758                     __rte_unused uint32_t index,
 759                     __rte_unused uint32_t pool)
 760 {
 761         struct virtchnl_ether_addr_list *list;
 762         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 763         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 764                         sizeof(struct virtchnl_ether_addr)];
 765         int err;
 766         struct vf_cmd_info args;
 767
 768         if (is_zero_ether_addr(addr)) {
 769                 PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
 770                             addr->addr_bytes[0], addr->addr_bytes[1],
 771                             addr->addr_bytes[2], addr->addr_bytes[3],
 772                             addr->addr_bytes[4], addr->addr_bytes[5]);
 773                 return I40E_ERR_INVALID_MAC_ADDR;
 774         }
 775
 776         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 777         list->vsi_id = vf->vsi_res->vsi_id;
 778         list->num_elements = 1;
 779         rte_memcpy(list->list[0].addr, addr->addr_bytes,
 780                                         sizeof(addr->addr_bytes));
 781
 782         args.ops = VIRTCHNL_OP_ADD_ETH_ADDR;
 783         args.in_args = cmd_buffer;
 784         args.in_args_size = sizeof(cmd_buffer);
 785         args.out_buffer = vf->aq_resp;
 786         args.out_size = I40E_AQ_BUF_SZ;
 787         err = i40evf_execute_vf_cmd(dev, &args);
 788         if (err)
 789                 PMD_DRV_LOG(ERR, "fail to execute command "
 790                             "OP_ADD_ETHER_ADDRESS");
 791         else
 792                 vf->vsi.mac_num++;
 793
 794         return err;
 795 }
 796
 797 static void
 798 i40evf_del_mac_addr_by_addr(struct rte_eth_dev *dev,
 799                             struct ether_addr *addr)
 800 {
 801         struct virtchnl_ether_addr_list *list;
 802         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 803         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 804                         sizeof(struct virtchnl_ether_addr)];
 805         int err;
 806         struct vf_cmd_info args;
 807
 808         if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
 809                 PMD_DRV_LOG(ERR, "Invalid mac:%x-%x-%x-%x-%x-%x",
 810                             addr->addr_bytes[0], addr->addr_bytes[1],
 811                             addr->addr_bytes[2], addr->addr_bytes[3],
 812                             addr->addr_bytes[4], addr->addr_bytes[5]);
 813                 return;
 814         }
 815
 816         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 817         list->vsi_id = vf->vsi_res->vsi_id;
 818         list->num_elements = 1;
 819         rte_memcpy(list->list[0].addr, addr->addr_bytes,
 820                         sizeof(addr->addr_bytes));
 821
 822         args.ops = VIRTCHNL_OP_DEL_ETH_ADDR;
 823         args.in_args = cmd_buffer;
 824         args.in_args_size = sizeof(cmd_buffer);
 825         args.out_buffer = vf->aq_resp;
 826         args.out_size = I40E_AQ_BUF_SZ;
 827         err = i40evf_execute_vf_cmd(dev, &args);
 828         if (err)
 829                 PMD_DRV_LOG(ERR, "fail to execute command "
 830                             "OP_DEL_ETHER_ADDRESS");
 831         else
 832                 vf->vsi.mac_num--;
 833         return;
 834 }
 835
 836 static void
 837 i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index)
 838 {
 839         struct rte_eth_dev_data *data = dev->data;
 840         struct ether_addr *addr;
 841
 842         addr = &data->mac_addrs[index];
 843
 844         i40evf_del_mac_addr_by_addr(dev, addr);
 845 }
 846
 847 static int
 848 i40evf_query_stats(struct rte_eth_dev *dev, struct i40e_eth_stats **pstats)
 849 {
 850         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 851         struct virtchnl_queue_select q_stats;
 852         int err;
 853         struct vf_cmd_info args;
 854
 855         memset(&q_stats, 0, sizeof(q_stats));
 856         q_stats.vsi_id = vf->vsi_res->vsi_id;
 857         args.ops = VIRTCHNL_OP_GET_STATS;
 858         args.in_args = (u8 *)&q_stats;
 859         args.in_args_size = sizeof(q_stats);
 860         args.out_buffer = vf->aq_resp;
 861         args.out_size = I40E_AQ_BUF_SZ;
 862
 863         err = i40evf_execute_vf_cmd(dev, &args);
 864         if (err) {
 865                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_STATS");
 866                 *pstats = NULL;
 867                 return err;
 868         }
 869         *pstats = (struct i40e_eth_stats *)args.out_buffer;
 870         return 0;
 871 }
 872
 873 static void
 874 i40evf_stat_update_48(uint64_t *offset,
 875                    uint64_t *stat)
 876 {
 877         if (*stat >= *offset)
 878                 *stat = *stat - *offset;
 879         else
 880                 *stat = (uint64_t)((*stat +
 881                         ((uint64_t)1 << I40E_48_BIT_WIDTH)) - *offset);
 882
 883         *stat &= I40E_48_BIT_MASK;
 884 }
 885
 886 static void
 887 i40evf_stat_update_32(uint64_t *offset,
 888                    uint64_t *stat)
 889 {
 890         if (*stat >= *offset)
 891                 *stat = (uint64_t)(*stat - *offset);
 892         else
 893                 *stat = (uint64_t)((*stat +
 894                         ((uint64_t)1 << I40E_32_BIT_WIDTH)) - *offset);
 895 }
 896
 897 static void
 898 i40evf_update_stats(struct i40e_vsi *vsi,
 899                                         struct i40e_eth_stats *nes)
 900 {
 901         struct i40e_eth_stats *oes = &vsi->eth_stats_offset;
 902
 903         i40evf_stat_update_48(&oes->rx_bytes,
 904                             &nes->rx_bytes);
 905         i40evf_stat_update_48(&oes->rx_unicast,
 906                             &nes->rx_unicast);
 907         i40evf_stat_update_48(&oes->rx_multicast,
 908                             &nes->rx_multicast);
 909         i40evf_stat_update_48(&oes->rx_broadcast,
 910                             &nes->rx_broadcast);
 911         i40evf_stat_update_32(&oes->rx_discards,
 912                                 &nes->rx_discards);
 913         i40evf_stat_update_32(&oes->rx_unknown_protocol,
 914                             &nes->rx_unknown_protocol);
 915         i40evf_stat_update_48(&oes->tx_bytes,
 916                             &nes->tx_bytes);
 917         i40evf_stat_update_48(&oes->tx_unicast,
 918                             &nes->tx_unicast);
 919         i40evf_stat_update_48(&oes->tx_multicast,
 920                             &nes->tx_multicast);
 921         i40evf_stat_update_48(&oes->tx_broadcast,
 922                             &nes->tx_broadcast);
 923         i40evf_stat_update_32(&oes->tx_errors, &nes->tx_errors);
 924         i40evf_stat_update_32(&oes->tx_discards, &nes->tx_discards);
 925 }
 926
 927 static void
 928 i40evf_dev_xstats_reset(struct rte_eth_dev *dev)
 929 {
 930         int ret;
 931         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 932         struct i40e_eth_stats *pstats = NULL;
 933
 934         /* read stat values to clear hardware registers */
 935         ret = i40evf_query_stats(dev, &pstats);
 936
 937         /* set stats offset base on current values */
 938         if (ret == 0)
 939                 vf->vsi.eth_stats_offset = *pstats;
 940 }
 941
 942 static int i40evf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
 943                                       struct rte_eth_xstat_name *xstats_names,
 944                                       __rte_unused unsigned limit)
 945 {
 946         unsigned i;
 947
 948         if (xstats_names != NULL)
 949                 for (i = 0; i < I40EVF_NB_XSTATS; i++) {
 950                         snprintf(xstats_names[i].name,
 951                                 sizeof(xstats_names[i].name),
 952                                 "%s", rte_i40evf_stats_strings[i].name);
 953                 }
 954         return I40EVF_NB_XSTATS;
 955 }
 956
 957 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
 958                                  struct rte_eth_xstat *xstats, unsigned n)
 959 {
 960         int ret;
 961         unsigned i;
 962         struct i40e_eth_stats *pstats = NULL;
 963         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 964         struct i40e_vsi *vsi = &vf->vsi;
 965
 966         if (n < I40EVF_NB_XSTATS)
 967                 return I40EVF_NB_XSTATS;
 968
 969         ret = i40evf_query_stats(dev, &pstats);
 970         if (ret != 0)
 971                 return 0;
 972
 973         if (!xstats)
 974                 return 0;
 975
 976         i40evf_update_stats(vsi, pstats);
 977
 978         /* loop over xstats array and values from pstats */
 979         for (i = 0; i < I40EVF_NB_XSTATS; i++) {
 980                 xstats[i].id = i;
 981                 xstats[i].value = *(uint64_t *)(((char *)pstats) +
 982                         rte_i40evf_stats_strings[i].offset);
 983         }
 984
 985         return I40EVF_NB_XSTATS;
 986 }
 987
 988 static int
 989 i40evf_add_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
 990 {
 991         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 992         struct virtchnl_vlan_filter_list *vlan_list;
 993         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
 994                                                         sizeof(uint16_t)];
 995         int err;
 996         struct vf_cmd_info args;
 997
 998         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
 999         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1000         vlan_list->num_elements = 1;
1001         vlan_list->vlan_id[0] = vlanid;
1002
1003         args.ops = VIRTCHNL_OP_ADD_VLAN;
1004         args.in_args = (u8 *)&cmd_buffer;
1005         args.in_args_size = sizeof(cmd_buffer);
1006         args.out_buffer = vf->aq_resp;
1007         args.out_size = I40E_AQ_BUF_SZ;
1008         err = i40evf_execute_vf_cmd(dev, &args);
1009         if (err)
1010                 PMD_DRV_LOG(ERR, "fail to execute command OP_ADD_VLAN");
1011
1012         return err;
1013 }
1014
1015 static int
1016 i40evf_del_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1017 {
1018         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1019         struct virtchnl_vlan_filter_list *vlan_list;
1020         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
1021                                                         sizeof(uint16_t)];
1022         int err;
1023         struct vf_cmd_info args;
1024
1025         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
1026         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1027         vlan_list->num_elements = 1;
1028         vlan_list->vlan_id[0] = vlanid;
1029
1030         args.ops = VIRTCHNL_OP_DEL_VLAN;
1031         args.in_args = (u8 *)&cmd_buffer;
1032         args.in_args_size = sizeof(cmd_buffer);
1033         args.out_buffer = vf->aq_resp;
1034         args.out_size = I40E_AQ_BUF_SZ;
1035         err = i40evf_execute_vf_cmd(dev, &args);
1036         if (err)
1037                 PMD_DRV_LOG(ERR, "fail to execute command OP_DEL_VLAN");
1038
1039         return err;
1040 }
1041
1042 static const struct rte_pci_id pci_id_i40evf_map[] = {
1043         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF) },
1044         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF_HV) },
1045         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_A0_VF) },
1046         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_VF) },
1047         { .vendor_id = 0, /* sentinel */ },
1048 };
1049
1050 /* Disable IRQ0 */
1051 static inline void
1052 i40evf_disable_irq0(struct i40e_hw *hw)
1053 {
1054         /* Disable all interrupt types */
1055         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, 0);
1056         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1057                        I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1058         I40EVF_WRITE_FLUSH(hw);
1059 }
1060
1061 /* Enable IRQ0 */
1062 static inline void
1063 i40evf_enable_irq0(struct i40e_hw *hw)
1064 {
1065         /* Enable admin queue interrupt trigger */
1066         uint32_t val;
1067
1068         i40evf_disable_irq0(hw);
1069         val = I40E_READ_REG(hw, I40E_VFINT_ICR0_ENA1);
1070         val |= I40E_VFINT_ICR0_ENA1_ADMINQ_MASK |
1071                 I40E_VFINT_ICR0_ENA1_LINK_STAT_CHANGE_MASK;
1072         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, val);
1073
1074         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1075                 I40E_VFINT_DYN_CTL01_INTENA_MASK |
1076                 I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1077                 I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1078
1079         I40EVF_WRITE_FLUSH(hw);
1080 }
1081
1082 static int
1083 i40evf_check_vf_reset_done(struct i40e_hw *hw)
1084 {
1085         int i, reset;
1086
1087         for (i = 0; i < MAX_RESET_WAIT_CNT; i++) {
1088                 reset = I40E_READ_REG(hw, I40E_VFGEN_RSTAT) &
1089                         I40E_VFGEN_RSTAT_VFR_STATE_MASK;
1090                 reset = reset >> I40E_VFGEN_RSTAT_VFR_STATE_SHIFT;
1091                 if (reset == VIRTCHNL_VFR_VFACTIVE ||
1092                     reset == VIRTCHNL_VFR_COMPLETED)
1093                         break;
1094                 rte_delay_ms(50);
1095         }
1096
1097         if (i >= MAX_RESET_WAIT_CNT)
1098                 return -1;
1099
1100         return 0;
1101 }
1102 static int
1103 i40evf_reset_vf(struct i40e_hw *hw)
1104 {
1105         int ret;
1106
1107         if (i40e_vf_reset(hw) != I40E_SUCCESS) {
1108                 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1109                 return -1;
1110         }
1111         /**
1112           * After issuing vf reset command to pf, pf won't necessarily
1113           * reset vf, it depends on what state it exactly is. If it's not
1114           * initialized yet, it won't have vf reset since it's in a certain
1115           * state. If not, it will try to reset. Even vf is reset, pf will
1116           * set I40E_VFGEN_RSTAT to COMPLETE first, then wait 10ms and set
1117           * it to ACTIVE. In this duration, vf may not catch the moment that
1118           * COMPLETE is set. So, for vf, we'll try to wait a long time.
1119           */
1120         rte_delay_ms(200);
1121
1122         ret = i40evf_check_vf_reset_done(hw);
1123         if (ret) {
1124                 PMD_INIT_LOG(ERR, "VF is still resetting");
1125                 return ret;
1126         }
1127
1128         return 0;
1129 }
1130
1131 static int
1132 i40evf_init_vf(struct rte_eth_dev *dev)
1133 {
1134         int i, err, bufsz;
1135         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1136         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1137         uint16_t interval =
1138                 i40e_calc_itr_interval(0, 0);
1139
1140         vf->adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1141         vf->dev_data = dev->data;
1142         err = i40e_set_mac_type(hw);
1143         if (err) {
1144                 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err);
1145                 goto err;
1146         }
1147
1148         err = i40evf_check_vf_reset_done(hw);
1149         if (err)
1150                 goto err;
1151
1152         i40e_init_adminq_parameter(hw);
1153         err = i40e_init_adminq(hw);
1154         if (err) {
1155                 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err);
1156                 goto err;
1157         }
1158
1159         /* Reset VF and wait until it's complete */
1160         if (i40evf_reset_vf(hw)) {
1161                 PMD_INIT_LOG(ERR, "reset NIC failed");
1162                 goto err_aq;
1163         }
1164
1165         /* VF reset, shutdown admin queue and initialize again */
1166         if (i40e_shutdown_adminq(hw) != I40E_SUCCESS) {
1167                 PMD_INIT_LOG(ERR, "i40e_shutdown_adminq failed");
1168                 goto err;
1169         }
1170
1171         i40e_init_adminq_parameter(hw);
1172         if (i40e_init_adminq(hw) != I40E_SUCCESS) {
1173                 PMD_INIT_LOG(ERR, "init_adminq failed");
1174                 goto err;
1175         }
1176
1177         vf->aq_resp = rte_zmalloc("vf_aq_resp", I40E_AQ_BUF_SZ, 0);
1178         if (!vf->aq_resp) {
1179                 PMD_INIT_LOG(ERR, "unable to allocate vf_aq_resp memory");
1180                 goto err_aq;
1181         }
1182         if (i40evf_check_api_version(dev) != 0) {
1183                 PMD_INIT_LOG(ERR, "check_api version failed");
1184                 goto err_api;
1185         }
1186         bufsz = sizeof(struct virtchnl_vf_resource) +
1187                 (I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource));
1188         vf->vf_res = rte_zmalloc("vf_res", bufsz, 0);
1189         if (!vf->vf_res) {
1190                 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory");
1191                 goto err_api;
1192         }
1193
1194         if (i40evf_get_vf_resource(dev) != 0) {
1195                 PMD_INIT_LOG(ERR, "i40evf_get_vf_config failed");
1196                 goto err_alloc;
1197         }
1198
1199         /* got VF config message back from PF, now we can parse it */
1200         for (i = 0; i < vf->vf_res->num_vsis; i++) {
1201                 if (vf->vf_res->vsi_res[i].vsi_type == VIRTCHNL_VSI_SRIOV)
1202                         vf->vsi_res = &vf->vf_res->vsi_res[i];
1203         }
1204
1205         if (!vf->vsi_res) {
1206                 PMD_INIT_LOG(ERR, "no LAN VSI found");
1207                 goto err_alloc;
1208         }
1209
1210         if (hw->mac.type == I40E_MAC_X722_VF)
1211                 vf->flags = I40E_FLAG_RSS_AQ_CAPABLE;
1212         vf->vsi.vsi_id = vf->vsi_res->vsi_id;
1213
1214         switch (vf->vsi_res->vsi_type) {
1215         case VIRTCHNL_VSI_SRIOV:
1216                 vf->vsi.type = I40E_VSI_SRIOV;
1217                 break;
1218         default:
1219                 vf->vsi.type = I40E_VSI_TYPE_UNKNOWN;
1220                 break;
1221         }
1222         vf->vsi.nb_qps = vf->vsi_res->num_queue_pairs;
1223         vf->vsi.adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1224
1225         /* Store the MAC address configured by host, or generate random one */
1226         if (is_valid_assigned_ether_addr((struct ether_addr *)hw->mac.addr))
1227                 vf->flags |= I40E_FLAG_VF_MAC_BY_PF;
1228         else
1229                 eth_random_addr(hw->mac.addr); /* Generate a random one */
1230
1231         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1232                        (I40E_ITR_INDEX_DEFAULT <<
1233                         I40E_VFINT_DYN_CTL0_ITR_INDX_SHIFT) |
1234                        (interval <<
1235                         I40E_VFINT_DYN_CTL0_INTERVAL_SHIFT));
1236         I40EVF_WRITE_FLUSH(hw);
1237
1238         return 0;
1239
1240 err_alloc:
1241         rte_free(vf->vf_res);
1242         vf->vsi_res = NULL;
1243 err_api:
1244         rte_free(vf->aq_resp);
1245 err_aq:
1246         i40e_shutdown_adminq(hw); /* ignore error */
1247 err:
1248         return -1;
1249 }
1250
1251 static int
1252 i40evf_uninit_vf(struct rte_eth_dev *dev)
1253 {
1254         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1255         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1256
1257         PMD_INIT_FUNC_TRACE();
1258
1259         if (hw->adapter_closed == 0)
1260                 i40evf_dev_close(dev);
1261         rte_free(vf->vf_res);
1262         vf->vf_res = NULL;
1263         rte_free(vf->aq_resp);
1264         vf->aq_resp = NULL;
1265
1266         return 0;
1267 }
1268
1269 static void
1270 i40evf_handle_pf_event(struct rte_eth_dev *dev, uint8_t *msg,
1271                 __rte_unused uint16_t msglen)
1272 {
1273         struct virtchnl_pf_event *pf_msg =
1274                         (struct virtchnl_pf_event *)msg;
1275         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1276
1277         switch (pf_msg->event) {
1278         case VIRTCHNL_EVENT_RESET_IMPENDING:
1279                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_RESET_IMPENDING event");
1280                 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RESET,
1281                                               NULL);
1282                 break;
1283         case VIRTCHNL_EVENT_LINK_CHANGE:
1284                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_LINK_CHANGE event");
1285                 vf->link_up = pf_msg->event_data.link_event.link_status;
1286                 vf->link_speed = pf_msg->event_data.link_event.link_speed;
1287                 break;
1288         case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
1289                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_PF_DRIVER_CLOSE event");
1290                 break;
1291         default:
1292                 PMD_DRV_LOG(ERR, " unknown event received %u", pf_msg->event);
1293                 break;
1294         }
1295 }
1296
1297 static void
1298 i40evf_handle_aq_msg(struct rte_eth_dev *dev)
1299 {
1300         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1301         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1302         struct i40e_arq_event_info info;
1303         uint16_t pending, aq_opc;
1304         enum virtchnl_ops msg_opc;
1305         enum i40e_status_code msg_ret;
1306         int ret;
1307
1308         info.buf_len = I40E_AQ_BUF_SZ;
1309         if (!vf->aq_resp) {
1310                 PMD_DRV_LOG(ERR, "Buffer for adminq resp should not be NULL");
1311                 return;
1312         }
1313         info.msg_buf = vf->aq_resp;
1314
1315         pending = 1;
1316         while (pending) {
1317                 ret = i40e_clean_arq_element(hw, &info, &pending);
1318
1319                 if (ret != I40E_SUCCESS) {
1320                         PMD_DRV_LOG(INFO, "Failed to read msg from AdminQ,"
1321                                     "ret: %d", ret);
1322                         break;
1323                 }
1324                 aq_opc = rte_le_to_cpu_16(info.desc.opcode);
1325                 /* For the message sent from pf to vf, opcode is stored in
1326                  * cookie_high of struct i40e_aq_desc, while return error code
1327                  * are stored in cookie_low, Which is done by
1328                  * i40e_aq_send_msg_to_vf in PF driver.*/
1329                 msg_opc = (enum virtchnl_ops)rte_le_to_cpu_32(
1330                                                   info.desc.cookie_high);
1331                 msg_ret = (enum i40e_status_code)rte_le_to_cpu_32(
1332                                                   info.desc.cookie_low);
1333                 switch (aq_opc) {
1334                 case i40e_aqc_opc_send_msg_to_vf:
1335                         if (msg_opc == VIRTCHNL_OP_EVENT)
1336                                 /* process event*/
1337                                 i40evf_handle_pf_event(dev, info.msg_buf,
1338                                                        info.msg_len);
1339                         else {
1340                                 /* read message and it's expected one */
1341                                 if (msg_opc == vf->pend_cmd) {
1342                                         vf->cmd_retval = msg_ret;
1343                                         /* prevent compiler reordering */
1344                                         rte_compiler_barrier();
1345                                         _clear_cmd(vf);
1346                                 } else
1347                                         PMD_DRV_LOG(ERR, "command mismatch,"
1348                                                 "expect %u, get %u",
1349                                                 vf->pend_cmd, msg_opc);
1350                                 PMD_DRV_LOG(DEBUG, "adminq response is received,"
1351                                              " opcode = %d", msg_opc);
1352                         }
1353                         break;
1354                 default:
1355                         PMD_DRV_LOG(ERR, "Request %u is not supported yet",
1356                                     aq_opc);
1357                         break;
1358                 }
1359         }
1360 }
1361
1362 /**
1363  * Interrupt handler triggered by NIC  for handling
1364  * specific interrupt. Only adminq interrupt is processed in VF.
1365  *
1366  * @param handle
1367  *  Pointer to interrupt handle.
1368  * @param param
1369  *  The address of parameter (struct rte_eth_dev *) regsitered before.
1370  *
1371  * @return
1372  *  void
1373  */
1374 static void
1375 i40evf_dev_alarm_handler(void *param)
1376 {
1377         struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
1378         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1379         uint32_t icr0;
1380
1381         i40evf_disable_irq0(hw);
1382
1383         /* read out interrupt causes */
1384         icr0 = I40E_READ_REG(hw, I40E_VFINT_ICR01);
1385
1386         /* No interrupt event indicated */
1387         if (!(icr0 & I40E_VFINT_ICR01_INTEVENT_MASK))
1388                 goto done;
1389
1390         if (icr0 & I40E_VFINT_ICR01_ADMINQ_MASK) {
1391                 PMD_DRV_LOG(DEBUG, "ICR01_ADMINQ is reported");
1392                 i40evf_handle_aq_msg(dev);
1393         }
1394
1395         /* Link Status Change interrupt */
1396         if (icr0 & I40E_VFINT_ICR01_LINK_STAT_CHANGE_MASK)
1397                 PMD_DRV_LOG(DEBUG, "LINK_STAT_CHANGE is reported,"
1398                                    " do nothing");
1399
1400 done:
1401         i40evf_enable_irq0(hw);
1402         rte_eal_alarm_set(I40EVF_ALARM_INTERVAL,
1403                           i40evf_dev_alarm_handler, dev);
1404 }
1405
1406 static int
1407 i40evf_dev_init(struct rte_eth_dev *eth_dev)
1408 {
1409         struct i40e_hw *hw
1410                 = I40E_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
1411         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1412
1413         PMD_INIT_FUNC_TRACE();
1414
1415         /* assign ops func pointer */
1416         eth_dev->dev_ops = &i40evf_eth_dev_ops;
1417         eth_dev->rx_pkt_burst = &i40e_recv_pkts;
1418         eth_dev->tx_pkt_burst = &i40e_xmit_pkts;
1419
1420         /*
1421          * For secondary processes, we don't initialise any further as primary
1422          * has already done this work.
1423          */
1424         if (rte_eal_process_type() != RTE_PROC_PRIMARY){
1425                 i40e_set_rx_function(eth_dev);
1426                 i40e_set_tx_function(eth_dev);
1427                 return 0;
1428         }
1429         i40e_set_default_ptype_table(eth_dev);
1430         i40e_set_default_pctype_table(eth_dev);
1431         rte_eth_copy_pci_info(eth_dev, pci_dev);
1432
1433         hw->vendor_id = pci_dev->id.vendor_id;
1434         hw->device_id = pci_dev->id.device_id;
1435         hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
1436         hw->subsystem_device_id = pci_dev->id.subsystem_device_id;
1437         hw->bus.device = pci_dev->addr.devid;
1438         hw->bus.func = pci_dev->addr.function;
1439         hw->hw_addr = (void *)pci_dev->mem_resource[0].addr;
1440         hw->adapter_stopped = 0;
1441         hw->adapter_closed = 0;
1442
1443         if(i40evf_init_vf(eth_dev) != 0) {
1444                 PMD_INIT_LOG(ERR, "Init vf failed");
1445                 return -1;
1446         }
1447
1448         rte_eal_alarm_set(I40EVF_ALARM_INTERVAL,
1449                           i40evf_dev_alarm_handler, eth_dev);
1450
1451         /* configure and enable device interrupt */
1452         i40evf_enable_irq0(hw);
1453
1454         /* copy mac addr */
1455         eth_dev->data->mac_addrs = rte_zmalloc("i40evf_mac",
1456                                         ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX,
1457                                         0);
1458         if (eth_dev->data->mac_addrs == NULL) {
1459                 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to"
1460                                 " store MAC addresses",
1461                                 ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX);
1462                 return -ENOMEM;
1463         }
1464         ether_addr_copy((struct ether_addr *)hw->mac.addr,
1465                         &eth_dev->data->mac_addrs[0]);
1466
1467         return 0;
1468 }
1469
1470 static int
1471 i40evf_dev_uninit(struct rte_eth_dev *eth_dev)
1472 {
1473         PMD_INIT_FUNC_TRACE();
1474
1475         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1476                 return -EPERM;
1477
1478         eth_dev->dev_ops = NULL;
1479         eth_dev->rx_pkt_burst = NULL;
1480         eth_dev->tx_pkt_burst = NULL;
1481
1482         if (i40evf_uninit_vf(eth_dev) != 0) {
1483                 PMD_INIT_LOG(ERR, "i40evf_uninit_vf failed");
1484                 return -1;
1485         }
1486
1487         return 0;
1488 }
1489
1490 static int eth_i40evf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1491         struct rte_pci_device *pci_dev)
1492 {
1493         return rte_eth_dev_pci_generic_probe(pci_dev,
1494                 sizeof(struct i40e_adapter), i40evf_dev_init);
1495 }
1496
1497 static int eth_i40evf_pci_remove(struct rte_pci_device *pci_dev)
1498 {
1499         return rte_eth_dev_pci_generic_remove(pci_dev, i40evf_dev_uninit);
1500 }
1501
1502 /*
1503  * virtual function driver struct
1504  */
1505 static struct rte_pci_driver rte_i40evf_pmd = {
1506         .id_table = pci_id_i40evf_map,
1507         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_IOVA_AS_VA,
1508         .probe = eth_i40evf_pci_probe,
1509         .remove = eth_i40evf_pci_remove,
1510 };
1511
1512 RTE_PMD_REGISTER_PCI(net_i40e_vf, rte_i40evf_pmd);
1513 RTE_PMD_REGISTER_PCI_TABLE(net_i40e_vf, pci_id_i40evf_map);
1514 RTE_PMD_REGISTER_KMOD_DEP(net_i40e_vf, "* igb_uio | vfio-pci");
1515
1516 static int
1517 i40evf_dev_configure(struct rte_eth_dev *dev)
1518 {
1519         struct i40e_adapter *ad =
1520                 I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1521
1522         /* Initialize to TRUE. If any of Rx queues doesn't meet the bulk
1523          * allocation or vector Rx preconditions we will reset it.
1524          */
1525         ad->rx_bulk_alloc_allowed = true;
1526         ad->rx_vec_allowed = true;
1527         ad->tx_simple_allowed = true;
1528         ad->tx_vec_allowed = true;
1529
1530         return i40evf_init_vlan(dev);
1531 }
1532
1533 static int
1534 i40evf_init_vlan(struct rte_eth_dev *dev)
1535 {
1536         /* Apply vlan offload setting */
1537         i40evf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
1538
1539         return 0;
1540 }
1541
1542 static int
1543 i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1544 {
1545         struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1546         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1547
1548         if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN))
1549                 return -ENOTSUP;
1550
1551         /* Vlan stripping setting */
1552         if (mask & ETH_VLAN_STRIP_MASK) {
1553                 /* Enable or disable VLAN stripping */
1554                 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
1555                         i40evf_enable_vlan_strip(dev);
1556                 else
1557                         i40evf_disable_vlan_strip(dev);
1558         }
1559
1560         return 0;
1561 }
1562
1563 static int
1564 i40evf_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1565 {
1566         struct i40e_rx_queue *rxq;
1567         int err;
1568         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1569
1570         PMD_INIT_FUNC_TRACE();
1571
1572         rxq = dev->data->rx_queues[rx_queue_id];
1573
1574         err = i40e_alloc_rx_queue_mbufs(rxq);
1575         if (err) {
1576                 PMD_DRV_LOG(ERR, "Failed to allocate RX queue mbuf");
1577                 return err;
1578         }
1579
1580         rte_wmb();
1581
1582         /* Init the RX tail register. */
1583         I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1584         I40EVF_WRITE_FLUSH(hw);
1585
1586         /* Ready to switch the queue on */
1587         err = i40evf_switch_queue(dev, TRUE, rx_queue_id, TRUE);
1588         if (err) {
1589                 PMD_DRV_LOG(ERR, "Failed to switch RX queue %u on",
1590                             rx_queue_id);
1591                 return err;
1592         }
1593         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1594
1595         return 0;
1596 }
1597
1598 static int
1599 i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1600 {
1601         struct i40e_rx_queue *rxq;
1602         int err;
1603
1604         rxq = dev->data->rx_queues[rx_queue_id];
1605
1606         err = i40evf_switch_queue(dev, TRUE, rx_queue_id, FALSE);
1607         if (err) {
1608                 PMD_DRV_LOG(ERR, "Failed to switch RX queue %u off",
1609                             rx_queue_id);
1610                 return err;
1611         }
1612
1613         i40e_rx_queue_release_mbufs(rxq);
1614         i40e_reset_rx_queue(rxq);
1615         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1616
1617         return 0;
1618 }
1619
1620 static int
1621 i40evf_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1622 {
1623         int err;
1624
1625         PMD_INIT_FUNC_TRACE();
1626
1627         /* Ready to switch the queue on */
1628         err = i40evf_switch_queue(dev, FALSE, tx_queue_id, TRUE);
1629         if (err) {
1630                 PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on",
1631                             tx_queue_id);
1632                 return err;
1633         }
1634         dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1635
1636         return 0;
1637 }
1638
1639 static int
1640 i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1641 {
1642         struct i40e_tx_queue *txq;
1643         int err;
1644
1645         txq = dev->data->tx_queues[tx_queue_id];
1646
1647         err = i40evf_switch_queue(dev, FALSE, tx_queue_id, FALSE);
1648         if (err) {
1649                 PMD_DRV_LOG(ERR, "Failed to switch TX queue %u off",
1650                             tx_queue_id);
1651                 return err;
1652         }
1653
1654         i40e_tx_queue_release_mbufs(txq);
1655         i40e_reset_tx_queue(txq);
1656         dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1657
1658         return 0;
1659 }
1660
1661 static int
1662 i40evf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1663 {
1664         int ret;
1665
1666         if (on)
1667                 ret = i40evf_add_vlan(dev, vlan_id);
1668         else
1669                 ret = i40evf_del_vlan(dev,vlan_id);
1670
1671         return ret;
1672 }
1673
1674 static int
1675 i40evf_rxq_init(struct rte_eth_dev *dev, struct i40e_rx_queue *rxq)
1676 {
1677         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1678         struct rte_eth_dev_data *dev_data = dev->data;
1679         struct rte_pktmbuf_pool_private *mbp_priv;
1680         uint16_t buf_size, len;
1681
1682         rxq->qrx_tail = hw->hw_addr + I40E_QRX_TAIL1(rxq->queue_id);
1683         I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1684         I40EVF_WRITE_FLUSH(hw);
1685
1686         /* Calculate the maximum packet length allowed */
1687         mbp_priv = rte_mempool_get_priv(rxq->mp);
1688         buf_size = (uint16_t)(mbp_priv->mbuf_data_room_size -
1689                                         RTE_PKTMBUF_HEADROOM);
1690         rxq->hs_mode = i40e_header_split_none;
1691         rxq->rx_hdr_len = 0;
1692         rxq->rx_buf_len = RTE_ALIGN(buf_size, (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
1693         len = rxq->rx_buf_len * I40E_MAX_CHAINED_RX_BUFFERS;
1694         rxq->max_pkt_len = RTE_MIN(len,
1695                 dev_data->dev_conf.rxmode.max_rx_pkt_len);
1696
1697         /**
1698          * Check if the jumbo frame and maximum packet length are set correctly
1699          */
1700         if (dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1701                 if (rxq->max_pkt_len <= ETHER_MAX_LEN ||
1702                     rxq->max_pkt_len > I40E_FRAME_SIZE_MAX) {
1703                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1704                                 "larger than %u and smaller than %u, as jumbo "
1705                                 "frame is enabled", (uint32_t)ETHER_MAX_LEN,
1706                                         (uint32_t)I40E_FRAME_SIZE_MAX);
1707                         return I40E_ERR_CONFIG;
1708                 }
1709         } else {
1710                 if (rxq->max_pkt_len < ETHER_MIN_LEN ||
1711                     rxq->max_pkt_len > ETHER_MAX_LEN) {
1712                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1713                                 "larger than %u and smaller than %u, as jumbo "
1714                                 "frame is disabled", (uint32_t)ETHER_MIN_LEN,
1715                                                 (uint32_t)ETHER_MAX_LEN);
1716                         return I40E_ERR_CONFIG;
1717                 }
1718         }
1719
1720         if ((dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_SCATTER) ||
1721             (rxq->max_pkt_len + 2 * I40E_VLAN_TAG_SIZE) > buf_size) {
1722                 dev_data->scattered_rx = 1;
1723         }
1724
1725         return 0;
1726 }
1727
1728 static int
1729 i40evf_rx_init(struct rte_eth_dev *dev)
1730 {
1731         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1732         uint16_t i;
1733         int ret = I40E_SUCCESS;
1734         struct i40e_rx_queue **rxq =
1735                 (struct i40e_rx_queue **)dev->data->rx_queues;
1736
1737         i40evf_config_rss(vf);
1738         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1739                 if (!rxq[i] || !rxq[i]->q_set)
1740                         continue;
1741                 ret = i40evf_rxq_init(dev, rxq[i]);
1742                 if (ret != I40E_SUCCESS)
1743                         break;
1744         }
1745         if (ret == I40E_SUCCESS)
1746                 i40e_set_rx_function(dev);
1747
1748         return ret;
1749 }
1750
1751 static void
1752 i40evf_tx_init(struct rte_eth_dev *dev)
1753 {
1754         uint16_t i;
1755         struct i40e_tx_queue **txq =
1756                 (struct i40e_tx_queue **)dev->data->tx_queues;
1757         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1758
1759         for (i = 0; i < dev->data->nb_tx_queues; i++)
1760                 txq[i]->qtx_tail = hw->hw_addr + I40E_QTX_TAIL1(i);
1761
1762         i40e_set_tx_function(dev);
1763 }
1764
1765 static inline void
1766 i40evf_enable_queues_intr(struct rte_eth_dev *dev)
1767 {
1768         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1769         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1770         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1771
1772         if (!rte_intr_allow_others(intr_handle)) {
1773                 I40E_WRITE_REG(hw,
1774                                I40E_VFINT_DYN_CTL01,
1775                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1776                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1777                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1778                 I40EVF_WRITE_FLUSH(hw);
1779                 return;
1780         }
1781
1782         I40EVF_WRITE_FLUSH(hw);
1783 }
1784
1785 static inline void
1786 i40evf_disable_queues_intr(struct rte_eth_dev *dev)
1787 {
1788         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1789         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1790         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1791
1792         if (!rte_intr_allow_others(intr_handle)) {
1793                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1794                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1795                 I40EVF_WRITE_FLUSH(hw);
1796                 return;
1797         }
1798
1799         I40EVF_WRITE_FLUSH(hw);
1800 }
1801
1802 static int
1803 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
1804 {
1805         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1806         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1807         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1808         uint16_t interval =
1809                 i40e_calc_itr_interval(0, 0);
1810         uint16_t msix_intr;
1811
1812         msix_intr = intr_handle->intr_vec[queue_id];
1813         if (msix_intr == I40E_MISC_VEC_ID)
1814                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1815                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1816                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1817                                (0 << I40E_VFINT_DYN_CTL01_ITR_INDX_SHIFT) |
1818                                (interval <<
1819                                 I40E_VFINT_DYN_CTL01_INTERVAL_SHIFT));
1820         else
1821                 I40E_WRITE_REG(hw,
1822                                I40E_VFINT_DYN_CTLN1(msix_intr -
1823                                                     I40E_RX_VEC_START),
1824                                I40E_VFINT_DYN_CTLN1_INTENA_MASK |
1825                                I40E_VFINT_DYN_CTLN1_CLEARPBA_MASK |
1826                                (0 << I40E_VFINT_DYN_CTLN1_ITR_INDX_SHIFT) |
1827                                (interval <<
1828                                 I40E_VFINT_DYN_CTLN1_INTERVAL_SHIFT));
1829
1830         I40EVF_WRITE_FLUSH(hw);
1831
1832         return 0;
1833 }
1834
1835 static int
1836 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
1837 {
1838         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1839         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1840         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1841         uint16_t msix_intr;
1842
1843         msix_intr = intr_handle->intr_vec[queue_id];
1844         if (msix_intr == I40E_MISC_VEC_ID)
1845                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01, 0);
1846         else
1847                 I40E_WRITE_REG(hw,
1848                                I40E_VFINT_DYN_CTLN1(msix_intr -
1849                                                     I40E_RX_VEC_START),
1850                                0);
1851
1852         I40EVF_WRITE_FLUSH(hw);
1853
1854         return 0;
1855 }
1856
1857 static void
1858 i40evf_add_del_all_mac_addr(struct rte_eth_dev *dev, bool add)
1859 {
1860         struct virtchnl_ether_addr_list *list;
1861         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1862         int err, i, j;
1863         int next_begin = 0;
1864         int begin = 0;
1865         uint32_t len;
1866         struct ether_addr *addr;
1867         struct vf_cmd_info args;
1868
1869         do {
1870                 j = 0;
1871                 len = sizeof(struct virtchnl_ether_addr_list);
1872                 for (i = begin; i < I40E_NUM_MACADDR_MAX; i++, next_begin++) {
1873                         if (is_zero_ether_addr(&dev->data->mac_addrs[i]))
1874                                 continue;
1875                         len += sizeof(struct virtchnl_ether_addr);
1876                         if (len >= I40E_AQ_BUF_SZ) {
1877                                 next_begin = i + 1;
1878                                 break;
1879                         }
1880                 }
1881
1882                 list = rte_zmalloc("i40evf_del_mac_buffer", len, 0);
1883                 if (!list) {
1884                         PMD_DRV_LOG(ERR, "fail to allocate memory");
1885                         return;
1886                 }
1887
1888                 for (i = begin; i < next_begin; i++) {
1889                         addr = &dev->data->mac_addrs[i];
1890                         if (is_zero_ether_addr(addr))
1891                                 continue;
1892                         rte_memcpy(list->list[j].addr, addr->addr_bytes,
1893                                          sizeof(addr->addr_bytes));
1894                         PMD_DRV_LOG(DEBUG, "add/rm mac:%x:%x:%x:%x:%x:%x",
1895                                     addr->addr_bytes[0], addr->addr_bytes[1],
1896                                     addr->addr_bytes[2], addr->addr_bytes[3],
1897                                     addr->addr_bytes[4], addr->addr_bytes[5]);
1898                         j++;
1899                 }
1900                 list->vsi_id = vf->vsi_res->vsi_id;
1901                 list->num_elements = j;
1902                 args.ops = add ? VIRTCHNL_OP_ADD_ETH_ADDR :
1903                            VIRTCHNL_OP_DEL_ETH_ADDR;
1904                 args.in_args = (uint8_t *)list;
1905                 args.in_args_size = len;
1906                 args.out_buffer = vf->aq_resp;
1907                 args.out_size = I40E_AQ_BUF_SZ;
1908                 err = i40evf_execute_vf_cmd(dev, &args);
1909                 if (err) {
1910                         PMD_DRV_LOG(ERR, "fail to execute command %s",
1911                                     add ? "OP_ADD_ETHER_ADDRESS" :
1912                                     "OP_DEL_ETHER_ADDRESS");
1913                 } else {
1914                         if (add)
1915                                 vf->vsi.mac_num++;
1916                         else
1917                                 vf->vsi.mac_num--;
1918                 }
1919                 rte_free(list);
1920                 begin = next_begin;
1921         } while (begin < I40E_NUM_MACADDR_MAX);
1922 }
1923
1924 static int
1925 i40evf_dev_start(struct rte_eth_dev *dev)
1926 {
1927         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1928         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1929         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1930         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1931         uint32_t intr_vector = 0;
1932
1933         PMD_INIT_FUNC_TRACE();
1934
1935         hw->adapter_stopped = 0;
1936
1937         vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
1938         vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
1939                                         dev->data->nb_tx_queues);
1940
1941         /* check and configure queue intr-vector mapping */
1942         if (rte_intr_cap_multiple(intr_handle) &&
1943             dev->data->dev_conf.intr_conf.rxq) {
1944                 intr_vector = dev->data->nb_rx_queues;
1945                 if (rte_intr_efd_enable(intr_handle, intr_vector))
1946                         return -1;
1947         }
1948
1949         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
1950                 intr_handle->intr_vec =
1951                         rte_zmalloc("intr_vec",
1952                                     dev->data->nb_rx_queues * sizeof(int), 0);
1953                 if (!intr_handle->intr_vec) {
1954                         PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
1955                                      " intr_vec", dev->data->nb_rx_queues);
1956                         return -ENOMEM;
1957                 }
1958         }
1959
1960         if (i40evf_rx_init(dev) != 0){
1961                 PMD_DRV_LOG(ERR, "failed to do RX init");
1962                 return -1;
1963         }
1964
1965         i40evf_tx_init(dev);
1966
1967         if (i40evf_configure_vsi_queues(dev) != 0) {
1968                 PMD_DRV_LOG(ERR, "configure queues failed");
1969                 goto err_queue;
1970         }
1971         if (i40evf_config_irq_map(dev)) {
1972                 PMD_DRV_LOG(ERR, "config_irq_map failed");
1973                 goto err_queue;
1974         }
1975
1976         /* Set all mac addrs */
1977         i40evf_add_del_all_mac_addr(dev, TRUE);
1978         /* Set all multicast addresses */
1979         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
1980                                 TRUE);
1981
1982         if (i40evf_start_queues(dev) != 0) {
1983                 PMD_DRV_LOG(ERR, "enable queues failed");
1984                 goto err_mac;
1985         }
1986
1987         /* only enable interrupt in rx interrupt mode */
1988         if (dev->data->dev_conf.intr_conf.rxq != 0)
1989                 rte_intr_enable(intr_handle);
1990
1991         i40evf_enable_queues_intr(dev);
1992
1993         return 0;
1994
1995 err_mac:
1996         i40evf_add_del_all_mac_addr(dev, FALSE);
1997         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
1998                                 FALSE);
1999 err_queue:
2000         return -1;
2001 }
2002
2003 static void
2004 i40evf_dev_stop(struct rte_eth_dev *dev)
2005 {
2006         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2007         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2008         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2009         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2010
2011         PMD_INIT_FUNC_TRACE();
2012
2013         if (dev->data->dev_conf.intr_conf.rxq != 0)
2014                 rte_intr_disable(intr_handle);
2015
2016         if (hw->adapter_stopped == 1)
2017                 return;
2018         i40evf_stop_queues(dev);
2019         i40evf_disable_queues_intr(dev);
2020         i40e_dev_clear_queues(dev);
2021
2022         /* Clean datapath event and queue/vec mapping */
2023         rte_intr_efd_disable(intr_handle);
2024         if (intr_handle->intr_vec) {
2025                 rte_free(intr_handle->intr_vec);
2026                 intr_handle->intr_vec = NULL;
2027         }
2028         /* remove all mac addrs */
2029         i40evf_add_del_all_mac_addr(dev, FALSE);
2030         /* remove all multicast addresses */
2031         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2032                                 FALSE);
2033         hw->adapter_stopped = 1;
2034
2035 }
2036
2037 static int
2038 i40evf_dev_link_update(struct rte_eth_dev *dev,
2039                        __rte_unused int wait_to_complete)
2040 {
2041         struct rte_eth_link new_link;
2042         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2043         /*
2044          * DPDK pf host provide interfacet to acquire link status
2045          * while Linux driver does not
2046          */
2047
2048         memset(&new_link, 0, sizeof(new_link));
2049         /* Linux driver PF host */
2050         switch (vf->link_speed) {
2051         case I40E_LINK_SPEED_100MB:
2052                 new_link.link_speed = ETH_SPEED_NUM_100M;
2053                 break;
2054         case I40E_LINK_SPEED_1GB:
2055                 new_link.link_speed = ETH_SPEED_NUM_1G;
2056                 break;
2057         case I40E_LINK_SPEED_10GB:
2058                 new_link.link_speed = ETH_SPEED_NUM_10G;
2059                 break;
2060         case I40E_LINK_SPEED_20GB:
2061                 new_link.link_speed = ETH_SPEED_NUM_20G;
2062                 break;
2063         case I40E_LINK_SPEED_25GB:
2064                 new_link.link_speed = ETH_SPEED_NUM_25G;
2065                 break;
2066         case I40E_LINK_SPEED_40GB:
2067                 new_link.link_speed = ETH_SPEED_NUM_40G;
2068                 break;
2069         default:
2070                 new_link.link_speed = ETH_SPEED_NUM_100M;
2071                 break;
2072         }
2073         /* full duplex only */
2074         new_link.link_duplex = ETH_LINK_FULL_DUPLEX;
2075         new_link.link_status = vf->link_up ? ETH_LINK_UP :
2076                                              ETH_LINK_DOWN;
2077         new_link.link_autoneg =
2078                 !(dev->data->dev_conf.link_speeds & ETH_LINK_SPEED_FIXED);
2079
2080         return rte_eth_linkstatus_set(dev, &new_link);
2081 }
2082
2083 static void
2084 i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev)
2085 {
2086         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2087         int ret;
2088
2089         /* If enabled, just return */
2090         if (vf->promisc_unicast_enabled)
2091                 return;
2092
2093         ret = i40evf_config_promisc(dev, 1, vf->promisc_multicast_enabled);
2094         if (ret == 0)
2095                 vf->promisc_unicast_enabled = TRUE;
2096 }
2097
2098 static void
2099 i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev)
2100 {
2101         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2102         int ret;
2103
2104         /* If disabled, just return */
2105         if (!vf->promisc_unicast_enabled)
2106                 return;
2107
2108         ret = i40evf_config_promisc(dev, 0, vf->promisc_multicast_enabled);
2109         if (ret == 0)
2110                 vf->promisc_unicast_enabled = FALSE;
2111 }
2112
2113 static void
2114 i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev)
2115 {
2116         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2117         int ret;
2118
2119         /* If enabled, just return */
2120         if (vf->promisc_multicast_enabled)
2121                 return;
2122
2123         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 1);
2124         if (ret == 0)
2125                 vf->promisc_multicast_enabled = TRUE;
2126 }
2127
2128 static void
2129 i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev)
2130 {
2131         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2132         int ret;
2133
2134         /* If enabled, just return */
2135         if (!vf->promisc_multicast_enabled)
2136                 return;
2137
2138         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 0);
2139         if (ret == 0)
2140                 vf->promisc_multicast_enabled = FALSE;
2141 }
2142
2143 static void
2144 i40evf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
2145 {
2146         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2147
2148         dev_info->max_rx_queues = vf->vsi_res->num_queue_pairs;
2149         dev_info->max_tx_queues = vf->vsi_res->num_queue_pairs;
2150         dev_info->min_rx_bufsize = I40E_BUF_SIZE_MIN;
2151         dev_info->max_rx_pktlen = I40E_FRAME_SIZE_MAX;
2152         dev_info->hash_key_size = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2153         dev_info->reta_size = ETH_RSS_RETA_SIZE_64;
2154         dev_info->flow_type_rss_offloads = vf->adapter->flow_types_mask;
2155         dev_info->max_mac_addrs = I40E_NUM_MACADDR_MAX;
2156         dev_info->rx_queue_offload_capa = 0;
2157         dev_info->rx_offload_capa =
2158                 DEV_RX_OFFLOAD_VLAN_STRIP |
2159                 DEV_RX_OFFLOAD_QINQ_STRIP |
2160                 DEV_RX_OFFLOAD_IPV4_CKSUM |
2161                 DEV_RX_OFFLOAD_UDP_CKSUM |
2162                 DEV_RX_OFFLOAD_TCP_CKSUM |
2163                 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
2164                 DEV_RX_OFFLOAD_SCATTER |
2165                 DEV_RX_OFFLOAD_JUMBO_FRAME |
2166                 DEV_RX_OFFLOAD_VLAN_FILTER;
2167
2168         dev_info->tx_queue_offload_capa = 0;
2169         dev_info->tx_offload_capa =
2170                 DEV_TX_OFFLOAD_VLAN_INSERT |
2171                 DEV_TX_OFFLOAD_QINQ_INSERT |
2172                 DEV_TX_OFFLOAD_IPV4_CKSUM |
2173                 DEV_TX_OFFLOAD_UDP_CKSUM |
2174                 DEV_TX_OFFLOAD_TCP_CKSUM |
2175                 DEV_TX_OFFLOAD_SCTP_CKSUM |
2176                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
2177                 DEV_TX_OFFLOAD_TCP_TSO |
2178                 DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
2179                 DEV_TX_OFFLOAD_GRE_TNL_TSO |
2180                 DEV_TX_OFFLOAD_IPIP_TNL_TSO |
2181                 DEV_TX_OFFLOAD_GENEVE_TNL_TSO |
2182                 DEV_TX_OFFLOAD_MULTI_SEGS;
2183
2184         dev_info->default_rxconf = (struct rte_eth_rxconf) {
2185                 .rx_thresh = {
2186                         .pthresh = I40E_DEFAULT_RX_PTHRESH,
2187                         .hthresh = I40E_DEFAULT_RX_HTHRESH,
2188                         .wthresh = I40E_DEFAULT_RX_WTHRESH,
2189                 },
2190                 .rx_free_thresh = I40E_DEFAULT_RX_FREE_THRESH,
2191                 .rx_drop_en = 0,
2192                 .offloads = 0,
2193         };
2194
2195         dev_info->default_txconf = (struct rte_eth_txconf) {
2196                 .tx_thresh = {
2197                         .pthresh = I40E_DEFAULT_TX_PTHRESH,
2198                         .hthresh = I40E_DEFAULT_TX_HTHRESH,
2199                         .wthresh = I40E_DEFAULT_TX_WTHRESH,
2200                 },
2201                 .tx_free_thresh = I40E_DEFAULT_TX_FREE_THRESH,
2202                 .tx_rs_thresh = I40E_DEFAULT_TX_RSBIT_THRESH,
2203                 .offloads = 0,
2204         };
2205
2206         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
2207                 .nb_max = I40E_MAX_RING_DESC,
2208                 .nb_min = I40E_MIN_RING_DESC,
2209                 .nb_align = I40E_ALIGN_RING_DESC,
2210         };
2211
2212         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
2213                 .nb_max = I40E_MAX_RING_DESC,
2214                 .nb_min = I40E_MIN_RING_DESC,
2215                 .nb_align = I40E_ALIGN_RING_DESC,
2216         };
2217 }
2218
2219 static int
2220 i40evf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
2221 {
2222         int ret;
2223         struct i40e_eth_stats *pstats = NULL;
2224         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2225         struct i40e_vsi *vsi = &vf->vsi;
2226
2227         ret = i40evf_query_stats(dev, &pstats);
2228         if (ret == 0) {
2229                 i40evf_update_stats(vsi, pstats);
2230
2231                 stats->ipackets = pstats->rx_unicast + pstats->rx_multicast +
2232                                                 pstats->rx_broadcast;
2233                 stats->opackets = pstats->tx_broadcast + pstats->tx_multicast +
2234                                                 pstats->tx_unicast;
2235                 stats->imissed = pstats->rx_discards;
2236                 stats->oerrors = pstats->tx_errors + pstats->tx_discards;
2237                 stats->ibytes = pstats->rx_bytes;
2238                 stats->obytes = pstats->tx_bytes;
2239         } else {
2240                 PMD_DRV_LOG(ERR, "Get statistics failed");
2241         }
2242         return ret;
2243 }
2244
2245 static void
2246 i40evf_dev_close(struct rte_eth_dev *dev)
2247 {
2248         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2249
2250         i40evf_dev_stop(dev);
2251         i40e_dev_free_queues(dev);
2252         /*
2253          * disable promiscuous mode before reset vf
2254          * it is a workaround solution when work with kernel driver
2255          * and it is not the normal way
2256          */
2257         i40evf_dev_promiscuous_disable(dev);
2258         i40evf_dev_allmulticast_disable(dev);
2259
2260         i40evf_reset_vf(hw);
2261         i40e_shutdown_adminq(hw);
2262         i40evf_disable_irq0(hw);
2263         rte_eal_alarm_cancel(i40evf_dev_alarm_handler, dev);
2264         hw->adapter_closed = 1;
2265 }
2266
2267 /*
2268  * Reset VF device only to re-initialize resources in PMD layer
2269  */
2270 static int
2271 i40evf_dev_reset(struct rte_eth_dev *dev)
2272 {
2273         int ret;
2274
2275         ret = i40evf_dev_uninit(dev);
2276         if (ret)
2277                 return ret;
2278
2279         ret = i40evf_dev_init(dev);
2280
2281         return ret;
2282 }
2283
2284 static int
2285 i40evf_get_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2286 {
2287         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2288         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2289         int ret;
2290
2291         if (!lut)
2292                 return -EINVAL;
2293
2294         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2295                 ret = i40e_aq_get_rss_lut(hw, vsi->vsi_id, FALSE,
2296                                           lut, lut_size);
2297                 if (ret) {
2298                         PMD_DRV_LOG(ERR, "Failed to get RSS lookup table");
2299                         return ret;
2300                 }
2301         } else {
2302                 uint32_t *lut_dw = (uint32_t *)lut;
2303                 uint16_t i, lut_size_dw = lut_size / 4;
2304
2305                 for (i = 0; i < lut_size_dw; i++)
2306                         lut_dw[i] = I40E_READ_REG(hw, I40E_VFQF_HLUT(i));
2307         }
2308
2309         return 0;
2310 }
2311
2312 static int
2313 i40evf_set_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2314 {
2315         struct i40e_vf *vf;
2316         struct i40e_hw *hw;
2317         int ret;
2318
2319         if (!vsi || !lut)
2320                 return -EINVAL;
2321
2322         vf = I40E_VSI_TO_VF(vsi);
2323         hw = I40E_VSI_TO_HW(vsi);
2324
2325         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2326                 ret = i40e_aq_set_rss_lut(hw, vsi->vsi_id, FALSE,
2327                                           lut, lut_size);
2328                 if (ret) {
2329                         PMD_DRV_LOG(ERR, "Failed to set RSS lookup table");
2330                         return ret;
2331                 }
2332         } else {
2333                 uint32_t *lut_dw = (uint32_t *)lut;
2334                 uint16_t i, lut_size_dw = lut_size / 4;
2335
2336                 for (i = 0; i < lut_size_dw; i++)
2337                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i), lut_dw[i]);
2338                 I40EVF_WRITE_FLUSH(hw);
2339         }
2340
2341         return 0;
2342 }
2343
2344 static int
2345 i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
2346                            struct rte_eth_rss_reta_entry64 *reta_conf,
2347                            uint16_t reta_size)
2348 {
2349         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2350         uint8_t *lut;
2351         uint16_t i, idx, shift;
2352         int ret;
2353
2354         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2355                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2356                         "(%d) doesn't match the number of hardware can "
2357                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2358                 return -EINVAL;
2359         }
2360
2361         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2362         if (!lut) {
2363                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2364                 return -ENOMEM;
2365         }
2366         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2367         if (ret)
2368                 goto out;
2369         for (i = 0; i < reta_size; i++) {
2370                 idx = i / RTE_RETA_GROUP_SIZE;
2371                 shift = i % RTE_RETA_GROUP_SIZE;
2372                 if (reta_conf[idx].mask & (1ULL << shift))
2373                         lut[i] = reta_conf[idx].reta[shift];
2374         }
2375         ret = i40evf_set_rss_lut(&vf->vsi, lut, reta_size);
2376
2377 out:
2378         rte_free(lut);
2379
2380         return ret;
2381 }
2382
2383 static int
2384 i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
2385                           struct rte_eth_rss_reta_entry64 *reta_conf,
2386                           uint16_t reta_size)
2387 {
2388         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2389         uint16_t i, idx, shift;
2390         uint8_t *lut;
2391         int ret;
2392
2393         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2394                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2395                         "(%d) doesn't match the number of hardware can "
2396                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2397                 return -EINVAL;
2398         }
2399
2400         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2401         if (!lut) {
2402                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2403                 return -ENOMEM;
2404         }
2405
2406         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2407         if (ret)
2408                 goto out;
2409         for (i = 0; i < reta_size; i++) {
2410                 idx = i / RTE_RETA_GROUP_SIZE;
2411                 shift = i % RTE_RETA_GROUP_SIZE;
2412                 if (reta_conf[idx].mask & (1ULL << shift))
2413                         reta_conf[idx].reta[shift] = lut[i];
2414         }
2415
2416 out:
2417         rte_free(lut);
2418
2419         return ret;
2420 }
2421
2422 static int
2423 i40evf_set_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t key_len)
2424 {
2425         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2426         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2427         int ret = 0;
2428
2429         if (!key || key_len == 0) {
2430                 PMD_DRV_LOG(DEBUG, "No key to be configured");
2431                 return 0;
2432         } else if (key_len != (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2433                 sizeof(uint32_t)) {
2434                 PMD_DRV_LOG(ERR, "Invalid key length %u", key_len);
2435                 return -EINVAL;
2436         }
2437
2438         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2439                 struct i40e_aqc_get_set_rss_key_data *key_dw =
2440                         (struct i40e_aqc_get_set_rss_key_data *)key;
2441
2442                 ret = i40e_aq_set_rss_key(hw, vsi->vsi_id, key_dw);
2443                 if (ret)
2444                         PMD_INIT_LOG(ERR, "Failed to configure RSS key "
2445                                      "via AQ");
2446         } else {
2447                 uint32_t *hash_key = (uint32_t *)key;
2448                 uint16_t i;
2449
2450                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2451                         i40e_write_rx_ctl(hw, I40E_VFQF_HKEY(i), hash_key[i]);
2452                 I40EVF_WRITE_FLUSH(hw);
2453         }
2454
2455         return ret;
2456 }
2457
2458 static int
2459 i40evf_get_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t *key_len)
2460 {
2461         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2462         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2463         int ret;
2464
2465         if (!key || !key_len)
2466                 return -EINVAL;
2467
2468         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2469                 ret = i40e_aq_get_rss_key(hw, vsi->vsi_id,
2470                         (struct i40e_aqc_get_set_rss_key_data *)key);
2471                 if (ret) {
2472                         PMD_INIT_LOG(ERR, "Failed to get RSS key via AQ");
2473                         return ret;
2474                 }
2475         } else {
2476                 uint32_t *key_dw = (uint32_t *)key;
2477                 uint16_t i;
2478
2479                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2480                         key_dw[i] = i40e_read_rx_ctl(hw, I40E_VFQF_HKEY(i));
2481         }
2482         *key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2483
2484         return 0;
2485 }
2486
2487 static int
2488 i40evf_hw_rss_hash_set(struct i40e_vf *vf, struct rte_eth_rss_conf *rss_conf)
2489 {
2490         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2491         uint64_t hena;
2492         int ret;
2493
2494         ret = i40evf_set_rss_key(&vf->vsi, rss_conf->rss_key,
2495                                  rss_conf->rss_key_len);
2496         if (ret)
2497                 return ret;
2498
2499         hena = i40e_config_hena(vf->adapter, rss_conf->rss_hf);
2500         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
2501         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
2502         I40EVF_WRITE_FLUSH(hw);
2503
2504         return 0;
2505 }
2506
2507 static void
2508 i40evf_disable_rss(struct i40e_vf *vf)
2509 {
2510         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2511
2512         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), 0);
2513         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), 0);
2514         I40EVF_WRITE_FLUSH(hw);
2515 }
2516
2517 static int
2518 i40evf_config_rss(struct i40e_vf *vf)
2519 {
2520         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2521         struct rte_eth_rss_conf rss_conf;
2522         uint32_t i, j, lut = 0, nb_q = (I40E_VFQF_HLUT_MAX_INDEX + 1) * 4;
2523         uint16_t num;
2524
2525         if (vf->dev_data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
2526                 i40evf_disable_rss(vf);
2527                 PMD_DRV_LOG(DEBUG, "RSS not configured");
2528                 return 0;
2529         }
2530
2531         num = RTE_MIN(vf->dev_data->nb_rx_queues, I40E_MAX_QP_NUM_PER_VF);
2532         /* Fill out the look up table */
2533         for (i = 0, j = 0; i < nb_q; i++, j++) {
2534                 if (j >= num)
2535                         j = 0;
2536                 lut = (lut << 8) | j;
2537                 if ((i & 3) == 3)
2538                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
2539         }
2540
2541         rss_conf = vf->dev_data->dev_conf.rx_adv_conf.rss_conf;
2542         if ((rss_conf.rss_hf & vf->adapter->flow_types_mask) == 0) {
2543                 i40evf_disable_rss(vf);
2544                 PMD_DRV_LOG(DEBUG, "No hash flag is set");
2545                 return 0;
2546         }
2547
2548         if (rss_conf.rss_key == NULL || rss_conf.rss_key_len <
2549                 (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t)) {
2550                 /* Calculate the default hash key */
2551                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2552                         rss_key_default[i] = (uint32_t)rte_rand();
2553                 rss_conf.rss_key = (uint8_t *)rss_key_default;
2554                 rss_conf.rss_key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2555                         sizeof(uint32_t);
2556         }
2557
2558         return i40evf_hw_rss_hash_set(vf, &rss_conf);
2559 }
2560
2561 static int
2562 i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
2563                            struct rte_eth_rss_conf *rss_conf)
2564 {
2565         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2566         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2567         uint64_t rss_hf = rss_conf->rss_hf & vf->adapter->flow_types_mask;
2568         uint64_t hena;
2569
2570         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2571         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2572
2573         if (!(hena & vf->adapter->pctypes_mask)) { /* RSS disabled */
2574                 if (rss_hf != 0) /* Enable RSS */
2575                         return -EINVAL;
2576                 return 0;
2577         }
2578
2579         /* RSS enabled */
2580         if (rss_hf == 0) /* Disable RSS */
2581                 return -EINVAL;
2582
2583         return i40evf_hw_rss_hash_set(vf, rss_conf);
2584 }
2585
2586 static int
2587 i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
2588                              struct rte_eth_rss_conf *rss_conf)
2589 {
2590         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2591         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2592         uint64_t hena;
2593
2594         i40evf_get_rss_key(&vf->vsi, rss_conf->rss_key,
2595                            &rss_conf->rss_key_len);
2596
2597         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2598         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2599         rss_conf->rss_hf = i40e_parse_hena(vf->adapter, hena);
2600
2601         return 0;
2602 }
2603
2604 static int
2605 i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
2606 {
2607         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2608         struct rte_eth_dev_data *dev_data = vf->dev_data;
2609         uint32_t frame_size = mtu + I40E_ETH_OVERHEAD;
2610         int ret = 0;
2611
2612         /* check if mtu is within the allowed range */
2613         if ((mtu < ETHER_MIN_MTU) || (frame_size > I40E_FRAME_SIZE_MAX))
2614                 return -EINVAL;
2615
2616         /* mtu setting is forbidden if port is start */
2617         if (dev_data->dev_started) {
2618                 PMD_DRV_LOG(ERR, "port %d must be stopped before configuration",
2619                             dev_data->port_id);
2620                 return -EBUSY;
2621         }
2622
2623         if (frame_size > ETHER_MAX_LEN)
2624                 dev_data->dev_conf.rxmode.offloads |=
2625                         DEV_RX_OFFLOAD_JUMBO_FRAME;
2626         else
2627                 dev_data->dev_conf.rxmode.offloads &=
2628                         ~DEV_RX_OFFLOAD_JUMBO_FRAME;
2629         dev_data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
2630
2631         return ret;
2632 }
2633
2634 static int
2635 i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
2636                             struct ether_addr *mac_addr)
2637 {
2638         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2639         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2640
2641         if (!is_valid_assigned_ether_addr(mac_addr)) {
2642                 PMD_DRV_LOG(ERR, "Tried to set invalid MAC address.");
2643                 return -EINVAL;
2644         }
2645
2646         if (vf->flags & I40E_FLAG_VF_MAC_BY_PF)
2647                 return -EPERM;
2648
2649         i40evf_del_mac_addr_by_addr(dev, (struct ether_addr *)hw->mac.addr);
2650
2651         if (i40evf_add_mac_addr(dev, mac_addr, 0, 0) != 0)
2652                 return -EIO;
2653
2654         ether_addr_copy(mac_addr, (struct ether_addr *)hw->mac.addr);
2655         return 0;
2656 }
2657
2658 static int
2659 i40evf_add_del_mc_addr_list(struct rte_eth_dev *dev,
2660                         struct ether_addr *mc_addrs,
2661                         uint32_t mc_addrs_num, bool add)
2662 {
2663         struct virtchnl_ether_addr_list *list;
2664         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2665         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) +
2666                 (I40E_NUM_MACADDR_MAX * sizeof(struct virtchnl_ether_addr))];
2667         uint32_t i;
2668         int err;
2669         struct vf_cmd_info args;
2670
2671         if (mc_addrs == NULL || mc_addrs_num == 0)
2672                 return 0;
2673
2674         if (mc_addrs_num > I40E_NUM_MACADDR_MAX)
2675                 return -EINVAL;
2676
2677         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
2678         list->vsi_id = vf->vsi_res->vsi_id;
2679         list->num_elements = mc_addrs_num;
2680
2681         for (i = 0; i < mc_addrs_num; i++) {
2682                 if (!I40E_IS_MULTICAST(mc_addrs[i].addr_bytes)) {
2683                         PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
2684                                     mc_addrs[i].addr_bytes[0],
2685                                     mc_addrs[i].addr_bytes[1],
2686                                     mc_addrs[i].addr_bytes[2],
2687                                     mc_addrs[i].addr_bytes[3],
2688                                     mc_addrs[i].addr_bytes[4],
2689                                     mc_addrs[i].addr_bytes[5]);
2690                         return -EINVAL;
2691                 }
2692
2693                 memcpy(list->list[i].addr, mc_addrs[i].addr_bytes,
2694                         sizeof(list->list[i].addr));
2695         }
2696
2697         args.ops = add ? VIRTCHNL_OP_ADD_ETH_ADDR : VIRTCHNL_OP_DEL_ETH_ADDR;
2698         args.in_args = cmd_buffer;
2699         args.in_args_size = sizeof(struct virtchnl_ether_addr_list) +
2700                 i * sizeof(struct virtchnl_ether_addr);
2701         args.out_buffer = vf->aq_resp;
2702         args.out_size = I40E_AQ_BUF_SZ;
2703         err = i40evf_execute_vf_cmd(dev, &args);
2704         if (err) {
2705                 PMD_DRV_LOG(ERR, "fail to execute command %s",
2706                         add ? "OP_ADD_ETH_ADDR" : "OP_DEL_ETH_ADDR");
2707                 return err;
2708         }
2709
2710         return 0;
2711 }
2712
2713 static int
2714 i40evf_set_mc_addr_list(struct rte_eth_dev *dev, struct ether_addr *mc_addrs,
2715                         uint32_t mc_addrs_num)
2716 {
2717         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2718         int err;
2719
2720         /* flush previous addresses */
2721         err = i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2722                                 FALSE);
2723         if (err)
2724                 return err;
2725
2726         vf->mc_addrs_num = 0;
2727
2728         /* add new ones */
2729         err = i40evf_add_del_mc_addr_list(dev, mc_addrs, mc_addrs_num,
2730                                         TRUE);
2731         if (err)
2732                 return err;
2733
2734         vf->mc_addrs_num = mc_addrs_num;
2735         memcpy(vf->mc_addrs, mc_addrs, mc_addrs_num * sizeof(*mc_addrs));
2736
2737         return 0;
2738 }