drivers/net/i40e/i40e_ethdev_vf.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2010-2016 Intel Corporation
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdio.h>
   7 #include <errno.h>
   8 #include <stdint.h>
   9 #include <string.h>
  10 #include <unistd.h>
  11 #include <stdarg.h>
  12 #include <inttypes.h>
  13 #include <rte_byteorder.h>
  14 #include <rte_common.h>
  15 #include <rte_cycles.h>
  16
  17 #include <rte_interrupts.h>
  18 #include <rte_log.h>
  19 #include <rte_debug.h>
  20 #include <rte_pci.h>
  21 #include <rte_bus_pci.h>
  22 #include <rte_atomic.h>
  23 #include <rte_branch_prediction.h>
  24 #include <rte_memory.h>
  25 #include <rte_eal.h>
  26 #include <rte_alarm.h>
  27 #include <rte_ether.h>
  28 #include <ethdev_driver.h>
  29 #include <ethdev_pci.h>
  30 #include <rte_malloc.h>
  31 #include <rte_dev.h>
  32
  33 #include "i40e_logs.h"
  34 #include "base/i40e_prototype.h"
  35 #include "base/i40e_adminq_cmd.h"
  36 #include "base/i40e_type.h"
  37
  38 #include "i40e_rxtx.h"
  39 #include "i40e_ethdev.h"
  40 #include "i40e_pf.h"
  41
  42 /* busy wait delay in msec */
  43 #define I40EVF_BUSY_WAIT_DELAY 10
  44 #define I40EVF_BUSY_WAIT_COUNT 50
  45 #define MAX_RESET_WAIT_CNT     20
  46
  47 #define I40EVF_ALARM_INTERVAL 50000 /* us */
  48
  49 struct i40evf_arq_msg_info {
  50         enum virtchnl_ops ops;
  51         enum i40e_status_code result;
  52         uint16_t buf_len;
  53         uint16_t msg_len;
  54         uint8_t *msg;
  55 };
  56
  57 struct vf_cmd_info {
  58         enum virtchnl_ops ops;
  59         uint8_t *in_args;
  60         uint32_t in_args_size;
  61         uint8_t *out_buffer;
  62         /* Input & output type. pass in buffer size and pass out
  63          * actual return result
  64          */
  65         uint32_t out_size;
  66 };
  67
  68 enum i40evf_aq_result {
  69         I40EVF_MSG_ERR = -1, /* Meet error when accessing admin queue */
  70         I40EVF_MSG_NON,      /* Read nothing from admin queue */
  71         I40EVF_MSG_SYS,      /* Read system msg from admin queue */
  72         I40EVF_MSG_CMD,      /* Read async command result */
  73 };
  74
  75 static int i40evf_dev_configure(struct rte_eth_dev *dev);
  76 static int i40evf_dev_start(struct rte_eth_dev *dev);
  77 static int i40evf_dev_stop(struct rte_eth_dev *dev);
  78 static int i40evf_dev_info_get(struct rte_eth_dev *dev,
  79                                struct rte_eth_dev_info *dev_info);
  80 static int i40evf_dev_link_update(struct rte_eth_dev *dev,
  81                                   int wait_to_complete);
  82 static int i40evf_dev_stats_get(struct rte_eth_dev *dev,
  83                                 struct rte_eth_stats *stats);
  84 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
  85                                  struct rte_eth_xstat *xstats, unsigned n);
  86 static int i40evf_dev_xstats_get_names(struct rte_eth_dev *dev,
  87                                        struct rte_eth_xstat_name *xstats_names,
  88                                        unsigned limit);
  89 static int i40evf_dev_xstats_reset(struct rte_eth_dev *dev);
  90 static int i40evf_vlan_filter_set(struct rte_eth_dev *dev,
  91                                   uint16_t vlan_id, int on);
  92 static int i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask);
  93 static int i40evf_dev_close(struct rte_eth_dev *dev);
  94 static int i40evf_dev_reset(struct rte_eth_dev *dev);
  95 static int i40evf_check_vf_reset_done(struct rte_eth_dev *dev);
  96 static int i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev);
  97 static int i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev);
  98 static int i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev);
  99 static int i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev);
 100 static int i40evf_init_vlan(struct rte_eth_dev *dev);
 101 static int i40evf_dev_rx_queue_start(struct rte_eth_dev *dev,
 102                                      uint16_t rx_queue_id);
 103 static int i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev,
 104                                     uint16_t rx_queue_id);
 105 static int i40evf_dev_tx_queue_start(struct rte_eth_dev *dev,
 106                                      uint16_t tx_queue_id);
 107 static int i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev,
 108                                     uint16_t tx_queue_id);
 109 static int i40evf_add_mac_addr(struct rte_eth_dev *dev,
 110                                struct rte_ether_addr *addr,
 111                                uint32_t index,
 112                                uint32_t pool);
 113 static void i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index);
 114 static int i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
 115                         struct rte_eth_rss_reta_entry64 *reta_conf,
 116                         uint16_t reta_size);
 117 static int i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
 118                         struct rte_eth_rss_reta_entry64 *reta_conf,
 119                         uint16_t reta_size);
 120 static int i40evf_config_rss(struct i40e_vf *vf);
 121 static int i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
 122                                       struct rte_eth_rss_conf *rss_conf);
 123 static int i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
 124                                         struct rte_eth_rss_conf *rss_conf);
 125 static int i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
 126 static int i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
 127                                         struct rte_ether_addr *mac_addr);
 128 static int
 129 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id);
 130 static int
 131 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id);
 132 static void i40evf_handle_pf_event(struct rte_eth_dev *dev,
 133                                    uint8_t *msg,
 134                                    uint16_t msglen);
 135
 136 static int
 137 i40evf_add_del_mc_addr_list(struct rte_eth_dev *dev,
 138                         struct rte_ether_addr *mc_addr_set,
 139                         uint32_t nb_mc_addr, bool add);
 140 static int
 141 i40evf_set_mc_addr_list(struct rte_eth_dev *dev,
 142                         struct rte_ether_addr *mc_addr_set,
 143                         uint32_t nb_mc_addr);
 144 static void
 145 i40evf_dev_alarm_handler(void *param);
 146
 147 /* Default hash key buffer for RSS */
 148 static uint32_t rss_key_default[I40E_VFQF_HKEY_MAX_INDEX + 1];
 149
 150 struct rte_i40evf_xstats_name_off {
 151         char name[RTE_ETH_XSTATS_NAME_SIZE];
 152         unsigned offset;
 153 };
 154
 155 static const struct rte_i40evf_xstats_name_off rte_i40evf_stats_strings[] = {
 156         {"rx_bytes", offsetof(struct i40e_eth_stats, rx_bytes)},
 157         {"rx_unicast_packets", offsetof(struct i40e_eth_stats, rx_unicast)},
 158         {"rx_multicast_packets", offsetof(struct i40e_eth_stats, rx_multicast)},
 159         {"rx_broadcast_packets", offsetof(struct i40e_eth_stats, rx_broadcast)},
 160         {"rx_dropped_packets", offsetof(struct i40e_eth_stats, rx_discards)},
 161         {"rx_unknown_protocol_packets", offsetof(struct i40e_eth_stats,
 162                 rx_unknown_protocol)},
 163         {"tx_bytes", offsetof(struct i40e_eth_stats, tx_bytes)},
 164         {"tx_unicast_packets", offsetof(struct i40e_eth_stats, tx_unicast)},
 165         {"tx_multicast_packets", offsetof(struct i40e_eth_stats, tx_multicast)},
 166         {"tx_broadcast_packets", offsetof(struct i40e_eth_stats, tx_broadcast)},
 167         {"tx_dropped_packets", offsetof(struct i40e_eth_stats, tx_discards)},
 168         {"tx_error_packets", offsetof(struct i40e_eth_stats, tx_errors)},
 169 };
 170
 171 #define I40EVF_NB_XSTATS (sizeof(rte_i40evf_stats_strings) / \
 172                 sizeof(rte_i40evf_stats_strings[0]))
 173
 174 static const struct eth_dev_ops i40evf_eth_dev_ops = {
 175         .dev_configure        = i40evf_dev_configure,
 176         .dev_start            = i40evf_dev_start,
 177         .dev_stop             = i40evf_dev_stop,
 178         .promiscuous_enable   = i40evf_dev_promiscuous_enable,
 179         .promiscuous_disable  = i40evf_dev_promiscuous_disable,
 180         .allmulticast_enable  = i40evf_dev_allmulticast_enable,
 181         .allmulticast_disable = i40evf_dev_allmulticast_disable,
 182         .link_update          = i40evf_dev_link_update,
 183         .stats_get            = i40evf_dev_stats_get,
 184         .stats_reset          = i40evf_dev_xstats_reset,
 185         .xstats_get           = i40evf_dev_xstats_get,
 186         .xstats_get_names     = i40evf_dev_xstats_get_names,
 187         .xstats_reset         = i40evf_dev_xstats_reset,
 188         .dev_close            = i40evf_dev_close,
 189         .dev_reset            = i40evf_dev_reset,
 190         .dev_infos_get        = i40evf_dev_info_get,
 191         .dev_supported_ptypes_get = i40e_dev_supported_ptypes_get,
 192         .vlan_filter_set      = i40evf_vlan_filter_set,
 193         .vlan_offload_set     = i40evf_vlan_offload_set,
 194         .rx_queue_start       = i40evf_dev_rx_queue_start,
 195         .rx_queue_stop        = i40evf_dev_rx_queue_stop,
 196         .tx_queue_start       = i40evf_dev_tx_queue_start,
 197         .tx_queue_stop        = i40evf_dev_tx_queue_stop,
 198         .rx_queue_setup       = i40e_dev_rx_queue_setup,
 199         .rx_queue_release     = i40e_dev_rx_queue_release,
 200         .rx_queue_intr_enable = i40evf_dev_rx_queue_intr_enable,
 201         .rx_queue_intr_disable = i40evf_dev_rx_queue_intr_disable,
 202         .tx_queue_setup       = i40e_dev_tx_queue_setup,
 203         .tx_queue_release     = i40e_dev_tx_queue_release,
 204         .rxq_info_get         = i40e_rxq_info_get,
 205         .txq_info_get         = i40e_txq_info_get,
 206         .mac_addr_add         = i40evf_add_mac_addr,
 207         .mac_addr_remove      = i40evf_del_mac_addr,
 208         .set_mc_addr_list     = i40evf_set_mc_addr_list,
 209         .reta_update          = i40evf_dev_rss_reta_update,
 210         .reta_query           = i40evf_dev_rss_reta_query,
 211         .rss_hash_update      = i40evf_dev_rss_hash_update,
 212         .rss_hash_conf_get    = i40evf_dev_rss_hash_conf_get,
 213         .mtu_set              = i40evf_dev_mtu_set,
 214         .mac_addr_set         = i40evf_set_default_mac_addr,
 215         .tx_done_cleanup      = i40e_tx_done_cleanup,
 216 };
 217
 218 /*
 219  * Read data in admin queue to get msg from pf driver
 220  */
 221 static enum i40evf_aq_result
 222 i40evf_read_pfmsg(struct rte_eth_dev *dev, struct i40evf_arq_msg_info *data)
 223 {
 224         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 225         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 226         struct i40e_arq_event_info event;
 227         enum virtchnl_ops opcode;
 228         enum i40e_status_code retval;
 229         int ret;
 230         enum i40evf_aq_result result = I40EVF_MSG_NON;
 231
 232         event.buf_len = data->buf_len;
 233         event.msg_buf = data->msg;
 234         ret = i40e_clean_arq_element(hw, &event, NULL);
 235         /* Can't read any msg from adminQ */
 236         if (ret) {
 237                 if (ret != I40E_ERR_ADMIN_QUEUE_NO_WORK)
 238                         result = I40EVF_MSG_ERR;
 239                 return result;
 240         }
 241
 242         opcode = (enum virtchnl_ops)rte_le_to_cpu_32(event.desc.cookie_high);
 243         retval = (enum i40e_status_code)rte_le_to_cpu_32(event.desc.cookie_low);
 244         /* pf sys event */
 245         if (opcode == VIRTCHNL_OP_EVENT) {
 246                 struct virtchnl_pf_event *vpe =
 247                         (struct virtchnl_pf_event *)event.msg_buf;
 248
 249                 result = I40EVF_MSG_SYS;
 250                 switch (vpe->event) {
 251                 case VIRTCHNL_EVENT_LINK_CHANGE:
 252                         vf->link_up =
 253                                 vpe->event_data.link_event.link_status;
 254                         vf->link_speed =
 255                                 vpe->event_data.link_event.link_speed;
 256                         vf->pend_msg |= PFMSG_LINK_CHANGE;
 257                         PMD_DRV_LOG(INFO, "Link status update:%s",
 258                                     vf->link_up ? "up" : "down");
 259                         break;
 260                 case VIRTCHNL_EVENT_RESET_IMPENDING:
 261                         vf->vf_reset = true;
 262                         vf->pend_msg |= PFMSG_RESET_IMPENDING;
 263                         PMD_DRV_LOG(INFO, "VF is resetting");
 264                         break;
 265                 case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
 266                         vf->dev_closed = true;
 267                         vf->pend_msg |= PFMSG_DRIVER_CLOSE;
 268                         PMD_DRV_LOG(INFO, "PF driver closed");
 269                         break;
 270                 default:
 271                         PMD_DRV_LOG(ERR, "%s: Unknown event %d from pf",
 272                                     __func__, vpe->event);
 273                 }
 274         } else {
 275                 /* async reply msg on command issued by vf previously */
 276                 result = I40EVF_MSG_CMD;
 277                 /* Actual data length read from PF */
 278                 data->msg_len = event.msg_len;
 279         }
 280
 281         data->result = retval;
 282         data->ops = opcode;
 283
 284         return result;
 285 }
 286
 287 /**
 288  * clear current command. Only call in case execute
 289  * _atomic_set_cmd successfully.
 290  */
 291 static inline void
 292 _clear_cmd(struct i40e_vf *vf)
 293 {
 294         rte_wmb();
 295         vf->pend_cmd = VIRTCHNL_OP_UNKNOWN;
 296 }
 297
 298 /*
 299  * Check there is pending cmd in execution. If none, set new command.
 300  */
 301 static inline int
 302 _atomic_set_cmd(struct i40e_vf *vf, enum virtchnl_ops ops)
 303 {
 304         int ret = rte_atomic32_cmpset(&vf->pend_cmd,
 305                         VIRTCHNL_OP_UNKNOWN, ops);
 306
 307         if (!ret)
 308                 PMD_DRV_LOG(ERR, "There is incomplete cmd %d", vf->pend_cmd);
 309
 310         return !ret;
 311 }
 312
 313 #define MAX_TRY_TIMES 200
 314 #define ASQ_DELAY_MS  10
 315
 316 static int
 317 _i40evf_execute_vf_cmd(struct rte_eth_dev *dev, struct vf_cmd_info *args)
 318 {
 319         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 320         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 321         struct i40evf_arq_msg_info info;
 322         enum i40evf_aq_result ret;
 323         int err, i = 0;
 324
 325         if (_atomic_set_cmd(vf, args->ops))
 326                 return -1;
 327
 328         info.msg = args->out_buffer;
 329         info.buf_len = args->out_size;
 330         info.ops = VIRTCHNL_OP_UNKNOWN;
 331         info.result = I40E_SUCCESS;
 332
 333         err = i40e_aq_send_msg_to_pf(hw, args->ops, I40E_SUCCESS,
 334                      args->in_args, args->in_args_size, NULL);
 335         if (err) {
 336                 PMD_DRV_LOG(ERR, "fail to send cmd %d", args->ops);
 337                 _clear_cmd(vf);
 338                 return err;
 339         }
 340
 341         switch (args->ops) {
 342         case VIRTCHNL_OP_RESET_VF:
 343                 /*no need to process in this function */
 344                 err = 0;
 345                 break;
 346         case VIRTCHNL_OP_VERSION:
 347         case VIRTCHNL_OP_GET_VF_RESOURCES:
 348                 /* for init adminq commands, need to poll the response */
 349                 err = -1;
 350                 do {
 351                         ret = i40evf_read_pfmsg(dev, &info);
 352                         vf->cmd_retval = info.result;
 353                         if (ret == I40EVF_MSG_CMD) {
 354                                 err = 0;
 355                                 break;
 356                         } else if (ret == I40EVF_MSG_ERR)
 357                                 break;
 358                         rte_delay_ms(ASQ_DELAY_MS);
 359                         /* If don't read msg or read sys event, continue */
 360                 } while (i++ < MAX_TRY_TIMES);
 361                 _clear_cmd(vf);
 362                 break;
 363         case VIRTCHNL_OP_REQUEST_QUEUES:
 364                 /**
 365                  * ignore async reply, only wait for system message,
 366                  * vf_reset = true if get VIRTCHNL_EVENT_RESET_IMPENDING,
 367                  * if not, means request queues failed.
 368                  */
 369                 err = -1;
 370                 do {
 371                         ret = i40evf_read_pfmsg(dev, &info);
 372                         vf->cmd_retval = info.result;
 373                         if (ret == I40EVF_MSG_SYS && vf->vf_reset) {
 374                                 err = 0;
 375                                 break;
 376                         } else if (ret == I40EVF_MSG_ERR ||
 377                                            ret == I40EVF_MSG_CMD) {
 378                                 break;
 379                         }
 380                         rte_delay_ms(ASQ_DELAY_MS);
 381                         /* If don't read msg or read sys event, continue */
 382                 } while (i++ < MAX_TRY_TIMES);
 383                 _clear_cmd(vf);
 384                 break;
 385
 386         default:
 387                 /* for other adminq in running time, waiting the cmd done flag */
 388                 err = -1;
 389                 do {
 390                         if (vf->pend_cmd == VIRTCHNL_OP_UNKNOWN) {
 391                                 err = 0;
 392                                 break;
 393                         }
 394                         rte_delay_ms(ASQ_DELAY_MS);
 395                         /* If don't read msg or read sys event, continue */
 396                 } while (i++ < MAX_TRY_TIMES);
 397                 /* If there's no response is received, clear command */
 398                 if (i >= MAX_TRY_TIMES) {
 399                         PMD_DRV_LOG(WARNING, "No response for %d", args->ops);
 400                         _clear_cmd(vf);
 401                 }
 402                 break;
 403         }
 404
 405         return err | vf->cmd_retval;
 406 }
 407
 408 static int
 409 i40evf_execute_vf_cmd(struct rte_eth_dev *dev, struct vf_cmd_info *args)
 410 {
 411         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 412         int err;
 413
 414         while (!rte_spinlock_trylock(&vf->cmd_send_lock))
 415                 rte_delay_us_sleep(50);
 416         err = _i40evf_execute_vf_cmd(dev, args);
 417         rte_spinlock_unlock(&vf->cmd_send_lock);
 418         return err;
 419 }
 420
 421 /*
 422  * Check API version with sync wait until version read or fail from admin queue
 423  */
 424 static int
 425 i40evf_check_api_version(struct rte_eth_dev *dev)
 426 {
 427         struct virtchnl_version_info version, *pver;
 428         int err;
 429         struct vf_cmd_info args;
 430         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 431
 432         version.major = VIRTCHNL_VERSION_MAJOR;
 433         version.minor = VIRTCHNL_VERSION_MINOR;
 434
 435         args.ops = VIRTCHNL_OP_VERSION;
 436         args.in_args = (uint8_t *)&version;
 437         args.in_args_size = sizeof(version);
 438         args.out_buffer = vf->aq_resp;
 439         args.out_size = I40E_AQ_BUF_SZ;
 440
 441         err = i40evf_execute_vf_cmd(dev, &args);
 442         if (err) {
 443                 PMD_INIT_LOG(ERR, "fail to execute command OP_VERSION");
 444                 return err;
 445         }
 446
 447         pver = (struct virtchnl_version_info *)args.out_buffer;
 448         vf->version_major = pver->major;
 449         vf->version_minor = pver->minor;
 450         if ((vf->version_major == VIRTCHNL_VERSION_MAJOR) &&
 451                 (vf->version_minor <= VIRTCHNL_VERSION_MINOR))
 452                 PMD_DRV_LOG(INFO, "Peer is Linux PF host");
 453         else {
 454                 PMD_INIT_LOG(ERR, "PF/VF API version mismatch:(%u.%u)-(%u.%u)",
 455                                         vf->version_major, vf->version_minor,
 456                                                 VIRTCHNL_VERSION_MAJOR,
 457                                                 VIRTCHNL_VERSION_MINOR);
 458                 return -1;
 459         }
 460
 461         return 0;
 462 }
 463
 464 static int
 465 i40evf_get_vf_resource(struct rte_eth_dev *dev)
 466 {
 467         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 468         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 469         int err;
 470         struct vf_cmd_info args;
 471         uint32_t caps, len;
 472
 473         args.ops = VIRTCHNL_OP_GET_VF_RESOURCES;
 474         args.out_buffer = vf->aq_resp;
 475         args.out_size = I40E_AQ_BUF_SZ;
 476         if (PF_IS_V11(vf)) {
 477                 caps = VIRTCHNL_VF_OFFLOAD_L2 |
 478                        VIRTCHNL_VF_OFFLOAD_RSS_AQ |
 479                        VIRTCHNL_VF_OFFLOAD_RSS_REG |
 480                        VIRTCHNL_VF_OFFLOAD_VLAN |
 481                        VIRTCHNL_VF_OFFLOAD_RX_POLLING |
 482                        VIRTCHNL_VF_CAP_ADV_LINK_SPEED;
 483                 args.in_args = (uint8_t *)&caps;
 484                 args.in_args_size = sizeof(caps);
 485         } else {
 486                 args.in_args = NULL;
 487                 args.in_args_size = 0;
 488         }
 489         err = i40evf_execute_vf_cmd(dev, &args);
 490
 491         if (err) {
 492                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_VF_RESOURCE");
 493                 return err;
 494         }
 495
 496         len =  sizeof(struct virtchnl_vf_resource) +
 497                 I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource);
 498
 499         rte_memcpy(vf->vf_res, args.out_buffer,
 500                         RTE_MIN(args.out_size, len));
 501         i40e_vf_parse_hw_config(hw, vf->vf_res);
 502
 503         return 0;
 504 }
 505
 506 static int
 507 i40evf_config_promisc(struct rte_eth_dev *dev,
 508                       bool enable_unicast,
 509                       bool enable_multicast)
 510 {
 511         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 512         int err;
 513         struct vf_cmd_info args;
 514         struct virtchnl_promisc_info promisc;
 515
 516         promisc.flags = 0;
 517         promisc.vsi_id = vf->vsi_res->vsi_id;
 518
 519         if (enable_unicast)
 520                 promisc.flags |= FLAG_VF_UNICAST_PROMISC;
 521
 522         if (enable_multicast)
 523                 promisc.flags |= FLAG_VF_MULTICAST_PROMISC;
 524
 525         args.ops = VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE;
 526         args.in_args = (uint8_t *)&promisc;
 527         args.in_args_size = sizeof(promisc);
 528         args.out_buffer = vf->aq_resp;
 529         args.out_size = I40E_AQ_BUF_SZ;
 530
 531         err = i40evf_execute_vf_cmd(dev, &args);
 532
 533         if (err) {
 534                 PMD_DRV_LOG(ERR, "fail to execute command "
 535                             "CONFIG_PROMISCUOUS_MODE");
 536
 537                 if (err == I40E_NOT_SUPPORTED)
 538                         return -ENOTSUP;
 539
 540                 return -EAGAIN;
 541         }
 542
 543         vf->promisc_unicast_enabled = enable_unicast;
 544         vf->promisc_multicast_enabled = enable_multicast;
 545         return 0;
 546 }
 547
 548 static int
 549 i40evf_enable_vlan_strip(struct rte_eth_dev *dev)
 550 {
 551         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 552         struct vf_cmd_info args;
 553         int ret;
 554
 555         memset(&args, 0, sizeof(args));
 556         args.ops = VIRTCHNL_OP_ENABLE_VLAN_STRIPPING;
 557         args.in_args = NULL;
 558         args.in_args_size = 0;
 559         args.out_buffer = vf->aq_resp;
 560         args.out_size = I40E_AQ_BUF_SZ;
 561         ret = i40evf_execute_vf_cmd(dev, &args);
 562         if (ret)
 563                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 564                             "VIRTCHNL_OP_ENABLE_VLAN_STRIPPING");
 565
 566         return ret;
 567 }
 568
 569 static int
 570 i40evf_disable_vlan_strip(struct rte_eth_dev *dev)
 571 {
 572         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 573         struct vf_cmd_info args;
 574         int ret;
 575
 576         memset(&args, 0, sizeof(args));
 577         args.ops = VIRTCHNL_OP_DISABLE_VLAN_STRIPPING;
 578         args.in_args = NULL;
 579         args.in_args_size = 0;
 580         args.out_buffer = vf->aq_resp;
 581         args.out_size = I40E_AQ_BUF_SZ;
 582         ret = i40evf_execute_vf_cmd(dev, &args);
 583         if (ret)
 584                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 585                             "VIRTCHNL_OP_DISABLE_VLAN_STRIPPING");
 586
 587         return ret;
 588 }
 589
 590 static void
 591 i40evf_fill_virtchnl_vsi_txq_info(struct virtchnl_txq_info *txq_info,
 592                                   uint16_t vsi_id,
 593                                   uint16_t queue_id,
 594                                   uint16_t nb_txq,
 595                                   struct i40e_tx_queue *txq)
 596 {
 597         txq_info->vsi_id = vsi_id;
 598         txq_info->queue_id = queue_id;
 599         if (queue_id < nb_txq && txq) {
 600                 txq_info->ring_len = txq->nb_tx_desc;
 601                 txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
 602         }
 603 }
 604
 605 static void
 606 i40evf_fill_virtchnl_vsi_rxq_info(struct virtchnl_rxq_info *rxq_info,
 607                                   uint16_t vsi_id,
 608                                   uint16_t queue_id,
 609                                   uint16_t nb_rxq,
 610                                   uint32_t max_pkt_size,
 611                                   struct i40e_rx_queue *rxq)
 612 {
 613         rxq_info->vsi_id = vsi_id;
 614         rxq_info->queue_id = queue_id;
 615         rxq_info->max_pkt_size = max_pkt_size;
 616         if (queue_id < nb_rxq && rxq) {
 617                 rxq_info->ring_len = rxq->nb_rx_desc;
 618                 rxq_info->dma_ring_addr = rxq->rx_ring_phys_addr;
 619                 rxq_info->databuffer_size =
 620                         (rte_pktmbuf_data_room_size(rxq->mp) -
 621                                 RTE_PKTMBUF_HEADROOM);
 622         }
 623 }
 624
 625 static int
 626 i40evf_configure_vsi_queues(struct rte_eth_dev *dev)
 627 {
 628         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 629         struct i40e_rx_queue **rxq =
 630                 (struct i40e_rx_queue **)dev->data->rx_queues;
 631         struct i40e_tx_queue **txq =
 632                 (struct i40e_tx_queue **)dev->data->tx_queues;
 633         struct virtchnl_vsi_queue_config_info *vc_vqci;
 634         struct virtchnl_queue_pair_info *vc_qpi;
 635         struct vf_cmd_info args;
 636         uint16_t i, nb_qp = vf->num_queue_pairs;
 637         const uint32_t size =
 638                 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqci, nb_qp);
 639         uint8_t buff[size];
 640         int ret;
 641
 642         memset(buff, 0, sizeof(buff));
 643         vc_vqci = (struct virtchnl_vsi_queue_config_info *)buff;
 644         vc_vqci->vsi_id = vf->vsi_res->vsi_id;
 645         vc_vqci->num_queue_pairs = nb_qp;
 646
 647         for (i = 0, vc_qpi = vc_vqci->qpair; i < nb_qp; i++, vc_qpi++) {
 648                 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpi->txq,
 649                         vc_vqci->vsi_id, i, dev->data->nb_tx_queues,
 650                         txq ? txq[i] : NULL);
 651                 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpi->rxq,
 652                         vc_vqci->vsi_id, i, dev->data->nb_rx_queues,
 653                         vf->max_pkt_len, rxq ? rxq[i] : NULL);
 654         }
 655         memset(&args, 0, sizeof(args));
 656         args.ops = VIRTCHNL_OP_CONFIG_VSI_QUEUES;
 657         args.in_args = (uint8_t *)vc_vqci;
 658         args.in_args_size = size;
 659         args.out_buffer = vf->aq_resp;
 660         args.out_size = I40E_AQ_BUF_SZ;
 661         ret = i40evf_execute_vf_cmd(dev, &args);
 662         if (ret)
 663                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 664                         "VIRTCHNL_OP_CONFIG_VSI_QUEUES");
 665
 666         return ret;
 667 }
 668
 669 static int
 670 i40evf_config_irq_map(struct rte_eth_dev *dev)
 671 {
 672         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 673         struct vf_cmd_info args;
 674         uint8_t *cmd_buffer = NULL;
 675         struct virtchnl_irq_map_info *map_info;
 676         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
 677         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 678         uint32_t vec, cmd_buffer_size, max_vectors, nb_msix, msix_base, i;
 679         uint16_t rxq_map[vf->vf_res->max_vectors];
 680         int err;
 681
 682         memset(rxq_map, 0, sizeof(rxq_map));
 683         if (dev->data->dev_conf.intr_conf.rxq != 0 &&
 684                 rte_intr_allow_others(intr_handle)) {
 685                 msix_base = I40E_RX_VEC_START;
 686                 /* For interrupt mode, available vector id is from 1. */
 687                 max_vectors = vf->vf_res->max_vectors - 1;
 688                 nb_msix = RTE_MIN(max_vectors, intr_handle->nb_efd);
 689
 690                 vec = msix_base;
 691                 for (i = 0; i < dev->data->nb_rx_queues; i++) {
 692                         rxq_map[vec] |= 1 << i;
 693                         intr_handle->intr_vec[i] = vec++;
 694                         if (vec >= vf->vf_res->max_vectors)
 695                                 vec = msix_base;
 696                 }
 697         } else {
 698                 msix_base = I40E_MISC_VEC_ID;
 699                 nb_msix = 1;
 700
 701                 for (i = 0; i < dev->data->nb_rx_queues; i++) {
 702                         rxq_map[msix_base] |= 1 << i;
 703                         if (rte_intr_dp_is_en(intr_handle))
 704                                 intr_handle->intr_vec[i] = msix_base;
 705                 }
 706         }
 707
 708         cmd_buffer_size = sizeof(struct virtchnl_irq_map_info) +
 709                         sizeof(struct virtchnl_vector_map) * nb_msix;
 710         cmd_buffer = rte_zmalloc("i40e", cmd_buffer_size, 0);
 711         if (!cmd_buffer) {
 712                 PMD_DRV_LOG(ERR, "Failed to allocate memory");
 713                 return I40E_ERR_NO_MEMORY;
 714         }
 715
 716         map_info = (struct virtchnl_irq_map_info *)cmd_buffer;
 717         map_info->num_vectors = nb_msix;
 718         for (i = 0; i < nb_msix; i++) {
 719                 map_info->vecmap[i].rxitr_idx = I40E_ITR_INDEX_DEFAULT;
 720                 map_info->vecmap[i].vsi_id = vf->vsi_res->vsi_id;
 721                 map_info->vecmap[i].vector_id = msix_base + i;
 722                 map_info->vecmap[i].txq_map = 0;
 723                 map_info->vecmap[i].rxq_map = rxq_map[msix_base + i];
 724         }
 725
 726         args.ops = VIRTCHNL_OP_CONFIG_IRQ_MAP;
 727         args.in_args = (u8 *)cmd_buffer;
 728         args.in_args_size = cmd_buffer_size;
 729         args.out_buffer = vf->aq_resp;
 730         args.out_size = I40E_AQ_BUF_SZ;
 731         err = i40evf_execute_vf_cmd(dev, &args);
 732         if (err)
 733                 PMD_DRV_LOG(ERR, "fail to execute command OP_ENABLE_QUEUES");
 734
 735         rte_free(cmd_buffer);
 736
 737         return err;
 738 }
 739
 740 static int
 741 i40evf_switch_queue(struct rte_eth_dev *dev, bool isrx, uint16_t qid,
 742                                 bool on)
 743 {
 744         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 745         struct virtchnl_queue_select queue_select;
 746         int err;
 747         struct vf_cmd_info args;
 748         memset(&queue_select, 0, sizeof(queue_select));
 749         queue_select.vsi_id = vf->vsi_res->vsi_id;
 750
 751         if (isrx)
 752                 queue_select.rx_queues |= 1 << qid;
 753         else
 754                 queue_select.tx_queues |= 1 << qid;
 755
 756         if (on)
 757                 args.ops = VIRTCHNL_OP_ENABLE_QUEUES;
 758         else
 759                 args.ops = VIRTCHNL_OP_DISABLE_QUEUES;
 760         args.in_args = (u8 *)&queue_select;
 761         args.in_args_size = sizeof(queue_select);
 762         args.out_buffer = vf->aq_resp;
 763         args.out_size = I40E_AQ_BUF_SZ;
 764         err = i40evf_execute_vf_cmd(dev, &args);
 765         if (err)
 766                 PMD_DRV_LOG(ERR, "fail to switch %s %u %s",
 767                             isrx ? "RX" : "TX", qid, on ? "on" : "off");
 768
 769         return err;
 770 }
 771
 772 static int
 773 i40evf_start_queues(struct rte_eth_dev *dev)
 774 {
 775         struct rte_eth_dev_data *dev_data = dev->data;
 776         int i;
 777         struct i40e_rx_queue *rxq;
 778         struct i40e_tx_queue *txq;
 779
 780         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 781                 rxq = dev_data->rx_queues[i];
 782                 if (rxq->rx_deferred_start)
 783                         continue;
 784                 if (i40evf_dev_rx_queue_start(dev, i) != 0) {
 785                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 786                         return -1;
 787                 }
 788         }
 789
 790         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 791                 txq = dev_data->tx_queues[i];
 792                 if (txq->tx_deferred_start)
 793                         continue;
 794                 if (i40evf_dev_tx_queue_start(dev, i) != 0) {
 795                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 796                         return -1;
 797                 }
 798         }
 799
 800         return 0;
 801 }
 802
 803 static int
 804 i40evf_stop_queues(struct rte_eth_dev *dev)
 805 {
 806         int i;
 807
 808         /* Stop TX queues first */
 809         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 810                 if (i40evf_dev_tx_queue_stop(dev, i) != 0) {
 811                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 812                 }
 813         }
 814
 815         /* Then stop RX queues */
 816         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 817                 if (i40evf_dev_rx_queue_stop(dev, i) != 0) {
 818                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 819                 }
 820         }
 821
 822         return 0;
 823 }
 824
 825 static int
 826 i40evf_add_mac_addr(struct rte_eth_dev *dev,
 827                     struct rte_ether_addr *addr,
 828                     __rte_unused uint32_t index,
 829                     __rte_unused uint32_t pool)
 830 {
 831         struct virtchnl_ether_addr_list *list;
 832         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 833         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 834                         sizeof(struct virtchnl_ether_addr)];
 835         int err;
 836         struct vf_cmd_info args;
 837
 838         if (rte_is_zero_ether_addr(addr)) {
 839                 PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
 840                             addr->addr_bytes[0], addr->addr_bytes[1],
 841                             addr->addr_bytes[2], addr->addr_bytes[3],
 842                             addr->addr_bytes[4], addr->addr_bytes[5]);
 843                 return I40E_ERR_INVALID_MAC_ADDR;
 844         }
 845
 846         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 847         list->vsi_id = vf->vsi_res->vsi_id;
 848         list->num_elements = 1;
 849         rte_memcpy(list->list[0].addr, addr->addr_bytes,
 850                                         sizeof(addr->addr_bytes));
 851
 852         args.ops = VIRTCHNL_OP_ADD_ETH_ADDR;
 853         args.in_args = cmd_buffer;
 854         args.in_args_size = sizeof(cmd_buffer);
 855         args.out_buffer = vf->aq_resp;
 856         args.out_size = I40E_AQ_BUF_SZ;
 857         err = i40evf_execute_vf_cmd(dev, &args);
 858         if (err)
 859                 PMD_DRV_LOG(ERR, "fail to execute command "
 860                             "OP_ADD_ETHER_ADDRESS");
 861         else
 862                 vf->vsi.mac_num++;
 863
 864         return err;
 865 }
 866
 867 static void
 868 i40evf_del_mac_addr_by_addr(struct rte_eth_dev *dev,
 869                             struct rte_ether_addr *addr)
 870 {
 871         struct virtchnl_ether_addr_list *list;
 872         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 873         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 874                         sizeof(struct virtchnl_ether_addr)];
 875         int err;
 876         struct vf_cmd_info args;
 877
 878         if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
 879                 PMD_DRV_LOG(ERR, "Invalid mac:%x-%x-%x-%x-%x-%x",
 880                             addr->addr_bytes[0], addr->addr_bytes[1],
 881                             addr->addr_bytes[2], addr->addr_bytes[3],
 882                             addr->addr_bytes[4], addr->addr_bytes[5]);
 883                 return;
 884         }
 885
 886         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 887         list->vsi_id = vf->vsi_res->vsi_id;
 888         list->num_elements = 1;
 889         rte_memcpy(list->list[0].addr, addr->addr_bytes,
 890                         sizeof(addr->addr_bytes));
 891
 892         args.ops = VIRTCHNL_OP_DEL_ETH_ADDR;
 893         args.in_args = cmd_buffer;
 894         args.in_args_size = sizeof(cmd_buffer);
 895         args.out_buffer = vf->aq_resp;
 896         args.out_size = I40E_AQ_BUF_SZ;
 897         err = i40evf_execute_vf_cmd(dev, &args);
 898         if (err)
 899                 PMD_DRV_LOG(ERR, "fail to execute command "
 900                             "OP_DEL_ETHER_ADDRESS");
 901         else
 902                 vf->vsi.mac_num--;
 903         return;
 904 }
 905
 906 static void
 907 i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index)
 908 {
 909         struct rte_eth_dev_data *data = dev->data;
 910         struct rte_ether_addr *addr;
 911
 912         addr = &data->mac_addrs[index];
 913
 914         i40evf_del_mac_addr_by_addr(dev, addr);
 915 }
 916
 917 static int
 918 i40evf_query_stats(struct rte_eth_dev *dev, struct i40e_eth_stats **pstats)
 919 {
 920         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 921         struct virtchnl_queue_select q_stats;
 922         int err;
 923         struct vf_cmd_info args;
 924
 925         memset(&q_stats, 0, sizeof(q_stats));
 926         q_stats.vsi_id = vf->vsi_res->vsi_id;
 927         args.ops = VIRTCHNL_OP_GET_STATS;
 928         args.in_args = (u8 *)&q_stats;
 929         args.in_args_size = sizeof(q_stats);
 930         args.out_buffer = vf->aq_resp;
 931         args.out_size = I40E_AQ_BUF_SZ;
 932
 933         err = i40evf_execute_vf_cmd(dev, &args);
 934         if (err) {
 935                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_STATS");
 936                 *pstats = NULL;
 937                 return err;
 938         }
 939         *pstats = (struct i40e_eth_stats *)args.out_buffer;
 940         return 0;
 941 }
 942
 943 static void
 944 i40evf_stat_update_48(uint64_t *offset,
 945                    uint64_t *stat)
 946 {
 947         if (*stat >= *offset)
 948                 *stat = *stat - *offset;
 949         else
 950                 *stat = (uint64_t)((*stat +
 951                         ((uint64_t)1 << I40E_48_BIT_WIDTH)) - *offset);
 952
 953         *stat &= I40E_48_BIT_MASK;
 954 }
 955
 956 static void
 957 i40evf_stat_update_32(uint64_t *offset,
 958                    uint64_t *stat)
 959 {
 960         if (*stat >= *offset)
 961                 *stat = (uint64_t)(*stat - *offset);
 962         else
 963                 *stat = (uint64_t)((*stat +
 964                         ((uint64_t)1 << I40E_32_BIT_WIDTH)) - *offset);
 965 }
 966
 967 static void
 968 i40evf_update_stats(struct i40e_vsi *vsi,
 969                                         struct i40e_eth_stats *nes)
 970 {
 971         struct i40e_eth_stats *oes = &vsi->eth_stats_offset;
 972
 973         i40evf_stat_update_48(&oes->rx_bytes,
 974                             &nes->rx_bytes);
 975         i40evf_stat_update_48(&oes->rx_unicast,
 976                             &nes->rx_unicast);
 977         i40evf_stat_update_48(&oes->rx_multicast,
 978                             &nes->rx_multicast);
 979         i40evf_stat_update_48(&oes->rx_broadcast,
 980                             &nes->rx_broadcast);
 981         i40evf_stat_update_32(&oes->rx_discards,
 982                                 &nes->rx_discards);
 983         i40evf_stat_update_32(&oes->rx_unknown_protocol,
 984                             &nes->rx_unknown_protocol);
 985         i40evf_stat_update_48(&oes->tx_bytes,
 986                             &nes->tx_bytes);
 987         i40evf_stat_update_48(&oes->tx_unicast,
 988                             &nes->tx_unicast);
 989         i40evf_stat_update_48(&oes->tx_multicast,
 990                             &nes->tx_multicast);
 991         i40evf_stat_update_48(&oes->tx_broadcast,
 992                             &nes->tx_broadcast);
 993         i40evf_stat_update_32(&oes->tx_errors, &nes->tx_errors);
 994         i40evf_stat_update_32(&oes->tx_discards, &nes->tx_discards);
 995 }
 996
 997 static int
 998 i40evf_dev_xstats_reset(struct rte_eth_dev *dev)
 999 {
1000         int ret;
1001         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1002         struct i40e_eth_stats *pstats = NULL;
1003
1004         /* read stat values to clear hardware registers */
1005         ret = i40evf_query_stats(dev, &pstats);
1006
1007         /* set stats offset base on current values */
1008         if (ret == 0)
1009                 vf->vsi.eth_stats_offset = *pstats;
1010
1011         return ret;
1012 }
1013
1014 static int i40evf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
1015                                       struct rte_eth_xstat_name *xstats_names,
1016                                       __rte_unused unsigned limit)
1017 {
1018         unsigned i;
1019
1020         if (xstats_names != NULL)
1021                 for (i = 0; i < I40EVF_NB_XSTATS; i++) {
1022                         snprintf(xstats_names[i].name,
1023                                 sizeof(xstats_names[i].name),
1024                                 "%s", rte_i40evf_stats_strings[i].name);
1025                 }
1026         return I40EVF_NB_XSTATS;
1027 }
1028
1029 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
1030                                  struct rte_eth_xstat *xstats, unsigned n)
1031 {
1032         int ret;
1033         unsigned i;
1034         struct i40e_eth_stats *pstats = NULL;
1035         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1036         struct i40e_vsi *vsi = &vf->vsi;
1037
1038         if (n < I40EVF_NB_XSTATS)
1039                 return I40EVF_NB_XSTATS;
1040
1041         ret = i40evf_query_stats(dev, &pstats);
1042         if (ret != 0)
1043                 return 0;
1044
1045         if (!xstats)
1046                 return 0;
1047
1048         i40evf_update_stats(vsi, pstats);
1049
1050         /* loop over xstats array and values from pstats */
1051         for (i = 0; i < I40EVF_NB_XSTATS; i++) {
1052                 xstats[i].id = i;
1053                 xstats[i].value = *(uint64_t *)(((char *)pstats) +
1054                         rte_i40evf_stats_strings[i].offset);
1055         }
1056
1057         return I40EVF_NB_XSTATS;
1058 }
1059
1060 static int
1061 i40evf_add_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1062 {
1063         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1064         struct virtchnl_vlan_filter_list *vlan_list;
1065         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
1066                                                         sizeof(uint16_t)];
1067         int err;
1068         struct vf_cmd_info args;
1069
1070         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
1071         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1072         vlan_list->num_elements = 1;
1073         vlan_list->vlan_id[0] = vlanid;
1074
1075         args.ops = VIRTCHNL_OP_ADD_VLAN;
1076         args.in_args = (u8 *)&cmd_buffer;
1077         args.in_args_size = sizeof(cmd_buffer);
1078         args.out_buffer = vf->aq_resp;
1079         args.out_size = I40E_AQ_BUF_SZ;
1080         err = i40evf_execute_vf_cmd(dev, &args);
1081         if (err) {
1082                 PMD_DRV_LOG(ERR, "fail to execute command OP_ADD_VLAN");
1083                 return err;
1084         }
1085         /**
1086          * In linux kernel driver on receiving ADD_VLAN it enables
1087          * VLAN_STRIP by default. So reconfigure the vlan_offload
1088          * as it was done by the app earlier.
1089          */
1090         err = i40evf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
1091         if (err)
1092                 PMD_DRV_LOG(ERR, "fail to set vlan_strip");
1093
1094         return err;
1095 }
1096
1097 static int
1098 i40evf_request_queues(struct rte_eth_dev *dev, uint16_t num)
1099 {
1100         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1101         struct virtchnl_vf_res_request vfres;
1102         struct vf_cmd_info args;
1103         int err;
1104
1105         vfres.num_queue_pairs = num;
1106
1107         args.ops = VIRTCHNL_OP_REQUEST_QUEUES;
1108         args.in_args = (u8 *)&vfres;
1109         args.in_args_size = sizeof(vfres);
1110         args.out_buffer = vf->aq_resp;
1111         args.out_size = I40E_AQ_BUF_SZ;
1112
1113         rte_eal_alarm_cancel(i40evf_dev_alarm_handler, dev);
1114
1115         err = i40evf_execute_vf_cmd(dev, &args);
1116
1117         rte_eal_alarm_set(I40EVF_ALARM_INTERVAL, i40evf_dev_alarm_handler, dev);
1118
1119         if (err != I40E_SUCCESS) {
1120                 PMD_DRV_LOG(ERR, "fail to execute command OP_REQUEST_QUEUES");
1121                 return err;
1122         }
1123
1124         /* The PF will issue a reset to the VF when change the number of
1125          * queues. The PF will set I40E_VFGEN_RSTAT to COMPLETE first, then
1126          * wait 10ms and set it to ACTIVE. In this duration, vf may not catch
1127          * the moment that COMPLETE is set. So, for vf, we'll try to wait a
1128          * long time.
1129          */
1130         rte_delay_ms(100);
1131
1132         err = i40evf_check_vf_reset_done(dev);
1133         if (err)
1134                 PMD_DRV_LOG(ERR, "VF is still resetting");
1135
1136         return err;
1137 }
1138
1139 static int
1140 i40evf_del_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1141 {
1142         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1143         struct virtchnl_vlan_filter_list *vlan_list;
1144         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
1145                                                         sizeof(uint16_t)];
1146         int err;
1147         struct vf_cmd_info args;
1148
1149         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
1150         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1151         vlan_list->num_elements = 1;
1152         vlan_list->vlan_id[0] = vlanid;
1153
1154         args.ops = VIRTCHNL_OP_DEL_VLAN;
1155         args.in_args = (u8 *)&cmd_buffer;
1156         args.in_args_size = sizeof(cmd_buffer);
1157         args.out_buffer = vf->aq_resp;
1158         args.out_size = I40E_AQ_BUF_SZ;
1159         err = i40evf_execute_vf_cmd(dev, &args);
1160         if (err)
1161                 PMD_DRV_LOG(ERR, "fail to execute command OP_DEL_VLAN");
1162
1163         return err;
1164 }
1165
1166 static const struct rte_pci_id pci_id_i40evf_map[] = {
1167         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF) },
1168         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF_HV) },
1169         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_A0_VF) },
1170         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_VF) },
1171         { .vendor_id = 0, /* sentinel */ },
1172 };
1173
1174 /* Disable IRQ0 */
1175 static inline void
1176 i40evf_disable_irq0(struct i40e_hw *hw)
1177 {
1178         /* Disable all interrupt types */
1179         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, 0);
1180         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1181                        I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1182         I40EVF_WRITE_FLUSH(hw);
1183 }
1184
1185 /* Enable IRQ0 */
1186 static inline void
1187 i40evf_enable_irq0(struct i40e_hw *hw)
1188 {
1189         /* Enable admin queue interrupt trigger */
1190         uint32_t val;
1191
1192         i40evf_disable_irq0(hw);
1193         val = I40E_READ_REG(hw, I40E_VFINT_ICR0_ENA1);
1194         val |= I40E_VFINT_ICR0_ENA1_ADMINQ_MASK |
1195                 I40E_VFINT_ICR0_ENA1_LINK_STAT_CHANGE_MASK;
1196         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, val);
1197
1198         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1199                 I40E_VFINT_DYN_CTL01_INTENA_MASK |
1200                 I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1201                 I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1202
1203         I40EVF_WRITE_FLUSH(hw);
1204 }
1205
1206 static int
1207 i40evf_check_vf_reset_done(struct rte_eth_dev *dev)
1208 {
1209         int i, reset;
1210         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1211         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1212
1213         for (i = 0; i < MAX_RESET_WAIT_CNT; i++) {
1214                 reset = I40E_READ_REG(hw, I40E_VFGEN_RSTAT) &
1215                         I40E_VFGEN_RSTAT_VFR_STATE_MASK;
1216                 reset = reset >> I40E_VFGEN_RSTAT_VFR_STATE_SHIFT;
1217                 if (reset == VIRTCHNL_VFR_VFACTIVE ||
1218                     reset == VIRTCHNL_VFR_COMPLETED)
1219                         break;
1220                 rte_delay_ms(50);
1221         }
1222
1223         if (i >= MAX_RESET_WAIT_CNT)
1224                 return -1;
1225
1226         vf->vf_reset = false;
1227         vf->pend_msg &= ~PFMSG_RESET_IMPENDING;
1228
1229         return 0;
1230 }
1231 static int
1232 i40evf_reset_vf(struct rte_eth_dev *dev)
1233 {
1234         int ret;
1235         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1236
1237         if (i40e_vf_reset(hw) != I40E_SUCCESS) {
1238                 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1239                 return -1;
1240         }
1241         /**
1242           * After issuing vf reset command to pf, pf won't necessarily
1243           * reset vf, it depends on what state it exactly is. If it's not
1244           * initialized yet, it won't have vf reset since it's in a certain
1245           * state. If not, it will try to reset. Even vf is reset, pf will
1246           * set I40E_VFGEN_RSTAT to COMPLETE first, then wait 10ms and set
1247           * it to ACTIVE. In this duration, vf may not catch the moment that
1248           * COMPLETE is set. So, for vf, we'll try to wait a long time.
1249           */
1250         rte_delay_ms(200);
1251
1252         ret = i40evf_check_vf_reset_done(dev);
1253         if (ret) {
1254                 PMD_INIT_LOG(ERR, "VF is still resetting");
1255                 return ret;
1256         }
1257
1258         return 0;
1259 }
1260
1261 static int
1262 i40evf_init_vf(struct rte_eth_dev *dev)
1263 {
1264         int i, err, bufsz;
1265         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1266         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1267         uint16_t interval =
1268                 i40e_calc_itr_interval(0, 0);
1269
1270         vf->adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1271         vf->dev_data = dev->data;
1272         rte_spinlock_init(&vf->cmd_send_lock);
1273         err = i40e_set_mac_type(hw);
1274         if (err) {
1275                 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err);
1276                 goto err;
1277         }
1278
1279         err = i40evf_check_vf_reset_done(dev);
1280         if (err)
1281                 goto err;
1282
1283         i40e_init_adminq_parameter(hw);
1284         err = i40e_init_adminq(hw);
1285         if (err) {
1286                 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err);
1287                 goto err;
1288         }
1289
1290         /* Reset VF and wait until it's complete */
1291         if (i40evf_reset_vf(dev)) {
1292                 PMD_INIT_LOG(ERR, "reset NIC failed");
1293                 goto err_aq;
1294         }
1295
1296         /* VF reset, shutdown admin queue and initialize again */
1297         if (i40e_shutdown_adminq(hw) != I40E_SUCCESS) {
1298                 PMD_INIT_LOG(ERR, "i40e_shutdown_adminq failed");
1299                 goto err;
1300         }
1301
1302         i40e_init_adminq_parameter(hw);
1303         if (i40e_init_adminq(hw) != I40E_SUCCESS) {
1304                 PMD_INIT_LOG(ERR, "init_adminq failed");
1305                 goto err;
1306         }
1307
1308         vf->aq_resp = rte_zmalloc("vf_aq_resp", I40E_AQ_BUF_SZ, 0);
1309         if (!vf->aq_resp) {
1310                 PMD_INIT_LOG(ERR, "unable to allocate vf_aq_resp memory");
1311                 goto err_aq;
1312         }
1313         if (i40evf_check_api_version(dev) != 0) {
1314                 PMD_INIT_LOG(ERR, "check_api version failed");
1315                 goto err_api;
1316         }
1317         bufsz = sizeof(struct virtchnl_vf_resource) +
1318                 (I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource));
1319         vf->vf_res = rte_zmalloc("vf_res", bufsz, 0);
1320         if (!vf->vf_res) {
1321                 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory");
1322                 goto err_api;
1323         }
1324
1325         if (i40evf_get_vf_resource(dev) != 0) {
1326                 PMD_INIT_LOG(ERR, "i40evf_get_vf_config failed");
1327                 goto err_alloc;
1328         }
1329
1330         /* got VF config message back from PF, now we can parse it */
1331         for (i = 0; i < vf->vf_res->num_vsis; i++) {
1332                 if (vf->vf_res->vsi_res[i].vsi_type == VIRTCHNL_VSI_SRIOV)
1333                         vf->vsi_res = &vf->vf_res->vsi_res[i];
1334         }
1335
1336         if (!vf->vsi_res) {
1337                 PMD_INIT_LOG(ERR, "no LAN VSI found");
1338                 goto err_alloc;
1339         }
1340
1341         if (hw->mac.type == I40E_MAC_X722_VF)
1342                 vf->flags = I40E_FLAG_RSS_AQ_CAPABLE;
1343         vf->vsi.vsi_id = vf->vsi_res->vsi_id;
1344
1345         switch (vf->vsi_res->vsi_type) {
1346         case VIRTCHNL_VSI_SRIOV:
1347                 vf->vsi.type = I40E_VSI_SRIOV;
1348                 break;
1349         default:
1350                 vf->vsi.type = I40E_VSI_TYPE_UNKNOWN;
1351                 break;
1352         }
1353         vf->vsi.nb_qps = vf->vsi_res->num_queue_pairs;
1354         vf->vsi.adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1355
1356         /* Store the MAC address configured by host, or generate random one */
1357         if (!rte_is_valid_assigned_ether_addr(
1358                         (struct rte_ether_addr *)hw->mac.addr))
1359                 rte_eth_random_addr(hw->mac.addr); /* Generate a random one */
1360
1361         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1362                        (I40E_ITR_INDEX_DEFAULT <<
1363                         I40E_VFINT_DYN_CTL0_ITR_INDX_SHIFT) |
1364                        (interval <<
1365                         I40E_VFINT_DYN_CTL0_INTERVAL_SHIFT));
1366         I40EVF_WRITE_FLUSH(hw);
1367
1368         return 0;
1369
1370 err_alloc:
1371         rte_free(vf->vf_res);
1372         vf->vsi_res = NULL;
1373 err_api:
1374         rte_free(vf->aq_resp);
1375 err_aq:
1376         i40e_shutdown_adminq(hw); /* ignore error */
1377 err:
1378         return -1;
1379 }
1380
1381 static int
1382 i40evf_uninit_vf(struct rte_eth_dev *dev)
1383 {
1384         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1385
1386         PMD_INIT_FUNC_TRACE();
1387
1388         if (hw->adapter_closed == 0)
1389                 i40evf_dev_close(dev);
1390
1391         return 0;
1392 }
1393
1394 static void
1395 i40evf_handle_pf_event(struct rte_eth_dev *dev, uint8_t *msg,
1396                 __rte_unused uint16_t msglen)
1397 {
1398         struct virtchnl_pf_event *pf_msg =
1399                         (struct virtchnl_pf_event *)msg;
1400         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1401
1402         switch (pf_msg->event) {
1403         case VIRTCHNL_EVENT_RESET_IMPENDING:
1404                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_RESET_IMPENDING event");
1405                 rte_eth_dev_callback_process(dev,
1406                                 RTE_ETH_EVENT_INTR_RESET, NULL);
1407                 break;
1408         case VIRTCHNL_EVENT_LINK_CHANGE:
1409                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_LINK_CHANGE event");
1410
1411                 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_CAP_ADV_LINK_SPEED) {
1412                         vf->link_up =
1413                                 pf_msg->event_data.link_event_adv.link_status;
1414
1415                         switch (pf_msg->event_data.link_event_adv.link_speed) {
1416                         case ETH_SPEED_NUM_100M:
1417                                 vf->link_speed = VIRTCHNL_LINK_SPEED_100MB;
1418                                 break;
1419                         case ETH_SPEED_NUM_1G:
1420                                 vf->link_speed = VIRTCHNL_LINK_SPEED_1GB;
1421                                 break;
1422                         case ETH_SPEED_NUM_2_5G:
1423                                 vf->link_speed = VIRTCHNL_LINK_SPEED_2_5GB;
1424                                 break;
1425                         case ETH_SPEED_NUM_5G:
1426                                 vf->link_speed = VIRTCHNL_LINK_SPEED_5GB;
1427                                 break;
1428                         case ETH_SPEED_NUM_10G:
1429                                 vf->link_speed = VIRTCHNL_LINK_SPEED_10GB;
1430                                 break;
1431                         case ETH_SPEED_NUM_20G:
1432                                 vf->link_speed = VIRTCHNL_LINK_SPEED_20GB;
1433                                 break;
1434                         case ETH_SPEED_NUM_25G:
1435                                 vf->link_speed = VIRTCHNL_LINK_SPEED_25GB;
1436                                 break;
1437                         case ETH_SPEED_NUM_40G:
1438                                 vf->link_speed = VIRTCHNL_LINK_SPEED_40GB;
1439                                 break;
1440                         default:
1441                                 vf->link_speed = VIRTCHNL_LINK_SPEED_UNKNOWN;
1442                                 break;
1443                         }
1444                 } else {
1445                         vf->link_up =
1446                                 pf_msg->event_data.link_event.link_status;
1447                         vf->link_speed =
1448                                 pf_msg->event_data.link_event.link_speed;
1449                 }
1450
1451                 i40evf_dev_link_update(dev, 0);
1452                 rte_eth_dev_callback_process(dev,
1453                                 RTE_ETH_EVENT_INTR_LSC, NULL);
1454                 break;
1455         case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
1456                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_PF_DRIVER_CLOSE event");
1457                 break;
1458         default:
1459                 PMD_DRV_LOG(ERR, " unknown event received %u", pf_msg->event);
1460                 break;
1461         }
1462 }
1463
1464 static void
1465 i40evf_handle_aq_msg(struct rte_eth_dev *dev)
1466 {
1467         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1468         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1469         struct i40e_arq_event_info info;
1470         uint16_t pending, aq_opc;
1471         enum virtchnl_ops msg_opc;
1472         enum i40e_status_code msg_ret;
1473         int ret;
1474
1475         info.buf_len = I40E_AQ_BUF_SZ;
1476         if (!vf->aq_resp) {
1477                 PMD_DRV_LOG(ERR, "Buffer for adminq resp should not be NULL");
1478                 return;
1479         }
1480         info.msg_buf = vf->aq_resp;
1481
1482         pending = 1;
1483         while (pending) {
1484                 ret = i40e_clean_arq_element(hw, &info, &pending);
1485
1486                 if (ret != I40E_SUCCESS) {
1487                         PMD_DRV_LOG(INFO, "Failed to read msg from AdminQ,"
1488                                     "ret: %d", ret);
1489                         break;
1490                 }
1491                 aq_opc = rte_le_to_cpu_16(info.desc.opcode);
1492                 /* For the message sent from pf to vf, opcode is stored in
1493                  * cookie_high of struct i40e_aq_desc, while return error code
1494                  * are stored in cookie_low, Which is done by
1495                  * i40e_aq_send_msg_to_vf in PF driver.*/
1496                 msg_opc = (enum virtchnl_ops)rte_le_to_cpu_32(
1497                                                   info.desc.cookie_high);
1498                 msg_ret = (enum i40e_status_code)rte_le_to_cpu_32(
1499                                                   info.desc.cookie_low);
1500                 switch (aq_opc) {
1501                 case i40e_aqc_opc_send_msg_to_vf:
1502                         if (msg_opc == VIRTCHNL_OP_EVENT)
1503                                 /* process event*/
1504                                 i40evf_handle_pf_event(dev, info.msg_buf,
1505                                                        info.msg_len);
1506                         else {
1507                                 /* read message and it's expected one */
1508                                 if ((volatile uint32_t)msg_opc ==
1509                                     vf->pend_cmd) {
1510                                         vf->cmd_retval = msg_ret;
1511                                         /* prevent compiler reordering */
1512                                         rte_compiler_barrier();
1513                                         _clear_cmd(vf);
1514                                 } else
1515                                         PMD_DRV_LOG(ERR, "command mismatch,"
1516                                                 "expect %u, get %u",
1517                                                 vf->pend_cmd, msg_opc);
1518                                 PMD_DRV_LOG(DEBUG, "adminq response is received,"
1519                                              " opcode = %d", msg_opc);
1520                         }
1521                         break;
1522                 default:
1523                         PMD_DRV_LOG(DEBUG, "Request %u is not supported yet",
1524                                     aq_opc);
1525                         break;
1526                 }
1527         }
1528 }
1529
1530 /**
1531  * Interrupt handler triggered by NIC  for handling
1532  * specific interrupt. Only adminq interrupt is processed in VF.
1533  *
1534  * @param handle
1535  *  Pointer to interrupt handle.
1536  * @param param
1537  *  The address of parameter (struct rte_eth_dev *) regsitered before.
1538  *
1539  * @return
1540  *  void
1541  */
1542 static void
1543 i40evf_dev_alarm_handler(void *param)
1544 {
1545         struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
1546         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1547         uint32_t icr0;
1548
1549         i40evf_disable_irq0(hw);
1550
1551         /* read out interrupt causes */
1552         icr0 = I40E_READ_REG(hw, I40E_VFINT_ICR01);
1553
1554         /* No interrupt event indicated */
1555         if (!(icr0 & I40E_VFINT_ICR01_INTEVENT_MASK))
1556                 goto done;
1557
1558         if (icr0 & I40E_VFINT_ICR01_ADMINQ_MASK) {
1559                 PMD_DRV_LOG(DEBUG, "ICR01_ADMINQ is reported");
1560                 i40evf_handle_aq_msg(dev);
1561         }
1562
1563         /* Link Status Change interrupt */
1564         if (icr0 & I40E_VFINT_ICR01_LINK_STAT_CHANGE_MASK)
1565                 PMD_DRV_LOG(DEBUG, "LINK_STAT_CHANGE is reported,"
1566                                    " do nothing");
1567
1568 done:
1569         i40evf_enable_irq0(hw);
1570         rte_eal_alarm_set(I40EVF_ALARM_INTERVAL,
1571                           i40evf_dev_alarm_handler, dev);
1572 }
1573
1574 static int
1575 i40evf_dev_init(struct rte_eth_dev *eth_dev)
1576 {
1577         struct i40e_hw *hw
1578                 = I40E_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
1579         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1580
1581         PMD_INIT_FUNC_TRACE();
1582
1583         /* assign ops func pointer */
1584         eth_dev->dev_ops = &i40evf_eth_dev_ops;
1585         eth_dev->rx_queue_count       = i40e_dev_rx_queue_count;
1586         eth_dev->rx_descriptor_done   = i40e_dev_rx_descriptor_done;
1587         eth_dev->rx_descriptor_status = i40e_dev_rx_descriptor_status;
1588         eth_dev->tx_descriptor_status = i40e_dev_tx_descriptor_status;
1589         eth_dev->rx_pkt_burst = &i40e_recv_pkts;
1590         eth_dev->tx_pkt_burst = &i40e_xmit_pkts;
1591
1592         /*
1593          * For secondary processes, we don't initialise any further as primary
1594          * has already done this work.
1595          */
1596         if (rte_eal_process_type() != RTE_PROC_PRIMARY){
1597                 i40e_set_rx_function(eth_dev);
1598                 i40e_set_tx_function(eth_dev);
1599                 return 0;
1600         }
1601         i40e_set_default_ptype_table(eth_dev);
1602         rte_eth_copy_pci_info(eth_dev, pci_dev);
1603         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1604
1605         hw->vendor_id = pci_dev->id.vendor_id;
1606         hw->device_id = pci_dev->id.device_id;
1607         hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
1608         hw->subsystem_device_id = pci_dev->id.subsystem_device_id;
1609         hw->bus.device = pci_dev->addr.devid;
1610         hw->bus.func = pci_dev->addr.function;
1611         hw->hw_addr = (void *)pci_dev->mem_resource[0].addr;
1612         hw->adapter_stopped = 1;
1613         hw->adapter_closed = 0;
1614
1615         if(i40evf_init_vf(eth_dev) != 0) {
1616                 PMD_INIT_LOG(ERR, "Init vf failed");
1617                 return -1;
1618         }
1619
1620         i40e_set_default_pctype_table(eth_dev);
1621         rte_eal_alarm_set(I40EVF_ALARM_INTERVAL,
1622                           i40evf_dev_alarm_handler, eth_dev);
1623
1624         /* configure and enable device interrupt */
1625         i40evf_enable_irq0(hw);
1626
1627         /* copy mac addr */
1628         eth_dev->data->mac_addrs = rte_zmalloc("i40evf_mac",
1629                                 RTE_ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX,
1630                                 0);
1631         if (eth_dev->data->mac_addrs == NULL) {
1632                 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to"
1633                                 " store MAC addresses",
1634                                 RTE_ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX);
1635                 return -ENOMEM;
1636         }
1637         rte_ether_addr_copy((struct rte_ether_addr *)hw->mac.addr,
1638                         &eth_dev->data->mac_addrs[0]);
1639
1640         return 0;
1641 }
1642
1643 static int
1644 i40evf_dev_uninit(struct rte_eth_dev *eth_dev)
1645 {
1646         PMD_INIT_FUNC_TRACE();
1647
1648         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1649                 return -EPERM;
1650
1651         if (i40evf_uninit_vf(eth_dev) != 0) {
1652                 PMD_INIT_LOG(ERR, "i40evf_uninit_vf failed");
1653                 return -1;
1654         }
1655
1656         return 0;
1657 }
1658
1659 static int eth_i40evf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1660         struct rte_pci_device *pci_dev)
1661 {
1662         return rte_eth_dev_pci_generic_probe(pci_dev,
1663                 sizeof(struct i40e_adapter), i40evf_dev_init);
1664 }
1665
1666 static int eth_i40evf_pci_remove(struct rte_pci_device *pci_dev)
1667 {
1668         return rte_eth_dev_pci_generic_remove(pci_dev, i40evf_dev_uninit);
1669 }
1670
1671 /*
1672  * virtual function driver struct
1673  */
1674 static struct rte_pci_driver rte_i40evf_pmd = {
1675         .id_table = pci_id_i40evf_map,
1676         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
1677         .probe = eth_i40evf_pci_probe,
1678         .remove = eth_i40evf_pci_remove,
1679 };
1680
1681 RTE_PMD_REGISTER_PCI(net_i40e_vf, rte_i40evf_pmd);
1682 RTE_PMD_REGISTER_PCI_TABLE(net_i40e_vf, pci_id_i40evf_map);
1683 RTE_PMD_REGISTER_KMOD_DEP(net_i40e_vf, "* igb_uio | vfio-pci");
1684
1685 static int
1686 i40evf_dev_configure(struct rte_eth_dev *dev)
1687 {
1688         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1689         struct i40e_adapter *ad =
1690                 I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1691         uint16_t num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
1692                                 dev->data->nb_tx_queues);
1693
1694         /* Initialize to TRUE. If any of Rx queues doesn't meet the bulk
1695          * allocation or vector Rx preconditions we will reset it.
1696          */
1697         ad->rx_bulk_alloc_allowed = true;
1698         ad->rx_vec_allowed = true;
1699         ad->tx_simple_allowed = true;
1700         ad->tx_vec_allowed = true;
1701
1702         dev->data->dev_conf.intr_conf.lsc =
1703                 !!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC);
1704
1705         if (num_queue_pairs > vf->vsi_res->num_queue_pairs) {
1706                 struct i40e_hw *hw;
1707                 int ret;
1708
1709                 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1710                         PMD_DRV_LOG(ERR,
1711                                     "For secondary processes, change queue pairs is not supported!");
1712                         return -ENOTSUP;
1713                 }
1714
1715                 hw  = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1716                 if (!hw->adapter_stopped) {
1717                         PMD_DRV_LOG(ERR, "Device must be stopped first!");
1718                         return -EBUSY;
1719                 }
1720
1721                 PMD_DRV_LOG(INFO, "change queue pairs from %u to %u",
1722                             vf->vsi_res->num_queue_pairs, num_queue_pairs);
1723                 ret = i40evf_request_queues(dev, num_queue_pairs);
1724                 if (ret != 0)
1725                         return ret;
1726
1727                 ret = i40evf_dev_reset(dev);
1728                 if (ret != 0)
1729                         return ret;
1730         }
1731
1732         return i40evf_init_vlan(dev);
1733 }
1734
1735 static int
1736 i40evf_init_vlan(struct rte_eth_dev *dev)
1737 {
1738         /* Apply vlan offload setting */
1739         i40evf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
1740
1741         return 0;
1742 }
1743
1744 static int
1745 i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1746 {
1747         struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1748         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1749
1750         if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN))
1751                 return -ENOTSUP;
1752
1753         /* Vlan stripping setting */
1754         if (mask & ETH_VLAN_STRIP_MASK) {
1755                 /* Enable or disable VLAN stripping */
1756                 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
1757                         i40evf_enable_vlan_strip(dev);
1758                 else
1759                         i40evf_disable_vlan_strip(dev);
1760         }
1761
1762         return 0;
1763 }
1764
1765 static int
1766 i40evf_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1767 {
1768         struct i40e_rx_queue *rxq;
1769         int err;
1770         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1771
1772         PMD_INIT_FUNC_TRACE();
1773
1774         rxq = dev->data->rx_queues[rx_queue_id];
1775
1776         err = i40e_alloc_rx_queue_mbufs(rxq);
1777         if (err) {
1778                 PMD_DRV_LOG(ERR, "Failed to allocate RX queue mbuf");
1779                 return err;
1780         }
1781
1782         rte_wmb();
1783
1784         /* Init the RX tail register. */
1785         I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1786         I40EVF_WRITE_FLUSH(hw);
1787
1788         /* Ready to switch the queue on */
1789         err = i40evf_switch_queue(dev, TRUE, rx_queue_id, TRUE);
1790         if (err) {
1791                 PMD_DRV_LOG(ERR, "Failed to switch RX queue %u on",
1792                             rx_queue_id);
1793                 return err;
1794         }
1795         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1796
1797         return 0;
1798 }
1799
1800 static int
1801 i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1802 {
1803         struct i40e_rx_queue *rxq;
1804         int err;
1805
1806         rxq = dev->data->rx_queues[rx_queue_id];
1807
1808         err = i40evf_switch_queue(dev, TRUE, rx_queue_id, FALSE);
1809         if (err) {
1810                 PMD_DRV_LOG(ERR, "Failed to switch RX queue %u off",
1811                             rx_queue_id);
1812                 return err;
1813         }
1814
1815         i40e_rx_queue_release_mbufs(rxq);
1816         i40e_reset_rx_queue(rxq);
1817         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1818
1819         return 0;
1820 }
1821
1822 static int
1823 i40evf_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1824 {
1825         int err;
1826
1827         PMD_INIT_FUNC_TRACE();
1828
1829         /* Ready to switch the queue on */
1830         err = i40evf_switch_queue(dev, FALSE, tx_queue_id, TRUE);
1831         if (err) {
1832                 PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on",
1833                             tx_queue_id);
1834                 return err;
1835         }
1836         dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1837
1838         return 0;
1839 }
1840
1841 static int
1842 i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1843 {
1844         struct i40e_tx_queue *txq;
1845         int err;
1846
1847         txq = dev->data->tx_queues[tx_queue_id];
1848
1849         err = i40evf_switch_queue(dev, FALSE, tx_queue_id, FALSE);
1850         if (err) {
1851                 PMD_DRV_LOG(ERR, "Failed to switch TX queue %u off",
1852                             tx_queue_id);
1853                 return err;
1854         }
1855
1856         i40e_tx_queue_release_mbufs(txq);
1857         i40e_reset_tx_queue(txq);
1858         dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1859
1860         return 0;
1861 }
1862
1863 static int
1864 i40evf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1865 {
1866         int ret;
1867
1868         if (on)
1869                 ret = i40evf_add_vlan(dev, vlan_id);
1870         else
1871                 ret = i40evf_del_vlan(dev,vlan_id);
1872
1873         return ret;
1874 }
1875
1876 static int
1877 i40evf_rxq_init(struct rte_eth_dev *dev, struct i40e_rx_queue *rxq)
1878 {
1879         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1880         struct rte_eth_dev_data *dev_data = dev->data;
1881         struct rte_pktmbuf_pool_private *mbp_priv;
1882         uint16_t buf_size, len;
1883
1884         rxq->qrx_tail = hw->hw_addr + I40E_QRX_TAIL1(rxq->queue_id);
1885         I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1886         I40EVF_WRITE_FLUSH(hw);
1887
1888         /* Calculate the maximum packet length allowed */
1889         mbp_priv = rte_mempool_get_priv(rxq->mp);
1890         buf_size = (uint16_t)(mbp_priv->mbuf_data_room_size -
1891                                         RTE_PKTMBUF_HEADROOM);
1892         rxq->hs_mode = i40e_header_split_none;
1893         rxq->rx_hdr_len = 0;
1894         rxq->rx_buf_len = RTE_ALIGN(buf_size, (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
1895         len = rxq->rx_buf_len * I40E_MAX_CHAINED_RX_BUFFERS;
1896         rxq->max_pkt_len = RTE_MIN(len,
1897                 dev_data->dev_conf.rxmode.max_rx_pkt_len);
1898
1899         /**
1900          * Check if the jumbo frame and maximum packet length are set correctly
1901          */
1902         if (dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1903                 if (rxq->max_pkt_len <= I40E_ETH_MAX_LEN ||
1904                     rxq->max_pkt_len > I40E_FRAME_SIZE_MAX) {
1905                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1906                                 "larger than %u and smaller than %u, as jumbo "
1907                                 "frame is enabled", (uint32_t)I40E_ETH_MAX_LEN,
1908                                         (uint32_t)I40E_FRAME_SIZE_MAX);
1909                         return I40E_ERR_CONFIG;
1910                 }
1911         } else {
1912                 if (rxq->max_pkt_len < RTE_ETHER_MIN_LEN ||
1913                     rxq->max_pkt_len > I40E_ETH_MAX_LEN) {
1914                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1915                                 "larger than %u and smaller than %u, as jumbo "
1916                                 "frame is disabled",
1917                                 (uint32_t)RTE_ETHER_MIN_LEN,
1918                                 (uint32_t)I40E_ETH_MAX_LEN);
1919                         return I40E_ERR_CONFIG;
1920                 }
1921         }
1922
1923         if ((dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_SCATTER) ||
1924             rxq->max_pkt_len > buf_size)
1925                 dev_data->scattered_rx = 1;
1926
1927         return 0;
1928 }
1929
1930 static int
1931 i40evf_rx_init(struct rte_eth_dev *dev)
1932 {
1933         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1934         uint16_t i;
1935         int ret = I40E_SUCCESS;
1936         struct i40e_rx_queue **rxq =
1937                 (struct i40e_rx_queue **)dev->data->rx_queues;
1938
1939         i40evf_config_rss(vf);
1940         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1941                 if (!rxq[i] || !rxq[i]->q_set)
1942                         continue;
1943                 ret = i40evf_rxq_init(dev, rxq[i]);
1944                 if (ret != I40E_SUCCESS)
1945                         break;
1946         }
1947         if (ret == I40E_SUCCESS)
1948                 i40e_set_rx_function(dev);
1949
1950         return ret;
1951 }
1952
1953 static void
1954 i40evf_tx_init(struct rte_eth_dev *dev)
1955 {
1956         uint16_t i;
1957         struct i40e_tx_queue **txq =
1958                 (struct i40e_tx_queue **)dev->data->tx_queues;
1959         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1960
1961         for (i = 0; i < dev->data->nb_tx_queues; i++)
1962                 txq[i]->qtx_tail = hw->hw_addr + I40E_QTX_TAIL1(i);
1963
1964         i40e_set_tx_function(dev);
1965 }
1966
1967 static inline void
1968 i40evf_enable_queues_intr(struct rte_eth_dev *dev)
1969 {
1970         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1971         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1972         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1973
1974         if (!rte_intr_allow_others(intr_handle)) {
1975                 I40E_WRITE_REG(hw,
1976                                I40E_VFINT_DYN_CTL01,
1977                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1978                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1979                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1980                 I40EVF_WRITE_FLUSH(hw);
1981                 return;
1982         }
1983
1984         I40EVF_WRITE_FLUSH(hw);
1985 }
1986
1987 static inline void
1988 i40evf_disable_queues_intr(struct rte_eth_dev *dev)
1989 {
1990         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1991         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1992         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1993
1994         if (!rte_intr_allow_others(intr_handle)) {
1995                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1996                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1997                 I40EVF_WRITE_FLUSH(hw);
1998                 return;
1999         }
2000
2001         I40EVF_WRITE_FLUSH(hw);
2002 }
2003
2004 static int
2005 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
2006 {
2007         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2008         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2009         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2010         uint16_t interval =
2011                 i40e_calc_itr_interval(0, 0);
2012         uint16_t msix_intr;
2013
2014         msix_intr = intr_handle->intr_vec[queue_id];
2015         if (msix_intr == I40E_MISC_VEC_ID)
2016                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
2017                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
2018                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
2019                                (0 << I40E_VFINT_DYN_CTL01_ITR_INDX_SHIFT) |
2020                                (interval <<
2021                                 I40E_VFINT_DYN_CTL01_INTERVAL_SHIFT));
2022         else
2023                 I40E_WRITE_REG(hw,
2024                                I40E_VFINT_DYN_CTLN1(msix_intr -
2025                                                     I40E_RX_VEC_START),
2026                                I40E_VFINT_DYN_CTLN1_INTENA_MASK |
2027                                I40E_VFINT_DYN_CTLN1_CLEARPBA_MASK |
2028                                (0 << I40E_VFINT_DYN_CTLN1_ITR_INDX_SHIFT) |
2029                                (interval <<
2030                                 I40E_VFINT_DYN_CTLN1_INTERVAL_SHIFT));
2031
2032         I40EVF_WRITE_FLUSH(hw);
2033
2034         return 0;
2035 }
2036
2037 static int
2038 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
2039 {
2040         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2041         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2042         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2043         uint16_t msix_intr;
2044
2045         msix_intr = intr_handle->intr_vec[queue_id];
2046         if (msix_intr == I40E_MISC_VEC_ID)
2047                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01, 0);
2048         else
2049                 I40E_WRITE_REG(hw,
2050                                I40E_VFINT_DYN_CTLN1(msix_intr -
2051                                                     I40E_RX_VEC_START),
2052                                0);
2053
2054         I40EVF_WRITE_FLUSH(hw);
2055
2056         return 0;
2057 }
2058
2059 static void
2060 i40evf_add_del_all_mac_addr(struct rte_eth_dev *dev, bool add)
2061 {
2062         struct virtchnl_ether_addr_list *list;
2063         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2064         int err, i, j;
2065         int next_begin = 0;
2066         int begin = 0;
2067         uint32_t len;
2068         struct rte_ether_addr *addr;
2069         struct vf_cmd_info args;
2070
2071         do {
2072                 j = 0;
2073                 len = sizeof(struct virtchnl_ether_addr_list);
2074                 for (i = begin; i < I40E_NUM_MACADDR_MAX; i++, next_begin++) {
2075                         if (rte_is_zero_ether_addr(&dev->data->mac_addrs[i]))
2076                                 continue;
2077                         len += sizeof(struct virtchnl_ether_addr);
2078                         if (len >= I40E_AQ_BUF_SZ) {
2079                                 next_begin = i + 1;
2080                                 break;
2081                         }
2082                 }
2083
2084                 list = rte_zmalloc("i40evf_del_mac_buffer", len, 0);
2085                 if (!list) {
2086                         PMD_DRV_LOG(ERR, "fail to allocate memory");
2087                         return;
2088                 }
2089
2090                 for (i = begin; i < next_begin; i++) {
2091                         addr = &dev->data->mac_addrs[i];
2092                         if (rte_is_zero_ether_addr(addr))
2093                                 continue;
2094                         rte_memcpy(list->list[j].addr, addr->addr_bytes,
2095                                          sizeof(addr->addr_bytes));
2096                         PMD_DRV_LOG(DEBUG, "add/rm mac:%x:%x:%x:%x:%x:%x",
2097                                     addr->addr_bytes[0], addr->addr_bytes[1],
2098                                     addr->addr_bytes[2], addr->addr_bytes[3],
2099                                     addr->addr_bytes[4], addr->addr_bytes[5]);
2100                         j++;
2101                 }
2102                 list->vsi_id = vf->vsi_res->vsi_id;
2103                 list->num_elements = j;
2104                 args.ops = add ? VIRTCHNL_OP_ADD_ETH_ADDR :
2105                            VIRTCHNL_OP_DEL_ETH_ADDR;
2106                 args.in_args = (uint8_t *)list;
2107                 args.in_args_size = len;
2108                 args.out_buffer = vf->aq_resp;
2109                 args.out_size = I40E_AQ_BUF_SZ;
2110                 err = i40evf_execute_vf_cmd(dev, &args);
2111                 if (err) {
2112                         PMD_DRV_LOG(ERR, "fail to execute command %s",
2113                                     add ? "OP_ADD_ETHER_ADDRESS" :
2114                                     "OP_DEL_ETHER_ADDRESS");
2115                 } else {
2116                         if (add)
2117                                 vf->vsi.mac_num++;
2118                         else
2119                                 vf->vsi.mac_num--;
2120                 }
2121                 rte_free(list);
2122                 begin = next_begin;
2123         } while (begin < I40E_NUM_MACADDR_MAX);
2124 }
2125
2126 static int
2127 i40evf_dev_start(struct rte_eth_dev *dev)
2128 {
2129         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2130         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2131         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2132         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2133         uint32_t intr_vector = 0;
2134
2135         PMD_INIT_FUNC_TRACE();
2136
2137         hw->adapter_stopped = 0;
2138
2139         vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
2140         vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
2141                                         dev->data->nb_tx_queues);
2142
2143         /* check and configure queue intr-vector mapping */
2144         if (rte_intr_cap_multiple(intr_handle) &&
2145             dev->data->dev_conf.intr_conf.rxq) {
2146                 intr_vector = dev->data->nb_rx_queues;
2147                 if (rte_intr_efd_enable(intr_handle, intr_vector))
2148                         return -1;
2149         }
2150
2151         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
2152                 intr_handle->intr_vec =
2153                         rte_zmalloc("intr_vec",
2154                                     dev->data->nb_rx_queues * sizeof(int), 0);
2155                 if (!intr_handle->intr_vec) {
2156                         PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
2157                                      " intr_vec", dev->data->nb_rx_queues);
2158                         return -ENOMEM;
2159                 }
2160         }
2161
2162         if (i40evf_rx_init(dev) != 0){
2163                 PMD_DRV_LOG(ERR, "failed to do RX init");
2164                 return -1;
2165         }
2166
2167         i40evf_tx_init(dev);
2168
2169         if (i40evf_configure_vsi_queues(dev) != 0) {
2170                 PMD_DRV_LOG(ERR, "configure queues failed");
2171                 goto err_queue;
2172         }
2173         if (i40evf_config_irq_map(dev)) {
2174                 PMD_DRV_LOG(ERR, "config_irq_map failed");
2175                 goto err_queue;
2176         }
2177
2178         /* Set all mac addrs */
2179         i40evf_add_del_all_mac_addr(dev, TRUE);
2180         /* Set all multicast addresses */
2181         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2182                                 TRUE);
2183
2184         if (i40evf_start_queues(dev) != 0) {
2185                 PMD_DRV_LOG(ERR, "enable queues failed");
2186                 goto err_mac;
2187         }
2188
2189         /* only enable interrupt in rx interrupt mode */
2190         if (dev->data->dev_conf.intr_conf.rxq != 0)
2191                 rte_intr_enable(intr_handle);
2192
2193         i40evf_enable_queues_intr(dev);
2194
2195         return 0;
2196
2197 err_mac:
2198         i40evf_add_del_all_mac_addr(dev, FALSE);
2199         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2200                                 FALSE);
2201 err_queue:
2202         return -1;
2203 }
2204
2205 static int
2206 i40evf_dev_stop(struct rte_eth_dev *dev)
2207 {
2208         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2209         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2210         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2211         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2212
2213         PMD_INIT_FUNC_TRACE();
2214
2215         if (dev->data->dev_conf.intr_conf.rxq != 0)
2216                 rte_intr_disable(intr_handle);
2217
2218         if (hw->adapter_stopped == 1)
2219                 return 0;
2220         i40evf_stop_queues(dev);
2221         i40evf_disable_queues_intr(dev);
2222         i40e_dev_clear_queues(dev);
2223
2224         /* Clean datapath event and queue/vec mapping */
2225         rte_intr_efd_disable(intr_handle);
2226         if (intr_handle->intr_vec) {
2227                 rte_free(intr_handle->intr_vec);
2228                 intr_handle->intr_vec = NULL;
2229         }
2230         /* remove all mac addrs */
2231         i40evf_add_del_all_mac_addr(dev, FALSE);
2232         /* remove all multicast addresses */
2233         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2234                                 FALSE);
2235         hw->adapter_stopped = 1;
2236         dev->data->dev_started = 0;
2237
2238         return 0;
2239 }
2240
2241 static int
2242 i40evf_dev_link_update(struct rte_eth_dev *dev,
2243                        __rte_unused int wait_to_complete)
2244 {
2245         struct rte_eth_link new_link;
2246         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2247         /*
2248          * DPDK pf host provide interfacet to acquire link status
2249          * while Linux driver does not
2250          */
2251
2252         memset(&new_link, 0, sizeof(new_link));
2253         /* Linux driver PF host */
2254         switch (vf->link_speed) {
2255         case I40E_LINK_SPEED_100MB:
2256                 new_link.link_speed = ETH_SPEED_NUM_100M;
2257                 break;
2258         case I40E_LINK_SPEED_1GB:
2259                 new_link.link_speed = ETH_SPEED_NUM_1G;
2260                 break;
2261         case I40E_LINK_SPEED_10GB:
2262                 new_link.link_speed = ETH_SPEED_NUM_10G;
2263                 break;
2264         case I40E_LINK_SPEED_20GB:
2265                 new_link.link_speed = ETH_SPEED_NUM_20G;
2266                 break;
2267         case I40E_LINK_SPEED_25GB:
2268                 new_link.link_speed = ETH_SPEED_NUM_25G;
2269                 break;
2270         case I40E_LINK_SPEED_40GB:
2271                 new_link.link_speed = ETH_SPEED_NUM_40G;
2272                 break;
2273         default:
2274                 if (vf->link_up)
2275                         new_link.link_speed = ETH_SPEED_NUM_UNKNOWN;
2276                 else
2277                         new_link.link_speed = ETH_SPEED_NUM_NONE;
2278                 break;
2279         }
2280         /* full duplex only */
2281         new_link.link_duplex = ETH_LINK_FULL_DUPLEX;
2282         new_link.link_status = vf->link_up ? ETH_LINK_UP : ETH_LINK_DOWN;
2283         new_link.link_autoneg =
2284                 !(dev->data->dev_conf.link_speeds & ETH_LINK_SPEED_FIXED);
2285
2286         return rte_eth_linkstatus_set(dev, &new_link);
2287 }
2288
2289 static int
2290 i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev)
2291 {
2292         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2293
2294         return i40evf_config_promisc(dev, true, vf->promisc_multicast_enabled);
2295 }
2296
2297 static int
2298 i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev)
2299 {
2300         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2301
2302         return i40evf_config_promisc(dev, false, vf->promisc_multicast_enabled);
2303 }
2304
2305 static int
2306 i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev)
2307 {
2308         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2309
2310         return i40evf_config_promisc(dev, vf->promisc_unicast_enabled, true);
2311 }
2312
2313 static int
2314 i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev)
2315 {
2316         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2317
2318         return i40evf_config_promisc(dev, vf->promisc_unicast_enabled, false);
2319 }
2320
2321 static int
2322 i40evf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
2323 {
2324         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2325
2326         dev_info->max_rx_queues = I40E_MAX_QP_NUM_PER_VF;
2327         dev_info->max_tx_queues = I40E_MAX_QP_NUM_PER_VF;
2328         dev_info->min_rx_bufsize = I40E_BUF_SIZE_MIN;
2329         dev_info->max_rx_pktlen = I40E_FRAME_SIZE_MAX;
2330         dev_info->max_mtu = dev_info->max_rx_pktlen - I40E_ETH_OVERHEAD;
2331         dev_info->min_mtu = RTE_ETHER_MIN_MTU;
2332         dev_info->hash_key_size = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2333         dev_info->reta_size = ETH_RSS_RETA_SIZE_64;
2334         dev_info->flow_type_rss_offloads = vf->adapter->flow_types_mask;
2335         dev_info->max_mac_addrs = I40E_NUM_MACADDR_MAX;
2336         dev_info->rx_queue_offload_capa = 0;
2337         dev_info->rx_offload_capa =
2338                 DEV_RX_OFFLOAD_VLAN_STRIP |
2339                 DEV_RX_OFFLOAD_QINQ_STRIP |
2340                 DEV_RX_OFFLOAD_IPV4_CKSUM |
2341                 DEV_RX_OFFLOAD_UDP_CKSUM |
2342                 DEV_RX_OFFLOAD_TCP_CKSUM |
2343                 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
2344                 DEV_RX_OFFLOAD_SCATTER |
2345                 DEV_RX_OFFLOAD_JUMBO_FRAME |
2346                 DEV_RX_OFFLOAD_VLAN_FILTER;
2347
2348         dev_info->tx_queue_offload_capa = 0;
2349         dev_info->tx_offload_capa =
2350                 DEV_TX_OFFLOAD_VLAN_INSERT |
2351                 DEV_TX_OFFLOAD_QINQ_INSERT |
2352                 DEV_TX_OFFLOAD_IPV4_CKSUM |
2353                 DEV_TX_OFFLOAD_UDP_CKSUM |
2354                 DEV_TX_OFFLOAD_TCP_CKSUM |
2355                 DEV_TX_OFFLOAD_SCTP_CKSUM |
2356                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
2357                 DEV_TX_OFFLOAD_TCP_TSO |
2358                 DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
2359                 DEV_TX_OFFLOAD_GRE_TNL_TSO |
2360                 DEV_TX_OFFLOAD_IPIP_TNL_TSO |
2361                 DEV_TX_OFFLOAD_GENEVE_TNL_TSO |
2362                 DEV_TX_OFFLOAD_MULTI_SEGS;
2363
2364         dev_info->default_rxconf = (struct rte_eth_rxconf) {
2365                 .rx_thresh = {
2366                         .pthresh = I40E_DEFAULT_RX_PTHRESH,
2367                         .hthresh = I40E_DEFAULT_RX_HTHRESH,
2368                         .wthresh = I40E_DEFAULT_RX_WTHRESH,
2369                 },
2370                 .rx_free_thresh = I40E_DEFAULT_RX_FREE_THRESH,
2371                 .rx_drop_en = 0,
2372                 .offloads = 0,
2373         };
2374
2375         dev_info->default_txconf = (struct rte_eth_txconf) {
2376                 .tx_thresh = {
2377                         .pthresh = I40E_DEFAULT_TX_PTHRESH,
2378                         .hthresh = I40E_DEFAULT_TX_HTHRESH,
2379                         .wthresh = I40E_DEFAULT_TX_WTHRESH,
2380                 },
2381                 .tx_free_thresh = I40E_DEFAULT_TX_FREE_THRESH,
2382                 .tx_rs_thresh = I40E_DEFAULT_TX_RSBIT_THRESH,
2383                 .offloads = 0,
2384         };
2385
2386         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
2387                 .nb_max = I40E_MAX_RING_DESC,
2388                 .nb_min = I40E_MIN_RING_DESC,
2389                 .nb_align = I40E_ALIGN_RING_DESC,
2390         };
2391
2392         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
2393                 .nb_max = I40E_MAX_RING_DESC,
2394                 .nb_min = I40E_MIN_RING_DESC,
2395                 .nb_align = I40E_ALIGN_RING_DESC,
2396         };
2397
2398         return 0;
2399 }
2400
2401 static int
2402 i40evf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
2403 {
2404         int ret;
2405         struct i40e_eth_stats *pstats = NULL;
2406         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2407         struct i40e_vsi *vsi = &vf->vsi;
2408
2409         ret = i40evf_query_stats(dev, &pstats);
2410         if (ret == 0) {
2411                 i40evf_update_stats(vsi, pstats);
2412
2413                 stats->ipackets = pstats->rx_unicast + pstats->rx_multicast +
2414                                                 pstats->rx_broadcast;
2415                 stats->opackets = pstats->tx_broadcast + pstats->tx_multicast +
2416                                                 pstats->tx_unicast;
2417                 stats->imissed = pstats->rx_discards;
2418                 stats->oerrors = pstats->tx_errors + pstats->tx_discards;
2419                 stats->ibytes = pstats->rx_bytes;
2420                 stats->ibytes -= stats->ipackets * RTE_ETHER_CRC_LEN;
2421                 stats->obytes = pstats->tx_bytes;
2422         } else {
2423                 PMD_DRV_LOG(ERR, "Get statistics failed");
2424         }
2425         return ret;
2426 }
2427
2428 static int
2429 i40evf_dev_close(struct rte_eth_dev *dev)
2430 {
2431         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2432         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2433         int ret;
2434
2435         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2436                 return 0;
2437
2438         ret = i40evf_dev_stop(dev);
2439
2440         i40e_dev_free_queues(dev);
2441         /*
2442          * disable promiscuous mode before reset vf
2443          * it is a workaround solution when work with kernel driver
2444          * and it is not the normal way
2445          */
2446         if (vf->promisc_unicast_enabled || vf->promisc_multicast_enabled)
2447                 i40evf_config_promisc(dev, false, false);
2448
2449         rte_eal_alarm_cancel(i40evf_dev_alarm_handler, dev);
2450
2451         i40evf_reset_vf(dev);
2452         i40e_shutdown_adminq(hw);
2453         i40evf_disable_irq0(hw);
2454
2455         rte_free(vf->vf_res);
2456         vf->vf_res = NULL;
2457         rte_free(vf->aq_resp);
2458         vf->aq_resp = NULL;
2459
2460         hw->adapter_closed = 1;
2461         return ret;
2462 }
2463
2464 /*
2465  * Reset VF device only to re-initialize resources in PMD layer
2466  */
2467 static int
2468 i40evf_dev_reset(struct rte_eth_dev *dev)
2469 {
2470         int ret;
2471
2472         ret = i40evf_dev_uninit(dev);
2473         if (ret)
2474                 return ret;
2475
2476         ret = i40evf_dev_init(dev);
2477
2478         return ret;
2479 }
2480
2481 static int
2482 i40evf_get_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2483 {
2484         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2485         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2486         int ret;
2487
2488         if (!lut)
2489                 return -EINVAL;
2490
2491         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2492                 ret = i40e_aq_get_rss_lut(hw, vsi->vsi_id, FALSE,
2493                                           lut, lut_size);
2494                 if (ret) {
2495                         PMD_DRV_LOG(ERR, "Failed to get RSS lookup table");
2496                         return ret;
2497                 }
2498         } else {
2499                 uint32_t *lut_dw = (uint32_t *)lut;
2500                 uint16_t i, lut_size_dw = lut_size / 4;
2501
2502                 for (i = 0; i < lut_size_dw; i++)
2503                         lut_dw[i] = I40E_READ_REG(hw, I40E_VFQF_HLUT(i));
2504         }
2505
2506         return 0;
2507 }
2508
2509 static int
2510 i40evf_set_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2511 {
2512         struct i40e_vf *vf;
2513         struct i40e_hw *hw;
2514         int ret;
2515
2516         if (!vsi || !lut)
2517                 return -EINVAL;
2518
2519         vf = I40E_VSI_TO_VF(vsi);
2520         hw = I40E_VSI_TO_HW(vsi);
2521
2522         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2523                 ret = i40e_aq_set_rss_lut(hw, vsi->vsi_id, FALSE,
2524                                           lut, lut_size);
2525                 if (ret) {
2526                         PMD_DRV_LOG(ERR, "Failed to set RSS lookup table");
2527                         return ret;
2528                 }
2529         } else {
2530                 uint32_t *lut_dw = (uint32_t *)lut;
2531                 uint16_t i, lut_size_dw = lut_size / 4;
2532
2533                 for (i = 0; i < lut_size_dw; i++)
2534                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i), lut_dw[i]);
2535                 I40EVF_WRITE_FLUSH(hw);
2536         }
2537
2538         return 0;
2539 }
2540
2541 static int
2542 i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
2543                            struct rte_eth_rss_reta_entry64 *reta_conf,
2544                            uint16_t reta_size)
2545 {
2546         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2547         uint8_t *lut;
2548         uint16_t i, idx, shift;
2549         int ret;
2550
2551         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2552                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2553                         "(%d) doesn't match the number of hardware can "
2554                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2555                 return -EINVAL;
2556         }
2557
2558         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2559         if (!lut) {
2560                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2561                 return -ENOMEM;
2562         }
2563         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2564         if (ret)
2565                 goto out;
2566         for (i = 0; i < reta_size; i++) {
2567                 idx = i / RTE_RETA_GROUP_SIZE;
2568                 shift = i % RTE_RETA_GROUP_SIZE;
2569                 if (reta_conf[idx].mask & (1ULL << shift))
2570                         lut[i] = reta_conf[idx].reta[shift];
2571         }
2572         ret = i40evf_set_rss_lut(&vf->vsi, lut, reta_size);
2573
2574 out:
2575         rte_free(lut);
2576
2577         return ret;
2578 }
2579
2580 static int
2581 i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
2582                           struct rte_eth_rss_reta_entry64 *reta_conf,
2583                           uint16_t reta_size)
2584 {
2585         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2586         uint16_t i, idx, shift;
2587         uint8_t *lut;
2588         int ret;
2589
2590         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2591                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2592                         "(%d) doesn't match the number of hardware can "
2593                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2594                 return -EINVAL;
2595         }
2596
2597         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2598         if (!lut) {
2599                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2600                 return -ENOMEM;
2601         }
2602
2603         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2604         if (ret)
2605                 goto out;
2606         for (i = 0; i < reta_size; i++) {
2607                 idx = i / RTE_RETA_GROUP_SIZE;
2608                 shift = i % RTE_RETA_GROUP_SIZE;
2609                 if (reta_conf[idx].mask & (1ULL << shift))
2610                         reta_conf[idx].reta[shift] = lut[i];
2611         }
2612
2613 out:
2614         rte_free(lut);
2615
2616         return ret;
2617 }
2618
2619 static int
2620 i40evf_set_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t key_len)
2621 {
2622         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2623         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2624         int ret = 0;
2625
2626         if (!key || key_len == 0) {
2627                 PMD_DRV_LOG(DEBUG, "No key to be configured");
2628                 return 0;
2629         } else if (key_len != (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2630                 sizeof(uint32_t)) {
2631                 PMD_DRV_LOG(ERR, "Invalid key length %u", key_len);
2632                 return -EINVAL;
2633         }
2634
2635         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2636                 struct i40e_aqc_get_set_rss_key_data *key_dw =
2637                         (struct i40e_aqc_get_set_rss_key_data *)key;
2638
2639                 ret = i40e_aq_set_rss_key(hw, vsi->vsi_id, key_dw);
2640                 if (ret)
2641                         PMD_INIT_LOG(ERR, "Failed to configure RSS key "
2642                                      "via AQ");
2643         } else {
2644                 uint32_t *hash_key = (uint32_t *)key;
2645                 uint16_t i;
2646
2647                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2648                         i40e_write_rx_ctl(hw, I40E_VFQF_HKEY(i), hash_key[i]);
2649                 I40EVF_WRITE_FLUSH(hw);
2650         }
2651
2652         return ret;
2653 }
2654
2655 static int
2656 i40evf_get_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t *key_len)
2657 {
2658         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2659         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2660         int ret;
2661
2662         if (!key || !key_len)
2663                 return -EINVAL;
2664
2665         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2666                 ret = i40e_aq_get_rss_key(hw, vsi->vsi_id,
2667                         (struct i40e_aqc_get_set_rss_key_data *)key);
2668                 if (ret) {
2669                         PMD_INIT_LOG(ERR, "Failed to get RSS key via AQ");
2670                         return ret;
2671                 }
2672         } else {
2673                 uint32_t *key_dw = (uint32_t *)key;
2674                 uint16_t i;
2675
2676                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2677                         key_dw[i] = i40e_read_rx_ctl(hw, I40E_VFQF_HKEY(i));
2678         }
2679         *key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2680
2681         return 0;
2682 }
2683
2684 static int
2685 i40evf_hw_rss_hash_set(struct i40e_vf *vf, struct rte_eth_rss_conf *rss_conf)
2686 {
2687         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2688         uint64_t hena;
2689         int ret;
2690
2691         ret = i40evf_set_rss_key(&vf->vsi, rss_conf->rss_key,
2692                                  rss_conf->rss_key_len);
2693         if (ret)
2694                 return ret;
2695
2696         hena = i40e_config_hena(vf->adapter, rss_conf->rss_hf);
2697         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
2698         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
2699         I40EVF_WRITE_FLUSH(hw);
2700
2701         return 0;
2702 }
2703
2704 static void
2705 i40evf_disable_rss(struct i40e_vf *vf)
2706 {
2707         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2708
2709         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), 0);
2710         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), 0);
2711         I40EVF_WRITE_FLUSH(hw);
2712 }
2713
2714 static int
2715 i40evf_config_rss(struct i40e_vf *vf)
2716 {
2717         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2718         struct rte_eth_rss_conf rss_conf;
2719         uint32_t i, j, lut = 0, nb_q = (I40E_VFQF_HLUT_MAX_INDEX + 1) * 4;
2720         uint32_t rss_lut_size = (I40E_VFQF_HLUT1_MAX_INDEX + 1) * 4;
2721         uint16_t num;
2722         uint8_t *lut_info;
2723         int ret;
2724
2725         if (vf->dev_data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
2726                 i40evf_disable_rss(vf);
2727                 PMD_DRV_LOG(DEBUG, "RSS not configured");
2728                 return 0;
2729         }
2730
2731         num = RTE_MIN(vf->dev_data->nb_rx_queues, I40E_MAX_QP_NUM_PER_VF);
2732         /* Fill out the look up table */
2733         if (!(vf->flags & I40E_FLAG_RSS_AQ_CAPABLE)) {
2734                 for (i = 0, j = 0; i < nb_q; i++, j++) {
2735                         if (j >= num)
2736                                 j = 0;
2737                         lut = (lut << 8) | j;
2738                         if ((i & 3) == 3)
2739                                 I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
2740                 }
2741         } else {
2742                 lut_info = rte_zmalloc("i40e_rss_lut", rss_lut_size, 0);
2743                 if (!lut_info) {
2744                         PMD_DRV_LOG(ERR, "No memory can be allocated");
2745                         return -ENOMEM;
2746                 }
2747
2748                 for (i = 0; i < rss_lut_size; i++)
2749                         lut_info[i] = i % num;
2750
2751                 ret = i40evf_set_rss_lut(&vf->vsi, lut_info,
2752                                          rss_lut_size);
2753                 rte_free(lut_info);
2754                 if (ret)
2755                         return ret;
2756         }
2757
2758         rss_conf = vf->dev_data->dev_conf.rx_adv_conf.rss_conf;
2759         if ((rss_conf.rss_hf & vf->adapter->flow_types_mask) == 0) {
2760                 i40evf_disable_rss(vf);
2761                 PMD_DRV_LOG(DEBUG, "No hash flag is set");
2762                 return 0;
2763         }
2764
2765         if (rss_conf.rss_key == NULL || rss_conf.rss_key_len <
2766                 (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t)) {
2767                 /* Calculate the default hash key */
2768                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2769                         rss_key_default[i] = (uint32_t)rte_rand();
2770                 rss_conf.rss_key = (uint8_t *)rss_key_default;
2771                 rss_conf.rss_key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2772                         sizeof(uint32_t);
2773         }
2774
2775         return i40evf_hw_rss_hash_set(vf, &rss_conf);
2776 }
2777
2778 static int
2779 i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
2780                            struct rte_eth_rss_conf *rss_conf)
2781 {
2782         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2783         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2784         uint64_t rss_hf = rss_conf->rss_hf & vf->adapter->flow_types_mask;
2785         uint64_t hena;
2786
2787         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2788         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2789
2790         if (!(hena & vf->adapter->pctypes_mask)) { /* RSS disabled */
2791                 if (rss_hf != 0) /* Enable RSS */
2792                         return -EINVAL;
2793                 return 0;
2794         }
2795
2796         /* RSS enabled */
2797         if (rss_hf == 0) /* Disable RSS */
2798                 return -EINVAL;
2799
2800         return i40evf_hw_rss_hash_set(vf, rss_conf);
2801 }
2802
2803 static int
2804 i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
2805                              struct rte_eth_rss_conf *rss_conf)
2806 {
2807         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2808         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2809         uint64_t hena;
2810
2811         i40evf_get_rss_key(&vf->vsi, rss_conf->rss_key,
2812                            &rss_conf->rss_key_len);
2813
2814         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2815         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2816         rss_conf->rss_hf = i40e_parse_hena(vf->adapter, hena);
2817
2818         return 0;
2819 }
2820
2821 static int
2822 i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
2823 {
2824         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2825         struct rte_eth_dev_data *dev_data = vf->dev_data;
2826         uint32_t frame_size = mtu + I40E_ETH_OVERHEAD;
2827         int ret = 0;
2828
2829         /* check if mtu is within the allowed range */
2830         if (mtu < RTE_ETHER_MIN_MTU || frame_size > I40E_FRAME_SIZE_MAX)
2831                 return -EINVAL;
2832
2833         /* mtu setting is forbidden if port is start */
2834         if (dev_data->dev_started) {
2835                 PMD_DRV_LOG(ERR, "port %d must be stopped before configuration",
2836                             dev_data->port_id);
2837                 return -EBUSY;
2838         }
2839
2840         if (frame_size > I40E_ETH_MAX_LEN)
2841                 dev_data->dev_conf.rxmode.offloads |=
2842                         DEV_RX_OFFLOAD_JUMBO_FRAME;
2843         else
2844                 dev_data->dev_conf.rxmode.offloads &=
2845                         ~DEV_RX_OFFLOAD_JUMBO_FRAME;
2846         dev_data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
2847
2848         return ret;
2849 }
2850
2851 static int
2852 i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
2853                             struct rte_ether_addr *mac_addr)
2854 {
2855         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2856
2857         if (!rte_is_valid_assigned_ether_addr(mac_addr)) {
2858                 PMD_DRV_LOG(ERR, "Tried to set invalid MAC address.");
2859                 return -EINVAL;
2860         }
2861
2862         i40evf_del_mac_addr_by_addr(dev, (struct rte_ether_addr *)hw->mac.addr);
2863
2864         if (i40evf_add_mac_addr(dev, mac_addr, 0, 0) != 0)
2865                 return -EIO;
2866
2867         rte_ether_addr_copy(mac_addr, (struct rte_ether_addr *)hw->mac.addr);
2868         return 0;
2869 }
2870
2871 static int
2872 i40evf_add_del_mc_addr_list(struct rte_eth_dev *dev,
2873                         struct rte_ether_addr *mc_addrs,
2874                         uint32_t mc_addrs_num, bool add)
2875 {
2876         struct virtchnl_ether_addr_list *list;
2877         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2878         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) +
2879                 (I40E_NUM_MACADDR_MAX * sizeof(struct virtchnl_ether_addr))];
2880         uint32_t i;
2881         int err;
2882         struct vf_cmd_info args;
2883
2884         if (mc_addrs == NULL || mc_addrs_num == 0)
2885                 return 0;
2886
2887         if (mc_addrs_num > I40E_NUM_MACADDR_MAX)
2888                 return -EINVAL;
2889
2890         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
2891         list->vsi_id = vf->vsi_res->vsi_id;
2892         list->num_elements = mc_addrs_num;
2893
2894         for (i = 0; i < mc_addrs_num; i++) {
2895                 if (!I40E_IS_MULTICAST(mc_addrs[i].addr_bytes)) {
2896                         PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
2897                                     mc_addrs[i].addr_bytes[0],
2898                                     mc_addrs[i].addr_bytes[1],
2899                                     mc_addrs[i].addr_bytes[2],
2900                                     mc_addrs[i].addr_bytes[3],
2901                                     mc_addrs[i].addr_bytes[4],
2902                                     mc_addrs[i].addr_bytes[5]);
2903                         return -EINVAL;
2904                 }
2905
2906                 memcpy(list->list[i].addr, mc_addrs[i].addr_bytes,
2907                         sizeof(list->list[i].addr));
2908         }
2909
2910         args.ops = add ? VIRTCHNL_OP_ADD_ETH_ADDR : VIRTCHNL_OP_DEL_ETH_ADDR;
2911         args.in_args = cmd_buffer;
2912         args.in_args_size = sizeof(struct virtchnl_ether_addr_list) +
2913                 i * sizeof(struct virtchnl_ether_addr);
2914         args.out_buffer = vf->aq_resp;
2915         args.out_size = I40E_AQ_BUF_SZ;
2916         err = i40evf_execute_vf_cmd(dev, &args);
2917         if (err) {
2918                 PMD_DRV_LOG(ERR, "fail to execute command %s",
2919                         add ? "OP_ADD_ETH_ADDR" : "OP_DEL_ETH_ADDR");
2920                 return err;
2921         }
2922
2923         return 0;
2924 }
2925
2926 static int
2927 i40evf_set_mc_addr_list(struct rte_eth_dev *dev,
2928                         struct rte_ether_addr *mc_addrs,
2929                         uint32_t mc_addrs_num)
2930 {
2931         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2932         int err;
2933
2934         /* flush previous addresses */
2935         err = i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2936                                 FALSE);
2937         if (err)
2938                 return err;
2939
2940         vf->mc_addrs_num = 0;
2941
2942         /* add new ones */
2943         err = i40evf_add_del_mc_addr_list(dev, mc_addrs, mc_addrs_num,
2944                                         TRUE);
2945         if (err)
2946                 return err;
2947
2948         vf->mc_addrs_num = mc_addrs_num;
2949         memcpy(vf->mc_addrs, mc_addrs, mc_addrs_num * sizeof(*mc_addrs));
2950
2951         return 0;
2952 }
2953
2954 bool
2955 is_i40evf_supported(struct rte_eth_dev *dev)
2956 {
2957         return is_device_supported(dev, &rte_i40evf_pmd);
2958 }