drivers/net/i40e/i40e_ethdev_vf.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <sys/queue.h>
  35 #include <stdio.h>
  36 #include <errno.h>
  37 #include <stdint.h>
  38 #include <string.h>
  39 #include <unistd.h>
  40 #include <stdarg.h>
  41 #include <inttypes.h>
  42 #include <rte_byteorder.h>
  43 #include <rte_common.h>
  44 #include <rte_cycles.h>
  45
  46 #include <rte_interrupts.h>
  47 #include <rte_log.h>
  48 #include <rte_debug.h>
  49 #include <rte_pci.h>
  50 #include <rte_atomic.h>
  51 #include <rte_branch_prediction.h>
  52 #include <rte_memory.h>
  53 #include <rte_memzone.h>
  54 #include <rte_eal.h>
  55 #include <rte_alarm.h>
  56 #include <rte_ether.h>
  57 #include <rte_ethdev.h>
  58 #include <rte_atomic.h>
  59 #include <rte_malloc.h>
  60 #include <rte_dev.h>
  61
  62 #include "i40e_logs.h"
  63 #include "base/i40e_prototype.h"
  64 #include "base/i40e_adminq_cmd.h"
  65 #include "base/i40e_type.h"
  66
  67 #include "i40e_rxtx.h"
  68 #include "i40e_ethdev.h"
  69 #include "i40e_pf.h"
  70 #define I40EVF_VSI_DEFAULT_MSIX_INTR     1
  71 #define I40EVF_VSI_DEFAULT_MSIX_INTR_LNX 0
  72
  73 /* busy wait delay in msec */
  74 #define I40EVF_BUSY_WAIT_DELAY 10
  75 #define I40EVF_BUSY_WAIT_COUNT 50
  76 #define MAX_RESET_WAIT_CNT     20
  77 /*ITR index for NOITR*/
  78 #define I40E_QINT_RQCTL_MSIX_INDX_NOITR     3
  79
  80 struct i40evf_arq_msg_info {
  81         enum i40e_virtchnl_ops ops;
  82         enum i40e_status_code result;
  83         uint16_t buf_len;
  84         uint16_t msg_len;
  85         uint8_t *msg;
  86 };
  87
  88 struct vf_cmd_info {
  89         enum i40e_virtchnl_ops ops;
  90         uint8_t *in_args;
  91         uint32_t in_args_size;
  92         uint8_t *out_buffer;
  93         /* Input & output type. pass in buffer size and pass out
  94          * actual return result
  95          */
  96         uint32_t out_size;
  97 };
  98
  99 enum i40evf_aq_result {
 100         I40EVF_MSG_ERR = -1, /* Meet error when accessing admin queue */
 101         I40EVF_MSG_NON,      /* Read nothing from admin queue */
 102         I40EVF_MSG_SYS,      /* Read system msg from admin queue */
 103         I40EVF_MSG_CMD,      /* Read async command result */
 104 };
 105
 106 /* A share buffer to store the command result from PF driver */
 107 static uint8_t cmd_result_buffer[I40E_AQ_BUF_SZ];
 108
 109 static int i40evf_dev_configure(struct rte_eth_dev *dev);
 110 static int i40evf_dev_start(struct rte_eth_dev *dev);
 111 static void i40evf_dev_stop(struct rte_eth_dev *dev);
 112 static void i40evf_dev_info_get(struct rte_eth_dev *dev,
 113                                 struct rte_eth_dev_info *dev_info);
 114 static int i40evf_dev_link_update(struct rte_eth_dev *dev,
 115                                   __rte_unused int wait_to_complete);
 116 static void i40evf_dev_stats_get(struct rte_eth_dev *dev,
 117                                 struct rte_eth_stats *stats);
 118 static int i40evf_vlan_filter_set(struct rte_eth_dev *dev,
 119                                   uint16_t vlan_id, int on);
 120 static void i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask);
 121 static int i40evf_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t pvid,
 122                                 int on);
 123 static void i40evf_dev_close(struct rte_eth_dev *dev);
 124 static void i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev);
 125 static void i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev);
 126 static void i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev);
 127 static void i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev);
 128 static int i40evf_get_link_status(struct rte_eth_dev *dev,
 129                                   struct rte_eth_link *link);
 130 static int i40evf_init_vlan(struct rte_eth_dev *dev);
 131 static int i40evf_dev_rx_queue_start(struct rte_eth_dev *dev,
 132                                      uint16_t rx_queue_id);
 133 static int i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev,
 134                                     uint16_t rx_queue_id);
 135 static int i40evf_dev_tx_queue_start(struct rte_eth_dev *dev,
 136                                      uint16_t tx_queue_id);
 137 static int i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev,
 138                                     uint16_t tx_queue_id);
 139 static int i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
 140                         struct rte_eth_rss_reta_entry64 *reta_conf,
 141                         uint16_t reta_size);
 142 static int i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
 143                         struct rte_eth_rss_reta_entry64 *reta_conf,
 144                         uint16_t reta_size);
 145 static int i40evf_config_rss(struct i40e_vf *vf);
 146 static int i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
 147                                       struct rte_eth_rss_conf *rss_conf);
 148 static int i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
 149                                         struct rte_eth_rss_conf *rss_conf);
 150
 151 /* Default hash key buffer for RSS */
 152 static uint32_t rss_key_default[I40E_VFQF_HKEY_MAX_INDEX + 1];
 153
 154 static const struct eth_dev_ops i40evf_eth_dev_ops = {
 155         .dev_configure        = i40evf_dev_configure,
 156         .dev_start            = i40evf_dev_start,
 157         .dev_stop             = i40evf_dev_stop,
 158         .promiscuous_enable   = i40evf_dev_promiscuous_enable,
 159         .promiscuous_disable  = i40evf_dev_promiscuous_disable,
 160         .allmulticast_enable  = i40evf_dev_allmulticast_enable,
 161         .allmulticast_disable = i40evf_dev_allmulticast_disable,
 162         .link_update          = i40evf_dev_link_update,
 163         .stats_get            = i40evf_dev_stats_get,
 164         .dev_close            = i40evf_dev_close,
 165         .dev_infos_get        = i40evf_dev_info_get,
 166         .vlan_filter_set      = i40evf_vlan_filter_set,
 167         .vlan_offload_set     = i40evf_vlan_offload_set,
 168         .vlan_pvid_set        = i40evf_vlan_pvid_set,
 169         .rx_queue_start       = i40evf_dev_rx_queue_start,
 170         .rx_queue_stop        = i40evf_dev_rx_queue_stop,
 171         .tx_queue_start       = i40evf_dev_tx_queue_start,
 172         .tx_queue_stop        = i40evf_dev_tx_queue_stop,
 173         .rx_queue_setup       = i40e_dev_rx_queue_setup,
 174         .rx_queue_release     = i40e_dev_rx_queue_release,
 175         .tx_queue_setup       = i40e_dev_tx_queue_setup,
 176         .tx_queue_release     = i40e_dev_tx_queue_release,
 177         .reta_update          = i40evf_dev_rss_reta_update,
 178         .reta_query           = i40evf_dev_rss_reta_query,
 179         .rss_hash_update      = i40evf_dev_rss_hash_update,
 180         .rss_hash_conf_get    = i40evf_dev_rss_hash_conf_get,
 181 };
 182
 183 static int
 184 i40evf_set_mac_type(struct i40e_hw *hw)
 185 {
 186         int status = I40E_ERR_DEVICE_NOT_SUPPORTED;
 187
 188         if (hw->vendor_id == I40E_INTEL_VENDOR_ID) {
 189                 switch (hw->device_id) {
 190                 case I40E_DEV_ID_VF:
 191                 case I40E_DEV_ID_VF_HV:
 192                         hw->mac.type = I40E_MAC_VF;
 193                         status = I40E_SUCCESS;
 194                         break;
 195                 default:
 196                         ;
 197                 }
 198         }
 199
 200         return status;
 201 }
 202
 203 /*
 204  * Parse admin queue message.
 205  *
 206  * return value:
 207  *  < 0: meet error
 208  *  0: read sys msg
 209  *  > 0: read cmd result
 210  */
 211 static enum i40evf_aq_result
 212 i40evf_parse_pfmsg(struct i40e_vf *vf,
 213                    struct i40e_arq_event_info *event,
 214                    struct i40evf_arq_msg_info *data)
 215 {
 216         enum i40e_virtchnl_ops opcode = (enum i40e_virtchnl_ops)\
 217                         rte_le_to_cpu_32(event->desc.cookie_high);
 218         enum i40e_status_code retval = (enum i40e_status_code)\
 219                         rte_le_to_cpu_32(event->desc.cookie_low);
 220         enum i40evf_aq_result ret = I40EVF_MSG_CMD;
 221
 222         /* pf sys event */
 223         if (opcode == I40E_VIRTCHNL_OP_EVENT) {
 224                 struct i40e_virtchnl_pf_event *vpe =
 225                         (struct i40e_virtchnl_pf_event *)event->msg_buf;
 226
 227                 /* Initialize ret to sys event */
 228                 ret = I40EVF_MSG_SYS;
 229                 switch (vpe->event) {
 230                 case I40E_VIRTCHNL_EVENT_LINK_CHANGE:
 231                         vf->link_up =
 232                                 vpe->event_data.link_event.link_status;
 233                         vf->pend_msg |= PFMSG_LINK_CHANGE;
 234                         PMD_DRV_LOG(INFO, "Link status update:%s",
 235                                     vf->link_up ? "up" : "down");
 236                         break;
 237                 case I40E_VIRTCHNL_EVENT_RESET_IMPENDING:
 238                         vf->vf_reset = true;
 239                         vf->pend_msg |= PFMSG_RESET_IMPENDING;
 240                         PMD_DRV_LOG(INFO, "vf is reseting");
 241                         break;
 242                 case I40E_VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
 243                         vf->dev_closed = true;
 244                         vf->pend_msg |= PFMSG_DRIVER_CLOSE;
 245                         PMD_DRV_LOG(INFO, "PF driver closed");
 246                         break;
 247                 default:
 248                         PMD_DRV_LOG(ERR, "%s: Unknown event %d from pf",
 249                                     __func__, vpe->event);
 250                 }
 251         } else {
 252                 /* async reply msg on command issued by vf previously */
 253                 ret = I40EVF_MSG_CMD;
 254                 /* Actual data length read from PF */
 255                 data->msg_len = event->msg_len;
 256         }
 257         /* fill the ops and result to notify VF */
 258         data->result = retval;
 259         data->ops = opcode;
 260
 261         return ret;
 262 }
 263
 264 /*
 265  * Read data in admin queue to get msg from pf driver
 266  */
 267 static enum i40evf_aq_result
 268 i40evf_read_pfmsg(struct rte_eth_dev *dev, struct i40evf_arq_msg_info *data)
 269 {
 270         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 271         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 272         struct i40e_arq_event_info event;
 273         int ret;
 274         enum i40evf_aq_result result = I40EVF_MSG_NON;
 275
 276         event.buf_len = data->buf_len;
 277         event.msg_buf = data->msg;
 278         ret = i40e_clean_arq_element(hw, &event, NULL);
 279         /* Can't read any msg from adminQ */
 280         if (ret) {
 281                 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
 282                         result = I40EVF_MSG_NON;
 283                 else
 284                         result = I40EVF_MSG_ERR;
 285                 return result;
 286         }
 287
 288         /* Parse the event */
 289         result = i40evf_parse_pfmsg(vf, &event, data);
 290
 291         return result;
 292 }
 293
 294 /*
 295  * Polling read until command result return from pf driver or meet error.
 296  */
 297 static int
 298 i40evf_wait_cmd_done(struct rte_eth_dev *dev,
 299                      struct i40evf_arq_msg_info *data)
 300 {
 301         int i = 0;
 302         enum i40evf_aq_result ret;
 303
 304 #define MAX_TRY_TIMES 20
 305 #define ASQ_DELAY_MS  100
 306         do {
 307                 /* Delay some time first */
 308                 rte_delay_ms(ASQ_DELAY_MS);
 309                 ret = i40evf_read_pfmsg(dev, data);
 310                 if (ret == I40EVF_MSG_CMD)
 311                         return 0;
 312                 else if (ret == I40EVF_MSG_ERR)
 313                         return -1;
 314
 315                 /* If don't read msg or read sys event, continue */
 316         } while(i++ < MAX_TRY_TIMES);
 317
 318         return -1;
 319 }
 320
 321 /**
 322  * clear current command. Only call in case execute
 323  * _atomic_set_cmd successfully.
 324  */
 325 static inline void
 326 _clear_cmd(struct i40e_vf *vf)
 327 {
 328         rte_wmb();
 329         vf->pend_cmd = I40E_VIRTCHNL_OP_UNKNOWN;
 330 }
 331
 332 /*
 333  * Check there is pending cmd in execution. If none, set new command.
 334  */
 335 static inline int
 336 _atomic_set_cmd(struct i40e_vf *vf, enum i40e_virtchnl_ops ops)
 337 {
 338         int ret = rte_atomic32_cmpset(&vf->pend_cmd,
 339                         I40E_VIRTCHNL_OP_UNKNOWN, ops);
 340
 341         if (!ret)
 342                 PMD_DRV_LOG(ERR, "There is incomplete cmd %d", vf->pend_cmd);
 343
 344         return !ret;
 345 }
 346
 347 static int
 348 i40evf_execute_vf_cmd(struct rte_eth_dev *dev, struct vf_cmd_info *args)
 349 {
 350         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 351         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 352         int err = -1;
 353         struct i40evf_arq_msg_info info;
 354
 355         if (_atomic_set_cmd(vf, args->ops))
 356                 return -1;
 357
 358         info.msg = args->out_buffer;
 359         info.buf_len = args->out_size;
 360         info.ops = I40E_VIRTCHNL_OP_UNKNOWN;
 361         info.result = I40E_SUCCESS;
 362
 363         err = i40e_aq_send_msg_to_pf(hw, args->ops, I40E_SUCCESS,
 364                      args->in_args, args->in_args_size, NULL);
 365         if (err) {
 366                 PMD_DRV_LOG(ERR, "fail to send cmd %d", args->ops);
 367                 _clear_cmd(vf);
 368                 return err;
 369         }
 370
 371         err = i40evf_wait_cmd_done(dev, &info);
 372         /* read message and it's expected one */
 373         if (!err && args->ops == info.ops)
 374                 _clear_cmd(vf);
 375         else if (err) {
 376                 PMD_DRV_LOG(ERR, "Failed to read message from AdminQ");
 377                 _clear_cmd(vf);
 378         }
 379         else if (args->ops != info.ops)
 380                 PMD_DRV_LOG(ERR, "command mismatch, expect %u, get %u",
 381                             args->ops, info.ops);
 382
 383         return (err | info.result);
 384 }
 385
 386 /*
 387  * Check API version with sync wait until version read or fail from admin queue
 388  */
 389 static int
 390 i40evf_check_api_version(struct rte_eth_dev *dev)
 391 {
 392         struct i40e_virtchnl_version_info version, *pver;
 393         int err;
 394         struct vf_cmd_info args;
 395         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 396
 397         version.major = I40E_VIRTCHNL_VERSION_MAJOR;
 398         version.minor = I40E_VIRTCHNL_VERSION_MINOR;
 399
 400         args.ops = I40E_VIRTCHNL_OP_VERSION;
 401         args.in_args = (uint8_t *)&version;
 402         args.in_args_size = sizeof(version);
 403         args.out_buffer = cmd_result_buffer;
 404         args.out_size = I40E_AQ_BUF_SZ;
 405
 406         err = i40evf_execute_vf_cmd(dev, &args);
 407         if (err) {
 408                 PMD_INIT_LOG(ERR, "fail to execute command OP_VERSION");
 409                 return err;
 410         }
 411
 412         pver = (struct i40e_virtchnl_version_info *)args.out_buffer;
 413         vf->version_major = pver->major;
 414         vf->version_minor = pver->minor;
 415         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
 416                 PMD_DRV_LOG(INFO, "Peer is DPDK PF host");
 417         else if ((vf->version_major == I40E_VIRTCHNL_VERSION_MAJOR) &&
 418                 (vf->version_minor <= I40E_VIRTCHNL_VERSION_MINOR))
 419                 PMD_DRV_LOG(INFO, "Peer is Linux PF host");
 420         else {
 421                 PMD_INIT_LOG(ERR, "PF/VF API version mismatch:(%u.%u)-(%u.%u)",
 422                                         vf->version_major, vf->version_minor,
 423                                                 I40E_VIRTCHNL_VERSION_MAJOR,
 424                                                 I40E_VIRTCHNL_VERSION_MINOR);
 425                 return -1;
 426         }
 427
 428         return 0;
 429 }
 430
 431 static int
 432 i40evf_get_vf_resource(struct rte_eth_dev *dev)
 433 {
 434         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 435         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 436         int err;
 437         struct vf_cmd_info args;
 438         uint32_t caps, len;
 439
 440         args.ops = I40E_VIRTCHNL_OP_GET_VF_RESOURCES;
 441         args.out_buffer = cmd_result_buffer;
 442         args.out_size = I40E_AQ_BUF_SZ;
 443         if (PF_IS_V11(vf)) {
 444                 caps = I40E_VIRTCHNL_VF_OFFLOAD_L2 |
 445                        I40E_VIRTCHNL_VF_OFFLOAD_RSS_AQ |
 446                        I40E_VIRTCHNL_VF_OFFLOAD_RSS_REG |
 447                        I40E_VIRTCHNL_VF_OFFLOAD_VLAN |
 448                        I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING;
 449                 args.in_args = (uint8_t *)&caps;
 450                 args.in_args_size = sizeof(caps);
 451         } else {
 452                 args.in_args = NULL;
 453                 args.in_args_size = 0;
 454         }
 455         err = i40evf_execute_vf_cmd(dev, &args);
 456
 457         if (err) {
 458                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_VF_RESOURCE");
 459                 return err;
 460         }
 461
 462         len =  sizeof(struct i40e_virtchnl_vf_resource) +
 463                 I40E_MAX_VF_VSI * sizeof(struct i40e_virtchnl_vsi_resource);
 464
 465         (void)rte_memcpy(vf->vf_res, args.out_buffer,
 466                         RTE_MIN(args.out_size, len));
 467         i40e_vf_parse_hw_config(hw, vf->vf_res);
 468
 469         return 0;
 470 }
 471
 472 static int
 473 i40evf_config_promisc(struct rte_eth_dev *dev,
 474                       bool enable_unicast,
 475                       bool enable_multicast)
 476 {
 477         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 478         int err;
 479         struct vf_cmd_info args;
 480         struct i40e_virtchnl_promisc_info promisc;
 481
 482         promisc.flags = 0;
 483         promisc.vsi_id = vf->vsi_res->vsi_id;
 484
 485         if (enable_unicast)
 486                 promisc.flags |= I40E_FLAG_VF_UNICAST_PROMISC;
 487
 488         if (enable_multicast)
 489                 promisc.flags |= I40E_FLAG_VF_MULTICAST_PROMISC;
 490
 491         args.ops = I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE;
 492         args.in_args = (uint8_t *)&promisc;
 493         args.in_args_size = sizeof(promisc);
 494         args.out_buffer = cmd_result_buffer;
 495         args.out_size = I40E_AQ_BUF_SZ;
 496
 497         err = i40evf_execute_vf_cmd(dev, &args);
 498
 499         if (err)
 500                 PMD_DRV_LOG(ERR, "fail to execute command "
 501                             "CONFIG_PROMISCUOUS_MODE");
 502         return err;
 503 }
 504
 505 /* Configure vlan and double vlan offload. Use flag to specify which part to configure */
 506 static int
 507 i40evf_config_vlan_offload(struct rte_eth_dev *dev,
 508                                 bool enable_vlan_strip)
 509 {
 510         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 511         int err;
 512         struct vf_cmd_info args;
 513         struct i40e_virtchnl_vlan_offload_info offload;
 514
 515         offload.vsi_id = vf->vsi_res->vsi_id;
 516         offload.enable_vlan_strip = enable_vlan_strip;
 517
 518         args.ops = (enum i40e_virtchnl_ops)I40E_VIRTCHNL_OP_CFG_VLAN_OFFLOAD;
 519         args.in_args = (uint8_t *)&offload;
 520         args.in_args_size = sizeof(offload);
 521         args.out_buffer = cmd_result_buffer;
 522         args.out_size = I40E_AQ_BUF_SZ;
 523
 524         err = i40evf_execute_vf_cmd(dev, &args);
 525         if (err)
 526                 PMD_DRV_LOG(ERR, "fail to execute command CFG_VLAN_OFFLOAD");
 527
 528         return err;
 529 }
 530
 531 static int
 532 i40evf_config_vlan_pvid(struct rte_eth_dev *dev,
 533                                 struct i40e_vsi_vlan_pvid_info *info)
 534 {
 535         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 536         int err;
 537         struct vf_cmd_info args;
 538         struct i40e_virtchnl_pvid_info tpid_info;
 539
 540         if (dev == NULL || info == NULL) {
 541                 PMD_DRV_LOG(ERR, "invalid parameters");
 542                 return I40E_ERR_PARAM;
 543         }
 544
 545         memset(&tpid_info, 0, sizeof(tpid_info));
 546         tpid_info.vsi_id = vf->vsi_res->vsi_id;
 547         (void)rte_memcpy(&tpid_info.info, info, sizeof(*info));
 548
 549         args.ops = (enum i40e_virtchnl_ops)I40E_VIRTCHNL_OP_CFG_VLAN_PVID;
 550         args.in_args = (uint8_t *)&tpid_info;
 551         args.in_args_size = sizeof(tpid_info);
 552         args.out_buffer = cmd_result_buffer;
 553         args.out_size = I40E_AQ_BUF_SZ;
 554
 555         err = i40evf_execute_vf_cmd(dev, &args);
 556         if (err)
 557                 PMD_DRV_LOG(ERR, "fail to execute command CFG_VLAN_PVID");
 558
 559         return err;
 560 }
 561
 562 static void
 563 i40evf_fill_virtchnl_vsi_txq_info(struct i40e_virtchnl_txq_info *txq_info,
 564                                   uint16_t vsi_id,
 565                                   uint16_t queue_id,
 566                                   uint16_t nb_txq,
 567                                   struct i40e_tx_queue *txq)
 568 {
 569         txq_info->vsi_id = vsi_id;
 570         txq_info->queue_id = queue_id;
 571         if (queue_id < nb_txq) {
 572                 txq_info->ring_len = txq->nb_tx_desc;
 573                 txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
 574         }
 575 }
 576
 577 static void
 578 i40evf_fill_virtchnl_vsi_rxq_info(struct i40e_virtchnl_rxq_info *rxq_info,
 579                                   uint16_t vsi_id,
 580                                   uint16_t queue_id,
 581                                   uint16_t nb_rxq,
 582                                   uint32_t max_pkt_size,
 583                                   struct i40e_rx_queue *rxq)
 584 {
 585         rxq_info->vsi_id = vsi_id;
 586         rxq_info->queue_id = queue_id;
 587         rxq_info->max_pkt_size = max_pkt_size;
 588         if (queue_id < nb_rxq) {
 589                 rxq_info->ring_len = rxq->nb_rx_desc;
 590                 rxq_info->dma_ring_addr = rxq->rx_ring_phys_addr;
 591                 rxq_info->databuffer_size =
 592                         (rte_pktmbuf_data_room_size(rxq->mp) -
 593                                 RTE_PKTMBUF_HEADROOM);
 594         }
 595 }
 596
 597 /* It configures VSI queues to co-work with Linux PF host */
 598 static int
 599 i40evf_configure_vsi_queues(struct rte_eth_dev *dev)
 600 {
 601         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 602         struct i40e_rx_queue **rxq =
 603                 (struct i40e_rx_queue **)dev->data->rx_queues;
 604         struct i40e_tx_queue **txq =
 605                 (struct i40e_tx_queue **)dev->data->tx_queues;
 606         struct i40e_virtchnl_vsi_queue_config_info *vc_vqci;
 607         struct i40e_virtchnl_queue_pair_info *vc_qpi;
 608         struct vf_cmd_info args;
 609         uint16_t i, nb_qp = vf->num_queue_pairs;
 610         const uint32_t size =
 611                 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqci, nb_qp);
 612         uint8_t buff[size];
 613         int ret;
 614
 615         memset(buff, 0, sizeof(buff));
 616         vc_vqci = (struct i40e_virtchnl_vsi_queue_config_info *)buff;
 617         vc_vqci->vsi_id = vf->vsi_res->vsi_id;
 618         vc_vqci->num_queue_pairs = nb_qp;
 619
 620         for (i = 0, vc_qpi = vc_vqci->qpair; i < nb_qp; i++, vc_qpi++) {
 621                 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpi->txq,
 622                         vc_vqci->vsi_id, i, dev->data->nb_tx_queues, txq[i]);
 623                 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpi->rxq,
 624                         vc_vqci->vsi_id, i, dev->data->nb_rx_queues,
 625                                         vf->max_pkt_len, rxq[i]);
 626         }
 627         memset(&args, 0, sizeof(args));
 628         args.ops = I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES;
 629         args.in_args = (uint8_t *)vc_vqci;
 630         args.in_args_size = size;
 631         args.out_buffer = cmd_result_buffer;
 632         args.out_size = I40E_AQ_BUF_SZ;
 633         ret = i40evf_execute_vf_cmd(dev, &args);
 634         if (ret)
 635                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 636                         "I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES\n");
 637
 638         return ret;
 639 }
 640
 641 /* It configures VSI queues to co-work with DPDK PF host */
 642 static int
 643 i40evf_configure_vsi_queues_ext(struct rte_eth_dev *dev)
 644 {
 645         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 646         struct i40e_rx_queue **rxq =
 647                 (struct i40e_rx_queue **)dev->data->rx_queues;
 648         struct i40e_tx_queue **txq =
 649                 (struct i40e_tx_queue **)dev->data->tx_queues;
 650         struct i40e_virtchnl_vsi_queue_config_ext_info *vc_vqcei;
 651         struct i40e_virtchnl_queue_pair_ext_info *vc_qpei;
 652         struct vf_cmd_info args;
 653         uint16_t i, nb_qp = vf->num_queue_pairs;
 654         const uint32_t size =
 655                 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqcei, nb_qp);
 656         uint8_t buff[size];
 657         int ret;
 658
 659         memset(buff, 0, sizeof(buff));
 660         vc_vqcei = (struct i40e_virtchnl_vsi_queue_config_ext_info *)buff;
 661         vc_vqcei->vsi_id = vf->vsi_res->vsi_id;
 662         vc_vqcei->num_queue_pairs = nb_qp;
 663         vc_qpei = vc_vqcei->qpair;
 664         for (i = 0; i < nb_qp; i++, vc_qpei++) {
 665                 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpei->txq,
 666                         vc_vqcei->vsi_id, i, dev->data->nb_tx_queues, txq[i]);
 667                 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpei->rxq,
 668                         vc_vqcei->vsi_id, i, dev->data->nb_rx_queues,
 669                                         vf->max_pkt_len, rxq[i]);
 670                 if (i < dev->data->nb_rx_queues)
 671                         /*
 672                          * It adds extra info for configuring VSI queues, which
 673                          * is needed to enable the configurable crc stripping
 674                          * in VF.
 675                          */
 676                         vc_qpei->rxq_ext.crcstrip =
 677                                 dev->data->dev_conf.rxmode.hw_strip_crc;
 678         }
 679         memset(&args, 0, sizeof(args));
 680         args.ops =
 681                 (enum i40e_virtchnl_ops)I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT;
 682         args.in_args = (uint8_t *)vc_vqcei;
 683         args.in_args_size = size;
 684         args.out_buffer = cmd_result_buffer;
 685         args.out_size = I40E_AQ_BUF_SZ;
 686         ret = i40evf_execute_vf_cmd(dev, &args);
 687         if (ret)
 688                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 689                         "I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT\n");
 690
 691         return ret;
 692 }
 693
 694 static int
 695 i40evf_configure_queues(struct rte_eth_dev *dev)
 696 {
 697         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 698
 699         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
 700                 /* To support DPDK PF host */
 701                 return i40evf_configure_vsi_queues_ext(dev);
 702         else
 703                 /* To support Linux PF host */
 704                 return i40evf_configure_vsi_queues(dev);
 705 }
 706
 707 static int
 708 i40evf_config_irq_map(struct rte_eth_dev *dev)
 709 {
 710         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 711         struct vf_cmd_info args;
 712         uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_irq_map_info) + \
 713                 sizeof(struct i40e_virtchnl_vector_map)];
 714         struct i40e_virtchnl_irq_map_info *map_info;
 715         int i, err;
 716         map_info = (struct i40e_virtchnl_irq_map_info *)cmd_buffer;
 717         map_info->num_vectors = 1;
 718         map_info->vecmap[0].rxitr_idx = I40E_QINT_RQCTL_MSIX_INDX_NOITR;
 719         map_info->vecmap[0].vsi_id = vf->vsi_res->vsi_id;
 720         /* Alway use default dynamic MSIX interrupt */
 721         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
 722                 map_info->vecmap[0].vector_id = I40EVF_VSI_DEFAULT_MSIX_INTR;
 723         else
 724                 map_info->vecmap[0].vector_id = I40EVF_VSI_DEFAULT_MSIX_INTR_LNX;
 725
 726         /* Don't map any tx queue */
 727         map_info->vecmap[0].txq_map = 0;
 728         map_info->vecmap[0].rxq_map = 0;
 729         for (i = 0; i < dev->data->nb_rx_queues; i++)
 730                 map_info->vecmap[0].rxq_map |= 1 << i;
 731
 732         args.ops = I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP;
 733         args.in_args = (u8 *)cmd_buffer;
 734         args.in_args_size = sizeof(cmd_buffer);
 735         args.out_buffer = cmd_result_buffer;
 736         args.out_size = I40E_AQ_BUF_SZ;
 737         err = i40evf_execute_vf_cmd(dev, &args);
 738         if (err)
 739                 PMD_DRV_LOG(ERR, "fail to execute command OP_ENABLE_QUEUES");
 740
 741         return err;
 742 }
 743
 744 static int
 745 i40evf_switch_queue(struct rte_eth_dev *dev, bool isrx, uint16_t qid,
 746                                 bool on)
 747 {
 748         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 749         struct i40e_virtchnl_queue_select queue_select;
 750         int err;
 751         struct vf_cmd_info args;
 752         memset(&queue_select, 0, sizeof(queue_select));
 753         queue_select.vsi_id = vf->vsi_res->vsi_id;
 754
 755         if (isrx)
 756                 queue_select.rx_queues |= 1 << qid;
 757         else
 758                 queue_select.tx_queues |= 1 << qid;
 759
 760         if (on)
 761                 args.ops = I40E_VIRTCHNL_OP_ENABLE_QUEUES;
 762         else
 763                 args.ops = I40E_VIRTCHNL_OP_DISABLE_QUEUES;
 764         args.in_args = (u8 *)&queue_select;
 765         args.in_args_size = sizeof(queue_select);
 766         args.out_buffer = cmd_result_buffer;
 767         args.out_size = I40E_AQ_BUF_SZ;
 768         err = i40evf_execute_vf_cmd(dev, &args);
 769         if (err)
 770                 PMD_DRV_LOG(ERR, "fail to switch %s %u %s",
 771                             isrx ? "RX" : "TX", qid, on ? "on" : "off");
 772
 773         return err;
 774 }
 775
 776 static int
 777 i40evf_start_queues(struct rte_eth_dev *dev)
 778 {
 779         struct rte_eth_dev_data *dev_data = dev->data;
 780         int i;
 781         struct i40e_rx_queue *rxq;
 782         struct i40e_tx_queue *txq;
 783
 784         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 785                 rxq = dev_data->rx_queues[i];
 786                 if (rxq->rx_deferred_start)
 787                         continue;
 788                 if (i40evf_dev_rx_queue_start(dev, i) != 0) {
 789                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 790                         return -1;
 791                 }
 792         }
 793
 794         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 795                 txq = dev_data->tx_queues[i];
 796                 if (txq->tx_deferred_start)
 797                         continue;
 798                 if (i40evf_dev_tx_queue_start(dev, i) != 0) {
 799                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 800                         return -1;
 801                 }
 802         }
 803
 804         return 0;
 805 }
 806
 807 static int
 808 i40evf_stop_queues(struct rte_eth_dev *dev)
 809 {
 810         int i;
 811
 812         /* Stop TX queues first */
 813         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 814                 if (i40evf_dev_tx_queue_stop(dev, i) != 0) {
 815                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 816                         return -1;
 817                 }
 818         }
 819
 820         /* Then stop RX queues */
 821         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 822                 if (i40evf_dev_rx_queue_stop(dev, i) != 0) {
 823                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 824                         return -1;
 825                 }
 826         }
 827
 828         return 0;
 829 }
 830
 831 static int
 832 i40evf_add_mac_addr(struct rte_eth_dev *dev, struct ether_addr *addr)
 833 {
 834         struct i40e_virtchnl_ether_addr_list *list;
 835         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 836         uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_ether_addr_list) + \
 837                         sizeof(struct i40e_virtchnl_ether_addr)];
 838         int err;
 839         struct vf_cmd_info args;
 840
 841         if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
 842                 PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
 843                             addr->addr_bytes[0], addr->addr_bytes[1],
 844                             addr->addr_bytes[2], addr->addr_bytes[3],
 845                             addr->addr_bytes[4], addr->addr_bytes[5]);
 846                 return -1;
 847         }
 848
 849         list = (struct i40e_virtchnl_ether_addr_list *)cmd_buffer;
 850         list->vsi_id = vf->vsi_res->vsi_id;
 851         list->num_elements = 1;
 852         (void)rte_memcpy(list->list[0].addr, addr->addr_bytes,
 853                                         sizeof(addr->addr_bytes));
 854
 855         args.ops = I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS;
 856         args.in_args = cmd_buffer;
 857         args.in_args_size = sizeof(cmd_buffer);
 858         args.out_buffer = cmd_result_buffer;
 859         args.out_size = I40E_AQ_BUF_SZ;
 860         err = i40evf_execute_vf_cmd(dev, &args);
 861         if (err)
 862                 PMD_DRV_LOG(ERR, "fail to execute command "
 863                             "OP_ADD_ETHER_ADDRESS");
 864
 865         return err;
 866 }
 867
 868 static int
 869 i40evf_del_mac_addr(struct rte_eth_dev *dev, struct ether_addr *addr)
 870 {
 871         struct i40e_virtchnl_ether_addr_list *list;
 872         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 873         uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_ether_addr_list) + \
 874                         sizeof(struct i40e_virtchnl_ether_addr)];
 875         int err;
 876         struct vf_cmd_info args;
 877
 878         if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
 879                 PMD_DRV_LOG(ERR, "Invalid mac:%x-%x-%x-%x-%x-%x",
 880                             addr->addr_bytes[0], addr->addr_bytes[1],
 881                             addr->addr_bytes[2], addr->addr_bytes[3],
 882                             addr->addr_bytes[4], addr->addr_bytes[5]);
 883                 return -1;
 884         }
 885
 886         list = (struct i40e_virtchnl_ether_addr_list *)cmd_buffer;
 887         list->vsi_id = vf->vsi_res->vsi_id;
 888         list->num_elements = 1;
 889         (void)rte_memcpy(list->list[0].addr, addr->addr_bytes,
 890                         sizeof(addr->addr_bytes));
 891
 892         args.ops = I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS;
 893         args.in_args = cmd_buffer;
 894         args.in_args_size = sizeof(cmd_buffer);
 895         args.out_buffer = cmd_result_buffer;
 896         args.out_size = I40E_AQ_BUF_SZ;
 897         err = i40evf_execute_vf_cmd(dev, &args);
 898         if (err)
 899                 PMD_DRV_LOG(ERR, "fail to execute command "
 900                             "OP_DEL_ETHER_ADDRESS");
 901
 902         return err;
 903 }
 904
 905 static int
 906 i40evf_get_statics(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
 907 {
 908         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 909         struct i40e_virtchnl_queue_select q_stats;
 910         struct i40e_eth_stats *pstats;
 911         int err;
 912         struct vf_cmd_info args;
 913
 914         memset(&q_stats, 0, sizeof(q_stats));
 915         q_stats.vsi_id = vf->vsi_res->vsi_id;
 916         args.ops = I40E_VIRTCHNL_OP_GET_STATS;
 917         args.in_args = (u8 *)&q_stats;
 918         args.in_args_size = sizeof(q_stats);
 919         args.out_buffer = cmd_result_buffer;
 920         args.out_size = I40E_AQ_BUF_SZ;
 921
 922         err = i40evf_execute_vf_cmd(dev, &args);
 923         if (err) {
 924                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_STATS");
 925                 return err;
 926         }
 927         pstats = (struct i40e_eth_stats *)args.out_buffer;
 928         stats->ipackets = pstats->rx_unicast + pstats->rx_multicast +
 929                                                 pstats->rx_broadcast;
 930         stats->opackets = pstats->tx_broadcast + pstats->tx_multicast +
 931                                                 pstats->tx_unicast;
 932         stats->ierrors = pstats->rx_discards;
 933         stats->oerrors = pstats->tx_errors + pstats->tx_discards;
 934         stats->ibytes = pstats->rx_bytes;
 935         stats->obytes = pstats->tx_bytes;
 936
 937         return 0;
 938 }
 939
 940 static int
 941 i40evf_add_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
 942 {
 943         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 944         struct i40e_virtchnl_vlan_filter_list *vlan_list;
 945         uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_vlan_filter_list) +
 946                                                         sizeof(uint16_t)];
 947         int err;
 948         struct vf_cmd_info args;
 949
 950         vlan_list = (struct i40e_virtchnl_vlan_filter_list *)cmd_buffer;
 951         vlan_list->vsi_id = vf->vsi_res->vsi_id;
 952         vlan_list->num_elements = 1;
 953         vlan_list->vlan_id[0] = vlanid;
 954
 955         args.ops = I40E_VIRTCHNL_OP_ADD_VLAN;
 956         args.in_args = (u8 *)&cmd_buffer;
 957         args.in_args_size = sizeof(cmd_buffer);
 958         args.out_buffer = cmd_result_buffer;
 959         args.out_size = I40E_AQ_BUF_SZ;
 960         err = i40evf_execute_vf_cmd(dev, &args);
 961         if (err)
 962                 PMD_DRV_LOG(ERR, "fail to execute command OP_ADD_VLAN");
 963
 964         return err;
 965 }
 966
 967 static int
 968 i40evf_del_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
 969 {
 970         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 971         struct i40e_virtchnl_vlan_filter_list *vlan_list;
 972         uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_vlan_filter_list) +
 973                                                         sizeof(uint16_t)];
 974         int err;
 975         struct vf_cmd_info args;
 976
 977         vlan_list = (struct i40e_virtchnl_vlan_filter_list *)cmd_buffer;
 978         vlan_list->vsi_id = vf->vsi_res->vsi_id;
 979         vlan_list->num_elements = 1;
 980         vlan_list->vlan_id[0] = vlanid;
 981
 982         args.ops = I40E_VIRTCHNL_OP_DEL_VLAN;
 983         args.in_args = (u8 *)&cmd_buffer;
 984         args.in_args_size = sizeof(cmd_buffer);
 985         args.out_buffer = cmd_result_buffer;
 986         args.out_size = I40E_AQ_BUF_SZ;
 987         err = i40evf_execute_vf_cmd(dev, &args);
 988         if (err)
 989                 PMD_DRV_LOG(ERR, "fail to execute command OP_DEL_VLAN");
 990
 991         return err;
 992 }
 993
 994 static int
 995 i40evf_get_link_status(struct rte_eth_dev *dev, struct rte_eth_link *link)
 996 {
 997         int err;
 998         struct vf_cmd_info args;
 999         struct rte_eth_link *new_link;
1000
1001         args.ops = (enum i40e_virtchnl_ops)I40E_VIRTCHNL_OP_GET_LINK_STAT;
1002         args.in_args = NULL;
1003         args.in_args_size = 0;
1004         args.out_buffer = cmd_result_buffer;
1005         args.out_size = I40E_AQ_BUF_SZ;
1006         err = i40evf_execute_vf_cmd(dev, &args);
1007         if (err) {
1008                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_LINK_STAT");
1009                 return err;
1010         }
1011
1012         new_link = (struct rte_eth_link *)args.out_buffer;
1013         (void)rte_memcpy(link, new_link, sizeof(*link));
1014
1015         return 0;
1016 }
1017
1018 static const struct rte_pci_id pci_id_i40evf_map[] = {
1019 #define RTE_PCI_DEV_ID_DECL_I40EVF(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
1020 #include "rte_pci_dev_ids.h"
1021 { .vendor_id = 0, /* sentinel */ },
1022 };
1023
1024 static inline int
1025 i40evf_dev_atomic_write_link_status(struct rte_eth_dev *dev,
1026                                     struct rte_eth_link *link)
1027 {
1028         struct rte_eth_link *dst = &(dev->data->dev_link);
1029         struct rte_eth_link *src = link;
1030
1031         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1032                                         *(uint64_t *)src) == 0)
1033                 return -1;
1034
1035         return 0;
1036 }
1037
1038 static int
1039 i40evf_reset_vf(struct i40e_hw *hw)
1040 {
1041         int i, reset;
1042
1043         if (i40e_vf_reset(hw) != I40E_SUCCESS) {
1044                 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1045                 return -1;
1046         }
1047         /**
1048           * After issuing vf reset command to pf, pf won't necessarily
1049           * reset vf, it depends on what state it exactly is. If it's not
1050           * initialized yet, it won't have vf reset since it's in a certain
1051           * state. If not, it will try to reset. Even vf is reset, pf will
1052           * set I40E_VFGEN_RSTAT to COMPLETE first, then wait 10ms and set
1053           * it to ACTIVE. In this duration, vf may not catch the moment that
1054           * COMPLETE is set. So, for vf, we'll try to wait a long time.
1055           */
1056         rte_delay_ms(200);
1057
1058         for (i = 0; i < MAX_RESET_WAIT_CNT; i++) {
1059                 reset = rd32(hw, I40E_VFGEN_RSTAT) &
1060                         I40E_VFGEN_RSTAT_VFR_STATE_MASK;
1061                 reset = reset >> I40E_VFGEN_RSTAT_VFR_STATE_SHIFT;
1062                 if (I40E_VFR_COMPLETED == reset || I40E_VFR_VFACTIVE == reset)
1063                         break;
1064                 else
1065                         rte_delay_ms(50);
1066         }
1067
1068         if (i >= MAX_RESET_WAIT_CNT) {
1069                 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1070                 return -1;
1071         }
1072
1073         return 0;
1074 }
1075
1076 static int
1077 i40evf_init_vf(struct rte_eth_dev *dev)
1078 {
1079         int i, err, bufsz;
1080         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1081         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1082
1083         vf->adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1084         vf->dev_data = dev->data;
1085         err = i40evf_set_mac_type(hw);
1086         if (err) {
1087                 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err);
1088                 goto err;
1089         }
1090
1091         i40e_init_adminq_parameter(hw);
1092         err = i40e_init_adminq(hw);
1093         if (err) {
1094                 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err);
1095                 goto err;
1096         }
1097
1098
1099         /* Reset VF and wait until it's complete */
1100         if (i40evf_reset_vf(hw)) {
1101                 PMD_INIT_LOG(ERR, "reset NIC failed");
1102                 goto err_aq;
1103         }
1104
1105         /* VF reset, shutdown admin queue and initialize again */
1106         if (i40e_shutdown_adminq(hw) != I40E_SUCCESS) {
1107                 PMD_INIT_LOG(ERR, "i40e_shutdown_adminq failed");
1108                 return -1;
1109         }
1110
1111         i40e_init_adminq_parameter(hw);
1112         if (i40e_init_adminq(hw) != I40E_SUCCESS) {
1113                 PMD_INIT_LOG(ERR, "init_adminq failed");
1114                 return -1;
1115         }
1116         if (i40evf_check_api_version(dev) != 0) {
1117                 PMD_INIT_LOG(ERR, "check_api version failed");
1118                 goto err_aq;
1119         }
1120         bufsz = sizeof(struct i40e_virtchnl_vf_resource) +
1121                 (I40E_MAX_VF_VSI * sizeof(struct i40e_virtchnl_vsi_resource));
1122         vf->vf_res = rte_zmalloc("vf_res", bufsz, 0);
1123         if (!vf->vf_res) {
1124                 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory");
1125                         goto err_aq;
1126         }
1127
1128         if (i40evf_get_vf_resource(dev) != 0) {
1129                 PMD_INIT_LOG(ERR, "i40evf_get_vf_config failed");
1130                 goto err_alloc;
1131         }
1132
1133         /* got VF config message back from PF, now we can parse it */
1134         for (i = 0; i < vf->vf_res->num_vsis; i++) {
1135                 if (vf->vf_res->vsi_res[i].vsi_type == I40E_VSI_SRIOV)
1136                         vf->vsi_res = &vf->vf_res->vsi_res[i];
1137         }
1138
1139         if (!vf->vsi_res) {
1140                 PMD_INIT_LOG(ERR, "no LAN VSI found");
1141                 goto err_alloc;
1142         }
1143
1144         vf->vsi.vsi_id = vf->vsi_res->vsi_id;
1145         vf->vsi.type = vf->vsi_res->vsi_type;
1146         vf->vsi.nb_qps = vf->vsi_res->num_queue_pairs;
1147
1148         /* check mac addr, if it's not valid, genrate one */
1149         if (I40E_SUCCESS != i40e_validate_mac_addr(\
1150                         vf->vsi_res->default_mac_addr))
1151                 eth_random_addr(vf->vsi_res->default_mac_addr);
1152
1153         ether_addr_copy((struct ether_addr *)vf->vsi_res->default_mac_addr,
1154                                         (struct ether_addr *)hw->mac.addr);
1155
1156         return 0;
1157
1158 err_alloc:
1159         rte_free(vf->vf_res);
1160 err_aq:
1161         i40e_shutdown_adminq(hw); /* ignore error */
1162 err:
1163         return -1;
1164 }
1165
1166 static int
1167 i40evf_uninit_vf(struct rte_eth_dev *dev)
1168 {
1169         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1170         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1171
1172         PMD_INIT_FUNC_TRACE();
1173
1174         if (hw->adapter_stopped == 0)
1175                 i40evf_dev_close(dev);
1176         rte_free(vf->vf_res);
1177         vf->vf_res = NULL;
1178
1179         return 0;
1180 }
1181
1182 static int
1183 i40evf_dev_init(struct rte_eth_dev *eth_dev)
1184 {
1185         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(\
1186                         eth_dev->data->dev_private);
1187
1188         PMD_INIT_FUNC_TRACE();
1189
1190         /* assign ops func pointer */
1191         eth_dev->dev_ops = &i40evf_eth_dev_ops;
1192         eth_dev->rx_pkt_burst = &i40e_recv_pkts;
1193         eth_dev->tx_pkt_burst = &i40e_xmit_pkts;
1194
1195         /*
1196          * For secondary processes, we don't initialise any further as primary
1197          * has already done this work.
1198          */
1199         if (rte_eal_process_type() != RTE_PROC_PRIMARY){
1200                 if (eth_dev->data->scattered_rx)
1201                         eth_dev->rx_pkt_burst = i40e_recv_scattered_pkts;
1202                 return 0;
1203         }
1204
1205         hw->vendor_id = eth_dev->pci_dev->id.vendor_id;
1206         hw->device_id = eth_dev->pci_dev->id.device_id;
1207         hw->subsystem_vendor_id = eth_dev->pci_dev->id.subsystem_vendor_id;
1208         hw->subsystem_device_id = eth_dev->pci_dev->id.subsystem_device_id;
1209         hw->bus.device = eth_dev->pci_dev->addr.devid;
1210         hw->bus.func = eth_dev->pci_dev->addr.function;
1211         hw->hw_addr = (void *)eth_dev->pci_dev->mem_resource[0].addr;
1212         hw->adapter_stopped = 0;
1213
1214         if(i40evf_init_vf(eth_dev) != 0) {
1215                 PMD_INIT_LOG(ERR, "Init vf failed");
1216                 return -1;
1217         }
1218
1219         /* copy mac addr */
1220         eth_dev->data->mac_addrs = rte_zmalloc("i40evf_mac",
1221                                         ETHER_ADDR_LEN, 0);
1222         if (eth_dev->data->mac_addrs == NULL) {
1223                 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to "
1224                                 "store MAC addresses", ETHER_ADDR_LEN);
1225                 return -ENOMEM;
1226         }
1227         ether_addr_copy((struct ether_addr *)hw->mac.addr,
1228                 (struct ether_addr *)eth_dev->data->mac_addrs);
1229
1230         return 0;
1231 }
1232
1233 static int
1234 i40evf_dev_uninit(struct rte_eth_dev *eth_dev)
1235 {
1236         PMD_INIT_FUNC_TRACE();
1237
1238         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1239                 return -EPERM;
1240
1241         eth_dev->dev_ops = NULL;
1242         eth_dev->rx_pkt_burst = NULL;
1243         eth_dev->tx_pkt_burst = NULL;
1244
1245         if (i40evf_uninit_vf(eth_dev) != 0) {
1246                 PMD_INIT_LOG(ERR, "i40evf_uninit_vf failed");
1247                 return -1;
1248         }
1249
1250         rte_free(eth_dev->data->mac_addrs);
1251         eth_dev->data->mac_addrs = NULL;
1252
1253         return 0;
1254 }
1255 /*
1256  * virtual function driver struct
1257  */
1258 static struct eth_driver rte_i40evf_pmd = {
1259         .pci_drv = {
1260                 .name = "rte_i40evf_pmd",
1261                 .id_table = pci_id_i40evf_map,
1262                 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_DETACHABLE,
1263         },
1264         .eth_dev_init = i40evf_dev_init,
1265         .eth_dev_uninit = i40evf_dev_uninit,
1266         .dev_private_size = sizeof(struct i40e_adapter),
1267 };
1268
1269 /*
1270  * VF Driver initialization routine.
1271  * Invoked one at EAL init time.
1272  * Register itself as the [Virtual Poll Mode] Driver of PCI Fortville devices.
1273  */
1274 static int
1275 rte_i40evf_pmd_init(const char *name __rte_unused,
1276                     const char *params __rte_unused)
1277 {
1278         PMD_INIT_FUNC_TRACE();
1279
1280         rte_eth_driver_register(&rte_i40evf_pmd);
1281
1282         return 0;
1283 }
1284
1285 static struct rte_driver rte_i40evf_driver = {
1286         .type = PMD_PDEV,
1287         .init = rte_i40evf_pmd_init,
1288 };
1289
1290 PMD_REGISTER_DRIVER(rte_i40evf_driver);
1291
1292 static int
1293 i40evf_dev_configure(struct rte_eth_dev *dev)
1294 {
1295         return i40evf_init_vlan(dev);
1296 }
1297
1298 static int
1299 i40evf_init_vlan(struct rte_eth_dev *dev)
1300 {
1301         struct rte_eth_dev_data *data = dev->data;
1302         int ret;
1303
1304         /* Apply vlan offload setting */
1305         i40evf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
1306
1307         /* Apply pvid setting */
1308         ret = i40evf_vlan_pvid_set(dev, data->dev_conf.txmode.pvid,
1309                                 data->dev_conf.txmode.hw_vlan_insert_pvid);
1310         return ret;
1311 }
1312
1313 static void
1314 i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1315 {
1316         bool enable_vlan_strip = 0;
1317         struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1318         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1319
1320         /* Linux pf host doesn't support vlan offload yet */
1321         if (vf->version_major == I40E_DPDK_VERSION_MAJOR) {
1322                 /* Vlan stripping setting */
1323                 if (mask & ETH_VLAN_STRIP_MASK) {
1324                         /* Enable or disable VLAN stripping */
1325                         if (dev_conf->rxmode.hw_vlan_strip)
1326                                 enable_vlan_strip = 1;
1327                         else
1328                                 enable_vlan_strip = 0;
1329
1330                         i40evf_config_vlan_offload(dev, enable_vlan_strip);
1331                 }
1332         }
1333 }
1334
1335 static int
1336 i40evf_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t pvid, int on)
1337 {
1338         struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1339         struct i40e_vsi_vlan_pvid_info info;
1340         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1341
1342         memset(&info, 0, sizeof(info));
1343         info.on = on;
1344
1345         /* Linux pf host don't support vlan offload yet */
1346         if (vf->version_major == I40E_DPDK_VERSION_MAJOR) {
1347                 if (info.on)
1348                         info.config.pvid = pvid;
1349                 else {
1350                         info.config.reject.tagged =
1351                                 dev_conf->txmode.hw_vlan_reject_tagged;
1352                         info.config.reject.untagged =
1353                                 dev_conf->txmode.hw_vlan_reject_untagged;
1354                 }
1355                 return i40evf_config_vlan_pvid(dev, &info);
1356         }
1357
1358         return 0;
1359 }
1360
1361 static int
1362 i40evf_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1363 {
1364         struct i40e_rx_queue *rxq;
1365         int err = 0;
1366         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1367
1368         PMD_INIT_FUNC_TRACE();
1369
1370         if (rx_queue_id < dev->data->nb_rx_queues) {
1371                 rxq = dev->data->rx_queues[rx_queue_id];
1372
1373                 err = i40e_alloc_rx_queue_mbufs(rxq);
1374                 if (err) {
1375                         PMD_DRV_LOG(ERR, "Failed to allocate RX queue mbuf");
1376                         return err;
1377                 }
1378
1379                 rte_wmb();
1380
1381                 /* Init the RX tail register. */
1382                 I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1383                 I40EVF_WRITE_FLUSH(hw);
1384
1385                 /* Ready to switch the queue on */
1386                 err = i40evf_switch_queue(dev, TRUE, rx_queue_id, TRUE);
1387
1388                 if (err)
1389                         PMD_DRV_LOG(ERR, "Failed to switch RX queue %u on",
1390                                     rx_queue_id);
1391         }
1392
1393         return err;
1394 }
1395
1396 static int
1397 i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1398 {
1399         struct i40e_rx_queue *rxq;
1400         int err;
1401
1402         if (rx_queue_id < dev->data->nb_rx_queues) {
1403                 rxq = dev->data->rx_queues[rx_queue_id];
1404
1405                 err = i40evf_switch_queue(dev, TRUE, rx_queue_id, FALSE);
1406
1407                 if (err) {
1408                         PMD_DRV_LOG(ERR, "Failed to switch RX queue %u off",
1409                                     rx_queue_id);
1410                         return err;
1411                 }
1412
1413                 i40e_rx_queue_release_mbufs(rxq);
1414                 i40e_reset_rx_queue(rxq);
1415         }
1416
1417         return 0;
1418 }
1419
1420 static int
1421 i40evf_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1422 {
1423         int err = 0;
1424
1425         PMD_INIT_FUNC_TRACE();
1426
1427         if (tx_queue_id < dev->data->nb_tx_queues) {
1428
1429                 /* Ready to switch the queue on */
1430                 err = i40evf_switch_queue(dev, FALSE, tx_queue_id, TRUE);
1431
1432                 if (err)
1433                         PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on",
1434                                     tx_queue_id);
1435         }
1436
1437         return err;
1438 }
1439
1440 static int
1441 i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1442 {
1443         struct i40e_tx_queue *txq;
1444         int err;
1445
1446         if (tx_queue_id < dev->data->nb_tx_queues) {
1447                 txq = dev->data->tx_queues[tx_queue_id];
1448
1449                 err = i40evf_switch_queue(dev, FALSE, tx_queue_id, FALSE);
1450
1451                 if (err) {
1452                         PMD_DRV_LOG(ERR, "Failed to switch TX queue %u off",
1453                                     tx_queue_id);
1454                         return err;
1455                 }
1456
1457                 i40e_tx_queue_release_mbufs(txq);
1458                 i40e_reset_tx_queue(txq);
1459         }
1460
1461         return 0;
1462 }
1463
1464 static int
1465 i40evf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1466 {
1467         int ret;
1468
1469         if (on)
1470                 ret = i40evf_add_vlan(dev, vlan_id);
1471         else
1472                 ret = i40evf_del_vlan(dev,vlan_id);
1473
1474         return ret;
1475 }
1476
1477 static int
1478 i40evf_rxq_init(struct rte_eth_dev *dev, struct i40e_rx_queue *rxq)
1479 {
1480         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1481         struct rte_eth_dev_data *dev_data = dev->data;
1482         struct rte_pktmbuf_pool_private *mbp_priv;
1483         uint16_t buf_size, len;
1484
1485         rxq->qrx_tail = hw->hw_addr + I40E_QRX_TAIL1(rxq->queue_id);
1486         I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1487         I40EVF_WRITE_FLUSH(hw);
1488
1489         /* Calculate the maximum packet length allowed */
1490         mbp_priv = rte_mempool_get_priv(rxq->mp);
1491         buf_size = (uint16_t)(mbp_priv->mbuf_data_room_size -
1492                                         RTE_PKTMBUF_HEADROOM);
1493         rxq->hs_mode = i40e_header_split_none;
1494         rxq->rx_hdr_len = 0;
1495         rxq->rx_buf_len = RTE_ALIGN(buf_size, (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
1496         len = rxq->rx_buf_len * I40E_MAX_CHAINED_RX_BUFFERS;
1497         rxq->max_pkt_len = RTE_MIN(len,
1498                 dev_data->dev_conf.rxmode.max_rx_pkt_len);
1499
1500         /**
1501          * Check if the jumbo frame and maximum packet length are set correctly
1502          */
1503         if (dev_data->dev_conf.rxmode.jumbo_frame == 1) {
1504                 if (rxq->max_pkt_len <= ETHER_MAX_LEN ||
1505                     rxq->max_pkt_len > I40E_FRAME_SIZE_MAX) {
1506                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1507                                 "larger than %u and smaller than %u, as jumbo "
1508                                 "frame is enabled", (uint32_t)ETHER_MAX_LEN,
1509                                         (uint32_t)I40E_FRAME_SIZE_MAX);
1510                         return I40E_ERR_CONFIG;
1511                 }
1512         } else {
1513                 if (rxq->max_pkt_len < ETHER_MIN_LEN ||
1514                     rxq->max_pkt_len > ETHER_MAX_LEN) {
1515                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1516                                 "larger than %u and smaller than %u, as jumbo "
1517                                 "frame is disabled", (uint32_t)ETHER_MIN_LEN,
1518                                                 (uint32_t)ETHER_MAX_LEN);
1519                         return I40E_ERR_CONFIG;
1520                 }
1521         }
1522
1523         if (dev_data->dev_conf.rxmode.enable_scatter ||
1524             (rxq->max_pkt_len + 2 * I40E_VLAN_TAG_SIZE) > buf_size) {
1525                 dev_data->scattered_rx = 1;
1526                 dev->rx_pkt_burst = i40e_recv_scattered_pkts;
1527         }
1528
1529         return 0;
1530 }
1531
1532 static int
1533 i40evf_rx_init(struct rte_eth_dev *dev)
1534 {
1535         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1536         uint16_t i;
1537         struct i40e_rx_queue **rxq =
1538                 (struct i40e_rx_queue **)dev->data->rx_queues;
1539
1540         i40evf_config_rss(vf);
1541         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1542                 if (!rxq[i] || !rxq[i]->q_set)
1543                         continue;
1544                 if (i40evf_rxq_init(dev, rxq[i]) < 0)
1545                         return -EFAULT;
1546         }
1547
1548         return 0;
1549 }
1550
1551 static void
1552 i40evf_tx_init(struct rte_eth_dev *dev)
1553 {
1554         uint16_t i;
1555         struct i40e_tx_queue **txq =
1556                 (struct i40e_tx_queue **)dev->data->tx_queues;
1557         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1558
1559         for (i = 0; i < dev->data->nb_tx_queues; i++)
1560                 txq[i]->qtx_tail = hw->hw_addr + I40E_QTX_TAIL1(i);
1561 }
1562
1563 static inline void
1564 i40evf_enable_queues_intr(struct rte_eth_dev *dev)
1565 {
1566         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1567         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1568
1569         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
1570                 /* To support DPDK PF host */
1571                 I40E_WRITE_REG(hw,
1572                         I40E_VFINT_DYN_CTLN1(I40EVF_VSI_DEFAULT_MSIX_INTR - 1),
1573                         I40E_VFINT_DYN_CTLN1_INTENA_MASK |
1574                         I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
1575         else
1576                 /* To support Linux PF host */
1577                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1578                                 I40E_VFINT_DYN_CTL01_INTENA_MASK |
1579                                 I40E_VFINT_DYN_CTL01_CLEARPBA_MASK);
1580 }
1581
1582 static inline void
1583 i40evf_disable_queues_intr(struct rte_eth_dev *dev)
1584 {
1585         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1586         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1587
1588         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
1589                 I40E_WRITE_REG(hw,
1590                         I40E_VFINT_DYN_CTLN1(I40EVF_VSI_DEFAULT_MSIX_INTR - 1),
1591                         0);
1592         else
1593                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01, 0);
1594 }
1595
1596 static int
1597 i40evf_dev_start(struct rte_eth_dev *dev)
1598 {
1599         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1600         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1601         struct ether_addr mac_addr;
1602
1603         PMD_INIT_FUNC_TRACE();
1604
1605         hw->adapter_stopped = 0;
1606
1607         vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
1608         vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
1609                                         dev->data->nb_tx_queues);
1610
1611         if (i40evf_rx_init(dev) != 0){
1612                 PMD_DRV_LOG(ERR, "failed to do RX init");
1613                 return -1;
1614         }
1615
1616         i40evf_tx_init(dev);
1617
1618         if (i40evf_configure_queues(dev) != 0) {
1619                 PMD_DRV_LOG(ERR, "configure queues failed");
1620                 goto err_queue;
1621         }
1622         if (i40evf_config_irq_map(dev)) {
1623                 PMD_DRV_LOG(ERR, "config_irq_map failed");
1624                 goto err_queue;
1625         }
1626
1627         /* Set mac addr */
1628         (void)rte_memcpy(mac_addr.addr_bytes, hw->mac.addr,
1629                                 sizeof(mac_addr.addr_bytes));
1630         if (i40evf_add_mac_addr(dev, &mac_addr)) {
1631                 PMD_DRV_LOG(ERR, "Failed to add mac addr");
1632                 goto err_queue;
1633         }
1634
1635         if (i40evf_start_queues(dev) != 0) {
1636                 PMD_DRV_LOG(ERR, "enable queues failed");
1637                 goto err_mac;
1638         }
1639
1640         i40evf_enable_queues_intr(dev);
1641         return 0;
1642
1643 err_mac:
1644         i40evf_del_mac_addr(dev, &mac_addr);
1645 err_queue:
1646         return -1;
1647 }
1648
1649 static void
1650 i40evf_dev_stop(struct rte_eth_dev *dev)
1651 {
1652         PMD_INIT_FUNC_TRACE();
1653
1654         i40evf_disable_queues_intr(dev);
1655         i40evf_stop_queues(dev);
1656         i40e_dev_clear_queues(dev);
1657 }
1658
1659 static int
1660 i40evf_dev_link_update(struct rte_eth_dev *dev,
1661                        __rte_unused int wait_to_complete)
1662 {
1663         struct rte_eth_link new_link;
1664         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1665         /*
1666          * DPDK pf host provide interfacet to acquire link status
1667          * while Linux driver does not
1668          */
1669         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
1670                 i40evf_get_link_status(dev, &new_link);
1671         else {
1672                 /* Always assume it's up, for Linux driver PF host */
1673                 new_link.link_duplex = ETH_LINK_AUTONEG_DUPLEX;
1674                 new_link.link_speed  = ETH_LINK_SPEED_10000;
1675                 new_link.link_status = 1;
1676         }
1677         i40evf_dev_atomic_write_link_status(dev, &new_link);
1678
1679         return 0;
1680 }
1681
1682 static void
1683 i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev)
1684 {
1685         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1686         int ret;
1687
1688         /* If enabled, just return */
1689         if (vf->promisc_unicast_enabled)
1690                 return;
1691
1692         ret = i40evf_config_promisc(dev, 1, vf->promisc_multicast_enabled);
1693         if (ret == 0)
1694                 vf->promisc_unicast_enabled = TRUE;
1695 }
1696
1697 static void
1698 i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev)
1699 {
1700         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1701         int ret;
1702
1703         /* If disabled, just return */
1704         if (!vf->promisc_unicast_enabled)
1705                 return;
1706
1707         ret = i40evf_config_promisc(dev, 0, vf->promisc_multicast_enabled);
1708         if (ret == 0)
1709                 vf->promisc_unicast_enabled = FALSE;
1710 }
1711
1712 static void
1713 i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev)
1714 {
1715         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1716         int ret;
1717
1718         /* If enabled, just return */
1719         if (vf->promisc_multicast_enabled)
1720                 return;
1721
1722         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 1);
1723         if (ret == 0)
1724                 vf->promisc_multicast_enabled = TRUE;
1725 }
1726
1727 static void
1728 i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev)
1729 {
1730         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1731         int ret;
1732
1733         /* If enabled, just return */
1734         if (!vf->promisc_multicast_enabled)
1735                 return;
1736
1737         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 0);
1738         if (ret == 0)
1739                 vf->promisc_multicast_enabled = FALSE;
1740 }
1741
1742 static void
1743 i40evf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
1744 {
1745         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1746
1747         memset(dev_info, 0, sizeof(*dev_info));
1748         dev_info->max_rx_queues = vf->vsi_res->num_queue_pairs;
1749         dev_info->max_tx_queues = vf->vsi_res->num_queue_pairs;
1750         dev_info->min_rx_bufsize = I40E_BUF_SIZE_MIN;
1751         dev_info->max_rx_pktlen = I40E_FRAME_SIZE_MAX;
1752         dev_info->hash_key_size = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
1753         dev_info->reta_size = ETH_RSS_RETA_SIZE_64;
1754         dev_info->flow_type_rss_offloads = I40E_RSS_OFFLOAD_ALL;
1755         dev_info->rx_offload_capa =
1756                 DEV_RX_OFFLOAD_VLAN_STRIP |
1757                 DEV_RX_OFFLOAD_QINQ_STRIP |
1758                 DEV_RX_OFFLOAD_IPV4_CKSUM |
1759                 DEV_RX_OFFLOAD_UDP_CKSUM |
1760                 DEV_RX_OFFLOAD_TCP_CKSUM;
1761         dev_info->tx_offload_capa =
1762                 DEV_TX_OFFLOAD_VLAN_INSERT |
1763                 DEV_TX_OFFLOAD_QINQ_INSERT |
1764                 DEV_TX_OFFLOAD_IPV4_CKSUM |
1765                 DEV_TX_OFFLOAD_UDP_CKSUM |
1766                 DEV_TX_OFFLOAD_TCP_CKSUM |
1767                 DEV_TX_OFFLOAD_SCTP_CKSUM;
1768
1769         dev_info->default_rxconf = (struct rte_eth_rxconf) {
1770                 .rx_thresh = {
1771                         .pthresh = I40E_DEFAULT_RX_PTHRESH,
1772                         .hthresh = I40E_DEFAULT_RX_HTHRESH,
1773                         .wthresh = I40E_DEFAULT_RX_WTHRESH,
1774                 },
1775                 .rx_free_thresh = I40E_DEFAULT_RX_FREE_THRESH,
1776                 .rx_drop_en = 0,
1777         };
1778
1779         dev_info->default_txconf = (struct rte_eth_txconf) {
1780                 .tx_thresh = {
1781                         .pthresh = I40E_DEFAULT_TX_PTHRESH,
1782                         .hthresh = I40E_DEFAULT_TX_HTHRESH,
1783                         .wthresh = I40E_DEFAULT_TX_WTHRESH,
1784                 },
1785                 .tx_free_thresh = I40E_DEFAULT_TX_FREE_THRESH,
1786                 .tx_rs_thresh = I40E_DEFAULT_TX_RSBIT_THRESH,
1787                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
1788                                 ETH_TXQ_FLAGS_NOOFFLOADS,
1789         };
1790 }
1791
1792 static void
1793 i40evf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1794 {
1795         if (i40evf_get_statics(dev, stats))
1796                 PMD_DRV_LOG(ERR, "Get statics failed");
1797 }
1798
1799 static void
1800 i40evf_dev_close(struct rte_eth_dev *dev)
1801 {
1802         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1803
1804         i40evf_dev_stop(dev);
1805         hw->adapter_stopped = 1;
1806         i40e_dev_free_queues(dev);
1807         i40evf_reset_vf(hw);
1808         i40e_shutdown_adminq(hw);
1809 }
1810
1811 static int
1812 i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
1813                            struct rte_eth_rss_reta_entry64 *reta_conf,
1814                            uint16_t reta_size)
1815 {
1816         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1817         uint32_t lut, l;
1818         uint16_t i, j;
1819         uint16_t idx, shift;
1820         uint8_t mask;
1821
1822         if (reta_size != ETH_RSS_RETA_SIZE_64) {
1823                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
1824                         "(%d) doesn't match the number of hardware can "
1825                         "support (%d)\n", reta_size, ETH_RSS_RETA_SIZE_64);
1826                 return -EINVAL;
1827         }
1828
1829         for (i = 0; i < reta_size; i += I40E_4_BIT_WIDTH) {
1830                 idx = i / RTE_RETA_GROUP_SIZE;
1831                 shift = i % RTE_RETA_GROUP_SIZE;
1832                 mask = (uint8_t)((reta_conf[idx].mask >> shift) &
1833                                                 I40E_4_BIT_MASK);
1834                 if (!mask)
1835                         continue;
1836                 if (mask == I40E_4_BIT_MASK)
1837                         l = 0;
1838                 else
1839                         l = I40E_READ_REG(hw, I40E_VFQF_HLUT(i >> 2));
1840
1841                 for (j = 0, lut = 0; j < I40E_4_BIT_WIDTH; j++) {
1842                         if (mask & (0x1 << j))
1843                                 lut |= reta_conf[idx].reta[shift + j] <<
1844                                                         (CHAR_BIT * j);
1845                         else
1846                                 lut |= l & (I40E_8_BIT_MASK << (CHAR_BIT * j));
1847                 }
1848                 I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
1849         }
1850
1851         return 0;
1852 }
1853
1854 static int
1855 i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
1856                           struct rte_eth_rss_reta_entry64 *reta_conf,
1857                           uint16_t reta_size)
1858 {
1859         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1860         uint32_t lut;
1861         uint16_t i, j;
1862         uint16_t idx, shift;
1863         uint8_t mask;
1864
1865         if (reta_size != ETH_RSS_RETA_SIZE_64) {
1866                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
1867                         "(%d) doesn't match the number of hardware can "
1868                         "support (%d)\n", reta_size, ETH_RSS_RETA_SIZE_64);
1869                 return -EINVAL;
1870         }
1871
1872         for (i = 0; i < reta_size; i += I40E_4_BIT_WIDTH) {
1873                 idx = i / RTE_RETA_GROUP_SIZE;
1874                 shift = i % RTE_RETA_GROUP_SIZE;
1875                 mask = (uint8_t)((reta_conf[idx].mask >> shift) &
1876                                                 I40E_4_BIT_MASK);
1877                 if (!mask)
1878                         continue;
1879
1880                 lut = I40E_READ_REG(hw, I40E_VFQF_HLUT(i >> 2));
1881                 for (j = 0; j < I40E_4_BIT_WIDTH; j++) {
1882                         if (mask & (0x1 << j))
1883                                 reta_conf[idx].reta[shift + j] =
1884                                         ((lut >> (CHAR_BIT * j)) &
1885                                                 I40E_8_BIT_MASK);
1886                 }
1887         }
1888
1889         return 0;
1890 }
1891
1892 static int
1893 i40evf_hw_rss_hash_set(struct i40e_hw *hw, struct rte_eth_rss_conf *rss_conf)
1894 {
1895         uint32_t *hash_key;
1896         uint8_t hash_key_len;
1897         uint64_t rss_hf, hena;
1898
1899         hash_key = (uint32_t *)(rss_conf->rss_key);
1900         hash_key_len = rss_conf->rss_key_len;
1901         if (hash_key != NULL && hash_key_len >=
1902                 (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t)) {
1903                 uint16_t i;
1904
1905                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
1906                         I40E_WRITE_REG(hw, I40E_VFQF_HKEY(i), hash_key[i]);
1907         }
1908
1909         rss_hf = rss_conf->rss_hf;
1910         hena = (uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(0));
1911         hena |= ((uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(1))) << 32;
1912         hena &= ~I40E_RSS_HENA_ALL;
1913         hena |= i40e_config_hena(rss_hf);
1914         I40E_WRITE_REG(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
1915         I40E_WRITE_REG(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
1916         I40EVF_WRITE_FLUSH(hw);
1917
1918         return 0;
1919 }
1920
1921 static void
1922 i40evf_disable_rss(struct i40e_vf *vf)
1923 {
1924         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
1925         uint64_t hena;
1926
1927         hena = (uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(0));
1928         hena |= ((uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(1))) << 32;
1929         hena &= ~I40E_RSS_HENA_ALL;
1930         I40E_WRITE_REG(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
1931         I40E_WRITE_REG(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
1932         I40EVF_WRITE_FLUSH(hw);
1933 }
1934
1935 static int
1936 i40evf_config_rss(struct i40e_vf *vf)
1937 {
1938         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
1939         struct rte_eth_rss_conf rss_conf;
1940         uint32_t i, j, lut = 0, nb_q = (I40E_VFQF_HLUT_MAX_INDEX + 1) * 4;
1941         uint16_t num;
1942
1943         if (vf->dev_data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
1944                 i40evf_disable_rss(vf);
1945                 PMD_DRV_LOG(DEBUG, "RSS not configured\n");
1946                 return 0;
1947         }
1948
1949         num = i40e_align_floor(vf->dev_data->nb_rx_queues);
1950         /* Fill out the look up table */
1951         for (i = 0, j = 0; i < nb_q; i++, j++) {
1952                 if (j >= num)
1953                         j = 0;
1954                 lut = (lut << 8) | j;
1955                 if ((i & 3) == 3)
1956                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
1957         }
1958
1959         rss_conf = vf->dev_data->dev_conf.rx_adv_conf.rss_conf;
1960         if ((rss_conf.rss_hf & I40E_RSS_OFFLOAD_ALL) == 0) {
1961                 i40evf_disable_rss(vf);
1962                 PMD_DRV_LOG(DEBUG, "No hash flag is set\n");
1963                 return 0;
1964         }
1965
1966         if (rss_conf.rss_key == NULL || rss_conf.rss_key_len < nb_q) {
1967                 /* Calculate the default hash key */
1968                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
1969                         rss_key_default[i] = (uint32_t)rte_rand();
1970                 rss_conf.rss_key = (uint8_t *)rss_key_default;
1971                 rss_conf.rss_key_len = nb_q;
1972         }
1973
1974         return i40evf_hw_rss_hash_set(hw, &rss_conf);
1975 }
1976
1977 static int
1978 i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
1979                            struct rte_eth_rss_conf *rss_conf)
1980 {
1981         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1982         uint64_t rss_hf = rss_conf->rss_hf & I40E_RSS_OFFLOAD_ALL;
1983         uint64_t hena;
1984
1985         hena = (uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(0));
1986         hena |= ((uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(1))) << 32;
1987         if (!(hena & I40E_RSS_HENA_ALL)) { /* RSS disabled */
1988                 if (rss_hf != 0) /* Enable RSS */
1989                         return -EINVAL;
1990                 return 0;
1991         }
1992
1993         /* RSS enabled */
1994         if (rss_hf == 0) /* Disable RSS */
1995                 return -EINVAL;
1996
1997         return i40evf_hw_rss_hash_set(hw, rss_conf);
1998 }
1999
2000 static int
2001 i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
2002                              struct rte_eth_rss_conf *rss_conf)
2003 {
2004         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2005         uint32_t *hash_key = (uint32_t *)(rss_conf->rss_key);
2006         uint64_t hena;
2007         uint16_t i;
2008
2009         if (hash_key) {
2010                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2011                         hash_key[i] = I40E_READ_REG(hw, I40E_VFQF_HKEY(i));
2012                 rss_conf->rss_key_len = i * sizeof(uint32_t);
2013         }
2014         hena = (uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(0));
2015         hena |= ((uint64_t)I40E_READ_REG(hw, I40E_VFQF_HENA(1))) << 32;
2016         rss_conf->rss_hf = i40e_parse_hena(hena);
2017
2018         return 0;
2019 }