drivers/net/i40e/i40e_ethdev_vf.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2010-2016 Intel Corporation
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdio.h>
   7 #include <errno.h>
   8 #include <stdint.h>
   9 #include <string.h>
  10 #include <unistd.h>
  11 #include <stdarg.h>
  12 #include <inttypes.h>
  13 #include <rte_byteorder.h>
  14 #include <rte_common.h>
  15 #include <rte_cycles.h>
  16
  17 #include <rte_interrupts.h>
  18 #include <rte_log.h>
  19 #include <rte_debug.h>
  20 #include <rte_pci.h>
  21 #include <rte_bus_pci.h>
  22 #include <rte_atomic.h>
  23 #include <rte_branch_prediction.h>
  24 #include <rte_memory.h>
  25 #include <rte_eal.h>
  26 #include <rte_alarm.h>
  27 #include <rte_ether.h>
  28 #include <rte_ethdev_driver.h>
  29 #include <rte_ethdev_pci.h>
  30 #include <rte_malloc.h>
  31 #include <rte_dev.h>
  32
  33 #include "i40e_logs.h"
  34 #include "base/i40e_prototype.h"
  35 #include "base/i40e_adminq_cmd.h"
  36 #include "base/i40e_type.h"
  37
  38 #include "i40e_rxtx.h"
  39 #include "i40e_ethdev.h"
  40 #include "i40e_pf.h"
  41
  42 /* busy wait delay in msec */
  43 #define I40EVF_BUSY_WAIT_DELAY 10
  44 #define I40EVF_BUSY_WAIT_COUNT 50
  45 #define MAX_RESET_WAIT_CNT     20
  46
  47 #define I40EVF_ALARM_INTERVAL 50000 /* us */
  48
  49 struct i40evf_arq_msg_info {
  50         enum virtchnl_ops ops;
  51         enum i40e_status_code result;
  52         uint16_t buf_len;
  53         uint16_t msg_len;
  54         uint8_t *msg;
  55 };
  56
  57 struct vf_cmd_info {
  58         enum virtchnl_ops ops;
  59         uint8_t *in_args;
  60         uint32_t in_args_size;
  61         uint8_t *out_buffer;
  62         /* Input & output type. pass in buffer size and pass out
  63          * actual return result
  64          */
  65         uint32_t out_size;
  66 };
  67
  68 enum i40evf_aq_result {
  69         I40EVF_MSG_ERR = -1, /* Meet error when accessing admin queue */
  70         I40EVF_MSG_NON,      /* Read nothing from admin queue */
  71         I40EVF_MSG_SYS,      /* Read system msg from admin queue */
  72         I40EVF_MSG_CMD,      /* Read async command result */
  73 };
  74
  75 static int i40evf_dev_configure(struct rte_eth_dev *dev);
  76 static int i40evf_dev_start(struct rte_eth_dev *dev);
  77 static void i40evf_dev_stop(struct rte_eth_dev *dev);
  78 static int i40evf_dev_info_get(struct rte_eth_dev *dev,
  79                                struct rte_eth_dev_info *dev_info);
  80 static int i40evf_dev_link_update(struct rte_eth_dev *dev,
  81                                   int wait_to_complete);
  82 static int i40evf_dev_stats_get(struct rte_eth_dev *dev,
  83                                 struct rte_eth_stats *stats);
  84 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
  85                                  struct rte_eth_xstat *xstats, unsigned n);
  86 static int i40evf_dev_xstats_get_names(struct rte_eth_dev *dev,
  87                                        struct rte_eth_xstat_name *xstats_names,
  88                                        unsigned limit);
  89 static int i40evf_dev_xstats_reset(struct rte_eth_dev *dev);
  90 static int i40evf_vlan_filter_set(struct rte_eth_dev *dev,
  91                                   uint16_t vlan_id, int on);
  92 static int i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask);
  93 static void i40evf_dev_close(struct rte_eth_dev *dev);
  94 static int i40evf_dev_reset(struct rte_eth_dev *dev);
  95 static int i40evf_check_vf_reset_done(struct rte_eth_dev *dev);
  96 static int i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev);
  97 static int i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev);
  98 static int i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev);
  99 static int i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev);
 100 static int i40evf_init_vlan(struct rte_eth_dev *dev);
 101 static int i40evf_dev_rx_queue_start(struct rte_eth_dev *dev,
 102                                      uint16_t rx_queue_id);
 103 static int i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev,
 104                                     uint16_t rx_queue_id);
 105 static int i40evf_dev_tx_queue_start(struct rte_eth_dev *dev,
 106                                      uint16_t tx_queue_id);
 107 static int i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev,
 108                                     uint16_t tx_queue_id);
 109 static int i40evf_add_mac_addr(struct rte_eth_dev *dev,
 110                                struct rte_ether_addr *addr,
 111                                uint32_t index,
 112                                uint32_t pool);
 113 static void i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index);
 114 static int i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
 115                         struct rte_eth_rss_reta_entry64 *reta_conf,
 116                         uint16_t reta_size);
 117 static int i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
 118                         struct rte_eth_rss_reta_entry64 *reta_conf,
 119                         uint16_t reta_size);
 120 static int i40evf_config_rss(struct i40e_vf *vf);
 121 static int i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
 122                                       struct rte_eth_rss_conf *rss_conf);
 123 static int i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
 124                                         struct rte_eth_rss_conf *rss_conf);
 125 static int i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
 126 static int i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
 127                                         struct rte_ether_addr *mac_addr);
 128 static int
 129 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id);
 130 static int
 131 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id);
 132 static void i40evf_handle_pf_event(struct rte_eth_dev *dev,
 133                                    uint8_t *msg,
 134                                    uint16_t msglen);
 135
 136 static int
 137 i40evf_add_del_mc_addr_list(struct rte_eth_dev *dev,
 138                         struct rte_ether_addr *mc_addr_set,
 139                         uint32_t nb_mc_addr, bool add);
 140 static int
 141 i40evf_set_mc_addr_list(struct rte_eth_dev *dev,
 142                         struct rte_ether_addr *mc_addr_set,
 143                         uint32_t nb_mc_addr);
 144 static void
 145 i40evf_dev_alarm_handler(void *param);
 146
 147 /* Default hash key buffer for RSS */
 148 static uint32_t rss_key_default[I40E_VFQF_HKEY_MAX_INDEX + 1];
 149
 150 struct rte_i40evf_xstats_name_off {
 151         char name[RTE_ETH_XSTATS_NAME_SIZE];
 152         unsigned offset;
 153 };
 154
 155 static const struct rte_i40evf_xstats_name_off rte_i40evf_stats_strings[] = {
 156         {"rx_bytes", offsetof(struct i40e_eth_stats, rx_bytes)},
 157         {"rx_unicast_packets", offsetof(struct i40e_eth_stats, rx_unicast)},
 158         {"rx_multicast_packets", offsetof(struct i40e_eth_stats, rx_multicast)},
 159         {"rx_broadcast_packets", offsetof(struct i40e_eth_stats, rx_broadcast)},
 160         {"rx_dropped_packets", offsetof(struct i40e_eth_stats, rx_discards)},
 161         {"rx_unknown_protocol_packets", offsetof(struct i40e_eth_stats,
 162                 rx_unknown_protocol)},
 163         {"tx_bytes", offsetof(struct i40e_eth_stats, tx_bytes)},
 164         {"tx_unicast_packets", offsetof(struct i40e_eth_stats, tx_unicast)},
 165         {"tx_multicast_packets", offsetof(struct i40e_eth_stats, tx_multicast)},
 166         {"tx_broadcast_packets", offsetof(struct i40e_eth_stats, tx_broadcast)},
 167         {"tx_dropped_packets", offsetof(struct i40e_eth_stats, tx_discards)},
 168         {"tx_error_packets", offsetof(struct i40e_eth_stats, tx_errors)},
 169 };
 170
 171 #define I40EVF_NB_XSTATS (sizeof(rte_i40evf_stats_strings) / \
 172                 sizeof(rte_i40evf_stats_strings[0]))
 173
 174 static const struct eth_dev_ops i40evf_eth_dev_ops = {
 175         .dev_configure        = i40evf_dev_configure,
 176         .dev_start            = i40evf_dev_start,
 177         .dev_stop             = i40evf_dev_stop,
 178         .promiscuous_enable   = i40evf_dev_promiscuous_enable,
 179         .promiscuous_disable  = i40evf_dev_promiscuous_disable,
 180         .allmulticast_enable  = i40evf_dev_allmulticast_enable,
 181         .allmulticast_disable = i40evf_dev_allmulticast_disable,
 182         .link_update          = i40evf_dev_link_update,
 183         .stats_get            = i40evf_dev_stats_get,
 184         .stats_reset          = i40evf_dev_xstats_reset,
 185         .xstats_get           = i40evf_dev_xstats_get,
 186         .xstats_get_names     = i40evf_dev_xstats_get_names,
 187         .xstats_reset         = i40evf_dev_xstats_reset,
 188         .dev_close            = i40evf_dev_close,
 189         .dev_reset            = i40evf_dev_reset,
 190         .dev_infos_get        = i40evf_dev_info_get,
 191         .dev_supported_ptypes_get = i40e_dev_supported_ptypes_get,
 192         .vlan_filter_set      = i40evf_vlan_filter_set,
 193         .vlan_offload_set     = i40evf_vlan_offload_set,
 194         .rx_queue_start       = i40evf_dev_rx_queue_start,
 195         .rx_queue_stop        = i40evf_dev_rx_queue_stop,
 196         .tx_queue_start       = i40evf_dev_tx_queue_start,
 197         .tx_queue_stop        = i40evf_dev_tx_queue_stop,
 198         .rx_queue_setup       = i40e_dev_rx_queue_setup,
 199         .rx_queue_release     = i40e_dev_rx_queue_release,
 200         .rx_queue_intr_enable = i40evf_dev_rx_queue_intr_enable,
 201         .rx_queue_intr_disable = i40evf_dev_rx_queue_intr_disable,
 202         .rx_descriptor_done   = i40e_dev_rx_descriptor_done,
 203         .rx_descriptor_status = i40e_dev_rx_descriptor_status,
 204         .tx_descriptor_status = i40e_dev_tx_descriptor_status,
 205         .tx_queue_setup       = i40e_dev_tx_queue_setup,
 206         .tx_queue_release     = i40e_dev_tx_queue_release,
 207         .rx_queue_count       = i40e_dev_rx_queue_count,
 208         .rxq_info_get         = i40e_rxq_info_get,
 209         .txq_info_get         = i40e_txq_info_get,
 210         .mac_addr_add         = i40evf_add_mac_addr,
 211         .mac_addr_remove      = i40evf_del_mac_addr,
 212         .set_mc_addr_list     = i40evf_set_mc_addr_list,
 213         .reta_update          = i40evf_dev_rss_reta_update,
 214         .reta_query           = i40evf_dev_rss_reta_query,
 215         .rss_hash_update      = i40evf_dev_rss_hash_update,
 216         .rss_hash_conf_get    = i40evf_dev_rss_hash_conf_get,
 217         .mtu_set              = i40evf_dev_mtu_set,
 218         .mac_addr_set         = i40evf_set_default_mac_addr,
 219         .tx_done_cleanup      = i40e_tx_done_cleanup,
 220 };
 221
 222 /*
 223  * Read data in admin queue to get msg from pf driver
 224  */
 225 static enum i40evf_aq_result
 226 i40evf_read_pfmsg(struct rte_eth_dev *dev, struct i40evf_arq_msg_info *data)
 227 {
 228         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 229         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 230         struct i40e_arq_event_info event;
 231         enum virtchnl_ops opcode;
 232         enum i40e_status_code retval;
 233         int ret;
 234         enum i40evf_aq_result result = I40EVF_MSG_NON;
 235
 236         event.buf_len = data->buf_len;
 237         event.msg_buf = data->msg;
 238         ret = i40e_clean_arq_element(hw, &event, NULL);
 239         /* Can't read any msg from adminQ */
 240         if (ret) {
 241                 if (ret != I40E_ERR_ADMIN_QUEUE_NO_WORK)
 242                         result = I40EVF_MSG_ERR;
 243                 return result;
 244         }
 245
 246         opcode = (enum virtchnl_ops)rte_le_to_cpu_32(event.desc.cookie_high);
 247         retval = (enum i40e_status_code)rte_le_to_cpu_32(event.desc.cookie_low);
 248         /* pf sys event */
 249         if (opcode == VIRTCHNL_OP_EVENT) {
 250                 struct virtchnl_pf_event *vpe =
 251                         (struct virtchnl_pf_event *)event.msg_buf;
 252
 253                 result = I40EVF_MSG_SYS;
 254                 switch (vpe->event) {
 255                 case VIRTCHNL_EVENT_LINK_CHANGE:
 256                         vf->link_up =
 257                                 vpe->event_data.link_event.link_status;
 258                         vf->link_speed =
 259                                 vpe->event_data.link_event.link_speed;
 260                         vf->pend_msg |= PFMSG_LINK_CHANGE;
 261                         PMD_DRV_LOG(INFO, "Link status update:%s",
 262                                     vf->link_up ? "up" : "down");
 263                         break;
 264                 case VIRTCHNL_EVENT_RESET_IMPENDING:
 265                         vf->vf_reset = true;
 266                         vf->pend_msg |= PFMSG_RESET_IMPENDING;
 267                         PMD_DRV_LOG(INFO, "vf is reseting");
 268                         break;
 269                 case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
 270                         vf->dev_closed = true;
 271                         vf->pend_msg |= PFMSG_DRIVER_CLOSE;
 272                         PMD_DRV_LOG(INFO, "PF driver closed");
 273                         break;
 274                 default:
 275                         PMD_DRV_LOG(ERR, "%s: Unknown event %d from pf",
 276                                     __func__, vpe->event);
 277                 }
 278         } else {
 279                 /* async reply msg on command issued by vf previously */
 280                 result = I40EVF_MSG_CMD;
 281                 /* Actual data length read from PF */
 282                 data->msg_len = event.msg_len;
 283         }
 284
 285         data->result = retval;
 286         data->ops = opcode;
 287
 288         return result;
 289 }
 290
 291 /**
 292  * clear current command. Only call in case execute
 293  * _atomic_set_cmd successfully.
 294  */
 295 static inline void
 296 _clear_cmd(struct i40e_vf *vf)
 297 {
 298         rte_wmb();
 299         vf->pend_cmd = VIRTCHNL_OP_UNKNOWN;
 300 }
 301
 302 /*
 303  * Check there is pending cmd in execution. If none, set new command.
 304  */
 305 static inline int
 306 _atomic_set_cmd(struct i40e_vf *vf, enum virtchnl_ops ops)
 307 {
 308         int ret = rte_atomic32_cmpset(&vf->pend_cmd,
 309                         VIRTCHNL_OP_UNKNOWN, ops);
 310
 311         if (!ret)
 312                 PMD_DRV_LOG(ERR, "There is incomplete cmd %d", vf->pend_cmd);
 313
 314         return !ret;
 315 }
 316
 317 #define MAX_TRY_TIMES 200
 318 #define ASQ_DELAY_MS  10
 319
 320 static int
 321 i40evf_execute_vf_cmd(struct rte_eth_dev *dev, struct vf_cmd_info *args)
 322 {
 323         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 324         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 325         struct i40evf_arq_msg_info info;
 326         enum i40evf_aq_result ret;
 327         int err, i = 0;
 328
 329         if (_atomic_set_cmd(vf, args->ops))
 330                 return -1;
 331
 332         info.msg = args->out_buffer;
 333         info.buf_len = args->out_size;
 334         info.ops = VIRTCHNL_OP_UNKNOWN;
 335         info.result = I40E_SUCCESS;
 336
 337         err = i40e_aq_send_msg_to_pf(hw, args->ops, I40E_SUCCESS,
 338                      args->in_args, args->in_args_size, NULL);
 339         if (err) {
 340                 PMD_DRV_LOG(ERR, "fail to send cmd %d", args->ops);
 341                 _clear_cmd(vf);
 342                 return err;
 343         }
 344
 345         switch (args->ops) {
 346         case VIRTCHNL_OP_RESET_VF:
 347                 /*no need to process in this function */
 348                 err = 0;
 349                 break;
 350         case VIRTCHNL_OP_VERSION:
 351         case VIRTCHNL_OP_GET_VF_RESOURCES:
 352                 /* for init adminq commands, need to poll the response */
 353                 err = -1;
 354                 do {
 355                         ret = i40evf_read_pfmsg(dev, &info);
 356                         vf->cmd_retval = info.result;
 357                         if (ret == I40EVF_MSG_CMD) {
 358                                 err = 0;
 359                                 break;
 360                         } else if (ret == I40EVF_MSG_ERR)
 361                                 break;
 362                         rte_delay_ms(ASQ_DELAY_MS);
 363                         /* If don't read msg or read sys event, continue */
 364                 } while (i++ < MAX_TRY_TIMES);
 365                 _clear_cmd(vf);
 366                 break;
 367         case VIRTCHNL_OP_REQUEST_QUEUES:
 368                 /**
 369                  * ignore async reply, only wait for system message,
 370                  * vf_reset = true if get VIRTCHNL_EVENT_RESET_IMPENDING,
 371                  * if not, means request queues failed.
 372                  */
 373                 err = -1;
 374                 do {
 375                         ret = i40evf_read_pfmsg(dev, &info);
 376                         vf->cmd_retval = info.result;
 377                         if (ret == I40EVF_MSG_SYS && vf->vf_reset) {
 378                                 err = 0;
 379                                 break;
 380                         } else if (ret == I40EVF_MSG_ERR ||
 381                                            ret == I40EVF_MSG_CMD) {
 382                                 break;
 383                         }
 384                         rte_delay_ms(ASQ_DELAY_MS);
 385                         /* If don't read msg or read sys event, continue */
 386                 } while (i++ < MAX_TRY_TIMES);
 387                 _clear_cmd(vf);
 388                 break;
 389
 390         default:
 391                 /* for other adminq in running time, waiting the cmd done flag */
 392                 err = -1;
 393                 do {
 394                         if (vf->pend_cmd == VIRTCHNL_OP_UNKNOWN) {
 395                                 err = 0;
 396                                 break;
 397                         }
 398                         rte_delay_ms(ASQ_DELAY_MS);
 399                         /* If don't read msg or read sys event, continue */
 400                 } while (i++ < MAX_TRY_TIMES);
 401                 /* If there's no response is received, clear command */
 402                 if (i >= MAX_TRY_TIMES) {
 403                         PMD_DRV_LOG(WARNING, "No response for %d", args->ops);
 404                         _clear_cmd(vf);
 405                 }
 406                 break;
 407         }
 408
 409         return err | vf->cmd_retval;
 410 }
 411
 412 /*
 413  * Check API version with sync wait until version read or fail from admin queue
 414  */
 415 static int
 416 i40evf_check_api_version(struct rte_eth_dev *dev)
 417 {
 418         struct virtchnl_version_info version, *pver;
 419         int err;
 420         struct vf_cmd_info args;
 421         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 422
 423         version.major = VIRTCHNL_VERSION_MAJOR;
 424         version.minor = VIRTCHNL_VERSION_MINOR;
 425
 426         args.ops = VIRTCHNL_OP_VERSION;
 427         args.in_args = (uint8_t *)&version;
 428         args.in_args_size = sizeof(version);
 429         args.out_buffer = vf->aq_resp;
 430         args.out_size = I40E_AQ_BUF_SZ;
 431
 432         err = i40evf_execute_vf_cmd(dev, &args);
 433         if (err) {
 434                 PMD_INIT_LOG(ERR, "fail to execute command OP_VERSION");
 435                 return err;
 436         }
 437
 438         pver = (struct virtchnl_version_info *)args.out_buffer;
 439         vf->version_major = pver->major;
 440         vf->version_minor = pver->minor;
 441         if ((vf->version_major == VIRTCHNL_VERSION_MAJOR) &&
 442                 (vf->version_minor <= VIRTCHNL_VERSION_MINOR))
 443                 PMD_DRV_LOG(INFO, "Peer is Linux PF host");
 444         else {
 445                 PMD_INIT_LOG(ERR, "PF/VF API version mismatch:(%u.%u)-(%u.%u)",
 446                                         vf->version_major, vf->version_minor,
 447                                                 VIRTCHNL_VERSION_MAJOR,
 448                                                 VIRTCHNL_VERSION_MINOR);
 449                 return -1;
 450         }
 451
 452         return 0;
 453 }
 454
 455 static int
 456 i40evf_get_vf_resource(struct rte_eth_dev *dev)
 457 {
 458         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 459         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 460         int err;
 461         struct vf_cmd_info args;
 462         uint32_t caps, len;
 463
 464         args.ops = VIRTCHNL_OP_GET_VF_RESOURCES;
 465         args.out_buffer = vf->aq_resp;
 466         args.out_size = I40E_AQ_BUF_SZ;
 467         if (PF_IS_V11(vf)) {
 468                 caps = VIRTCHNL_VF_OFFLOAD_L2 |
 469                        VIRTCHNL_VF_OFFLOAD_RSS_AQ |
 470                        VIRTCHNL_VF_OFFLOAD_RSS_REG |
 471                        VIRTCHNL_VF_OFFLOAD_VLAN |
 472                        VIRTCHNL_VF_OFFLOAD_RX_POLLING;
 473                 args.in_args = (uint8_t *)&caps;
 474                 args.in_args_size = sizeof(caps);
 475         } else {
 476                 args.in_args = NULL;
 477                 args.in_args_size = 0;
 478         }
 479         err = i40evf_execute_vf_cmd(dev, &args);
 480
 481         if (err) {
 482                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_VF_RESOURCE");
 483                 return err;
 484         }
 485
 486         len =  sizeof(struct virtchnl_vf_resource) +
 487                 I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource);
 488
 489         rte_memcpy(vf->vf_res, args.out_buffer,
 490                         RTE_MIN(args.out_size, len));
 491         i40e_vf_parse_hw_config(hw, vf->vf_res);
 492
 493         return 0;
 494 }
 495
 496 static int
 497 i40evf_config_promisc(struct rte_eth_dev *dev,
 498                       bool enable_unicast,
 499                       bool enable_multicast)
 500 {
 501         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 502         int err;
 503         struct vf_cmd_info args;
 504         struct virtchnl_promisc_info promisc;
 505
 506         promisc.flags = 0;
 507         promisc.vsi_id = vf->vsi_res->vsi_id;
 508
 509         if (enable_unicast)
 510                 promisc.flags |= FLAG_VF_UNICAST_PROMISC;
 511
 512         if (enable_multicast)
 513                 promisc.flags |= FLAG_VF_MULTICAST_PROMISC;
 514
 515         args.ops = VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE;
 516         args.in_args = (uint8_t *)&promisc;
 517         args.in_args_size = sizeof(promisc);
 518         args.out_buffer = vf->aq_resp;
 519         args.out_size = I40E_AQ_BUF_SZ;
 520
 521         err = i40evf_execute_vf_cmd(dev, &args);
 522
 523         if (err) {
 524                 PMD_DRV_LOG(ERR, "fail to execute command "
 525                             "CONFIG_PROMISCUOUS_MODE");
 526
 527                 if (err == I40E_NOT_SUPPORTED)
 528                         return -ENOTSUP;
 529
 530                 return -EAGAIN;
 531         }
 532
 533         vf->promisc_unicast_enabled = enable_unicast;
 534         vf->promisc_multicast_enabled = enable_multicast;
 535         return 0;
 536 }
 537
 538 static int
 539 i40evf_enable_vlan_strip(struct rte_eth_dev *dev)
 540 {
 541         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 542         struct vf_cmd_info args;
 543         int ret;
 544
 545         memset(&args, 0, sizeof(args));
 546         args.ops = VIRTCHNL_OP_ENABLE_VLAN_STRIPPING;
 547         args.in_args = NULL;
 548         args.in_args_size = 0;
 549         args.out_buffer = vf->aq_resp;
 550         args.out_size = I40E_AQ_BUF_SZ;
 551         ret = i40evf_execute_vf_cmd(dev, &args);
 552         if (ret)
 553                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 554                             "VIRTCHNL_OP_ENABLE_VLAN_STRIPPING");
 555
 556         return ret;
 557 }
 558
 559 static int
 560 i40evf_disable_vlan_strip(struct rte_eth_dev *dev)
 561 {
 562         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 563         struct vf_cmd_info args;
 564         int ret;
 565
 566         memset(&args, 0, sizeof(args));
 567         args.ops = VIRTCHNL_OP_DISABLE_VLAN_STRIPPING;
 568         args.in_args = NULL;
 569         args.in_args_size = 0;
 570         args.out_buffer = vf->aq_resp;
 571         args.out_size = I40E_AQ_BUF_SZ;
 572         ret = i40evf_execute_vf_cmd(dev, &args);
 573         if (ret)
 574                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 575                             "VIRTCHNL_OP_DISABLE_VLAN_STRIPPING");
 576
 577         return ret;
 578 }
 579
 580 static void
 581 i40evf_fill_virtchnl_vsi_txq_info(struct virtchnl_txq_info *txq_info,
 582                                   uint16_t vsi_id,
 583                                   uint16_t queue_id,
 584                                   uint16_t nb_txq,
 585                                   struct i40e_tx_queue *txq)
 586 {
 587         txq_info->vsi_id = vsi_id;
 588         txq_info->queue_id = queue_id;
 589         if (queue_id < nb_txq && txq) {
 590                 txq_info->ring_len = txq->nb_tx_desc;
 591                 txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
 592         }
 593 }
 594
 595 static void
 596 i40evf_fill_virtchnl_vsi_rxq_info(struct virtchnl_rxq_info *rxq_info,
 597                                   uint16_t vsi_id,
 598                                   uint16_t queue_id,
 599                                   uint16_t nb_rxq,
 600                                   uint32_t max_pkt_size,
 601                                   struct i40e_rx_queue *rxq)
 602 {
 603         rxq_info->vsi_id = vsi_id;
 604         rxq_info->queue_id = queue_id;
 605         rxq_info->max_pkt_size = max_pkt_size;
 606         if (queue_id < nb_rxq && rxq) {
 607                 rxq_info->ring_len = rxq->nb_rx_desc;
 608                 rxq_info->dma_ring_addr = rxq->rx_ring_phys_addr;
 609                 rxq_info->databuffer_size =
 610                         (rte_pktmbuf_data_room_size(rxq->mp) -
 611                                 RTE_PKTMBUF_HEADROOM);
 612         }
 613 }
 614
 615 static int
 616 i40evf_configure_vsi_queues(struct rte_eth_dev *dev)
 617 {
 618         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 619         struct i40e_rx_queue **rxq =
 620                 (struct i40e_rx_queue **)dev->data->rx_queues;
 621         struct i40e_tx_queue **txq =
 622                 (struct i40e_tx_queue **)dev->data->tx_queues;
 623         struct virtchnl_vsi_queue_config_info *vc_vqci;
 624         struct virtchnl_queue_pair_info *vc_qpi;
 625         struct vf_cmd_info args;
 626         uint16_t i, nb_qp = vf->num_queue_pairs;
 627         const uint32_t size =
 628                 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqci, nb_qp);
 629         uint8_t buff[size];
 630         int ret;
 631
 632         memset(buff, 0, sizeof(buff));
 633         vc_vqci = (struct virtchnl_vsi_queue_config_info *)buff;
 634         vc_vqci->vsi_id = vf->vsi_res->vsi_id;
 635         vc_vqci->num_queue_pairs = nb_qp;
 636
 637         for (i = 0, vc_qpi = vc_vqci->qpair; i < nb_qp; i++, vc_qpi++) {
 638                 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpi->txq,
 639                         vc_vqci->vsi_id, i, dev->data->nb_tx_queues,
 640                         txq ? txq[i] : NULL);
 641                 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpi->rxq,
 642                         vc_vqci->vsi_id, i, dev->data->nb_rx_queues,
 643                         vf->max_pkt_len, rxq ? rxq[i] : NULL);
 644         }
 645         memset(&args, 0, sizeof(args));
 646         args.ops = VIRTCHNL_OP_CONFIG_VSI_QUEUES;
 647         args.in_args = (uint8_t *)vc_vqci;
 648         args.in_args_size = size;
 649         args.out_buffer = vf->aq_resp;
 650         args.out_size = I40E_AQ_BUF_SZ;
 651         ret = i40evf_execute_vf_cmd(dev, &args);
 652         if (ret)
 653                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 654                         "VIRTCHNL_OP_CONFIG_VSI_QUEUES");
 655
 656         return ret;
 657 }
 658
 659 static int
 660 i40evf_config_irq_map(struct rte_eth_dev *dev)
 661 {
 662         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 663         struct vf_cmd_info args;
 664         uint8_t *cmd_buffer = NULL;
 665         struct virtchnl_irq_map_info *map_info;
 666         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
 667         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 668         uint32_t vec, cmd_buffer_size, max_vectors, nb_msix, msix_base, i;
 669         uint16_t rxq_map[vf->vf_res->max_vectors];
 670         int err;
 671
 672         memset(rxq_map, 0, sizeof(rxq_map));
 673         if (dev->data->dev_conf.intr_conf.rxq != 0 &&
 674                 rte_intr_allow_others(intr_handle)) {
 675                 msix_base = I40E_RX_VEC_START;
 676                 /* For interrupt mode, available vector id is from 1. */
 677                 max_vectors = vf->vf_res->max_vectors - 1;
 678                 nb_msix = RTE_MIN(max_vectors, intr_handle->nb_efd);
 679
 680                 vec = msix_base;
 681                 for (i = 0; i < dev->data->nb_rx_queues; i++) {
 682                         rxq_map[vec] |= 1 << i;
 683                         intr_handle->intr_vec[i] = vec++;
 684                         if (vec >= vf->vf_res->max_vectors)
 685                                 vec = msix_base;
 686                 }
 687         } else {
 688                 msix_base = I40E_MISC_VEC_ID;
 689                 nb_msix = 1;
 690
 691                 for (i = 0; i < dev->data->nb_rx_queues; i++) {
 692                         rxq_map[msix_base] |= 1 << i;
 693                         if (rte_intr_dp_is_en(intr_handle))
 694                                 intr_handle->intr_vec[i] = msix_base;
 695                 }
 696         }
 697
 698         cmd_buffer_size = sizeof(struct virtchnl_irq_map_info) +
 699                         sizeof(struct virtchnl_vector_map) * nb_msix;
 700         cmd_buffer = rte_zmalloc("i40e", cmd_buffer_size, 0);
 701         if (!cmd_buffer) {
 702                 PMD_DRV_LOG(ERR, "Failed to allocate memory");
 703                 return I40E_ERR_NO_MEMORY;
 704         }
 705
 706         map_info = (struct virtchnl_irq_map_info *)cmd_buffer;
 707         map_info->num_vectors = nb_msix;
 708         for (i = 0; i < nb_msix; i++) {
 709                 map_info->vecmap[i].rxitr_idx = I40E_ITR_INDEX_DEFAULT;
 710                 map_info->vecmap[i].vsi_id = vf->vsi_res->vsi_id;
 711                 map_info->vecmap[i].vector_id = msix_base + i;
 712                 map_info->vecmap[i].txq_map = 0;
 713                 map_info->vecmap[i].rxq_map = rxq_map[msix_base + i];
 714         }
 715
 716         args.ops = VIRTCHNL_OP_CONFIG_IRQ_MAP;
 717         args.in_args = (u8 *)cmd_buffer;
 718         args.in_args_size = cmd_buffer_size;
 719         args.out_buffer = vf->aq_resp;
 720         args.out_size = I40E_AQ_BUF_SZ;
 721         err = i40evf_execute_vf_cmd(dev, &args);
 722         if (err)
 723                 PMD_DRV_LOG(ERR, "fail to execute command OP_ENABLE_QUEUES");
 724
 725         rte_free(cmd_buffer);
 726
 727         return err;
 728 }
 729
 730 static int
 731 i40evf_switch_queue(struct rte_eth_dev *dev, bool isrx, uint16_t qid,
 732                                 bool on)
 733 {
 734         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 735         struct virtchnl_queue_select queue_select;
 736         int err;
 737         struct vf_cmd_info args;
 738         memset(&queue_select, 0, sizeof(queue_select));
 739         queue_select.vsi_id = vf->vsi_res->vsi_id;
 740
 741         if (isrx)
 742                 queue_select.rx_queues |= 1 << qid;
 743         else
 744                 queue_select.tx_queues |= 1 << qid;
 745
 746         if (on)
 747                 args.ops = VIRTCHNL_OP_ENABLE_QUEUES;
 748         else
 749                 args.ops = VIRTCHNL_OP_DISABLE_QUEUES;
 750         args.in_args = (u8 *)&queue_select;
 751         args.in_args_size = sizeof(queue_select);
 752         args.out_buffer = vf->aq_resp;
 753         args.out_size = I40E_AQ_BUF_SZ;
 754         err = i40evf_execute_vf_cmd(dev, &args);
 755         if (err)
 756                 PMD_DRV_LOG(ERR, "fail to switch %s %u %s",
 757                             isrx ? "RX" : "TX", qid, on ? "on" : "off");
 758
 759         return err;
 760 }
 761
 762 static int
 763 i40evf_start_queues(struct rte_eth_dev *dev)
 764 {
 765         struct rte_eth_dev_data *dev_data = dev->data;
 766         int i;
 767         struct i40e_rx_queue *rxq;
 768         struct i40e_tx_queue *txq;
 769
 770         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 771                 rxq = dev_data->rx_queues[i];
 772                 if (rxq->rx_deferred_start)
 773                         continue;
 774                 if (i40evf_dev_rx_queue_start(dev, i) != 0) {
 775                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 776                         return -1;
 777                 }
 778         }
 779
 780         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 781                 txq = dev_data->tx_queues[i];
 782                 if (txq->tx_deferred_start)
 783                         continue;
 784                 if (i40evf_dev_tx_queue_start(dev, i) != 0) {
 785                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 786                         return -1;
 787                 }
 788         }
 789
 790         return 0;
 791 }
 792
 793 static int
 794 i40evf_stop_queues(struct rte_eth_dev *dev)
 795 {
 796         int i;
 797
 798         /* Stop TX queues first */
 799         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 800                 if (i40evf_dev_tx_queue_stop(dev, i) != 0) {
 801                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 802                 }
 803         }
 804
 805         /* Then stop RX queues */
 806         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 807                 if (i40evf_dev_rx_queue_stop(dev, i) != 0) {
 808                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 809                 }
 810         }
 811
 812         return 0;
 813 }
 814
 815 static int
 816 i40evf_add_mac_addr(struct rte_eth_dev *dev,
 817                     struct rte_ether_addr *addr,
 818                     __rte_unused uint32_t index,
 819                     __rte_unused uint32_t pool)
 820 {
 821         struct virtchnl_ether_addr_list *list;
 822         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 823         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 824                         sizeof(struct virtchnl_ether_addr)];
 825         int err;
 826         struct vf_cmd_info args;
 827
 828         if (rte_is_zero_ether_addr(addr)) {
 829                 PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
 830                             addr->addr_bytes[0], addr->addr_bytes[1],
 831                             addr->addr_bytes[2], addr->addr_bytes[3],
 832                             addr->addr_bytes[4], addr->addr_bytes[5]);
 833                 return I40E_ERR_INVALID_MAC_ADDR;
 834         }
 835
 836         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 837         list->vsi_id = vf->vsi_res->vsi_id;
 838         list->num_elements = 1;
 839         rte_memcpy(list->list[0].addr, addr->addr_bytes,
 840                                         sizeof(addr->addr_bytes));
 841
 842         args.ops = VIRTCHNL_OP_ADD_ETH_ADDR;
 843         args.in_args = cmd_buffer;
 844         args.in_args_size = sizeof(cmd_buffer);
 845         args.out_buffer = vf->aq_resp;
 846         args.out_size = I40E_AQ_BUF_SZ;
 847         err = i40evf_execute_vf_cmd(dev, &args);
 848         if (err)
 849                 PMD_DRV_LOG(ERR, "fail to execute command "
 850                             "OP_ADD_ETHER_ADDRESS");
 851         else
 852                 vf->vsi.mac_num++;
 853
 854         return err;
 855 }
 856
 857 static void
 858 i40evf_del_mac_addr_by_addr(struct rte_eth_dev *dev,
 859                             struct rte_ether_addr *addr)
 860 {
 861         struct virtchnl_ether_addr_list *list;
 862         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 863         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 864                         sizeof(struct virtchnl_ether_addr)];
 865         int err;
 866         struct vf_cmd_info args;
 867
 868         if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
 869                 PMD_DRV_LOG(ERR, "Invalid mac:%x-%x-%x-%x-%x-%x",
 870                             addr->addr_bytes[0], addr->addr_bytes[1],
 871                             addr->addr_bytes[2], addr->addr_bytes[3],
 872                             addr->addr_bytes[4], addr->addr_bytes[5]);
 873                 return;
 874         }
 875
 876         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 877         list->vsi_id = vf->vsi_res->vsi_id;
 878         list->num_elements = 1;
 879         rte_memcpy(list->list[0].addr, addr->addr_bytes,
 880                         sizeof(addr->addr_bytes));
 881
 882         args.ops = VIRTCHNL_OP_DEL_ETH_ADDR;
 883         args.in_args = cmd_buffer;
 884         args.in_args_size = sizeof(cmd_buffer);
 885         args.out_buffer = vf->aq_resp;
 886         args.out_size = I40E_AQ_BUF_SZ;
 887         err = i40evf_execute_vf_cmd(dev, &args);
 888         if (err)
 889                 PMD_DRV_LOG(ERR, "fail to execute command "
 890                             "OP_DEL_ETHER_ADDRESS");
 891         else
 892                 vf->vsi.mac_num--;
 893         return;
 894 }
 895
 896 static void
 897 i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index)
 898 {
 899         struct rte_eth_dev_data *data = dev->data;
 900         struct rte_ether_addr *addr;
 901
 902         addr = &data->mac_addrs[index];
 903
 904         i40evf_del_mac_addr_by_addr(dev, addr);
 905 }
 906
 907 static int
 908 i40evf_query_stats(struct rte_eth_dev *dev, struct i40e_eth_stats **pstats)
 909 {
 910         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 911         struct virtchnl_queue_select q_stats;
 912         int err;
 913         struct vf_cmd_info args;
 914
 915         memset(&q_stats, 0, sizeof(q_stats));
 916         q_stats.vsi_id = vf->vsi_res->vsi_id;
 917         args.ops = VIRTCHNL_OP_GET_STATS;
 918         args.in_args = (u8 *)&q_stats;
 919         args.in_args_size = sizeof(q_stats);
 920         args.out_buffer = vf->aq_resp;
 921         args.out_size = I40E_AQ_BUF_SZ;
 922
 923         err = i40evf_execute_vf_cmd(dev, &args);
 924         if (err) {
 925                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_STATS");
 926                 *pstats = NULL;
 927                 return err;
 928         }
 929         *pstats = (struct i40e_eth_stats *)args.out_buffer;
 930         return 0;
 931 }
 932
 933 static void
 934 i40evf_stat_update_48(uint64_t *offset,
 935                    uint64_t *stat)
 936 {
 937         if (*stat >= *offset)
 938                 *stat = *stat - *offset;
 939         else
 940                 *stat = (uint64_t)((*stat +
 941                         ((uint64_t)1 << I40E_48_BIT_WIDTH)) - *offset);
 942
 943         *stat &= I40E_48_BIT_MASK;
 944 }
 945
 946 static void
 947 i40evf_stat_update_32(uint64_t *offset,
 948                    uint64_t *stat)
 949 {
 950         if (*stat >= *offset)
 951                 *stat = (uint64_t)(*stat - *offset);
 952         else
 953                 *stat = (uint64_t)((*stat +
 954                         ((uint64_t)1 << I40E_32_BIT_WIDTH)) - *offset);
 955 }
 956
 957 static void
 958 i40evf_update_stats(struct i40e_vsi *vsi,
 959                                         struct i40e_eth_stats *nes)
 960 {
 961         struct i40e_eth_stats *oes = &vsi->eth_stats_offset;
 962
 963         i40evf_stat_update_48(&oes->rx_bytes,
 964                             &nes->rx_bytes);
 965         i40evf_stat_update_48(&oes->rx_unicast,
 966                             &nes->rx_unicast);
 967         i40evf_stat_update_48(&oes->rx_multicast,
 968                             &nes->rx_multicast);
 969         i40evf_stat_update_48(&oes->rx_broadcast,
 970                             &nes->rx_broadcast);
 971         i40evf_stat_update_32(&oes->rx_discards,
 972                                 &nes->rx_discards);
 973         i40evf_stat_update_32(&oes->rx_unknown_protocol,
 974                             &nes->rx_unknown_protocol);
 975         i40evf_stat_update_48(&oes->tx_bytes,
 976                             &nes->tx_bytes);
 977         i40evf_stat_update_48(&oes->tx_unicast,
 978                             &nes->tx_unicast);
 979         i40evf_stat_update_48(&oes->tx_multicast,
 980                             &nes->tx_multicast);
 981         i40evf_stat_update_48(&oes->tx_broadcast,
 982                             &nes->tx_broadcast);
 983         i40evf_stat_update_32(&oes->tx_errors, &nes->tx_errors);
 984         i40evf_stat_update_32(&oes->tx_discards, &nes->tx_discards);
 985 }
 986
 987 static int
 988 i40evf_dev_xstats_reset(struct rte_eth_dev *dev)
 989 {
 990         int ret;
 991         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 992         struct i40e_eth_stats *pstats = NULL;
 993
 994         /* read stat values to clear hardware registers */
 995         ret = i40evf_query_stats(dev, &pstats);
 996
 997         /* set stats offset base on current values */
 998         if (ret == 0)
 999                 vf->vsi.eth_stats_offset = *pstats;
1000
1001         return ret;
1002 }
1003
1004 static int i40evf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
1005                                       struct rte_eth_xstat_name *xstats_names,
1006                                       __rte_unused unsigned limit)
1007 {
1008         unsigned i;
1009
1010         if (xstats_names != NULL)
1011                 for (i = 0; i < I40EVF_NB_XSTATS; i++) {
1012                         snprintf(xstats_names[i].name,
1013                                 sizeof(xstats_names[i].name),
1014                                 "%s", rte_i40evf_stats_strings[i].name);
1015                 }
1016         return I40EVF_NB_XSTATS;
1017 }
1018
1019 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
1020                                  struct rte_eth_xstat *xstats, unsigned n)
1021 {
1022         int ret;
1023         unsigned i;
1024         struct i40e_eth_stats *pstats = NULL;
1025         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1026         struct i40e_vsi *vsi = &vf->vsi;
1027
1028         if (n < I40EVF_NB_XSTATS)
1029                 return I40EVF_NB_XSTATS;
1030
1031         ret = i40evf_query_stats(dev, &pstats);
1032         if (ret != 0)
1033                 return 0;
1034
1035         if (!xstats)
1036                 return 0;
1037
1038         i40evf_update_stats(vsi, pstats);
1039
1040         /* loop over xstats array and values from pstats */
1041         for (i = 0; i < I40EVF_NB_XSTATS; i++) {
1042                 xstats[i].id = i;
1043                 xstats[i].value = *(uint64_t *)(((char *)pstats) +
1044                         rte_i40evf_stats_strings[i].offset);
1045         }
1046
1047         return I40EVF_NB_XSTATS;
1048 }
1049
1050 static int
1051 i40evf_add_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1052 {
1053         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1054         struct virtchnl_vlan_filter_list *vlan_list;
1055         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
1056                                                         sizeof(uint16_t)];
1057         int err;
1058         struct vf_cmd_info args;
1059
1060         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
1061         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1062         vlan_list->num_elements = 1;
1063         vlan_list->vlan_id[0] = vlanid;
1064
1065         args.ops = VIRTCHNL_OP_ADD_VLAN;
1066         args.in_args = (u8 *)&cmd_buffer;
1067         args.in_args_size = sizeof(cmd_buffer);
1068         args.out_buffer = vf->aq_resp;
1069         args.out_size = I40E_AQ_BUF_SZ;
1070         err = i40evf_execute_vf_cmd(dev, &args);
1071         if (err)
1072                 PMD_DRV_LOG(ERR, "fail to execute command OP_ADD_VLAN");
1073
1074         return err;
1075 }
1076
1077 static int
1078 i40evf_request_queues(struct rte_eth_dev *dev, uint16_t num)
1079 {
1080         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1081         struct virtchnl_vf_res_request vfres;
1082         struct vf_cmd_info args;
1083         int err;
1084
1085         vfres.num_queue_pairs = num;
1086
1087         args.ops = VIRTCHNL_OP_REQUEST_QUEUES;
1088         args.in_args = (u8 *)&vfres;
1089         args.in_args_size = sizeof(vfres);
1090         args.out_buffer = vf->aq_resp;
1091         args.out_size = I40E_AQ_BUF_SZ;
1092
1093         rte_eal_alarm_cancel(i40evf_dev_alarm_handler, dev);
1094
1095         err = i40evf_execute_vf_cmd(dev, &args);
1096
1097         rte_eal_alarm_set(I40EVF_ALARM_INTERVAL, i40evf_dev_alarm_handler, dev);
1098
1099         if (err != I40E_SUCCESS) {
1100                 PMD_DRV_LOG(ERR, "fail to execute command OP_REQUEST_QUEUES");
1101                 return err;
1102         }
1103
1104         /* The PF will issue a reset to the VF when change the number of
1105          * queues. The PF will set I40E_VFGEN_RSTAT to COMPLETE first, then
1106          * wait 10ms and set it to ACTIVE. In this duration, vf may not catch
1107          * the moment that COMPLETE is set. So, for vf, we'll try to wait a
1108          * long time.
1109          */
1110         rte_delay_ms(100);
1111
1112         err = i40evf_check_vf_reset_done(dev);
1113         if (err)
1114                 PMD_DRV_LOG(ERR, "VF is still resetting");
1115
1116         return err;
1117 }
1118
1119 static int
1120 i40evf_del_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1121 {
1122         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1123         struct virtchnl_vlan_filter_list *vlan_list;
1124         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
1125                                                         sizeof(uint16_t)];
1126         int err;
1127         struct vf_cmd_info args;
1128
1129         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
1130         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1131         vlan_list->num_elements = 1;
1132         vlan_list->vlan_id[0] = vlanid;
1133
1134         args.ops = VIRTCHNL_OP_DEL_VLAN;
1135         args.in_args = (u8 *)&cmd_buffer;
1136         args.in_args_size = sizeof(cmd_buffer);
1137         args.out_buffer = vf->aq_resp;
1138         args.out_size = I40E_AQ_BUF_SZ;
1139         err = i40evf_execute_vf_cmd(dev, &args);
1140         if (err)
1141                 PMD_DRV_LOG(ERR, "fail to execute command OP_DEL_VLAN");
1142
1143         return err;
1144 }
1145
1146 static const struct rte_pci_id pci_id_i40evf_map[] = {
1147         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF) },
1148         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF_HV) },
1149         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_A0_VF) },
1150         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_VF) },
1151         { .vendor_id = 0, /* sentinel */ },
1152 };
1153
1154 /* Disable IRQ0 */
1155 static inline void
1156 i40evf_disable_irq0(struct i40e_hw *hw)
1157 {
1158         /* Disable all interrupt types */
1159         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, 0);
1160         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1161                        I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1162         I40EVF_WRITE_FLUSH(hw);
1163 }
1164
1165 /* Enable IRQ0 */
1166 static inline void
1167 i40evf_enable_irq0(struct i40e_hw *hw)
1168 {
1169         /* Enable admin queue interrupt trigger */
1170         uint32_t val;
1171
1172         i40evf_disable_irq0(hw);
1173         val = I40E_READ_REG(hw, I40E_VFINT_ICR0_ENA1);
1174         val |= I40E_VFINT_ICR0_ENA1_ADMINQ_MASK |
1175                 I40E_VFINT_ICR0_ENA1_LINK_STAT_CHANGE_MASK;
1176         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, val);
1177
1178         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1179                 I40E_VFINT_DYN_CTL01_INTENA_MASK |
1180                 I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1181                 I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1182
1183         I40EVF_WRITE_FLUSH(hw);
1184 }
1185
1186 static int
1187 i40evf_check_vf_reset_done(struct rte_eth_dev *dev)
1188 {
1189         int i, reset;
1190         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1191         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1192
1193         for (i = 0; i < MAX_RESET_WAIT_CNT; i++) {
1194                 reset = I40E_READ_REG(hw, I40E_VFGEN_RSTAT) &
1195                         I40E_VFGEN_RSTAT_VFR_STATE_MASK;
1196                 reset = reset >> I40E_VFGEN_RSTAT_VFR_STATE_SHIFT;
1197                 if (reset == VIRTCHNL_VFR_VFACTIVE ||
1198                     reset == VIRTCHNL_VFR_COMPLETED)
1199                         break;
1200                 rte_delay_ms(50);
1201         }
1202
1203         if (i >= MAX_RESET_WAIT_CNT)
1204                 return -1;
1205
1206         vf->vf_reset = false;
1207         vf->pend_msg &= ~PFMSG_RESET_IMPENDING;
1208
1209         return 0;
1210 }
1211 static int
1212 i40evf_reset_vf(struct rte_eth_dev *dev)
1213 {
1214         int ret;
1215         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1216
1217         if (i40e_vf_reset(hw) != I40E_SUCCESS) {
1218                 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1219                 return -1;
1220         }
1221         /**
1222           * After issuing vf reset command to pf, pf won't necessarily
1223           * reset vf, it depends on what state it exactly is. If it's not
1224           * initialized yet, it won't have vf reset since it's in a certain
1225           * state. If not, it will try to reset. Even vf is reset, pf will
1226           * set I40E_VFGEN_RSTAT to COMPLETE first, then wait 10ms and set
1227           * it to ACTIVE. In this duration, vf may not catch the moment that
1228           * COMPLETE is set. So, for vf, we'll try to wait a long time.
1229           */
1230         rte_delay_ms(200);
1231
1232         ret = i40evf_check_vf_reset_done(dev);
1233         if (ret) {
1234                 PMD_INIT_LOG(ERR, "VF is still resetting");
1235                 return ret;
1236         }
1237
1238         return 0;
1239 }
1240
1241 static int
1242 i40evf_init_vf(struct rte_eth_dev *dev)
1243 {
1244         int i, err, bufsz;
1245         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1246         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1247         uint16_t interval =
1248                 i40e_calc_itr_interval(0, 0);
1249
1250         vf->adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1251         vf->dev_data = dev->data;
1252         err = i40e_set_mac_type(hw);
1253         if (err) {
1254                 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err);
1255                 goto err;
1256         }
1257
1258         err = i40evf_check_vf_reset_done(dev);
1259         if (err)
1260                 goto err;
1261
1262         i40e_init_adminq_parameter(hw);
1263         err = i40e_init_adminq(hw);
1264         if (err) {
1265                 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err);
1266                 goto err;
1267         }
1268
1269         /* Reset VF and wait until it's complete */
1270         if (i40evf_reset_vf(dev)) {
1271                 PMD_INIT_LOG(ERR, "reset NIC failed");
1272                 goto err_aq;
1273         }
1274
1275         /* VF reset, shutdown admin queue and initialize again */
1276         if (i40e_shutdown_adminq(hw) != I40E_SUCCESS) {
1277                 PMD_INIT_LOG(ERR, "i40e_shutdown_adminq failed");
1278                 goto err;
1279         }
1280
1281         i40e_init_adminq_parameter(hw);
1282         if (i40e_init_adminq(hw) != I40E_SUCCESS) {
1283                 PMD_INIT_LOG(ERR, "init_adminq failed");
1284                 goto err;
1285         }
1286
1287         vf->aq_resp = rte_zmalloc("vf_aq_resp", I40E_AQ_BUF_SZ, 0);
1288         if (!vf->aq_resp) {
1289                 PMD_INIT_LOG(ERR, "unable to allocate vf_aq_resp memory");
1290                 goto err_aq;
1291         }
1292         if (i40evf_check_api_version(dev) != 0) {
1293                 PMD_INIT_LOG(ERR, "check_api version failed");
1294                 goto err_api;
1295         }
1296         bufsz = sizeof(struct virtchnl_vf_resource) +
1297                 (I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource));
1298         vf->vf_res = rte_zmalloc("vf_res", bufsz, 0);
1299         if (!vf->vf_res) {
1300                 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory");
1301                 goto err_api;
1302         }
1303
1304         if (i40evf_get_vf_resource(dev) != 0) {
1305                 PMD_INIT_LOG(ERR, "i40evf_get_vf_config failed");
1306                 goto err_alloc;
1307         }
1308
1309         /* got VF config message back from PF, now we can parse it */
1310         for (i = 0; i < vf->vf_res->num_vsis; i++) {
1311                 if (vf->vf_res->vsi_res[i].vsi_type == VIRTCHNL_VSI_SRIOV)
1312                         vf->vsi_res = &vf->vf_res->vsi_res[i];
1313         }
1314
1315         if (!vf->vsi_res) {
1316                 PMD_INIT_LOG(ERR, "no LAN VSI found");
1317                 goto err_alloc;
1318         }
1319
1320         if (hw->mac.type == I40E_MAC_X722_VF)
1321                 vf->flags = I40E_FLAG_RSS_AQ_CAPABLE;
1322         vf->vsi.vsi_id = vf->vsi_res->vsi_id;
1323
1324         switch (vf->vsi_res->vsi_type) {
1325         case VIRTCHNL_VSI_SRIOV:
1326                 vf->vsi.type = I40E_VSI_SRIOV;
1327                 break;
1328         default:
1329                 vf->vsi.type = I40E_VSI_TYPE_UNKNOWN;
1330                 break;
1331         }
1332         vf->vsi.nb_qps = vf->vsi_res->num_queue_pairs;
1333         vf->vsi.adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1334
1335         /* Store the MAC address configured by host, or generate random one */
1336         if (!rte_is_valid_assigned_ether_addr(
1337                         (struct rte_ether_addr *)hw->mac.addr))
1338                 rte_eth_random_addr(hw->mac.addr); /* Generate a random one */
1339
1340         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1341                        (I40E_ITR_INDEX_DEFAULT <<
1342                         I40E_VFINT_DYN_CTL0_ITR_INDX_SHIFT) |
1343                        (interval <<
1344                         I40E_VFINT_DYN_CTL0_INTERVAL_SHIFT));
1345         I40EVF_WRITE_FLUSH(hw);
1346
1347         return 0;
1348
1349 err_alloc:
1350         rte_free(vf->vf_res);
1351         vf->vsi_res = NULL;
1352 err_api:
1353         rte_free(vf->aq_resp);
1354 err_aq:
1355         i40e_shutdown_adminq(hw); /* ignore error */
1356 err:
1357         return -1;
1358 }
1359
1360 static int
1361 i40evf_uninit_vf(struct rte_eth_dev *dev)
1362 {
1363         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1364
1365         PMD_INIT_FUNC_TRACE();
1366
1367         if (hw->adapter_closed == 0)
1368                 i40evf_dev_close(dev);
1369
1370         return 0;
1371 }
1372
1373 static void
1374 i40evf_handle_pf_event(struct rte_eth_dev *dev, uint8_t *msg,
1375                 __rte_unused uint16_t msglen)
1376 {
1377         struct virtchnl_pf_event *pf_msg =
1378                         (struct virtchnl_pf_event *)msg;
1379         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1380
1381         switch (pf_msg->event) {
1382         case VIRTCHNL_EVENT_RESET_IMPENDING:
1383                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_RESET_IMPENDING event");
1384                 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RESET,
1385                                               NULL);
1386                 break;
1387         case VIRTCHNL_EVENT_LINK_CHANGE:
1388                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_LINK_CHANGE event");
1389                 vf->link_up = pf_msg->event_data.link_event.link_status;
1390                 vf->link_speed = pf_msg->event_data.link_event.link_speed;
1391                 break;
1392         case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
1393                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_PF_DRIVER_CLOSE event");
1394                 break;
1395         default:
1396                 PMD_DRV_LOG(ERR, " unknown event received %u", pf_msg->event);
1397                 break;
1398         }
1399 }
1400
1401 static void
1402 i40evf_handle_aq_msg(struct rte_eth_dev *dev)
1403 {
1404         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1405         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1406         struct i40e_arq_event_info info;
1407         uint16_t pending, aq_opc;
1408         enum virtchnl_ops msg_opc;
1409         enum i40e_status_code msg_ret;
1410         int ret;
1411
1412         info.buf_len = I40E_AQ_BUF_SZ;
1413         if (!vf->aq_resp) {
1414                 PMD_DRV_LOG(ERR, "Buffer for adminq resp should not be NULL");
1415                 return;
1416         }
1417         info.msg_buf = vf->aq_resp;
1418
1419         pending = 1;
1420         while (pending) {
1421                 ret = i40e_clean_arq_element(hw, &info, &pending);
1422
1423                 if (ret != I40E_SUCCESS) {
1424                         PMD_DRV_LOG(INFO, "Failed to read msg from AdminQ,"
1425                                     "ret: %d", ret);
1426                         break;
1427                 }
1428                 aq_opc = rte_le_to_cpu_16(info.desc.opcode);
1429                 /* For the message sent from pf to vf, opcode is stored in
1430                  * cookie_high of struct i40e_aq_desc, while return error code
1431                  * are stored in cookie_low, Which is done by
1432                  * i40e_aq_send_msg_to_vf in PF driver.*/
1433                 msg_opc = (enum virtchnl_ops)rte_le_to_cpu_32(
1434                                                   info.desc.cookie_high);
1435                 msg_ret = (enum i40e_status_code)rte_le_to_cpu_32(
1436                                                   info.desc.cookie_low);
1437                 switch (aq_opc) {
1438                 case i40e_aqc_opc_send_msg_to_vf:
1439                         if (msg_opc == VIRTCHNL_OP_EVENT)
1440                                 /* process event*/
1441                                 i40evf_handle_pf_event(dev, info.msg_buf,
1442                                                        info.msg_len);
1443                         else {
1444                                 /* read message and it's expected one */
1445                                 if (msg_opc == vf->pend_cmd) {
1446                                         vf->cmd_retval = msg_ret;
1447                                         /* prevent compiler reordering */
1448                                         rte_compiler_barrier();
1449                                         _clear_cmd(vf);
1450                                 } else
1451                                         PMD_DRV_LOG(ERR, "command mismatch,"
1452                                                 "expect %u, get %u",
1453                                                 vf->pend_cmd, msg_opc);
1454                                 PMD_DRV_LOG(DEBUG, "adminq response is received,"
1455                                              " opcode = %d", msg_opc);
1456                         }
1457                         break;
1458                 default:
1459                         PMD_DRV_LOG(DEBUG, "Request %u is not supported yet",
1460                                     aq_opc);
1461                         break;
1462                 }
1463         }
1464 }
1465
1466 /**
1467  * Interrupt handler triggered by NIC  for handling
1468  * specific interrupt. Only adminq interrupt is processed in VF.
1469  *
1470  * @param handle
1471  *  Pointer to interrupt handle.
1472  * @param param
1473  *  The address of parameter (struct rte_eth_dev *) regsitered before.
1474  *
1475  * @return
1476  *  void
1477  */
1478 static void
1479 i40evf_dev_alarm_handler(void *param)
1480 {
1481         struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
1482         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1483         uint32_t icr0;
1484
1485         i40evf_disable_irq0(hw);
1486
1487         /* read out interrupt causes */
1488         icr0 = I40E_READ_REG(hw, I40E_VFINT_ICR01);
1489
1490         /* No interrupt event indicated */
1491         if (!(icr0 & I40E_VFINT_ICR01_INTEVENT_MASK))
1492                 goto done;
1493
1494         if (icr0 & I40E_VFINT_ICR01_ADMINQ_MASK) {
1495                 PMD_DRV_LOG(DEBUG, "ICR01_ADMINQ is reported");
1496                 i40evf_handle_aq_msg(dev);
1497         }
1498
1499         /* Link Status Change interrupt */
1500         if (icr0 & I40E_VFINT_ICR01_LINK_STAT_CHANGE_MASK)
1501                 PMD_DRV_LOG(DEBUG, "LINK_STAT_CHANGE is reported,"
1502                                    " do nothing");
1503
1504 done:
1505         i40evf_enable_irq0(hw);
1506         rte_eal_alarm_set(I40EVF_ALARM_INTERVAL,
1507                           i40evf_dev_alarm_handler, dev);
1508 }
1509
1510 static int
1511 i40evf_dev_init(struct rte_eth_dev *eth_dev)
1512 {
1513         struct i40e_hw *hw
1514                 = I40E_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
1515         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1516
1517         PMD_INIT_FUNC_TRACE();
1518
1519         /* assign ops func pointer */
1520         eth_dev->dev_ops = &i40evf_eth_dev_ops;
1521         eth_dev->rx_pkt_burst = &i40e_recv_pkts;
1522         eth_dev->tx_pkt_burst = &i40e_xmit_pkts;
1523
1524         /*
1525          * For secondary processes, we don't initialise any further as primary
1526          * has already done this work.
1527          */
1528         if (rte_eal_process_type() != RTE_PROC_PRIMARY){
1529                 i40e_set_rx_function(eth_dev);
1530                 i40e_set_tx_function(eth_dev);
1531                 return 0;
1532         }
1533         i40e_set_default_ptype_table(eth_dev);
1534         rte_eth_copy_pci_info(eth_dev, pci_dev);
1535
1536         hw->vendor_id = pci_dev->id.vendor_id;
1537         hw->device_id = pci_dev->id.device_id;
1538         hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
1539         hw->subsystem_device_id = pci_dev->id.subsystem_device_id;
1540         hw->bus.device = pci_dev->addr.devid;
1541         hw->bus.func = pci_dev->addr.function;
1542         hw->hw_addr = (void *)pci_dev->mem_resource[0].addr;
1543         hw->adapter_stopped = 1;
1544         hw->adapter_closed = 0;
1545
1546         /* Pass the information to the rte_eth_dev_close() that it should also
1547          * release the private port resources.
1548          */
1549         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1550
1551         if(i40evf_init_vf(eth_dev) != 0) {
1552                 PMD_INIT_LOG(ERR, "Init vf failed");
1553                 return -1;
1554         }
1555
1556         i40e_set_default_pctype_table(eth_dev);
1557         rte_eal_alarm_set(I40EVF_ALARM_INTERVAL,
1558                           i40evf_dev_alarm_handler, eth_dev);
1559
1560         /* configure and enable device interrupt */
1561         i40evf_enable_irq0(hw);
1562
1563         /* copy mac addr */
1564         eth_dev->data->mac_addrs = rte_zmalloc("i40evf_mac",
1565                                 RTE_ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX,
1566                                 0);
1567         if (eth_dev->data->mac_addrs == NULL) {
1568                 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to"
1569                                 " store MAC addresses",
1570                                 RTE_ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX);
1571                 return -ENOMEM;
1572         }
1573         rte_ether_addr_copy((struct rte_ether_addr *)hw->mac.addr,
1574                         &eth_dev->data->mac_addrs[0]);
1575
1576         return 0;
1577 }
1578
1579 static int
1580 i40evf_dev_uninit(struct rte_eth_dev *eth_dev)
1581 {
1582         PMD_INIT_FUNC_TRACE();
1583
1584         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1585                 return -EPERM;
1586
1587         if (i40evf_uninit_vf(eth_dev) != 0) {
1588                 PMD_INIT_LOG(ERR, "i40evf_uninit_vf failed");
1589                 return -1;
1590         }
1591
1592         return 0;
1593 }
1594
1595 static int eth_i40evf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1596         struct rte_pci_device *pci_dev)
1597 {
1598         return rte_eth_dev_pci_generic_probe(pci_dev,
1599                 sizeof(struct i40e_adapter), i40evf_dev_init);
1600 }
1601
1602 static int eth_i40evf_pci_remove(struct rte_pci_device *pci_dev)
1603 {
1604         return rte_eth_dev_pci_generic_remove(pci_dev, i40evf_dev_uninit);
1605 }
1606
1607 /*
1608  * virtual function driver struct
1609  */
1610 static struct rte_pci_driver rte_i40evf_pmd = {
1611         .id_table = pci_id_i40evf_map,
1612         .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
1613         .probe = eth_i40evf_pci_probe,
1614         .remove = eth_i40evf_pci_remove,
1615 };
1616
1617 RTE_PMD_REGISTER_PCI(net_i40e_vf, rte_i40evf_pmd);
1618 RTE_PMD_REGISTER_PCI_TABLE(net_i40e_vf, pci_id_i40evf_map);
1619 RTE_PMD_REGISTER_KMOD_DEP(net_i40e_vf, "* igb_uio | vfio-pci");
1620
1621 static int
1622 i40evf_dev_configure(struct rte_eth_dev *dev)
1623 {
1624         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1625         struct i40e_adapter *ad =
1626                 I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1627         uint16_t num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
1628                                 dev->data->nb_tx_queues);
1629
1630         /* Initialize to TRUE. If any of Rx queues doesn't meet the bulk
1631          * allocation or vector Rx preconditions we will reset it.
1632          */
1633         ad->rx_bulk_alloc_allowed = true;
1634         ad->rx_vec_allowed = true;
1635         ad->tx_simple_allowed = true;
1636         ad->tx_vec_allowed = true;
1637
1638         if (num_queue_pairs > vf->vsi_res->num_queue_pairs) {
1639                 struct i40e_hw *hw;
1640                 int ret;
1641
1642                 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1643                         PMD_DRV_LOG(ERR,
1644                                     "For secondary processes, change queue pairs is not supported!");
1645                         return -ENOTSUP;
1646                 }
1647
1648                 hw  = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1649                 if (!hw->adapter_stopped) {
1650                         PMD_DRV_LOG(ERR, "Device must be stopped first!");
1651                         return -EBUSY;
1652                 }
1653
1654                 PMD_DRV_LOG(INFO, "change queue pairs from %u to %u",
1655                             vf->vsi_res->num_queue_pairs, num_queue_pairs);
1656                 ret = i40evf_request_queues(dev, num_queue_pairs);
1657                 if (ret != 0)
1658                         return ret;
1659
1660                 ret = i40evf_dev_reset(dev);
1661                 if (ret != 0)
1662                         return ret;
1663         }
1664
1665         return i40evf_init_vlan(dev);
1666 }
1667
1668 static int
1669 i40evf_init_vlan(struct rte_eth_dev *dev)
1670 {
1671         /* Apply vlan offload setting */
1672         i40evf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
1673
1674         return 0;
1675 }
1676
1677 static int
1678 i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1679 {
1680         struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1681         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1682
1683         if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN))
1684                 return -ENOTSUP;
1685
1686         /* Vlan stripping setting */
1687         if (mask & ETH_VLAN_STRIP_MASK) {
1688                 /* Enable or disable VLAN stripping */
1689                 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
1690                         i40evf_enable_vlan_strip(dev);
1691                 else
1692                         i40evf_disable_vlan_strip(dev);
1693         }
1694
1695         return 0;
1696 }
1697
1698 static int
1699 i40evf_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1700 {
1701         struct i40e_rx_queue *rxq;
1702         int err;
1703         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1704
1705         PMD_INIT_FUNC_TRACE();
1706
1707         rxq = dev->data->rx_queues[rx_queue_id];
1708
1709         err = i40e_alloc_rx_queue_mbufs(rxq);
1710         if (err) {
1711                 PMD_DRV_LOG(ERR, "Failed to allocate RX queue mbuf");
1712                 return err;
1713         }
1714
1715         rte_wmb();
1716
1717         /* Init the RX tail register. */
1718         I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1719         I40EVF_WRITE_FLUSH(hw);
1720
1721         /* Ready to switch the queue on */
1722         err = i40evf_switch_queue(dev, TRUE, rx_queue_id, TRUE);
1723         if (err) {
1724                 PMD_DRV_LOG(ERR, "Failed to switch RX queue %u on",
1725                             rx_queue_id);
1726                 return err;
1727         }
1728         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1729
1730         return 0;
1731 }
1732
1733 static int
1734 i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1735 {
1736         struct i40e_rx_queue *rxq;
1737         int err;
1738
1739         rxq = dev->data->rx_queues[rx_queue_id];
1740
1741         err = i40evf_switch_queue(dev, TRUE, rx_queue_id, FALSE);
1742         if (err) {
1743                 PMD_DRV_LOG(ERR, "Failed to switch RX queue %u off",
1744                             rx_queue_id);
1745                 return err;
1746         }
1747
1748         i40e_rx_queue_release_mbufs(rxq);
1749         i40e_reset_rx_queue(rxq);
1750         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1751
1752         return 0;
1753 }
1754
1755 static int
1756 i40evf_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1757 {
1758         int err;
1759
1760         PMD_INIT_FUNC_TRACE();
1761
1762         /* Ready to switch the queue on */
1763         err = i40evf_switch_queue(dev, FALSE, tx_queue_id, TRUE);
1764         if (err) {
1765                 PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on",
1766                             tx_queue_id);
1767                 return err;
1768         }
1769         dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1770
1771         return 0;
1772 }
1773
1774 static int
1775 i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1776 {
1777         struct i40e_tx_queue *txq;
1778         int err;
1779
1780         txq = dev->data->tx_queues[tx_queue_id];
1781
1782         err = i40evf_switch_queue(dev, FALSE, tx_queue_id, FALSE);
1783         if (err) {
1784                 PMD_DRV_LOG(ERR, "Failed to switch TX queue %u off",
1785                             tx_queue_id);
1786                 return err;
1787         }
1788
1789         i40e_tx_queue_release_mbufs(txq);
1790         i40e_reset_tx_queue(txq);
1791         dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1792
1793         return 0;
1794 }
1795
1796 static int
1797 i40evf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1798 {
1799         int ret;
1800
1801         if (on)
1802                 ret = i40evf_add_vlan(dev, vlan_id);
1803         else
1804                 ret = i40evf_del_vlan(dev,vlan_id);
1805
1806         return ret;
1807 }
1808
1809 static int
1810 i40evf_rxq_init(struct rte_eth_dev *dev, struct i40e_rx_queue *rxq)
1811 {
1812         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1813         struct rte_eth_dev_data *dev_data = dev->data;
1814         struct rte_pktmbuf_pool_private *mbp_priv;
1815         uint16_t buf_size, len;
1816
1817         rxq->qrx_tail = hw->hw_addr + I40E_QRX_TAIL1(rxq->queue_id);
1818         I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1819         I40EVF_WRITE_FLUSH(hw);
1820
1821         /* Calculate the maximum packet length allowed */
1822         mbp_priv = rte_mempool_get_priv(rxq->mp);
1823         buf_size = (uint16_t)(mbp_priv->mbuf_data_room_size -
1824                                         RTE_PKTMBUF_HEADROOM);
1825         rxq->hs_mode = i40e_header_split_none;
1826         rxq->rx_hdr_len = 0;
1827         rxq->rx_buf_len = RTE_ALIGN(buf_size, (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
1828         len = rxq->rx_buf_len * I40E_MAX_CHAINED_RX_BUFFERS;
1829         rxq->max_pkt_len = RTE_MIN(len,
1830                 dev_data->dev_conf.rxmode.max_rx_pkt_len);
1831
1832         /**
1833          * Check if the jumbo frame and maximum packet length are set correctly
1834          */
1835         if (dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1836                 if (rxq->max_pkt_len <= RTE_ETHER_MAX_LEN ||
1837                     rxq->max_pkt_len > I40E_FRAME_SIZE_MAX) {
1838                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1839                                 "larger than %u and smaller than %u, as jumbo "
1840                                 "frame is enabled", (uint32_t)RTE_ETHER_MAX_LEN,
1841                                         (uint32_t)I40E_FRAME_SIZE_MAX);
1842                         return I40E_ERR_CONFIG;
1843                 }
1844         } else {
1845                 if (rxq->max_pkt_len < RTE_ETHER_MIN_LEN ||
1846                     rxq->max_pkt_len > RTE_ETHER_MAX_LEN) {
1847                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1848                                 "larger than %u and smaller than %u, as jumbo "
1849                                 "frame is disabled",
1850                                 (uint32_t)RTE_ETHER_MIN_LEN,
1851                                 (uint32_t)RTE_ETHER_MAX_LEN);
1852                         return I40E_ERR_CONFIG;
1853                 }
1854         }
1855
1856         if ((dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_SCATTER) ||
1857             rxq->max_pkt_len > buf_size)
1858                 dev_data->scattered_rx = 1;
1859
1860         return 0;
1861 }
1862
1863 static int
1864 i40evf_rx_init(struct rte_eth_dev *dev)
1865 {
1866         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1867         uint16_t i;
1868         int ret = I40E_SUCCESS;
1869         struct i40e_rx_queue **rxq =
1870                 (struct i40e_rx_queue **)dev->data->rx_queues;
1871
1872         i40evf_config_rss(vf);
1873         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1874                 if (!rxq[i] || !rxq[i]->q_set)
1875                         continue;
1876                 ret = i40evf_rxq_init(dev, rxq[i]);
1877                 if (ret != I40E_SUCCESS)
1878                         break;
1879         }
1880         if (ret == I40E_SUCCESS)
1881                 i40e_set_rx_function(dev);
1882
1883         return ret;
1884 }
1885
1886 static void
1887 i40evf_tx_init(struct rte_eth_dev *dev)
1888 {
1889         uint16_t i;
1890         struct i40e_tx_queue **txq =
1891                 (struct i40e_tx_queue **)dev->data->tx_queues;
1892         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1893
1894         for (i = 0; i < dev->data->nb_tx_queues; i++)
1895                 txq[i]->qtx_tail = hw->hw_addr + I40E_QTX_TAIL1(i);
1896
1897         i40e_set_tx_function(dev);
1898 }
1899
1900 static inline void
1901 i40evf_enable_queues_intr(struct rte_eth_dev *dev)
1902 {
1903         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1904         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1905         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1906
1907         if (!rte_intr_allow_others(intr_handle)) {
1908                 I40E_WRITE_REG(hw,
1909                                I40E_VFINT_DYN_CTL01,
1910                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1911                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1912                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1913                 I40EVF_WRITE_FLUSH(hw);
1914                 return;
1915         }
1916
1917         I40EVF_WRITE_FLUSH(hw);
1918 }
1919
1920 static inline void
1921 i40evf_disable_queues_intr(struct rte_eth_dev *dev)
1922 {
1923         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1924         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1925         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1926
1927         if (!rte_intr_allow_others(intr_handle)) {
1928                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1929                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1930                 I40EVF_WRITE_FLUSH(hw);
1931                 return;
1932         }
1933
1934         I40EVF_WRITE_FLUSH(hw);
1935 }
1936
1937 static int
1938 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
1939 {
1940         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1941         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1942         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1943         uint16_t interval =
1944                 i40e_calc_itr_interval(0, 0);
1945         uint16_t msix_intr;
1946
1947         msix_intr = intr_handle->intr_vec[queue_id];
1948         if (msix_intr == I40E_MISC_VEC_ID)
1949                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1950                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1951                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1952                                (0 << I40E_VFINT_DYN_CTL01_ITR_INDX_SHIFT) |
1953                                (interval <<
1954                                 I40E_VFINT_DYN_CTL01_INTERVAL_SHIFT));
1955         else
1956                 I40E_WRITE_REG(hw,
1957                                I40E_VFINT_DYN_CTLN1(msix_intr -
1958                                                     I40E_RX_VEC_START),
1959                                I40E_VFINT_DYN_CTLN1_INTENA_MASK |
1960                                I40E_VFINT_DYN_CTLN1_CLEARPBA_MASK |
1961                                (0 << I40E_VFINT_DYN_CTLN1_ITR_INDX_SHIFT) |
1962                                (interval <<
1963                                 I40E_VFINT_DYN_CTLN1_INTERVAL_SHIFT));
1964
1965         I40EVF_WRITE_FLUSH(hw);
1966
1967         return 0;
1968 }
1969
1970 static int
1971 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
1972 {
1973         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1974         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1975         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1976         uint16_t msix_intr;
1977
1978         msix_intr = intr_handle->intr_vec[queue_id];
1979         if (msix_intr == I40E_MISC_VEC_ID)
1980                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01, 0);
1981         else
1982                 I40E_WRITE_REG(hw,
1983                                I40E_VFINT_DYN_CTLN1(msix_intr -
1984                                                     I40E_RX_VEC_START),
1985                                0);
1986
1987         I40EVF_WRITE_FLUSH(hw);
1988
1989         return 0;
1990 }
1991
1992 static void
1993 i40evf_add_del_all_mac_addr(struct rte_eth_dev *dev, bool add)
1994 {
1995         struct virtchnl_ether_addr_list *list;
1996         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1997         int err, i, j;
1998         int next_begin = 0;
1999         int begin = 0;
2000         uint32_t len;
2001         struct rte_ether_addr *addr;
2002         struct vf_cmd_info args;
2003
2004         do {
2005                 j = 0;
2006                 len = sizeof(struct virtchnl_ether_addr_list);
2007                 for (i = begin; i < I40E_NUM_MACADDR_MAX; i++, next_begin++) {
2008                         if (rte_is_zero_ether_addr(&dev->data->mac_addrs[i]))
2009                                 continue;
2010                         len += sizeof(struct virtchnl_ether_addr);
2011                         if (len >= I40E_AQ_BUF_SZ) {
2012                                 next_begin = i + 1;
2013                                 break;
2014                         }
2015                 }
2016
2017                 list = rte_zmalloc("i40evf_del_mac_buffer", len, 0);
2018                 if (!list) {
2019                         PMD_DRV_LOG(ERR, "fail to allocate memory");
2020                         return;
2021                 }
2022
2023                 for (i = begin; i < next_begin; i++) {
2024                         addr = &dev->data->mac_addrs[i];
2025                         if (rte_is_zero_ether_addr(addr))
2026                                 continue;
2027                         rte_memcpy(list->list[j].addr, addr->addr_bytes,
2028                                          sizeof(addr->addr_bytes));
2029                         PMD_DRV_LOG(DEBUG, "add/rm mac:%x:%x:%x:%x:%x:%x",
2030                                     addr->addr_bytes[0], addr->addr_bytes[1],
2031                                     addr->addr_bytes[2], addr->addr_bytes[3],
2032                                     addr->addr_bytes[4], addr->addr_bytes[5]);
2033                         j++;
2034                 }
2035                 list->vsi_id = vf->vsi_res->vsi_id;
2036                 list->num_elements = j;
2037                 args.ops = add ? VIRTCHNL_OP_ADD_ETH_ADDR :
2038                            VIRTCHNL_OP_DEL_ETH_ADDR;
2039                 args.in_args = (uint8_t *)list;
2040                 args.in_args_size = len;
2041                 args.out_buffer = vf->aq_resp;
2042                 args.out_size = I40E_AQ_BUF_SZ;
2043                 err = i40evf_execute_vf_cmd(dev, &args);
2044                 if (err) {
2045                         PMD_DRV_LOG(ERR, "fail to execute command %s",
2046                                     add ? "OP_ADD_ETHER_ADDRESS" :
2047                                     "OP_DEL_ETHER_ADDRESS");
2048                 } else {
2049                         if (add)
2050                                 vf->vsi.mac_num++;
2051                         else
2052                                 vf->vsi.mac_num--;
2053                 }
2054                 rte_free(list);
2055                 begin = next_begin;
2056         } while (begin < I40E_NUM_MACADDR_MAX);
2057 }
2058
2059 static int
2060 i40evf_dev_start(struct rte_eth_dev *dev)
2061 {
2062         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2063         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2064         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2065         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2066         uint32_t intr_vector = 0;
2067
2068         PMD_INIT_FUNC_TRACE();
2069
2070         hw->adapter_stopped = 0;
2071
2072         vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
2073         vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
2074                                         dev->data->nb_tx_queues);
2075
2076         /* check and configure queue intr-vector mapping */
2077         if (rte_intr_cap_multiple(intr_handle) &&
2078             dev->data->dev_conf.intr_conf.rxq) {
2079                 intr_vector = dev->data->nb_rx_queues;
2080                 if (rte_intr_efd_enable(intr_handle, intr_vector))
2081                         return -1;
2082         }
2083
2084         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
2085                 intr_handle->intr_vec =
2086                         rte_zmalloc("intr_vec",
2087                                     dev->data->nb_rx_queues * sizeof(int), 0);
2088                 if (!intr_handle->intr_vec) {
2089                         PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
2090                                      " intr_vec", dev->data->nb_rx_queues);
2091                         return -ENOMEM;
2092                 }
2093         }
2094
2095         if (i40evf_rx_init(dev) != 0){
2096                 PMD_DRV_LOG(ERR, "failed to do RX init");
2097                 return -1;
2098         }
2099
2100         i40evf_tx_init(dev);
2101
2102         if (i40evf_configure_vsi_queues(dev) != 0) {
2103                 PMD_DRV_LOG(ERR, "configure queues failed");
2104                 goto err_queue;
2105         }
2106         if (i40evf_config_irq_map(dev)) {
2107                 PMD_DRV_LOG(ERR, "config_irq_map failed");
2108                 goto err_queue;
2109         }
2110
2111         /* Set all mac addrs */
2112         i40evf_add_del_all_mac_addr(dev, TRUE);
2113         /* Set all multicast addresses */
2114         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2115                                 TRUE);
2116
2117         if (i40evf_start_queues(dev) != 0) {
2118                 PMD_DRV_LOG(ERR, "enable queues failed");
2119                 goto err_mac;
2120         }
2121
2122         /* only enable interrupt in rx interrupt mode */
2123         if (dev->data->dev_conf.intr_conf.rxq != 0)
2124                 rte_intr_enable(intr_handle);
2125
2126         i40evf_enable_queues_intr(dev);
2127
2128         return 0;
2129
2130 err_mac:
2131         i40evf_add_del_all_mac_addr(dev, FALSE);
2132         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2133                                 FALSE);
2134 err_queue:
2135         return -1;
2136 }
2137
2138 static void
2139 i40evf_dev_stop(struct rte_eth_dev *dev)
2140 {
2141         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2142         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2143         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2144         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2145
2146         PMD_INIT_FUNC_TRACE();
2147
2148         if (dev->data->dev_conf.intr_conf.rxq != 0)
2149                 rte_intr_disable(intr_handle);
2150
2151         if (hw->adapter_stopped == 1)
2152                 return;
2153         i40evf_stop_queues(dev);
2154         i40evf_disable_queues_intr(dev);
2155         i40e_dev_clear_queues(dev);
2156
2157         /* Clean datapath event and queue/vec mapping */
2158         rte_intr_efd_disable(intr_handle);
2159         if (intr_handle->intr_vec) {
2160                 rte_free(intr_handle->intr_vec);
2161                 intr_handle->intr_vec = NULL;
2162         }
2163         /* remove all mac addrs */
2164         i40evf_add_del_all_mac_addr(dev, FALSE);
2165         /* remove all multicast addresses */
2166         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2167                                 FALSE);
2168         hw->adapter_stopped = 1;
2169
2170 }
2171
2172 static int
2173 i40evf_dev_link_update(struct rte_eth_dev *dev,
2174                        __rte_unused int wait_to_complete)
2175 {
2176         struct rte_eth_link new_link;
2177         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2178         /*
2179          * DPDK pf host provide interfacet to acquire link status
2180          * while Linux driver does not
2181          */
2182
2183         memset(&new_link, 0, sizeof(new_link));
2184         /* Linux driver PF host */
2185         switch (vf->link_speed) {
2186         case I40E_LINK_SPEED_100MB:
2187                 new_link.link_speed = ETH_SPEED_NUM_100M;
2188                 break;
2189         case I40E_LINK_SPEED_1GB:
2190                 new_link.link_speed = ETH_SPEED_NUM_1G;
2191                 break;
2192         case I40E_LINK_SPEED_10GB:
2193                 new_link.link_speed = ETH_SPEED_NUM_10G;
2194                 break;
2195         case I40E_LINK_SPEED_20GB:
2196                 new_link.link_speed = ETH_SPEED_NUM_20G;
2197                 break;
2198         case I40E_LINK_SPEED_25GB:
2199                 new_link.link_speed = ETH_SPEED_NUM_25G;
2200                 break;
2201         case I40E_LINK_SPEED_40GB:
2202                 new_link.link_speed = ETH_SPEED_NUM_40G;
2203                 break;
2204         default:
2205                 new_link.link_speed = ETH_SPEED_NUM_NONE;
2206                 break;
2207         }
2208         /* full duplex only */
2209         new_link.link_duplex = ETH_LINK_FULL_DUPLEX;
2210         new_link.link_status = vf->link_up &&
2211                                 new_link.link_speed != ETH_SPEED_NUM_NONE
2212                                 ? ETH_LINK_UP
2213                                 : ETH_LINK_DOWN;
2214         new_link.link_autoneg =
2215                 !(dev->data->dev_conf.link_speeds & ETH_LINK_SPEED_FIXED);
2216
2217         return rte_eth_linkstatus_set(dev, &new_link);
2218 }
2219
2220 static int
2221 i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev)
2222 {
2223         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2224
2225         return i40evf_config_promisc(dev, true, vf->promisc_multicast_enabled);
2226 }
2227
2228 static int
2229 i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev)
2230 {
2231         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2232
2233         return i40evf_config_promisc(dev, false, vf->promisc_multicast_enabled);
2234 }
2235
2236 static int
2237 i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev)
2238 {
2239         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2240
2241         return i40evf_config_promisc(dev, vf->promisc_unicast_enabled, true);
2242 }
2243
2244 static int
2245 i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev)
2246 {
2247         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2248
2249         return i40evf_config_promisc(dev, vf->promisc_unicast_enabled, false);
2250 }
2251
2252 static int
2253 i40evf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
2254 {
2255         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2256
2257         dev_info->max_rx_queues = I40E_MAX_QP_NUM_PER_VF;
2258         dev_info->max_tx_queues = I40E_MAX_QP_NUM_PER_VF;
2259         dev_info->min_rx_bufsize = I40E_BUF_SIZE_MIN;
2260         dev_info->max_rx_pktlen = I40E_FRAME_SIZE_MAX;
2261         dev_info->max_mtu = dev_info->max_rx_pktlen - I40E_ETH_OVERHEAD;
2262         dev_info->min_mtu = RTE_ETHER_MIN_MTU;
2263         dev_info->hash_key_size = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2264         dev_info->reta_size = ETH_RSS_RETA_SIZE_64;
2265         dev_info->flow_type_rss_offloads = vf->adapter->flow_types_mask;
2266         dev_info->max_mac_addrs = I40E_NUM_MACADDR_MAX;
2267         dev_info->rx_queue_offload_capa = 0;
2268         dev_info->rx_offload_capa =
2269                 DEV_RX_OFFLOAD_VLAN_STRIP |
2270                 DEV_RX_OFFLOAD_QINQ_STRIP |
2271                 DEV_RX_OFFLOAD_IPV4_CKSUM |
2272                 DEV_RX_OFFLOAD_UDP_CKSUM |
2273                 DEV_RX_OFFLOAD_TCP_CKSUM |
2274                 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
2275                 DEV_RX_OFFLOAD_SCATTER |
2276                 DEV_RX_OFFLOAD_JUMBO_FRAME |
2277                 DEV_RX_OFFLOAD_VLAN_FILTER;
2278
2279         dev_info->tx_queue_offload_capa = 0;
2280         dev_info->tx_offload_capa =
2281                 DEV_TX_OFFLOAD_VLAN_INSERT |
2282                 DEV_TX_OFFLOAD_QINQ_INSERT |
2283                 DEV_TX_OFFLOAD_IPV4_CKSUM |
2284                 DEV_TX_OFFLOAD_UDP_CKSUM |
2285                 DEV_TX_OFFLOAD_TCP_CKSUM |
2286                 DEV_TX_OFFLOAD_SCTP_CKSUM |
2287                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
2288                 DEV_TX_OFFLOAD_TCP_TSO |
2289                 DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
2290                 DEV_TX_OFFLOAD_GRE_TNL_TSO |
2291                 DEV_TX_OFFLOAD_IPIP_TNL_TSO |
2292                 DEV_TX_OFFLOAD_GENEVE_TNL_TSO |
2293                 DEV_TX_OFFLOAD_MULTI_SEGS;
2294
2295         dev_info->default_rxconf = (struct rte_eth_rxconf) {
2296                 .rx_thresh = {
2297                         .pthresh = I40E_DEFAULT_RX_PTHRESH,
2298                         .hthresh = I40E_DEFAULT_RX_HTHRESH,
2299                         .wthresh = I40E_DEFAULT_RX_WTHRESH,
2300                 },
2301                 .rx_free_thresh = I40E_DEFAULT_RX_FREE_THRESH,
2302                 .rx_drop_en = 0,
2303                 .offloads = 0,
2304         };
2305
2306         dev_info->default_txconf = (struct rte_eth_txconf) {
2307                 .tx_thresh = {
2308                         .pthresh = I40E_DEFAULT_TX_PTHRESH,
2309                         .hthresh = I40E_DEFAULT_TX_HTHRESH,
2310                         .wthresh = I40E_DEFAULT_TX_WTHRESH,
2311                 },
2312                 .tx_free_thresh = I40E_DEFAULT_TX_FREE_THRESH,
2313                 .tx_rs_thresh = I40E_DEFAULT_TX_RSBIT_THRESH,
2314                 .offloads = 0,
2315         };
2316
2317         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
2318                 .nb_max = I40E_MAX_RING_DESC,
2319                 .nb_min = I40E_MIN_RING_DESC,
2320                 .nb_align = I40E_ALIGN_RING_DESC,
2321         };
2322
2323         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
2324                 .nb_max = I40E_MAX_RING_DESC,
2325                 .nb_min = I40E_MIN_RING_DESC,
2326                 .nb_align = I40E_ALIGN_RING_DESC,
2327         };
2328
2329         return 0;
2330 }
2331
2332 static int
2333 i40evf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
2334 {
2335         int ret;
2336         struct i40e_eth_stats *pstats = NULL;
2337         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2338         struct i40e_vsi *vsi = &vf->vsi;
2339
2340         ret = i40evf_query_stats(dev, &pstats);
2341         if (ret == 0) {
2342                 i40evf_update_stats(vsi, pstats);
2343
2344                 stats->ipackets = pstats->rx_unicast + pstats->rx_multicast +
2345                                                 pstats->rx_broadcast;
2346                 stats->opackets = pstats->tx_broadcast + pstats->tx_multicast +
2347                                                 pstats->tx_unicast;
2348                 stats->imissed = pstats->rx_discards;
2349                 stats->oerrors = pstats->tx_errors + pstats->tx_discards;
2350                 stats->ibytes = pstats->rx_bytes;
2351                 stats->obytes = pstats->tx_bytes;
2352         } else {
2353                 PMD_DRV_LOG(ERR, "Get statistics failed");
2354         }
2355         return ret;
2356 }
2357
2358 static void
2359 i40evf_dev_close(struct rte_eth_dev *dev)
2360 {
2361         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2362         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2363
2364         i40evf_dev_stop(dev);
2365         i40e_dev_free_queues(dev);
2366         /*
2367          * disable promiscuous mode before reset vf
2368          * it is a workaround solution when work with kernel driver
2369          * and it is not the normal way
2370          */
2371         if (vf->promisc_unicast_enabled || vf->promisc_multicast_enabled)
2372                 i40evf_config_promisc(dev, false, false);
2373
2374         rte_eal_alarm_cancel(i40evf_dev_alarm_handler, dev);
2375
2376         i40evf_reset_vf(dev);
2377         i40e_shutdown_adminq(hw);
2378         i40evf_disable_irq0(hw);
2379
2380         dev->dev_ops = NULL;
2381         dev->rx_pkt_burst = NULL;
2382         dev->tx_pkt_burst = NULL;
2383
2384         rte_free(vf->vf_res);
2385         vf->vf_res = NULL;
2386         rte_free(vf->aq_resp);
2387         vf->aq_resp = NULL;
2388
2389         hw->adapter_closed = 1;
2390 }
2391
2392 /*
2393  * Reset VF device only to re-initialize resources in PMD layer
2394  */
2395 static int
2396 i40evf_dev_reset(struct rte_eth_dev *dev)
2397 {
2398         int ret;
2399
2400         ret = i40evf_dev_uninit(dev);
2401         if (ret)
2402                 return ret;
2403
2404         ret = i40evf_dev_init(dev);
2405
2406         return ret;
2407 }
2408
2409 static int
2410 i40evf_get_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2411 {
2412         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2413         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2414         int ret;
2415
2416         if (!lut)
2417                 return -EINVAL;
2418
2419         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2420                 ret = i40e_aq_get_rss_lut(hw, vsi->vsi_id, FALSE,
2421                                           lut, lut_size);
2422                 if (ret) {
2423                         PMD_DRV_LOG(ERR, "Failed to get RSS lookup table");
2424                         return ret;
2425                 }
2426         } else {
2427                 uint32_t *lut_dw = (uint32_t *)lut;
2428                 uint16_t i, lut_size_dw = lut_size / 4;
2429
2430                 for (i = 0; i < lut_size_dw; i++)
2431                         lut_dw[i] = I40E_READ_REG(hw, I40E_VFQF_HLUT(i));
2432         }
2433
2434         return 0;
2435 }
2436
2437 static int
2438 i40evf_set_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2439 {
2440         struct i40e_vf *vf;
2441         struct i40e_hw *hw;
2442         int ret;
2443
2444         if (!vsi || !lut)
2445                 return -EINVAL;
2446
2447         vf = I40E_VSI_TO_VF(vsi);
2448         hw = I40E_VSI_TO_HW(vsi);
2449
2450         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2451                 ret = i40e_aq_set_rss_lut(hw, vsi->vsi_id, FALSE,
2452                                           lut, lut_size);
2453                 if (ret) {
2454                         PMD_DRV_LOG(ERR, "Failed to set RSS lookup table");
2455                         return ret;
2456                 }
2457         } else {
2458                 uint32_t *lut_dw = (uint32_t *)lut;
2459                 uint16_t i, lut_size_dw = lut_size / 4;
2460
2461                 for (i = 0; i < lut_size_dw; i++)
2462                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i), lut_dw[i]);
2463                 I40EVF_WRITE_FLUSH(hw);
2464         }
2465
2466         return 0;
2467 }
2468
2469 static int
2470 i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
2471                            struct rte_eth_rss_reta_entry64 *reta_conf,
2472                            uint16_t reta_size)
2473 {
2474         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2475         uint8_t *lut;
2476         uint16_t i, idx, shift;
2477         int ret;
2478
2479         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2480                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2481                         "(%d) doesn't match the number of hardware can "
2482                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2483                 return -EINVAL;
2484         }
2485
2486         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2487         if (!lut) {
2488                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2489                 return -ENOMEM;
2490         }
2491         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2492         if (ret)
2493                 goto out;
2494         for (i = 0; i < reta_size; i++) {
2495                 idx = i / RTE_RETA_GROUP_SIZE;
2496                 shift = i % RTE_RETA_GROUP_SIZE;
2497                 if (reta_conf[idx].mask & (1ULL << shift))
2498                         lut[i] = reta_conf[idx].reta[shift];
2499         }
2500         ret = i40evf_set_rss_lut(&vf->vsi, lut, reta_size);
2501
2502 out:
2503         rte_free(lut);
2504
2505         return ret;
2506 }
2507
2508 static int
2509 i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
2510                           struct rte_eth_rss_reta_entry64 *reta_conf,
2511                           uint16_t reta_size)
2512 {
2513         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2514         uint16_t i, idx, shift;
2515         uint8_t *lut;
2516         int ret;
2517
2518         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2519                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2520                         "(%d) doesn't match the number of hardware can "
2521                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2522                 return -EINVAL;
2523         }
2524
2525         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2526         if (!lut) {
2527                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2528                 return -ENOMEM;
2529         }
2530
2531         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2532         if (ret)
2533                 goto out;
2534         for (i = 0; i < reta_size; i++) {
2535                 idx = i / RTE_RETA_GROUP_SIZE;
2536                 shift = i % RTE_RETA_GROUP_SIZE;
2537                 if (reta_conf[idx].mask & (1ULL << shift))
2538                         reta_conf[idx].reta[shift] = lut[i];
2539         }
2540
2541 out:
2542         rte_free(lut);
2543
2544         return ret;
2545 }
2546
2547 static int
2548 i40evf_set_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t key_len)
2549 {
2550         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2551         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2552         int ret = 0;
2553
2554         if (!key || key_len == 0) {
2555                 PMD_DRV_LOG(DEBUG, "No key to be configured");
2556                 return 0;
2557         } else if (key_len != (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2558                 sizeof(uint32_t)) {
2559                 PMD_DRV_LOG(ERR, "Invalid key length %u", key_len);
2560                 return -EINVAL;
2561         }
2562
2563         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2564                 struct i40e_aqc_get_set_rss_key_data *key_dw =
2565                         (struct i40e_aqc_get_set_rss_key_data *)key;
2566
2567                 ret = i40e_aq_set_rss_key(hw, vsi->vsi_id, key_dw);
2568                 if (ret)
2569                         PMD_INIT_LOG(ERR, "Failed to configure RSS key "
2570                                      "via AQ");
2571         } else {
2572                 uint32_t *hash_key = (uint32_t *)key;
2573                 uint16_t i;
2574
2575                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2576                         i40e_write_rx_ctl(hw, I40E_VFQF_HKEY(i), hash_key[i]);
2577                 I40EVF_WRITE_FLUSH(hw);
2578         }
2579
2580         return ret;
2581 }
2582
2583 static int
2584 i40evf_get_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t *key_len)
2585 {
2586         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2587         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2588         int ret;
2589
2590         if (!key || !key_len)
2591                 return -EINVAL;
2592
2593         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2594                 ret = i40e_aq_get_rss_key(hw, vsi->vsi_id,
2595                         (struct i40e_aqc_get_set_rss_key_data *)key);
2596                 if (ret) {
2597                         PMD_INIT_LOG(ERR, "Failed to get RSS key via AQ");
2598                         return ret;
2599                 }
2600         } else {
2601                 uint32_t *key_dw = (uint32_t *)key;
2602                 uint16_t i;
2603
2604                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2605                         key_dw[i] = i40e_read_rx_ctl(hw, I40E_VFQF_HKEY(i));
2606         }
2607         *key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2608
2609         return 0;
2610 }
2611
2612 static int
2613 i40evf_hw_rss_hash_set(struct i40e_vf *vf, struct rte_eth_rss_conf *rss_conf)
2614 {
2615         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2616         uint64_t hena;
2617         int ret;
2618
2619         ret = i40evf_set_rss_key(&vf->vsi, rss_conf->rss_key,
2620                                  rss_conf->rss_key_len);
2621         if (ret)
2622                 return ret;
2623
2624         hena = i40e_config_hena(vf->adapter, rss_conf->rss_hf);
2625         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
2626         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
2627         I40EVF_WRITE_FLUSH(hw);
2628
2629         return 0;
2630 }
2631
2632 static void
2633 i40evf_disable_rss(struct i40e_vf *vf)
2634 {
2635         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2636
2637         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), 0);
2638         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), 0);
2639         I40EVF_WRITE_FLUSH(hw);
2640 }
2641
2642 static int
2643 i40evf_config_rss(struct i40e_vf *vf)
2644 {
2645         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2646         struct rte_eth_rss_conf rss_conf;
2647         uint32_t i, j, lut = 0, nb_q = (I40E_VFQF_HLUT_MAX_INDEX + 1) * 4;
2648         uint32_t rss_lut_size = (I40E_VFQF_HLUT1_MAX_INDEX + 1) * 4;
2649         uint16_t num;
2650         uint8_t *lut_info;
2651         int ret;
2652
2653         if (vf->dev_data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
2654                 i40evf_disable_rss(vf);
2655                 PMD_DRV_LOG(DEBUG, "RSS not configured");
2656                 return 0;
2657         }
2658
2659         num = RTE_MIN(vf->dev_data->nb_rx_queues, I40E_MAX_QP_NUM_PER_VF);
2660         /* Fill out the look up table */
2661         if (!(vf->flags & I40E_FLAG_RSS_AQ_CAPABLE)) {
2662                 for (i = 0, j = 0; i < nb_q; i++, j++) {
2663                         if (j >= num)
2664                                 j = 0;
2665                         lut = (lut << 8) | j;
2666                         if ((i & 3) == 3)
2667                                 I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
2668                 }
2669         } else {
2670                 lut_info = rte_zmalloc("i40e_rss_lut", rss_lut_size, 0);
2671                 if (!lut_info) {
2672                         PMD_DRV_LOG(ERR, "No memory can be allocated");
2673                         return -ENOMEM;
2674                 }
2675
2676                 for (i = 0; i < rss_lut_size; i++)
2677                         lut_info[i] = i % vf->num_queue_pairs;
2678
2679                 ret = i40evf_set_rss_lut(&vf->vsi, lut_info,
2680                                          rss_lut_size);
2681                 rte_free(lut_info);
2682                 if (ret)
2683                         return ret;
2684         }
2685
2686         rss_conf = vf->dev_data->dev_conf.rx_adv_conf.rss_conf;
2687         if ((rss_conf.rss_hf & vf->adapter->flow_types_mask) == 0) {
2688                 i40evf_disable_rss(vf);
2689                 PMD_DRV_LOG(DEBUG, "No hash flag is set");
2690                 return 0;
2691         }
2692
2693         if (rss_conf.rss_key == NULL || rss_conf.rss_key_len <
2694                 (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t)) {
2695                 /* Calculate the default hash key */
2696                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2697                         rss_key_default[i] = (uint32_t)rte_rand();
2698                 rss_conf.rss_key = (uint8_t *)rss_key_default;
2699                 rss_conf.rss_key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2700                         sizeof(uint32_t);
2701         }
2702
2703         return i40evf_hw_rss_hash_set(vf, &rss_conf);
2704 }
2705
2706 static int
2707 i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
2708                            struct rte_eth_rss_conf *rss_conf)
2709 {
2710         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2711         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2712         uint64_t rss_hf = rss_conf->rss_hf & vf->adapter->flow_types_mask;
2713         uint64_t hena;
2714
2715         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2716         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2717
2718         if (!(hena & vf->adapter->pctypes_mask)) { /* RSS disabled */
2719                 if (rss_hf != 0) /* Enable RSS */
2720                         return -EINVAL;
2721                 return 0;
2722         }
2723
2724         /* RSS enabled */
2725         if (rss_hf == 0) /* Disable RSS */
2726                 return -EINVAL;
2727
2728         return i40evf_hw_rss_hash_set(vf, rss_conf);
2729 }
2730
2731 static int
2732 i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
2733                              struct rte_eth_rss_conf *rss_conf)
2734 {
2735         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2736         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2737         uint64_t hena;
2738
2739         i40evf_get_rss_key(&vf->vsi, rss_conf->rss_key,
2740                            &rss_conf->rss_key_len);
2741
2742         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2743         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2744         rss_conf->rss_hf = i40e_parse_hena(vf->adapter, hena);
2745
2746         return 0;
2747 }
2748
2749 static int
2750 i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
2751 {
2752         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2753         struct rte_eth_dev_data *dev_data = vf->dev_data;
2754         uint32_t frame_size = mtu + I40E_ETH_OVERHEAD;
2755         int ret = 0;
2756
2757         /* check if mtu is within the allowed range */
2758         if (mtu < RTE_ETHER_MIN_MTU || frame_size > I40E_FRAME_SIZE_MAX)
2759                 return -EINVAL;
2760
2761         /* mtu setting is forbidden if port is start */
2762         if (dev_data->dev_started) {
2763                 PMD_DRV_LOG(ERR, "port %d must be stopped before configuration",
2764                             dev_data->port_id);
2765                 return -EBUSY;
2766         }
2767
2768         if (frame_size > RTE_ETHER_MAX_LEN)
2769                 dev_data->dev_conf.rxmode.offloads |=
2770                         DEV_RX_OFFLOAD_JUMBO_FRAME;
2771         else
2772                 dev_data->dev_conf.rxmode.offloads &=
2773                         ~DEV_RX_OFFLOAD_JUMBO_FRAME;
2774         dev_data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
2775
2776         return ret;
2777 }
2778
2779 static int
2780 i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
2781                             struct rte_ether_addr *mac_addr)
2782 {
2783         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2784
2785         if (!rte_is_valid_assigned_ether_addr(mac_addr)) {
2786                 PMD_DRV_LOG(ERR, "Tried to set invalid MAC address.");
2787                 return -EINVAL;
2788         }
2789
2790         i40evf_del_mac_addr_by_addr(dev, (struct rte_ether_addr *)hw->mac.addr);
2791
2792         if (i40evf_add_mac_addr(dev, mac_addr, 0, 0) != 0)
2793                 return -EIO;
2794
2795         rte_ether_addr_copy(mac_addr, (struct rte_ether_addr *)hw->mac.addr);
2796         return 0;
2797 }
2798
2799 static int
2800 i40evf_add_del_mc_addr_list(struct rte_eth_dev *dev,
2801                         struct rte_ether_addr *mc_addrs,
2802                         uint32_t mc_addrs_num, bool add)
2803 {
2804         struct virtchnl_ether_addr_list *list;
2805         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2806         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) +
2807                 (I40E_NUM_MACADDR_MAX * sizeof(struct virtchnl_ether_addr))];
2808         uint32_t i;
2809         int err;
2810         struct vf_cmd_info args;
2811
2812         if (mc_addrs == NULL || mc_addrs_num == 0)
2813                 return 0;
2814
2815         if (mc_addrs_num > I40E_NUM_MACADDR_MAX)
2816                 return -EINVAL;
2817
2818         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
2819         list->vsi_id = vf->vsi_res->vsi_id;
2820         list->num_elements = mc_addrs_num;
2821
2822         for (i = 0; i < mc_addrs_num; i++) {
2823                 if (!I40E_IS_MULTICAST(mc_addrs[i].addr_bytes)) {
2824                         PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
2825                                     mc_addrs[i].addr_bytes[0],
2826                                     mc_addrs[i].addr_bytes[1],
2827                                     mc_addrs[i].addr_bytes[2],
2828                                     mc_addrs[i].addr_bytes[3],
2829                                     mc_addrs[i].addr_bytes[4],
2830                                     mc_addrs[i].addr_bytes[5]);
2831                         return -EINVAL;
2832                 }
2833
2834                 memcpy(list->list[i].addr, mc_addrs[i].addr_bytes,
2835                         sizeof(list->list[i].addr));
2836         }
2837
2838         args.ops = add ? VIRTCHNL_OP_ADD_ETH_ADDR : VIRTCHNL_OP_DEL_ETH_ADDR;
2839         args.in_args = cmd_buffer;
2840         args.in_args_size = sizeof(struct virtchnl_ether_addr_list) +
2841                 i * sizeof(struct virtchnl_ether_addr);
2842         args.out_buffer = vf->aq_resp;
2843         args.out_size = I40E_AQ_BUF_SZ;
2844         err = i40evf_execute_vf_cmd(dev, &args);
2845         if (err) {
2846                 PMD_DRV_LOG(ERR, "fail to execute command %s",
2847                         add ? "OP_ADD_ETH_ADDR" : "OP_DEL_ETH_ADDR");
2848                 return err;
2849         }
2850
2851         return 0;
2852 }
2853
2854 static int
2855 i40evf_set_mc_addr_list(struct rte_eth_dev *dev,
2856                         struct rte_ether_addr *mc_addrs,
2857                         uint32_t mc_addrs_num)
2858 {
2859         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2860         int err;
2861
2862         /* flush previous addresses */
2863         err = i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2864                                 FALSE);
2865         if (err)
2866                 return err;
2867
2868         vf->mc_addrs_num = 0;
2869
2870         /* add new ones */
2871         err = i40evf_add_del_mc_addr_list(dev, mc_addrs, mc_addrs_num,
2872                                         TRUE);
2873         if (err)
2874                 return err;
2875
2876         vf->mc_addrs_num = mc_addrs_num;
2877         memcpy(vf->mc_addrs, mc_addrs, mc_addrs_num * sizeof(*mc_addrs));
2878
2879         return 0;
2880 }
2881
2882 bool
2883 is_i40evf_supported(struct rte_eth_dev *dev)
2884 {
2885         return is_device_supported(dev, &rte_i40evf_pmd);
2886 }