drivers/net/i40e/i40e_ethdev_vf.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <sys/queue.h>
  35 #include <stdio.h>
  36 #include <errno.h>
  37 #include <stdint.h>
  38 #include <string.h>
  39 #include <unistd.h>
  40 #include <stdarg.h>
  41 #include <inttypes.h>
  42 #include <rte_byteorder.h>
  43 #include <rte_common.h>
  44 #include <rte_cycles.h>
  45
  46 #include <rte_interrupts.h>
  47 #include <rte_log.h>
  48 #include <rte_debug.h>
  49 #include <rte_pci.h>
  50 #include <rte_atomic.h>
  51 #include <rte_branch_prediction.h>
  52 #include <rte_memory.h>
  53 #include <rte_memzone.h>
  54 #include <rte_eal.h>
  55 #include <rte_alarm.h>
  56 #include <rte_ether.h>
  57 #include <rte_ethdev.h>
  58 #include <rte_atomic.h>
  59 #include <rte_malloc.h>
  60 #include <rte_dev.h>
  61
  62 #include "i40e_logs.h"
  63 #include "base/i40e_prototype.h"
  64 #include "base/i40e_adminq_cmd.h"
  65 #include "base/i40e_type.h"
  66
  67 #include "i40e_rxtx.h"
  68 #include "i40e_ethdev.h"
  69 #include "i40e_pf.h"
  70 #define I40EVF_VSI_DEFAULT_MSIX_INTR     1
  71 #define I40EVF_VSI_DEFAULT_MSIX_INTR_LNX 0
  72
  73 /* busy wait delay in msec */
  74 #define I40EVF_BUSY_WAIT_DELAY 10
  75 #define I40EVF_BUSY_WAIT_COUNT 50
  76 #define MAX_RESET_WAIT_CNT     20
  77 /*ITR index for NOITR*/
  78 #define I40E_QINT_RQCTL_MSIX_INDX_NOITR     3
  79
  80 struct i40evf_arq_msg_info {
  81         enum i40e_virtchnl_ops ops;
  82         enum i40e_status_code result;
  83         uint16_t buf_len;
  84         uint16_t msg_len;
  85         uint8_t *msg;
  86 };
  87
  88 struct vf_cmd_info {
  89         enum i40e_virtchnl_ops ops;
  90         uint8_t *in_args;
  91         uint32_t in_args_size;
  92         uint8_t *out_buffer;
  93         /* Input & output type. pass in buffer size and pass out
  94          * actual return result
  95          */
  96         uint32_t out_size;
  97 };
  98
  99 enum i40evf_aq_result {
 100         I40EVF_MSG_ERR = -1, /* Meet error when accessing admin queue */
 101         I40EVF_MSG_NON,      /* Read nothing from admin queue */
 102         I40EVF_MSG_SYS,      /* Read system msg from admin queue */
 103         I40EVF_MSG_CMD,      /* Read async command result */
 104 };
 105
 106 /* A share buffer to store the command result from PF driver */
 107 static uint8_t cmd_result_buffer[I40E_AQ_BUF_SZ];
 108
 109 static int i40evf_dev_configure(struct rte_eth_dev *dev);
 110 static int i40evf_dev_start(struct rte_eth_dev *dev);
 111 static void i40evf_dev_stop(struct rte_eth_dev *dev);
 112 static void i40evf_dev_info_get(struct rte_eth_dev *dev,
 113                                 struct rte_eth_dev_info *dev_info);
 114 static int i40evf_dev_link_update(struct rte_eth_dev *dev,
 115                                   __rte_unused int wait_to_complete);
 116 static void i40evf_dev_stats_get(struct rte_eth_dev *dev,
 117                                 struct rte_eth_stats *stats);
 118 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
 119                                  struct rte_eth_xstats *xstats, unsigned n);
 120 static void i40evf_dev_xstats_reset(struct rte_eth_dev *dev);
 121 static int i40evf_vlan_filter_set(struct rte_eth_dev *dev,
 122                                   uint16_t vlan_id, int on);
 123 static void i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask);
 124 static int i40evf_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t pvid,
 125                                 int on);
 126 static void i40evf_dev_close(struct rte_eth_dev *dev);
 127 static void i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev);
 128 static void i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev);
 129 static void i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev);
 130 static void i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev);
 131 static int i40evf_get_link_status(struct rte_eth_dev *dev,
 132                                   struct rte_eth_link *link);
 133 static int i40evf_init_vlan(struct rte_eth_dev *dev);
 134 static int i40evf_dev_rx_queue_start(struct rte_eth_dev *dev,
 135                                      uint16_t rx_queue_id);
 136 static int i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev,
 137                                     uint16_t rx_queue_id);
 138 static int i40evf_dev_tx_queue_start(struct rte_eth_dev *dev,
 139                                      uint16_t tx_queue_id);
 140 static int i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev,
 141                                     uint16_t tx_queue_id);
 142 static int i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
 143                         struct rte_eth_rss_reta_entry64 *reta_conf,
 144                         uint16_t reta_size);
 145 static int i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
 146                         struct rte_eth_rss_reta_entry64 *reta_conf,
 147                         uint16_t reta_size);
 148 static int i40evf_config_rss(struct i40e_vf *vf);
 149 static int i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
 150                                       struct rte_eth_rss_conf *rss_conf);
 151 static int i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
 152                                         struct rte_eth_rss_conf *rss_conf);
 153 static int
 154 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id);
 155 static int
 156 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id);
 157
 158 /* Default hash key buffer for RSS */
 159 static uint32_t rss_key_default[I40E_VFQF_HKEY_MAX_INDEX + 1];
 160
 161 struct rte_i40evf_xstats_name_off {
 162         char name[RTE_ETH_XSTATS_NAME_SIZE];
 163         unsigned offset;
 164 };
 165
 166 static const struct rte_i40evf_xstats_name_off rte_i40evf_stats_strings[] = {
 167         {"rx_bytes", offsetof(struct i40e_eth_stats, rx_bytes)},
 168         {"rx_unicast_packets", offsetof(struct i40e_eth_stats, rx_unicast)},
 169         {"rx_multicast_packets", offsetof(struct i40e_eth_stats, rx_multicast)},
 170         {"rx_broadcast_packets", offsetof(struct i40e_eth_stats, rx_broadcast)},
 171         {"rx_dropped_packets", offsetof(struct i40e_eth_stats, rx_discards)},
 172         {"rx_unknown_protocol_packets", offsetof(struct i40e_eth_stats,
 173                 rx_unknown_protocol)},
 174         {"tx_bytes", offsetof(struct i40e_eth_stats, tx_bytes)},
 175         {"tx_unicast_packets", offsetof(struct i40e_eth_stats, tx_bytes)},
 176         {"tx_multicast_packets", offsetof(struct i40e_eth_stats, tx_bytes)},
 177         {"tx_broadcast_packets", offsetof(struct i40e_eth_stats, tx_bytes)},
 178         {"tx_dropped_packets", offsetof(struct i40e_eth_stats, tx_bytes)},
 179         {"tx_error_packets", offsetof(struct i40e_eth_stats, tx_bytes)},
 180 };
 181
 182 #define I40EVF_NB_XSTATS (sizeof(rte_i40evf_stats_strings) / \
 183                 sizeof(rte_i40evf_stats_strings[0]))
 184
 185 static const struct eth_dev_ops i40evf_eth_dev_ops = {
 186         .dev_configure        = i40evf_dev_configure,
 187         .dev_start            = i40evf_dev_start,
 188         .dev_stop             = i40evf_dev_stop,
 189         .promiscuous_enable   = i40evf_dev_promiscuous_enable,
 190         .promiscuous_disable  = i40evf_dev_promiscuous_disable,
 191         .allmulticast_enable  = i40evf_dev_allmulticast_enable,
 192         .allmulticast_disable = i40evf_dev_allmulticast_disable,
 193         .link_update          = i40evf_dev_link_update,
 194         .stats_get            = i40evf_dev_stats_get,
 195         .xstats_get           = i40evf_dev_xstats_get,
 196         .xstats_reset         = i40evf_dev_xstats_reset,
 197         .dev_close            = i40evf_dev_close,
 198         .dev_infos_get        = i40evf_dev_info_get,
 199         .vlan_filter_set      = i40evf_vlan_filter_set,
 200         .vlan_offload_set     = i40evf_vlan_offload_set,
 201         .vlan_pvid_set        = i40evf_vlan_pvid_set,
 202         .rx_queue_start       = i40evf_dev_rx_queue_start,
 203         .rx_queue_stop        = i40evf_dev_rx_queue_stop,
 204         .tx_queue_start       = i40evf_dev_tx_queue_start,
 205         .tx_queue_stop        = i40evf_dev_tx_queue_stop,
 206         .rx_queue_setup       = i40e_dev_rx_queue_setup,
 207         .rx_queue_release     = i40e_dev_rx_queue_release,
 208         .rx_queue_intr_enable = i40evf_dev_rx_queue_intr_enable,
 209         .rx_queue_intr_disable = i40evf_dev_rx_queue_intr_disable,
 210         .rx_descriptor_done   = i40e_dev_rx_descriptor_done,
 211         .tx_queue_setup       = i40e_dev_tx_queue_setup,
 212         .tx_queue_release     = i40e_dev_tx_queue_release,
 213         .reta_update          = i40evf_dev_rss_reta_update,
 214         .reta_query           = i40evf_dev_rss_reta_query,
 215         .rss_hash_update      = i40evf_dev_rss_hash_update,
 216         .rss_hash_conf_get    = i40evf_dev_rss_hash_conf_get,
 217 };
 218
 219 /*
 220  * Parse admin queue message.
 221  *
 222  * return value:
 223  *  < 0: meet error
 224  *  0: read sys msg
 225  *  > 0: read cmd result
 226  */
 227 static enum i40evf_aq_result
 228 i40evf_parse_pfmsg(struct i40e_vf *vf,
 229                    struct i40e_arq_event_info *event,
 230                    struct i40evf_arq_msg_info *data)
 231 {
 232         enum i40e_virtchnl_ops opcode = (enum i40e_virtchnl_ops)\
 233                         rte_le_to_cpu_32(event->desc.cookie_high);
 234         enum i40e_status_code retval = (enum i40e_status_code)\
 235                         rte_le_to_cpu_32(event->desc.cookie_low);
 236         enum i40evf_aq_result ret = I40EVF_MSG_CMD;
 237
 238         /* pf sys event */
 239         if (opcode == I40E_VIRTCHNL_OP_EVENT) {
 240                 struct i40e_virtchnl_pf_event *vpe =
 241                         (struct i40e_virtchnl_pf_event *)event->msg_buf;
 242
 243                 /* Initialize ret to sys event */
 244                 ret = I40EVF_MSG_SYS;
 245                 switch (vpe->event) {
 246                 case I40E_VIRTCHNL_EVENT_LINK_CHANGE:
 247                         vf->link_up =
 248                                 vpe->event_data.link_event.link_status;
 249                         vf->pend_msg |= PFMSG_LINK_CHANGE;
 250                         PMD_DRV_LOG(INFO, "Link status update:%s",
 251                                     vf->link_up ? "up" : "down");
 252                         break;
 253                 case I40E_VIRTCHNL_EVENT_RESET_IMPENDING:
 254                         vf->vf_reset = true;
 255                         vf->pend_msg |= PFMSG_RESET_IMPENDING;
 256                         PMD_DRV_LOG(INFO, "vf is reseting");
 257                         break;
 258                 case I40E_VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
 259                         vf->dev_closed = true;
 260                         vf->pend_msg |= PFMSG_DRIVER_CLOSE;
 261                         PMD_DRV_LOG(INFO, "PF driver closed");
 262                         break;
 263                 default:
 264                         PMD_DRV_LOG(ERR, "%s: Unknown event %d from pf",
 265                                     __func__, vpe->event);
 266                 }
 267         } else {
 268                 /* async reply msg on command issued by vf previously */
 269                 ret = I40EVF_MSG_CMD;
 270                 /* Actual data length read from PF */
 271                 data->msg_len = event->msg_len;
 272         }
 273         /* fill the ops and result to notify VF */
 274         data->result = retval;
 275         data->ops = opcode;
 276
 277         return ret;
 278 }
 279
 280 /*
 281  * Read data in admin queue to get msg from pf driver
 282  */
 283 static enum i40evf_aq_result
 284 i40evf_read_pfmsg(struct rte_eth_dev *dev, struct i40evf_arq_msg_info *data)
 285 {
 286         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 287         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 288         struct i40e_arq_event_info event;
 289         int ret;
 290         enum i40evf_aq_result result = I40EVF_MSG_NON;
 291
 292         event.buf_len = data->buf_len;
 293         event.msg_buf = data->msg;
 294         ret = i40e_clean_arq_element(hw, &event, NULL);
 295         /* Can't read any msg from adminQ */
 296         if (ret) {
 297                 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
 298                         result = I40EVF_MSG_NON;
 299                 else
 300                         result = I40EVF_MSG_ERR;
 301                 return result;
 302         }
 303
 304         /* Parse the event */
 305         result = i40evf_parse_pfmsg(vf, &event, data);
 306
 307         return result;
 308 }
 309
 310 /*
 311  * Polling read until command result return from pf driver or meet error.
 312  */
 313 static int
 314 i40evf_wait_cmd_done(struct rte_eth_dev *dev,
 315                      struct i40evf_arq_msg_info *data)
 316 {
 317         int i = 0;
 318         enum i40evf_aq_result ret;
 319
 320 #define MAX_TRY_TIMES 20
 321 #define ASQ_DELAY_MS  100
 322         do {
 323                 /* Delay some time first */
 324                 rte_delay_ms(ASQ_DELAY_MS);
 325                 ret = i40evf_read_pfmsg(dev, data);
 326                 if (ret == I40EVF_MSG_CMD)
 327                         return 0;
 328                 else if (ret == I40EVF_MSG_ERR)
 329                         return -1;
 330
 331                 /* If don't read msg or read sys event, continue */
 332         } while(i++ < MAX_TRY_TIMES);
 333
 334         return -1;
 335 }
 336
 337 /**
 338  * clear current command. Only call in case execute
 339  * _atomic_set_cmd successfully.
 340  */
 341 static inline void
 342 _clear_cmd(struct i40e_vf *vf)
 343 {
 344         rte_wmb();
 345         vf->pend_cmd = I40E_VIRTCHNL_OP_UNKNOWN;
 346 }
 347
 348 /*
 349  * Check there is pending cmd in execution. If none, set new command.
 350  */
 351 static inline int
 352 _atomic_set_cmd(struct i40e_vf *vf, enum i40e_virtchnl_ops ops)
 353 {
 354         int ret = rte_atomic32_cmpset(&vf->pend_cmd,
 355                         I40E_VIRTCHNL_OP_UNKNOWN, ops);
 356
 357         if (!ret)
 358                 PMD_DRV_LOG(ERR, "There is incomplete cmd %d", vf->pend_cmd);
 359
 360         return !ret;
 361 }
 362
 363 static int
 364 i40evf_execute_vf_cmd(struct rte_eth_dev *dev, struct vf_cmd_info *args)
 365 {
 366         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 367         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 368         int err = -1;
 369         struct i40evf_arq_msg_info info;
 370
 371         if (_atomic_set_cmd(vf, args->ops))
 372                 return -1;
 373
 374         info.msg = args->out_buffer;
 375         info.buf_len = args->out_size;
 376         info.ops = I40E_VIRTCHNL_OP_UNKNOWN;
 377         info.result = I40E_SUCCESS;
 378
 379         err = i40e_aq_send_msg_to_pf(hw, args->ops, I40E_SUCCESS,
 380                      args->in_args, args->in_args_size, NULL);
 381         if (err) {
 382                 PMD_DRV_LOG(ERR, "fail to send cmd %d", args->ops);
 383                 _clear_cmd(vf);
 384                 return err;
 385         }
 386
 387         err = i40evf_wait_cmd_done(dev, &info);
 388         /* read message and it's expected one */
 389         if (!err && args->ops == info.ops)
 390                 _clear_cmd(vf);
 391         else if (err) {
 392                 PMD_DRV_LOG(ERR, "Failed to read message from AdminQ");
 393                 _clear_cmd(vf);
 394         }
 395         else if (args->ops != info.ops)
 396                 PMD_DRV_LOG(ERR, "command mismatch, expect %u, get %u",
 397                             args->ops, info.ops);
 398
 399         return err | info.result;
 400 }
 401
 402 /*
 403  * Check API version with sync wait until version read or fail from admin queue
 404  */
 405 static int
 406 i40evf_check_api_version(struct rte_eth_dev *dev)
 407 {
 408         struct i40e_virtchnl_version_info version, *pver;
 409         int err;
 410         struct vf_cmd_info args;
 411         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 412
 413         version.major = I40E_VIRTCHNL_VERSION_MAJOR;
 414         version.minor = I40E_VIRTCHNL_VERSION_MINOR;
 415
 416         args.ops = I40E_VIRTCHNL_OP_VERSION;
 417         args.in_args = (uint8_t *)&version;
 418         args.in_args_size = sizeof(version);
 419         args.out_buffer = cmd_result_buffer;
 420         args.out_size = I40E_AQ_BUF_SZ;
 421
 422         err = i40evf_execute_vf_cmd(dev, &args);
 423         if (err) {
 424                 PMD_INIT_LOG(ERR, "fail to execute command OP_VERSION");
 425                 return err;
 426         }
 427
 428         pver = (struct i40e_virtchnl_version_info *)args.out_buffer;
 429         vf->version_major = pver->major;
 430         vf->version_minor = pver->minor;
 431         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
 432                 PMD_DRV_LOG(INFO, "Peer is DPDK PF host");
 433         else if ((vf->version_major == I40E_VIRTCHNL_VERSION_MAJOR) &&
 434                 (vf->version_minor <= I40E_VIRTCHNL_VERSION_MINOR))
 435                 PMD_DRV_LOG(INFO, "Peer is Linux PF host");
 436         else {
 437                 PMD_INIT_LOG(ERR, "PF/VF API version mismatch:(%u.%u)-(%u.%u)",
 438                                         vf->version_major, vf->version_minor,
 439                                                 I40E_VIRTCHNL_VERSION_MAJOR,
 440                                                 I40E_VIRTCHNL_VERSION_MINOR);
 441                 return -1;
 442         }
 443
 444         return 0;
 445 }
 446
 447 static int
 448 i40evf_get_vf_resource(struct rte_eth_dev *dev)
 449 {
 450         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 451         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 452         int err;
 453         struct vf_cmd_info args;
 454         uint32_t caps, len;
 455
 456         args.ops = I40E_VIRTCHNL_OP_GET_VF_RESOURCES;
 457         args.out_buffer = cmd_result_buffer;
 458         args.out_size = I40E_AQ_BUF_SZ;
 459         if (PF_IS_V11(vf)) {
 460                 caps = I40E_VIRTCHNL_VF_OFFLOAD_L2 |
 461                        I40E_VIRTCHNL_VF_OFFLOAD_RSS_AQ |
 462                        I40E_VIRTCHNL_VF_OFFLOAD_RSS_REG |
 463                        I40E_VIRTCHNL_VF_OFFLOAD_VLAN |
 464                        I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING;
 465                 args.in_args = (uint8_t *)&caps;
 466                 args.in_args_size = sizeof(caps);
 467         } else {
 468                 args.in_args = NULL;
 469                 args.in_args_size = 0;
 470         }
 471         err = i40evf_execute_vf_cmd(dev, &args);
 472
 473         if (err) {
 474                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_VF_RESOURCE");
 475                 return err;
 476         }
 477
 478         len =  sizeof(struct i40e_virtchnl_vf_resource) +
 479                 I40E_MAX_VF_VSI * sizeof(struct i40e_virtchnl_vsi_resource);
 480
 481         (void)rte_memcpy(vf->vf_res, args.out_buffer,
 482                         RTE_MIN(args.out_size, len));
 483         i40e_vf_parse_hw_config(hw, vf->vf_res);
 484
 485         return 0;
 486 }
 487
 488 static int
 489 i40evf_config_promisc(struct rte_eth_dev *dev,
 490                       bool enable_unicast,
 491                       bool enable_multicast)
 492 {
 493         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 494         int err;
 495         struct vf_cmd_info args;
 496         struct i40e_virtchnl_promisc_info promisc;
 497
 498         promisc.flags = 0;
 499         promisc.vsi_id = vf->vsi_res->vsi_id;
 500
 501         if (enable_unicast)
 502                 promisc.flags |= I40E_FLAG_VF_UNICAST_PROMISC;
 503
 504         if (enable_multicast)
 505                 promisc.flags |= I40E_FLAG_VF_MULTICAST_PROMISC;
 506
 507         args.ops = I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE;
 508         args.in_args = (uint8_t *)&promisc;
 509         args.in_args_size = sizeof(promisc);
 510         args.out_buffer = cmd_result_buffer;
 511         args.out_size = I40E_AQ_BUF_SZ;
 512
 513         err = i40evf_execute_vf_cmd(dev, &args);
 514
 515         if (err)
 516                 PMD_DRV_LOG(ERR, "fail to execute command "
 517                             "CONFIG_PROMISCUOUS_MODE");
 518         return err;
 519 }
 520
 521 /* Configure vlan and double vlan offload. Use flag to specify which part to configure */
 522 static int
 523 i40evf_config_vlan_offload(struct rte_eth_dev *dev,
 524                                 bool enable_vlan_strip)
 525 {
 526         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 527         int err;
 528         struct vf_cmd_info args;
 529         struct i40e_virtchnl_vlan_offload_info offload;
 530
 531         offload.vsi_id = vf->vsi_res->vsi_id;
 532         offload.enable_vlan_strip = enable_vlan_strip;
 533
 534         args.ops = (enum i40e_virtchnl_ops)I40E_VIRTCHNL_OP_CFG_VLAN_OFFLOAD;
 535         args.in_args = (uint8_t *)&offload;
 536         args.in_args_size = sizeof(offload);
 537         args.out_buffer = cmd_result_buffer;
 538         args.out_size = I40E_AQ_BUF_SZ;
 539
 540         err = i40evf_execute_vf_cmd(dev, &args);
 541         if (err)
 542                 PMD_DRV_LOG(ERR, "fail to execute command CFG_VLAN_OFFLOAD");
 543
 544         return err;
 545 }
 546
 547 static int
 548 i40evf_config_vlan_pvid(struct rte_eth_dev *dev,
 549                                 struct i40e_vsi_vlan_pvid_info *info)
 550 {
 551         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 552         int err;
 553         struct vf_cmd_info args;
 554         struct i40e_virtchnl_pvid_info tpid_info;
 555
 556         if (dev == NULL || info == NULL) {
 557                 PMD_DRV_LOG(ERR, "invalid parameters");
 558                 return I40E_ERR_PARAM;
 559         }
 560
 561         memset(&tpid_info, 0, sizeof(tpid_info));
 562         tpid_info.vsi_id = vf->vsi_res->vsi_id;
 563         (void)rte_memcpy(&tpid_info.info, info, sizeof(*info));
 564
 565         args.ops = (enum i40e_virtchnl_ops)I40E_VIRTCHNL_OP_CFG_VLAN_PVID;
 566         args.in_args = (uint8_t *)&tpid_info;
 567         args.in_args_size = sizeof(tpid_info);
 568         args.out_buffer = cmd_result_buffer;
 569         args.out_size = I40E_AQ_BUF_SZ;
 570
 571         err = i40evf_execute_vf_cmd(dev, &args);
 572         if (err)
 573                 PMD_DRV_LOG(ERR, "fail to execute command CFG_VLAN_PVID");
 574
 575         return err;
 576 }
 577
 578 static void
 579 i40evf_fill_virtchnl_vsi_txq_info(struct i40e_virtchnl_txq_info *txq_info,
 580                                   uint16_t vsi_id,
 581                                   uint16_t queue_id,
 582                                   uint16_t nb_txq,
 583                                   struct i40e_tx_queue *txq)
 584 {
 585         txq_info->vsi_id = vsi_id;
 586         txq_info->queue_id = queue_id;
 587         if (queue_id < nb_txq) {
 588                 txq_info->ring_len = txq->nb_tx_desc;
 589                 txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
 590         }
 591 }
 592
 593 static void
 594 i40evf_fill_virtchnl_vsi_rxq_info(struct i40e_virtchnl_rxq_info *rxq_info,
 595                                   uint16_t vsi_id,
 596                                   uint16_t queue_id,
 597                                   uint16_t nb_rxq,
 598                                   uint32_t max_pkt_size,
 599                                   struct i40e_rx_queue *rxq)
 600 {
 601         rxq_info->vsi_id = vsi_id;
 602         rxq_info->queue_id = queue_id;
 603         rxq_info->max_pkt_size = max_pkt_size;
 604         if (queue_id < nb_rxq) {
 605                 rxq_info->ring_len = rxq->nb_rx_desc;
 606                 rxq_info->dma_ring_addr = rxq->rx_ring_phys_addr;
 607                 rxq_info->databuffer_size =
 608                         (rte_pktmbuf_data_room_size(rxq->mp) -
 609                                 RTE_PKTMBUF_HEADROOM);
 610         }
 611 }
 612
 613 /* It configures VSI queues to co-work with Linux PF host */
 614 static int
 615 i40evf_configure_vsi_queues(struct rte_eth_dev *dev)
 616 {
 617         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 618         struct i40e_rx_queue **rxq =
 619                 (struct i40e_rx_queue **)dev->data->rx_queues;
 620         struct i40e_tx_queue **txq =
 621                 (struct i40e_tx_queue **)dev->data->tx_queues;
 622         struct i40e_virtchnl_vsi_queue_config_info *vc_vqci;
 623         struct i40e_virtchnl_queue_pair_info *vc_qpi;
 624         struct vf_cmd_info args;
 625         uint16_t i, nb_qp = vf->num_queue_pairs;
 626         const uint32_t size =
 627                 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqci, nb_qp);
 628         uint8_t buff[size];
 629         int ret;
 630
 631         memset(buff, 0, sizeof(buff));
 632         vc_vqci = (struct i40e_virtchnl_vsi_queue_config_info *)buff;
 633         vc_vqci->vsi_id = vf->vsi_res->vsi_id;
 634         vc_vqci->num_queue_pairs = nb_qp;
 635
 636         for (i = 0, vc_qpi = vc_vqci->qpair; i < nb_qp; i++, vc_qpi++) {
 637                 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpi->txq,
 638                         vc_vqci->vsi_id, i, dev->data->nb_tx_queues, txq[i]);
 639                 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpi->rxq,
 640                         vc_vqci->vsi_id, i, dev->data->nb_rx_queues,
 641                                         vf->max_pkt_len, rxq[i]);
 642         }
 643         memset(&args, 0, sizeof(args));
 644         args.ops = I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES;
 645         args.in_args = (uint8_t *)vc_vqci;
 646         args.in_args_size = size;
 647         args.out_buffer = cmd_result_buffer;
 648         args.out_size = I40E_AQ_BUF_SZ;
 649         ret = i40evf_execute_vf_cmd(dev, &args);
 650         if (ret)
 651                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 652                         "I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES\n");
 653
 654         return ret;
 655 }
 656
 657 /* It configures VSI queues to co-work with DPDK PF host */
 658 static int
 659 i40evf_configure_vsi_queues_ext(struct rte_eth_dev *dev)
 660 {
 661         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 662         struct i40e_rx_queue **rxq =
 663                 (struct i40e_rx_queue **)dev->data->rx_queues;
 664         struct i40e_tx_queue **txq =
 665                 (struct i40e_tx_queue **)dev->data->tx_queues;
 666         struct i40e_virtchnl_vsi_queue_config_ext_info *vc_vqcei;
 667         struct i40e_virtchnl_queue_pair_ext_info *vc_qpei;
 668         struct vf_cmd_info args;
 669         uint16_t i, nb_qp = vf->num_queue_pairs;
 670         const uint32_t size =
 671                 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqcei, nb_qp);
 672         uint8_t buff[size];
 673         int ret;
 674
 675         memset(buff, 0, sizeof(buff));
 676         vc_vqcei = (struct i40e_virtchnl_vsi_queue_config_ext_info *)buff;
 677         vc_vqcei->vsi_id = vf->vsi_res->vsi_id;
 678         vc_vqcei->num_queue_pairs = nb_qp;
 679         vc_qpei = vc_vqcei->qpair;
 680         for (i = 0; i < nb_qp; i++, vc_qpei++) {
 681                 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpei->txq,
 682                         vc_vqcei->vsi_id, i, dev->data->nb_tx_queues, txq[i]);
 683                 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpei->rxq,
 684                         vc_vqcei->vsi_id, i, dev->data->nb_rx_queues,
 685                                         vf->max_pkt_len, rxq[i]);
 686                 if (i < dev->data->nb_rx_queues)
 687                         /*
 688                          * It adds extra info for configuring VSI queues, which
 689                          * is needed to enable the configurable crc stripping
 690                          * in VF.
 691                          */
 692                         vc_qpei->rxq_ext.crcstrip =
 693                                 dev->data->dev_conf.rxmode.hw_strip_crc;
 694         }
 695         memset(&args, 0, sizeof(args));
 696         args.ops =
 697                 (enum i40e_virtchnl_ops)I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT;
 698         args.in_args = (uint8_t *)vc_vqcei;
 699         args.in_args_size = size;
 700         args.out_buffer = cmd_result_buffer;
 701         args.out_size = I40E_AQ_BUF_SZ;
 702         ret = i40evf_execute_vf_cmd(dev, &args);
 703         if (ret)
 704                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 705                         "I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT\n");
 706
 707         return ret;
 708 }
 709
 710 static int
 711 i40evf_configure_queues(struct rte_eth_dev *dev)
 712 {
 713         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 714
 715         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
 716                 /* To support DPDK PF host */
 717                 return i40evf_configure_vsi_queues_ext(dev);
 718         else
 719                 /* To support Linux PF host */
 720                 return i40evf_configure_vsi_queues(dev);
 721 }
 722
 723 static int
 724 i40evf_config_irq_map(struct rte_eth_dev *dev)
 725 {
 726         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 727         struct vf_cmd_info args;
 728         uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_irq_map_info) + \
 729                 sizeof(struct i40e_virtchnl_vector_map)];
 730         struct i40e_virtchnl_irq_map_info *map_info;
 731         struct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;
 732         uint32_t vector_id;
 733         int i, err;
 734
 735         if (rte_intr_allow_others(intr_handle)) {
 736                 if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
 737                         vector_id = I40EVF_VSI_DEFAULT_MSIX_INTR;
 738                 else
 739                         vector_id = I40EVF_VSI_DEFAULT_MSIX_INTR_LNX;
 740         } else {
 741                 vector_id = I40E_MISC_VEC_ID;
 742         }
 743
 744         map_info = (struct i40e_virtchnl_irq_map_info *)cmd_buffer;
 745         map_info->num_vectors = 1;
 746         map_info->vecmap[0].rxitr_idx = I40E_QINT_RQCTL_MSIX_INDX_NOITR;
 747         map_info->vecmap[0].vsi_id = vf->vsi_res->vsi_id;
 748         /* Alway use default dynamic MSIX interrupt */
 749         map_info->vecmap[0].vector_id = vector_id;
 750         /* Don't map any tx queue */
 751         map_info->vecmap[0].txq_map = 0;
 752         map_info->vecmap[0].rxq_map = 0;
 753         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 754                 map_info->vecmap[0].rxq_map |= 1 << i;
 755                 if (rte_intr_dp_is_en(intr_handle))
 756                         intr_handle->intr_vec[i] = vector_id;
 757         }
 758
 759         args.ops = I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP;
 760         args.in_args = (u8 *)cmd_buffer;
 761         args.in_args_size = sizeof(cmd_buffer);
 762         args.out_buffer = cmd_result_buffer;
 763         args.out_size = I40E_AQ_BUF_SZ;
 764         err = i40evf_execute_vf_cmd(dev, &args);
 765         if (err)
 766                 PMD_DRV_LOG(ERR, "fail to execute command OP_ENABLE_QUEUES");
 767
 768         return err;
 769 }
 770
 771 static int
 772 i40evf_switch_queue(struct rte_eth_dev *dev, bool isrx, uint16_t qid,
 773                                 bool on)
 774 {
 775         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 776         struct i40e_virtchnl_queue_select queue_select;
 777         int err;
 778         struct vf_cmd_info args;
 779         memset(&queue_select, 0, sizeof(queue_select));
 780         queue_select.vsi_id = vf->vsi_res->vsi_id;
 781
 782         if (isrx)
 783                 queue_select.rx_queues |= 1 << qid;
 784         else
 785                 queue_select.tx_queues |= 1 << qid;
 786
 787         if (on)
 788                 args.ops = I40E_VIRTCHNL_OP_ENABLE_QUEUES;
 789         else
 790                 args.ops = I40E_VIRTCHNL_OP_DISABLE_QUEUES;
 791         args.in_args = (u8 *)&queue_select;
 792         args.in_args_size = sizeof(queue_select);
 793         args.out_buffer = cmd_result_buffer;
 794         args.out_size = I40E_AQ_BUF_SZ;
 795         err = i40evf_execute_vf_cmd(dev, &args);
 796         if (err)
 797                 PMD_DRV_LOG(ERR, "fail to switch %s %u %s",
 798                             isrx ? "RX" : "TX", qid, on ? "on" : "off");
 799
 800         return err;
 801 }
 802
 803 static int
 804 i40evf_start_queues(struct rte_eth_dev *dev)
 805 {
 806         struct rte_eth_dev_data *dev_data = dev->data;
 807         int i;
 808         struct i40e_rx_queue *rxq;
 809         struct i40e_tx_queue *txq;
 810
 811         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 812                 rxq = dev_data->rx_queues[i];
 813                 if (rxq->rx_deferred_start)
 814                         continue;
 815                 if (i40evf_dev_rx_queue_start(dev, i) != 0) {
 816                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 817                         return -1;
 818                 }
 819         }
 820
 821         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 822                 txq = dev_data->tx_queues[i];
 823                 if (txq->tx_deferred_start)
 824                         continue;
 825                 if (i40evf_dev_tx_queue_start(dev, i) != 0) {
 826                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 827                         return -1;
 828                 }
 829         }
 830
 831         return 0;
 832 }
 833
 834 static int
 835 i40evf_stop_queues(struct rte_eth_dev *dev)
 836 {
 837         int i;
 838
 839         /* Stop TX queues first */
 840         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 841                 if (i40evf_dev_tx_queue_stop(dev, i) != 0) {
 842                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 843                         return -1;
 844                 }
 845         }
 846
 847         /* Then stop RX queues */
 848         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 849                 if (i40evf_dev_rx_queue_stop(dev, i) != 0) {
 850                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 851                         return -1;
 852                 }
 853         }
 854
 855         return 0;
 856 }
 857
 858 static int
 859 i40evf_add_mac_addr(struct rte_eth_dev *dev, struct ether_addr *addr)
 860 {
 861         struct i40e_virtchnl_ether_addr_list *list;
 862         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 863         uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_ether_addr_list) + \
 864                         sizeof(struct i40e_virtchnl_ether_addr)];
 865         int err;
 866         struct vf_cmd_info args;
 867
 868         if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
 869                 PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
 870                             addr->addr_bytes[0], addr->addr_bytes[1],
 871                             addr->addr_bytes[2], addr->addr_bytes[3],
 872                             addr->addr_bytes[4], addr->addr_bytes[5]);
 873                 return -1;
 874         }
 875
 876         list = (struct i40e_virtchnl_ether_addr_list *)cmd_buffer;
 877         list->vsi_id = vf->vsi_res->vsi_id;
 878         list->num_elements = 1;
 879         (void)rte_memcpy(list->list[0].addr, addr->addr_bytes,
 880                                         sizeof(addr->addr_bytes));
 881
 882         args.ops = I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS;
 883         args.in_args = cmd_buffer;
 884         args.in_args_size = sizeof(cmd_buffer);
 885         args.out_buffer = cmd_result_buffer;
 886         args.out_size = I40E_AQ_BUF_SZ;
 887         err = i40evf_execute_vf_cmd(dev, &args);
 888         if (err)
 889                 PMD_DRV_LOG(ERR, "fail to execute command "
 890                             "OP_ADD_ETHER_ADDRESS");
 891
 892         return err;
 893 }
 894
 895 static int
 896 i40evf_del_mac_addr(struct rte_eth_dev *dev, struct ether_addr *addr)
 897 {
 898         struct i40e_virtchnl_ether_addr_list *list;
 899         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 900         uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_ether_addr_list) + \
 901                         sizeof(struct i40e_virtchnl_ether_addr)];
 902         int err;
 903         struct vf_cmd_info args;
 904
 905         if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
 906                 PMD_DRV_LOG(ERR, "Invalid mac:%x-%x-%x-%x-%x-%x",
 907                             addr->addr_bytes[0], addr->addr_bytes[1],
 908                             addr->addr_bytes[2], addr->addr_bytes[3],
 909                             addr->addr_bytes[4], addr->addr_bytes[5]);
 910                 return -1;
 911         }
 912
 913         list = (struct i40e_virtchnl_ether_addr_list *)cmd_buffer;
 914         list->vsi_id = vf->vsi_res->vsi_id;
 915         list->num_elements = 1;
 916         (void)rte_memcpy(list->list[0].addr, addr->addr_bytes,
 917                         sizeof(addr->addr_bytes));
 918
 919         args.ops = I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS;
 920         args.in_args = cmd_buffer;
 921         args.in_args_size = sizeof(cmd_buffer);
 922         args.out_buffer = cmd_result_buffer;
 923         args.out_size = I40E_AQ_BUF_SZ;
 924         err = i40evf_execute_vf_cmd(dev, &args);
 925         if (err)
 926                 PMD_DRV_LOG(ERR, "fail to execute command "
 927                             "OP_DEL_ETHER_ADDRESS");
 928
 929         return err;
 930 }
 931
 932 static int
 933 i40evf_update_stats(struct rte_eth_dev *dev, struct i40e_eth_stats **pstats)
 934 {
 935         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 936         struct i40e_virtchnl_queue_select q_stats;
 937         int err;
 938         struct vf_cmd_info args;
 939
 940         memset(&q_stats, 0, sizeof(q_stats));
 941         q_stats.vsi_id = vf->vsi_res->vsi_id;
 942         args.ops = I40E_VIRTCHNL_OP_GET_STATS;
 943         args.in_args = (u8 *)&q_stats;
 944         args.in_args_size = sizeof(q_stats);
 945         args.out_buffer = cmd_result_buffer;
 946         args.out_size = I40E_AQ_BUF_SZ;
 947
 948         err = i40evf_execute_vf_cmd(dev, &args);
 949         if (err) {
 950                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_STATS");
 951                 *pstats = NULL;
 952                 return err;
 953         }
 954         *pstats = (struct i40e_eth_stats *)args.out_buffer;
 955         return 0;
 956 }
 957
 958 static int
 959 i40evf_get_statics(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
 960 {
 961         int ret;
 962         struct i40e_eth_stats *pstats = NULL;
 963
 964         ret = i40evf_update_stats(dev, &pstats);
 965         if (ret != 0)
 966                 return 0;
 967
 968         stats->ipackets = pstats->rx_unicast + pstats->rx_multicast +
 969                                                 pstats->rx_broadcast;
 970         stats->opackets = pstats->tx_broadcast + pstats->tx_multicast +
 971                                                 pstats->tx_unicast;
 972         stats->ierrors = pstats->rx_discards;
 973         stats->oerrors = pstats->tx_errors + pstats->tx_discards;
 974         stats->ibytes = pstats->rx_bytes;
 975         stats->obytes = pstats->tx_bytes;
 976
 977         return 0;
 978 }
 979
 980 static void
 981 i40evf_dev_xstats_reset(struct rte_eth_dev *dev)
 982 {
 983         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 984         struct i40e_eth_stats *pstats = NULL;
 985
 986         /* read stat values to clear hardware registers */
 987         i40evf_update_stats(dev, &pstats);
 988
 989         /* set stats offset base on current values */
 990         vf->vsi.eth_stats_offset = vf->vsi.eth_stats;
 991 }
 992
 993 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
 994                                  struct rte_eth_xstats *xstats, unsigned n)
 995 {
 996         int ret;
 997         unsigned i;
 998         struct i40e_eth_stats *pstats = NULL;
 999
1000         if (n < I40EVF_NB_XSTATS)
1001                 return I40EVF_NB_XSTATS;
1002
1003         ret = i40evf_update_stats(dev, &pstats);
1004         if (ret != 0)
1005                 return 0;
1006
1007         if (!xstats)
1008                 return 0;
1009
1010         /* loop over xstats array and values from pstats */
1011         for (i = 0; i < I40EVF_NB_XSTATS; i++) {
1012                 snprintf(xstats[i].name, sizeof(xstats[i].name),
1013                          "%s", rte_i40evf_stats_strings[i].name);
1014                 xstats[i].value = *(uint64_t *)(((char *)pstats) +
1015                         rte_i40evf_stats_strings[i].offset);
1016         }
1017
1018         return I40EVF_NB_XSTATS;
1019 }
1020
1021 static int
1022 i40evf_add_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1023 {
1024         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1025         struct i40e_virtchnl_vlan_filter_list *vlan_list;
1026         uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_vlan_filter_list) +
1027                                                         sizeof(uint16_t)];
1028         int err;
1029         struct vf_cmd_info args;
1030
1031         vlan_list = (struct i40e_virtchnl_vlan_filter_list *)cmd_buffer;
1032         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1033         vlan_list->num_elements = 1;
1034         vlan_list->vlan_id[0] = vlanid;
1035
1036         args.ops = I40E_VIRTCHNL_OP_ADD_VLAN;
1037         args.in_args = (u8 *)&cmd_buffer;
1038         args.in_args_size = sizeof(cmd_buffer);
1039         args.out_buffer = cmd_result_buffer;
1040         args.out_size = I40E_AQ_BUF_SZ;
1041         err = i40evf_execute_vf_cmd(dev, &args);
1042         if (err)
1043                 PMD_DRV_LOG(ERR, "fail to execute command OP_ADD_VLAN");
1044
1045         return err;
1046 }
1047
1048 static int
1049 i40evf_del_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1050 {
1051         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1052         struct i40e_virtchnl_vlan_filter_list *vlan_list;
1053         uint8_t cmd_buffer[sizeof(struct i40e_virtchnl_vlan_filter_list) +
1054                                                         sizeof(uint16_t)];
1055         int err;
1056         struct vf_cmd_info args;
1057
1058         vlan_list = (struct i40e_virtchnl_vlan_filter_list *)cmd_buffer;
1059         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1060         vlan_list->num_elements = 1;
1061         vlan_list->vlan_id[0] = vlanid;
1062
1063         args.ops = I40E_VIRTCHNL_OP_DEL_VLAN;
1064         args.in_args = (u8 *)&cmd_buffer;
1065         args.in_args_size = sizeof(cmd_buffer);
1066         args.out_buffer = cmd_result_buffer;
1067         args.out_size = I40E_AQ_BUF_SZ;
1068         err = i40evf_execute_vf_cmd(dev, &args);
1069         if (err)
1070                 PMD_DRV_LOG(ERR, "fail to execute command OP_DEL_VLAN");
1071
1072         return err;
1073 }
1074
1075 static int
1076 i40evf_get_link_status(struct rte_eth_dev *dev, struct rte_eth_link *link)
1077 {
1078         int err;
1079         struct vf_cmd_info args;
1080         struct rte_eth_link *new_link;
1081
1082         args.ops = (enum i40e_virtchnl_ops)I40E_VIRTCHNL_OP_GET_LINK_STAT;
1083         args.in_args = NULL;
1084         args.in_args_size = 0;
1085         args.out_buffer = cmd_result_buffer;
1086         args.out_size = I40E_AQ_BUF_SZ;
1087         err = i40evf_execute_vf_cmd(dev, &args);
1088         if (err) {
1089                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_LINK_STAT");
1090                 return err;
1091         }
1092
1093         new_link = (struct rte_eth_link *)args.out_buffer;
1094         (void)rte_memcpy(link, new_link, sizeof(*link));
1095
1096         return 0;
1097 }
1098
1099 static const struct rte_pci_id pci_id_i40evf_map[] = {
1100 #define RTE_PCI_DEV_ID_DECL_I40EVF(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
1101 #include "rte_pci_dev_ids.h"
1102 { .vendor_id = 0, /* sentinel */ },
1103 };
1104
1105 static inline int
1106 i40evf_dev_atomic_write_link_status(struct rte_eth_dev *dev,
1107                                     struct rte_eth_link *link)
1108 {
1109         struct rte_eth_link *dst = &(dev->data->dev_link);
1110         struct rte_eth_link *src = link;
1111
1112         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1113                                         *(uint64_t *)src) == 0)
1114                 return -1;
1115
1116         return 0;
1117 }
1118
1119 static int
1120 i40evf_reset_vf(struct i40e_hw *hw)
1121 {
1122         int i, reset;
1123
1124         if (i40e_vf_reset(hw) != I40E_SUCCESS) {
1125                 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1126                 return -1;
1127         }
1128         /**
1129           * After issuing vf reset command to pf, pf won't necessarily
1130           * reset vf, it depends on what state it exactly is. If it's not
1131           * initialized yet, it won't have vf reset since it's in a certain
1132           * state. If not, it will try to reset. Even vf is reset, pf will
1133           * set I40E_VFGEN_RSTAT to COMPLETE first, then wait 10ms and set
1134           * it to ACTIVE. In this duration, vf may not catch the moment that
1135           * COMPLETE is set. So, for vf, we'll try to wait a long time.
1136           */
1137         rte_delay_ms(200);
1138
1139         for (i = 0; i < MAX_RESET_WAIT_CNT; i++) {
1140                 reset = rd32(hw, I40E_VFGEN_RSTAT) &
1141                         I40E_VFGEN_RSTAT_VFR_STATE_MASK;
1142                 reset = reset >> I40E_VFGEN_RSTAT_VFR_STATE_SHIFT;
1143                 if (I40E_VFR_COMPLETED == reset || I40E_VFR_VFACTIVE == reset)
1144                         break;
1145                 else
1146                         rte_delay_ms(50);
1147         }
1148
1149         if (i >= MAX_RESET_WAIT_CNT) {
1150                 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1151                 return -1;
1152         }
1153
1154         return 0;
1155 }
1156
1157 static int
1158 i40evf_init_vf(struct rte_eth_dev *dev)
1159 {
1160         int i, err, bufsz;
1161         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1162         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1163         struct ether_addr *p_mac_addr;
1164
1165         vf->adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1166         vf->dev_data = dev->data;
1167         err = i40e_set_mac_type(hw);
1168         if (err) {
1169                 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err);
1170                 goto err;
1171         }
1172
1173         i40e_init_adminq_parameter(hw);
1174         err = i40e_init_adminq(hw);
1175         if (err) {
1176                 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err);
1177                 goto err;
1178         }
1179
1180
1181         /* Reset VF and wait until it's complete */
1182         if (i40evf_reset_vf(hw)) {
1183                 PMD_INIT_LOG(ERR, "reset NIC failed");
1184                 goto err_aq;
1185         }
1186
1187         /* VF reset, shutdown admin queue and initialize again */
1188         if (i40e_shutdown_adminq(hw) != I40E_SUCCESS) {
1189                 PMD_INIT_LOG(ERR, "i40e_shutdown_adminq failed");
1190                 return -1;
1191         }
1192
1193         i40e_init_adminq_parameter(hw);
1194         if (i40e_init_adminq(hw) != I40E_SUCCESS) {
1195                 PMD_INIT_LOG(ERR, "init_adminq failed");
1196                 return -1;
1197         }
1198         if (i40evf_check_api_version(dev) != 0) {
1199                 PMD_INIT_LOG(ERR, "check_api version failed");
1200                 goto err_aq;
1201         }
1202         bufsz = sizeof(struct i40e_virtchnl_vf_resource) +
1203                 (I40E_MAX_VF_VSI * sizeof(struct i40e_virtchnl_vsi_resource));
1204         vf->vf_res = rte_zmalloc("vf_res", bufsz, 0);
1205         if (!vf->vf_res) {
1206                 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory");
1207                         goto err_aq;
1208         }
1209
1210         if (i40evf_get_vf_resource(dev) != 0) {
1211                 PMD_INIT_LOG(ERR, "i40evf_get_vf_config failed");
1212                 goto err_alloc;
1213         }
1214
1215         /* got VF config message back from PF, now we can parse it */
1216         for (i = 0; i < vf->vf_res->num_vsis; i++) {
1217                 if (vf->vf_res->vsi_res[i].vsi_type == I40E_VSI_SRIOV)
1218                         vf->vsi_res = &vf->vf_res->vsi_res[i];
1219         }
1220
1221         if (!vf->vsi_res) {
1222                 PMD_INIT_LOG(ERR, "no LAN VSI found");
1223                 goto err_alloc;
1224         }
1225
1226         if (hw->mac.type == I40E_MAC_X722_VF)
1227                 vf->flags = I40E_FLAG_RSS_AQ_CAPABLE;
1228         vf->vsi.vsi_id = vf->vsi_res->vsi_id;
1229         vf->vsi.type = vf->vsi_res->vsi_type;
1230         vf->vsi.nb_qps = vf->vsi_res->num_queue_pairs;
1231         vf->vsi.adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1232
1233         /* Store the MAC address configured by host, or generate random one */
1234         p_mac_addr = (struct ether_addr *)(vf->vsi_res->default_mac_addr);
1235         if (is_valid_assigned_ether_addr(p_mac_addr)) /* Configured by host */
1236                 ether_addr_copy(p_mac_addr, (struct ether_addr *)hw->mac.addr);
1237         else
1238                 eth_random_addr(hw->mac.addr); /* Generate a random one */
1239
1240         return 0;
1241
1242 err_alloc:
1243         rte_free(vf->vf_res);
1244 err_aq:
1245         i40e_shutdown_adminq(hw); /* ignore error */
1246 err:
1247         return -1;
1248 }
1249
1250 static int
1251 i40evf_uninit_vf(struct rte_eth_dev *dev)
1252 {
1253         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1254         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1255
1256         PMD_INIT_FUNC_TRACE();
1257
1258         if (hw->adapter_stopped == 0)
1259                 i40evf_dev_close(dev);
1260         rte_free(vf->vf_res);
1261         vf->vf_res = NULL;
1262
1263         return 0;
1264 }
1265
1266 static int
1267 i40evf_dev_init(struct rte_eth_dev *eth_dev)
1268 {
1269         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(\
1270                         eth_dev->data->dev_private);
1271
1272         PMD_INIT_FUNC_TRACE();
1273
1274         /* assign ops func pointer */
1275         eth_dev->dev_ops = &i40evf_eth_dev_ops;
1276         eth_dev->rx_pkt_burst = &i40e_recv_pkts;
1277         eth_dev->tx_pkt_burst = &i40e_xmit_pkts;
1278
1279         /*
1280          * For secondary processes, we don't initialise any further as primary
1281          * has already done this work.
1282          */
1283         if (rte_eal_process_type() != RTE_PROC_PRIMARY){
1284                 i40e_set_rx_function(eth_dev);
1285                 i40e_set_tx_function(eth_dev);
1286                 return 0;
1287         }
1288
1289         rte_eth_copy_pci_info(eth_dev, eth_dev->pci_dev);
1290
1291         hw->vendor_id = eth_dev->pci_dev->id.vendor_id;
1292         hw->device_id = eth_dev->pci_dev->id.device_id;
1293         hw->subsystem_vendor_id = eth_dev->pci_dev->id.subsystem_vendor_id;
1294         hw->subsystem_device_id = eth_dev->pci_dev->id.subsystem_device_id;
1295         hw->bus.device = eth_dev->pci_dev->addr.devid;
1296         hw->bus.func = eth_dev->pci_dev->addr.function;
1297         hw->hw_addr = (void *)eth_dev->pci_dev->mem_resource[0].addr;
1298         hw->adapter_stopped = 0;
1299
1300         if(i40evf_init_vf(eth_dev) != 0) {
1301                 PMD_INIT_LOG(ERR, "Init vf failed");
1302                 return -1;
1303         }
1304
1305         /* copy mac addr */
1306         eth_dev->data->mac_addrs = rte_zmalloc("i40evf_mac",
1307                                         ETHER_ADDR_LEN, 0);
1308         if (eth_dev->data->mac_addrs == NULL) {
1309                 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to "
1310                                 "store MAC addresses", ETHER_ADDR_LEN);
1311                 return -ENOMEM;
1312         }
1313         ether_addr_copy((struct ether_addr *)hw->mac.addr,
1314                 (struct ether_addr *)eth_dev->data->mac_addrs);
1315
1316         return 0;
1317 }
1318
1319 static int
1320 i40evf_dev_uninit(struct rte_eth_dev *eth_dev)
1321 {
1322         PMD_INIT_FUNC_TRACE();
1323
1324         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1325                 return -EPERM;
1326
1327         eth_dev->dev_ops = NULL;
1328         eth_dev->rx_pkt_burst = NULL;
1329         eth_dev->tx_pkt_burst = NULL;
1330
1331         if (i40evf_uninit_vf(eth_dev) != 0) {
1332                 PMD_INIT_LOG(ERR, "i40evf_uninit_vf failed");
1333                 return -1;
1334         }
1335
1336         rte_free(eth_dev->data->mac_addrs);
1337         eth_dev->data->mac_addrs = NULL;
1338
1339         return 0;
1340 }
1341 /*
1342  * virtual function driver struct
1343  */
1344 static struct eth_driver rte_i40evf_pmd = {
1345         .pci_drv = {
1346                 .name = "rte_i40evf_pmd",
1347                 .id_table = pci_id_i40evf_map,
1348                 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_DETACHABLE,
1349         },
1350         .eth_dev_init = i40evf_dev_init,
1351         .eth_dev_uninit = i40evf_dev_uninit,
1352         .dev_private_size = sizeof(struct i40e_adapter),
1353 };
1354
1355 /*
1356  * VF Driver initialization routine.
1357  * Invoked one at EAL init time.
1358  * Register itself as the [Virtual Poll Mode] Driver of PCI Fortville devices.
1359  */
1360 static int
1361 rte_i40evf_pmd_init(const char *name __rte_unused,
1362                     const char *params __rte_unused)
1363 {
1364         PMD_INIT_FUNC_TRACE();
1365
1366         rte_eth_driver_register(&rte_i40evf_pmd);
1367
1368         return 0;
1369 }
1370
1371 static struct rte_driver rte_i40evf_driver = {
1372         .type = PMD_PDEV,
1373         .init = rte_i40evf_pmd_init,
1374 };
1375
1376 PMD_REGISTER_DRIVER(rte_i40evf_driver);
1377
1378 static int
1379 i40evf_dev_configure(struct rte_eth_dev *dev)
1380 {
1381         struct i40e_adapter *ad =
1382                 I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1383
1384         /* Initialize to TRUE. If any of Rx queues doesn't meet the bulk
1385          * allocation or vector Rx preconditions we will reset it.
1386          */
1387         ad->rx_bulk_alloc_allowed = true;
1388         ad->rx_vec_allowed = true;
1389         ad->tx_simple_allowed = true;
1390         ad->tx_vec_allowed = true;
1391
1392         return i40evf_init_vlan(dev);
1393 }
1394
1395 static int
1396 i40evf_init_vlan(struct rte_eth_dev *dev)
1397 {
1398         struct rte_eth_dev_data *data = dev->data;
1399         int ret;
1400
1401         /* Apply vlan offload setting */
1402         i40evf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
1403
1404         /* Apply pvid setting */
1405         ret = i40evf_vlan_pvid_set(dev, data->dev_conf.txmode.pvid,
1406                                 data->dev_conf.txmode.hw_vlan_insert_pvid);
1407         return ret;
1408 }
1409
1410 static void
1411 i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1412 {
1413         bool enable_vlan_strip = 0;
1414         struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1415         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1416
1417         /* Linux pf host doesn't support vlan offload yet */
1418         if (vf->version_major == I40E_DPDK_VERSION_MAJOR) {
1419                 /* Vlan stripping setting */
1420                 if (mask & ETH_VLAN_STRIP_MASK) {
1421                         /* Enable or disable VLAN stripping */
1422                         if (dev_conf->rxmode.hw_vlan_strip)
1423                                 enable_vlan_strip = 1;
1424                         else
1425                                 enable_vlan_strip = 0;
1426
1427                         i40evf_config_vlan_offload(dev, enable_vlan_strip);
1428                 }
1429         }
1430 }
1431
1432 static int
1433 i40evf_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t pvid, int on)
1434 {
1435         struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1436         struct i40e_vsi_vlan_pvid_info info;
1437         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1438
1439         memset(&info, 0, sizeof(info));
1440         info.on = on;
1441
1442         /* Linux pf host don't support vlan offload yet */
1443         if (vf->version_major == I40E_DPDK_VERSION_MAJOR) {
1444                 if (info.on)
1445                         info.config.pvid = pvid;
1446                 else {
1447                         info.config.reject.tagged =
1448                                 dev_conf->txmode.hw_vlan_reject_tagged;
1449                         info.config.reject.untagged =
1450                                 dev_conf->txmode.hw_vlan_reject_untagged;
1451                 }
1452                 return i40evf_config_vlan_pvid(dev, &info);
1453         }
1454
1455         return 0;
1456 }
1457
1458 static int
1459 i40evf_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1460 {
1461         struct i40e_rx_queue *rxq;
1462         int err = 0;
1463         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1464
1465         PMD_INIT_FUNC_TRACE();
1466
1467         if (rx_queue_id < dev->data->nb_rx_queues) {
1468                 rxq = dev->data->rx_queues[rx_queue_id];
1469
1470                 err = i40e_alloc_rx_queue_mbufs(rxq);
1471                 if (err) {
1472                         PMD_DRV_LOG(ERR, "Failed to allocate RX queue mbuf");
1473                         return err;
1474                 }
1475
1476                 rte_wmb();
1477
1478                 /* Init the RX tail register. */
1479                 I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1480                 I40EVF_WRITE_FLUSH(hw);
1481
1482                 /* Ready to switch the queue on */
1483                 err = i40evf_switch_queue(dev, TRUE, rx_queue_id, TRUE);
1484
1485                 if (err)
1486                         PMD_DRV_LOG(ERR, "Failed to switch RX queue %u on",
1487                                     rx_queue_id);
1488                 else
1489                         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1490         }
1491
1492         return err;
1493 }
1494
1495 static int
1496 i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1497 {
1498         struct i40e_rx_queue *rxq;
1499         int err;
1500
1501         if (rx_queue_id < dev->data->nb_rx_queues) {
1502                 rxq = dev->data->rx_queues[rx_queue_id];
1503
1504                 err = i40evf_switch_queue(dev, TRUE, rx_queue_id, FALSE);
1505
1506                 if (err) {
1507                         PMD_DRV_LOG(ERR, "Failed to switch RX queue %u off",
1508                                     rx_queue_id);
1509                         return err;
1510                 }
1511
1512                 i40e_rx_queue_release_mbufs(rxq);
1513                 i40e_reset_rx_queue(rxq);
1514                 dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1515         }
1516
1517         return 0;
1518 }
1519
1520 static int
1521 i40evf_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1522 {
1523         int err = 0;
1524
1525         PMD_INIT_FUNC_TRACE();
1526
1527         if (tx_queue_id < dev->data->nb_tx_queues) {
1528
1529                 /* Ready to switch the queue on */
1530                 err = i40evf_switch_queue(dev, FALSE, tx_queue_id, TRUE);
1531
1532                 if (err)
1533                         PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on",
1534                                     tx_queue_id);
1535                 else
1536                         dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1537         }
1538
1539         return err;
1540 }
1541
1542 static int
1543 i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1544 {
1545         struct i40e_tx_queue *txq;
1546         int err;
1547
1548         if (tx_queue_id < dev->data->nb_tx_queues) {
1549                 txq = dev->data->tx_queues[tx_queue_id];
1550
1551                 err = i40evf_switch_queue(dev, FALSE, tx_queue_id, FALSE);
1552
1553                 if (err) {
1554                         PMD_DRV_LOG(ERR, "Failed to switch TX queue %u off",
1555                                     tx_queue_id);
1556                         return err;
1557                 }
1558
1559                 i40e_tx_queue_release_mbufs(txq);
1560                 i40e_reset_tx_queue(txq);
1561                 dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1562         }
1563
1564         return 0;
1565 }
1566
1567 static int
1568 i40evf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1569 {
1570         int ret;
1571
1572         if (on)
1573                 ret = i40evf_add_vlan(dev, vlan_id);
1574         else
1575                 ret = i40evf_del_vlan(dev,vlan_id);
1576
1577         return ret;
1578 }
1579
1580 static int
1581 i40evf_rxq_init(struct rte_eth_dev *dev, struct i40e_rx_queue *rxq)
1582 {
1583         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1584         struct rte_eth_dev_data *dev_data = dev->data;
1585         struct rte_pktmbuf_pool_private *mbp_priv;
1586         uint16_t buf_size, len;
1587
1588         rxq->qrx_tail = hw->hw_addr + I40E_QRX_TAIL1(rxq->queue_id);
1589         I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1590         I40EVF_WRITE_FLUSH(hw);
1591
1592         /* Calculate the maximum packet length allowed */
1593         mbp_priv = rte_mempool_get_priv(rxq->mp);
1594         buf_size = (uint16_t)(mbp_priv->mbuf_data_room_size -
1595                                         RTE_PKTMBUF_HEADROOM);
1596         rxq->hs_mode = i40e_header_split_none;
1597         rxq->rx_hdr_len = 0;
1598         rxq->rx_buf_len = RTE_ALIGN(buf_size, (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
1599         len = rxq->rx_buf_len * I40E_MAX_CHAINED_RX_BUFFERS;
1600         rxq->max_pkt_len = RTE_MIN(len,
1601                 dev_data->dev_conf.rxmode.max_rx_pkt_len);
1602
1603         /**
1604          * Check if the jumbo frame and maximum packet length are set correctly
1605          */
1606         if (dev_data->dev_conf.rxmode.jumbo_frame == 1) {
1607                 if (rxq->max_pkt_len <= ETHER_MAX_LEN ||
1608                     rxq->max_pkt_len > I40E_FRAME_SIZE_MAX) {
1609                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1610                                 "larger than %u and smaller than %u, as jumbo "
1611                                 "frame is enabled", (uint32_t)ETHER_MAX_LEN,
1612                                         (uint32_t)I40E_FRAME_SIZE_MAX);
1613                         return I40E_ERR_CONFIG;
1614                 }
1615         } else {
1616                 if (rxq->max_pkt_len < ETHER_MIN_LEN ||
1617                     rxq->max_pkt_len > ETHER_MAX_LEN) {
1618                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1619                                 "larger than %u and smaller than %u, as jumbo "
1620                                 "frame is disabled", (uint32_t)ETHER_MIN_LEN,
1621                                                 (uint32_t)ETHER_MAX_LEN);
1622                         return I40E_ERR_CONFIG;
1623                 }
1624         }
1625
1626         if (dev_data->dev_conf.rxmode.enable_scatter ||
1627             (rxq->max_pkt_len + 2 * I40E_VLAN_TAG_SIZE) > buf_size) {
1628                 dev_data->scattered_rx = 1;
1629         }
1630
1631         return 0;
1632 }
1633
1634 static int
1635 i40evf_rx_init(struct rte_eth_dev *dev)
1636 {
1637         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1638         uint16_t i;
1639         int ret = I40E_SUCCESS;
1640         struct i40e_rx_queue **rxq =
1641                 (struct i40e_rx_queue **)dev->data->rx_queues;
1642
1643         i40evf_config_rss(vf);
1644         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1645                 if (!rxq[i] || !rxq[i]->q_set)
1646                         continue;
1647                 ret = i40evf_rxq_init(dev, rxq[i]);
1648                 if (ret != I40E_SUCCESS)
1649                         break;
1650         }
1651         if (ret == I40E_SUCCESS)
1652                 i40e_set_rx_function(dev);
1653
1654         return ret;
1655 }
1656
1657 static void
1658 i40evf_tx_init(struct rte_eth_dev *dev)
1659 {
1660         uint16_t i;
1661         struct i40e_tx_queue **txq =
1662                 (struct i40e_tx_queue **)dev->data->tx_queues;
1663         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1664
1665         for (i = 0; i < dev->data->nb_tx_queues; i++)
1666                 txq[i]->qtx_tail = hw->hw_addr + I40E_QTX_TAIL1(i);
1667
1668         i40e_set_tx_function(dev);
1669 }
1670
1671 static inline void
1672 i40evf_enable_queues_intr(struct rte_eth_dev *dev)
1673 {
1674         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1675         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1676         struct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;
1677
1678         if (!rte_intr_allow_others(intr_handle)) {
1679                 I40E_WRITE_REG(hw,
1680                                I40E_VFINT_DYN_CTL01,
1681                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1682                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK);
1683                 I40EVF_WRITE_FLUSH(hw);
1684                 return;
1685         }
1686
1687         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
1688                 /* To support DPDK PF host */
1689                 I40E_WRITE_REG(hw,
1690                         I40E_VFINT_DYN_CTLN1(I40EVF_VSI_DEFAULT_MSIX_INTR - 1),
1691                         I40E_VFINT_DYN_CTLN1_INTENA_MASK |
1692                         I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
1693         else
1694                 /* To support Linux PF host */
1695                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1696                                 I40E_VFINT_DYN_CTL01_INTENA_MASK |
1697                                 I40E_VFINT_DYN_CTL01_CLEARPBA_MASK);
1698
1699         I40EVF_WRITE_FLUSH(hw);
1700 }
1701
1702 static inline void
1703 i40evf_disable_queues_intr(struct rte_eth_dev *dev)
1704 {
1705         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1706         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1707         struct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;
1708
1709         if (!rte_intr_allow_others(intr_handle)) {
1710                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01, 0);
1711                 I40EVF_WRITE_FLUSH(hw);
1712                 return;
1713         }
1714
1715         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
1716                 I40E_WRITE_REG(hw,
1717                                I40E_VFINT_DYN_CTLN1(I40EVF_VSI_DEFAULT_MSIX_INTR
1718                                                     - 1),
1719                                0);
1720         else
1721                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01, 0);
1722
1723         I40EVF_WRITE_FLUSH(hw);
1724 }
1725
1726 static int
1727 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
1728 {
1729         struct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;
1730         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1731         uint16_t interval =
1732                 i40e_calc_itr_interval(RTE_LIBRTE_I40E_ITR_INTERVAL);
1733         uint16_t msix_intr;
1734
1735         msix_intr = intr_handle->intr_vec[queue_id];
1736         if (msix_intr == I40E_MISC_VEC_ID)
1737                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1738                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1739                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1740                                (0 << I40E_VFINT_DYN_CTL01_ITR_INDX_SHIFT) |
1741                                (interval <<
1742                                 I40E_VFINT_DYN_CTL01_INTERVAL_SHIFT));
1743         else
1744                 I40E_WRITE_REG(hw,
1745                                I40E_VFINT_DYN_CTLN1(msix_intr -
1746                                                     I40E_RX_VEC_START),
1747                                I40E_VFINT_DYN_CTLN1_INTENA_MASK |
1748                                I40E_VFINT_DYN_CTLN1_CLEARPBA_MASK |
1749                                (0 << I40E_VFINT_DYN_CTLN1_ITR_INDX_SHIFT) |
1750                                (interval <<
1751                                 I40E_VFINT_DYN_CTLN1_INTERVAL_SHIFT));
1752
1753         I40EVF_WRITE_FLUSH(hw);
1754
1755         rte_intr_enable(&dev->pci_dev->intr_handle);
1756
1757         return 0;
1758 }
1759
1760 static int
1761 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
1762 {
1763         struct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;
1764         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1765         uint16_t msix_intr;
1766
1767         msix_intr = intr_handle->intr_vec[queue_id];
1768         if (msix_intr == I40E_MISC_VEC_ID)
1769                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01, 0);
1770         else
1771                 I40E_WRITE_REG(hw,
1772                                I40E_VFINT_DYN_CTLN1(msix_intr -
1773                                                     I40E_RX_VEC_START),
1774                                0);
1775
1776         I40EVF_WRITE_FLUSH(hw);
1777
1778         return 0;
1779 }
1780
1781 static int
1782 i40evf_dev_start(struct rte_eth_dev *dev)
1783 {
1784         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1785         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1786         struct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;
1787         struct ether_addr mac_addr;
1788         uint32_t intr_vector = 0;
1789
1790         PMD_INIT_FUNC_TRACE();
1791
1792         hw->adapter_stopped = 0;
1793
1794         vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
1795         vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
1796                                         dev->data->nb_tx_queues);
1797
1798         /* check and configure queue intr-vector mapping */
1799         if (dev->data->dev_conf.intr_conf.rxq != 0) {
1800                 intr_vector = dev->data->nb_rx_queues;
1801                 if (rte_intr_efd_enable(intr_handle, intr_vector))
1802                         return -1;
1803         }
1804
1805         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
1806                 intr_handle->intr_vec =
1807                         rte_zmalloc("intr_vec",
1808                                     dev->data->nb_rx_queues * sizeof(int), 0);
1809                 if (!intr_handle->intr_vec) {
1810                         PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
1811                                      " intr_vec\n", dev->data->nb_rx_queues);
1812                         return -ENOMEM;
1813                 }
1814         }
1815
1816         if (i40evf_rx_init(dev) != 0){
1817                 PMD_DRV_LOG(ERR, "failed to do RX init");
1818                 return -1;
1819         }
1820
1821         i40evf_tx_init(dev);
1822
1823         if (i40evf_configure_queues(dev) != 0) {
1824                 PMD_DRV_LOG(ERR, "configure queues failed");
1825                 goto err_queue;
1826         }
1827         if (i40evf_config_irq_map(dev)) {
1828                 PMD_DRV_LOG(ERR, "config_irq_map failed");
1829                 goto err_queue;
1830         }
1831
1832         /* Set mac addr */
1833         (void)rte_memcpy(mac_addr.addr_bytes, hw->mac.addr,
1834                                 sizeof(mac_addr.addr_bytes));
1835         if (i40evf_add_mac_addr(dev, &mac_addr)) {
1836                 PMD_DRV_LOG(ERR, "Failed to add mac addr");
1837                 goto err_queue;
1838         }
1839
1840         if (i40evf_start_queues(dev) != 0) {
1841                 PMD_DRV_LOG(ERR, "enable queues failed");
1842                 goto err_mac;
1843         }
1844
1845         /* vf don't allow intr except for rxq intr */
1846         if (dev->data->dev_conf.intr_conf.rxq != 0)
1847                 rte_intr_enable(intr_handle);
1848
1849         i40evf_enable_queues_intr(dev);
1850         return 0;
1851
1852 err_mac:
1853         i40evf_del_mac_addr(dev, &mac_addr);
1854 err_queue:
1855         return -1;
1856 }
1857
1858 static void
1859 i40evf_dev_stop(struct rte_eth_dev *dev)
1860 {
1861         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1862         struct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;
1863         struct ether_addr mac_addr;
1864
1865         PMD_INIT_FUNC_TRACE();
1866
1867         i40evf_stop_queues(dev);
1868         i40evf_disable_queues_intr(dev);
1869         i40e_dev_clear_queues(dev);
1870
1871         /* Clean datapath event and queue/vec mapping */
1872         rte_intr_efd_disable(intr_handle);
1873         if (intr_handle->intr_vec) {
1874                 rte_free(intr_handle->intr_vec);
1875                 intr_handle->intr_vec = NULL;
1876         }
1877         /* Set mac addr */
1878         (void)rte_memcpy(mac_addr.addr_bytes, hw->mac.addr,
1879                                 sizeof(mac_addr.addr_bytes));
1880         /* Delete mac addr of this vf */
1881         i40evf_del_mac_addr(dev, &mac_addr);
1882 }
1883
1884 static int
1885 i40evf_dev_link_update(struct rte_eth_dev *dev,
1886                        __rte_unused int wait_to_complete)
1887 {
1888         struct rte_eth_link new_link;
1889         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1890         /*
1891          * DPDK pf host provide interfacet to acquire link status
1892          * while Linux driver does not
1893          */
1894         if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
1895                 i40evf_get_link_status(dev, &new_link);
1896         else {
1897                 /* Always assume it's up, for Linux driver PF host */
1898                 new_link.link_duplex = ETH_LINK_AUTONEG_DUPLEX;
1899                 new_link.link_speed  = ETH_LINK_SPEED_10000;
1900                 new_link.link_status = 1;
1901         }
1902         i40evf_dev_atomic_write_link_status(dev, &new_link);
1903
1904         return 0;
1905 }
1906
1907 static void
1908 i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev)
1909 {
1910         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1911         int ret;
1912
1913         /* If enabled, just return */
1914         if (vf->promisc_unicast_enabled)
1915                 return;
1916
1917         ret = i40evf_config_promisc(dev, 1, vf->promisc_multicast_enabled);
1918         if (ret == 0)
1919                 vf->promisc_unicast_enabled = TRUE;
1920 }
1921
1922 static void
1923 i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev)
1924 {
1925         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1926         int ret;
1927
1928         /* If disabled, just return */
1929         if (!vf->promisc_unicast_enabled)
1930                 return;
1931
1932         ret = i40evf_config_promisc(dev, 0, vf->promisc_multicast_enabled);
1933         if (ret == 0)
1934                 vf->promisc_unicast_enabled = FALSE;
1935 }
1936
1937 static void
1938 i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev)
1939 {
1940         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1941         int ret;
1942
1943         /* If enabled, just return */
1944         if (vf->promisc_multicast_enabled)
1945                 return;
1946
1947         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 1);
1948         if (ret == 0)
1949                 vf->promisc_multicast_enabled = TRUE;
1950 }
1951
1952 static void
1953 i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev)
1954 {
1955         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1956         int ret;
1957
1958         /* If enabled, just return */
1959         if (!vf->promisc_multicast_enabled)
1960                 return;
1961
1962         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 0);
1963         if (ret == 0)
1964                 vf->promisc_multicast_enabled = FALSE;
1965 }
1966
1967 static void
1968 i40evf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
1969 {
1970         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1971
1972         memset(dev_info, 0, sizeof(*dev_info));
1973         dev_info->max_rx_queues = vf->vsi_res->num_queue_pairs;
1974         dev_info->max_tx_queues = vf->vsi_res->num_queue_pairs;
1975         dev_info->min_rx_bufsize = I40E_BUF_SIZE_MIN;
1976         dev_info->max_rx_pktlen = I40E_FRAME_SIZE_MAX;
1977         dev_info->hash_key_size = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
1978         dev_info->reta_size = ETH_RSS_RETA_SIZE_64;
1979         dev_info->flow_type_rss_offloads = I40E_RSS_OFFLOAD_ALL;
1980         dev_info->rx_offload_capa =
1981                 DEV_RX_OFFLOAD_VLAN_STRIP |
1982                 DEV_RX_OFFLOAD_QINQ_STRIP |
1983                 DEV_RX_OFFLOAD_IPV4_CKSUM |
1984                 DEV_RX_OFFLOAD_UDP_CKSUM |
1985                 DEV_RX_OFFLOAD_TCP_CKSUM;
1986         dev_info->tx_offload_capa =
1987                 DEV_TX_OFFLOAD_VLAN_INSERT |
1988                 DEV_TX_OFFLOAD_QINQ_INSERT |
1989                 DEV_TX_OFFLOAD_IPV4_CKSUM |
1990                 DEV_TX_OFFLOAD_UDP_CKSUM |
1991                 DEV_TX_OFFLOAD_TCP_CKSUM |
1992                 DEV_TX_OFFLOAD_SCTP_CKSUM;
1993
1994         dev_info->default_rxconf = (struct rte_eth_rxconf) {
1995                 .rx_thresh = {
1996                         .pthresh = I40E_DEFAULT_RX_PTHRESH,
1997                         .hthresh = I40E_DEFAULT_RX_HTHRESH,
1998                         .wthresh = I40E_DEFAULT_RX_WTHRESH,
1999                 },
2000                 .rx_free_thresh = I40E_DEFAULT_RX_FREE_THRESH,
2001                 .rx_drop_en = 0,
2002         };
2003
2004         dev_info->default_txconf = (struct rte_eth_txconf) {
2005                 .tx_thresh = {
2006                         .pthresh = I40E_DEFAULT_TX_PTHRESH,
2007                         .hthresh = I40E_DEFAULT_TX_HTHRESH,
2008                         .wthresh = I40E_DEFAULT_TX_WTHRESH,
2009                 },
2010                 .tx_free_thresh = I40E_DEFAULT_TX_FREE_THRESH,
2011                 .tx_rs_thresh = I40E_DEFAULT_TX_RSBIT_THRESH,
2012                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
2013                                 ETH_TXQ_FLAGS_NOOFFLOADS,
2014         };
2015
2016         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
2017                 .nb_max = I40E_MAX_RING_DESC,
2018                 .nb_min = I40E_MIN_RING_DESC,
2019                 .nb_align = I40E_ALIGN_RING_DESC,
2020         };
2021
2022         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
2023                 .nb_max = I40E_MAX_RING_DESC,
2024                 .nb_min = I40E_MIN_RING_DESC,
2025                 .nb_align = I40E_ALIGN_RING_DESC,
2026         };
2027 }
2028
2029 static void
2030 i40evf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
2031 {
2032         if (i40evf_get_statics(dev, stats))
2033                 PMD_DRV_LOG(ERR, "Get statics failed");
2034 }
2035
2036 static void
2037 i40evf_dev_close(struct rte_eth_dev *dev)
2038 {
2039         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2040
2041         i40evf_dev_stop(dev);
2042         hw->adapter_stopped = 1;
2043         i40e_dev_free_queues(dev);
2044         i40evf_reset_vf(hw);
2045         i40e_shutdown_adminq(hw);
2046 }
2047
2048 static int
2049 i40evf_get_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2050 {
2051         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2052         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2053         int ret;
2054
2055         if (!lut)
2056                 return -EINVAL;
2057
2058         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2059                 ret = i40e_aq_get_rss_lut(hw, vsi->vsi_id, FALSE,
2060                                           lut, lut_size);
2061                 if (ret) {
2062                         PMD_DRV_LOG(ERR, "Failed to get RSS lookup table");
2063                         return ret;
2064                 }
2065         } else {
2066                 uint32_t *lut_dw = (uint32_t *)lut;
2067                 uint16_t i, lut_size_dw = lut_size / 4;
2068
2069                 for (i = 0; i < lut_size_dw; i++)
2070                         lut_dw[i] = I40E_READ_REG(hw, I40E_VFQF_HLUT(i));
2071         }
2072
2073         return 0;
2074 }
2075
2076 static int
2077 i40evf_set_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2078 {
2079         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2080         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2081         int ret;
2082
2083         if (!vsi || !lut)
2084                 return -EINVAL;
2085
2086         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2087                 ret = i40e_aq_set_rss_lut(hw, vsi->vsi_id, FALSE,
2088                                           lut, lut_size);
2089                 if (ret) {
2090                         PMD_DRV_LOG(ERR, "Failed to set RSS lookup table");
2091                         return ret;
2092                 }
2093         } else {
2094                 uint32_t *lut_dw = (uint32_t *)lut;
2095                 uint16_t i, lut_size_dw = lut_size / 4;
2096
2097                 for (i = 0; i < lut_size_dw; i++)
2098                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i), lut_dw[i]);
2099                 I40EVF_WRITE_FLUSH(hw);
2100         }
2101
2102         return 0;
2103 }
2104
2105 static int
2106 i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
2107                            struct rte_eth_rss_reta_entry64 *reta_conf,
2108                            uint16_t reta_size)
2109 {
2110         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2111         uint8_t *lut;
2112         uint16_t i, idx, shift;
2113         int ret;
2114
2115         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2116                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2117                         "(%d) doesn't match the number of hardware can "
2118                         "support (%d)\n", reta_size, ETH_RSS_RETA_SIZE_64);
2119                 return -EINVAL;
2120         }
2121
2122         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2123         if (!lut) {
2124                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2125                 return -ENOMEM;
2126         }
2127         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2128         if (ret)
2129                 goto out;
2130         for (i = 0; i < reta_size; i++) {
2131                 idx = i / RTE_RETA_GROUP_SIZE;
2132                 shift = i % RTE_RETA_GROUP_SIZE;
2133                 if (reta_conf[idx].mask & (1ULL << shift))
2134                         lut[i] = reta_conf[idx].reta[shift];
2135         }
2136         ret = i40evf_set_rss_lut(&vf->vsi, lut, reta_size);
2137
2138 out:
2139         rte_free(lut);
2140
2141         return ret;
2142 }
2143
2144 static int
2145 i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
2146                           struct rte_eth_rss_reta_entry64 *reta_conf,
2147                           uint16_t reta_size)
2148 {
2149         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2150         uint16_t i, idx, shift;
2151         uint8_t *lut;
2152         int ret;
2153
2154         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2155                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2156                         "(%d) doesn't match the number of hardware can "
2157                         "support (%d)\n", reta_size, ETH_RSS_RETA_SIZE_64);
2158                 return -EINVAL;
2159         }
2160
2161         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2162         if (!lut) {
2163                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2164                 return -ENOMEM;
2165         }
2166
2167         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2168         if (ret)
2169                 goto out;
2170         for (i = 0; i < reta_size; i++) {
2171                 idx = i / RTE_RETA_GROUP_SIZE;
2172                 shift = i % RTE_RETA_GROUP_SIZE;
2173                 if (reta_conf[idx].mask & (1ULL << shift))
2174                         reta_conf[idx].reta[shift] = lut[i];
2175         }
2176
2177 out:
2178         rte_free(lut);
2179
2180         return ret;
2181 }
2182
2183 static int
2184 i40evf_set_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t key_len)
2185 {
2186         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2187         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2188         int ret = 0;
2189
2190         if (!key || key_len == 0) {
2191                 PMD_DRV_LOG(DEBUG, "No key to be configured");
2192                 return 0;
2193         } else if (key_len != (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2194                 sizeof(uint32_t)) {
2195                 PMD_DRV_LOG(ERR, "Invalid key length %u", key_len);
2196                 return -EINVAL;
2197         }
2198
2199         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2200                 struct i40e_aqc_get_set_rss_key_data *key_dw =
2201                         (struct i40e_aqc_get_set_rss_key_data *)key;
2202
2203                 ret = i40e_aq_set_rss_key(hw, vsi->vsi_id, key_dw);
2204                 if (ret)
2205                         PMD_INIT_LOG(ERR, "Failed to configure RSS key "
2206                                      "via AQ");
2207         } else {
2208                 uint32_t *hash_key = (uint32_t *)key;
2209                 uint16_t i;
2210
2211                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2212                         i40e_write_rx_ctl(hw, I40E_VFQF_HKEY(i), hash_key[i]);
2213                 I40EVF_WRITE_FLUSH(hw);
2214         }
2215
2216         return ret;
2217 }
2218
2219 static int
2220 i40evf_get_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t *key_len)
2221 {
2222         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2223         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2224         int ret;
2225
2226         if (!key || !key_len)
2227                 return -EINVAL;
2228
2229         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2230                 ret = i40e_aq_get_rss_key(hw, vsi->vsi_id,
2231                         (struct i40e_aqc_get_set_rss_key_data *)key);
2232                 if (ret) {
2233                         PMD_INIT_LOG(ERR, "Failed to get RSS key via AQ");
2234                         return ret;
2235                 }
2236         } else {
2237                 uint32_t *key_dw = (uint32_t *)key;
2238                 uint16_t i;
2239
2240                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2241                         key_dw[i] = i40e_read_rx_ctl(hw, I40E_VFQF_HKEY(i));
2242         }
2243         *key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2244
2245         return 0;
2246 }
2247
2248 static int
2249 i40evf_hw_rss_hash_set(struct i40e_vf *vf, struct rte_eth_rss_conf *rss_conf)
2250 {
2251         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2252         uint64_t rss_hf, hena;
2253         int ret;
2254
2255         ret = i40evf_set_rss_key(&vf->vsi, rss_conf->rss_key,
2256                                  rss_conf->rss_key_len);
2257         if (ret)
2258                 return ret;
2259
2260         rss_hf = rss_conf->rss_hf;
2261         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2262         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2263         hena &= ~I40E_RSS_HENA_ALL;
2264         hena |= i40e_config_hena(rss_hf);
2265         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
2266         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
2267         I40EVF_WRITE_FLUSH(hw);
2268
2269         return 0;
2270 }
2271
2272 static void
2273 i40evf_disable_rss(struct i40e_vf *vf)
2274 {
2275         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2276         uint64_t hena;
2277
2278         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2279         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2280         hena &= ~I40E_RSS_HENA_ALL;
2281         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
2282         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
2283         I40EVF_WRITE_FLUSH(hw);
2284 }
2285
2286 static int
2287 i40evf_config_rss(struct i40e_vf *vf)
2288 {
2289         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2290         struct rte_eth_rss_conf rss_conf;
2291         uint32_t i, j, lut = 0, nb_q = (I40E_VFQF_HLUT_MAX_INDEX + 1) * 4;
2292         uint16_t num;
2293
2294         if (vf->dev_data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
2295                 i40evf_disable_rss(vf);
2296                 PMD_DRV_LOG(DEBUG, "RSS not configured\n");
2297                 return 0;
2298         }
2299
2300         num = RTE_MIN(vf->dev_data->nb_rx_queues, I40E_MAX_QP_NUM_PER_VF);
2301         /* Fill out the look up table */
2302         for (i = 0, j = 0; i < nb_q; i++, j++) {
2303                 if (j >= num)
2304                         j = 0;
2305                 lut = (lut << 8) | j;
2306                 if ((i & 3) == 3)
2307                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
2308         }
2309
2310         rss_conf = vf->dev_data->dev_conf.rx_adv_conf.rss_conf;
2311         if ((rss_conf.rss_hf & I40E_RSS_OFFLOAD_ALL) == 0) {
2312                 i40evf_disable_rss(vf);
2313                 PMD_DRV_LOG(DEBUG, "No hash flag is set\n");
2314                 return 0;
2315         }
2316
2317         if (rss_conf.rss_key == NULL || rss_conf.rss_key_len <
2318                 (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t)) {
2319                 /* Calculate the default hash key */
2320                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2321                         rss_key_default[i] = (uint32_t)rte_rand();
2322                 rss_conf.rss_key = (uint8_t *)rss_key_default;
2323                 rss_conf.rss_key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2324                         sizeof(uint32_t);
2325         }
2326
2327         return i40evf_hw_rss_hash_set(vf, &rss_conf);
2328 }
2329
2330 static int
2331 i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
2332                            struct rte_eth_rss_conf *rss_conf)
2333 {
2334         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2335         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2336         uint64_t rss_hf = rss_conf->rss_hf & I40E_RSS_OFFLOAD_ALL;
2337         uint64_t hena;
2338
2339         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2340         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2341         if (!(hena & I40E_RSS_HENA_ALL)) { /* RSS disabled */
2342                 if (rss_hf != 0) /* Enable RSS */
2343                         return -EINVAL;
2344                 return 0;
2345         }
2346
2347         /* RSS enabled */
2348         if (rss_hf == 0) /* Disable RSS */
2349                 return -EINVAL;
2350
2351         return i40evf_hw_rss_hash_set(vf, rss_conf);
2352 }
2353
2354 static int
2355 i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
2356                              struct rte_eth_rss_conf *rss_conf)
2357 {
2358         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2359         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2360         uint64_t hena;
2361
2362         i40evf_get_rss_key(&vf->vsi, rss_conf->rss_key,
2363                            &rss_conf->rss_key_len);
2364
2365         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2366         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2367         rss_conf->rss_hf = i40e_parse_hena(hena);
2368
2369         return 0;
2370 }