drivers/net/i40e/i40e_ethdev_vf.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2010-2016 Intel Corporation
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdio.h>
   7 #include <errno.h>
   8 #include <stdint.h>
   9 #include <string.h>
  10 #include <unistd.h>
  11 #include <stdarg.h>
  12 #include <inttypes.h>
  13 #include <rte_byteorder.h>
  14 #include <rte_common.h>
  15 #include <rte_cycles.h>
  16
  17 #include <rte_interrupts.h>
  18 #include <rte_log.h>
  19 #include <rte_debug.h>
  20 #include <rte_pci.h>
  21 #include <rte_bus_pci.h>
  22 #include <rte_atomic.h>
  23 #include <rte_branch_prediction.h>
  24 #include <rte_memory.h>
  25 #include <rte_eal.h>
  26 #include <rte_alarm.h>
  27 #include <rte_ether.h>
  28 #include <rte_ethdev_driver.h>
  29 #include <rte_ethdev_pci.h>
  30 #include <rte_malloc.h>
  31 #include <rte_dev.h>
  32
  33 #include "i40e_logs.h"
  34 #include "base/i40e_prototype.h"
  35 #include "base/i40e_adminq_cmd.h"
  36 #include "base/i40e_type.h"
  37
  38 #include "i40e_rxtx.h"
  39 #include "i40e_ethdev.h"
  40 #include "i40e_pf.h"
  41
  42 /* busy wait delay in msec */
  43 #define I40EVF_BUSY_WAIT_DELAY 10
  44 #define I40EVF_BUSY_WAIT_COUNT 50
  45 #define MAX_RESET_WAIT_CNT     20
  46
  47 #define I40EVF_ALARM_INTERVAL 50000 /* us */
  48
  49 struct i40evf_arq_msg_info {
  50         enum virtchnl_ops ops;
  51         enum i40e_status_code result;
  52         uint16_t buf_len;
  53         uint16_t msg_len;
  54         uint8_t *msg;
  55 };
  56
  57 struct vf_cmd_info {
  58         enum virtchnl_ops ops;
  59         uint8_t *in_args;
  60         uint32_t in_args_size;
  61         uint8_t *out_buffer;
  62         /* Input & output type. pass in buffer size and pass out
  63          * actual return result
  64          */
  65         uint32_t out_size;
  66 };
  67
  68 enum i40evf_aq_result {
  69         I40EVF_MSG_ERR = -1, /* Meet error when accessing admin queue */
  70         I40EVF_MSG_NON,      /* Read nothing from admin queue */
  71         I40EVF_MSG_SYS,      /* Read system msg from admin queue */
  72         I40EVF_MSG_CMD,      /* Read async command result */
  73 };
  74
  75 static int i40evf_dev_configure(struct rte_eth_dev *dev);
  76 static int i40evf_dev_start(struct rte_eth_dev *dev);
  77 static int i40evf_dev_stop(struct rte_eth_dev *dev);
  78 static int i40evf_dev_info_get(struct rte_eth_dev *dev,
  79                                struct rte_eth_dev_info *dev_info);
  80 static int i40evf_dev_link_update(struct rte_eth_dev *dev,
  81                                   int wait_to_complete);
  82 static int i40evf_dev_stats_get(struct rte_eth_dev *dev,
  83                                 struct rte_eth_stats *stats);
  84 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
  85                                  struct rte_eth_xstat *xstats, unsigned n);
  86 static int i40evf_dev_xstats_get_names(struct rte_eth_dev *dev,
  87                                        struct rte_eth_xstat_name *xstats_names,
  88                                        unsigned limit);
  89 static int i40evf_dev_xstats_reset(struct rte_eth_dev *dev);
  90 static int i40evf_vlan_filter_set(struct rte_eth_dev *dev,
  91                                   uint16_t vlan_id, int on);
  92 static int i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask);
  93 static int i40evf_dev_close(struct rte_eth_dev *dev);
  94 static int i40evf_dev_reset(struct rte_eth_dev *dev);
  95 static int i40evf_check_vf_reset_done(struct rte_eth_dev *dev);
  96 static int i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev);
  97 static int i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev);
  98 static int i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev);
  99 static int i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev);
 100 static int i40evf_init_vlan(struct rte_eth_dev *dev);
 101 static int i40evf_dev_rx_queue_start(struct rte_eth_dev *dev,
 102                                      uint16_t rx_queue_id);
 103 static int i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev,
 104                                     uint16_t rx_queue_id);
 105 static int i40evf_dev_tx_queue_start(struct rte_eth_dev *dev,
 106                                      uint16_t tx_queue_id);
 107 static int i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev,
 108                                     uint16_t tx_queue_id);
 109 static int i40evf_add_mac_addr(struct rte_eth_dev *dev,
 110                                struct rte_ether_addr *addr,
 111                                uint32_t index,
 112                                uint32_t pool);
 113 static void i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index);
 114 static int i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
 115                         struct rte_eth_rss_reta_entry64 *reta_conf,
 116                         uint16_t reta_size);
 117 static int i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
 118                         struct rte_eth_rss_reta_entry64 *reta_conf,
 119                         uint16_t reta_size);
 120 static int i40evf_config_rss(struct i40e_vf *vf);
 121 static int i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
 122                                       struct rte_eth_rss_conf *rss_conf);
 123 static int i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
 124                                         struct rte_eth_rss_conf *rss_conf);
 125 static int i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
 126 static int i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
 127                                         struct rte_ether_addr *mac_addr);
 128 static int
 129 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id);
 130 static int
 131 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id);
 132 static void i40evf_handle_pf_event(struct rte_eth_dev *dev,
 133                                    uint8_t *msg,
 134                                    uint16_t msglen);
 135
 136 static int
 137 i40evf_add_del_mc_addr_list(struct rte_eth_dev *dev,
 138                         struct rte_ether_addr *mc_addr_set,
 139                         uint32_t nb_mc_addr, bool add);
 140 static int
 141 i40evf_set_mc_addr_list(struct rte_eth_dev *dev,
 142                         struct rte_ether_addr *mc_addr_set,
 143                         uint32_t nb_mc_addr);
 144 static void
 145 i40evf_dev_alarm_handler(void *param);
 146
 147 /* Default hash key buffer for RSS */
 148 static uint32_t rss_key_default[I40E_VFQF_HKEY_MAX_INDEX + 1];
 149
 150 struct rte_i40evf_xstats_name_off {
 151         char name[RTE_ETH_XSTATS_NAME_SIZE];
 152         unsigned offset;
 153 };
 154
 155 static const struct rte_i40evf_xstats_name_off rte_i40evf_stats_strings[] = {
 156         {"rx_bytes", offsetof(struct i40e_eth_stats, rx_bytes)},
 157         {"rx_unicast_packets", offsetof(struct i40e_eth_stats, rx_unicast)},
 158         {"rx_multicast_packets", offsetof(struct i40e_eth_stats, rx_multicast)},
 159         {"rx_broadcast_packets", offsetof(struct i40e_eth_stats, rx_broadcast)},
 160         {"rx_dropped_packets", offsetof(struct i40e_eth_stats, rx_discards)},
 161         {"rx_unknown_protocol_packets", offsetof(struct i40e_eth_stats,
 162                 rx_unknown_protocol)},
 163         {"tx_bytes", offsetof(struct i40e_eth_stats, tx_bytes)},
 164         {"tx_unicast_packets", offsetof(struct i40e_eth_stats, tx_unicast)},
 165         {"tx_multicast_packets", offsetof(struct i40e_eth_stats, tx_multicast)},
 166         {"tx_broadcast_packets", offsetof(struct i40e_eth_stats, tx_broadcast)},
 167         {"tx_dropped_packets", offsetof(struct i40e_eth_stats, tx_discards)},
 168         {"tx_error_packets", offsetof(struct i40e_eth_stats, tx_errors)},
 169 };
 170
 171 #define I40EVF_NB_XSTATS (sizeof(rte_i40evf_stats_strings) / \
 172                 sizeof(rte_i40evf_stats_strings[0]))
 173
 174 static const struct eth_dev_ops i40evf_eth_dev_ops = {
 175         .dev_configure        = i40evf_dev_configure,
 176         .dev_start            = i40evf_dev_start,
 177         .dev_stop             = i40evf_dev_stop,
 178         .promiscuous_enable   = i40evf_dev_promiscuous_enable,
 179         .promiscuous_disable  = i40evf_dev_promiscuous_disable,
 180         .allmulticast_enable  = i40evf_dev_allmulticast_enable,
 181         .allmulticast_disable = i40evf_dev_allmulticast_disable,
 182         .link_update          = i40evf_dev_link_update,
 183         .stats_get            = i40evf_dev_stats_get,
 184         .stats_reset          = i40evf_dev_xstats_reset,
 185         .xstats_get           = i40evf_dev_xstats_get,
 186         .xstats_get_names     = i40evf_dev_xstats_get_names,
 187         .xstats_reset         = i40evf_dev_xstats_reset,
 188         .dev_close            = i40evf_dev_close,
 189         .dev_reset            = i40evf_dev_reset,
 190         .dev_infos_get        = i40evf_dev_info_get,
 191         .dev_supported_ptypes_get = i40e_dev_supported_ptypes_get,
 192         .vlan_filter_set      = i40evf_vlan_filter_set,
 193         .vlan_offload_set     = i40evf_vlan_offload_set,
 194         .rx_queue_start       = i40evf_dev_rx_queue_start,
 195         .rx_queue_stop        = i40evf_dev_rx_queue_stop,
 196         .tx_queue_start       = i40evf_dev_tx_queue_start,
 197         .tx_queue_stop        = i40evf_dev_tx_queue_stop,
 198         .rx_queue_setup       = i40e_dev_rx_queue_setup,
 199         .rx_queue_release     = i40e_dev_rx_queue_release,
 200         .rx_queue_intr_enable = i40evf_dev_rx_queue_intr_enable,
 201         .rx_queue_intr_disable = i40evf_dev_rx_queue_intr_disable,
 202         .tx_queue_setup       = i40e_dev_tx_queue_setup,
 203         .tx_queue_release     = i40e_dev_tx_queue_release,
 204         .rxq_info_get         = i40e_rxq_info_get,
 205         .txq_info_get         = i40e_txq_info_get,
 206         .mac_addr_add         = i40evf_add_mac_addr,
 207         .mac_addr_remove      = i40evf_del_mac_addr,
 208         .set_mc_addr_list     = i40evf_set_mc_addr_list,
 209         .reta_update          = i40evf_dev_rss_reta_update,
 210         .reta_query           = i40evf_dev_rss_reta_query,
 211         .rss_hash_update      = i40evf_dev_rss_hash_update,
 212         .rss_hash_conf_get    = i40evf_dev_rss_hash_conf_get,
 213         .mtu_set              = i40evf_dev_mtu_set,
 214         .mac_addr_set         = i40evf_set_default_mac_addr,
 215         .tx_done_cleanup      = i40e_tx_done_cleanup,
 216 };
 217
 218 /*
 219  * Read data in admin queue to get msg from pf driver
 220  */
 221 static enum i40evf_aq_result
 222 i40evf_read_pfmsg(struct rte_eth_dev *dev, struct i40evf_arq_msg_info *data)
 223 {
 224         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 225         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 226         struct i40e_arq_event_info event;
 227         enum virtchnl_ops opcode;
 228         enum i40e_status_code retval;
 229         int ret;
 230         enum i40evf_aq_result result = I40EVF_MSG_NON;
 231
 232         event.buf_len = data->buf_len;
 233         event.msg_buf = data->msg;
 234         ret = i40e_clean_arq_element(hw, &event, NULL);
 235         /* Can't read any msg from adminQ */
 236         if (ret) {
 237                 if (ret != I40E_ERR_ADMIN_QUEUE_NO_WORK)
 238                         result = I40EVF_MSG_ERR;
 239                 return result;
 240         }
 241
 242         opcode = (enum virtchnl_ops)rte_le_to_cpu_32(event.desc.cookie_high);
 243         retval = (enum i40e_status_code)rte_le_to_cpu_32(event.desc.cookie_low);
 244         /* pf sys event */
 245         if (opcode == VIRTCHNL_OP_EVENT) {
 246                 struct virtchnl_pf_event *vpe =
 247                         (struct virtchnl_pf_event *)event.msg_buf;
 248
 249                 result = I40EVF_MSG_SYS;
 250                 switch (vpe->event) {
 251                 case VIRTCHNL_EVENT_LINK_CHANGE:
 252                         vf->link_up =
 253                                 vpe->event_data.link_event.link_status;
 254                         vf->link_speed =
 255                                 vpe->event_data.link_event.link_speed;
 256                         vf->pend_msg |= PFMSG_LINK_CHANGE;
 257                         PMD_DRV_LOG(INFO, "Link status update:%s",
 258                                     vf->link_up ? "up" : "down");
 259                         break;
 260                 case VIRTCHNL_EVENT_RESET_IMPENDING:
 261                         vf->vf_reset = true;
 262                         vf->pend_msg |= PFMSG_RESET_IMPENDING;
 263                         PMD_DRV_LOG(INFO, "VF is resetting");
 264                         break;
 265                 case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
 266                         vf->dev_closed = true;
 267                         vf->pend_msg |= PFMSG_DRIVER_CLOSE;
 268                         PMD_DRV_LOG(INFO, "PF driver closed");
 269                         break;
 270                 default:
 271                         PMD_DRV_LOG(ERR, "%s: Unknown event %d from pf",
 272                                     __func__, vpe->event);
 273                 }
 274         } else {
 275                 /* async reply msg on command issued by vf previously */
 276                 result = I40EVF_MSG_CMD;
 277                 /* Actual data length read from PF */
 278                 data->msg_len = event.msg_len;
 279         }
 280
 281         data->result = retval;
 282         data->ops = opcode;
 283
 284         return result;
 285 }
 286
 287 /**
 288  * clear current command. Only call in case execute
 289  * _atomic_set_cmd successfully.
 290  */
 291 static inline void
 292 _clear_cmd(struct i40e_vf *vf)
 293 {
 294         rte_wmb();
 295         vf->pend_cmd = VIRTCHNL_OP_UNKNOWN;
 296 }
 297
 298 /*
 299  * Check there is pending cmd in execution. If none, set new command.
 300  */
 301 static inline int
 302 _atomic_set_cmd(struct i40e_vf *vf, enum virtchnl_ops ops)
 303 {
 304         int ret = rte_atomic32_cmpset(&vf->pend_cmd,
 305                         VIRTCHNL_OP_UNKNOWN, ops);
 306
 307         if (!ret)
 308                 PMD_DRV_LOG(ERR, "There is incomplete cmd %d", vf->pend_cmd);
 309
 310         return !ret;
 311 }
 312
 313 #define MAX_TRY_TIMES 200
 314 #define ASQ_DELAY_MS  10
 315
 316 static int
 317 _i40evf_execute_vf_cmd(struct rte_eth_dev *dev, struct vf_cmd_info *args)
 318 {
 319         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 320         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 321         struct i40evf_arq_msg_info info;
 322         enum i40evf_aq_result ret;
 323         int err, i = 0;
 324
 325         if (_atomic_set_cmd(vf, args->ops))
 326                 return -1;
 327
 328         info.msg = args->out_buffer;
 329         info.buf_len = args->out_size;
 330         info.ops = VIRTCHNL_OP_UNKNOWN;
 331         info.result = I40E_SUCCESS;
 332
 333         err = i40e_aq_send_msg_to_pf(hw, args->ops, I40E_SUCCESS,
 334                      args->in_args, args->in_args_size, NULL);
 335         if (err) {
 336                 PMD_DRV_LOG(ERR, "fail to send cmd %d", args->ops);
 337                 _clear_cmd(vf);
 338                 return err;
 339         }
 340
 341         switch (args->ops) {
 342         case VIRTCHNL_OP_RESET_VF:
 343                 /*no need to process in this function */
 344                 err = 0;
 345                 break;
 346         case VIRTCHNL_OP_VERSION:
 347         case VIRTCHNL_OP_GET_VF_RESOURCES:
 348                 /* for init adminq commands, need to poll the response */
 349                 err = -1;
 350                 do {
 351                         ret = i40evf_read_pfmsg(dev, &info);
 352                         vf->cmd_retval = info.result;
 353                         if (ret == I40EVF_MSG_CMD) {
 354                                 err = 0;
 355                                 break;
 356                         } else if (ret == I40EVF_MSG_ERR)
 357                                 break;
 358                         rte_delay_ms(ASQ_DELAY_MS);
 359                         /* If don't read msg or read sys event, continue */
 360                 } while (i++ < MAX_TRY_TIMES);
 361                 _clear_cmd(vf);
 362                 break;
 363         case VIRTCHNL_OP_REQUEST_QUEUES:
 364                 /**
 365                  * ignore async reply, only wait for system message,
 366                  * vf_reset = true if get VIRTCHNL_EVENT_RESET_IMPENDING,
 367                  * if not, means request queues failed.
 368                  */
 369                 err = -1;
 370                 do {
 371                         ret = i40evf_read_pfmsg(dev, &info);
 372                         vf->cmd_retval = info.result;
 373                         if (ret == I40EVF_MSG_SYS && vf->vf_reset) {
 374                                 err = 0;
 375                                 break;
 376                         } else if (ret == I40EVF_MSG_ERR ||
 377                                            ret == I40EVF_MSG_CMD) {
 378                                 break;
 379                         }
 380                         rte_delay_ms(ASQ_DELAY_MS);
 381                         /* If don't read msg or read sys event, continue */
 382                 } while (i++ < MAX_TRY_TIMES);
 383                 _clear_cmd(vf);
 384                 break;
 385
 386         default:
 387                 /* for other adminq in running time, waiting the cmd done flag */
 388                 err = -1;
 389                 do {
 390                         if (vf->pend_cmd == VIRTCHNL_OP_UNKNOWN) {
 391                                 err = 0;
 392                                 break;
 393                         }
 394                         rte_delay_ms(ASQ_DELAY_MS);
 395                         /* If don't read msg or read sys event, continue */
 396                 } while (i++ < MAX_TRY_TIMES);
 397                 /* If there's no response is received, clear command */
 398                 if (i >= MAX_TRY_TIMES) {
 399                         PMD_DRV_LOG(WARNING, "No response for %d", args->ops);
 400                         _clear_cmd(vf);
 401                 }
 402                 break;
 403         }
 404
 405         return err | vf->cmd_retval;
 406 }
 407
 408 static int
 409 i40evf_execute_vf_cmd(struct rte_eth_dev *dev, struct vf_cmd_info *args)
 410 {
 411         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 412         int err;
 413
 414         while (!rte_spinlock_trylock(&vf->cmd_send_lock))
 415                 rte_delay_us_sleep(50);
 416         err = _i40evf_execute_vf_cmd(dev, args);
 417         rte_spinlock_unlock(&vf->cmd_send_lock);
 418         return err;
 419 }
 420
 421 /*
 422  * Check API version with sync wait until version read or fail from admin queue
 423  */
 424 static int
 425 i40evf_check_api_version(struct rte_eth_dev *dev)
 426 {
 427         struct virtchnl_version_info version, *pver;
 428         int err;
 429         struct vf_cmd_info args;
 430         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 431
 432         version.major = VIRTCHNL_VERSION_MAJOR;
 433         version.minor = VIRTCHNL_VERSION_MINOR;
 434
 435         args.ops = VIRTCHNL_OP_VERSION;
 436         args.in_args = (uint8_t *)&version;
 437         args.in_args_size = sizeof(version);
 438         args.out_buffer = vf->aq_resp;
 439         args.out_size = I40E_AQ_BUF_SZ;
 440
 441         err = i40evf_execute_vf_cmd(dev, &args);
 442         if (err) {
 443                 PMD_INIT_LOG(ERR, "fail to execute command OP_VERSION");
 444                 return err;
 445         }
 446
 447         pver = (struct virtchnl_version_info *)args.out_buffer;
 448         vf->version_major = pver->major;
 449         vf->version_minor = pver->minor;
 450         if ((vf->version_major == VIRTCHNL_VERSION_MAJOR) &&
 451                 (vf->version_minor <= VIRTCHNL_VERSION_MINOR))
 452                 PMD_DRV_LOG(INFO, "Peer is Linux PF host");
 453         else {
 454                 PMD_INIT_LOG(ERR, "PF/VF API version mismatch:(%u.%u)-(%u.%u)",
 455                                         vf->version_major, vf->version_minor,
 456                                                 VIRTCHNL_VERSION_MAJOR,
 457                                                 VIRTCHNL_VERSION_MINOR);
 458                 return -1;
 459         }
 460
 461         return 0;
 462 }
 463
 464 static int
 465 i40evf_get_vf_resource(struct rte_eth_dev *dev)
 466 {
 467         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 468         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 469         int err;
 470         struct vf_cmd_info args;
 471         uint32_t caps, len;
 472
 473         args.ops = VIRTCHNL_OP_GET_VF_RESOURCES;
 474         args.out_buffer = vf->aq_resp;
 475         args.out_size = I40E_AQ_BUF_SZ;
 476         if (PF_IS_V11(vf)) {
 477                 caps = VIRTCHNL_VF_OFFLOAD_L2 |
 478                        VIRTCHNL_VF_OFFLOAD_RSS_AQ |
 479                        VIRTCHNL_VF_OFFLOAD_RSS_REG |
 480                        VIRTCHNL_VF_OFFLOAD_VLAN |
 481                        VIRTCHNL_VF_OFFLOAD_RX_POLLING |
 482                        VIRTCHNL_VF_CAP_ADV_LINK_SPEED;
 483                 args.in_args = (uint8_t *)&caps;
 484                 args.in_args_size = sizeof(caps);
 485         } else {
 486                 args.in_args = NULL;
 487                 args.in_args_size = 0;
 488         }
 489         err = i40evf_execute_vf_cmd(dev, &args);
 490
 491         if (err) {
 492                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_VF_RESOURCE");
 493                 return err;
 494         }
 495
 496         len =  sizeof(struct virtchnl_vf_resource) +
 497                 I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource);
 498
 499         rte_memcpy(vf->vf_res, args.out_buffer,
 500                         RTE_MIN(args.out_size, len));
 501         i40e_vf_parse_hw_config(hw, vf->vf_res);
 502
 503         return 0;
 504 }
 505
 506 static int
 507 i40evf_config_promisc(struct rte_eth_dev *dev,
 508                       bool enable_unicast,
 509                       bool enable_multicast)
 510 {
 511         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 512         int err;
 513         struct vf_cmd_info args;
 514         struct virtchnl_promisc_info promisc;
 515
 516         promisc.flags = 0;
 517         promisc.vsi_id = vf->vsi_res->vsi_id;
 518
 519         if (enable_unicast)
 520                 promisc.flags |= FLAG_VF_UNICAST_PROMISC;
 521
 522         if (enable_multicast)
 523                 promisc.flags |= FLAG_VF_MULTICAST_PROMISC;
 524
 525         args.ops = VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE;
 526         args.in_args = (uint8_t *)&promisc;
 527         args.in_args_size = sizeof(promisc);
 528         args.out_buffer = vf->aq_resp;
 529         args.out_size = I40E_AQ_BUF_SZ;
 530
 531         err = i40evf_execute_vf_cmd(dev, &args);
 532
 533         if (err) {
 534                 PMD_DRV_LOG(ERR, "fail to execute command "
 535                             "CONFIG_PROMISCUOUS_MODE");
 536
 537                 if (err == I40E_NOT_SUPPORTED)
 538                         return -ENOTSUP;
 539
 540                 return -EAGAIN;
 541         }
 542
 543         vf->promisc_unicast_enabled = enable_unicast;
 544         vf->promisc_multicast_enabled = enable_multicast;
 545         return 0;
 546 }
 547
 548 static int
 549 i40evf_enable_vlan_strip(struct rte_eth_dev *dev)
 550 {
 551         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 552         struct vf_cmd_info args;
 553         int ret;
 554
 555         memset(&args, 0, sizeof(args));
 556         args.ops = VIRTCHNL_OP_ENABLE_VLAN_STRIPPING;
 557         args.in_args = NULL;
 558         args.in_args_size = 0;
 559         args.out_buffer = vf->aq_resp;
 560         args.out_size = I40E_AQ_BUF_SZ;
 561         ret = i40evf_execute_vf_cmd(dev, &args);
 562         if (ret)
 563                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 564                             "VIRTCHNL_OP_ENABLE_VLAN_STRIPPING");
 565
 566         return ret;
 567 }
 568
 569 static int
 570 i40evf_disable_vlan_strip(struct rte_eth_dev *dev)
 571 {
 572         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 573         struct vf_cmd_info args;
 574         int ret;
 575
 576         memset(&args, 0, sizeof(args));
 577         args.ops = VIRTCHNL_OP_DISABLE_VLAN_STRIPPING;
 578         args.in_args = NULL;
 579         args.in_args_size = 0;
 580         args.out_buffer = vf->aq_resp;
 581         args.out_size = I40E_AQ_BUF_SZ;
 582         ret = i40evf_execute_vf_cmd(dev, &args);
 583         if (ret)
 584                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 585                             "VIRTCHNL_OP_DISABLE_VLAN_STRIPPING");
 586
 587         return ret;
 588 }
 589
 590 static void
 591 i40evf_fill_virtchnl_vsi_txq_info(struct virtchnl_txq_info *txq_info,
 592                                   uint16_t vsi_id,
 593                                   uint16_t queue_id,
 594                                   uint16_t nb_txq,
 595                                   struct i40e_tx_queue *txq)
 596 {
 597         txq_info->vsi_id = vsi_id;
 598         txq_info->queue_id = queue_id;
 599         if (queue_id < nb_txq && txq) {
 600                 txq_info->ring_len = txq->nb_tx_desc;
 601                 txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
 602         }
 603 }
 604
 605 static void
 606 i40evf_fill_virtchnl_vsi_rxq_info(struct virtchnl_rxq_info *rxq_info,
 607                                   uint16_t vsi_id,
 608                                   uint16_t queue_id,
 609                                   uint16_t nb_rxq,
 610                                   uint32_t max_pkt_size,
 611                                   struct i40e_rx_queue *rxq)
 612 {
 613         rxq_info->vsi_id = vsi_id;
 614         rxq_info->queue_id = queue_id;
 615         rxq_info->max_pkt_size = max_pkt_size;
 616         if (queue_id < nb_rxq && rxq) {
 617                 rxq_info->ring_len = rxq->nb_rx_desc;
 618                 rxq_info->dma_ring_addr = rxq->rx_ring_phys_addr;
 619                 rxq_info->databuffer_size =
 620                         (rte_pktmbuf_data_room_size(rxq->mp) -
 621                                 RTE_PKTMBUF_HEADROOM);
 622         }
 623 }
 624
 625 static int
 626 i40evf_configure_vsi_queues(struct rte_eth_dev *dev)
 627 {
 628         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 629         struct i40e_rx_queue **rxq =
 630                 (struct i40e_rx_queue **)dev->data->rx_queues;
 631         struct i40e_tx_queue **txq =
 632                 (struct i40e_tx_queue **)dev->data->tx_queues;
 633         struct virtchnl_vsi_queue_config_info *vc_vqci;
 634         struct virtchnl_queue_pair_info *vc_qpi;
 635         struct vf_cmd_info args;
 636         uint16_t i, nb_qp = vf->num_queue_pairs;
 637         const uint32_t size =
 638                 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqci, nb_qp);
 639         uint8_t buff[size];
 640         int ret;
 641
 642         memset(buff, 0, sizeof(buff));
 643         vc_vqci = (struct virtchnl_vsi_queue_config_info *)buff;
 644         vc_vqci->vsi_id = vf->vsi_res->vsi_id;
 645         vc_vqci->num_queue_pairs = nb_qp;
 646
 647         for (i = 0, vc_qpi = vc_vqci->qpair; i < nb_qp; i++, vc_qpi++) {
 648                 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpi->txq,
 649                         vc_vqci->vsi_id, i, dev->data->nb_tx_queues,
 650                         txq ? txq[i] : NULL);
 651                 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpi->rxq,
 652                         vc_vqci->vsi_id, i, dev->data->nb_rx_queues,
 653                         vf->max_pkt_len, rxq ? rxq[i] : NULL);
 654         }
 655         memset(&args, 0, sizeof(args));
 656         args.ops = VIRTCHNL_OP_CONFIG_VSI_QUEUES;
 657         args.in_args = (uint8_t *)vc_vqci;
 658         args.in_args_size = size;
 659         args.out_buffer = vf->aq_resp;
 660         args.out_size = I40E_AQ_BUF_SZ;
 661         ret = i40evf_execute_vf_cmd(dev, &args);
 662         if (ret)
 663                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 664                         "VIRTCHNL_OP_CONFIG_VSI_QUEUES");
 665
 666         return ret;
 667 }
 668
 669 static int
 670 i40evf_config_irq_map(struct rte_eth_dev *dev)
 671 {
 672         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 673         struct vf_cmd_info args;
 674         uint8_t *cmd_buffer = NULL;
 675         struct virtchnl_irq_map_info *map_info;
 676         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
 677         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 678         uint32_t vec, cmd_buffer_size, max_vectors, nb_msix, msix_base, i;
 679         uint16_t rxq_map[vf->vf_res->max_vectors];
 680         int err;
 681
 682         memset(rxq_map, 0, sizeof(rxq_map));
 683         if (dev->data->dev_conf.intr_conf.rxq != 0 &&
 684                 rte_intr_allow_others(intr_handle)) {
 685                 msix_base = I40E_RX_VEC_START;
 686                 /* For interrupt mode, available vector id is from 1. */
 687                 max_vectors = vf->vf_res->max_vectors - 1;
 688                 nb_msix = RTE_MIN(max_vectors, intr_handle->nb_efd);
 689
 690                 vec = msix_base;
 691                 for (i = 0; i < dev->data->nb_rx_queues; i++) {
 692                         rxq_map[vec] |= 1 << i;
 693                         intr_handle->intr_vec[i] = vec++;
 694                         if (vec >= vf->vf_res->max_vectors)
 695                                 vec = msix_base;
 696                 }
 697         } else {
 698                 msix_base = I40E_MISC_VEC_ID;
 699                 nb_msix = 1;
 700
 701                 for (i = 0; i < dev->data->nb_rx_queues; i++) {
 702                         rxq_map[msix_base] |= 1 << i;
 703                         if (rte_intr_dp_is_en(intr_handle))
 704                                 intr_handle->intr_vec[i] = msix_base;
 705                 }
 706         }
 707
 708         cmd_buffer_size = sizeof(struct virtchnl_irq_map_info) +
 709                         sizeof(struct virtchnl_vector_map) * nb_msix;
 710         cmd_buffer = rte_zmalloc("i40e", cmd_buffer_size, 0);
 711         if (!cmd_buffer) {
 712                 PMD_DRV_LOG(ERR, "Failed to allocate memory");
 713                 return I40E_ERR_NO_MEMORY;
 714         }
 715
 716         map_info = (struct virtchnl_irq_map_info *)cmd_buffer;
 717         map_info->num_vectors = nb_msix;
 718         for (i = 0; i < nb_msix; i++) {
 719                 map_info->vecmap[i].rxitr_idx = I40E_ITR_INDEX_DEFAULT;
 720                 map_info->vecmap[i].vsi_id = vf->vsi_res->vsi_id;
 721                 map_info->vecmap[i].vector_id = msix_base + i;
 722                 map_info->vecmap[i].txq_map = 0;
 723                 map_info->vecmap[i].rxq_map = rxq_map[msix_base + i];
 724         }
 725
 726         args.ops = VIRTCHNL_OP_CONFIG_IRQ_MAP;
 727         args.in_args = (u8 *)cmd_buffer;
 728         args.in_args_size = cmd_buffer_size;
 729         args.out_buffer = vf->aq_resp;
 730         args.out_size = I40E_AQ_BUF_SZ;
 731         err = i40evf_execute_vf_cmd(dev, &args);
 732         if (err)
 733                 PMD_DRV_LOG(ERR, "fail to execute command OP_ENABLE_QUEUES");
 734
 735         rte_free(cmd_buffer);
 736
 737         return err;
 738 }
 739
 740 static int
 741 i40evf_switch_queue(struct rte_eth_dev *dev, bool isrx, uint16_t qid,
 742                                 bool on)
 743 {
 744         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 745         struct virtchnl_queue_select queue_select;
 746         int err;
 747         struct vf_cmd_info args;
 748         memset(&queue_select, 0, sizeof(queue_select));
 749         queue_select.vsi_id = vf->vsi_res->vsi_id;
 750
 751         if (isrx)
 752                 queue_select.rx_queues |= 1 << qid;
 753         else
 754                 queue_select.tx_queues |= 1 << qid;
 755
 756         if (on)
 757                 args.ops = VIRTCHNL_OP_ENABLE_QUEUES;
 758         else
 759                 args.ops = VIRTCHNL_OP_DISABLE_QUEUES;
 760         args.in_args = (u8 *)&queue_select;
 761         args.in_args_size = sizeof(queue_select);
 762         args.out_buffer = vf->aq_resp;
 763         args.out_size = I40E_AQ_BUF_SZ;
 764         err = i40evf_execute_vf_cmd(dev, &args);
 765         if (err)
 766                 PMD_DRV_LOG(ERR, "fail to switch %s %u %s",
 767                             isrx ? "RX" : "TX", qid, on ? "on" : "off");
 768
 769         return err;
 770 }
 771
 772 static int
 773 i40evf_start_queues(struct rte_eth_dev *dev)
 774 {
 775         struct rte_eth_dev_data *dev_data = dev->data;
 776         int i;
 777         struct i40e_rx_queue *rxq;
 778         struct i40e_tx_queue *txq;
 779
 780         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 781                 rxq = dev_data->rx_queues[i];
 782                 if (rxq->rx_deferred_start)
 783                         continue;
 784                 if (i40evf_dev_rx_queue_start(dev, i) != 0) {
 785                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 786                         return -1;
 787                 }
 788         }
 789
 790         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 791                 txq = dev_data->tx_queues[i];
 792                 if (txq->tx_deferred_start)
 793                         continue;
 794                 if (i40evf_dev_tx_queue_start(dev, i) != 0) {
 795                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 796                         return -1;
 797                 }
 798         }
 799
 800         return 0;
 801 }
 802
 803 static int
 804 i40evf_stop_queues(struct rte_eth_dev *dev)
 805 {
 806         int i;
 807
 808         /* Stop TX queues first */
 809         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 810                 if (i40evf_dev_tx_queue_stop(dev, i) != 0) {
 811                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 812                 }
 813         }
 814
 815         /* Then stop RX queues */
 816         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 817                 if (i40evf_dev_rx_queue_stop(dev, i) != 0) {
 818                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 819                 }
 820         }
 821
 822         return 0;
 823 }
 824
 825 static int
 826 i40evf_add_mac_addr(struct rte_eth_dev *dev,
 827                     struct rte_ether_addr *addr,
 828                     __rte_unused uint32_t index,
 829                     __rte_unused uint32_t pool)
 830 {
 831         struct virtchnl_ether_addr_list *list;
 832         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 833         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 834                         sizeof(struct virtchnl_ether_addr)];
 835         int err;
 836         struct vf_cmd_info args;
 837
 838         if (rte_is_zero_ether_addr(addr)) {
 839                 PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
 840                             addr->addr_bytes[0], addr->addr_bytes[1],
 841                             addr->addr_bytes[2], addr->addr_bytes[3],
 842                             addr->addr_bytes[4], addr->addr_bytes[5]);
 843                 return I40E_ERR_INVALID_MAC_ADDR;
 844         }
 845
 846         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 847         list->vsi_id = vf->vsi_res->vsi_id;
 848         list->num_elements = 1;
 849         rte_memcpy(list->list[0].addr, addr->addr_bytes,
 850                                         sizeof(addr->addr_bytes));
 851
 852         args.ops = VIRTCHNL_OP_ADD_ETH_ADDR;
 853         args.in_args = cmd_buffer;
 854         args.in_args_size = sizeof(cmd_buffer);
 855         args.out_buffer = vf->aq_resp;
 856         args.out_size = I40E_AQ_BUF_SZ;
 857         err = i40evf_execute_vf_cmd(dev, &args);
 858         if (err)
 859                 PMD_DRV_LOG(ERR, "fail to execute command "
 860                             "OP_ADD_ETHER_ADDRESS");
 861         else
 862                 vf->vsi.mac_num++;
 863
 864         return err;
 865 }
 866
 867 static void
 868 i40evf_del_mac_addr_by_addr(struct rte_eth_dev *dev,
 869                             struct rte_ether_addr *addr)
 870 {
 871         struct virtchnl_ether_addr_list *list;
 872         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 873         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 874                         sizeof(struct virtchnl_ether_addr)];
 875         int err;
 876         struct vf_cmd_info args;
 877
 878         if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
 879                 PMD_DRV_LOG(ERR, "Invalid mac:%x-%x-%x-%x-%x-%x",
 880                             addr->addr_bytes[0], addr->addr_bytes[1],
 881                             addr->addr_bytes[2], addr->addr_bytes[3],
 882                             addr->addr_bytes[4], addr->addr_bytes[5]);
 883                 return;
 884         }
 885
 886         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 887         list->vsi_id = vf->vsi_res->vsi_id;
 888         list->num_elements = 1;
 889         rte_memcpy(list->list[0].addr, addr->addr_bytes,
 890                         sizeof(addr->addr_bytes));
 891
 892         args.ops = VIRTCHNL_OP_DEL_ETH_ADDR;
 893         args.in_args = cmd_buffer;
 894         args.in_args_size = sizeof(cmd_buffer);
 895         args.out_buffer = vf->aq_resp;
 896         args.out_size = I40E_AQ_BUF_SZ;
 897         err = i40evf_execute_vf_cmd(dev, &args);
 898         if (err)
 899                 PMD_DRV_LOG(ERR, "fail to execute command "
 900                             "OP_DEL_ETHER_ADDRESS");
 901         else
 902                 vf->vsi.mac_num--;
 903         return;
 904 }
 905
 906 static void
 907 i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index)
 908 {
 909         struct rte_eth_dev_data *data = dev->data;
 910         struct rte_ether_addr *addr;
 911
 912         addr = &data->mac_addrs[index];
 913
 914         i40evf_del_mac_addr_by_addr(dev, addr);
 915 }
 916
 917 static int
 918 i40evf_query_stats(struct rte_eth_dev *dev, struct i40e_eth_stats **pstats)
 919 {
 920         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 921         struct virtchnl_queue_select q_stats;
 922         int err;
 923         struct vf_cmd_info args;
 924
 925         memset(&q_stats, 0, sizeof(q_stats));
 926         q_stats.vsi_id = vf->vsi_res->vsi_id;
 927         args.ops = VIRTCHNL_OP_GET_STATS;
 928         args.in_args = (u8 *)&q_stats;
 929         args.in_args_size = sizeof(q_stats);
 930         args.out_buffer = vf->aq_resp;
 931         args.out_size = I40E_AQ_BUF_SZ;
 932
 933         err = i40evf_execute_vf_cmd(dev, &args);
 934         if (err) {
 935                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_STATS");
 936                 *pstats = NULL;
 937                 return err;
 938         }
 939         *pstats = (struct i40e_eth_stats *)args.out_buffer;
 940         return 0;
 941 }
 942
 943 static void
 944 i40evf_stat_update_48(uint64_t *offset,
 945                    uint64_t *stat)
 946 {
 947         if (*stat >= *offset)
 948                 *stat = *stat - *offset;
 949         else
 950                 *stat = (uint64_t)((*stat +
 951                         ((uint64_t)1 << I40E_48_BIT_WIDTH)) - *offset);
 952
 953         *stat &= I40E_48_BIT_MASK;
 954 }
 955
 956 static void
 957 i40evf_stat_update_32(uint64_t *offset,
 958                    uint64_t *stat)
 959 {
 960         if (*stat >= *offset)
 961                 *stat = (uint64_t)(*stat - *offset);
 962         else
 963                 *stat = (uint64_t)((*stat +
 964                         ((uint64_t)1 << I40E_32_BIT_WIDTH)) - *offset);
 965 }
 966
 967 static void
 968 i40evf_update_stats(struct i40e_vsi *vsi,
 969                                         struct i40e_eth_stats *nes)
 970 {
 971         struct i40e_eth_stats *oes = &vsi->eth_stats_offset;
 972
 973         i40evf_stat_update_48(&oes->rx_bytes,
 974                             &nes->rx_bytes);
 975         i40evf_stat_update_48(&oes->rx_unicast,
 976                             &nes->rx_unicast);
 977         i40evf_stat_update_48(&oes->rx_multicast,
 978                             &nes->rx_multicast);
 979         i40evf_stat_update_48(&oes->rx_broadcast,
 980                             &nes->rx_broadcast);
 981         i40evf_stat_update_32(&oes->rx_discards,
 982                                 &nes->rx_discards);
 983         i40evf_stat_update_32(&oes->rx_unknown_protocol,
 984                             &nes->rx_unknown_protocol);
 985         i40evf_stat_update_48(&oes->tx_bytes,
 986                             &nes->tx_bytes);
 987         i40evf_stat_update_48(&oes->tx_unicast,
 988                             &nes->tx_unicast);
 989         i40evf_stat_update_48(&oes->tx_multicast,
 990                             &nes->tx_multicast);
 991         i40evf_stat_update_48(&oes->tx_broadcast,
 992                             &nes->tx_broadcast);
 993         i40evf_stat_update_32(&oes->tx_errors, &nes->tx_errors);
 994         i40evf_stat_update_32(&oes->tx_discards, &nes->tx_discards);
 995 }
 996
 997 static int
 998 i40evf_dev_xstats_reset(struct rte_eth_dev *dev)
 999 {
1000         int ret;
1001         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1002         struct i40e_eth_stats *pstats = NULL;
1003
1004         /* read stat values to clear hardware registers */
1005         ret = i40evf_query_stats(dev, &pstats);
1006
1007         /* set stats offset base on current values */
1008         if (ret == 0)
1009                 vf->vsi.eth_stats_offset = *pstats;
1010
1011         return ret;
1012 }
1013
1014 static int i40evf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
1015                                       struct rte_eth_xstat_name *xstats_names,
1016                                       __rte_unused unsigned limit)
1017 {
1018         unsigned i;
1019
1020         if (xstats_names != NULL)
1021                 for (i = 0; i < I40EVF_NB_XSTATS; i++) {
1022                         snprintf(xstats_names[i].name,
1023                                 sizeof(xstats_names[i].name),
1024                                 "%s", rte_i40evf_stats_strings[i].name);
1025                 }
1026         return I40EVF_NB_XSTATS;
1027 }
1028
1029 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
1030                                  struct rte_eth_xstat *xstats, unsigned n)
1031 {
1032         int ret;
1033         unsigned i;
1034         struct i40e_eth_stats *pstats = NULL;
1035         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1036         struct i40e_vsi *vsi = &vf->vsi;
1037
1038         if (n < I40EVF_NB_XSTATS)
1039                 return I40EVF_NB_XSTATS;
1040
1041         ret = i40evf_query_stats(dev, &pstats);
1042         if (ret != 0)
1043                 return 0;
1044
1045         if (!xstats)
1046                 return 0;
1047
1048         i40evf_update_stats(vsi, pstats);
1049
1050         /* loop over xstats array and values from pstats */
1051         for (i = 0; i < I40EVF_NB_XSTATS; i++) {
1052                 xstats[i].id = i;
1053                 xstats[i].value = *(uint64_t *)(((char *)pstats) +
1054                         rte_i40evf_stats_strings[i].offset);
1055         }
1056
1057         return I40EVF_NB_XSTATS;
1058 }
1059
1060 static int
1061 i40evf_add_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1062 {
1063         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1064         struct virtchnl_vlan_filter_list *vlan_list;
1065         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
1066                                                         sizeof(uint16_t)];
1067         int err;
1068         struct vf_cmd_info args;
1069
1070         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
1071         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1072         vlan_list->num_elements = 1;
1073         vlan_list->vlan_id[0] = vlanid;
1074
1075         args.ops = VIRTCHNL_OP_ADD_VLAN;
1076         args.in_args = (u8 *)&cmd_buffer;
1077         args.in_args_size = sizeof(cmd_buffer);
1078         args.out_buffer = vf->aq_resp;
1079         args.out_size = I40E_AQ_BUF_SZ;
1080         err = i40evf_execute_vf_cmd(dev, &args);
1081         if (err)
1082                 PMD_DRV_LOG(ERR, "fail to execute command OP_ADD_VLAN");
1083
1084         return err;
1085 }
1086
1087 static int
1088 i40evf_request_queues(struct rte_eth_dev *dev, uint16_t num)
1089 {
1090         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1091         struct virtchnl_vf_res_request vfres;
1092         struct vf_cmd_info args;
1093         int err;
1094
1095         vfres.num_queue_pairs = num;
1096
1097         args.ops = VIRTCHNL_OP_REQUEST_QUEUES;
1098         args.in_args = (u8 *)&vfres;
1099         args.in_args_size = sizeof(vfres);
1100         args.out_buffer = vf->aq_resp;
1101         args.out_size = I40E_AQ_BUF_SZ;
1102
1103         rte_eal_alarm_cancel(i40evf_dev_alarm_handler, dev);
1104
1105         err = i40evf_execute_vf_cmd(dev, &args);
1106
1107         rte_eal_alarm_set(I40EVF_ALARM_INTERVAL, i40evf_dev_alarm_handler, dev);
1108
1109         if (err != I40E_SUCCESS) {
1110                 PMD_DRV_LOG(ERR, "fail to execute command OP_REQUEST_QUEUES");
1111                 return err;
1112         }
1113
1114         /* The PF will issue a reset to the VF when change the number of
1115          * queues. The PF will set I40E_VFGEN_RSTAT to COMPLETE first, then
1116          * wait 10ms and set it to ACTIVE. In this duration, vf may not catch
1117          * the moment that COMPLETE is set. So, for vf, we'll try to wait a
1118          * long time.
1119          */
1120         rte_delay_ms(100);
1121
1122         err = i40evf_check_vf_reset_done(dev);
1123         if (err)
1124                 PMD_DRV_LOG(ERR, "VF is still resetting");
1125
1126         return err;
1127 }
1128
1129 static int
1130 i40evf_del_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1131 {
1132         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1133         struct virtchnl_vlan_filter_list *vlan_list;
1134         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
1135                                                         sizeof(uint16_t)];
1136         int err;
1137         struct vf_cmd_info args;
1138
1139         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
1140         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1141         vlan_list->num_elements = 1;
1142         vlan_list->vlan_id[0] = vlanid;
1143
1144         args.ops = VIRTCHNL_OP_DEL_VLAN;
1145         args.in_args = (u8 *)&cmd_buffer;
1146         args.in_args_size = sizeof(cmd_buffer);
1147         args.out_buffer = vf->aq_resp;
1148         args.out_size = I40E_AQ_BUF_SZ;
1149         err = i40evf_execute_vf_cmd(dev, &args);
1150         if (err)
1151                 PMD_DRV_LOG(ERR, "fail to execute command OP_DEL_VLAN");
1152
1153         return err;
1154 }
1155
1156 static const struct rte_pci_id pci_id_i40evf_map[] = {
1157         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF) },
1158         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF_HV) },
1159         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_A0_VF) },
1160         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_VF) },
1161         { .vendor_id = 0, /* sentinel */ },
1162 };
1163
1164 /* Disable IRQ0 */
1165 static inline void
1166 i40evf_disable_irq0(struct i40e_hw *hw)
1167 {
1168         /* Disable all interrupt types */
1169         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, 0);
1170         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1171                        I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1172         I40EVF_WRITE_FLUSH(hw);
1173 }
1174
1175 /* Enable IRQ0 */
1176 static inline void
1177 i40evf_enable_irq0(struct i40e_hw *hw)
1178 {
1179         /* Enable admin queue interrupt trigger */
1180         uint32_t val;
1181
1182         i40evf_disable_irq0(hw);
1183         val = I40E_READ_REG(hw, I40E_VFINT_ICR0_ENA1);
1184         val |= I40E_VFINT_ICR0_ENA1_ADMINQ_MASK |
1185                 I40E_VFINT_ICR0_ENA1_LINK_STAT_CHANGE_MASK;
1186         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, val);
1187
1188         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1189                 I40E_VFINT_DYN_CTL01_INTENA_MASK |
1190                 I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1191                 I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1192
1193         I40EVF_WRITE_FLUSH(hw);
1194 }
1195
1196 static int
1197 i40evf_check_vf_reset_done(struct rte_eth_dev *dev)
1198 {
1199         int i, reset;
1200         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1201         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1202
1203         for (i = 0; i < MAX_RESET_WAIT_CNT; i++) {
1204                 reset = I40E_READ_REG(hw, I40E_VFGEN_RSTAT) &
1205                         I40E_VFGEN_RSTAT_VFR_STATE_MASK;
1206                 reset = reset >> I40E_VFGEN_RSTAT_VFR_STATE_SHIFT;
1207                 if (reset == VIRTCHNL_VFR_VFACTIVE ||
1208                     reset == VIRTCHNL_VFR_COMPLETED)
1209                         break;
1210                 rte_delay_ms(50);
1211         }
1212
1213         if (i >= MAX_RESET_WAIT_CNT)
1214                 return -1;
1215
1216         vf->vf_reset = false;
1217         vf->pend_msg &= ~PFMSG_RESET_IMPENDING;
1218
1219         return 0;
1220 }
1221 static int
1222 i40evf_reset_vf(struct rte_eth_dev *dev)
1223 {
1224         int ret;
1225         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1226
1227         if (i40e_vf_reset(hw) != I40E_SUCCESS) {
1228                 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1229                 return -1;
1230         }
1231         /**
1232           * After issuing vf reset command to pf, pf won't necessarily
1233           * reset vf, it depends on what state it exactly is. If it's not
1234           * initialized yet, it won't have vf reset since it's in a certain
1235           * state. If not, it will try to reset. Even vf is reset, pf will
1236           * set I40E_VFGEN_RSTAT to COMPLETE first, then wait 10ms and set
1237           * it to ACTIVE. In this duration, vf may not catch the moment that
1238           * COMPLETE is set. So, for vf, we'll try to wait a long time.
1239           */
1240         rte_delay_ms(200);
1241
1242         ret = i40evf_check_vf_reset_done(dev);
1243         if (ret) {
1244                 PMD_INIT_LOG(ERR, "VF is still resetting");
1245                 return ret;
1246         }
1247
1248         return 0;
1249 }
1250
1251 static int
1252 i40evf_init_vf(struct rte_eth_dev *dev)
1253 {
1254         int i, err, bufsz;
1255         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1256         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1257         uint16_t interval =
1258                 i40e_calc_itr_interval(0, 0);
1259
1260         vf->adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1261         vf->dev_data = dev->data;
1262         rte_spinlock_init(&vf->cmd_send_lock);
1263         err = i40e_set_mac_type(hw);
1264         if (err) {
1265                 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err);
1266                 goto err;
1267         }
1268
1269         err = i40evf_check_vf_reset_done(dev);
1270         if (err)
1271                 goto err;
1272
1273         i40e_init_adminq_parameter(hw);
1274         err = i40e_init_adminq(hw);
1275         if (err) {
1276                 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err);
1277                 goto err;
1278         }
1279
1280         /* Reset VF and wait until it's complete */
1281         if (i40evf_reset_vf(dev)) {
1282                 PMD_INIT_LOG(ERR, "reset NIC failed");
1283                 goto err_aq;
1284         }
1285
1286         /* VF reset, shutdown admin queue and initialize again */
1287         if (i40e_shutdown_adminq(hw) != I40E_SUCCESS) {
1288                 PMD_INIT_LOG(ERR, "i40e_shutdown_adminq failed");
1289                 goto err;
1290         }
1291
1292         i40e_init_adminq_parameter(hw);
1293         if (i40e_init_adminq(hw) != I40E_SUCCESS) {
1294                 PMD_INIT_LOG(ERR, "init_adminq failed");
1295                 goto err;
1296         }
1297
1298         vf->aq_resp = rte_zmalloc("vf_aq_resp", I40E_AQ_BUF_SZ, 0);
1299         if (!vf->aq_resp) {
1300                 PMD_INIT_LOG(ERR, "unable to allocate vf_aq_resp memory");
1301                 goto err_aq;
1302         }
1303         if (i40evf_check_api_version(dev) != 0) {
1304                 PMD_INIT_LOG(ERR, "check_api version failed");
1305                 goto err_api;
1306         }
1307         bufsz = sizeof(struct virtchnl_vf_resource) +
1308                 (I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource));
1309         vf->vf_res = rte_zmalloc("vf_res", bufsz, 0);
1310         if (!vf->vf_res) {
1311                 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory");
1312                 goto err_api;
1313         }
1314
1315         if (i40evf_get_vf_resource(dev) != 0) {
1316                 PMD_INIT_LOG(ERR, "i40evf_get_vf_config failed");
1317                 goto err_alloc;
1318         }
1319
1320         /* got VF config message back from PF, now we can parse it */
1321         for (i = 0; i < vf->vf_res->num_vsis; i++) {
1322                 if (vf->vf_res->vsi_res[i].vsi_type == VIRTCHNL_VSI_SRIOV)
1323                         vf->vsi_res = &vf->vf_res->vsi_res[i];
1324         }
1325
1326         if (!vf->vsi_res) {
1327                 PMD_INIT_LOG(ERR, "no LAN VSI found");
1328                 goto err_alloc;
1329         }
1330
1331         if (hw->mac.type == I40E_MAC_X722_VF)
1332                 vf->flags = I40E_FLAG_RSS_AQ_CAPABLE;
1333         vf->vsi.vsi_id = vf->vsi_res->vsi_id;
1334
1335         switch (vf->vsi_res->vsi_type) {
1336         case VIRTCHNL_VSI_SRIOV:
1337                 vf->vsi.type = I40E_VSI_SRIOV;
1338                 break;
1339         default:
1340                 vf->vsi.type = I40E_VSI_TYPE_UNKNOWN;
1341                 break;
1342         }
1343         vf->vsi.nb_qps = vf->vsi_res->num_queue_pairs;
1344         vf->vsi.adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1345
1346         /* Store the MAC address configured by host, or generate random one */
1347         if (!rte_is_valid_assigned_ether_addr(
1348                         (struct rte_ether_addr *)hw->mac.addr))
1349                 rte_eth_random_addr(hw->mac.addr); /* Generate a random one */
1350
1351         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1352                        (I40E_ITR_INDEX_DEFAULT <<
1353                         I40E_VFINT_DYN_CTL0_ITR_INDX_SHIFT) |
1354                        (interval <<
1355                         I40E_VFINT_DYN_CTL0_INTERVAL_SHIFT));
1356         I40EVF_WRITE_FLUSH(hw);
1357
1358         return 0;
1359
1360 err_alloc:
1361         rte_free(vf->vf_res);
1362         vf->vsi_res = NULL;
1363 err_api:
1364         rte_free(vf->aq_resp);
1365 err_aq:
1366         i40e_shutdown_adminq(hw); /* ignore error */
1367 err:
1368         return -1;
1369 }
1370
1371 static int
1372 i40evf_uninit_vf(struct rte_eth_dev *dev)
1373 {
1374         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1375
1376         PMD_INIT_FUNC_TRACE();
1377
1378         if (hw->adapter_closed == 0)
1379                 i40evf_dev_close(dev);
1380
1381         return 0;
1382 }
1383
1384 static void
1385 i40evf_handle_pf_event(struct rte_eth_dev *dev, uint8_t *msg,
1386                 __rte_unused uint16_t msglen)
1387 {
1388         struct virtchnl_pf_event *pf_msg =
1389                         (struct virtchnl_pf_event *)msg;
1390         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1391
1392         switch (pf_msg->event) {
1393         case VIRTCHNL_EVENT_RESET_IMPENDING:
1394                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_RESET_IMPENDING event");
1395                 rte_eth_dev_callback_process(dev,
1396                                 RTE_ETH_EVENT_INTR_RESET, NULL);
1397                 break;
1398         case VIRTCHNL_EVENT_LINK_CHANGE:
1399                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_LINK_CHANGE event");
1400
1401                 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_CAP_ADV_LINK_SPEED) {
1402                         vf->link_up =
1403                                 pf_msg->event_data.link_event_adv.link_status;
1404
1405                         switch (pf_msg->event_data.link_event_adv.link_speed) {
1406                         case ETH_SPEED_NUM_100M:
1407                                 vf->link_speed = VIRTCHNL_LINK_SPEED_100MB;
1408                                 break;
1409                         case ETH_SPEED_NUM_1G:
1410                                 vf->link_speed = VIRTCHNL_LINK_SPEED_1GB;
1411                                 break;
1412                         case ETH_SPEED_NUM_2_5G:
1413                                 vf->link_speed = VIRTCHNL_LINK_SPEED_2_5GB;
1414                                 break;
1415                         case ETH_SPEED_NUM_5G:
1416                                 vf->link_speed = VIRTCHNL_LINK_SPEED_5GB;
1417                                 break;
1418                         case ETH_SPEED_NUM_10G:
1419                                 vf->link_speed = VIRTCHNL_LINK_SPEED_10GB;
1420                                 break;
1421                         case ETH_SPEED_NUM_20G:
1422                                 vf->link_speed = VIRTCHNL_LINK_SPEED_20GB;
1423                                 break;
1424                         case ETH_SPEED_NUM_25G:
1425                                 vf->link_speed = VIRTCHNL_LINK_SPEED_25GB;
1426                                 break;
1427                         case ETH_SPEED_NUM_40G:
1428                                 vf->link_speed = VIRTCHNL_LINK_SPEED_40GB;
1429                                 break;
1430                         default:
1431                                 vf->link_speed = VIRTCHNL_LINK_SPEED_UNKNOWN;
1432                                 break;
1433                         }
1434                 } else {
1435                         vf->link_up =
1436                                 pf_msg->event_data.link_event.link_status;
1437                         vf->link_speed =
1438                                 pf_msg->event_data.link_event.link_speed;
1439                 }
1440
1441                 i40evf_dev_link_update(dev, 0);
1442                 rte_eth_dev_callback_process(dev,
1443                                 RTE_ETH_EVENT_INTR_LSC, NULL);
1444                 break;
1445         case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
1446                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_PF_DRIVER_CLOSE event");
1447                 break;
1448         default:
1449                 PMD_DRV_LOG(ERR, " unknown event received %u", pf_msg->event);
1450                 break;
1451         }
1452 }
1453
1454 static void
1455 i40evf_handle_aq_msg(struct rte_eth_dev *dev)
1456 {
1457         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1458         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1459         struct i40e_arq_event_info info;
1460         uint16_t pending, aq_opc;
1461         enum virtchnl_ops msg_opc;
1462         enum i40e_status_code msg_ret;
1463         int ret;
1464
1465         info.buf_len = I40E_AQ_BUF_SZ;
1466         if (!vf->aq_resp) {
1467                 PMD_DRV_LOG(ERR, "Buffer for adminq resp should not be NULL");
1468                 return;
1469         }
1470         info.msg_buf = vf->aq_resp;
1471
1472         pending = 1;
1473         while (pending) {
1474                 ret = i40e_clean_arq_element(hw, &info, &pending);
1475
1476                 if (ret != I40E_SUCCESS) {
1477                         PMD_DRV_LOG(INFO, "Failed to read msg from AdminQ,"
1478                                     "ret: %d", ret);
1479                         break;
1480                 }
1481                 aq_opc = rte_le_to_cpu_16(info.desc.opcode);
1482                 /* For the message sent from pf to vf, opcode is stored in
1483                  * cookie_high of struct i40e_aq_desc, while return error code
1484                  * are stored in cookie_low, Which is done by
1485                  * i40e_aq_send_msg_to_vf in PF driver.*/
1486                 msg_opc = (enum virtchnl_ops)rte_le_to_cpu_32(
1487                                                   info.desc.cookie_high);
1488                 msg_ret = (enum i40e_status_code)rte_le_to_cpu_32(
1489                                                   info.desc.cookie_low);
1490                 switch (aq_opc) {
1491                 case i40e_aqc_opc_send_msg_to_vf:
1492                         if (msg_opc == VIRTCHNL_OP_EVENT)
1493                                 /* process event*/
1494                                 i40evf_handle_pf_event(dev, info.msg_buf,
1495                                                        info.msg_len);
1496                         else {
1497                                 /* read message and it's expected one */
1498                                 if (msg_opc == vf->pend_cmd) {
1499                                         vf->cmd_retval = msg_ret;
1500                                         /* prevent compiler reordering */
1501                                         rte_compiler_barrier();
1502                                         _clear_cmd(vf);
1503                                 } else
1504                                         PMD_DRV_LOG(ERR, "command mismatch,"
1505                                                 "expect %u, get %u",
1506                                                 vf->pend_cmd, msg_opc);
1507                                 PMD_DRV_LOG(DEBUG, "adminq response is received,"
1508                                              " opcode = %d", msg_opc);
1509                         }
1510                         break;
1511                 default:
1512                         PMD_DRV_LOG(DEBUG, "Request %u is not supported yet",
1513                                     aq_opc);
1514                         break;
1515                 }
1516         }
1517 }
1518
1519 /**
1520  * Interrupt handler triggered by NIC  for handling
1521  * specific interrupt. Only adminq interrupt is processed in VF.
1522  *
1523  * @param handle
1524  *  Pointer to interrupt handle.
1525  * @param param
1526  *  The address of parameter (struct rte_eth_dev *) regsitered before.
1527  *
1528  * @return
1529  *  void
1530  */
1531 static void
1532 i40evf_dev_alarm_handler(void *param)
1533 {
1534         struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
1535         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1536         uint32_t icr0;
1537
1538         i40evf_disable_irq0(hw);
1539
1540         /* read out interrupt causes */
1541         icr0 = I40E_READ_REG(hw, I40E_VFINT_ICR01);
1542
1543         /* No interrupt event indicated */
1544         if (!(icr0 & I40E_VFINT_ICR01_INTEVENT_MASK))
1545                 goto done;
1546
1547         if (icr0 & I40E_VFINT_ICR01_ADMINQ_MASK) {
1548                 PMD_DRV_LOG(DEBUG, "ICR01_ADMINQ is reported");
1549                 i40evf_handle_aq_msg(dev);
1550         }
1551
1552         /* Link Status Change interrupt */
1553         if (icr0 & I40E_VFINT_ICR01_LINK_STAT_CHANGE_MASK)
1554                 PMD_DRV_LOG(DEBUG, "LINK_STAT_CHANGE is reported,"
1555                                    " do nothing");
1556
1557 done:
1558         i40evf_enable_irq0(hw);
1559         rte_eal_alarm_set(I40EVF_ALARM_INTERVAL,
1560                           i40evf_dev_alarm_handler, dev);
1561 }
1562
1563 static int
1564 i40evf_dev_init(struct rte_eth_dev *eth_dev)
1565 {
1566         struct i40e_hw *hw
1567                 = I40E_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
1568         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1569
1570         PMD_INIT_FUNC_TRACE();
1571
1572         /* assign ops func pointer */
1573         eth_dev->dev_ops = &i40evf_eth_dev_ops;
1574         eth_dev->rx_queue_count       = i40e_dev_rx_queue_count;
1575         eth_dev->rx_descriptor_done   = i40e_dev_rx_descriptor_done;
1576         eth_dev->rx_descriptor_status = i40e_dev_rx_descriptor_status;
1577         eth_dev->tx_descriptor_status = i40e_dev_tx_descriptor_status;
1578         eth_dev->rx_pkt_burst = &i40e_recv_pkts;
1579         eth_dev->tx_pkt_burst = &i40e_xmit_pkts;
1580
1581         /*
1582          * For secondary processes, we don't initialise any further as primary
1583          * has already done this work.
1584          */
1585         if (rte_eal_process_type() != RTE_PROC_PRIMARY){
1586                 i40e_set_rx_function(eth_dev);
1587                 i40e_set_tx_function(eth_dev);
1588                 return 0;
1589         }
1590         i40e_set_default_ptype_table(eth_dev);
1591         rte_eth_copy_pci_info(eth_dev, pci_dev);
1592         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1593
1594         hw->vendor_id = pci_dev->id.vendor_id;
1595         hw->device_id = pci_dev->id.device_id;
1596         hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
1597         hw->subsystem_device_id = pci_dev->id.subsystem_device_id;
1598         hw->bus.device = pci_dev->addr.devid;
1599         hw->bus.func = pci_dev->addr.function;
1600         hw->hw_addr = (void *)pci_dev->mem_resource[0].addr;
1601         hw->adapter_stopped = 1;
1602         hw->adapter_closed = 0;
1603
1604         if(i40evf_init_vf(eth_dev) != 0) {
1605                 PMD_INIT_LOG(ERR, "Init vf failed");
1606                 return -1;
1607         }
1608
1609         i40e_set_default_pctype_table(eth_dev);
1610         rte_eal_alarm_set(I40EVF_ALARM_INTERVAL,
1611                           i40evf_dev_alarm_handler, eth_dev);
1612
1613         /* configure and enable device interrupt */
1614         i40evf_enable_irq0(hw);
1615
1616         /* copy mac addr */
1617         eth_dev->data->mac_addrs = rte_zmalloc("i40evf_mac",
1618                                 RTE_ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX,
1619                                 0);
1620         if (eth_dev->data->mac_addrs == NULL) {
1621                 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to"
1622                                 " store MAC addresses",
1623                                 RTE_ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX);
1624                 return -ENOMEM;
1625         }
1626         rte_ether_addr_copy((struct rte_ether_addr *)hw->mac.addr,
1627                         &eth_dev->data->mac_addrs[0]);
1628
1629         return 0;
1630 }
1631
1632 static int
1633 i40evf_dev_uninit(struct rte_eth_dev *eth_dev)
1634 {
1635         PMD_INIT_FUNC_TRACE();
1636
1637         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1638                 return -EPERM;
1639
1640         if (i40evf_uninit_vf(eth_dev) != 0) {
1641                 PMD_INIT_LOG(ERR, "i40evf_uninit_vf failed");
1642                 return -1;
1643         }
1644
1645         return 0;
1646 }
1647
1648 static int eth_i40evf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1649         struct rte_pci_device *pci_dev)
1650 {
1651         return rte_eth_dev_pci_generic_probe(pci_dev,
1652                 sizeof(struct i40e_adapter), i40evf_dev_init);
1653 }
1654
1655 static int eth_i40evf_pci_remove(struct rte_pci_device *pci_dev)
1656 {
1657         return rte_eth_dev_pci_generic_remove(pci_dev, i40evf_dev_uninit);
1658 }
1659
1660 /*
1661  * virtual function driver struct
1662  */
1663 static struct rte_pci_driver rte_i40evf_pmd = {
1664         .id_table = pci_id_i40evf_map,
1665         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
1666         .probe = eth_i40evf_pci_probe,
1667         .remove = eth_i40evf_pci_remove,
1668 };
1669
1670 RTE_PMD_REGISTER_PCI(net_i40e_vf, rte_i40evf_pmd);
1671 RTE_PMD_REGISTER_PCI_TABLE(net_i40e_vf, pci_id_i40evf_map);
1672 RTE_PMD_REGISTER_KMOD_DEP(net_i40e_vf, "* igb_uio | vfio-pci");
1673
1674 static int
1675 i40evf_dev_configure(struct rte_eth_dev *dev)
1676 {
1677         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1678         struct i40e_adapter *ad =
1679                 I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1680         uint16_t num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
1681                                 dev->data->nb_tx_queues);
1682
1683         /* Initialize to TRUE. If any of Rx queues doesn't meet the bulk
1684          * allocation or vector Rx preconditions we will reset it.
1685          */
1686         ad->rx_bulk_alloc_allowed = true;
1687         ad->rx_vec_allowed = true;
1688         ad->tx_simple_allowed = true;
1689         ad->tx_vec_allowed = true;
1690
1691         dev->data->dev_conf.intr_conf.lsc =
1692                 !!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC);
1693
1694         if (num_queue_pairs > vf->vsi_res->num_queue_pairs) {
1695                 struct i40e_hw *hw;
1696                 int ret;
1697
1698                 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1699                         PMD_DRV_LOG(ERR,
1700                                     "For secondary processes, change queue pairs is not supported!");
1701                         return -ENOTSUP;
1702                 }
1703
1704                 hw  = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1705                 if (!hw->adapter_stopped) {
1706                         PMD_DRV_LOG(ERR, "Device must be stopped first!");
1707                         return -EBUSY;
1708                 }
1709
1710                 PMD_DRV_LOG(INFO, "change queue pairs from %u to %u",
1711                             vf->vsi_res->num_queue_pairs, num_queue_pairs);
1712                 ret = i40evf_request_queues(dev, num_queue_pairs);
1713                 if (ret != 0)
1714                         return ret;
1715
1716                 ret = i40evf_dev_reset(dev);
1717                 if (ret != 0)
1718                         return ret;
1719         }
1720
1721         return i40evf_init_vlan(dev);
1722 }
1723
1724 static int
1725 i40evf_init_vlan(struct rte_eth_dev *dev)
1726 {
1727         /* Apply vlan offload setting */
1728         i40evf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
1729
1730         return 0;
1731 }
1732
1733 static int
1734 i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1735 {
1736         struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1737         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1738
1739         if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN))
1740                 return -ENOTSUP;
1741
1742         /* Vlan stripping setting */
1743         if (mask & ETH_VLAN_STRIP_MASK) {
1744                 /* Enable or disable VLAN stripping */
1745                 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
1746                         i40evf_enable_vlan_strip(dev);
1747                 else
1748                         i40evf_disable_vlan_strip(dev);
1749         }
1750
1751         return 0;
1752 }
1753
1754 static int
1755 i40evf_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1756 {
1757         struct i40e_rx_queue *rxq;
1758         int err;
1759         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1760
1761         PMD_INIT_FUNC_TRACE();
1762
1763         rxq = dev->data->rx_queues[rx_queue_id];
1764
1765         err = i40e_alloc_rx_queue_mbufs(rxq);
1766         if (err) {
1767                 PMD_DRV_LOG(ERR, "Failed to allocate RX queue mbuf");
1768                 return err;
1769         }
1770
1771         rte_wmb();
1772
1773         /* Init the RX tail register. */
1774         I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1775         I40EVF_WRITE_FLUSH(hw);
1776
1777         /* Ready to switch the queue on */
1778         err = i40evf_switch_queue(dev, TRUE, rx_queue_id, TRUE);
1779         if (err) {
1780                 PMD_DRV_LOG(ERR, "Failed to switch RX queue %u on",
1781                             rx_queue_id);
1782                 return err;
1783         }
1784         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1785
1786         return 0;
1787 }
1788
1789 static int
1790 i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1791 {
1792         struct i40e_rx_queue *rxq;
1793         int err;
1794
1795         rxq = dev->data->rx_queues[rx_queue_id];
1796
1797         err = i40evf_switch_queue(dev, TRUE, rx_queue_id, FALSE);
1798         if (err) {
1799                 PMD_DRV_LOG(ERR, "Failed to switch RX queue %u off",
1800                             rx_queue_id);
1801                 return err;
1802         }
1803
1804         i40e_rx_queue_release_mbufs(rxq);
1805         i40e_reset_rx_queue(rxq);
1806         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1807
1808         return 0;
1809 }
1810
1811 static int
1812 i40evf_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1813 {
1814         int err;
1815
1816         PMD_INIT_FUNC_TRACE();
1817
1818         /* Ready to switch the queue on */
1819         err = i40evf_switch_queue(dev, FALSE, tx_queue_id, TRUE);
1820         if (err) {
1821                 PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on",
1822                             tx_queue_id);
1823                 return err;
1824         }
1825         dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1826
1827         return 0;
1828 }
1829
1830 static int
1831 i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1832 {
1833         struct i40e_tx_queue *txq;
1834         int err;
1835
1836         txq = dev->data->tx_queues[tx_queue_id];
1837
1838         err = i40evf_switch_queue(dev, FALSE, tx_queue_id, FALSE);
1839         if (err) {
1840                 PMD_DRV_LOG(ERR, "Failed to switch TX queue %u off",
1841                             tx_queue_id);
1842                 return err;
1843         }
1844
1845         i40e_tx_queue_release_mbufs(txq);
1846         i40e_reset_tx_queue(txq);
1847         dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1848
1849         return 0;
1850 }
1851
1852 static int
1853 i40evf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1854 {
1855         int ret;
1856
1857         if (on)
1858                 ret = i40evf_add_vlan(dev, vlan_id);
1859         else
1860                 ret = i40evf_del_vlan(dev,vlan_id);
1861
1862         return ret;
1863 }
1864
1865 static int
1866 i40evf_rxq_init(struct rte_eth_dev *dev, struct i40e_rx_queue *rxq)
1867 {
1868         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1869         struct rte_eth_dev_data *dev_data = dev->data;
1870         struct rte_pktmbuf_pool_private *mbp_priv;
1871         uint16_t buf_size, len;
1872
1873         rxq->qrx_tail = hw->hw_addr + I40E_QRX_TAIL1(rxq->queue_id);
1874         I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1875         I40EVF_WRITE_FLUSH(hw);
1876
1877         /* Calculate the maximum packet length allowed */
1878         mbp_priv = rte_mempool_get_priv(rxq->mp);
1879         buf_size = (uint16_t)(mbp_priv->mbuf_data_room_size -
1880                                         RTE_PKTMBUF_HEADROOM);
1881         rxq->hs_mode = i40e_header_split_none;
1882         rxq->rx_hdr_len = 0;
1883         rxq->rx_buf_len = RTE_ALIGN(buf_size, (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
1884         len = rxq->rx_buf_len * I40E_MAX_CHAINED_RX_BUFFERS;
1885         rxq->max_pkt_len = RTE_MIN(len,
1886                 dev_data->dev_conf.rxmode.max_rx_pkt_len);
1887
1888         /**
1889          * Check if the jumbo frame and maximum packet length are set correctly
1890          */
1891         if (dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1892                 if (rxq->max_pkt_len <= RTE_ETHER_MAX_LEN ||
1893                     rxq->max_pkt_len > I40E_FRAME_SIZE_MAX) {
1894                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1895                                 "larger than %u and smaller than %u, as jumbo "
1896                                 "frame is enabled", (uint32_t)RTE_ETHER_MAX_LEN,
1897                                         (uint32_t)I40E_FRAME_SIZE_MAX);
1898                         return I40E_ERR_CONFIG;
1899                 }
1900         } else {
1901                 if (rxq->max_pkt_len < RTE_ETHER_MIN_LEN ||
1902                     rxq->max_pkt_len > RTE_ETHER_MAX_LEN) {
1903                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1904                                 "larger than %u and smaller than %u, as jumbo "
1905                                 "frame is disabled",
1906                                 (uint32_t)RTE_ETHER_MIN_LEN,
1907                                 (uint32_t)RTE_ETHER_MAX_LEN);
1908                         return I40E_ERR_CONFIG;
1909                 }
1910         }
1911
1912         if ((dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_SCATTER) ||
1913             rxq->max_pkt_len > buf_size)
1914                 dev_data->scattered_rx = 1;
1915
1916         return 0;
1917 }
1918
1919 static int
1920 i40evf_rx_init(struct rte_eth_dev *dev)
1921 {
1922         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1923         uint16_t i;
1924         int ret = I40E_SUCCESS;
1925         struct i40e_rx_queue **rxq =
1926                 (struct i40e_rx_queue **)dev->data->rx_queues;
1927
1928         i40evf_config_rss(vf);
1929         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1930                 if (!rxq[i] || !rxq[i]->q_set)
1931                         continue;
1932                 ret = i40evf_rxq_init(dev, rxq[i]);
1933                 if (ret != I40E_SUCCESS)
1934                         break;
1935         }
1936         if (ret == I40E_SUCCESS)
1937                 i40e_set_rx_function(dev);
1938
1939         return ret;
1940 }
1941
1942 static void
1943 i40evf_tx_init(struct rte_eth_dev *dev)
1944 {
1945         uint16_t i;
1946         struct i40e_tx_queue **txq =
1947                 (struct i40e_tx_queue **)dev->data->tx_queues;
1948         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1949
1950         for (i = 0; i < dev->data->nb_tx_queues; i++)
1951                 txq[i]->qtx_tail = hw->hw_addr + I40E_QTX_TAIL1(i);
1952
1953         i40e_set_tx_function(dev);
1954 }
1955
1956 static inline void
1957 i40evf_enable_queues_intr(struct rte_eth_dev *dev)
1958 {
1959         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1960         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1961         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1962
1963         if (!rte_intr_allow_others(intr_handle)) {
1964                 I40E_WRITE_REG(hw,
1965                                I40E_VFINT_DYN_CTL01,
1966                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1967                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1968                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1969                 I40EVF_WRITE_FLUSH(hw);
1970                 return;
1971         }
1972
1973         I40EVF_WRITE_FLUSH(hw);
1974 }
1975
1976 static inline void
1977 i40evf_disable_queues_intr(struct rte_eth_dev *dev)
1978 {
1979         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1980         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1981         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1982
1983         if (!rte_intr_allow_others(intr_handle)) {
1984                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1985                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1986                 I40EVF_WRITE_FLUSH(hw);
1987                 return;
1988         }
1989
1990         I40EVF_WRITE_FLUSH(hw);
1991 }
1992
1993 static int
1994 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
1995 {
1996         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1997         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1998         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1999         uint16_t interval =
2000                 i40e_calc_itr_interval(0, 0);
2001         uint16_t msix_intr;
2002
2003         msix_intr = intr_handle->intr_vec[queue_id];
2004         if (msix_intr == I40E_MISC_VEC_ID)
2005                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
2006                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
2007                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
2008                                (0 << I40E_VFINT_DYN_CTL01_ITR_INDX_SHIFT) |
2009                                (interval <<
2010                                 I40E_VFINT_DYN_CTL01_INTERVAL_SHIFT));
2011         else
2012                 I40E_WRITE_REG(hw,
2013                                I40E_VFINT_DYN_CTLN1(msix_intr -
2014                                                     I40E_RX_VEC_START),
2015                                I40E_VFINT_DYN_CTLN1_INTENA_MASK |
2016                                I40E_VFINT_DYN_CTLN1_CLEARPBA_MASK |
2017                                (0 << I40E_VFINT_DYN_CTLN1_ITR_INDX_SHIFT) |
2018                                (interval <<
2019                                 I40E_VFINT_DYN_CTLN1_INTERVAL_SHIFT));
2020
2021         I40EVF_WRITE_FLUSH(hw);
2022
2023         return 0;
2024 }
2025
2026 static int
2027 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
2028 {
2029         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2030         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2031         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2032         uint16_t msix_intr;
2033
2034         msix_intr = intr_handle->intr_vec[queue_id];
2035         if (msix_intr == I40E_MISC_VEC_ID)
2036                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01, 0);
2037         else
2038                 I40E_WRITE_REG(hw,
2039                                I40E_VFINT_DYN_CTLN1(msix_intr -
2040                                                     I40E_RX_VEC_START),
2041                                0);
2042
2043         I40EVF_WRITE_FLUSH(hw);
2044
2045         return 0;
2046 }
2047
2048 static void
2049 i40evf_add_del_all_mac_addr(struct rte_eth_dev *dev, bool add)
2050 {
2051         struct virtchnl_ether_addr_list *list;
2052         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2053         int err, i, j;
2054         int next_begin = 0;
2055         int begin = 0;
2056         uint32_t len;
2057         struct rte_ether_addr *addr;
2058         struct vf_cmd_info args;
2059
2060         do {
2061                 j = 0;
2062                 len = sizeof(struct virtchnl_ether_addr_list);
2063                 for (i = begin; i < I40E_NUM_MACADDR_MAX; i++, next_begin++) {
2064                         if (rte_is_zero_ether_addr(&dev->data->mac_addrs[i]))
2065                                 continue;
2066                         len += sizeof(struct virtchnl_ether_addr);
2067                         if (len >= I40E_AQ_BUF_SZ) {
2068                                 next_begin = i + 1;
2069                                 break;
2070                         }
2071                 }
2072
2073                 list = rte_zmalloc("i40evf_del_mac_buffer", len, 0);
2074                 if (!list) {
2075                         PMD_DRV_LOG(ERR, "fail to allocate memory");
2076                         return;
2077                 }
2078
2079                 for (i = begin; i < next_begin; i++) {
2080                         addr = &dev->data->mac_addrs[i];
2081                         if (rte_is_zero_ether_addr(addr))
2082                                 continue;
2083                         rte_memcpy(list->list[j].addr, addr->addr_bytes,
2084                                          sizeof(addr->addr_bytes));
2085                         PMD_DRV_LOG(DEBUG, "add/rm mac:%x:%x:%x:%x:%x:%x",
2086                                     addr->addr_bytes[0], addr->addr_bytes[1],
2087                                     addr->addr_bytes[2], addr->addr_bytes[3],
2088                                     addr->addr_bytes[4], addr->addr_bytes[5]);
2089                         j++;
2090                 }
2091                 list->vsi_id = vf->vsi_res->vsi_id;
2092                 list->num_elements = j;
2093                 args.ops = add ? VIRTCHNL_OP_ADD_ETH_ADDR :
2094                            VIRTCHNL_OP_DEL_ETH_ADDR;
2095                 args.in_args = (uint8_t *)list;
2096                 args.in_args_size = len;
2097                 args.out_buffer = vf->aq_resp;
2098                 args.out_size = I40E_AQ_BUF_SZ;
2099                 err = i40evf_execute_vf_cmd(dev, &args);
2100                 if (err) {
2101                         PMD_DRV_LOG(ERR, "fail to execute command %s",
2102                                     add ? "OP_ADD_ETHER_ADDRESS" :
2103                                     "OP_DEL_ETHER_ADDRESS");
2104                 } else {
2105                         if (add)
2106                                 vf->vsi.mac_num++;
2107                         else
2108                                 vf->vsi.mac_num--;
2109                 }
2110                 rte_free(list);
2111                 begin = next_begin;
2112         } while (begin < I40E_NUM_MACADDR_MAX);
2113 }
2114
2115 static int
2116 i40evf_dev_start(struct rte_eth_dev *dev)
2117 {
2118         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2119         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2120         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2121         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2122         uint32_t intr_vector = 0;
2123
2124         PMD_INIT_FUNC_TRACE();
2125
2126         hw->adapter_stopped = 0;
2127
2128         vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
2129         vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
2130                                         dev->data->nb_tx_queues);
2131
2132         /* check and configure queue intr-vector mapping */
2133         if (rte_intr_cap_multiple(intr_handle) &&
2134             dev->data->dev_conf.intr_conf.rxq) {
2135                 intr_vector = dev->data->nb_rx_queues;
2136                 if (rte_intr_efd_enable(intr_handle, intr_vector))
2137                         return -1;
2138         }
2139
2140         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
2141                 intr_handle->intr_vec =
2142                         rte_zmalloc("intr_vec",
2143                                     dev->data->nb_rx_queues * sizeof(int), 0);
2144                 if (!intr_handle->intr_vec) {
2145                         PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
2146                                      " intr_vec", dev->data->nb_rx_queues);
2147                         return -ENOMEM;
2148                 }
2149         }
2150
2151         if (i40evf_rx_init(dev) != 0){
2152                 PMD_DRV_LOG(ERR, "failed to do RX init");
2153                 return -1;
2154         }
2155
2156         i40evf_tx_init(dev);
2157
2158         if (i40evf_configure_vsi_queues(dev) != 0) {
2159                 PMD_DRV_LOG(ERR, "configure queues failed");
2160                 goto err_queue;
2161         }
2162         if (i40evf_config_irq_map(dev)) {
2163                 PMD_DRV_LOG(ERR, "config_irq_map failed");
2164                 goto err_queue;
2165         }
2166
2167         /* Set all mac addrs */
2168         i40evf_add_del_all_mac_addr(dev, TRUE);
2169         /* Set all multicast addresses */
2170         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2171                                 TRUE);
2172
2173         if (i40evf_start_queues(dev) != 0) {
2174                 PMD_DRV_LOG(ERR, "enable queues failed");
2175                 goto err_mac;
2176         }
2177
2178         /* only enable interrupt in rx interrupt mode */
2179         if (dev->data->dev_conf.intr_conf.rxq != 0)
2180                 rte_intr_enable(intr_handle);
2181
2182         i40evf_enable_queues_intr(dev);
2183
2184         return 0;
2185
2186 err_mac:
2187         i40evf_add_del_all_mac_addr(dev, FALSE);
2188         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2189                                 FALSE);
2190 err_queue:
2191         return -1;
2192 }
2193
2194 static int
2195 i40evf_dev_stop(struct rte_eth_dev *dev)
2196 {
2197         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2198         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2199         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2200         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2201
2202         PMD_INIT_FUNC_TRACE();
2203
2204         if (dev->data->dev_conf.intr_conf.rxq != 0)
2205                 rte_intr_disable(intr_handle);
2206
2207         if (hw->adapter_stopped == 1)
2208                 return 0;
2209         i40evf_stop_queues(dev);
2210         i40evf_disable_queues_intr(dev);
2211         i40e_dev_clear_queues(dev);
2212
2213         /* Clean datapath event and queue/vec mapping */
2214         rte_intr_efd_disable(intr_handle);
2215         if (intr_handle->intr_vec) {
2216                 rte_free(intr_handle->intr_vec);
2217                 intr_handle->intr_vec = NULL;
2218         }
2219         /* remove all mac addrs */
2220         i40evf_add_del_all_mac_addr(dev, FALSE);
2221         /* remove all multicast addresses */
2222         i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2223                                 FALSE);
2224         hw->adapter_stopped = 1;
2225         dev->data->dev_started = 0;
2226
2227         return 0;
2228 }
2229
2230 static int
2231 i40evf_dev_link_update(struct rte_eth_dev *dev,
2232                        __rte_unused int wait_to_complete)
2233 {
2234         struct rte_eth_link new_link;
2235         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2236         /*
2237          * DPDK pf host provide interfacet to acquire link status
2238          * while Linux driver does not
2239          */
2240
2241         memset(&new_link, 0, sizeof(new_link));
2242         /* Linux driver PF host */
2243         switch (vf->link_speed) {
2244         case I40E_LINK_SPEED_100MB:
2245                 new_link.link_speed = ETH_SPEED_NUM_100M;
2246                 break;
2247         case I40E_LINK_SPEED_1GB:
2248                 new_link.link_speed = ETH_SPEED_NUM_1G;
2249                 break;
2250         case I40E_LINK_SPEED_10GB:
2251                 new_link.link_speed = ETH_SPEED_NUM_10G;
2252                 break;
2253         case I40E_LINK_SPEED_20GB:
2254                 new_link.link_speed = ETH_SPEED_NUM_20G;
2255                 break;
2256         case I40E_LINK_SPEED_25GB:
2257                 new_link.link_speed = ETH_SPEED_NUM_25G;
2258                 break;
2259         case I40E_LINK_SPEED_40GB:
2260                 new_link.link_speed = ETH_SPEED_NUM_40G;
2261                 break;
2262         default:
2263                 if (vf->link_up)
2264                         new_link.link_speed = ETH_SPEED_NUM_UNKNOWN;
2265                 else
2266                         new_link.link_speed = ETH_SPEED_NUM_NONE;
2267                 break;
2268         }
2269         /* full duplex only */
2270         new_link.link_duplex = ETH_LINK_FULL_DUPLEX;
2271         new_link.link_status = vf->link_up ? ETH_LINK_UP : ETH_LINK_DOWN;
2272         new_link.link_autoneg =
2273                 !(dev->data->dev_conf.link_speeds & ETH_LINK_SPEED_FIXED);
2274
2275         return rte_eth_linkstatus_set(dev, &new_link);
2276 }
2277
2278 static int
2279 i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev)
2280 {
2281         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2282
2283         return i40evf_config_promisc(dev, true, vf->promisc_multicast_enabled);
2284 }
2285
2286 static int
2287 i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev)
2288 {
2289         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2290
2291         return i40evf_config_promisc(dev, false, vf->promisc_multicast_enabled);
2292 }
2293
2294 static int
2295 i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev)
2296 {
2297         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2298
2299         return i40evf_config_promisc(dev, vf->promisc_unicast_enabled, true);
2300 }
2301
2302 static int
2303 i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev)
2304 {
2305         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2306
2307         return i40evf_config_promisc(dev, vf->promisc_unicast_enabled, false);
2308 }
2309
2310 static int
2311 i40evf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
2312 {
2313         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2314
2315         dev_info->max_rx_queues = I40E_MAX_QP_NUM_PER_VF;
2316         dev_info->max_tx_queues = I40E_MAX_QP_NUM_PER_VF;
2317         dev_info->min_rx_bufsize = I40E_BUF_SIZE_MIN;
2318         dev_info->max_rx_pktlen = I40E_FRAME_SIZE_MAX;
2319         dev_info->max_mtu = dev_info->max_rx_pktlen - I40E_ETH_OVERHEAD;
2320         dev_info->min_mtu = RTE_ETHER_MIN_MTU;
2321         dev_info->hash_key_size = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2322         dev_info->reta_size = ETH_RSS_RETA_SIZE_64;
2323         dev_info->flow_type_rss_offloads = vf->adapter->flow_types_mask;
2324         dev_info->max_mac_addrs = I40E_NUM_MACADDR_MAX;
2325         dev_info->rx_queue_offload_capa = 0;
2326         dev_info->rx_offload_capa =
2327                 DEV_RX_OFFLOAD_VLAN_STRIP |
2328                 DEV_RX_OFFLOAD_QINQ_STRIP |
2329                 DEV_RX_OFFLOAD_IPV4_CKSUM |
2330                 DEV_RX_OFFLOAD_UDP_CKSUM |
2331                 DEV_RX_OFFLOAD_TCP_CKSUM |
2332                 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
2333                 DEV_RX_OFFLOAD_SCATTER |
2334                 DEV_RX_OFFLOAD_JUMBO_FRAME |
2335                 DEV_RX_OFFLOAD_VLAN_FILTER;
2336
2337         dev_info->tx_queue_offload_capa = 0;
2338         dev_info->tx_offload_capa =
2339                 DEV_TX_OFFLOAD_VLAN_INSERT |
2340                 DEV_TX_OFFLOAD_QINQ_INSERT |
2341                 DEV_TX_OFFLOAD_IPV4_CKSUM |
2342                 DEV_TX_OFFLOAD_UDP_CKSUM |
2343                 DEV_TX_OFFLOAD_TCP_CKSUM |
2344                 DEV_TX_OFFLOAD_SCTP_CKSUM |
2345                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
2346                 DEV_TX_OFFLOAD_TCP_TSO |
2347                 DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
2348                 DEV_TX_OFFLOAD_GRE_TNL_TSO |
2349                 DEV_TX_OFFLOAD_IPIP_TNL_TSO |
2350                 DEV_TX_OFFLOAD_GENEVE_TNL_TSO |
2351                 DEV_TX_OFFLOAD_MULTI_SEGS;
2352
2353         dev_info->default_rxconf = (struct rte_eth_rxconf) {
2354                 .rx_thresh = {
2355                         .pthresh = I40E_DEFAULT_RX_PTHRESH,
2356                         .hthresh = I40E_DEFAULT_RX_HTHRESH,
2357                         .wthresh = I40E_DEFAULT_RX_WTHRESH,
2358                 },
2359                 .rx_free_thresh = I40E_DEFAULT_RX_FREE_THRESH,
2360                 .rx_drop_en = 0,
2361                 .offloads = 0,
2362         };
2363
2364         dev_info->default_txconf = (struct rte_eth_txconf) {
2365                 .tx_thresh = {
2366                         .pthresh = I40E_DEFAULT_TX_PTHRESH,
2367                         .hthresh = I40E_DEFAULT_TX_HTHRESH,
2368                         .wthresh = I40E_DEFAULT_TX_WTHRESH,
2369                 },
2370                 .tx_free_thresh = I40E_DEFAULT_TX_FREE_THRESH,
2371                 .tx_rs_thresh = I40E_DEFAULT_TX_RSBIT_THRESH,
2372                 .offloads = 0,
2373         };
2374
2375         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
2376                 .nb_max = I40E_MAX_RING_DESC,
2377                 .nb_min = I40E_MIN_RING_DESC,
2378                 .nb_align = I40E_ALIGN_RING_DESC,
2379         };
2380
2381         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
2382                 .nb_max = I40E_MAX_RING_DESC,
2383                 .nb_min = I40E_MIN_RING_DESC,
2384                 .nb_align = I40E_ALIGN_RING_DESC,
2385         };
2386
2387         return 0;
2388 }
2389
2390 static int
2391 i40evf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
2392 {
2393         int ret;
2394         struct i40e_eth_stats *pstats = NULL;
2395         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2396         struct i40e_vsi *vsi = &vf->vsi;
2397
2398         ret = i40evf_query_stats(dev, &pstats);
2399         if (ret == 0) {
2400                 i40evf_update_stats(vsi, pstats);
2401
2402                 stats->ipackets = pstats->rx_unicast + pstats->rx_multicast +
2403                                                 pstats->rx_broadcast;
2404                 stats->opackets = pstats->tx_broadcast + pstats->tx_multicast +
2405                                                 pstats->tx_unicast;
2406                 stats->imissed = pstats->rx_discards;
2407                 stats->oerrors = pstats->tx_errors + pstats->tx_discards;
2408                 stats->ibytes = pstats->rx_bytes;
2409                 stats->obytes = pstats->tx_bytes;
2410         } else {
2411                 PMD_DRV_LOG(ERR, "Get statistics failed");
2412         }
2413         return ret;
2414 }
2415
2416 static int
2417 i40evf_dev_close(struct rte_eth_dev *dev)
2418 {
2419         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2420         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2421         int ret;
2422
2423         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2424                 return 0;
2425
2426         ret = i40evf_dev_stop(dev);
2427
2428         i40e_dev_free_queues(dev);
2429         /*
2430          * disable promiscuous mode before reset vf
2431          * it is a workaround solution when work with kernel driver
2432          * and it is not the normal way
2433          */
2434         if (vf->promisc_unicast_enabled || vf->promisc_multicast_enabled)
2435                 i40evf_config_promisc(dev, false, false);
2436
2437         rte_eal_alarm_cancel(i40evf_dev_alarm_handler, dev);
2438
2439         i40evf_reset_vf(dev);
2440         i40e_shutdown_adminq(hw);
2441         i40evf_disable_irq0(hw);
2442
2443         rte_free(vf->vf_res);
2444         vf->vf_res = NULL;
2445         rte_free(vf->aq_resp);
2446         vf->aq_resp = NULL;
2447
2448         hw->adapter_closed = 1;
2449         return ret;
2450 }
2451
2452 /*
2453  * Reset VF device only to re-initialize resources in PMD layer
2454  */
2455 static int
2456 i40evf_dev_reset(struct rte_eth_dev *dev)
2457 {
2458         int ret;
2459
2460         ret = i40evf_dev_uninit(dev);
2461         if (ret)
2462                 return ret;
2463
2464         ret = i40evf_dev_init(dev);
2465
2466         return ret;
2467 }
2468
2469 static int
2470 i40evf_get_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2471 {
2472         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2473         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2474         int ret;
2475
2476         if (!lut)
2477                 return -EINVAL;
2478
2479         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2480                 ret = i40e_aq_get_rss_lut(hw, vsi->vsi_id, FALSE,
2481                                           lut, lut_size);
2482                 if (ret) {
2483                         PMD_DRV_LOG(ERR, "Failed to get RSS lookup table");
2484                         return ret;
2485                 }
2486         } else {
2487                 uint32_t *lut_dw = (uint32_t *)lut;
2488                 uint16_t i, lut_size_dw = lut_size / 4;
2489
2490                 for (i = 0; i < lut_size_dw; i++)
2491                         lut_dw[i] = I40E_READ_REG(hw, I40E_VFQF_HLUT(i));
2492         }
2493
2494         return 0;
2495 }
2496
2497 static int
2498 i40evf_set_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2499 {
2500         struct i40e_vf *vf;
2501         struct i40e_hw *hw;
2502         int ret;
2503
2504         if (!vsi || !lut)
2505                 return -EINVAL;
2506
2507         vf = I40E_VSI_TO_VF(vsi);
2508         hw = I40E_VSI_TO_HW(vsi);
2509
2510         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2511                 ret = i40e_aq_set_rss_lut(hw, vsi->vsi_id, FALSE,
2512                                           lut, lut_size);
2513                 if (ret) {
2514                         PMD_DRV_LOG(ERR, "Failed to set RSS lookup table");
2515                         return ret;
2516                 }
2517         } else {
2518                 uint32_t *lut_dw = (uint32_t *)lut;
2519                 uint16_t i, lut_size_dw = lut_size / 4;
2520
2521                 for (i = 0; i < lut_size_dw; i++)
2522                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i), lut_dw[i]);
2523                 I40EVF_WRITE_FLUSH(hw);
2524         }
2525
2526         return 0;
2527 }
2528
2529 static int
2530 i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
2531                            struct rte_eth_rss_reta_entry64 *reta_conf,
2532                            uint16_t reta_size)
2533 {
2534         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2535         uint8_t *lut;
2536         uint16_t i, idx, shift;
2537         int ret;
2538
2539         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2540                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2541                         "(%d) doesn't match the number of hardware can "
2542                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2543                 return -EINVAL;
2544         }
2545
2546         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2547         if (!lut) {
2548                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2549                 return -ENOMEM;
2550         }
2551         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2552         if (ret)
2553                 goto out;
2554         for (i = 0; i < reta_size; i++) {
2555                 idx = i / RTE_RETA_GROUP_SIZE;
2556                 shift = i % RTE_RETA_GROUP_SIZE;
2557                 if (reta_conf[idx].mask & (1ULL << shift))
2558                         lut[i] = reta_conf[idx].reta[shift];
2559         }
2560         ret = i40evf_set_rss_lut(&vf->vsi, lut, reta_size);
2561
2562 out:
2563         rte_free(lut);
2564
2565         return ret;
2566 }
2567
2568 static int
2569 i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
2570                           struct rte_eth_rss_reta_entry64 *reta_conf,
2571                           uint16_t reta_size)
2572 {
2573         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2574         uint16_t i, idx, shift;
2575         uint8_t *lut;
2576         int ret;
2577
2578         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2579                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2580                         "(%d) doesn't match the number of hardware can "
2581                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2582                 return -EINVAL;
2583         }
2584
2585         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2586         if (!lut) {
2587                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2588                 return -ENOMEM;
2589         }
2590
2591         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2592         if (ret)
2593                 goto out;
2594         for (i = 0; i < reta_size; i++) {
2595                 idx = i / RTE_RETA_GROUP_SIZE;
2596                 shift = i % RTE_RETA_GROUP_SIZE;
2597                 if (reta_conf[idx].mask & (1ULL << shift))
2598                         reta_conf[idx].reta[shift] = lut[i];
2599         }
2600
2601 out:
2602         rte_free(lut);
2603
2604         return ret;
2605 }
2606
2607 static int
2608 i40evf_set_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t key_len)
2609 {
2610         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2611         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2612         int ret = 0;
2613
2614         if (!key || key_len == 0) {
2615                 PMD_DRV_LOG(DEBUG, "No key to be configured");
2616                 return 0;
2617         } else if (key_len != (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2618                 sizeof(uint32_t)) {
2619                 PMD_DRV_LOG(ERR, "Invalid key length %u", key_len);
2620                 return -EINVAL;
2621         }
2622
2623         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2624                 struct i40e_aqc_get_set_rss_key_data *key_dw =
2625                         (struct i40e_aqc_get_set_rss_key_data *)key;
2626
2627                 ret = i40e_aq_set_rss_key(hw, vsi->vsi_id, key_dw);
2628                 if (ret)
2629                         PMD_INIT_LOG(ERR, "Failed to configure RSS key "
2630                                      "via AQ");
2631         } else {
2632                 uint32_t *hash_key = (uint32_t *)key;
2633                 uint16_t i;
2634
2635                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2636                         i40e_write_rx_ctl(hw, I40E_VFQF_HKEY(i), hash_key[i]);
2637                 I40EVF_WRITE_FLUSH(hw);
2638         }
2639
2640         return ret;
2641 }
2642
2643 static int
2644 i40evf_get_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t *key_len)
2645 {
2646         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2647         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2648         int ret;
2649
2650         if (!key || !key_len)
2651                 return -EINVAL;
2652
2653         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2654                 ret = i40e_aq_get_rss_key(hw, vsi->vsi_id,
2655                         (struct i40e_aqc_get_set_rss_key_data *)key);
2656                 if (ret) {
2657                         PMD_INIT_LOG(ERR, "Failed to get RSS key via AQ");
2658                         return ret;
2659                 }
2660         } else {
2661                 uint32_t *key_dw = (uint32_t *)key;
2662                 uint16_t i;
2663
2664                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2665                         key_dw[i] = i40e_read_rx_ctl(hw, I40E_VFQF_HKEY(i));
2666         }
2667         *key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2668
2669         return 0;
2670 }
2671
2672 static int
2673 i40evf_hw_rss_hash_set(struct i40e_vf *vf, struct rte_eth_rss_conf *rss_conf)
2674 {
2675         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2676         uint64_t hena;
2677         int ret;
2678
2679         ret = i40evf_set_rss_key(&vf->vsi, rss_conf->rss_key,
2680                                  rss_conf->rss_key_len);
2681         if (ret)
2682                 return ret;
2683
2684         hena = i40e_config_hena(vf->adapter, rss_conf->rss_hf);
2685         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
2686         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
2687         I40EVF_WRITE_FLUSH(hw);
2688
2689         return 0;
2690 }
2691
2692 static void
2693 i40evf_disable_rss(struct i40e_vf *vf)
2694 {
2695         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2696
2697         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), 0);
2698         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), 0);
2699         I40EVF_WRITE_FLUSH(hw);
2700 }
2701
2702 static int
2703 i40evf_config_rss(struct i40e_vf *vf)
2704 {
2705         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2706         struct rte_eth_rss_conf rss_conf;
2707         uint32_t i, j, lut = 0, nb_q = (I40E_VFQF_HLUT_MAX_INDEX + 1) * 4;
2708         uint32_t rss_lut_size = (I40E_VFQF_HLUT1_MAX_INDEX + 1) * 4;
2709         uint16_t num;
2710         uint8_t *lut_info;
2711         int ret;
2712
2713         if (vf->dev_data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
2714                 i40evf_disable_rss(vf);
2715                 PMD_DRV_LOG(DEBUG, "RSS not configured");
2716                 return 0;
2717         }
2718
2719         num = RTE_MIN(vf->dev_data->nb_rx_queues, I40E_MAX_QP_NUM_PER_VF);
2720         /* Fill out the look up table */
2721         if (!(vf->flags & I40E_FLAG_RSS_AQ_CAPABLE)) {
2722                 for (i = 0, j = 0; i < nb_q; i++, j++) {
2723                         if (j >= num)
2724                                 j = 0;
2725                         lut = (lut << 8) | j;
2726                         if ((i & 3) == 3)
2727                                 I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
2728                 }
2729         } else {
2730                 lut_info = rte_zmalloc("i40e_rss_lut", rss_lut_size, 0);
2731                 if (!lut_info) {
2732                         PMD_DRV_LOG(ERR, "No memory can be allocated");
2733                         return -ENOMEM;
2734                 }
2735
2736                 for (i = 0; i < rss_lut_size; i++)
2737                         lut_info[i] = i % vf->num_queue_pairs;
2738
2739                 ret = i40evf_set_rss_lut(&vf->vsi, lut_info,
2740                                          rss_lut_size);
2741                 rte_free(lut_info);
2742                 if (ret)
2743                         return ret;
2744         }
2745
2746         rss_conf = vf->dev_data->dev_conf.rx_adv_conf.rss_conf;
2747         if ((rss_conf.rss_hf & vf->adapter->flow_types_mask) == 0) {
2748                 i40evf_disable_rss(vf);
2749                 PMD_DRV_LOG(DEBUG, "No hash flag is set");
2750                 return 0;
2751         }
2752
2753         if (rss_conf.rss_key == NULL || rss_conf.rss_key_len <
2754                 (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t)) {
2755                 /* Calculate the default hash key */
2756                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2757                         rss_key_default[i] = (uint32_t)rte_rand();
2758                 rss_conf.rss_key = (uint8_t *)rss_key_default;
2759                 rss_conf.rss_key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2760                         sizeof(uint32_t);
2761         }
2762
2763         return i40evf_hw_rss_hash_set(vf, &rss_conf);
2764 }
2765
2766 static int
2767 i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
2768                            struct rte_eth_rss_conf *rss_conf)
2769 {
2770         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2771         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2772         uint64_t rss_hf = rss_conf->rss_hf & vf->adapter->flow_types_mask;
2773         uint64_t hena;
2774
2775         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2776         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2777
2778         if (!(hena & vf->adapter->pctypes_mask)) { /* RSS disabled */
2779                 if (rss_hf != 0) /* Enable RSS */
2780                         return -EINVAL;
2781                 return 0;
2782         }
2783
2784         /* RSS enabled */
2785         if (rss_hf == 0) /* Disable RSS */
2786                 return -EINVAL;
2787
2788         return i40evf_hw_rss_hash_set(vf, rss_conf);
2789 }
2790
2791 static int
2792 i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
2793                              struct rte_eth_rss_conf *rss_conf)
2794 {
2795         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2796         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2797         uint64_t hena;
2798
2799         i40evf_get_rss_key(&vf->vsi, rss_conf->rss_key,
2800                            &rss_conf->rss_key_len);
2801
2802         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2803         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2804         rss_conf->rss_hf = i40e_parse_hena(vf->adapter, hena);
2805
2806         return 0;
2807 }
2808
2809 static int
2810 i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
2811 {
2812         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2813         struct rte_eth_dev_data *dev_data = vf->dev_data;
2814         uint32_t frame_size = mtu + I40E_ETH_OVERHEAD;
2815         int ret = 0;
2816
2817         /* check if mtu is within the allowed range */
2818         if (mtu < RTE_ETHER_MIN_MTU || frame_size > I40E_FRAME_SIZE_MAX)
2819                 return -EINVAL;
2820
2821         /* mtu setting is forbidden if port is start */
2822         if (dev_data->dev_started) {
2823                 PMD_DRV_LOG(ERR, "port %d must be stopped before configuration",
2824                             dev_data->port_id);
2825                 return -EBUSY;
2826         }
2827
2828         if (frame_size > RTE_ETHER_MAX_LEN)
2829                 dev_data->dev_conf.rxmode.offloads |=
2830                         DEV_RX_OFFLOAD_JUMBO_FRAME;
2831         else
2832                 dev_data->dev_conf.rxmode.offloads &=
2833                         ~DEV_RX_OFFLOAD_JUMBO_FRAME;
2834         dev_data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
2835
2836         return ret;
2837 }
2838
2839 static int
2840 i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
2841                             struct rte_ether_addr *mac_addr)
2842 {
2843         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2844
2845         if (!rte_is_valid_assigned_ether_addr(mac_addr)) {
2846                 PMD_DRV_LOG(ERR, "Tried to set invalid MAC address.");
2847                 return -EINVAL;
2848         }
2849
2850         i40evf_del_mac_addr_by_addr(dev, (struct rte_ether_addr *)hw->mac.addr);
2851
2852         if (i40evf_add_mac_addr(dev, mac_addr, 0, 0) != 0)
2853                 return -EIO;
2854
2855         rte_ether_addr_copy(mac_addr, (struct rte_ether_addr *)hw->mac.addr);
2856         return 0;
2857 }
2858
2859 static int
2860 i40evf_add_del_mc_addr_list(struct rte_eth_dev *dev,
2861                         struct rte_ether_addr *mc_addrs,
2862                         uint32_t mc_addrs_num, bool add)
2863 {
2864         struct virtchnl_ether_addr_list *list;
2865         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2866         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) +
2867                 (I40E_NUM_MACADDR_MAX * sizeof(struct virtchnl_ether_addr))];
2868         uint32_t i;
2869         int err;
2870         struct vf_cmd_info args;
2871
2872         if (mc_addrs == NULL || mc_addrs_num == 0)
2873                 return 0;
2874
2875         if (mc_addrs_num > I40E_NUM_MACADDR_MAX)
2876                 return -EINVAL;
2877
2878         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
2879         list->vsi_id = vf->vsi_res->vsi_id;
2880         list->num_elements = mc_addrs_num;
2881
2882         for (i = 0; i < mc_addrs_num; i++) {
2883                 if (!I40E_IS_MULTICAST(mc_addrs[i].addr_bytes)) {
2884                         PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
2885                                     mc_addrs[i].addr_bytes[0],
2886                                     mc_addrs[i].addr_bytes[1],
2887                                     mc_addrs[i].addr_bytes[2],
2888                                     mc_addrs[i].addr_bytes[3],
2889                                     mc_addrs[i].addr_bytes[4],
2890                                     mc_addrs[i].addr_bytes[5]);
2891                         return -EINVAL;
2892                 }
2893
2894                 memcpy(list->list[i].addr, mc_addrs[i].addr_bytes,
2895                         sizeof(list->list[i].addr));
2896         }
2897
2898         args.ops = add ? VIRTCHNL_OP_ADD_ETH_ADDR : VIRTCHNL_OP_DEL_ETH_ADDR;
2899         args.in_args = cmd_buffer;
2900         args.in_args_size = sizeof(struct virtchnl_ether_addr_list) +
2901                 i * sizeof(struct virtchnl_ether_addr);
2902         args.out_buffer = vf->aq_resp;
2903         args.out_size = I40E_AQ_BUF_SZ;
2904         err = i40evf_execute_vf_cmd(dev, &args);
2905         if (err) {
2906                 PMD_DRV_LOG(ERR, "fail to execute command %s",
2907                         add ? "OP_ADD_ETH_ADDR" : "OP_DEL_ETH_ADDR");
2908                 return err;
2909         }
2910
2911         return 0;
2912 }
2913
2914 static int
2915 i40evf_set_mc_addr_list(struct rte_eth_dev *dev,
2916                         struct rte_ether_addr *mc_addrs,
2917                         uint32_t mc_addrs_num)
2918 {
2919         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2920         int err;
2921
2922         /* flush previous addresses */
2923         err = i40evf_add_del_mc_addr_list(dev, vf->mc_addrs, vf->mc_addrs_num,
2924                                 FALSE);
2925         if (err)
2926                 return err;
2927
2928         vf->mc_addrs_num = 0;
2929
2930         /* add new ones */
2931         err = i40evf_add_del_mc_addr_list(dev, mc_addrs, mc_addrs_num,
2932                                         TRUE);
2933         if (err)
2934                 return err;
2935
2936         vf->mc_addrs_num = mc_addrs_num;
2937         memcpy(vf->mc_addrs, mc_addrs, mc_addrs_num * sizeof(*mc_addrs));
2938
2939         return 0;
2940 }
2941
2942 bool
2943 is_i40evf_supported(struct rte_eth_dev *dev)
2944 {
2945         return is_device_supported(dev, &rte_i40evf_pmd);
2946 }