drivers/net/i40e/i40e_pf.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2010-2017 Intel Corporation
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdio.h>
   7 #include <errno.h>
   8 #include <stdint.h>
   9 #include <string.h>
  10 #include <unistd.h>
  11 #include <stdarg.h>
  12 #include <inttypes.h>
  13
  14 #include <rte_string_fns.h>
  15 #include <rte_pci.h>
  16 #include <rte_ether.h>
  17 #include <ethdev_driver.h>
  18 #include <rte_malloc.h>
  19 #include <rte_memcpy.h>
  20
  21 #include "i40e_logs.h"
  22 #include "base/i40e_prototype.h"
  23 #include "base/i40e_adminq_cmd.h"
  24 #include "base/i40e_type.h"
  25 #include "i40e_ethdev.h"
  26 #include "i40e_rxtx.h"
  27 #include "i40e_pf.h"
  28 #include "rte_pmd_i40e.h"
  29
  30 #define I40E_CFG_CRCSTRIP_DEFAULT 1
  31
  32 static int
  33 i40e_pf_host_switch_queues(struct i40e_pf_vf *vf,
  34                            struct virtchnl_queue_select *qsel,
  35                            bool on);
  36
  37 /**
  38  * Bind PF queues with VSI and VF.
  39  **/
  40 static int
  41 i40e_pf_vf_queues_mapping(struct i40e_pf_vf *vf)
  42 {
  43         int i;
  44         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
  45         uint16_t vsi_id = vf->vsi->vsi_id;
  46         uint16_t vf_id  = vf->vf_idx;
  47         uint16_t nb_qps = vf->vsi->nb_qps;
  48         uint16_t qbase  = vf->vsi->base_queue;
  49         uint16_t q1, q2;
  50         uint32_t val;
  51
  52         /*
  53          * VF should use scatter range queues. So, it needn't
  54          * to set QBASE in this register.
  55          */
  56         i40e_write_rx_ctl(hw, I40E_VSILAN_QBASE(vsi_id),
  57                           I40E_VSILAN_QBASE_VSIQTABLE_ENA_MASK);
  58
  59         /* Set to enable VFLAN_QTABLE[] registers valid */
  60         I40E_WRITE_REG(hw, I40E_VPLAN_MAPENA(vf_id),
  61                 I40E_VPLAN_MAPENA_TXRX_ENA_MASK);
  62
  63         /* map PF queues to VF */
  64         for (i = 0; i < nb_qps; i++) {
  65                 val = ((qbase + i) & I40E_VPLAN_QTABLE_QINDEX_MASK);
  66                 I40E_WRITE_REG(hw, I40E_VPLAN_QTABLE(i, vf_id), val);
  67         }
  68
  69         /* map PF queues to VSI */
  70         for (i = 0; i < I40E_MAX_QP_NUM_PER_VF / 2; i++) {
  71                 if (2 * i > nb_qps - 1)
  72                         q1 = I40E_VSILAN_QTABLE_QINDEX_0_MASK;
  73                 else
  74                         q1 = qbase + 2 * i;
  75
  76                 if (2 * i + 1 > nb_qps - 1)
  77                         q2 = I40E_VSILAN_QTABLE_QINDEX_0_MASK;
  78                 else
  79                         q2 = qbase + 2 * i + 1;
  80
  81                 val = (q2 << I40E_VSILAN_QTABLE_QINDEX_1_SHIFT) + q1;
  82                 i40e_write_rx_ctl(hw, I40E_VSILAN_QTABLE(i, vsi_id), val);
  83         }
  84         I40E_WRITE_FLUSH(hw);
  85
  86         return I40E_SUCCESS;
  87 }
  88
  89
  90 /**
  91  * Proceed VF reset operation.
  92  */
  93 int
  94 i40e_pf_host_vf_reset(struct i40e_pf_vf *vf, bool do_hw_reset)
  95 {
  96         uint32_t val, i;
  97         struct i40e_hw *hw;
  98         struct i40e_pf *pf;
  99         uint16_t vf_id, abs_vf_id, vf_msix_num;
 100         int ret;
 101         struct virtchnl_queue_select qsel;
 102
 103         if (vf == NULL)
 104                 return -EINVAL;
 105
 106         pf = vf->pf;
 107         hw = I40E_PF_TO_HW(vf->pf);
 108         vf_id = vf->vf_idx;
 109         abs_vf_id = vf_id + hw->func_caps.vf_base_id;
 110
 111         /* Notify VF that we are in VFR progress */
 112         I40E_WRITE_REG(hw, I40E_VFGEN_RSTAT1(vf_id), VIRTCHNL_VFR_INPROGRESS);
 113
 114         /*
 115          * If require a SW VF reset, a VFLR interrupt will be generated,
 116          * this function will be called again. To avoid it,
 117          * disable interrupt first.
 118          */
 119         if (do_hw_reset) {
 120                 vf->state = I40E_VF_INRESET;
 121                 val = I40E_READ_REG(hw, I40E_VPGEN_VFRTRIG(vf_id));
 122                 val |= I40E_VPGEN_VFRTRIG_VFSWR_MASK;
 123                 I40E_WRITE_REG(hw, I40E_VPGEN_VFRTRIG(vf_id), val);
 124                 I40E_WRITE_FLUSH(hw);
 125         }
 126
 127 #define VFRESET_MAX_WAIT_CNT 100
 128         /* Wait until VF reset is done */
 129         for (i = 0; i < VFRESET_MAX_WAIT_CNT; i++) {
 130                 rte_delay_us(10);
 131                 val = I40E_READ_REG(hw, I40E_VPGEN_VFRSTAT(vf_id));
 132                 if (val & I40E_VPGEN_VFRSTAT_VFRD_MASK)
 133                         break;
 134         }
 135
 136         if (i >= VFRESET_MAX_WAIT_CNT) {
 137                 PMD_DRV_LOG(ERR, "VF reset timeout");
 138                 return -ETIMEDOUT;
 139         }
 140         /* This is not first time to do reset, do cleanup job first */
 141         if (vf->vsi) {
 142                 /* Disable queues */
 143                 memset(&qsel, 0, sizeof(qsel));
 144                 for (i = 0; i < vf->vsi->nb_qps; i++)
 145                         qsel.rx_queues |= 1 << i;
 146                 qsel.tx_queues = qsel.rx_queues;
 147                 ret = i40e_pf_host_switch_queues(vf, &qsel, false);
 148                 if (ret != I40E_SUCCESS) {
 149                         PMD_DRV_LOG(ERR, "Disable VF queues failed");
 150                         return -EFAULT;
 151                 }
 152
 153                 /* Disable VF interrupt setting */
 154                 vf_msix_num = hw->func_caps.num_msix_vectors_vf;
 155                 for (i = 0; i < vf_msix_num; i++) {
 156                         if (!i)
 157                                 val = I40E_VFINT_DYN_CTL0(vf_id);
 158                         else
 159                                 val = I40E_VFINT_DYN_CTLN(((vf_msix_num - 1) *
 160                                                         (vf_id)) + (i - 1));
 161                         I40E_WRITE_REG(hw, val, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
 162                 }
 163                 I40E_WRITE_FLUSH(hw);
 164
 165                 /* remove VSI */
 166                 ret = i40e_vsi_release(vf->vsi);
 167                 if (ret != I40E_SUCCESS) {
 168                         PMD_DRV_LOG(ERR, "Release VSI failed");
 169                         return -EFAULT;
 170                 }
 171         }
 172
 173 #define I40E_VF_PCI_ADDR  0xAA
 174 #define I40E_VF_PEND_MASK 0x20
 175         /* Check the pending transactions of this VF */
 176         /* Use absolute VF id, refer to datasheet for details */
 177         I40E_WRITE_REG(hw, I40E_PF_PCI_CIAA, I40E_VF_PCI_ADDR |
 178                 (abs_vf_id << I40E_PF_PCI_CIAA_VF_NUM_SHIFT));
 179         for (i = 0; i < VFRESET_MAX_WAIT_CNT; i++) {
 180                 rte_delay_us(1);
 181                 val = I40E_READ_REG(hw, I40E_PF_PCI_CIAD);
 182                 if ((val & I40E_VF_PEND_MASK) == 0)
 183                         break;
 184         }
 185
 186         if (i >= VFRESET_MAX_WAIT_CNT) {
 187                 PMD_DRV_LOG(ERR, "Wait VF PCI transaction end timeout");
 188                 return -ETIMEDOUT;
 189         }
 190
 191         /* Reset done, Set COMPLETE flag and clear reset bit */
 192         I40E_WRITE_REG(hw, I40E_VFGEN_RSTAT1(vf_id), VIRTCHNL_VFR_COMPLETED);
 193         val = I40E_READ_REG(hw, I40E_VPGEN_VFRTRIG(vf_id));
 194         val &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK;
 195         I40E_WRITE_REG(hw, I40E_VPGEN_VFRTRIG(vf_id), val);
 196         vf->reset_cnt++;
 197         I40E_WRITE_FLUSH(hw);
 198
 199         /* Allocate resource again */
 200         if (pf->floating_veb && pf->floating_veb_list[vf_id]) {
 201                 vf->vsi = i40e_vsi_setup(vf->pf, I40E_VSI_SRIOV,
 202                                          NULL, vf->vf_idx);
 203         } else {
 204                 vf->vsi = i40e_vsi_setup(vf->pf, I40E_VSI_SRIOV,
 205                                          vf->pf->main_vsi, vf->vf_idx);
 206         }
 207
 208         if (vf->vsi == NULL) {
 209                 PMD_DRV_LOG(ERR, "Add vsi failed");
 210                 return -EFAULT;
 211         }
 212
 213         ret = i40e_pf_vf_queues_mapping(vf);
 214         if (ret != I40E_SUCCESS) {
 215                 PMD_DRV_LOG(ERR, "queue mapping error");
 216                 i40e_vsi_release(vf->vsi);
 217                 return -EFAULT;
 218         }
 219
 220         I40E_WRITE_REG(hw, I40E_VFGEN_RSTAT1(vf_id), VIRTCHNL_VFR_VFACTIVE);
 221
 222         return ret;
 223 }
 224
 225 int
 226 i40e_pf_host_send_msg_to_vf(struct i40e_pf_vf *vf,
 227                             uint32_t opcode,
 228                             uint32_t retval,
 229                             uint8_t *msg,
 230                             uint16_t msglen)
 231 {
 232         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 233         uint16_t abs_vf_id = hw->func_caps.vf_base_id + vf->vf_idx;
 234         int ret;
 235
 236         ret = i40e_aq_send_msg_to_vf(hw, abs_vf_id, opcode, retval,
 237                                                 msg, msglen, NULL);
 238         if (ret) {
 239                 PMD_INIT_LOG(ERR, "Fail to send message to VF, err %u",
 240                              hw->aq.asq_last_status);
 241         }
 242
 243         return ret;
 244 }
 245
 246 static void
 247 i40e_pf_host_process_cmd_version(struct i40e_pf_vf *vf, uint8_t *msg,
 248                                  bool b_op)
 249 {
 250         struct virtchnl_version_info info;
 251
 252         /* VF and PF drivers need to follow the Virtchnl definition, No matter
 253          * it's DPDK or other kernel drivers.
 254          * The original DPDK host specific feature
 255          * like CFG_VLAN_PVID and CONFIG_VSI_QUEUES_EXT will not available.
 256          */
 257
 258         info.major = VIRTCHNL_VERSION_MAJOR;
 259         vf->version = *(struct virtchnl_version_info *)msg;
 260         if (VF_IS_V10(&vf->version))
 261                 info.minor = VIRTCHNL_VERSION_MINOR_NO_VF_CAPS;
 262         else
 263                 info.minor = VIRTCHNL_VERSION_MINOR;
 264
 265         if (b_op)
 266                 i40e_pf_host_send_msg_to_vf(vf, VIRTCHNL_OP_VERSION,
 267                                             I40E_SUCCESS,
 268                                             (uint8_t *)&info,
 269                                             sizeof(info));
 270         else
 271                 i40e_pf_host_send_msg_to_vf(vf, VIRTCHNL_OP_VERSION,
 272                                             I40E_NOT_SUPPORTED,
 273                                             (uint8_t *)&info,
 274                                             sizeof(info));
 275 }
 276
 277 static int
 278 i40e_pf_host_process_cmd_reset_vf(struct i40e_pf_vf *vf)
 279 {
 280         i40e_pf_host_vf_reset(vf, 1);
 281
 282         /* No feedback will be sent to VF for VFLR */
 283         return I40E_SUCCESS;
 284 }
 285
 286 static int
 287 i40e_pf_host_process_cmd_get_vf_resource(struct i40e_pf_vf *vf, uint8_t *msg,
 288                                          bool b_op)
 289 {
 290         struct virtchnl_vf_resource *vf_res = NULL;
 291         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 292         uint32_t len = 0;
 293         uint64_t default_hena = I40E_RSS_HENA_ALL;
 294         int ret = I40E_SUCCESS;
 295
 296         if (!b_op) {
 297                 i40e_pf_host_send_msg_to_vf(vf,
 298                                             VIRTCHNL_OP_GET_VF_RESOURCES,
 299                                             I40E_NOT_SUPPORTED, NULL, 0);
 300                 return ret;
 301         }
 302
 303         /* only have 1 VSI by default */
 304         len =  sizeof(struct virtchnl_vf_resource) +
 305                                 I40E_DEFAULT_VF_VSI_NUM *
 306                 sizeof(struct virtchnl_vsi_resource);
 307
 308         vf_res = rte_zmalloc("i40e_vf_res", len, 0);
 309         if (vf_res == NULL) {
 310                 PMD_DRV_LOG(ERR, "failed to allocate mem");
 311                 ret = I40E_ERR_NO_MEMORY;
 312                 vf_res = NULL;
 313                 len = 0;
 314                 goto send_msg;
 315         }
 316
 317         if (VF_IS_V10(&vf->version)) /* doesn't support offload negotiate */
 318                 vf->request_caps = VIRTCHNL_VF_OFFLOAD_L2 |
 319                                    VIRTCHNL_VF_OFFLOAD_VLAN;
 320         else
 321                 vf->request_caps = *(uint32_t *)msg;
 322
 323         /* enable all RSS by default,
 324          * doesn't support hena setting by virtchnnl yet.
 325          */
 326         if (vf->request_caps & VIRTCHNL_VF_OFFLOAD_RSS_PF) {
 327                 I40E_WRITE_REG(hw, I40E_VFQF_HENA1(0, vf->vf_idx),
 328                                (uint32_t)default_hena);
 329                 I40E_WRITE_REG(hw, I40E_VFQF_HENA1(1, vf->vf_idx),
 330                                (uint32_t)(default_hena >> 32));
 331                 I40E_WRITE_FLUSH(hw);
 332         }
 333
 334         vf_res->vf_cap_flags = vf->request_caps &
 335                                    I40E_VIRTCHNL_OFFLOAD_CAPS;
 336
 337         if (vf->request_caps & VIRTCHNL_VF_OFFLOAD_REQ_QUEUES)
 338                 vf_res->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_REQ_QUEUES;
 339
 340         /* For X722, it supports write back on ITR
 341          * without binding queue to interrupt vector.
 342          */
 343         if (hw->mac.type == I40E_MAC_X722)
 344                 vf_res->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_WB_ON_ITR;
 345         vf_res->max_vectors = hw->func_caps.num_msix_vectors_vf;
 346         vf_res->num_queue_pairs = vf->vsi->nb_qps;
 347         vf_res->num_vsis = I40E_DEFAULT_VF_VSI_NUM;
 348         vf_res->rss_key_size = (I40E_PFQF_HKEY_MAX_INDEX + 1) * 4;
 349         vf_res->rss_lut_size = (I40E_VFQF_HLUT1_MAX_INDEX + 1) * 4;
 350
 351         /* Change below setting if PF host can support more VSIs for VF */
 352         vf_res->vsi_res[0].vsi_type = VIRTCHNL_VSI_SRIOV;
 353         vf_res->vsi_res[0].vsi_id = vf->vsi->vsi_id;
 354         vf_res->vsi_res[0].num_queue_pairs = vf->vsi->nb_qps;
 355         rte_ether_addr_copy(&vf->mac_addr,
 356                 (struct rte_ether_addr *)vf_res->vsi_res[0].default_mac_addr);
 357
 358 send_msg:
 359         i40e_pf_host_send_msg_to_vf(vf, VIRTCHNL_OP_GET_VF_RESOURCES,
 360                                         ret, (uint8_t *)vf_res, len);
 361         rte_free(vf_res);
 362
 363         return ret;
 364 }
 365
 366 static int
 367 i40e_pf_host_hmc_config_rxq(struct i40e_hw *hw,
 368                             struct i40e_pf_vf *vf,
 369                             struct virtchnl_rxq_info *rxq,
 370                             uint8_t crcstrip)
 371 {
 372         int err = I40E_SUCCESS;
 373         struct i40e_hmc_obj_rxq rx_ctx;
 374         uint16_t abs_queue_id = vf->vsi->base_queue + rxq->queue_id;
 375
 376         /* Clear the context structure first */
 377         memset(&rx_ctx, 0, sizeof(struct i40e_hmc_obj_rxq));
 378         rx_ctx.dbuff = rxq->databuffer_size >> I40E_RXQ_CTX_DBUFF_SHIFT;
 379         rx_ctx.hbuff = rxq->hdr_size >> I40E_RXQ_CTX_HBUFF_SHIFT;
 380         rx_ctx.base = rxq->dma_ring_addr / I40E_QUEUE_BASE_ADDR_UNIT;
 381         rx_ctx.qlen = rxq->ring_len;
 382 #ifndef RTE_LIBRTE_I40E_16BYTE_RX_DESC
 383         rx_ctx.dsize = 1;
 384 #endif
 385
 386         if (rxq->splithdr_enabled) {
 387                 rx_ctx.hsplit_0 = I40E_HEADER_SPLIT_ALL;
 388                 rx_ctx.dtype = i40e_header_split_enabled;
 389         } else {
 390                 rx_ctx.hsplit_0 = I40E_HEADER_SPLIT_NONE;
 391                 rx_ctx.dtype = i40e_header_split_none;
 392         }
 393         rx_ctx.rxmax = rxq->max_pkt_size;
 394         rx_ctx.tphrdesc_ena = 1;
 395         rx_ctx.tphwdesc_ena = 1;
 396         rx_ctx.tphdata_ena = 1;
 397         rx_ctx.tphhead_ena = 1;
 398         rx_ctx.lrxqthresh = 2;
 399         rx_ctx.crcstrip = crcstrip;
 400         rx_ctx.l2tsel = 1;
 401         rx_ctx.prefena = 1;
 402
 403         err = i40e_clear_lan_rx_queue_context(hw, abs_queue_id);
 404         if (err != I40E_SUCCESS)
 405                 return err;
 406         err = i40e_set_lan_rx_queue_context(hw, abs_queue_id, &rx_ctx);
 407
 408         return err;
 409 }
 410
 411 static inline uint8_t
 412 i40e_vsi_get_tc_of_queue(struct i40e_vsi *vsi,
 413                 uint16_t queue_id)
 414 {
 415         struct i40e_aqc_vsi_properties_data *info = &vsi->info;
 416         uint16_t bsf, qp_idx;
 417         uint8_t i;
 418
 419         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
 420                 if (vsi->enabled_tc & (1 << i)) {
 421                         qp_idx = rte_le_to_cpu_16((info->tc_mapping[i] &
 422                                 I40E_AQ_VSI_TC_QUE_OFFSET_MASK) >>
 423                                 I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT);
 424                         bsf = rte_le_to_cpu_16((info->tc_mapping[i] &
 425                                 I40E_AQ_VSI_TC_QUE_NUMBER_MASK) >>
 426                                 I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
 427                         if (queue_id >= qp_idx && queue_id < qp_idx + (1 << bsf))
 428                                 return i;
 429                 }
 430         }
 431         return 0;
 432 }
 433
 434 static int
 435 i40e_pf_host_hmc_config_txq(struct i40e_hw *hw,
 436                             struct i40e_pf_vf *vf,
 437                             struct virtchnl_txq_info *txq)
 438 {
 439         int err = I40E_SUCCESS;
 440         struct i40e_hmc_obj_txq tx_ctx;
 441         struct i40e_vsi *vsi = vf->vsi;
 442         uint32_t qtx_ctl;
 443         uint16_t abs_queue_id = vsi->base_queue + txq->queue_id;
 444         uint8_t dcb_tc;
 445
 446         /* clear the context structure first */
 447         memset(&tx_ctx, 0, sizeof(tx_ctx));
 448         tx_ctx.base = txq->dma_ring_addr / I40E_QUEUE_BASE_ADDR_UNIT;
 449         tx_ctx.qlen = txq->ring_len;
 450         dcb_tc = i40e_vsi_get_tc_of_queue(vsi, txq->queue_id);
 451         tx_ctx.rdylist = rte_le_to_cpu_16(vsi->info.qs_handle[dcb_tc]);
 452         tx_ctx.head_wb_ena = txq->headwb_enabled;
 453         tx_ctx.head_wb_addr = txq->dma_headwb_addr;
 454
 455         err = i40e_clear_lan_tx_queue_context(hw, abs_queue_id);
 456         if (err != I40E_SUCCESS)
 457                 return err;
 458
 459         err = i40e_set_lan_tx_queue_context(hw, abs_queue_id, &tx_ctx);
 460         if (err != I40E_SUCCESS)
 461                 return err;
 462
 463         /* bind queue with VF function, since TX/QX will appear in pair,
 464          * so only has QTX_CTL to set.
 465          */
 466         qtx_ctl = (I40E_QTX_CTL_VF_QUEUE << I40E_QTX_CTL_PFVF_Q_SHIFT) |
 467                                 ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
 468                                 I40E_QTX_CTL_PF_INDX_MASK) |
 469                                 (((vf->vf_idx + hw->func_caps.vf_base_id) <<
 470                                 I40E_QTX_CTL_VFVM_INDX_SHIFT) &
 471                                 I40E_QTX_CTL_VFVM_INDX_MASK);
 472         I40E_WRITE_REG(hw, I40E_QTX_CTL(abs_queue_id), qtx_ctl);
 473         I40E_WRITE_FLUSH(hw);
 474
 475         return I40E_SUCCESS;
 476 }
 477
 478 static int
 479 i40e_pf_host_process_cmd_config_vsi_queues(struct i40e_pf_vf *vf,
 480                                            uint8_t *msg,
 481                                            uint16_t msglen,
 482                                            bool b_op)
 483 {
 484         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 485         struct i40e_vsi *vsi = vf->vsi;
 486         struct virtchnl_vsi_queue_config_info *vc_vqci =
 487                 (struct virtchnl_vsi_queue_config_info *)msg;
 488         struct virtchnl_queue_pair_info *vc_qpi;
 489         int i, ret = I40E_SUCCESS;
 490
 491         if (!b_op) {
 492                 i40e_pf_host_send_msg_to_vf(vf,
 493                                             VIRTCHNL_OP_CONFIG_VSI_QUEUES,
 494                                             I40E_NOT_SUPPORTED, NULL, 0);
 495                 return ret;
 496         }
 497
 498         if (!msg || vc_vqci->num_queue_pairs > vsi->nb_qps ||
 499                 vc_vqci->num_queue_pairs > I40E_MAX_VSI_QP ||
 500                 msglen < I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqci,
 501                                         vc_vqci->num_queue_pairs)) {
 502                 PMD_DRV_LOG(ERR, "vsi_queue_config_info argument wrong");
 503                 ret = I40E_ERR_PARAM;
 504                 goto send_msg;
 505         }
 506
 507         vc_qpi = vc_vqci->qpair;
 508         for (i = 0; i < vc_vqci->num_queue_pairs; i++) {
 509                 if (vc_qpi[i].rxq.queue_id > vsi->nb_qps - 1 ||
 510                         vc_qpi[i].txq.queue_id > vsi->nb_qps - 1) {
 511                         ret = I40E_ERR_PARAM;
 512                         goto send_msg;
 513                 }
 514
 515                 /*
 516                  * Apply VF RX queue setting to HMC.
 517                  * If the opcode is VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT,
 518                  * then the extra information of
 519                  * 'struct virtchnl_queue_pair_extra_info' is needed,
 520                  * otherwise set the last parameter to NULL.
 521                  */
 522                 if (i40e_pf_host_hmc_config_rxq(hw, vf, &vc_qpi[i].rxq,
 523                         I40E_CFG_CRCSTRIP_DEFAULT) != I40E_SUCCESS) {
 524                         PMD_DRV_LOG(ERR, "Configure RX queue HMC failed");
 525                         ret = I40E_ERR_PARAM;
 526                         goto send_msg;
 527                 }
 528
 529                 /* Apply VF TX queue setting to HMC */
 530                 if (i40e_pf_host_hmc_config_txq(hw, vf,
 531                         &vc_qpi[i].txq) != I40E_SUCCESS) {
 532                         PMD_DRV_LOG(ERR, "Configure TX queue HMC failed");
 533                         ret = I40E_ERR_PARAM;
 534                         goto send_msg;
 535                 }
 536         }
 537
 538 send_msg:
 539         i40e_pf_host_send_msg_to_vf(vf, VIRTCHNL_OP_CONFIG_VSI_QUEUES,
 540                                                         ret, NULL, 0);
 541
 542         return ret;
 543 }
 544
 545 static void
 546 i40e_pf_config_irq_link_list(struct i40e_pf_vf *vf,
 547                               struct virtchnl_vector_map *vvm)
 548 {
 549 #define BITS_PER_CHAR 8
 550         uint64_t linklistmap = 0, tempmap;
 551         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 552         uint16_t qid;
 553         bool b_first_q = true;
 554         enum i40e_queue_type qtype;
 555         uint16_t vector_id;
 556         uint32_t reg, reg_idx;
 557         uint16_t itr_idx = 0, i;
 558
 559         vector_id = vvm->vector_id;
 560         /* setup the head */
 561         if (!vector_id)
 562                 reg_idx = I40E_VPINT_LNKLST0(vf->vf_idx);
 563         else
 564                 reg_idx = I40E_VPINT_LNKLSTN(
 565                 ((hw->func_caps.num_msix_vectors_vf - 1) * vf->vf_idx)
 566                 + (vector_id - 1));
 567
 568         if (vvm->rxq_map == 0 && vvm->txq_map == 0) {
 569                 I40E_WRITE_REG(hw, reg_idx,
 570                         I40E_VPINT_LNKLST0_FIRSTQ_INDX_MASK);
 571                 goto cfg_irq_done;
 572         }
 573
 574         /* sort all rx and tx queues */
 575         tempmap = vvm->rxq_map;
 576         for (i = 0; i < sizeof(vvm->rxq_map) * BITS_PER_CHAR; i++) {
 577                 if (tempmap & 0x1)
 578                         linklistmap |= (1 << (2 * i));
 579                 tempmap >>= 1;
 580         }
 581
 582         tempmap = vvm->txq_map;
 583         for (i = 0; i < sizeof(vvm->txq_map) * BITS_PER_CHAR; i++) {
 584                 if (tempmap & 0x1)
 585                         linklistmap |= (1 << (2 * i + 1));
 586                 tempmap >>= 1;
 587         }
 588
 589         /* Link all rx and tx queues into a chained list */
 590         tempmap = linklistmap;
 591         i = 0;
 592         b_first_q = true;
 593         do {
 594                 if (tempmap & 0x1) {
 595                         qtype = (enum i40e_queue_type)(i % 2);
 596                         qid = vf->vsi->base_queue + i / 2;
 597                         if (b_first_q) {
 598                                 /* This is header */
 599                                 b_first_q = false;
 600                                 reg = ((qtype <<
 601                                 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT)
 602                                 | qid);
 603                         } else {
 604                                 /* element in the link list */
 605                                 reg = (vector_id) |
 606                                 (qtype << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) |
 607                                 (qid << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
 608                                 BIT(I40E_QINT_RQCTL_CAUSE_ENA_SHIFT) |
 609                                 (itr_idx << I40E_QINT_RQCTL_ITR_INDX_SHIFT);
 610                         }
 611                         I40E_WRITE_REG(hw, reg_idx, reg);
 612                         /* find next register to program */
 613                         switch (qtype) {
 614                         case I40E_QUEUE_TYPE_RX:
 615                                 reg_idx = I40E_QINT_RQCTL(qid);
 616                                 itr_idx = vvm->rxitr_idx;
 617                                 break;
 618                         case I40E_QUEUE_TYPE_TX:
 619                                 reg_idx = I40E_QINT_TQCTL(qid);
 620                                 itr_idx = vvm->txitr_idx;
 621                                 break;
 622                         default:
 623                                 break;
 624                         }
 625                 }
 626                 i++;
 627                 tempmap >>= 1;
 628         } while (tempmap);
 629
 630         /* Terminate the link list */
 631         reg = (vector_id) |
 632                 (0 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) |
 633                 (0x7FF << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
 634                 BIT(I40E_QINT_RQCTL_CAUSE_ENA_SHIFT) |
 635                 (itr_idx << I40E_QINT_RQCTL_ITR_INDX_SHIFT);
 636         I40E_WRITE_REG(hw, reg_idx, reg);
 637
 638 cfg_irq_done:
 639         I40E_WRITE_FLUSH(hw);
 640 }
 641
 642 static int
 643 i40e_pf_host_process_cmd_config_irq_map(struct i40e_pf_vf *vf,
 644                                         uint8_t *msg, uint16_t msglen,
 645                                         bool b_op)
 646 {
 647         int ret = I40E_SUCCESS;
 648         struct i40e_pf *pf = vf->pf;
 649         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 650         struct virtchnl_irq_map_info *irqmap =
 651             (struct virtchnl_irq_map_info *)msg;
 652         struct virtchnl_vector_map *map;
 653         int i;
 654         uint16_t vector_id, itr_idx;
 655         unsigned long qbit_max;
 656
 657         if (!b_op) {
 658                 i40e_pf_host_send_msg_to_vf(
 659                         vf,
 660                         VIRTCHNL_OP_CONFIG_IRQ_MAP,
 661                         I40E_NOT_SUPPORTED, NULL, 0);
 662                 return ret;
 663         }
 664
 665         if (msg == NULL || msglen < sizeof(struct virtchnl_irq_map_info)) {
 666                 PMD_DRV_LOG(ERR, "buffer too short");
 667                 ret = I40E_ERR_PARAM;
 668                 goto send_msg;
 669         }
 670
 671         /* PF host will support both DPDK VF or Linux VF driver, identify by
 672          * number of vectors requested.
 673          */
 674
 675         /* DPDK VF only requires single vector */
 676         if (irqmap->num_vectors == 1) {
 677                 /* This MSIX intr store the intr in VF range */
 678                 vf->vsi->msix_intr = irqmap->vecmap[0].vector_id;
 679                 vf->vsi->nb_msix = irqmap->num_vectors;
 680                 vf->vsi->nb_used_qps = vf->vsi->nb_qps;
 681                 itr_idx = irqmap->vecmap[0].rxitr_idx;
 682
 683                 /* Don't care how the TX/RX queue mapping with this vector.
 684                  * Link all VF RX queues together. Only did mapping work.
 685                  * VF can disable/enable the intr by itself.
 686                  */
 687                 i40e_vsi_queues_bind_intr(vf->vsi, itr_idx);
 688                 goto send_msg;
 689         }
 690
 691         /* Then, it's Linux VF driver */
 692         qbit_max = 1 << pf->vf_nb_qp_max;
 693         for (i = 0; i < irqmap->num_vectors; i++) {
 694                 map = &irqmap->vecmap[i];
 695
 696                 vector_id = map->vector_id;
 697                 /* validate msg params */
 698                 if (vector_id >= hw->func_caps.num_msix_vectors_vf) {
 699                         ret = I40E_ERR_PARAM;
 700                         goto send_msg;
 701                 }
 702
 703                 if ((map->rxq_map < qbit_max) && (map->txq_map < qbit_max)) {
 704                         i40e_pf_config_irq_link_list(vf, map);
 705                 } else {
 706                         /* configured queue size excceed limit */
 707                         ret = I40E_ERR_PARAM;
 708                         goto send_msg;
 709                 }
 710         }
 711
 712 send_msg:
 713         i40e_pf_host_send_msg_to_vf(vf, VIRTCHNL_OP_CONFIG_IRQ_MAP,
 714                                                         ret, NULL, 0);
 715
 716         return ret;
 717 }
 718
 719 static int
 720 i40e_pf_host_switch_queues(struct i40e_pf_vf *vf,
 721                            struct virtchnl_queue_select *qsel,
 722                            bool on)
 723 {
 724         int ret = I40E_SUCCESS;
 725         int i;
 726         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 727         uint16_t baseq = vf->vsi->base_queue;
 728
 729         if (qsel->rx_queues + qsel->tx_queues == 0)
 730                 return I40E_ERR_PARAM;
 731
 732         /* always enable RX first and disable last */
 733         /* Enable RX if it's enable */
 734         if (on) {
 735                 for (i = 0; i < I40E_MAX_QP_NUM_PER_VF; i++)
 736                         if (qsel->rx_queues & (1 << i)) {
 737                                 ret = i40e_switch_rx_queue(hw, baseq + i, on);
 738                                 if (ret != I40E_SUCCESS)
 739                                         return ret;
 740                         }
 741         }
 742
 743         /* Enable/Disable TX */
 744         for (i = 0; i < I40E_MAX_QP_NUM_PER_VF; i++)
 745                 if (qsel->tx_queues & (1 << i)) {
 746                         ret = i40e_switch_tx_queue(hw, baseq + i, on);
 747                         if (ret != I40E_SUCCESS)
 748                                 return ret;
 749                 }
 750
 751         /* disable RX last if it's disable */
 752         if (!on) {
 753                 /* disable RX */
 754                 for (i = 0; i < I40E_MAX_QP_NUM_PER_VF; i++)
 755                         if (qsel->rx_queues & (1 << i)) {
 756                                 ret = i40e_switch_rx_queue(hw, baseq + i, on);
 757                                 if (ret != I40E_SUCCESS)
 758                                         return ret;
 759                         }
 760         }
 761
 762         return ret;
 763 }
 764
 765 static int
 766 i40e_pf_host_process_cmd_enable_queues(struct i40e_pf_vf *vf,
 767                                        uint8_t *msg,
 768                                        uint16_t msglen)
 769 {
 770         int ret = I40E_SUCCESS;
 771         struct virtchnl_queue_select *q_sel =
 772                 (struct virtchnl_queue_select *)msg;
 773
 774         if (msg == NULL || msglen != sizeof(*q_sel)) {
 775                 ret = I40E_ERR_PARAM;
 776                 goto send_msg;
 777         }
 778         ret = i40e_pf_host_switch_queues(vf, q_sel, true);
 779
 780 send_msg:
 781         i40e_pf_host_send_msg_to_vf(vf, VIRTCHNL_OP_ENABLE_QUEUES,
 782                                                         ret, NULL, 0);
 783
 784         return ret;
 785 }
 786
 787 static int
 788 i40e_pf_host_process_cmd_disable_queues(struct i40e_pf_vf *vf,
 789                                         uint8_t *msg,
 790                                         uint16_t msglen,
 791                                         bool b_op)
 792 {
 793         int ret = I40E_SUCCESS;
 794         struct virtchnl_queue_select *q_sel =
 795                 (struct virtchnl_queue_select *)msg;
 796
 797         if (!b_op) {
 798                 i40e_pf_host_send_msg_to_vf(
 799                         vf,
 800                         VIRTCHNL_OP_DISABLE_QUEUES,
 801                         I40E_NOT_SUPPORTED, NULL, 0);
 802                 return ret;
 803         }
 804
 805         if (msg == NULL || msglen != sizeof(*q_sel)) {
 806                 ret = I40E_ERR_PARAM;
 807                 goto send_msg;
 808         }
 809         ret = i40e_pf_host_switch_queues(vf, q_sel, false);
 810
 811 send_msg:
 812         i40e_pf_host_send_msg_to_vf(vf, VIRTCHNL_OP_DISABLE_QUEUES,
 813                                                         ret, NULL, 0);
 814
 815         return ret;
 816 }
 817
 818
 819 static int
 820 i40e_pf_host_process_cmd_add_ether_address(struct i40e_pf_vf *vf,
 821                                            uint8_t *msg,
 822                                            uint16_t msglen,
 823                                            bool b_op)
 824 {
 825         int ret = I40E_SUCCESS;
 826         struct virtchnl_ether_addr_list *addr_list =
 827                         (struct virtchnl_ether_addr_list *)msg;
 828         struct i40e_mac_filter_info filter;
 829         int i;
 830         struct rte_ether_addr *mac;
 831
 832         if (!b_op) {
 833                 i40e_pf_host_send_msg_to_vf(
 834                         vf,
 835                         VIRTCHNL_OP_ADD_ETH_ADDR,
 836                         I40E_NOT_SUPPORTED, NULL, 0);
 837                 return ret;
 838         }
 839
 840         memset(&filter, 0 , sizeof(struct i40e_mac_filter_info));
 841
 842         if (msg == NULL || msglen <= sizeof(*addr_list)) {
 843                 PMD_DRV_LOG(ERR, "add_ether_address argument too short");
 844                 ret = I40E_ERR_PARAM;
 845                 goto send_msg;
 846         }
 847
 848         for (i = 0; i < addr_list->num_elements; i++) {
 849                 mac = (struct rte_ether_addr *)(addr_list->list[i].addr);
 850                 rte_memcpy(&filter.mac_addr, mac, RTE_ETHER_ADDR_LEN);
 851                 filter.filter_type = I40E_MACVLAN_PERFECT_MATCH;
 852                 if (rte_is_zero_ether_addr(mac) ||
 853                     i40e_vsi_add_mac(vf->vsi, &filter)) {
 854                         ret = I40E_ERR_INVALID_MAC_ADDR;
 855                         goto send_msg;
 856                 }
 857         }
 858
 859 send_msg:
 860         i40e_pf_host_send_msg_to_vf(vf, VIRTCHNL_OP_ADD_ETH_ADDR,
 861                                                         ret, NULL, 0);
 862
 863         return ret;
 864 }
 865
 866 static int
 867 i40e_pf_host_process_cmd_del_ether_address(struct i40e_pf_vf *vf,
 868                                            uint8_t *msg,
 869                                            uint16_t msglen,
 870                                            bool b_op)
 871 {
 872         int ret = I40E_SUCCESS;
 873         struct virtchnl_ether_addr_list *addr_list =
 874                 (struct virtchnl_ether_addr_list *)msg;
 875         int i;
 876         struct rte_ether_addr *mac;
 877
 878         if (!b_op) {
 879                 i40e_pf_host_send_msg_to_vf(
 880                         vf,
 881                         VIRTCHNL_OP_DEL_ETH_ADDR,
 882                         I40E_NOT_SUPPORTED, NULL, 0);
 883                 return ret;
 884         }
 885
 886         if (msg == NULL || msglen <= sizeof(*addr_list)) {
 887                 PMD_DRV_LOG(ERR, "delete_ether_address argument too short");
 888                 ret = I40E_ERR_PARAM;
 889                 goto send_msg;
 890         }
 891
 892         for (i = 0; i < addr_list->num_elements; i++) {
 893                 mac = (struct rte_ether_addr *)(addr_list->list[i].addr);
 894                 if (rte_is_zero_ether_addr(mac) ||
 895                         i40e_vsi_delete_mac(vf->vsi, mac)) {
 896                         ret = I40E_ERR_INVALID_MAC_ADDR;
 897                         goto send_msg;
 898                 }
 899         }
 900
 901 send_msg:
 902         i40e_pf_host_send_msg_to_vf(vf, VIRTCHNL_OP_DEL_ETH_ADDR,
 903                                                         ret, NULL, 0);
 904
 905         return ret;
 906 }
 907
 908 static int
 909 i40e_pf_host_process_cmd_add_vlan(struct i40e_pf_vf *vf,
 910                                 uint8_t *msg, uint16_t msglen,
 911                                 bool b_op)
 912 {
 913         int ret = I40E_SUCCESS;
 914         struct virtchnl_vlan_filter_list *vlan_filter_list =
 915                 (struct virtchnl_vlan_filter_list *)msg;
 916         int i;
 917         uint16_t *vid;
 918
 919         if (!b_op) {
 920                 i40e_pf_host_send_msg_to_vf(
 921                         vf,
 922                         VIRTCHNL_OP_ADD_VLAN,
 923                         I40E_NOT_SUPPORTED, NULL, 0);
 924                 return ret;
 925         }
 926
 927         if (msg == NULL || msglen <= sizeof(*vlan_filter_list)) {
 928                 PMD_DRV_LOG(ERR, "add_vlan argument too short");
 929                 ret = I40E_ERR_PARAM;
 930                 goto send_msg;
 931         }
 932
 933         vid = vlan_filter_list->vlan_id;
 934
 935         for (i = 0; i < vlan_filter_list->num_elements; i++) {
 936                 ret = i40e_vsi_add_vlan(vf->vsi, vid[i]);
 937                 if(ret != I40E_SUCCESS)
 938                         goto send_msg;
 939         }
 940
 941 send_msg:
 942         i40e_pf_host_send_msg_to_vf(vf, VIRTCHNL_OP_ADD_VLAN,
 943                                                 ret, NULL, 0);
 944
 945         return ret;
 946 }
 947
 948 static int
 949 i40e_pf_host_process_cmd_del_vlan(struct i40e_pf_vf *vf,
 950                                   uint8_t *msg,
 951                                   uint16_t msglen,
 952                                   bool b_op)
 953 {
 954         int ret = I40E_SUCCESS;
 955         struct virtchnl_vlan_filter_list *vlan_filter_list =
 956                         (struct virtchnl_vlan_filter_list *)msg;
 957         int i;
 958         uint16_t *vid;
 959
 960         if (!b_op) {
 961                 i40e_pf_host_send_msg_to_vf(
 962                         vf,
 963                         VIRTCHNL_OP_DEL_VLAN,
 964                         I40E_NOT_SUPPORTED, NULL, 0);
 965                 return ret;
 966         }
 967
 968         if (msg == NULL || msglen <= sizeof(*vlan_filter_list)) {
 969                 PMD_DRV_LOG(ERR, "delete_vlan argument too short");
 970                 ret = I40E_ERR_PARAM;
 971                 goto send_msg;
 972         }
 973
 974         vid = vlan_filter_list->vlan_id;
 975         for (i = 0; i < vlan_filter_list->num_elements; i++) {
 976                 ret = i40e_vsi_delete_vlan(vf->vsi, vid[i]);
 977                 if(ret != I40E_SUCCESS)
 978                         goto send_msg;
 979         }
 980
 981 send_msg:
 982         i40e_pf_host_send_msg_to_vf(vf, VIRTCHNL_OP_DEL_VLAN,
 983                                                 ret, NULL, 0);
 984
 985         return ret;
 986 }
 987
 988 static int
 989 i40e_pf_host_process_cmd_config_promisc_mode(
 990                                         struct i40e_pf_vf *vf,
 991                                         uint8_t *msg,
 992                                         uint16_t msglen,
 993                                         bool b_op)
 994 {
 995         int ret = I40E_SUCCESS;
 996         struct virtchnl_promisc_info *promisc =
 997                                 (struct virtchnl_promisc_info *)msg;
 998         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 999         bool unicast = FALSE, multicast = FALSE;
1000
1001         if (!b_op) {
1002                 i40e_pf_host_send_msg_to_vf(
1003                         vf,
1004                         VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE,
1005                         I40E_NOT_SUPPORTED, NULL, 0);
1006                 return ret;
1007         }
1008
1009         if (msg == NULL || msglen != sizeof(*promisc)) {
1010                 ret = I40E_ERR_PARAM;
1011                 goto send_msg;
1012         }
1013
1014         if (promisc->flags & FLAG_VF_UNICAST_PROMISC)
1015                 unicast = TRUE;
1016         ret = i40e_aq_set_vsi_unicast_promiscuous(hw,
1017                         vf->vsi->seid, unicast, NULL, true);
1018         if (ret != I40E_SUCCESS)
1019                 goto send_msg;
1020
1021         if (promisc->flags & FLAG_VF_MULTICAST_PROMISC)
1022                 multicast = TRUE;
1023         ret = i40e_aq_set_vsi_multicast_promiscuous(hw, vf->vsi->seid,
1024                                                 multicast, NULL);
1025
1026 send_msg:
1027         i40e_pf_host_send_msg_to_vf(vf,
1028                 VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE, ret, NULL, 0);
1029
1030         return ret;
1031 }
1032
1033 static int
1034 i40e_pf_host_process_cmd_get_stats(struct i40e_pf_vf *vf, bool b_op)
1035 {
1036         i40e_update_vsi_stats(vf->vsi);
1037
1038         if (b_op)
1039                 i40e_pf_host_send_msg_to_vf(vf, VIRTCHNL_OP_GET_STATS,
1040                                             I40E_SUCCESS,
1041                                             (uint8_t *)&vf->vsi->eth_stats,
1042                                             sizeof(vf->vsi->eth_stats));
1043         else
1044                 i40e_pf_host_send_msg_to_vf(vf, VIRTCHNL_OP_GET_STATS,
1045                                             I40E_NOT_SUPPORTED,
1046                                             (uint8_t *)&vf->vsi->eth_stats,
1047                                             sizeof(vf->vsi->eth_stats));
1048
1049         return I40E_SUCCESS;
1050 }
1051
1052 static int
1053 i40e_pf_host_process_cmd_enable_vlan_strip(struct i40e_pf_vf *vf, bool b_op)
1054 {
1055         int ret = I40E_SUCCESS;
1056
1057         if (!b_op) {
1058                 i40e_pf_host_send_msg_to_vf(
1059                         vf,
1060                         VIRTCHNL_OP_ENABLE_VLAN_STRIPPING,
1061                         I40E_NOT_SUPPORTED, NULL, 0);
1062                 return ret;
1063         }
1064
1065         ret = i40e_vsi_config_vlan_stripping(vf->vsi, TRUE);
1066         if (ret != 0)
1067                 PMD_DRV_LOG(ERR, "Failed to enable vlan stripping");
1068
1069         i40e_pf_host_send_msg_to_vf(vf, VIRTCHNL_OP_ENABLE_VLAN_STRIPPING,
1070                                     ret, NULL, 0);
1071
1072         return ret;
1073 }
1074
1075 static int
1076 i40e_pf_host_process_cmd_disable_vlan_strip(struct i40e_pf_vf *vf, bool b_op)
1077 {
1078         int ret = I40E_SUCCESS;
1079
1080         if (!b_op) {
1081                 i40e_pf_host_send_msg_to_vf(
1082                         vf,
1083                         VIRTCHNL_OP_DISABLE_VLAN_STRIPPING,
1084                         I40E_NOT_SUPPORTED, NULL, 0);
1085                 return ret;
1086         }
1087
1088         ret = i40e_vsi_config_vlan_stripping(vf->vsi, FALSE);
1089         if (ret != 0)
1090                 PMD_DRV_LOG(ERR, "Failed to disable vlan stripping");
1091
1092         i40e_pf_host_send_msg_to_vf(vf, VIRTCHNL_OP_DISABLE_VLAN_STRIPPING,
1093                                     ret, NULL, 0);
1094
1095         return ret;
1096 }
1097
1098 static int
1099 i40e_pf_host_process_cmd_set_rss_lut(struct i40e_pf_vf *vf,
1100                                      uint8_t *msg,
1101                                      uint16_t msglen,
1102                                      bool b_op)
1103 {
1104         struct virtchnl_rss_lut *rss_lut = (struct virtchnl_rss_lut *)msg;
1105         uint16_t valid_len;
1106         int ret = I40E_SUCCESS;
1107
1108         if (!b_op) {
1109                 i40e_pf_host_send_msg_to_vf(
1110                         vf,
1111                         VIRTCHNL_OP_CONFIG_RSS_LUT,
1112                         I40E_NOT_SUPPORTED, NULL, 0);
1113                 return ret;
1114         }
1115
1116         if (!msg || msglen <= sizeof(struct virtchnl_rss_lut)) {
1117                 PMD_DRV_LOG(ERR, "set_rss_lut argument too short");
1118                 ret = I40E_ERR_PARAM;
1119                 goto send_msg;
1120         }
1121         valid_len = sizeof(struct virtchnl_rss_lut) + rss_lut->lut_entries - 1;
1122         if (msglen < valid_len) {
1123                 PMD_DRV_LOG(ERR, "set_rss_lut length mismatch");
1124                 ret = I40E_ERR_PARAM;
1125                 goto send_msg;
1126         }
1127
1128         ret = i40e_set_rss_lut(vf->vsi, rss_lut->lut, rss_lut->lut_entries);
1129
1130 send_msg:
1131         i40e_pf_host_send_msg_to_vf(vf, VIRTCHNL_OP_CONFIG_RSS_LUT,
1132                                     ret, NULL, 0);
1133
1134         return ret;
1135 }
1136
1137 static int
1138 i40e_pf_host_process_cmd_set_rss_key(struct i40e_pf_vf *vf,
1139                                      uint8_t *msg,
1140                                      uint16_t msglen,
1141                                      bool b_op)
1142 {
1143         struct virtchnl_rss_key *rss_key = (struct virtchnl_rss_key *)msg;
1144         uint16_t valid_len;
1145         int ret = I40E_SUCCESS;
1146
1147         if (!b_op) {
1148                 i40e_pf_host_send_msg_to_vf(
1149                         vf,
1150                         VIRTCHNL_OP_DEL_VLAN,
1151                         VIRTCHNL_OP_CONFIG_RSS_KEY, NULL, 0);
1152                 return ret;
1153         }
1154
1155         if (!msg || msglen <= sizeof(struct virtchnl_rss_key)) {
1156                 PMD_DRV_LOG(ERR, "set_rss_key argument too short");
1157                 ret = I40E_ERR_PARAM;
1158                 goto send_msg;
1159         }
1160         valid_len = sizeof(struct virtchnl_rss_key) + rss_key->key_len - 1;
1161         if (msglen < valid_len) {
1162                 PMD_DRV_LOG(ERR, "set_rss_key length mismatch");
1163                 ret = I40E_ERR_PARAM;
1164                 goto send_msg;
1165         }
1166
1167         ret = i40e_set_rss_key(vf->vsi, rss_key->key, rss_key->key_len);
1168
1169 send_msg:
1170         i40e_pf_host_send_msg_to_vf(vf, VIRTCHNL_OP_CONFIG_RSS_KEY,
1171                                     ret, NULL, 0);
1172
1173         return ret;
1174 }
1175
1176 void
1177 i40e_notify_vf_link_status(struct rte_eth_dev *dev, struct i40e_pf_vf *vf)
1178 {
1179         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
1180         struct virtchnl_pf_event event;
1181         uint16_t vf_id = vf->vf_idx;
1182         uint32_t tval, rval;
1183
1184         event.event = VIRTCHNL_EVENT_LINK_CHANGE;
1185         event.event_data.link_event.link_status =
1186                 dev->data->dev_link.link_status;
1187
1188         /* need to convert the ETH_SPEED_xxx into VIRTCHNL_LINK_SPEED_xxx */
1189         switch (dev->data->dev_link.link_speed) {
1190         case ETH_SPEED_NUM_100M:
1191                 event.event_data.link_event.link_speed = VIRTCHNL_LINK_SPEED_100MB;
1192                 break;
1193         case ETH_SPEED_NUM_1G:
1194                 event.event_data.link_event.link_speed = VIRTCHNL_LINK_SPEED_1GB;
1195                 break;
1196         case ETH_SPEED_NUM_10G:
1197                 event.event_data.link_event.link_speed = VIRTCHNL_LINK_SPEED_10GB;
1198                 break;
1199         case ETH_SPEED_NUM_20G:
1200                 event.event_data.link_event.link_speed = VIRTCHNL_LINK_SPEED_20GB;
1201                 break;
1202         case ETH_SPEED_NUM_25G:
1203                 event.event_data.link_event.link_speed = VIRTCHNL_LINK_SPEED_25GB;
1204                 break;
1205         case ETH_SPEED_NUM_40G:
1206                 event.event_data.link_event.link_speed = VIRTCHNL_LINK_SPEED_40GB;
1207                 break;
1208         default:
1209                 event.event_data.link_event.link_speed =
1210                         VIRTCHNL_LINK_SPEED_UNKNOWN;
1211                 break;
1212         }
1213
1214         tval = I40E_READ_REG(hw, I40E_VF_ATQLEN(vf_id));
1215         rval = I40E_READ_REG(hw, I40E_VF_ARQLEN(vf_id));
1216
1217         if (tval & I40E_VF_ATQLEN_ATQLEN_MASK ||
1218             tval & I40E_VF_ATQLEN_ATQENABLE_MASK ||
1219             rval & I40E_VF_ARQLEN_ARQLEN_MASK ||
1220             rval & I40E_VF_ARQLEN_ARQENABLE_MASK)
1221                 i40e_pf_host_send_msg_to_vf(vf, VIRTCHNL_OP_EVENT,
1222                         I40E_SUCCESS, (uint8_t *)&event, sizeof(event));
1223 }
1224
1225 /**
1226  * i40e_vc_notify_vf_reset
1227  * @vf: pointer to the VF structure
1228  *
1229  * indicate a pending reset to the given VF
1230  **/
1231 static void
1232 i40e_vc_notify_vf_reset(struct i40e_pf_vf *vf)
1233 {
1234         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
1235         struct virtchnl_pf_event pfe;
1236         int abs_vf_id;
1237         uint16_t vf_id = vf->vf_idx;
1238
1239         abs_vf_id = vf_id + hw->func_caps.vf_base_id;
1240         pfe.event = VIRTCHNL_EVENT_RESET_IMPENDING;
1241         pfe.severity = PF_EVENT_SEVERITY_CERTAIN_DOOM;
1242         i40e_aq_send_msg_to_vf(hw, abs_vf_id, VIRTCHNL_OP_EVENT, 0, (u8 *)&pfe,
1243                                sizeof(struct virtchnl_pf_event), NULL);
1244 }
1245
1246 static int
1247 i40e_pf_host_process_cmd_request_queues(struct i40e_pf_vf *vf, uint8_t *msg)
1248 {
1249         struct virtchnl_vf_res_request *vfres =
1250                 (struct virtchnl_vf_res_request *)msg;
1251         struct i40e_pf *pf;
1252         uint32_t req_pairs = vfres->num_queue_pairs;
1253         uint32_t cur_pairs = vf->vsi->nb_used_qps;
1254
1255         pf = vf->pf;
1256
1257         if (!rte_is_power_of_2(req_pairs))
1258                 req_pairs = i40e_align_floor(req_pairs) << 1;
1259
1260         if (req_pairs == 0) {
1261                 PMD_DRV_LOG(ERR, "VF %d tried to request 0 queues. Ignoring.\n",
1262                             vf->vf_idx);
1263         } else if (req_pairs > I40E_MAX_QP_NUM_PER_VF) {
1264                 PMD_DRV_LOG(ERR,
1265                             "VF %d tried to request more than %d queues.\n",
1266                             vf->vf_idx,
1267                             I40E_MAX_QP_NUM_PER_VF);
1268                 vfres->num_queue_pairs = I40E_MAX_QP_NUM_PER_VF;
1269         } else if (req_pairs > cur_pairs + pf->qp_pool.num_free) {
1270                 PMD_DRV_LOG(ERR, "VF %d requested %d queues (rounded to %d) "
1271                         "but only %d available\n",
1272                         vf->vf_idx,
1273                         vfres->num_queue_pairs,
1274                         req_pairs,
1275                         cur_pairs + pf->qp_pool.num_free);
1276                 vfres->num_queue_pairs = i40e_align_floor(pf->qp_pool.num_free +
1277                                                           cur_pairs);
1278         } else {
1279                 i40e_vc_notify_vf_reset(vf);
1280                 vf->vsi->nb_qps = req_pairs;
1281                 pf->vf_nb_qps = req_pairs;
1282                 i40e_pf_host_process_cmd_reset_vf(vf);
1283
1284                 return 0;
1285         }
1286
1287         return i40e_pf_host_send_msg_to_vf(vf, VIRTCHNL_OP_REQUEST_QUEUES, 0,
1288                                 (u8 *)vfres, sizeof(*vfres));
1289 }
1290
1291 void
1292 i40e_pf_host_handle_vf_msg(struct rte_eth_dev *dev,
1293                            uint16_t abs_vf_id, uint32_t opcode,
1294                            __rte_unused uint32_t retval,
1295                            uint8_t *msg,
1296                            uint16_t msglen)
1297 {
1298         struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1299         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1300         struct i40e_pf_vf *vf;
1301         /* AdminQ will pass absolute VF id, transfer to internal vf id */
1302         uint16_t vf_id = abs_vf_id - hw->func_caps.vf_base_id;
1303         struct rte_pmd_i40e_mb_event_param ret_param;
1304         uint64_t first_cycle, cur_cycle;
1305         bool b_op = TRUE;
1306         int ret;
1307
1308         if (vf_id > pf->vf_num - 1 || !pf->vfs) {
1309                 PMD_DRV_LOG(ERR, "invalid argument");
1310                 return;
1311         }
1312
1313         vf = &pf->vfs[vf_id];
1314
1315         cur_cycle = rte_get_timer_cycles();
1316
1317         /* if the VF being blocked, ignore the message and return */
1318         if (cur_cycle < vf->ignore_end_cycle)
1319                 return;
1320
1321         if (!vf->vsi) {
1322                 PMD_DRV_LOG(ERR, "NO VSI associated with VF found");
1323                 i40e_pf_host_send_msg_to_vf(vf, opcode,
1324                         I40E_ERR_NO_AVAILABLE_VSI, NULL, 0);
1325                 goto check;
1326         }
1327
1328         /* perform basic checks on the msg */
1329         ret = virtchnl_vc_validate_vf_msg(&vf->version, opcode, msg, msglen);
1330
1331         /* perform additional checks specific to this driver */
1332         if (opcode == VIRTCHNL_OP_CONFIG_RSS_KEY) {
1333                 struct virtchnl_rss_key *vrk = (struct virtchnl_rss_key *)msg;
1334
1335                 if (vrk->key_len != ((I40E_PFQF_HKEY_MAX_INDEX + 1) * 4))
1336                         ret = VIRTCHNL_ERR_PARAM;
1337         } else if (opcode == VIRTCHNL_OP_CONFIG_RSS_LUT) {
1338                 struct virtchnl_rss_lut *vrl = (struct virtchnl_rss_lut *)msg;
1339
1340                 if (vrl->lut_entries != ((I40E_VFQF_HLUT1_MAX_INDEX + 1) * 4))
1341                         ret = VIRTCHNL_ERR_PARAM;
1342         }
1343
1344         if (ret) {
1345                 PMD_DRV_LOG(ERR, "Invalid message from VF %u, opcode %u, len %u",
1346                             vf_id, opcode, msglen);
1347                 i40e_pf_host_send_msg_to_vf(vf, opcode,
1348                                             I40E_ERR_PARAM, NULL, 0);
1349                 goto check;
1350         }
1351
1352         /**
1353          * initialise structure to send to user application
1354          * will return response from user in retval field
1355          */
1356         ret_param.retval = RTE_PMD_I40E_MB_EVENT_PROCEED;
1357         ret_param.vfid = vf_id;
1358         ret_param.msg_type = opcode;
1359         ret_param.msg = (void *)msg;
1360         ret_param.msglen = msglen;
1361
1362         /**
1363          * Ask user application if we're allowed to perform those functions.
1364          * If we get ret_param.retval == RTE_PMD_I40E_MB_EVENT_PROCEED,
1365          * then business as usual.
1366          * If RTE_PMD_I40E_MB_EVENT_NOOP_ACK or RTE_PMD_I40E_MB_EVENT_NOOP_NACK,
1367          * do nothing and send not_supported to VF. As PF must send a response
1368          * to VF and ACK/NACK is not defined.
1369          */
1370         rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_VF_MBOX, &ret_param);
1371         if (ret_param.retval != RTE_PMD_I40E_MB_EVENT_PROCEED) {
1372                 PMD_DRV_LOG(WARNING, "VF to PF message(%d) is not permitted!",
1373                             opcode);
1374                 b_op = FALSE;
1375         }
1376
1377         switch (opcode) {
1378         case VIRTCHNL_OP_VERSION:
1379                 PMD_DRV_LOG(INFO, "OP_VERSION received");
1380                 i40e_pf_host_process_cmd_version(vf, msg, b_op);
1381                 break;
1382         case VIRTCHNL_OP_RESET_VF:
1383                 PMD_DRV_LOG(INFO, "OP_RESET_VF received");
1384                 i40e_pf_host_process_cmd_reset_vf(vf);
1385                 break;
1386         case VIRTCHNL_OP_GET_VF_RESOURCES:
1387                 PMD_DRV_LOG(INFO, "OP_GET_VF_RESOURCES received");
1388                 i40e_pf_host_process_cmd_get_vf_resource(vf, msg, b_op);
1389                 break;
1390         case VIRTCHNL_OP_CONFIG_VSI_QUEUES:
1391                 PMD_DRV_LOG(INFO, "OP_CONFIG_VSI_QUEUES received");
1392                 i40e_pf_host_process_cmd_config_vsi_queues(vf, msg,
1393                                                            msglen, b_op);
1394                 break;
1395         case VIRTCHNL_OP_CONFIG_IRQ_MAP:
1396                 PMD_DRV_LOG(INFO, "OP_CONFIG_IRQ_MAP received");
1397                 i40e_pf_host_process_cmd_config_irq_map(vf, msg, msglen, b_op);
1398                 break;
1399         case VIRTCHNL_OP_ENABLE_QUEUES:
1400                 PMD_DRV_LOG(INFO, "OP_ENABLE_QUEUES received");
1401                 if (b_op) {
1402                         i40e_pf_host_process_cmd_enable_queues(vf, msg, msglen);
1403                         i40e_notify_vf_link_status(dev, vf);
1404                 } else {
1405                         i40e_pf_host_send_msg_to_vf(
1406                                 vf, VIRTCHNL_OP_ENABLE_QUEUES,
1407                                 I40E_NOT_SUPPORTED, NULL, 0);
1408                 }
1409                 break;
1410         case VIRTCHNL_OP_DISABLE_QUEUES:
1411                 PMD_DRV_LOG(INFO, "OP_DISABLE_QUEUE received");
1412                 i40e_pf_host_process_cmd_disable_queues(vf, msg, msglen, b_op);
1413                 break;
1414         case VIRTCHNL_OP_ADD_ETH_ADDR:
1415                 PMD_DRV_LOG(INFO, "OP_ADD_ETHER_ADDRESS received");
1416                 i40e_pf_host_process_cmd_add_ether_address(vf, msg,
1417                                                            msglen, b_op);
1418                 break;
1419         case VIRTCHNL_OP_DEL_ETH_ADDR:
1420                 PMD_DRV_LOG(INFO, "OP_DEL_ETHER_ADDRESS received");
1421                 i40e_pf_host_process_cmd_del_ether_address(vf, msg,
1422                                                            msglen, b_op);
1423                 break;
1424         case VIRTCHNL_OP_ADD_VLAN:
1425                 PMD_DRV_LOG(INFO, "OP_ADD_VLAN received");
1426                 i40e_pf_host_process_cmd_add_vlan(vf, msg, msglen, b_op);
1427                 break;
1428         case VIRTCHNL_OP_DEL_VLAN:
1429                 PMD_DRV_LOG(INFO, "OP_DEL_VLAN received");
1430                 i40e_pf_host_process_cmd_del_vlan(vf, msg, msglen, b_op);
1431                 break;
1432         case VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
1433                 PMD_DRV_LOG(INFO, "OP_CONFIG_PROMISCUOUS_MODE received");
1434                 i40e_pf_host_process_cmd_config_promisc_mode(vf, msg,
1435                                                              msglen, b_op);
1436                 break;
1437         case VIRTCHNL_OP_GET_STATS:
1438                 PMD_DRV_LOG(INFO, "OP_GET_STATS received");
1439                 i40e_pf_host_process_cmd_get_stats(vf, b_op);
1440                 break;
1441         case VIRTCHNL_OP_ENABLE_VLAN_STRIPPING:
1442                 PMD_DRV_LOG(INFO, "OP_ENABLE_VLAN_STRIPPING received");
1443                 i40e_pf_host_process_cmd_enable_vlan_strip(vf, b_op);
1444                 break;
1445         case VIRTCHNL_OP_DISABLE_VLAN_STRIPPING:
1446                 PMD_DRV_LOG(INFO, "OP_DISABLE_VLAN_STRIPPING received");
1447                 i40e_pf_host_process_cmd_disable_vlan_strip(vf, b_op);
1448                 break;
1449         case VIRTCHNL_OP_CONFIG_RSS_LUT:
1450                 PMD_DRV_LOG(INFO, "OP_CONFIG_RSS_LUT received");
1451                 i40e_pf_host_process_cmd_set_rss_lut(vf, msg, msglen, b_op);
1452                 break;
1453         case VIRTCHNL_OP_CONFIG_RSS_KEY:
1454                 PMD_DRV_LOG(INFO, "OP_CONFIG_RSS_KEY received");
1455                 i40e_pf_host_process_cmd_set_rss_key(vf, msg, msglen, b_op);
1456                 break;
1457         case VIRTCHNL_OP_REQUEST_QUEUES:
1458                 PMD_DRV_LOG(INFO, "OP_REQUEST_QUEUES received");
1459                 i40e_pf_host_process_cmd_request_queues(vf, msg);
1460                 break;
1461
1462         /* Don't add command supported below, which will
1463          * return an error code.
1464          */
1465         default:
1466                 PMD_DRV_LOG(ERR, "%u received, not supported", opcode);
1467                 i40e_pf_host_send_msg_to_vf(vf, opcode, I40E_ERR_PARAM,
1468                                                                 NULL, 0);
1469                 break;
1470         }
1471
1472 check:
1473         /* if message validation not enabled */
1474         if (!pf->vf_msg_cfg.max_msg)
1475                 return;
1476
1477         /* store current cycle */
1478         vf->msg_timestamps[vf->msg_index++] = cur_cycle;
1479         vf->msg_index %= pf->vf_msg_cfg.max_msg;
1480
1481         /* read the timestamp of earliest message */
1482         first_cycle = vf->msg_timestamps[vf->msg_index];
1483
1484         /*
1485          * If the time span from the arrival time of first message to
1486          * the arrival time of current message smaller than `period`,
1487          * that mean too much message in this statistic period.
1488          */
1489         if (first_cycle && cur_cycle < first_cycle +
1490                         (uint64_t)pf->vf_msg_cfg.period * rte_get_timer_hz()) {
1491                 PMD_DRV_LOG(WARNING, "VF %u too much messages(%u in %u"
1492                                 " seconds),\n\tany new message from which"
1493                                 " will be ignored during next %u seconds!",
1494                                 vf_id, pf->vf_msg_cfg.max_msg,
1495                                 (uint32_t)((cur_cycle - first_cycle +
1496                                 rte_get_timer_hz() - 1) / rte_get_timer_hz()),
1497                                 pf->vf_msg_cfg.ignore_second);
1498                 vf->ignore_end_cycle = rte_get_timer_cycles() +
1499                                 pf->vf_msg_cfg.ignore_second *
1500                                 rte_get_timer_hz();
1501         }
1502 }
1503
1504 int
1505 i40e_pf_host_init(struct rte_eth_dev *dev)
1506 {
1507         struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1508         struct i40e_hw *hw = I40E_PF_TO_HW(pf);
1509         size_t size;
1510         int ret, i;
1511         uint32_t val;
1512
1513         PMD_INIT_FUNC_TRACE();
1514
1515         /**
1516          * return if SRIOV not enabled, VF number not configured or
1517          * no queue assigned.
1518          */
1519         if(!hw->func_caps.sr_iov_1_1 || pf->vf_num == 0 || pf->vf_nb_qps == 0)
1520                 return I40E_SUCCESS;
1521
1522         /* Allocate memory to store VF structure */
1523         pf->vfs = rte_zmalloc("i40e_pf_vf",sizeof(*pf->vfs) * pf->vf_num, 0);
1524         if(pf->vfs == NULL)
1525                 return -ENOMEM;
1526
1527         /* Disable irq0 for VFR event */
1528         i40e_pf_disable_irq0(hw);
1529
1530         /* Disable VF link status interrupt */
1531         val = I40E_READ_REG(hw, I40E_PFGEN_PORTMDIO_NUM);
1532         val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
1533         I40E_WRITE_REG(hw, I40E_PFGEN_PORTMDIO_NUM, val);
1534         I40E_WRITE_FLUSH(hw);
1535
1536         /* calculate the memory size for storing timestamp of messages */
1537         size = pf->vf_msg_cfg.max_msg * sizeof(uint64_t);
1538
1539         for (i = 0; i < pf->vf_num; i++) {
1540                 pf->vfs[i].pf = pf;
1541                 pf->vfs[i].state = I40E_VF_INACTIVE;
1542                 pf->vfs[i].vf_idx = i;
1543
1544                 if (size) {
1545                         /* allocate memory for store timestamp of messages */
1546                         pf->vfs[i].msg_timestamps =
1547                                         rte_zmalloc("i40e_pf_vf", size, 0);
1548                         if (pf->vfs[i].msg_timestamps == NULL) {
1549                                 ret = -ENOMEM;
1550                                 goto fail;
1551                         }
1552                 }
1553
1554                 ret = i40e_pf_host_vf_reset(&pf->vfs[i], 0);
1555                 if (ret != I40E_SUCCESS)
1556                         goto fail;
1557         }
1558
1559         RTE_ETH_DEV_SRIOV(dev).active = pf->vf_num;
1560         /* restore irq0 */
1561         i40e_pf_enable_irq0(hw);
1562
1563         return I40E_SUCCESS;
1564
1565 fail:
1566         for (; i >= 0; i--)
1567                 rte_free(pf->vfs[i].msg_timestamps);
1568         rte_free(pf->vfs);
1569         i40e_pf_enable_irq0(hw);
1570
1571         return ret;
1572 }
1573
1574 int
1575 i40e_pf_host_uninit(struct rte_eth_dev *dev)
1576 {
1577         struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1578         struct i40e_hw *hw = I40E_PF_TO_HW(pf);
1579         uint32_t val;
1580         int i;
1581
1582         PMD_INIT_FUNC_TRACE();
1583
1584         /**
1585          * return if SRIOV not enabled, VF number not configured or
1586          * no queue assigned.
1587          */
1588         if ((!hw->func_caps.sr_iov_1_1) ||
1589                 (pf->vf_num == 0) ||
1590                 (pf->vf_nb_qps == 0))
1591                 return I40E_SUCCESS;
1592
1593         /* free memory for store timestamp of messages */
1594         for (i = 0; i < pf->vf_num; i++)
1595                 rte_free(pf->vfs[i].msg_timestamps);
1596
1597         /* free memory to store VF structure */
1598         rte_free(pf->vfs);
1599         pf->vfs = NULL;
1600
1601         /* Disable irq0 for VFR event */
1602         i40e_pf_disable_irq0(hw);
1603
1604         /* Disable VF link status interrupt */
1605         val = I40E_READ_REG(hw, I40E_PFGEN_PORTMDIO_NUM);
1606         val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
1607         I40E_WRITE_REG(hw, I40E_PFGEN_PORTMDIO_NUM, val);
1608         I40E_WRITE_FLUSH(hw);
1609
1610         return I40E_SUCCESS;
1611 }