1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2015 Intel Corporation
8 #define RTE_PMD_I40E_RX_MAX_BURST 32
9 #define RTE_PMD_I40E_TX_MAX_BURST 32
11 #define RTE_I40E_VPMD_RX_BURST 32
12 #define RTE_I40E_VPMD_TX_BURST 32
13 #define RTE_I40E_RXQ_REARM_THRESH 32
14 #define RTE_I40E_MAX_RX_BURST RTE_I40E_RXQ_REARM_THRESH
15 #define RTE_I40E_TX_MAX_FREE_BUF_SZ 64
16 #define RTE_I40E_DESCS_PER_LOOP 4
18 #define I40E_RXBUF_SZ_1024 1024
19 #define I40E_RXBUF_SZ_2048 2048
21 /* In none-PXE mode QLEN must be whole number of 32 descriptors. */
22 #define I40E_ALIGN_RING_DESC 32
24 #define I40E_MIN_RING_DESC 64
25 #define I40E_MAX_RING_DESC 4096
27 #define I40E_FDIR_NUM_TX_DESC (I40E_FDIR_PRG_PKT_CNT << 1)
28 #define I40E_FDIR_NUM_RX_DESC (I40E_FDIR_PRG_PKT_CNT << 1)
30 #define I40E_MIN_TSO_MSS 256
31 #define I40E_MAX_TSO_MSS 9674
33 #define I40E_TX_MAX_SEG UINT8_MAX
34 #define I40E_TX_MAX_MTU_SEG 8
36 #define I40E_TX_MIN_PKT_LEN 17
38 /* Shared FDIR masks between scalar / vector drivers */
39 #define I40E_RX_DESC_EXT_STATUS_FLEXBH_MASK 0x03
40 #define I40E_RX_DESC_EXT_STATUS_FLEXBH_FD_ID 0x01
41 #define I40E_RX_DESC_EXT_STATUS_FLEXBH_FLEX 0x02
42 #define I40E_RX_DESC_EXT_STATUS_FLEXBL_MASK 0x03
43 #define I40E_RX_DESC_EXT_STATUS_FLEXBL_FLEX 0x01
46 #define container_of(ptr, type, member) ({ \
47 typeof(((type *)0)->member)(*__mptr) = (ptr); \
48 (type *)((char *)__mptr - offsetof(type, member)); })
50 #define I40E_TD_CMD (I40E_TX_DESC_CMD_ICRC |\
53 enum i40e_header_split_mode {
54 i40e_header_split_none = 0,
55 i40e_header_split_enabled = 1,
56 i40e_header_split_always = 2,
57 i40e_header_split_reserved
60 #define I40E_HEADER_SPLIT_NONE ((uint8_t)0)
61 #define I40E_HEADER_SPLIT_L2 ((uint8_t)(1 << 0))
62 #define I40E_HEADER_SPLIT_IP ((uint8_t)(1 << 1))
63 #define I40E_HEADER_SPLIT_UDP_TCP ((uint8_t)(1 << 2))
64 #define I40E_HEADER_SPLIT_SCTP ((uint8_t)(1 << 3))
65 #define I40E_HEADER_SPLIT_ALL (I40E_HEADER_SPLIT_L2 | \
66 I40E_HEADER_SPLIT_IP | \
67 I40E_HEADER_SPLIT_UDP_TCP | \
68 I40E_HEADER_SPLIT_SCTP)
70 /* HW desc structure, both 16-byte and 32-byte types are supported */
71 #ifdef RTE_LIBRTE_I40E_16BYTE_RX_DESC
72 #define i40e_rx_desc i40e_16byte_rx_desc
74 #define i40e_rx_desc i40e_32byte_rx_desc
77 struct i40e_rx_entry {
78 struct rte_mbuf *mbuf;
82 * Structure associated with each RX queue.
84 struct i40e_rx_queue {
85 struct rte_mempool *mp; /**< mbuf pool to populate RX ring */
86 volatile union i40e_rx_desc *rx_ring;/**< RX ring virtual address */
87 uint64_t rx_ring_phys_addr; /**< RX ring DMA address */
88 struct i40e_rx_entry *sw_ring; /**< address of RX soft ring */
89 uint16_t nb_rx_desc; /**< number of RX descriptors */
90 uint16_t rx_free_thresh; /**< max free RX desc to hold */
91 uint16_t rx_tail; /**< current value of tail */
92 uint16_t nb_rx_hold; /**< number of held free RX desc */
93 struct rte_mbuf *pkt_first_seg; /**< first segment of current packet */
94 struct rte_mbuf *pkt_last_seg; /**< last segment of current packet */
95 struct rte_mbuf fake_mbuf; /**< dummy mbuf */
96 #ifdef RTE_LIBRTE_I40E_RX_ALLOW_BULK_ALLOC
97 uint16_t rx_nb_avail; /**< number of staged packets ready */
98 uint16_t rx_next_avail; /**< index of next staged packets */
99 uint16_t rx_free_trigger; /**< triggers rx buffer allocation */
100 struct rte_mbuf *rx_stage[RTE_PMD_I40E_RX_MAX_BURST * 2];
103 uint16_t rxrearm_nb; /**< number of remaining to be re-armed */
104 uint16_t rxrearm_start; /**< the idx we start the re-arming from */
105 uint64_t mbuf_initializer; /**< value to init mbufs */
107 uint16_t port_id; /**< device port ID */
108 uint8_t crc_len; /**< 0 if CRC stripped, 4 otherwise */
109 uint8_t fdir_enabled; /**< 0 if FDIR disabled, 1 when enabled */
110 uint16_t queue_id; /**< RX queue index */
111 uint16_t reg_idx; /**< RX queue register index */
112 uint8_t drop_en; /**< if not 0, set register bit */
113 volatile uint8_t *qrx_tail; /**< register address of tail */
114 struct i40e_vsi *vsi; /**< the VSI this queue belongs to */
115 uint16_t rx_buf_len; /* The packet buffer size */
116 uint16_t rx_hdr_len; /* The header buffer size */
117 uint16_t max_pkt_len; /* Maximum packet length */
118 uint8_t hs_mode; /* Header Split mode */
119 bool q_set; /**< indicate if rx queue has been configured */
120 bool rx_deferred_start; /**< don't start this queue in dev start */
121 uint16_t rx_using_sse; /**<flag indicate the usage of vPMD for rx */
122 uint8_t dcb_tc; /**< Traffic class of rx queue */
123 uint64_t offloads; /**< Rx offload flags of DEV_RX_OFFLOAD_* */
124 const struct rte_memzone *mz;
127 struct i40e_tx_entry {
128 struct rte_mbuf *mbuf;
133 struct i40e_vec_tx_entry {
134 struct rte_mbuf *mbuf;
138 * Structure associated with each TX queue.
140 struct i40e_tx_queue {
141 uint16_t nb_tx_desc; /**< number of TX descriptors */
142 uint64_t tx_ring_phys_addr; /**< TX ring DMA address */
143 volatile struct i40e_tx_desc *tx_ring; /**< TX ring virtual address */
144 struct i40e_tx_entry *sw_ring; /**< virtual address of SW ring */
145 uint16_t tx_tail; /**< current value of tail register */
146 volatile uint8_t *qtx_tail; /**< register address of tail */
147 uint16_t nb_tx_used; /**< number of TX desc used since RS bit set */
148 /**< index to last TX descriptor to have been cleaned */
149 uint16_t last_desc_cleaned;
150 /**< Total number of TX descriptors ready to be allocated. */
152 /**< Start freeing TX buffers if there are less free descriptors than
154 uint16_t tx_free_thresh;
155 /** Number of TX descriptors to use before RS bit is set. */
156 uint16_t tx_rs_thresh;
157 uint8_t pthresh; /**< Prefetch threshold register. */
158 uint8_t hthresh; /**< Host threshold register. */
159 uint8_t wthresh; /**< Write-back threshold reg. */
160 uint16_t port_id; /**< Device port identifier. */
161 uint16_t queue_id; /**< TX queue index. */
163 struct i40e_vsi *vsi; /**< the VSI this queue belongs to */
166 bool q_set; /**< indicate if tx queue has been configured */
167 bool tx_deferred_start; /**< don't start this queue in dev start */
168 uint8_t dcb_tc; /**< Traffic class of tx queue */
169 uint64_t offloads; /**< Tx offload flags of DEV_RX_OFFLOAD_* */
170 const struct rte_memzone *mz;
173 /** Offload features */
174 union i40e_tx_offload {
177 uint64_t l2_len:7; /**< L2 (MAC) Header Length. */
178 uint64_t l3_len:9; /**< L3 (IP) Header Length. */
179 uint64_t l4_len:8; /**< L4 Header Length. */
180 uint64_t tso_segsz:16; /**< TCP TSO segment size */
181 uint64_t outer_l2_len:8; /**< outer L2 Header Length */
182 uint64_t outer_l3_len:16; /**< outer L3 Header Length */
186 int i40e_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);
187 int i40e_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);
188 int i40e_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);
189 int i40e_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id);
190 const uint32_t *i40e_dev_supported_ptypes_get(struct rte_eth_dev *dev);
191 int i40e_dev_rx_queue_setup(struct rte_eth_dev *dev,
194 unsigned int socket_id,
195 const struct rte_eth_rxconf *rx_conf,
196 struct rte_mempool *mp);
197 int i40e_dev_tx_queue_setup(struct rte_eth_dev *dev,
200 unsigned int socket_id,
201 const struct rte_eth_txconf *tx_conf);
202 void i40e_rx_queue_release(void *rxq);
203 void i40e_tx_queue_release(void *txq);
204 void i40e_dev_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid);
205 void i40e_dev_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid);
206 uint16_t i40e_recv_pkts(void *rx_queue,
207 struct rte_mbuf **rx_pkts,
209 uint16_t i40e_recv_scattered_pkts(void *rx_queue,
210 struct rte_mbuf **rx_pkts,
212 uint16_t i40e_xmit_pkts(void *tx_queue,
213 struct rte_mbuf **tx_pkts,
215 uint16_t i40e_simple_prep_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
217 uint16_t i40e_prep_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
219 int i40e_tx_queue_init(struct i40e_tx_queue *txq);
220 int i40e_rx_queue_init(struct i40e_rx_queue *rxq);
221 void i40e_free_tx_resources(struct i40e_tx_queue *txq);
222 void i40e_free_rx_resources(struct i40e_rx_queue *rxq);
223 void i40e_dev_clear_queues(struct rte_eth_dev *dev);
224 void i40e_dev_free_queues(struct rte_eth_dev *dev);
225 void i40e_reset_rx_queue(struct i40e_rx_queue *rxq);
226 void i40e_reset_tx_queue(struct i40e_tx_queue *txq);
227 void i40e_tx_queue_release_mbufs(struct i40e_tx_queue *txq);
228 int i40e_tx_done_cleanup(void *txq, uint32_t free_cnt);
229 int i40e_alloc_rx_queue_mbufs(struct i40e_rx_queue *rxq);
230 void i40e_rx_queue_release_mbufs(struct i40e_rx_queue *rxq);
232 uint32_t i40e_dev_rx_queue_count(struct rte_eth_dev *dev,
233 uint16_t rx_queue_id);
234 int i40e_dev_rx_descriptor_status(void *rx_queue, uint16_t offset);
235 int i40e_dev_tx_descriptor_status(void *tx_queue, uint16_t offset);
237 uint16_t i40e_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
239 uint16_t i40e_recv_scattered_pkts_vec(void *rx_queue,
240 struct rte_mbuf **rx_pkts,
242 int i40e_rx_vec_dev_conf_condition_check(struct rte_eth_dev *dev);
243 int i40e_rxq_vec_setup(struct i40e_rx_queue *rxq);
244 int i40e_txq_vec_setup(struct i40e_tx_queue *txq);
245 void i40e_rx_queue_release_mbufs_vec(struct i40e_rx_queue *rxq);
246 uint16_t i40e_xmit_fixed_burst_vec(void *tx_queue, struct rte_mbuf **tx_pkts,
248 void i40e_set_rx_function(struct rte_eth_dev *dev);
249 void i40e_set_tx_function_flag(struct rte_eth_dev *dev,
250 struct i40e_tx_queue *txq);
251 void i40e_set_tx_function(struct rte_eth_dev *dev);
252 void i40e_set_default_ptype_table(struct rte_eth_dev *dev);
253 void i40e_set_default_pctype_table(struct rte_eth_dev *dev);
254 uint16_t i40e_recv_pkts_vec_avx2(void *rx_queue, struct rte_mbuf **rx_pkts,
256 uint16_t i40e_recv_scattered_pkts_vec_avx2(void *rx_queue,
257 struct rte_mbuf **rx_pkts, uint16_t nb_pkts);
258 uint16_t i40e_xmit_pkts_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,
260 int i40e_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc);
261 uint16_t i40e_recv_pkts_vec_avx512(void *rx_queue,
262 struct rte_mbuf **rx_pkts,
264 uint16_t i40e_recv_scattered_pkts_vec_avx512(void *rx_queue,
265 struct rte_mbuf **rx_pkts,
267 uint16_t i40e_xmit_pkts_vec_avx512(void *tx_queue,
268 struct rte_mbuf **tx_pkts,
271 /* For each value it means, datasheet of hardware can tell more details
273 * @note: fix i40e_dev_supported_ptypes_get() if any change here.
275 static inline uint32_t
276 i40e_get_default_pkt_type(uint8_t ptype)
278 static const uint32_t type_table[UINT8_MAX + 1] __rte_cache_aligned = {
281 [1] = RTE_PTYPE_L2_ETHER,
282 [2] = RTE_PTYPE_L2_ETHER_TIMESYNC,
283 /* [3] - [5] reserved */
284 [6] = RTE_PTYPE_L2_ETHER_LLDP,
285 /* [7] - [10] reserved */
286 [11] = RTE_PTYPE_L2_ETHER_ARP,
287 /* [12] - [21] reserved */
289 /* Non tunneled IPv4 */
290 [22] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
292 [23] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
293 RTE_PTYPE_L4_NONFRAG,
294 [24] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
297 [26] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
299 [27] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
301 [28] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
305 [29] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
306 RTE_PTYPE_TUNNEL_IP |
307 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
308 RTE_PTYPE_INNER_L4_FRAG,
309 [30] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
310 RTE_PTYPE_TUNNEL_IP |
311 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
312 RTE_PTYPE_INNER_L4_NONFRAG,
313 [31] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
314 RTE_PTYPE_TUNNEL_IP |
315 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
316 RTE_PTYPE_INNER_L4_UDP,
318 [33] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
319 RTE_PTYPE_TUNNEL_IP |
320 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
321 RTE_PTYPE_INNER_L4_TCP,
322 [34] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
323 RTE_PTYPE_TUNNEL_IP |
324 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
325 RTE_PTYPE_INNER_L4_SCTP,
326 [35] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
327 RTE_PTYPE_TUNNEL_IP |
328 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
329 RTE_PTYPE_INNER_L4_ICMP,
332 [36] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
333 RTE_PTYPE_TUNNEL_IP |
334 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
335 RTE_PTYPE_INNER_L4_FRAG,
336 [37] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
337 RTE_PTYPE_TUNNEL_IP |
338 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
339 RTE_PTYPE_INNER_L4_NONFRAG,
340 [38] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
341 RTE_PTYPE_TUNNEL_IP |
342 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
343 RTE_PTYPE_INNER_L4_UDP,
345 [40] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
346 RTE_PTYPE_TUNNEL_IP |
347 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
348 RTE_PTYPE_INNER_L4_TCP,
349 [41] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
350 RTE_PTYPE_TUNNEL_IP |
351 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
352 RTE_PTYPE_INNER_L4_SCTP,
353 [42] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
354 RTE_PTYPE_TUNNEL_IP |
355 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
356 RTE_PTYPE_INNER_L4_ICMP,
358 /* IPv4 --> GRE/Teredo/VXLAN */
359 [43] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
360 RTE_PTYPE_TUNNEL_GRENAT,
362 /* IPv4 --> GRE/Teredo/VXLAN --> IPv4 */
363 [44] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
364 RTE_PTYPE_TUNNEL_GRENAT |
365 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
366 RTE_PTYPE_INNER_L4_FRAG,
367 [45] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
368 RTE_PTYPE_TUNNEL_GRENAT |
369 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
370 RTE_PTYPE_INNER_L4_NONFRAG,
371 [46] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
372 RTE_PTYPE_TUNNEL_GRENAT |
373 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
374 RTE_PTYPE_INNER_L4_UDP,
376 [48] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
377 RTE_PTYPE_TUNNEL_GRENAT |
378 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
379 RTE_PTYPE_INNER_L4_TCP,
380 [49] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
381 RTE_PTYPE_TUNNEL_GRENAT |
382 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
383 RTE_PTYPE_INNER_L4_SCTP,
384 [50] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
385 RTE_PTYPE_TUNNEL_GRENAT |
386 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
387 RTE_PTYPE_INNER_L4_ICMP,
389 /* IPv4 --> GRE/Teredo/VXLAN --> IPv6 */
390 [51] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
391 RTE_PTYPE_TUNNEL_GRENAT |
392 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
393 RTE_PTYPE_INNER_L4_FRAG,
394 [52] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
395 RTE_PTYPE_TUNNEL_GRENAT |
396 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
397 RTE_PTYPE_INNER_L4_NONFRAG,
398 [53] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
399 RTE_PTYPE_TUNNEL_GRENAT |
400 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
401 RTE_PTYPE_INNER_L4_UDP,
403 [55] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
404 RTE_PTYPE_TUNNEL_GRENAT |
405 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
406 RTE_PTYPE_INNER_L4_TCP,
407 [56] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
408 RTE_PTYPE_TUNNEL_GRENAT |
409 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
410 RTE_PTYPE_INNER_L4_SCTP,
411 [57] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
412 RTE_PTYPE_TUNNEL_GRENAT |
413 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
414 RTE_PTYPE_INNER_L4_ICMP,
416 /* IPv4 --> GRE/Teredo/VXLAN --> MAC */
417 [58] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
418 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER,
420 /* IPv4 --> GRE/Teredo/VXLAN --> MAC --> IPv4 */
421 [59] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
422 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
423 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
424 RTE_PTYPE_INNER_L4_FRAG,
425 [60] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
426 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
427 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
428 RTE_PTYPE_INNER_L4_NONFRAG,
429 [61] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
430 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
431 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
432 RTE_PTYPE_INNER_L4_UDP,
434 [63] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
435 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
436 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
437 RTE_PTYPE_INNER_L4_TCP,
438 [64] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
439 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
440 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
441 RTE_PTYPE_INNER_L4_SCTP,
442 [65] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
443 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
444 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
445 RTE_PTYPE_INNER_L4_ICMP,
447 /* IPv4 --> GRE/Teredo/VXLAN --> MAC --> IPv6 */
448 [66] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
449 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
450 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
451 RTE_PTYPE_INNER_L4_FRAG,
452 [67] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
453 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
454 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
455 RTE_PTYPE_INNER_L4_NONFRAG,
456 [68] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
457 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
458 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
459 RTE_PTYPE_INNER_L4_UDP,
461 [70] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
462 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
463 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
464 RTE_PTYPE_INNER_L4_TCP,
465 [71] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
466 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
467 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
468 RTE_PTYPE_INNER_L4_SCTP,
469 [72] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
470 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
471 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
472 RTE_PTYPE_INNER_L4_ICMP,
474 /* IPv4 --> GRE/Teredo/VXLAN --> MAC/VLAN */
475 [73] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
476 RTE_PTYPE_TUNNEL_GRENAT |
477 RTE_PTYPE_INNER_L2_ETHER_VLAN,
479 /* IPv4 --> GRE/Teredo/VXLAN --> MAC/VLAN --> IPv4 */
480 [74] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
481 RTE_PTYPE_TUNNEL_GRENAT |
482 RTE_PTYPE_INNER_L2_ETHER_VLAN |
483 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
484 RTE_PTYPE_INNER_L4_FRAG,
485 [75] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
486 RTE_PTYPE_TUNNEL_GRENAT |
487 RTE_PTYPE_INNER_L2_ETHER_VLAN |
488 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
489 RTE_PTYPE_INNER_L4_NONFRAG,
490 [76] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
491 RTE_PTYPE_TUNNEL_GRENAT |
492 RTE_PTYPE_INNER_L2_ETHER_VLAN |
493 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
494 RTE_PTYPE_INNER_L4_UDP,
496 [78] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
497 RTE_PTYPE_TUNNEL_GRENAT |
498 RTE_PTYPE_INNER_L2_ETHER_VLAN |
499 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
500 RTE_PTYPE_INNER_L4_TCP,
501 [79] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
502 RTE_PTYPE_TUNNEL_GRENAT |
503 RTE_PTYPE_INNER_L2_ETHER_VLAN |
504 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
505 RTE_PTYPE_INNER_L4_SCTP,
506 [80] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
507 RTE_PTYPE_TUNNEL_GRENAT |
508 RTE_PTYPE_INNER_L2_ETHER_VLAN |
509 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
510 RTE_PTYPE_INNER_L4_ICMP,
512 /* IPv4 --> GRE/Teredo/VXLAN --> MAC/VLAN --> IPv6 */
513 [81] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
514 RTE_PTYPE_TUNNEL_GRENAT |
515 RTE_PTYPE_INNER_L2_ETHER_VLAN |
516 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
517 RTE_PTYPE_INNER_L4_FRAG,
518 [82] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
519 RTE_PTYPE_TUNNEL_GRENAT |
520 RTE_PTYPE_INNER_L2_ETHER_VLAN |
521 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
522 RTE_PTYPE_INNER_L4_NONFRAG,
523 [83] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
524 RTE_PTYPE_TUNNEL_GRENAT |
525 RTE_PTYPE_INNER_L2_ETHER_VLAN |
526 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
527 RTE_PTYPE_INNER_L4_UDP,
529 [85] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
530 RTE_PTYPE_TUNNEL_GRENAT |
531 RTE_PTYPE_INNER_L2_ETHER_VLAN |
532 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
533 RTE_PTYPE_INNER_L4_TCP,
534 [86] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
535 RTE_PTYPE_TUNNEL_GRENAT |
536 RTE_PTYPE_INNER_L2_ETHER_VLAN |
537 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
538 RTE_PTYPE_INNER_L4_SCTP,
539 [87] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
540 RTE_PTYPE_TUNNEL_GRENAT |
541 RTE_PTYPE_INNER_L2_ETHER_VLAN |
542 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
543 RTE_PTYPE_INNER_L4_ICMP,
545 /* Non tunneled IPv6 */
546 [88] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
548 [89] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
549 RTE_PTYPE_L4_NONFRAG,
550 [90] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
553 [92] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
555 [93] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
557 [94] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
561 [95] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
562 RTE_PTYPE_TUNNEL_IP |
563 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
564 RTE_PTYPE_INNER_L4_FRAG,
565 [96] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
566 RTE_PTYPE_TUNNEL_IP |
567 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
568 RTE_PTYPE_INNER_L4_NONFRAG,
569 [97] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
570 RTE_PTYPE_TUNNEL_IP |
571 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
572 RTE_PTYPE_INNER_L4_UDP,
574 [99] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
575 RTE_PTYPE_TUNNEL_IP |
576 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
577 RTE_PTYPE_INNER_L4_TCP,
578 [100] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
579 RTE_PTYPE_TUNNEL_IP |
580 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
581 RTE_PTYPE_INNER_L4_SCTP,
582 [101] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
583 RTE_PTYPE_TUNNEL_IP |
584 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
585 RTE_PTYPE_INNER_L4_ICMP,
588 [102] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
589 RTE_PTYPE_TUNNEL_IP |
590 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
591 RTE_PTYPE_INNER_L4_FRAG,
592 [103] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
593 RTE_PTYPE_TUNNEL_IP |
594 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
595 RTE_PTYPE_INNER_L4_NONFRAG,
596 [104] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
597 RTE_PTYPE_TUNNEL_IP |
598 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
599 RTE_PTYPE_INNER_L4_UDP,
601 [106] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
602 RTE_PTYPE_TUNNEL_IP |
603 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
604 RTE_PTYPE_INNER_L4_TCP,
605 [107] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
606 RTE_PTYPE_TUNNEL_IP |
607 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
608 RTE_PTYPE_INNER_L4_SCTP,
609 [108] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
610 RTE_PTYPE_TUNNEL_IP |
611 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
612 RTE_PTYPE_INNER_L4_ICMP,
614 /* IPv6 --> GRE/Teredo/VXLAN */
615 [109] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
616 RTE_PTYPE_TUNNEL_GRENAT,
618 /* IPv6 --> GRE/Teredo/VXLAN --> IPv4 */
619 [110] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
620 RTE_PTYPE_TUNNEL_GRENAT |
621 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
622 RTE_PTYPE_INNER_L4_FRAG,
623 [111] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
624 RTE_PTYPE_TUNNEL_GRENAT |
625 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
626 RTE_PTYPE_INNER_L4_NONFRAG,
627 [112] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
628 RTE_PTYPE_TUNNEL_GRENAT |
629 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
630 RTE_PTYPE_INNER_L4_UDP,
632 [114] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
633 RTE_PTYPE_TUNNEL_GRENAT |
634 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
635 RTE_PTYPE_INNER_L4_TCP,
636 [115] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
637 RTE_PTYPE_TUNNEL_GRENAT |
638 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
639 RTE_PTYPE_INNER_L4_SCTP,
640 [116] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
641 RTE_PTYPE_TUNNEL_GRENAT |
642 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
643 RTE_PTYPE_INNER_L4_ICMP,
645 /* IPv6 --> GRE/Teredo/VXLAN --> IPv6 */
646 [117] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
647 RTE_PTYPE_TUNNEL_GRENAT |
648 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
649 RTE_PTYPE_INNER_L4_FRAG,
650 [118] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
651 RTE_PTYPE_TUNNEL_GRENAT |
652 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
653 RTE_PTYPE_INNER_L4_NONFRAG,
654 [119] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
655 RTE_PTYPE_TUNNEL_GRENAT |
656 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
657 RTE_PTYPE_INNER_L4_UDP,
659 [121] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
660 RTE_PTYPE_TUNNEL_GRENAT |
661 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
662 RTE_PTYPE_INNER_L4_TCP,
663 [122] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
664 RTE_PTYPE_TUNNEL_GRENAT |
665 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
666 RTE_PTYPE_INNER_L4_SCTP,
667 [123] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
668 RTE_PTYPE_TUNNEL_GRENAT |
669 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
670 RTE_PTYPE_INNER_L4_ICMP,
672 /* IPv6 --> GRE/Teredo/VXLAN --> MAC */
673 [124] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
674 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER,
676 /* IPv6 --> GRE/Teredo/VXLAN --> MAC --> IPv4 */
677 [125] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
678 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
679 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
680 RTE_PTYPE_INNER_L4_FRAG,
681 [126] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
682 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
683 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
684 RTE_PTYPE_INNER_L4_NONFRAG,
685 [127] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
686 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
687 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
688 RTE_PTYPE_INNER_L4_UDP,
690 [129] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
691 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
692 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
693 RTE_PTYPE_INNER_L4_TCP,
694 [130] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
695 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
696 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
697 RTE_PTYPE_INNER_L4_SCTP,
698 [131] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
699 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
700 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
701 RTE_PTYPE_INNER_L4_ICMP,
703 /* IPv6 --> GRE/Teredo/VXLAN --> MAC --> IPv6 */
704 [132] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
705 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
706 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
707 RTE_PTYPE_INNER_L4_FRAG,
708 [133] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
709 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
710 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
711 RTE_PTYPE_INNER_L4_NONFRAG,
712 [134] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
713 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
714 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
715 RTE_PTYPE_INNER_L4_UDP,
717 [136] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
718 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
719 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
720 RTE_PTYPE_INNER_L4_TCP,
721 [137] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
722 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
723 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
724 RTE_PTYPE_INNER_L4_SCTP,
725 [138] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
726 RTE_PTYPE_TUNNEL_GRENAT | RTE_PTYPE_INNER_L2_ETHER |
727 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
728 RTE_PTYPE_INNER_L4_ICMP,
730 /* IPv6 --> GRE/Teredo/VXLAN --> MAC/VLAN */
731 [139] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
732 RTE_PTYPE_TUNNEL_GRENAT |
733 RTE_PTYPE_INNER_L2_ETHER_VLAN,
735 /* IPv6 --> GRE/Teredo/VXLAN --> MAC/VLAN --> IPv4 */
736 [140] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
737 RTE_PTYPE_TUNNEL_GRENAT |
738 RTE_PTYPE_INNER_L2_ETHER_VLAN |
739 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
740 RTE_PTYPE_INNER_L4_FRAG,
741 [141] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
742 RTE_PTYPE_TUNNEL_GRENAT |
743 RTE_PTYPE_INNER_L2_ETHER_VLAN |
744 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
745 RTE_PTYPE_INNER_L4_NONFRAG,
746 [142] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
747 RTE_PTYPE_TUNNEL_GRENAT |
748 RTE_PTYPE_INNER_L2_ETHER_VLAN |
749 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
750 RTE_PTYPE_INNER_L4_UDP,
752 [144] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
753 RTE_PTYPE_TUNNEL_GRENAT |
754 RTE_PTYPE_INNER_L2_ETHER_VLAN |
755 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
756 RTE_PTYPE_INNER_L4_TCP,
757 [145] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
758 RTE_PTYPE_TUNNEL_GRENAT |
759 RTE_PTYPE_INNER_L2_ETHER_VLAN |
760 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
761 RTE_PTYPE_INNER_L4_SCTP,
762 [146] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
763 RTE_PTYPE_TUNNEL_GRENAT |
764 RTE_PTYPE_INNER_L2_ETHER_VLAN |
765 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
766 RTE_PTYPE_INNER_L4_ICMP,
768 /* IPv6 --> GRE/Teredo/VXLAN --> MAC/VLAN --> IPv6 */
769 [147] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
770 RTE_PTYPE_TUNNEL_GRENAT |
771 RTE_PTYPE_INNER_L2_ETHER_VLAN |
772 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
773 RTE_PTYPE_INNER_L4_FRAG,
774 [148] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
775 RTE_PTYPE_TUNNEL_GRENAT |
776 RTE_PTYPE_INNER_L2_ETHER_VLAN |
777 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
778 RTE_PTYPE_INNER_L4_NONFRAG,
779 [149] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
780 RTE_PTYPE_TUNNEL_GRENAT |
781 RTE_PTYPE_INNER_L2_ETHER_VLAN |
782 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
783 RTE_PTYPE_INNER_L4_UDP,
785 [151] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
786 RTE_PTYPE_TUNNEL_GRENAT |
787 RTE_PTYPE_INNER_L2_ETHER_VLAN |
788 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
789 RTE_PTYPE_INNER_L4_TCP,
790 [152] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
791 RTE_PTYPE_TUNNEL_GRENAT |
792 RTE_PTYPE_INNER_L2_ETHER_VLAN |
793 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
794 RTE_PTYPE_INNER_L4_SCTP,
795 [153] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
796 RTE_PTYPE_TUNNEL_GRENAT |
797 RTE_PTYPE_INNER_L2_ETHER_VLAN |
798 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
799 RTE_PTYPE_INNER_L4_ICMP,
801 /* L2 NSH packet type */
802 [154] = RTE_PTYPE_L2_ETHER_NSH,
803 [155] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
805 [156] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
806 RTE_PTYPE_L4_NONFRAG,
807 [157] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
809 [158] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
811 [159] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
813 [160] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN |
815 [161] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
817 [162] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
818 RTE_PTYPE_L4_NONFRAG,
819 [163] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
821 [164] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
823 [165] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
825 [166] = RTE_PTYPE_L2_ETHER_NSH | RTE_PTYPE_L3_IPV6_EXT_UNKNOWN |
828 /* All others reserved */
831 return type_table[ptype];
834 #endif /* _I40E_RXTX_H_ */