net/i40e: support adding TM shaper profile
[dpdk.git] / drivers / net / i40e / i40e_tm.c
1 /*-
2  *   BSD LICENSE
3  *
4  *   Copyright(c) 2010-2017 Intel Corporation. All rights reserved.
5  *   All rights reserved.
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8  *   modification, are permitted provided that the following conditions
9  *   are met:
10  *
11  *     * Redistributions of source code must retain the above copyright
12  *       notice, this list of conditions and the following disclaimer.
13  *     * Redistributions in binary form must reproduce the above copyright
14  *       notice, this list of conditions and the following disclaimer in
15  *       the documentation and/or other materials provided with the
16  *       distribution.
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18  *       contributors may be used to endorse or promote products derived
19  *       from this software without specific prior written permission.
20  *
21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33
34 #include <rte_malloc.h>
35
36 #include "base/i40e_prototype.h"
37 #include "i40e_ethdev.h"
38
39 static int i40e_tm_capabilities_get(struct rte_eth_dev *dev,
40                                     struct rte_tm_capabilities *cap,
41                                     struct rte_tm_error *error);
42 static int i40e_shaper_profile_add(struct rte_eth_dev *dev,
43                                    uint32_t shaper_profile_id,
44                                    struct rte_tm_shaper_params *profile,
45                                    struct rte_tm_error *error);
46
47 const struct rte_tm_ops i40e_tm_ops = {
48         .capabilities_get = i40e_tm_capabilities_get,
49         .shaper_profile_add = i40e_shaper_profile_add,
50 };
51
52 int
53 i40e_tm_ops_get(struct rte_eth_dev *dev __rte_unused,
54                 void *arg)
55 {
56         if (!arg)
57                 return -EINVAL;
58
59         *(const void **)arg = &i40e_tm_ops;
60
61         return 0;
62 }
63
64 void
65 i40e_tm_conf_init(struct rte_eth_dev *dev)
66 {
67         struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
68
69         /* initialize shaper profile list */
70         TAILQ_INIT(&pf->tm_conf.shaper_profile_list);
71 }
72
73 void
74 i40e_tm_conf_uninit(struct rte_eth_dev *dev)
75 {
76         struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
77         struct i40e_tm_shaper_profile *shaper_profile;
78
79         /* Remove all shaper profiles */
80         while ((shaper_profile =
81                TAILQ_FIRST(&pf->tm_conf.shaper_profile_list))) {
82                 TAILQ_REMOVE(&pf->tm_conf.shaper_profile_list,
83                              shaper_profile, node);
84                 rte_free(shaper_profile);
85         }
86 }
87
88 static inline uint16_t
89 i40e_tc_nb_get(struct rte_eth_dev *dev)
90 {
91         struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
92         struct i40e_vsi *main_vsi = pf->main_vsi;
93         uint16_t sum = 0;
94         int i;
95
96         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
97                 if (main_vsi->enabled_tc & BIT_ULL(i))
98                         sum++;
99         }
100
101         return sum;
102 }
103
104 static int
105 i40e_tm_capabilities_get(struct rte_eth_dev *dev,
106                          struct rte_tm_capabilities *cap,
107                          struct rte_tm_error *error)
108 {
109         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
110         uint16_t tc_nb = i40e_tc_nb_get(dev);
111
112         if (!cap || !error)
113                 return -EINVAL;
114
115         if (tc_nb > hw->func_caps.num_tx_qp)
116                 return -EINVAL;
117
118         error->type = RTE_TM_ERROR_TYPE_NONE;
119
120         /* set all the parameters to 0 first. */
121         memset(cap, 0, sizeof(struct rte_tm_capabilities));
122
123         /**
124          * support port + TCs + queues
125          * here shows the max capability not the current configuration.
126          */
127         cap->n_nodes_max = 1 + I40E_MAX_TRAFFIC_CLASS + hw->func_caps.num_tx_qp;
128         cap->n_levels_max = 3; /* port, TC, queue */
129         cap->non_leaf_nodes_identical = 1;
130         cap->leaf_nodes_identical = 1;
131         cap->shaper_n_max = cap->n_nodes_max;
132         cap->shaper_private_n_max = cap->n_nodes_max;
133         cap->shaper_private_dual_rate_n_max = 0;
134         cap->shaper_private_rate_min = 0;
135         /* 40Gbps -> 5GBps */
136         cap->shaper_private_rate_max = 5000000000ull;
137         cap->shaper_shared_n_max = 0;
138         cap->shaper_shared_n_nodes_per_shaper_max = 0;
139         cap->shaper_shared_n_shapers_per_node_max = 0;
140         cap->shaper_shared_dual_rate_n_max = 0;
141         cap->shaper_shared_rate_min = 0;
142         cap->shaper_shared_rate_max = 0;
143         cap->sched_n_children_max = hw->func_caps.num_tx_qp;
144         /**
145          * HW supports SP. But no plan to support it now.
146          * So, all the nodes should have the same priority.
147          */
148         cap->sched_sp_n_priorities_max = 1;
149         cap->sched_wfq_n_children_per_group_max = 0;
150         cap->sched_wfq_n_groups_max = 0;
151         /**
152          * SW only supports fair round robin now.
153          * So, all the nodes should have the same weight.
154          */
155         cap->sched_wfq_weight_max = 1;
156         cap->cman_head_drop_supported = 0;
157         cap->dynamic_update_mask = 0;
158         cap->shaper_pkt_length_adjust_min = RTE_TM_ETH_FRAMING_OVERHEAD;
159         cap->shaper_pkt_length_adjust_max = RTE_TM_ETH_FRAMING_OVERHEAD_FCS;
160         cap->cman_wred_context_n_max = 0;
161         cap->cman_wred_context_private_n_max = 0;
162         cap->cman_wred_context_shared_n_max = 0;
163         cap->cman_wred_context_shared_n_nodes_per_context_max = 0;
164         cap->cman_wred_context_shared_n_contexts_per_node_max = 0;
165         cap->stats_mask = 0;
166
167         return 0;
168 }
169
170 static inline struct i40e_tm_shaper_profile *
171 i40e_shaper_profile_search(struct rte_eth_dev *dev,
172                            uint32_t shaper_profile_id)
173 {
174         struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
175         struct i40e_shaper_profile_list *shaper_profile_list =
176                 &pf->tm_conf.shaper_profile_list;
177         struct i40e_tm_shaper_profile *shaper_profile;
178
179         TAILQ_FOREACH(shaper_profile, shaper_profile_list, node) {
180                 if (shaper_profile_id == shaper_profile->shaper_profile_id)
181                         return shaper_profile;
182         }
183
184         return NULL;
185 }
186
187 static int
188 i40e_shaper_profile_param_check(struct rte_tm_shaper_params *profile,
189                                 struct rte_tm_error *error)
190 {
191         /* min rate not supported */
192         if (profile->committed.rate) {
193                 error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE_COMMITTED_RATE;
194                 error->message = "committed rate not supported";
195                 return -EINVAL;
196         }
197         /* min bucket size not supported */
198         if (profile->committed.size) {
199                 error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE_COMMITTED_SIZE;
200                 error->message = "committed bucket size not supported";
201                 return -EINVAL;
202         }
203         /* max bucket size not supported */
204         if (profile->peak.size) {
205                 error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE_PEAK_SIZE;
206                 error->message = "peak bucket size not supported";
207                 return -EINVAL;
208         }
209         /* length adjustment not supported */
210         if (profile->pkt_length_adjust) {
211                 error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE_PKT_ADJUST_LEN;
212                 error->message = "packet length adjustment not supported";
213                 return -EINVAL;
214         }
215
216         return 0;
217 }
218
219 static int
220 i40e_shaper_profile_add(struct rte_eth_dev *dev,
221                         uint32_t shaper_profile_id,
222                         struct rte_tm_shaper_params *profile,
223                         struct rte_tm_error *error)
224 {
225         struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
226         struct i40e_tm_shaper_profile *shaper_profile;
227         int ret;
228
229         if (!profile || !error)
230                 return -EINVAL;
231
232         ret = i40e_shaper_profile_param_check(profile, error);
233         if (ret)
234                 return ret;
235
236         shaper_profile = i40e_shaper_profile_search(dev, shaper_profile_id);
237
238         if (shaper_profile) {
239                 error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE_ID;
240                 error->message = "profile ID exist";
241                 return -EINVAL;
242         }
243
244         shaper_profile = rte_zmalloc("i40e_tm_shaper_profile",
245                                      sizeof(struct i40e_tm_shaper_profile),
246                                      0);
247         if (!shaper_profile)
248                 return -ENOMEM;
249         shaper_profile->shaper_profile_id = shaper_profile_id;
250         (void)rte_memcpy(&shaper_profile->profile, profile,
251                          sizeof(struct rte_tm_shaper_params));
252         TAILQ_INSERT_TAIL(&pf->tm_conf.shaper_profile_list,
253                           shaper_profile, node);
254
255         return 0;
256 }