1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2001-2019
5 #include "ice_common.h"
9 * @hw: pointer to the HW struct
10 * @module_typeid: module pointer location in words from the NVM beginning
11 * @offset: byte offset from the module beginning
12 * @length: length of the section to be read (in bytes from the offset)
13 * @data: command buffer (size [bytes] = length)
14 * @last_command: tells if this is the last command in a series
15 * @read_shadow_ram: tell if this is a shadow RAM read
16 * @cd: pointer to command details structure or NULL
18 * Read the NVM using the admin queue commands (0x0701)
20 static enum ice_status
21 ice_aq_read_nvm(struct ice_hw *hw, u16 module_typeid, u32 offset, u16 length,
22 void *data, bool last_command, bool read_shadow_ram,
25 struct ice_aq_desc desc;
26 struct ice_aqc_nvm *cmd;
28 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
30 cmd = &desc.params.nvm;
32 if (offset > ICE_AQC_NVM_MAX_OFFSET)
35 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_nvm_read);
37 if (!read_shadow_ram && module_typeid == ICE_AQC_NVM_START_POINT)
38 cmd->cmd_flags |= ICE_AQC_NVM_FLASH_ONLY;
40 /* If this is the last command in a series, set the proper flag. */
42 cmd->cmd_flags |= ICE_AQC_NVM_LAST_CMD;
43 cmd->module_typeid = CPU_TO_LE16(module_typeid);
44 cmd->offset_low = CPU_TO_LE16(offset & 0xFFFF);
45 cmd->offset_high = (offset >> 16) & 0xFF;
46 cmd->length = CPU_TO_LE16(length);
48 return ice_aq_send_cmd(hw, &desc, data, length, cd);
52 * ice_read_flat_nvm - Read portion of NVM by flat offset
53 * @hw: pointer to the HW struct
54 * @offset: offset from beginning of NVM
55 * @length: (in) number of bytes to read; (out) number of bytes actually read
56 * @data: buffer to return data in (sized to fit the specified length)
57 * @read_shadow_ram: if true, read from shadow RAM instead of NVM
59 * Reads a portion of the NVM, as a flat memory space. This function correctly
60 * breaks read requests across Shadow RAM sectors and ensures that no single
61 * read request exceeds the maximum 4Kb read for a single AdminQ command.
63 * Returns a status code on failure. Note that the data pointer may be
64 * partially updated if some reads succeed before a failure.
67 ice_read_flat_nvm(struct ice_hw *hw, u32 offset, u32 *length, u8 *data,
70 enum ice_status status;
75 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
79 /* Verify the length of the read if this is for the Shadow RAM */
80 if (read_shadow_ram && ((offset + inlen) > (hw->nvm.sr_words * 2u))) {
81 ice_debug(hw, ICE_DBG_NVM,
82 "NVM error: requested data is beyond Shadow RAM limit\n");
87 u32 read_size, sector_offset;
89 /* ice_aq_read_nvm cannot read more than 4Kb at a time.
90 * Additionally, a read from the Shadow RAM may not cross over
91 * a sector boundary. Conveniently, the sector size is also
94 sector_offset = offset % ICE_AQ_MAX_BUF_LEN;
95 read_size = MIN_T(u32, ICE_AQ_MAX_BUF_LEN - sector_offset,
98 last_cmd = !(bytes_read + read_size < inlen);
100 /* ice_aq_read_nvm takes the length as a u16. Our read_size is
101 * calculated using a u32, but the ICE_AQ_MAX_BUF_LEN maximum
102 * size guarantees that it will fit within the 2 bytes.
104 status = ice_aq_read_nvm(hw, ICE_AQC_NVM_START_POINT,
105 offset, (u16)read_size,
106 data + bytes_read, last_cmd,
107 read_shadow_ram, NULL);
111 bytes_read += read_size;
115 *length = bytes_read;
120 * ice_read_sr_word_aq - Reads Shadow RAM via AQ
121 * @hw: pointer to the HW structure
122 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF)
123 * @data: word read from the Shadow RAM
125 * Reads one 16 bit word from the Shadow RAM using ice_read_flat_nvm.
127 static enum ice_status
128 ice_read_sr_word_aq(struct ice_hw *hw, u16 offset, u16 *data)
130 u32 bytes = sizeof(u16);
131 enum ice_status status;
134 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
136 /* Note that ice_read_flat_nvm checks if the read is past the Shadow
137 * RAM size, and ensures we don't read across a Shadow RAM sector
140 status = ice_read_flat_nvm(hw, offset * sizeof(u16), &bytes,
141 (u8 *)&data_local, true);
145 *data = LE16_TO_CPU(data_local);
150 * ice_read_sr_buf_aq - Reads Shadow RAM buf via AQ
151 * @hw: pointer to the HW structure
152 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF)
153 * @words: (in) number of words to read; (out) number of words actually read
154 * @data: words read from the Shadow RAM
156 * Reads 16 bit words (data buf) from the Shadow RAM. Ownership of the NVM is
157 * taken before reading the buffer and later released.
159 static enum ice_status
160 ice_read_sr_buf_aq(struct ice_hw *hw, u16 offset, u16 *words, u16 *data)
162 u32 bytes = *words * 2, i;
163 enum ice_status status;
165 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
167 /* ice_read_flat_nvm takes into account the 4Kb AdminQ and Shadow RAM
168 * sector restrictions necessary when reading from the NVM.
170 status = ice_read_flat_nvm(hw, offset * 2, &bytes, (u8 *)data, true);
172 /* Report the number of words successfully read */
175 /* Byte swap the words up to the amount we actually read */
176 for (i = 0; i < *words; i++)
177 data[i] = LE16_TO_CPU(((_FORCE_ __le16 *)data)[i]);
183 * ice_acquire_nvm - Generic request for acquiring the NVM ownership
184 * @hw: pointer to the HW structure
185 * @access: NVM access type (read or write)
187 * This function will request NVM ownership.
189 static enum ice_status
190 ice_acquire_nvm(struct ice_hw *hw, enum ice_aq_res_access_type access)
192 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
194 if (hw->nvm.blank_nvm_mode)
197 return ice_acquire_res(hw, ICE_NVM_RES_ID, access, ICE_NVM_TIMEOUT);
201 * ice_release_nvm - Generic request for releasing the NVM ownership
202 * @hw: pointer to the HW structure
204 * This function will release NVM ownership.
206 static void ice_release_nvm(struct ice_hw *hw)
208 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
210 if (hw->nvm.blank_nvm_mode)
213 ice_release_res(hw, ICE_NVM_RES_ID);
217 * ice_read_sr_word - Reads Shadow RAM word and acquire NVM if necessary
218 * @hw: pointer to the HW structure
219 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF)
220 * @data: word read from the Shadow RAM
222 * Reads one 16 bit word from the Shadow RAM using the ice_read_sr_word_aq.
224 enum ice_status ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data)
226 enum ice_status status;
228 status = ice_acquire_nvm(hw, ICE_RES_READ);
230 status = ice_read_sr_word_aq(hw, offset, data);
238 * ice_init_nvm - initializes NVM setting
239 * @hw: pointer to the HW struct
241 * This function reads and populates NVM settings such as Shadow RAM size,
242 * max_timeout, and blank_nvm_mode
244 enum ice_status ice_init_nvm(struct ice_hw *hw)
246 u16 oem_hi, oem_lo, boot_cfg_tlv, boot_cfg_tlv_len;
247 struct ice_nvm_info *nvm = &hw->nvm;
248 u16 eetrack_lo, eetrack_hi;
249 enum ice_status status;
253 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
255 /* The SR size is stored regardless of the NVM programming mode
256 * as the blank mode may be used in the factory line.
258 gens_stat = rd32(hw, GLNVM_GENS);
259 sr_size = (gens_stat & GLNVM_GENS_SR_SIZE_M) >> GLNVM_GENS_SR_SIZE_S;
261 /* Switching to words (sr_size contains power of 2) */
262 nvm->sr_words = BIT(sr_size) * ICE_SR_WORDS_IN_1KB;
264 /* Check if we are in the normal or blank NVM programming mode */
265 fla = rd32(hw, GLNVM_FLA);
266 if (fla & GLNVM_FLA_LOCKED_M) { /* Normal programming mode */
267 nvm->blank_nvm_mode = false;
269 /* Blank programming mode */
270 nvm->blank_nvm_mode = true;
271 ice_debug(hw, ICE_DBG_NVM,
272 "NVM init error: unsupported blank mode.\n");
273 return ICE_ERR_NVM_BLANK_MODE;
276 status = ice_read_sr_word(hw, ICE_SR_NVM_DEV_STARTER_VER, &nvm->ver);
278 ice_debug(hw, ICE_DBG_INIT,
279 "Failed to read DEV starter version.\n");
283 status = ice_read_sr_word(hw, ICE_SR_NVM_EETRACK_LO, &eetrack_lo);
285 ice_debug(hw, ICE_DBG_INIT, "Failed to read EETRACK lo.\n");
288 status = ice_read_sr_word(hw, ICE_SR_NVM_EETRACK_HI, &eetrack_hi);
290 ice_debug(hw, ICE_DBG_INIT, "Failed to read EETRACK hi.\n");
294 nvm->eetrack = (eetrack_hi << 16) | eetrack_lo;
296 switch (hw->device_id) {
297 /* the following devices do not have boot_cfg_tlv yet */
298 case ICE_DEV_ID_E822C_BACKPLANE:
299 case ICE_DEV_ID_E822C_QSFP:
300 case ICE_DEV_ID_E822C_10G_BASE_T:
301 case ICE_DEV_ID_E822C_SGMII:
302 case ICE_DEV_ID_E822C_SFP:
303 case ICE_DEV_ID_E822L_BACKPLANE:
304 case ICE_DEV_ID_E822L_SFP:
305 case ICE_DEV_ID_E822L_10G_BASE_T:
306 case ICE_DEV_ID_E822L_SGMII:
312 status = ice_get_pfa_module_tlv(hw, &boot_cfg_tlv, &boot_cfg_tlv_len,
313 ICE_SR_BOOT_CFG_PTR);
315 ice_debug(hw, ICE_DBG_INIT,
316 "Failed to read Boot Configuration Block TLV.\n");
320 /* Boot Configuration Block must have length at least 2 words
321 * (Combo Image Version High and Combo Image Version Low)
323 if (boot_cfg_tlv_len < 2) {
324 ice_debug(hw, ICE_DBG_INIT,
325 "Invalid Boot Configuration Block TLV size.\n");
326 return ICE_ERR_INVAL_SIZE;
329 status = ice_read_sr_word(hw, (boot_cfg_tlv + ICE_NVM_OEM_VER_OFF),
332 ice_debug(hw, ICE_DBG_INIT, "Failed to read OEM_VER hi.\n");
336 status = ice_read_sr_word(hw, (boot_cfg_tlv + ICE_NVM_OEM_VER_OFF + 1),
339 ice_debug(hw, ICE_DBG_INIT, "Failed to read OEM_VER lo.\n");
343 nvm->oem_ver = ((u32)oem_hi << 16) | oem_lo;
349 * ice_read_sr_buf - Reads Shadow RAM buf and acquire lock if necessary
350 * @hw: pointer to the HW structure
351 * @offset: offset of the Shadow RAM word to read (0x000000 - 0x001FFF)
352 * @words: (in) number of words to read; (out) number of words actually read
353 * @data: words read from the Shadow RAM
355 * Reads 16 bit words (data buf) from the SR using the ice_read_nvm_buf_aq
356 * method. The buf read is preceded by the NVM ownership take
357 * and followed by the release.
360 ice_read_sr_buf(struct ice_hw *hw, u16 offset, u16 *words, u16 *data)
362 enum ice_status status;
364 status = ice_acquire_nvm(hw, ICE_RES_READ);
366 status = ice_read_sr_buf_aq(hw, offset, words, data);
374 * ice_nvm_validate_checksum
375 * @hw: pointer to the HW struct
377 * Verify NVM PFA checksum validity (0x0706)
379 enum ice_status ice_nvm_validate_checksum(struct ice_hw *hw)
381 struct ice_aqc_nvm_checksum *cmd;
382 struct ice_aq_desc desc;
383 enum ice_status status;
385 status = ice_acquire_nvm(hw, ICE_RES_READ);
389 cmd = &desc.params.nvm_checksum;
391 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_nvm_checksum);
392 cmd->flags = ICE_AQC_NVM_CHECKSUM_VERIFY;
394 status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
398 if (LE16_TO_CPU(cmd->checksum) != ICE_AQC_NVM_CHECKSUM_CORRECT)
399 status = ICE_ERR_NVM_CHECKSUM;
405 * ice_nvm_access_get_features - Return the NVM access features structure
406 * @cmd: NVM access command to process
407 * @data: storage for the driver NVM features
409 * Fill in the data section of the NVM access request with a copy of the NVM
410 * features structure.
413 ice_nvm_access_get_features(struct ice_nvm_access_cmd *cmd,
414 union ice_nvm_access_data *data)
416 /* The provided data_size must be at least as large as our NVM
417 * features structure. A larger size should not be treated as an
418 * error, to allow future extensions to to the features structure to
419 * work on older drivers.
421 if (cmd->data_size < sizeof(struct ice_nvm_features))
422 return ICE_ERR_NO_MEMORY;
424 /* Initialize the data buffer to zeros */
425 ice_memset(data, 0, cmd->data_size, ICE_NONDMA_MEM);
427 /* Fill in the features data */
428 data->drv_features.major = ICE_NVM_ACCESS_MAJOR_VER;
429 data->drv_features.minor = ICE_NVM_ACCESS_MINOR_VER;
430 data->drv_features.size = sizeof(struct ice_nvm_features);
431 data->drv_features.features[0] = ICE_NVM_FEATURES_0_REG_ACCESS;
437 * ice_nvm_access_get_module - Helper function to read module value
438 * @cmd: NVM access command structure
440 * Reads the module value out of the NVM access config field.
442 u32 ice_nvm_access_get_module(struct ice_nvm_access_cmd *cmd)
444 return ((cmd->config & ICE_NVM_CFG_MODULE_M) >> ICE_NVM_CFG_MODULE_S);
448 * ice_nvm_access_get_flags - Helper function to read flags value
449 * @cmd: NVM access command structure
451 * Reads the flags value out of the NVM access config field.
453 u32 ice_nvm_access_get_flags(struct ice_nvm_access_cmd *cmd)
455 return ((cmd->config & ICE_NVM_CFG_FLAGS_M) >> ICE_NVM_CFG_FLAGS_S);
459 * ice_nvm_access_get_adapter - Helper function to read adapter info
460 * @cmd: NVM access command structure
462 * Read the adapter info value out of the NVM access config field.
464 u32 ice_nvm_access_get_adapter(struct ice_nvm_access_cmd *cmd)
466 return ((cmd->config & ICE_NVM_CFG_ADAPTER_INFO_M) >>
467 ICE_NVM_CFG_ADAPTER_INFO_S);
471 * ice_validate_nvm_rw_reg - Check than an NVM access request is valid
472 * @cmd: NVM access command structure
474 * Validates that an NVM access structure is request to read or write a valid
475 * register offset. First validates that the module and flags are correct, and
476 * then ensures that the register offset is one of the accepted registers.
478 static enum ice_status
479 ice_validate_nvm_rw_reg(struct ice_nvm_access_cmd *cmd)
481 u32 module, flags, offset;
484 module = ice_nvm_access_get_module(cmd);
485 flags = ice_nvm_access_get_flags(cmd);
486 offset = cmd->offset;
488 /* Make sure the module and flags indicate a read/write request */
489 if (module != ICE_NVM_REG_RW_MODULE ||
490 flags != ICE_NVM_REG_RW_FLAGS ||
491 cmd->data_size != FIELD_SIZEOF(union ice_nvm_access_data, regval))
492 return ICE_ERR_PARAM;
496 case GL_HICR_EN: /* Note, this register is read only */
499 case GLGEN_CSR_DEBUG_C:
510 for (i = 0; i <= ICE_NVM_ACCESS_GL_HIDA_MAX; i++)
511 if (offset == (u32)GL_HIDA(i))
514 for (i = 0; i <= ICE_NVM_ACCESS_GL_HIBA_MAX; i++)
515 if (offset == (u32)GL_HIBA(i))
518 /* All other register offsets are not valid */
519 return ICE_ERR_OUT_OF_RANGE;
523 * ice_nvm_access_read - Handle an NVM read request
524 * @hw: pointer to the HW struct
525 * @cmd: NVM access command to process
526 * @data: storage for the register value read
528 * Process an NVM access request to read a register.
531 ice_nvm_access_read(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,
532 union ice_nvm_access_data *data)
534 enum ice_status status;
536 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
538 /* Always initialize the output data, even on failure */
539 ice_memset(data, 0, cmd->data_size, ICE_NONDMA_MEM);
541 /* Make sure this is a valid read/write access request */
542 status = ice_validate_nvm_rw_reg(cmd);
546 ice_debug(hw, ICE_DBG_NVM, "NVM access: reading register %08x\n",
549 /* Read the register and store the contents in the data field */
550 data->regval = rd32(hw, cmd->offset);
556 * ice_nvm_access_write - Handle an NVM write request
557 * @hw: pointer to the HW struct
558 * @cmd: NVM access command to process
559 * @data: NVM access data to write
561 * Process an NVM access request to write a register.
564 ice_nvm_access_write(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,
565 union ice_nvm_access_data *data)
567 enum ice_status status;
569 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
571 /* Make sure this is a valid read/write access request */
572 status = ice_validate_nvm_rw_reg(cmd);
576 /* Reject requests to write to read-only registers */
577 switch (cmd->offset) {
580 return ICE_ERR_OUT_OF_RANGE;
585 ice_debug(hw, ICE_DBG_NVM,
586 "NVM access: writing register %08x with value %08x\n",
587 cmd->offset, data->regval);
589 /* Write the data field to the specified register */
590 wr32(hw, cmd->offset, data->regval);
596 * ice_handle_nvm_access - Handle an NVM access request
597 * @hw: pointer to the HW struct
598 * @cmd: NVM access command info
599 * @data: pointer to read or return data
601 * Process an NVM access request. Read the command structure information and
602 * determine if it is valid. If not, report an error indicating the command
605 * For valid commands, perform the necessary function, copying the data into
606 * the provided data buffer.
609 ice_handle_nvm_access(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,
610 union ice_nvm_access_data *data)
612 u32 module, flags, adapter_info;
614 ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
616 /* Extended flags are currently reserved and must be zero */
617 if ((cmd->config & ICE_NVM_CFG_EXT_FLAGS_M) != 0)
618 return ICE_ERR_PARAM;
620 /* Adapter info must match the HW device ID */
621 adapter_info = ice_nvm_access_get_adapter(cmd);
622 if (adapter_info != hw->device_id)
623 return ICE_ERR_PARAM;
625 switch (cmd->command) {
626 case ICE_NVM_CMD_READ:
627 module = ice_nvm_access_get_module(cmd);
628 flags = ice_nvm_access_get_flags(cmd);
630 /* Getting the driver's NVM features structure shares the same
631 * command type as reading a register. Read the config field
632 * to determine if this is a request to get features.
634 if (module == ICE_NVM_GET_FEATURES_MODULE &&
635 flags == ICE_NVM_GET_FEATURES_FLAGS &&
637 return ice_nvm_access_get_features(cmd, data);
639 return ice_nvm_access_read(hw, cmd, data);
640 case ICE_NVM_CMD_WRITE:
641 return ice_nvm_access_write(hw, cmd, data);
643 return ICE_ERR_PARAM;