1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2001-2019
9 * ice_sched_add_root_node - Insert the Tx scheduler root node in SW DB
10 * @pi: port information structure
11 * @info: Scheduler element information from firmware
13 * This function inserts the root node of the scheduling tree topology
16 static enum ice_status
17 ice_sched_add_root_node(struct ice_port_info *pi,
18 struct ice_aqc_txsched_elem_data *info)
20 struct ice_sched_node *root;
28 root = (struct ice_sched_node *)ice_malloc(hw, sizeof(*root));
30 return ICE_ERR_NO_MEMORY;
32 /* coverity[suspicious_sizeof] */
33 root->children = (struct ice_sched_node **)
34 ice_calloc(hw, hw->max_children[0], sizeof(*root));
35 if (!root->children) {
37 return ICE_ERR_NO_MEMORY;
40 ice_memcpy(&root->info, info, sizeof(*info), ICE_DMA_TO_NONDMA);
46 * ice_sched_find_node_by_teid - Find the Tx scheduler node in SW DB
47 * @start_node: pointer to the starting ice_sched_node struct in a sub-tree
48 * @teid: node TEID to search
50 * This function searches for a node matching the TEID in the scheduling tree
51 * from the SW DB. The search is recursive and is restricted by the number of
52 * layers it has searched through; stopping at the max supported layer.
54 * This function needs to be called when holding the port_info->sched_lock
56 struct ice_sched_node *
57 ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid)
61 /* The TEID is same as that of the start_node */
62 if (ICE_TXSCHED_GET_NODE_TEID(start_node) == teid)
65 /* The node has no children or is at the max layer */
66 if (!start_node->num_children ||
67 start_node->tx_sched_layer >= ICE_AQC_TOPO_MAX_LEVEL_NUM ||
68 start_node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF)
71 /* Check if TEID matches to any of the children nodes */
72 for (i = 0; i < start_node->num_children; i++)
73 if (ICE_TXSCHED_GET_NODE_TEID(start_node->children[i]) == teid)
74 return start_node->children[i];
76 /* Search within each child's sub-tree */
77 for (i = 0; i < start_node->num_children; i++) {
78 struct ice_sched_node *tmp;
80 tmp = ice_sched_find_node_by_teid(start_node->children[i],
90 * ice_aqc_send_sched_elem_cmd - send scheduling elements cmd
91 * @hw: pointer to the HW struct
92 * @cmd_opc: cmd opcode
93 * @elems_req: number of elements to request
94 * @buf: pointer to buffer
95 * @buf_size: buffer size in bytes
96 * @elems_resp: returns total number of elements response
97 * @cd: pointer to command details structure or NULL
99 * This function sends a scheduling elements cmd (cmd_opc)
101 static enum ice_status
102 ice_aqc_send_sched_elem_cmd(struct ice_hw *hw, enum ice_adminq_opc cmd_opc,
103 u16 elems_req, void *buf, u16 buf_size,
104 u16 *elems_resp, struct ice_sq_cd *cd)
106 struct ice_aqc_sched_elem_cmd *cmd;
107 struct ice_aq_desc desc;
108 enum ice_status status;
110 cmd = &desc.params.sched_elem_cmd;
111 ice_fill_dflt_direct_cmd_desc(&desc, cmd_opc);
112 cmd->num_elem_req = CPU_TO_LE16(elems_req);
113 desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
114 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
115 if (!status && elems_resp)
116 *elems_resp = LE16_TO_CPU(cmd->num_elem_resp);
122 * ice_aq_query_sched_elems - query scheduler elements
123 * @hw: pointer to the HW struct
124 * @elems_req: number of elements to query
125 * @buf: pointer to buffer
126 * @buf_size: buffer size in bytes
127 * @elems_ret: returns total number of elements returned
128 * @cd: pointer to command details structure or NULL
130 * Query scheduling elements (0x0404)
133 ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,
134 struct ice_aqc_get_elem *buf, u16 buf_size,
135 u16 *elems_ret, struct ice_sq_cd *cd)
137 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_get_sched_elems,
138 elems_req, (void *)buf, buf_size,
143 * ice_sched_add_node - Insert the Tx scheduler node in SW DB
144 * @pi: port information structure
145 * @layer: Scheduler layer of the node
146 * @info: Scheduler element information from firmware
148 * This function inserts a scheduler node to the SW DB.
151 ice_sched_add_node(struct ice_port_info *pi, u8 layer,
152 struct ice_aqc_txsched_elem_data *info)
154 struct ice_sched_node *parent;
155 struct ice_aqc_get_elem elem;
156 struct ice_sched_node *node;
157 enum ice_status status;
161 return ICE_ERR_PARAM;
165 /* A valid parent node should be there */
166 parent = ice_sched_find_node_by_teid(pi->root,
167 LE32_TO_CPU(info->parent_teid));
169 ice_debug(hw, ICE_DBG_SCHED,
170 "Parent Node not found for parent_teid=0x%x\n",
171 LE32_TO_CPU(info->parent_teid));
172 return ICE_ERR_PARAM;
175 /* query the current node information from FW before additing it
178 status = ice_sched_query_elem(hw, LE32_TO_CPU(info->node_teid), &elem);
181 node = (struct ice_sched_node *)ice_malloc(hw, sizeof(*node));
183 return ICE_ERR_NO_MEMORY;
184 if (hw->max_children[layer]) {
185 /* coverity[suspicious_sizeof] */
186 node->children = (struct ice_sched_node **)
187 ice_calloc(hw, hw->max_children[layer], sizeof(*node));
188 if (!node->children) {
190 return ICE_ERR_NO_MEMORY;
195 node->parent = parent;
196 node->tx_sched_layer = layer;
197 parent->children[parent->num_children++] = node;
198 node->info = elem.generic[0];
203 * ice_aq_delete_sched_elems - delete scheduler elements
204 * @hw: pointer to the HW struct
205 * @grps_req: number of groups to delete
206 * @buf: pointer to buffer
207 * @buf_size: buffer size in bytes
208 * @grps_del: returns total number of elements deleted
209 * @cd: pointer to command details structure or NULL
211 * Delete scheduling elements (0x040F)
213 static enum ice_status
214 ice_aq_delete_sched_elems(struct ice_hw *hw, u16 grps_req,
215 struct ice_aqc_delete_elem *buf, u16 buf_size,
216 u16 *grps_del, struct ice_sq_cd *cd)
218 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_delete_sched_elems,
219 grps_req, (void *)buf, buf_size,
224 * ice_sched_remove_elems - remove nodes from HW
225 * @hw: pointer to the HW struct
226 * @parent: pointer to the parent node
227 * @num_nodes: number of nodes
228 * @node_teids: array of node teids to be deleted
230 * This function remove nodes from HW
232 static enum ice_status
233 ice_sched_remove_elems(struct ice_hw *hw, struct ice_sched_node *parent,
234 u16 num_nodes, u32 *node_teids)
236 struct ice_aqc_delete_elem *buf;
237 u16 i, num_groups_removed = 0;
238 enum ice_status status;
241 buf_size = sizeof(*buf) + sizeof(u32) * (num_nodes - 1);
242 buf = (struct ice_aqc_delete_elem *)ice_malloc(hw, buf_size);
244 return ICE_ERR_NO_MEMORY;
246 buf->hdr.parent_teid = parent->info.node_teid;
247 buf->hdr.num_elems = CPU_TO_LE16(num_nodes);
248 for (i = 0; i < num_nodes; i++)
249 buf->teid[i] = CPU_TO_LE32(node_teids[i]);
251 status = ice_aq_delete_sched_elems(hw, 1, buf, buf_size,
252 &num_groups_removed, NULL);
253 if (status != ICE_SUCCESS || num_groups_removed != 1)
254 ice_debug(hw, ICE_DBG_SCHED, "remove node failed FW error %d\n",
255 hw->adminq.sq_last_status);
262 * ice_sched_get_first_node - get the first node of the given layer
263 * @pi: port information structure
264 * @parent: pointer the base node of the subtree
265 * @layer: layer number
267 * This function retrieves the first node of the given layer from the subtree
269 static struct ice_sched_node *
270 ice_sched_get_first_node(struct ice_port_info *pi,
271 struct ice_sched_node *parent, u8 layer)
273 return pi->sib_head[parent->tc_num][layer];
277 * ice_sched_get_tc_node - get pointer to TC node
278 * @pi: port information structure
281 * This function returns the TC node pointer
283 struct ice_sched_node *ice_sched_get_tc_node(struct ice_port_info *pi, u8 tc)
287 if (!pi || !pi->root)
289 for (i = 0; i < pi->root->num_children; i++)
290 if (pi->root->children[i]->tc_num == tc)
291 return pi->root->children[i];
296 * ice_free_sched_node - Free a Tx scheduler node from SW DB
297 * @pi: port information structure
298 * @node: pointer to the ice_sched_node struct
300 * This function frees up a node from SW DB as well as from HW
302 * This function needs to be called with the port_info->sched_lock held
304 void ice_free_sched_node(struct ice_port_info *pi, struct ice_sched_node *node)
306 struct ice_sched_node *parent;
307 struct ice_hw *hw = pi->hw;
310 /* Free the children before freeing up the parent node
311 * The parent array is updated below and that shifts the nodes
312 * in the array. So always pick the first child if num children > 0
314 while (node->num_children)
315 ice_free_sched_node(pi, node->children[0]);
317 /* Leaf, TC and root nodes can't be deleted by SW */
318 if (node->tx_sched_layer >= hw->sw_entry_point_layer &&
319 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_TC &&
320 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_ROOT_PORT &&
321 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_LEAF) {
322 u32 teid = LE32_TO_CPU(node->info.node_teid);
324 ice_sched_remove_elems(hw, node->parent, 1, &teid);
326 parent = node->parent;
327 /* root has no parent */
329 struct ice_sched_node *p;
331 /* update the parent */
332 for (i = 0; i < parent->num_children; i++)
333 if (parent->children[i] == node) {
334 for (j = i + 1; j < parent->num_children; j++)
335 parent->children[j - 1] =
337 parent->num_children--;
341 p = ice_sched_get_first_node(pi, node, node->tx_sched_layer);
343 if (p->sibling == node) {
344 p->sibling = node->sibling;
350 /* update the sibling head if head is getting removed */
351 if (pi->sib_head[node->tc_num][node->tx_sched_layer] == node)
352 pi->sib_head[node->tc_num][node->tx_sched_layer] =
356 /* leaf nodes have no children */
358 ice_free(hw, node->children);
363 * ice_aq_get_dflt_topo - gets default scheduler topology
364 * @hw: pointer to the HW struct
365 * @lport: logical port number
366 * @buf: pointer to buffer
367 * @buf_size: buffer size in bytes
368 * @num_branches: returns total number of queue to port branches
369 * @cd: pointer to command details structure or NULL
371 * Get default scheduler topology (0x400)
373 static enum ice_status
374 ice_aq_get_dflt_topo(struct ice_hw *hw, u8 lport,
375 struct ice_aqc_get_topo_elem *buf, u16 buf_size,
376 u8 *num_branches, struct ice_sq_cd *cd)
378 struct ice_aqc_get_topo *cmd;
379 struct ice_aq_desc desc;
380 enum ice_status status;
382 cmd = &desc.params.get_topo;
383 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_dflt_topo);
384 cmd->port_num = lport;
385 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
386 if (!status && num_branches)
387 *num_branches = cmd->num_branches;
393 * ice_aq_add_sched_elems - adds scheduling element
394 * @hw: pointer to the HW struct
395 * @grps_req: the number of groups that are requested to be added
396 * @buf: pointer to buffer
397 * @buf_size: buffer size in bytes
398 * @grps_added: returns total number of groups added
399 * @cd: pointer to command details structure or NULL
401 * Add scheduling elements (0x0401)
403 static enum ice_status
404 ice_aq_add_sched_elems(struct ice_hw *hw, u16 grps_req,
405 struct ice_aqc_add_elem *buf, u16 buf_size,
406 u16 *grps_added, struct ice_sq_cd *cd)
408 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_add_sched_elems,
409 grps_req, (void *)buf, buf_size,
414 * ice_aq_cfg_sched_elems - configures scheduler elements
415 * @hw: pointer to the HW struct
416 * @elems_req: number of elements to configure
417 * @buf: pointer to buffer
418 * @buf_size: buffer size in bytes
419 * @elems_cfgd: returns total number of elements configured
420 * @cd: pointer to command details structure or NULL
422 * Configure scheduling elements (0x0403)
424 static enum ice_status
425 ice_aq_cfg_sched_elems(struct ice_hw *hw, u16 elems_req,
426 struct ice_aqc_conf_elem *buf, u16 buf_size,
427 u16 *elems_cfgd, struct ice_sq_cd *cd)
429 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_cfg_sched_elems,
430 elems_req, (void *)buf, buf_size,
435 * ice_aq_move_sched_elems - move scheduler elements
436 * @hw: pointer to the HW struct
437 * @grps_req: number of groups to move
438 * @buf: pointer to buffer
439 * @buf_size: buffer size in bytes
440 * @grps_movd: returns total number of groups moved
441 * @cd: pointer to command details structure or NULL
443 * Move scheduling elements (0x0408)
445 static enum ice_status
446 ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
447 struct ice_aqc_move_elem *buf, u16 buf_size,
448 u16 *grps_movd, struct ice_sq_cd *cd)
450 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_move_sched_elems,
451 grps_req, (void *)buf, buf_size,
456 * ice_aq_suspend_sched_elems - suspend scheduler elements
457 * @hw: pointer to the HW struct
458 * @elems_req: number of elements to suspend
459 * @buf: pointer to buffer
460 * @buf_size: buffer size in bytes
461 * @elems_ret: returns total number of elements suspended
462 * @cd: pointer to command details structure or NULL
464 * Suspend scheduling elements (0x0409)
466 static enum ice_status
467 ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req,
468 struct ice_aqc_suspend_resume_elem *buf,
469 u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd)
471 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_suspend_sched_elems,
472 elems_req, (void *)buf, buf_size,
477 * ice_aq_resume_sched_elems - resume scheduler elements
478 * @hw: pointer to the HW struct
479 * @elems_req: number of elements to resume
480 * @buf: pointer to buffer
481 * @buf_size: buffer size in bytes
482 * @elems_ret: returns total number of elements resumed
483 * @cd: pointer to command details structure or NULL
485 * resume scheduling elements (0x040A)
487 static enum ice_status
488 ice_aq_resume_sched_elems(struct ice_hw *hw, u16 elems_req,
489 struct ice_aqc_suspend_resume_elem *buf,
490 u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd)
492 return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_resume_sched_elems,
493 elems_req, (void *)buf, buf_size,
498 * ice_aq_query_sched_res - query scheduler resource
499 * @hw: pointer to the HW struct
500 * @buf_size: buffer size in bytes
501 * @buf: pointer to buffer
502 * @cd: pointer to command details structure or NULL
504 * Query scheduler resource allocation (0x0412)
506 static enum ice_status
507 ice_aq_query_sched_res(struct ice_hw *hw, u16 buf_size,
508 struct ice_aqc_query_txsched_res_resp *buf,
509 struct ice_sq_cd *cd)
511 struct ice_aq_desc desc;
513 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_query_sched_res);
514 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
518 * ice_sched_suspend_resume_elems - suspend or resume HW nodes
519 * @hw: pointer to the HW struct
520 * @num_nodes: number of nodes
521 * @node_teids: array of node teids to be suspended or resumed
522 * @suspend: true means suspend / false means resume
524 * This function suspends or resumes HW nodes
526 static enum ice_status
527 ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
530 struct ice_aqc_suspend_resume_elem *buf;
531 u16 i, buf_size, num_elem_ret = 0;
532 enum ice_status status;
534 buf_size = sizeof(*buf) * num_nodes;
535 buf = (struct ice_aqc_suspend_resume_elem *)
536 ice_malloc(hw, buf_size);
538 return ICE_ERR_NO_MEMORY;
540 for (i = 0; i < num_nodes; i++)
541 buf->teid[i] = CPU_TO_LE32(node_teids[i]);
544 status = ice_aq_suspend_sched_elems(hw, num_nodes, buf,
545 buf_size, &num_elem_ret,
548 status = ice_aq_resume_sched_elems(hw, num_nodes, buf,
549 buf_size, &num_elem_ret,
551 if (status != ICE_SUCCESS || num_elem_ret != num_nodes)
552 ice_debug(hw, ICE_DBG_SCHED, "suspend/resume failed\n");
559 * ice_alloc_lan_q_ctx - allocate LAN queue contexts for the given VSI and TC
560 * @hw: pointer to the HW struct
561 * @vsi_handle: VSI handle
563 * @new_numqs: number of queues
565 static enum ice_status
566 ice_alloc_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 new_numqs)
568 struct ice_vsi_ctx *vsi_ctx;
569 struct ice_q_ctx *q_ctx;
571 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
573 return ICE_ERR_PARAM;
574 /* allocate LAN queue contexts */
575 if (!vsi_ctx->lan_q_ctx[tc]) {
576 vsi_ctx->lan_q_ctx[tc] = (struct ice_q_ctx *)
577 ice_calloc(hw, new_numqs, sizeof(*q_ctx));
578 if (!vsi_ctx->lan_q_ctx[tc])
579 return ICE_ERR_NO_MEMORY;
580 vsi_ctx->num_lan_q_entries[tc] = new_numqs;
583 /* num queues are increased, update the queue contexts */
584 if (new_numqs > vsi_ctx->num_lan_q_entries[tc]) {
585 u16 prev_num = vsi_ctx->num_lan_q_entries[tc];
587 q_ctx = (struct ice_q_ctx *)
588 ice_calloc(hw, new_numqs, sizeof(*q_ctx));
590 return ICE_ERR_NO_MEMORY;
591 ice_memcpy(q_ctx, vsi_ctx->lan_q_ctx[tc],
592 prev_num * sizeof(*q_ctx), ICE_DMA_TO_NONDMA);
593 ice_free(hw, vsi_ctx->lan_q_ctx[tc]);
594 vsi_ctx->lan_q_ctx[tc] = q_ctx;
595 vsi_ctx->num_lan_q_entries[tc] = new_numqs;
601 * ice_aq_rl_profile - performs a rate limiting task
602 * @hw: pointer to the HW struct
603 * @opcode:opcode for add, query, or remove profile(s)
604 * @num_profiles: the number of profiles
605 * @buf: pointer to buffer
606 * @buf_size: buffer size in bytes
607 * @num_processed: number of processed add or remove profile(s) to return
608 * @cd: pointer to command details structure
610 * Rl profile function to add, query, or remove profile(s)
612 static enum ice_status
613 ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode,
614 u16 num_profiles, struct ice_aqc_rl_profile_generic_elem *buf,
615 u16 buf_size, u16 *num_processed, struct ice_sq_cd *cd)
617 struct ice_aqc_rl_profile *cmd;
618 struct ice_aq_desc desc;
619 enum ice_status status;
621 cmd = &desc.params.rl_profile;
623 ice_fill_dflt_direct_cmd_desc(&desc, opcode);
624 desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
625 cmd->num_profiles = CPU_TO_LE16(num_profiles);
626 status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
627 if (!status && num_processed)
628 *num_processed = LE16_TO_CPU(cmd->num_processed);
633 * ice_aq_add_rl_profile - adds rate limiting profile(s)
634 * @hw: pointer to the HW struct
635 * @num_profiles: the number of profile(s) to be add
636 * @buf: pointer to buffer
637 * @buf_size: buffer size in bytes
638 * @num_profiles_added: total number of profiles added to return
639 * @cd: pointer to command details structure
641 * Add RL profile (0x0410)
643 static enum ice_status
644 ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles,
645 struct ice_aqc_rl_profile_generic_elem *buf,
646 u16 buf_size, u16 *num_profiles_added,
647 struct ice_sq_cd *cd)
649 return ice_aq_rl_profile(hw, ice_aqc_opc_add_rl_profiles,
651 buf_size, num_profiles_added, cd);
655 * ice_aq_query_rl_profile - query rate limiting profile(s)
656 * @hw: pointer to the HW struct
657 * @num_profiles: the number of profile(s) to query
658 * @buf: pointer to buffer
659 * @buf_size: buffer size in bytes
660 * @cd: pointer to command details structure
662 * Query RL profile (0x0411)
665 ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,
666 struct ice_aqc_rl_profile_generic_elem *buf,
667 u16 buf_size, struct ice_sq_cd *cd)
669 return ice_aq_rl_profile(hw, ice_aqc_opc_query_rl_profiles,
670 num_profiles, buf, buf_size, NULL, cd);
674 * ice_aq_remove_rl_profile - removes RL profile(s)
675 * @hw: pointer to the HW struct
676 * @num_profiles: the number of profile(s) to remove
677 * @buf: pointer to buffer
678 * @buf_size: buffer size in bytes
679 * @num_profiles_removed: total number of profiles removed to return
680 * @cd: pointer to command details structure or NULL
682 * Remove RL profile (0x0415)
684 static enum ice_status
685 ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,
686 struct ice_aqc_rl_profile_generic_elem *buf,
687 u16 buf_size, u16 *num_profiles_removed,
688 struct ice_sq_cd *cd)
690 return ice_aq_rl_profile(hw, ice_aqc_opc_remove_rl_profiles,
692 buf_size, num_profiles_removed, cd);
696 * ice_sched_del_rl_profile - remove RL profile
697 * @hw: pointer to the HW struct
698 * @rl_info: rate limit profile information
700 * If the profile ID is not referenced anymore, it removes profile ID with
701 * its associated parameters from HW DB,and locally. The caller needs to
702 * hold scheduler lock.
704 static enum ice_status
705 ice_sched_del_rl_profile(struct ice_hw *hw,
706 struct ice_aqc_rl_profile_info *rl_info)
708 struct ice_aqc_rl_profile_generic_elem *buf;
709 u16 num_profiles_removed;
710 enum ice_status status;
711 u16 num_profiles = 1;
713 if (rl_info->prof_id_ref != 0)
714 return ICE_ERR_IN_USE;
716 /* Safe to remove profile ID */
717 buf = (struct ice_aqc_rl_profile_generic_elem *)
719 status = ice_aq_remove_rl_profile(hw, num_profiles, buf, sizeof(*buf),
720 &num_profiles_removed, NULL);
721 if (status || num_profiles_removed != num_profiles)
724 /* Delete stale entry now */
725 LIST_DEL(&rl_info->list_entry);
726 ice_free(hw, rl_info);
731 * ice_sched_clear_rl_prof - clears RL prof entries
732 * @pi: port information structure
734 * This function removes all RL profile from HW as well as from SW DB.
736 static void ice_sched_clear_rl_prof(struct ice_port_info *pi)
740 for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
741 struct ice_aqc_rl_profile_info *rl_prof_elem;
742 struct ice_aqc_rl_profile_info *rl_prof_tmp;
744 LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
745 &pi->rl_prof_list[ln],
746 ice_aqc_rl_profile_info, list_entry) {
747 struct ice_hw *hw = pi->hw;
748 enum ice_status status;
750 rl_prof_elem->prof_id_ref = 0;
751 status = ice_sched_del_rl_profile(hw, rl_prof_elem);
753 ice_debug(hw, ICE_DBG_SCHED,
754 "Remove rl profile failed\n");
755 /* On error, free mem required */
756 LIST_DEL(&rl_prof_elem->list_entry);
757 ice_free(hw, rl_prof_elem);
764 * ice_sched_clear_agg - clears the aggregator related information
765 * @hw: pointer to the hardware structure
767 * This function removes aggregator list and free up aggregator related memory
768 * previously allocated.
770 void ice_sched_clear_agg(struct ice_hw *hw)
772 struct ice_sched_agg_info *agg_info;
773 struct ice_sched_agg_info *atmp;
775 LIST_FOR_EACH_ENTRY_SAFE(agg_info, atmp, &hw->agg_list,
778 struct ice_sched_agg_vsi_info *agg_vsi_info;
779 struct ice_sched_agg_vsi_info *vtmp;
781 LIST_FOR_EACH_ENTRY_SAFE(agg_vsi_info, vtmp,
782 &agg_info->agg_vsi_list,
783 ice_sched_agg_vsi_info, list_entry) {
784 LIST_DEL(&agg_vsi_info->list_entry);
785 ice_free(hw, agg_vsi_info);
787 LIST_DEL(&agg_info->list_entry);
788 ice_free(hw, agg_info);
793 * ice_sched_clear_tx_topo - clears the schduler tree nodes
794 * @pi: port information structure
796 * This function removes all the nodes from HW as well as from SW DB.
798 static void ice_sched_clear_tx_topo(struct ice_port_info *pi)
802 /* remove RL profiles related lists */
803 ice_sched_clear_rl_prof(pi);
805 ice_free_sched_node(pi, pi->root);
811 * ice_sched_clear_port - clear the scheduler elements from SW DB for a port
812 * @pi: port information structure
814 * Cleanup scheduling elements from SW DB
816 void ice_sched_clear_port(struct ice_port_info *pi)
818 if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)
821 pi->port_state = ICE_SCHED_PORT_STATE_INIT;
822 ice_acquire_lock(&pi->sched_lock);
823 ice_sched_clear_tx_topo(pi);
824 ice_release_lock(&pi->sched_lock);
825 ice_destroy_lock(&pi->sched_lock);
829 * ice_sched_cleanup_all - cleanup scheduler elements from SW DB for all ports
830 * @hw: pointer to the HW struct
832 * Cleanup scheduling elements from SW DB for all the ports
834 void ice_sched_cleanup_all(struct ice_hw *hw)
839 if (hw->layer_info) {
840 ice_free(hw, hw->layer_info);
841 hw->layer_info = NULL;
845 ice_sched_clear_port(hw->port_info);
847 hw->num_tx_sched_layers = 0;
848 hw->num_tx_sched_phys_layers = 0;
849 hw->flattened_layers = 0;
854 * ice_aq_cfg_l2_node_cgd - configures L2 node to CGD mapping
855 * @hw: pointer to the HW struct
856 * @num_l2_nodes: the number of L2 nodes whose CGDs to configure
857 * @buf: pointer to buffer
858 * @buf_size: buffer size in bytes
859 * @cd: pointer to command details structure or NULL
861 * Configure L2 Node CGD (0x0414)
864 ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_l2_nodes,
865 struct ice_aqc_cfg_l2_node_cgd_data *buf,
866 u16 buf_size, struct ice_sq_cd *cd)
868 struct ice_aqc_cfg_l2_node_cgd *cmd;
869 struct ice_aq_desc desc;
871 cmd = &desc.params.cfg_l2_node_cgd;
872 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_cfg_l2_node_cgd);
873 desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
875 cmd->num_l2_nodes = CPU_TO_LE16(num_l2_nodes);
876 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
881 * ice_sched_add_elems - add nodes to HW and SW DB
882 * @pi: port information structure
883 * @tc_node: pointer to the branch node
884 * @parent: pointer to the parent node
885 * @layer: layer number to add nodes
886 * @num_nodes: number of nodes
887 * @num_nodes_added: pointer to num nodes added
888 * @first_node_teid: if new nodes are added then return the TEID of first node
890 * This function add nodes to HW as well as to SW DB for a given layer
892 static enum ice_status
893 ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,
894 struct ice_sched_node *parent, u8 layer, u16 num_nodes,
895 u16 *num_nodes_added, u32 *first_node_teid)
897 struct ice_sched_node *prev, *new_node;
898 struct ice_aqc_add_elem *buf;
899 u16 i, num_groups_added = 0;
900 enum ice_status status = ICE_SUCCESS;
901 struct ice_hw *hw = pi->hw;
905 buf_size = sizeof(*buf) + sizeof(*buf->generic) * (num_nodes - 1);
906 buf = (struct ice_aqc_add_elem *)ice_malloc(hw, buf_size);
908 return ICE_ERR_NO_MEMORY;
910 buf->hdr.parent_teid = parent->info.node_teid;
911 buf->hdr.num_elems = CPU_TO_LE16(num_nodes);
912 for (i = 0; i < num_nodes; i++) {
913 buf->generic[i].parent_teid = parent->info.node_teid;
914 buf->generic[i].data.elem_type = ICE_AQC_ELEM_TYPE_SE_GENERIC;
915 buf->generic[i].data.valid_sections =
916 ICE_AQC_ELEM_VALID_GENERIC | ICE_AQC_ELEM_VALID_CIR |
917 ICE_AQC_ELEM_VALID_EIR;
918 buf->generic[i].data.generic = 0;
919 buf->generic[i].data.cir_bw.bw_profile_idx =
920 CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
921 buf->generic[i].data.cir_bw.bw_alloc =
922 CPU_TO_LE16(ICE_SCHED_DFLT_BW_WT);
923 buf->generic[i].data.eir_bw.bw_profile_idx =
924 CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
925 buf->generic[i].data.eir_bw.bw_alloc =
926 CPU_TO_LE16(ICE_SCHED_DFLT_BW_WT);
929 status = ice_aq_add_sched_elems(hw, 1, buf, buf_size,
930 &num_groups_added, NULL);
931 if (status != ICE_SUCCESS || num_groups_added != 1) {
932 ice_debug(hw, ICE_DBG_SCHED, "add node failed FW Error %d\n",
933 hw->adminq.sq_last_status);
938 *num_nodes_added = num_nodes;
939 /* add nodes to the SW DB */
940 for (i = 0; i < num_nodes; i++) {
941 status = ice_sched_add_node(pi, layer, &buf->generic[i]);
942 if (status != ICE_SUCCESS) {
943 ice_debug(hw, ICE_DBG_SCHED,
944 "add nodes in SW DB failed status =%d\n",
949 teid = LE32_TO_CPU(buf->generic[i].node_teid);
950 new_node = ice_sched_find_node_by_teid(parent, teid);
952 ice_debug(hw, ICE_DBG_SCHED,
953 "Node is missing for teid =%d\n", teid);
957 new_node->sibling = NULL;
958 new_node->tc_num = tc_node->tc_num;
960 /* add it to previous node sibling pointer */
961 /* Note: siblings are not linked across branches */
962 prev = ice_sched_get_first_node(pi, tc_node, layer);
963 if (prev && prev != new_node) {
964 while (prev->sibling)
965 prev = prev->sibling;
966 prev->sibling = new_node;
969 /* initialize the sibling head */
970 if (!pi->sib_head[tc_node->tc_num][layer])
971 pi->sib_head[tc_node->tc_num][layer] = new_node;
974 *first_node_teid = teid;
982 * ice_sched_add_nodes_to_layer - Add nodes to a given layer
983 * @pi: port information structure
984 * @tc_node: pointer to TC node
985 * @parent: pointer to parent node
986 * @layer: layer number to add nodes
987 * @num_nodes: number of nodes to be added
988 * @first_node_teid: pointer to the first node TEID
989 * @num_nodes_added: pointer to number of nodes added
991 * This function add nodes to a given layer.
993 static enum ice_status
994 ice_sched_add_nodes_to_layer(struct ice_port_info *pi,
995 struct ice_sched_node *tc_node,
996 struct ice_sched_node *parent, u8 layer,
997 u16 num_nodes, u32 *first_node_teid,
998 u16 *num_nodes_added)
1000 u32 *first_teid_ptr = first_node_teid;
1001 u16 new_num_nodes, max_child_nodes;
1002 enum ice_status status = ICE_SUCCESS;
1003 struct ice_hw *hw = pi->hw;
1007 *num_nodes_added = 0;
1012 if (!parent || layer < hw->sw_entry_point_layer)
1013 return ICE_ERR_PARAM;
1015 /* max children per node per layer */
1016 max_child_nodes = hw->max_children[parent->tx_sched_layer];
1018 /* current number of children + required nodes exceed max children ? */
1019 if ((parent->num_children + num_nodes) > max_child_nodes) {
1020 /* Fail if the parent is a TC node */
1021 if (parent == tc_node)
1024 /* utilize all the spaces if the parent is not full */
1025 if (parent->num_children < max_child_nodes) {
1026 new_num_nodes = max_child_nodes - parent->num_children;
1027 /* this recursion is intentional, and wouldn't
1028 * go more than 2 calls
1030 status = ice_sched_add_nodes_to_layer(pi, tc_node,
1035 if (status != ICE_SUCCESS)
1038 *num_nodes_added += num_added;
1040 /* Don't modify the first node TEID memory if the first node was
1041 * added already in the above call. Instead send some temp
1042 * memory for all other recursive calls.
1045 first_teid_ptr = &temp;
1047 new_num_nodes = num_nodes - num_added;
1049 /* This parent is full, try the next sibling */
1050 parent = parent->sibling;
1052 /* this recursion is intentional, for 1024 queues
1053 * per VSI, it goes max of 16 iterations.
1054 * 1024 / 8 = 128 layer 8 nodes
1055 * 128 /8 = 16 (add 8 nodes per iteration)
1057 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent,
1058 layer, new_num_nodes,
1061 *num_nodes_added += num_added;
1065 status = ice_sched_add_elems(pi, tc_node, parent, layer, num_nodes,
1066 num_nodes_added, first_node_teid);
1071 * ice_sched_get_qgrp_layer - get the current queue group layer number
1072 * @hw: pointer to the HW struct
1074 * This function returns the current queue group layer number
1076 static u8 ice_sched_get_qgrp_layer(struct ice_hw *hw)
1078 /* It's always total layers - 1, the array is 0 relative so -2 */
1079 return hw->num_tx_sched_layers - ICE_QGRP_LAYER_OFFSET;
1083 * ice_sched_get_vsi_layer - get the current VSI layer number
1084 * @hw: pointer to the HW struct
1086 * This function returns the current VSI layer number
1088 static u8 ice_sched_get_vsi_layer(struct ice_hw *hw)
1090 /* Num Layers VSI layer
1093 * 5 or less sw_entry_point_layer
1095 /* calculate the VSI layer based on number of layers. */
1096 if (hw->num_tx_sched_layers > ICE_VSI_LAYER_OFFSET + 1) {
1097 u8 layer = hw->num_tx_sched_layers - ICE_VSI_LAYER_OFFSET;
1099 if (layer > hw->sw_entry_point_layer)
1102 return hw->sw_entry_point_layer;
1106 * ice_sched_get_agg_layer - get the current aggregator layer number
1107 * @hw: pointer to the HW struct
1109 * This function returns the current aggregator layer number
1111 static u8 ice_sched_get_agg_layer(struct ice_hw *hw)
1113 /* Num Layers aggregator layer
1115 * 7 or less sw_entry_point_layer
1117 /* calculate the aggregator layer based on number of layers. */
1118 if (hw->num_tx_sched_layers > ICE_AGG_LAYER_OFFSET + 1) {
1119 u8 layer = hw->num_tx_sched_layers - ICE_AGG_LAYER_OFFSET;
1121 if (layer > hw->sw_entry_point_layer)
1124 return hw->sw_entry_point_layer;
1128 * ice_rm_dflt_leaf_node - remove the default leaf node in the tree
1129 * @pi: port information structure
1131 * This function removes the leaf node that was created by the FW
1132 * during initialization
1134 static void ice_rm_dflt_leaf_node(struct ice_port_info *pi)
1136 struct ice_sched_node *node;
1140 if (!node->num_children)
1142 node = node->children[0];
1144 if (node && node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF) {
1145 u32 teid = LE32_TO_CPU(node->info.node_teid);
1146 enum ice_status status;
1148 /* remove the default leaf node */
1149 status = ice_sched_remove_elems(pi->hw, node->parent, 1, &teid);
1151 ice_free_sched_node(pi, node);
1156 * ice_sched_rm_dflt_nodes - free the default nodes in the tree
1157 * @pi: port information structure
1159 * This function frees all the nodes except root and TC that were created by
1160 * the FW during initialization
1162 static void ice_sched_rm_dflt_nodes(struct ice_port_info *pi)
1164 struct ice_sched_node *node;
1166 ice_rm_dflt_leaf_node(pi);
1168 /* remove the default nodes except TC and root nodes */
1171 if (node->tx_sched_layer >= pi->hw->sw_entry_point_layer &&
1172 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_TC &&
1173 node->info.data.elem_type != ICE_AQC_ELEM_TYPE_ROOT_PORT) {
1174 ice_free_sched_node(pi, node);
1178 if (!node->num_children)
1180 node = node->children[0];
1185 * ice_sched_init_port - Initialize scheduler by querying information from FW
1186 * @pi: port info structure for the tree to cleanup
1188 * This function is the initial call to find the total number of Tx scheduler
1189 * resources, default topology created by firmware and storing the information
1192 enum ice_status ice_sched_init_port(struct ice_port_info *pi)
1194 struct ice_aqc_get_topo_elem *buf;
1195 enum ice_status status;
1202 return ICE_ERR_PARAM;
1205 /* Query the Default Topology from FW */
1206 buf = (struct ice_aqc_get_topo_elem *)ice_malloc(hw,
1207 ICE_AQ_MAX_BUF_LEN);
1209 return ICE_ERR_NO_MEMORY;
1211 /* Query default scheduling tree topology */
1212 status = ice_aq_get_dflt_topo(hw, pi->lport, buf, ICE_AQ_MAX_BUF_LEN,
1213 &num_branches, NULL);
1217 /* num_branches should be between 1-8 */
1218 if (num_branches < 1 || num_branches > ICE_TXSCHED_MAX_BRANCHES) {
1219 ice_debug(hw, ICE_DBG_SCHED, "num_branches unexpected %d\n",
1221 status = ICE_ERR_PARAM;
1225 /* get the number of elements on the default/first branch */
1226 num_elems = LE16_TO_CPU(buf[0].hdr.num_elems);
1228 /* num_elems should always be between 1-9 */
1229 if (num_elems < 1 || num_elems > ICE_AQC_TOPO_MAX_LEVEL_NUM) {
1230 ice_debug(hw, ICE_DBG_SCHED, "num_elems unexpected %d\n",
1232 status = ICE_ERR_PARAM;
1236 /* If the last node is a leaf node then the index of the queue group
1237 * layer is two less than the number of elements.
1239 if (num_elems > 2 && buf[0].generic[num_elems - 1].data.elem_type ==
1240 ICE_AQC_ELEM_TYPE_LEAF)
1241 pi->last_node_teid =
1242 LE32_TO_CPU(buf[0].generic[num_elems - 2].node_teid);
1244 pi->last_node_teid =
1245 LE32_TO_CPU(buf[0].generic[num_elems - 1].node_teid);
1247 /* Insert the Tx Sched root node */
1248 status = ice_sched_add_root_node(pi, &buf[0].generic[0]);
1252 /* Parse the default tree and cache the information */
1253 for (i = 0; i < num_branches; i++) {
1254 num_elems = LE16_TO_CPU(buf[i].hdr.num_elems);
1256 /* Skip root element as already inserted */
1257 for (j = 1; j < num_elems; j++) {
1258 /* update the sw entry point */
1259 if (buf[0].generic[j].data.elem_type ==
1260 ICE_AQC_ELEM_TYPE_ENTRY_POINT)
1261 hw->sw_entry_point_layer = j;
1263 status = ice_sched_add_node(pi, j, &buf[i].generic[j]);
1269 /* Remove the default nodes. */
1271 ice_sched_rm_dflt_nodes(pi);
1273 /* initialize the port for handling the scheduler tree */
1274 pi->port_state = ICE_SCHED_PORT_STATE_READY;
1275 ice_init_lock(&pi->sched_lock);
1276 for (i = 0; i < ICE_AQC_TOPO_MAX_LEVEL_NUM; i++)
1277 INIT_LIST_HEAD(&pi->rl_prof_list[i]);
1280 if (status && pi->root) {
1281 ice_free_sched_node(pi, pi->root);
1290 * ice_sched_get_node - Get the struct ice_sched_node for given TEID
1291 * @pi: port information structure
1292 * @teid: Scheduler node TEID
1294 * This function retrieves the ice_sched_node struct for given TEID from
1295 * the SW DB and returns it to the caller.
1297 struct ice_sched_node *ice_sched_get_node(struct ice_port_info *pi, u32 teid)
1299 struct ice_sched_node *node;
1304 /* Find the node starting from root */
1305 ice_acquire_lock(&pi->sched_lock);
1306 node = ice_sched_find_node_by_teid(pi->root, teid);
1307 ice_release_lock(&pi->sched_lock);
1310 ice_debug(pi->hw, ICE_DBG_SCHED,
1311 "Node not found for teid=0x%x\n", teid);
1317 * ice_sched_query_res_alloc - query the FW for num of logical sched layers
1318 * @hw: pointer to the HW struct
1320 * query FW for allocated scheduler resources and store in HW struct
1322 enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw)
1324 struct ice_aqc_query_txsched_res_resp *buf;
1325 enum ice_status status = ICE_SUCCESS;
1332 buf = (struct ice_aqc_query_txsched_res_resp *)
1333 ice_malloc(hw, sizeof(*buf));
1335 return ICE_ERR_NO_MEMORY;
1337 status = ice_aq_query_sched_res(hw, sizeof(*buf), buf, NULL);
1339 goto sched_query_out;
1341 hw->num_tx_sched_layers = LE16_TO_CPU(buf->sched_props.logical_levels);
1342 hw->num_tx_sched_phys_layers =
1343 LE16_TO_CPU(buf->sched_props.phys_levels);
1344 hw->flattened_layers = buf->sched_props.flattening_bitmap;
1345 hw->max_cgds = buf->sched_props.max_pf_cgds;
1347 /* max sibling group size of current layer refers to the max children
1348 * of the below layer node.
1349 * layer 1 node max children will be layer 2 max sibling group size
1350 * layer 2 node max children will be layer 3 max sibling group size
1351 * and so on. This array will be populated from root (index 0) to
1352 * qgroup layer 7. Leaf node has no children.
1354 for (i = 0; i < hw->num_tx_sched_layers - 1; i++) {
1355 max_sibl = buf->layer_props[i + 1].max_sibl_grp_sz;
1356 hw->max_children[i] = LE16_TO_CPU(max_sibl);
1359 hw->layer_info = (struct ice_aqc_layer_props *)
1360 ice_memdup(hw, buf->layer_props,
1361 (hw->num_tx_sched_layers *
1362 sizeof(*hw->layer_info)),
1364 if (!hw->layer_info) {
1365 status = ICE_ERR_NO_MEMORY;
1366 goto sched_query_out;
1376 * ice_sched_find_node_in_subtree - Find node in part of base node subtree
1377 * @hw: pointer to the HW struct
1378 * @base: pointer to the base node
1379 * @node: pointer to the node to search
1381 * This function checks whether a given node is part of the base node
1385 ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base,
1386 struct ice_sched_node *node)
1390 for (i = 0; i < base->num_children; i++) {
1391 struct ice_sched_node *child = base->children[i];
1396 if (child->tx_sched_layer > node->tx_sched_layer)
1399 /* this recursion is intentional, and wouldn't
1400 * go more than 8 calls
1402 if (ice_sched_find_node_in_subtree(hw, child, node))
1409 * ice_sched_get_free_qparent - Get a free LAN or RDMA queue group node
1410 * @pi: port information structure
1411 * @vsi_handle: software VSI handle
1412 * @tc: branch number
1413 * @owner: LAN or RDMA
1415 * This function retrieves a free LAN or RDMA queue group node
1417 struct ice_sched_node *
1418 ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
1421 struct ice_sched_node *vsi_node, *qgrp_node = NULL;
1422 struct ice_vsi_ctx *vsi_ctx;
1426 qgrp_layer = ice_sched_get_qgrp_layer(pi->hw);
1427 max_children = pi->hw->max_children[qgrp_layer];
1429 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
1432 vsi_node = vsi_ctx->sched.vsi_node[tc];
1433 /* validate invalid VSI ID */
1437 /* get the first queue group node from VSI sub-tree */
1438 qgrp_node = ice_sched_get_first_node(pi, vsi_node, qgrp_layer);
1440 /* make sure the qgroup node is part of the VSI subtree */
1441 if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node))
1442 if (qgrp_node->num_children < max_children &&
1443 qgrp_node->owner == owner)
1445 qgrp_node = qgrp_node->sibling;
1453 * ice_sched_get_vsi_node - Get a VSI node based on VSI ID
1454 * @pi: pointer to the port information structure
1455 * @tc_node: pointer to the TC node
1456 * @vsi_handle: software VSI handle
1458 * This function retrieves a VSI node for a given VSI ID from a given
1461 struct ice_sched_node *
1462 ice_sched_get_vsi_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,
1465 struct ice_sched_node *node;
1468 vsi_layer = ice_sched_get_vsi_layer(pi->hw);
1469 node = ice_sched_get_first_node(pi, tc_node, vsi_layer);
1471 /* Check whether it already exists */
1473 if (node->vsi_handle == vsi_handle)
1475 node = node->sibling;
1482 * ice_sched_get_agg_node - Get an aggregator node based on aggregator ID
1483 * @pi: pointer to the port information structure
1484 * @tc_node: pointer to the TC node
1485 * @agg_id: aggregator ID
1487 * This function retrieves an aggregator node for a given aggregator ID from
1490 static struct ice_sched_node *
1491 ice_sched_get_agg_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,
1494 struct ice_sched_node *node;
1495 struct ice_hw *hw = pi->hw;
1500 agg_layer = ice_sched_get_agg_layer(hw);
1501 node = ice_sched_get_first_node(pi, tc_node, agg_layer);
1503 /* Check whether it already exists */
1505 if (node->agg_id == agg_id)
1507 node = node->sibling;
1514 * ice_sched_check_node - Compare node parameters between SW DB and HW DB
1515 * @hw: pointer to the HW struct
1516 * @node: pointer to the ice_sched_node struct
1518 * This function queries and compares the HW element with SW DB node parameters
1520 static bool ice_sched_check_node(struct ice_hw *hw, struct ice_sched_node *node)
1522 struct ice_aqc_get_elem buf;
1523 enum ice_status status;
1526 node_teid = LE32_TO_CPU(node->info.node_teid);
1527 status = ice_sched_query_elem(hw, node_teid, &buf);
1528 if (status != ICE_SUCCESS)
1531 if (memcmp(buf.generic, &node->info, sizeof(*buf.generic))) {
1532 ice_debug(hw, ICE_DBG_SCHED, "Node mismatch for teid=0x%x\n",
1541 * ice_sched_calc_vsi_child_nodes - calculate number of VSI child nodes
1542 * @hw: pointer to the HW struct
1543 * @num_qs: number of queues
1544 * @num_nodes: num nodes array
1546 * This function calculates the number of VSI child nodes based on the
1550 ice_sched_calc_vsi_child_nodes(struct ice_hw *hw, u16 num_qs, u16 *num_nodes)
1555 qgl = ice_sched_get_qgrp_layer(hw);
1556 vsil = ice_sched_get_vsi_layer(hw);
1558 /* calculate num nodes from queue group to VSI layer */
1559 for (i = qgl; i > vsil; i--) {
1560 /* round to the next integer if there is a remainder */
1561 num = DIVIDE_AND_ROUND_UP(num, hw->max_children[i]);
1563 /* need at least one node */
1564 num_nodes[i] = num ? num : 1;
1569 * ice_sched_add_vsi_child_nodes - add VSI child nodes to tree
1570 * @pi: port information structure
1571 * @vsi_handle: software VSI handle
1572 * @tc_node: pointer to the TC node
1573 * @num_nodes: pointer to the num nodes that needs to be added per layer
1574 * @owner: node owner (LAN or RDMA)
1576 * This function adds the VSI child nodes to tree. It gets called for
1577 * LAN and RDMA separately.
1579 static enum ice_status
1580 ice_sched_add_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
1581 struct ice_sched_node *tc_node, u16 *num_nodes,
1584 struct ice_sched_node *parent, *node;
1585 struct ice_hw *hw = pi->hw;
1586 enum ice_status status;
1587 u32 first_node_teid;
1591 qgl = ice_sched_get_qgrp_layer(hw);
1592 vsil = ice_sched_get_vsi_layer(hw);
1593 parent = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1594 for (i = vsil + 1; i <= qgl; i++) {
1598 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
1602 if (status != ICE_SUCCESS || num_nodes[i] != num_added)
1605 /* The newly added node can be a new parent for the next
1609 parent = ice_sched_find_node_by_teid(tc_node,
1613 node->owner = owner;
1614 node = node->sibling;
1617 parent = parent->children[0];
1625 * ice_sched_calc_vsi_support_nodes - calculate number of VSI support nodes
1626 * @pi: pointer to the port info structure
1627 * @tc_node: pointer to TC node
1628 * @num_nodes: pointer to num nodes array
1630 * This function calculates the number of supported nodes needed to add this
1631 * VSI into Tx tree including the VSI, parent and intermediate nodes in below
1635 ice_sched_calc_vsi_support_nodes(struct ice_port_info *pi,
1636 struct ice_sched_node *tc_node, u16 *num_nodes)
1638 struct ice_sched_node *node;
1642 vsil = ice_sched_get_vsi_layer(pi->hw);
1643 for (i = vsil; i >= pi->hw->sw_entry_point_layer; i--)
1644 /* Add intermediate nodes if TC has no children and
1645 * need at least one node for VSI
1647 if (!tc_node->num_children || i == vsil) {
1650 /* If intermediate nodes are reached max children
1651 * then add a new one.
1653 node = ice_sched_get_first_node(pi, tc_node, (u8)i);
1654 /* scan all the siblings */
1656 if (node->num_children <
1657 pi->hw->max_children[i])
1659 node = node->sibling;
1662 /* tree has one intermediate node to add this new VSI.
1663 * So no need to calculate supported nodes for below
1668 /* all the nodes are full, allocate a new one */
1674 * ice_sched_add_vsi_support_nodes - add VSI supported nodes into Tx tree
1675 * @pi: port information structure
1676 * @vsi_handle: software VSI handle
1677 * @tc_node: pointer to TC node
1678 * @num_nodes: pointer to num nodes array
1680 * This function adds the VSI supported nodes into Tx tree including the
1681 * VSI, its parent and intermediate nodes in below layers
1683 static enum ice_status
1684 ice_sched_add_vsi_support_nodes(struct ice_port_info *pi, u16 vsi_handle,
1685 struct ice_sched_node *tc_node, u16 *num_nodes)
1687 struct ice_sched_node *parent = tc_node;
1688 enum ice_status status;
1689 u32 first_node_teid;
1694 return ICE_ERR_PARAM;
1696 vsil = ice_sched_get_vsi_layer(pi->hw);
1697 for (i = pi->hw->sw_entry_point_layer; i <= vsil; i++) {
1698 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent,
1702 if (status != ICE_SUCCESS || num_nodes[i] != num_added)
1705 /* The newly added node can be a new parent for the next
1709 parent = ice_sched_find_node_by_teid(tc_node,
1712 parent = parent->children[0];
1718 parent->vsi_handle = vsi_handle;
1725 * ice_sched_add_vsi_to_topo - add a new VSI into tree
1726 * @pi: port information structure
1727 * @vsi_handle: software VSI handle
1730 * This function adds a new VSI into scheduler tree
1732 static enum ice_status
1733 ice_sched_add_vsi_to_topo(struct ice_port_info *pi, u16 vsi_handle, u8 tc)
1735 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
1736 struct ice_sched_node *tc_node;
1738 tc_node = ice_sched_get_tc_node(pi, tc);
1740 return ICE_ERR_PARAM;
1742 /* calculate number of supported nodes needed for this VSI */
1743 ice_sched_calc_vsi_support_nodes(pi, tc_node, num_nodes);
1745 /* add VSI supported nodes to TC subtree */
1746 return ice_sched_add_vsi_support_nodes(pi, vsi_handle, tc_node,
1751 * ice_sched_update_vsi_child_nodes - update VSI child nodes
1752 * @pi: port information structure
1753 * @vsi_handle: software VSI handle
1755 * @new_numqs: new number of max queues
1756 * @owner: owner of this subtree
1758 * This function updates the VSI child nodes based on the number of queues
1760 static enum ice_status
1761 ice_sched_update_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
1762 u8 tc, u16 new_numqs, u8 owner)
1764 u16 new_num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
1765 struct ice_sched_node *vsi_node;
1766 struct ice_sched_node *tc_node;
1767 struct ice_vsi_ctx *vsi_ctx;
1768 enum ice_status status = ICE_SUCCESS;
1769 struct ice_hw *hw = pi->hw;
1772 tc_node = ice_sched_get_tc_node(pi, tc);
1776 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1780 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
1782 return ICE_ERR_PARAM;
1784 prev_numqs = vsi_ctx->sched.max_lanq[tc];
1785 /* num queues are not changed or less than the previous number */
1786 if (new_numqs <= prev_numqs)
1788 status = ice_alloc_lan_q_ctx(hw, vsi_handle, tc, new_numqs);
1793 ice_sched_calc_vsi_child_nodes(hw, new_numqs, new_num_nodes);
1794 /* Keep the max number of queue configuration all the time. Update the
1795 * tree only if number of queues > previous number of queues. This may
1796 * leave some extra nodes in the tree if number of queues < previous
1797 * number but that wouldn't harm anything. Removing those extra nodes
1798 * may complicate the code if those nodes are part of SRL or
1799 * individually rate limited.
1801 status = ice_sched_add_vsi_child_nodes(pi, vsi_handle, tc_node,
1802 new_num_nodes, owner);
1805 vsi_ctx->sched.max_lanq[tc] = new_numqs;
1811 * ice_sched_cfg_vsi - configure the new/existing VSI
1812 * @pi: port information structure
1813 * @vsi_handle: software VSI handle
1815 * @maxqs: max number of queues
1816 * @owner: LAN or RDMA
1817 * @enable: TC enabled or disabled
1819 * This function adds/updates VSI nodes based on the number of queues. If TC is
1820 * enabled and VSI is in suspended state then resume the VSI back. If TC is
1821 * disabled then suspend the VSI if it is not already.
1824 ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
1825 u8 owner, bool enable)
1827 struct ice_sched_node *vsi_node, *tc_node;
1828 struct ice_vsi_ctx *vsi_ctx;
1829 enum ice_status status = ICE_SUCCESS;
1830 struct ice_hw *hw = pi->hw;
1832 ice_debug(pi->hw, ICE_DBG_SCHED, "add/config VSI %d\n", vsi_handle);
1833 tc_node = ice_sched_get_tc_node(pi, tc);
1835 return ICE_ERR_PARAM;
1836 vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);
1838 return ICE_ERR_PARAM;
1839 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1841 /* suspend the VSI if TC is not enabled */
1843 if (vsi_node && vsi_node->in_use) {
1844 u32 teid = LE32_TO_CPU(vsi_node->info.node_teid);
1846 status = ice_sched_suspend_resume_elems(hw, 1, &teid,
1849 vsi_node->in_use = false;
1854 /* TC is enabled, if it is a new VSI then add it to the tree */
1856 status = ice_sched_add_vsi_to_topo(pi, vsi_handle, tc);
1860 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1864 vsi_ctx->sched.vsi_node[tc] = vsi_node;
1865 vsi_node->in_use = true;
1866 /* invalidate the max queues whenever VSI gets added first time
1867 * into the scheduler tree (boot or after reset). We need to
1868 * recreate the child nodes all the time in these cases.
1870 vsi_ctx->sched.max_lanq[tc] = 0;
1873 /* update the VSI child nodes */
1874 status = ice_sched_update_vsi_child_nodes(pi, vsi_handle, tc, maxqs,
1879 /* TC is enabled, resume the VSI if it is in the suspend state */
1880 if (!vsi_node->in_use) {
1881 u32 teid = LE32_TO_CPU(vsi_node->info.node_teid);
1883 status = ice_sched_suspend_resume_elems(hw, 1, &teid, false);
1885 vsi_node->in_use = true;
1892 * ice_sched_rm_agg_vsi_entry - remove aggregator related VSI info entry
1893 * @pi: port information structure
1894 * @vsi_handle: software VSI handle
1896 * This function removes single aggregator VSI info entry from
1900 ice_sched_rm_agg_vsi_info(struct ice_port_info *pi, u16 vsi_handle)
1902 struct ice_sched_agg_info *agg_info;
1903 struct ice_sched_agg_info *atmp;
1905 LIST_FOR_EACH_ENTRY_SAFE(agg_info, atmp, &pi->hw->agg_list,
1908 struct ice_sched_agg_vsi_info *agg_vsi_info;
1909 struct ice_sched_agg_vsi_info *vtmp;
1911 LIST_FOR_EACH_ENTRY_SAFE(agg_vsi_info, vtmp,
1912 &agg_info->agg_vsi_list,
1913 ice_sched_agg_vsi_info, list_entry)
1914 if (agg_vsi_info->vsi_handle == vsi_handle) {
1915 LIST_DEL(&agg_vsi_info->list_entry);
1916 ice_free(pi->hw, agg_vsi_info);
1923 * ice_sched_is_leaf_node_present - check for a leaf node in the sub-tree
1924 * @node: pointer to the sub-tree node
1926 * This function checks for a leaf node presence in a given sub-tree node.
1928 static bool ice_sched_is_leaf_node_present(struct ice_sched_node *node)
1932 for (i = 0; i < node->num_children; i++)
1933 if (ice_sched_is_leaf_node_present(node->children[i]))
1935 /* check for a leaf node */
1936 return (node->info.data.elem_type == ICE_AQC_ELEM_TYPE_LEAF);
1940 * ice_sched_rm_vsi_cfg - remove the VSI and its children nodes
1941 * @pi: port information structure
1942 * @vsi_handle: software VSI handle
1943 * @owner: LAN or RDMA
1945 * This function removes the VSI and its LAN or RDMA children nodes from the
1948 static enum ice_status
1949 ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)
1951 enum ice_status status = ICE_ERR_PARAM;
1952 struct ice_vsi_ctx *vsi_ctx;
1955 ice_debug(pi->hw, ICE_DBG_SCHED, "removing VSI %d\n", vsi_handle);
1956 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
1958 ice_acquire_lock(&pi->sched_lock);
1959 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
1961 goto exit_sched_rm_vsi_cfg;
1963 ice_for_each_traffic_class(i) {
1964 struct ice_sched_node *vsi_node, *tc_node;
1967 tc_node = ice_sched_get_tc_node(pi, i);
1971 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
1975 if (ice_sched_is_leaf_node_present(vsi_node)) {
1976 ice_debug(pi->hw, ICE_DBG_SCHED,
1977 "VSI has leaf nodes in TC %d\n", i);
1978 status = ICE_ERR_IN_USE;
1979 goto exit_sched_rm_vsi_cfg;
1981 while (j < vsi_node->num_children) {
1982 if (vsi_node->children[j]->owner == owner) {
1983 ice_free_sched_node(pi, vsi_node->children[j]);
1985 /* reset the counter again since the num
1986 * children will be updated after node removal
1993 /* remove the VSI if it has no children */
1994 if (!vsi_node->num_children) {
1995 ice_free_sched_node(pi, vsi_node);
1996 vsi_ctx->sched.vsi_node[i] = NULL;
1998 /* clean up aggregator related VSI info if any */
1999 ice_sched_rm_agg_vsi_info(pi, vsi_handle);
2001 if (owner == ICE_SCHED_NODE_OWNER_LAN)
2002 vsi_ctx->sched.max_lanq[i] = 0;
2004 status = ICE_SUCCESS;
2006 exit_sched_rm_vsi_cfg:
2007 ice_release_lock(&pi->sched_lock);
2012 * ice_rm_vsi_lan_cfg - remove VSI and its LAN children nodes
2013 * @pi: port information structure
2014 * @vsi_handle: software VSI handle
2016 * This function clears the VSI and its LAN children nodes from scheduler tree
2019 enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle)
2021 return ice_sched_rm_vsi_cfg(pi, vsi_handle, ICE_SCHED_NODE_OWNER_LAN);
2026 * ice_sched_is_tree_balanced - Check tree nodes are identical or not
2027 * @hw: pointer to the HW struct
2028 * @node: pointer to the ice_sched_node struct
2030 * This function compares all the nodes for a given tree against HW DB nodes
2031 * This function needs to be called with the port_info->sched_lock held
2033 bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node)
2037 /* start from the leaf node */
2038 for (i = 0; i < node->num_children; i++)
2039 /* Fail if node doesn't match with the SW DB
2040 * this recursion is intentional, and wouldn't
2041 * go more than 9 calls
2043 if (!ice_sched_is_tree_balanced(hw, node->children[i]))
2046 return ice_sched_check_node(hw, node);
2050 * ice_aq_query_node_to_root - retrieve the tree topology for a given node TEID
2051 * @hw: pointer to the HW struct
2052 * @node_teid: node TEID
2053 * @buf: pointer to buffer
2054 * @buf_size: buffer size in bytes
2055 * @cd: pointer to command details structure or NULL
2057 * This function retrieves the tree topology from the firmware for a given
2058 * node TEID to the root node.
2061 ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,
2062 struct ice_aqc_get_elem *buf, u16 buf_size,
2063 struct ice_sq_cd *cd)
2065 struct ice_aqc_query_node_to_root *cmd;
2066 struct ice_aq_desc desc;
2068 cmd = &desc.params.query_node_to_root;
2069 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_query_node_to_root);
2070 cmd->teid = CPU_TO_LE32(node_teid);
2071 return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
2075 * ice_get_agg_info - get the aggregator ID
2076 * @hw: pointer to the hardware structure
2077 * @agg_id: aggregator ID
2079 * This function validates aggregator ID. The function returns info if
2080 * aggregator ID is present in list otherwise it returns null.
2082 static struct ice_sched_agg_info*
2083 ice_get_agg_info(struct ice_hw *hw, u32 agg_id)
2085 struct ice_sched_agg_info *agg_info;
2087 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
2089 if (agg_info->agg_id == agg_id)
2096 * ice_sched_get_free_vsi_parent - Find a free parent node in aggregator subtree
2097 * @hw: pointer to the HW struct
2098 * @node: pointer to a child node
2099 * @num_nodes: num nodes count array
2101 * This function walks through the aggregator subtree to find a free parent
2104 static struct ice_sched_node *
2105 ice_sched_get_free_vsi_parent(struct ice_hw *hw, struct ice_sched_node *node,
2108 u8 l = node->tx_sched_layer;
2111 vsil = ice_sched_get_vsi_layer(hw);
2113 /* Is it VSI parent layer ? */
2115 return (node->num_children < hw->max_children[l]) ? node : NULL;
2117 /* We have intermediate nodes. Let's walk through the subtree. If the
2118 * intermediate node has space to add a new node then clear the count
2120 if (node->num_children < hw->max_children[l])
2122 /* The below recursive call is intentional and wouldn't go more than
2123 * 2 or 3 iterations.
2126 for (i = 0; i < node->num_children; i++) {
2127 struct ice_sched_node *parent;
2129 parent = ice_sched_get_free_vsi_parent(hw, node->children[i],
2139 * ice_sched_update_parent - update the new parent in SW DB
2140 * @new_parent: pointer to a new parent node
2141 * @node: pointer to a child node
2143 * This function removes the child from the old parent and adds it to a new
2147 ice_sched_update_parent(struct ice_sched_node *new_parent,
2148 struct ice_sched_node *node)
2150 struct ice_sched_node *old_parent;
2153 old_parent = node->parent;
2155 /* update the old parent children */
2156 for (i = 0; i < old_parent->num_children; i++)
2157 if (old_parent->children[i] == node) {
2158 for (j = i + 1; j < old_parent->num_children; j++)
2159 old_parent->children[j - 1] =
2160 old_parent->children[j];
2161 old_parent->num_children--;
2165 /* now move the node to a new parent */
2166 new_parent->children[new_parent->num_children++] = node;
2167 node->parent = new_parent;
2168 node->info.parent_teid = new_parent->info.node_teid;
2172 * ice_sched_move_nodes - move child nodes to a given parent
2173 * @pi: port information structure
2174 * @parent: pointer to parent node
2175 * @num_items: number of child nodes to be moved
2176 * @list: pointer to child node teids
2178 * This function move the child nodes to a given parent.
2180 static enum ice_status
2181 ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
2182 u16 num_items, u32 *list)
2184 enum ice_status status = ICE_SUCCESS;
2185 struct ice_aqc_move_elem *buf;
2186 struct ice_sched_node *node;
2187 u16 i, grps_movd = 0;
2192 if (!parent || !num_items)
2193 return ICE_ERR_PARAM;
2195 /* Does parent have enough space */
2196 if (parent->num_children + num_items >=
2197 hw->max_children[parent->tx_sched_layer])
2198 return ICE_ERR_AQ_FULL;
2200 buf = (struct ice_aqc_move_elem *)ice_malloc(hw, sizeof(*buf));
2202 return ICE_ERR_NO_MEMORY;
2204 for (i = 0; i < num_items; i++) {
2205 node = ice_sched_find_node_by_teid(pi->root, list[i]);
2207 status = ICE_ERR_PARAM;
2211 buf->hdr.src_parent_teid = node->info.parent_teid;
2212 buf->hdr.dest_parent_teid = parent->info.node_teid;
2213 buf->teid[0] = node->info.node_teid;
2214 buf->hdr.num_elems = CPU_TO_LE16(1);
2215 status = ice_aq_move_sched_elems(hw, 1, buf, sizeof(*buf),
2217 if (status && grps_movd != 1) {
2218 status = ICE_ERR_CFG;
2222 /* update the SW DB */
2223 ice_sched_update_parent(parent, node);
2232 * ice_sched_move_vsi_to_agg - move VSI to aggregator node
2233 * @pi: port information structure
2234 * @vsi_handle: software VSI handle
2235 * @agg_id: aggregator ID
2238 * This function moves a VSI to an aggregator node or its subtree.
2239 * Intermediate nodes may be created if required.
2241 static enum ice_status
2242 ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
2245 struct ice_sched_node *vsi_node, *agg_node, *tc_node, *parent;
2246 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
2247 u32 first_node_teid, vsi_teid;
2248 enum ice_status status;
2249 u16 num_nodes_added;
2252 tc_node = ice_sched_get_tc_node(pi, tc);
2256 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
2258 return ICE_ERR_DOES_NOT_EXIST;
2260 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
2262 return ICE_ERR_DOES_NOT_EXIST;
2264 aggl = ice_sched_get_agg_layer(pi->hw);
2265 vsil = ice_sched_get_vsi_layer(pi->hw);
2267 /* set intermediate node count to 1 between aggregator and VSI layers */
2268 for (i = aggl + 1; i < vsil; i++)
2271 /* Check if the aggregator subtree has any free node to add the VSI */
2272 for (i = 0; i < agg_node->num_children; i++) {
2273 parent = ice_sched_get_free_vsi_parent(pi->hw,
2274 agg_node->children[i],
2282 for (i = aggl + 1; i < vsil; i++) {
2283 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
2287 if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
2290 /* The newly added node can be a new parent for the next
2293 if (num_nodes_added)
2294 parent = ice_sched_find_node_by_teid(tc_node,
2297 parent = parent->children[0];
2304 vsi_teid = LE32_TO_CPU(vsi_node->info.node_teid);
2305 return ice_sched_move_nodes(pi, parent, 1, &vsi_teid);
2309 * ice_move_all_vsi_to_dflt_agg - move all VSI(s) to default aggregator
2310 * @pi: port information structure
2311 * @agg_info: aggregator info
2312 * @tc: traffic class number
2313 * @rm_vsi_info: true or false
2315 * This function move all the VSI(s) to the default aggregator and delete
2316 * aggregator VSI info based on passed in boolean parameter rm_vsi_info. The
2317 * caller holds the scheduler lock.
2319 static enum ice_status
2320 ice_move_all_vsi_to_dflt_agg(struct ice_port_info *pi,
2321 struct ice_sched_agg_info *agg_info, u8 tc,
2324 struct ice_sched_agg_vsi_info *agg_vsi_info;
2325 struct ice_sched_agg_vsi_info *tmp;
2326 enum ice_status status = ICE_SUCCESS;
2328 LIST_FOR_EACH_ENTRY_SAFE(agg_vsi_info, tmp, &agg_info->agg_vsi_list,
2329 ice_sched_agg_vsi_info, list_entry) {
2330 u16 vsi_handle = agg_vsi_info->vsi_handle;
2332 /* Move VSI to default aggregator */
2333 if (!ice_is_tc_ena(agg_vsi_info->tc_bitmap[0], tc))
2336 status = ice_sched_move_vsi_to_agg(pi, vsi_handle,
2337 ICE_DFLT_AGG_ID, tc);
2341 ice_clear_bit(tc, agg_vsi_info->tc_bitmap);
2342 if (rm_vsi_info && !agg_vsi_info->tc_bitmap[0]) {
2343 LIST_DEL(&agg_vsi_info->list_entry);
2344 ice_free(pi->hw, agg_vsi_info);
2352 * ice_sched_is_agg_inuse - check whether the aggregator is in use or not
2353 * @pi: port information structure
2354 * @node: node pointer
2356 * This function checks whether the aggregator is attached with any VSI or not.
2359 ice_sched_is_agg_inuse(struct ice_port_info *pi, struct ice_sched_node *node)
2363 vsil = ice_sched_get_vsi_layer(pi->hw);
2364 if (node->tx_sched_layer < vsil - 1) {
2365 for (i = 0; i < node->num_children; i++)
2366 if (ice_sched_is_agg_inuse(pi, node->children[i]))
2370 return node->num_children ? true : false;
2375 * ice_sched_rm_agg_cfg - remove the aggregator node
2376 * @pi: port information structure
2377 * @agg_id: aggregator ID
2380 * This function removes the aggregator node and intermediate nodes if any
2383 static enum ice_status
2384 ice_sched_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
2386 struct ice_sched_node *tc_node, *agg_node;
2387 struct ice_hw *hw = pi->hw;
2389 tc_node = ice_sched_get_tc_node(pi, tc);
2393 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
2395 return ICE_ERR_DOES_NOT_EXIST;
2397 /* Can't remove the aggregator node if it has children */
2398 if (ice_sched_is_agg_inuse(pi, agg_node))
2399 return ICE_ERR_IN_USE;
2401 /* need to remove the whole subtree if aggregator node is the
2404 while (agg_node->tx_sched_layer > hw->sw_entry_point_layer) {
2405 struct ice_sched_node *parent = agg_node->parent;
2410 if (parent->num_children > 1)
2416 ice_free_sched_node(pi, agg_node);
2421 * ice_rm_agg_cfg_tc - remove aggregator configuration for TC
2422 * @pi: port information structure
2423 * @agg_info: aggregator ID
2425 * @rm_vsi_info: bool value true or false
2427 * This function removes aggregator reference to VSI of given TC. It removes
2428 * the aggregator configuration completely for requested TC. The caller needs
2429 * to hold the scheduler lock.
2431 static enum ice_status
2432 ice_rm_agg_cfg_tc(struct ice_port_info *pi, struct ice_sched_agg_info *agg_info,
2433 u8 tc, bool rm_vsi_info)
2435 enum ice_status status = ICE_SUCCESS;
2437 /* If nothing to remove - return success */
2438 if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
2439 goto exit_rm_agg_cfg_tc;
2441 status = ice_move_all_vsi_to_dflt_agg(pi, agg_info, tc, rm_vsi_info);
2443 goto exit_rm_agg_cfg_tc;
2445 /* Delete aggregator node(s) */
2446 status = ice_sched_rm_agg_cfg(pi, agg_info->agg_id, tc);
2448 goto exit_rm_agg_cfg_tc;
2450 ice_clear_bit(tc, agg_info->tc_bitmap);
2456 * ice_save_agg_tc_bitmap - save aggregator TC bitmap
2457 * @pi: port information structure
2458 * @agg_id: aggregator ID
2459 * @tc_bitmap: 8 bits TC bitmap
2461 * Save aggregator TC bitmap. This function needs to be called with scheduler
2464 static enum ice_status
2465 ice_save_agg_tc_bitmap(struct ice_port_info *pi, u32 agg_id,
2466 ice_bitmap_t *tc_bitmap)
2468 struct ice_sched_agg_info *agg_info;
2470 agg_info = ice_get_agg_info(pi->hw, agg_id);
2472 return ICE_ERR_PARAM;
2473 ice_cp_bitmap(agg_info->replay_tc_bitmap, tc_bitmap,
2474 ICE_MAX_TRAFFIC_CLASS);
2479 * ice_sched_add_agg_cfg - create an aggregator node
2480 * @pi: port information structure
2481 * @agg_id: aggregator ID
2484 * This function creates an aggregator node and intermediate nodes if required
2487 static enum ice_status
2488 ice_sched_add_agg_cfg(struct ice_port_info *pi, u32 agg_id, u8 tc)
2490 struct ice_sched_node *parent, *agg_node, *tc_node;
2491 u16 num_nodes[ICE_AQC_TOPO_MAX_LEVEL_NUM] = { 0 };
2492 enum ice_status status = ICE_SUCCESS;
2493 struct ice_hw *hw = pi->hw;
2494 u32 first_node_teid;
2495 u16 num_nodes_added;
2498 tc_node = ice_sched_get_tc_node(pi, tc);
2502 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
2503 /* Does Agg node already exist ? */
2507 aggl = ice_sched_get_agg_layer(hw);
2509 /* need one node in Agg layer */
2510 num_nodes[aggl] = 1;
2512 /* Check whether the intermediate nodes have space to add the
2513 * new aggregator. If they are full, then SW needs to allocate a new
2514 * intermediate node on those layers
2516 for (i = hw->sw_entry_point_layer; i < aggl; i++) {
2517 parent = ice_sched_get_first_node(pi, tc_node, i);
2519 /* scan all the siblings */
2521 if (parent->num_children < hw->max_children[i])
2523 parent = parent->sibling;
2526 /* all the nodes are full, reserve one for this layer */
2531 /* add the aggregator node */
2533 for (i = hw->sw_entry_point_layer; i <= aggl; i++) {
2537 status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i,
2541 if (status != ICE_SUCCESS || num_nodes[i] != num_nodes_added)
2544 /* The newly added node can be a new parent for the next
2547 if (num_nodes_added) {
2548 parent = ice_sched_find_node_by_teid(tc_node,
2550 /* register aggregator ID with the aggregator node */
2551 if (parent && i == aggl)
2552 parent->agg_id = agg_id;
2554 parent = parent->children[0];
2562 * ice_sched_cfg_agg - configure aggregator node
2563 * @pi: port information structure
2564 * @agg_id: aggregator ID
2565 * @agg_type: aggregator type queue, VSI, or aggregator group
2566 * @tc_bitmap: bits TC bitmap
2568 * It registers a unique aggregator node into scheduler services. It
2569 * allows a user to register with a unique ID to track it's resources.
2570 * The aggregator type determines if this is a queue group, VSI group
2571 * or aggregator group. It then creates the aggregator node(s) for requested
2572 * TC(s) or removes an existing aggregator node including its configuration
2573 * if indicated via tc_bitmap. Call ice_rm_agg_cfg to release aggregator
2574 * resources and remove aggregator ID.
2575 * This function needs to be called with scheduler lock held.
2577 static enum ice_status
2578 ice_sched_cfg_agg(struct ice_port_info *pi, u32 agg_id,
2579 enum ice_agg_type agg_type, ice_bitmap_t *tc_bitmap)
2581 struct ice_sched_agg_info *agg_info;
2582 enum ice_status status = ICE_SUCCESS;
2583 struct ice_hw *hw = pi->hw;
2586 agg_info = ice_get_agg_info(hw, agg_id);
2588 /* Create new entry for new aggregator ID */
2589 agg_info = (struct ice_sched_agg_info *)
2590 ice_malloc(hw, sizeof(*agg_info));
2592 status = ICE_ERR_NO_MEMORY;
2595 agg_info->agg_id = agg_id;
2596 agg_info->agg_type = agg_type;
2597 agg_info->tc_bitmap[0] = 0;
2599 /* Initialize the aggregator VSI list head */
2600 INIT_LIST_HEAD(&agg_info->agg_vsi_list);
2602 /* Add new entry in aggregator list */
2603 LIST_ADD(&agg_info->list_entry, &hw->agg_list);
2605 /* Create aggregator node(s) for requested TC(s) */
2606 ice_for_each_traffic_class(tc) {
2607 if (!ice_is_tc_ena(*tc_bitmap, tc)) {
2608 /* Delete aggregator cfg TC if it exists previously */
2609 status = ice_rm_agg_cfg_tc(pi, agg_info, tc, false);
2615 /* Check if aggregator node for TC already exists */
2616 if (ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
2619 /* Create new aggregator node for TC */
2620 status = ice_sched_add_agg_cfg(pi, agg_id, tc);
2624 /* Save aggregator node's TC information */
2625 ice_set_bit(tc, agg_info->tc_bitmap);
2632 * ice_cfg_agg - config aggregator node
2633 * @pi: port information structure
2634 * @agg_id: aggregator ID
2635 * @agg_type: aggregator type queue, VSI, or aggregator group
2636 * @tc_bitmap: bits TC bitmap
2638 * This function configures aggregator node(s).
2641 ice_cfg_agg(struct ice_port_info *pi, u32 agg_id, enum ice_agg_type agg_type,
2644 ice_bitmap_t bitmap = tc_bitmap;
2645 enum ice_status status;
2647 ice_acquire_lock(&pi->sched_lock);
2648 status = ice_sched_cfg_agg(pi, agg_id, agg_type,
2649 (ice_bitmap_t *)&bitmap);
2651 status = ice_save_agg_tc_bitmap(pi, agg_id,
2652 (ice_bitmap_t *)&bitmap);
2653 ice_release_lock(&pi->sched_lock);
2658 * ice_get_agg_vsi_info - get the aggregator ID
2659 * @agg_info: aggregator info
2660 * @vsi_handle: software VSI handle
2662 * The function returns aggregator VSI info based on VSI handle. This function
2663 * needs to be called with scheduler lock held.
2665 static struct ice_sched_agg_vsi_info*
2666 ice_get_agg_vsi_info(struct ice_sched_agg_info *agg_info, u16 vsi_handle)
2668 struct ice_sched_agg_vsi_info *agg_vsi_info;
2670 LIST_FOR_EACH_ENTRY(agg_vsi_info, &agg_info->agg_vsi_list,
2671 ice_sched_agg_vsi_info, list_entry)
2672 if (agg_vsi_info->vsi_handle == vsi_handle)
2673 return agg_vsi_info;
2679 * ice_get_vsi_agg_info - get the aggregator info of VSI
2680 * @hw: pointer to the hardware structure
2681 * @vsi_handle: Sw VSI handle
2683 * The function returns aggregator info of VSI represented via vsi_handle. The
2684 * VSI has in this case a different aggregator than the default one. This
2685 * function needs to be called with scheduler lock held.
2687 static struct ice_sched_agg_info*
2688 ice_get_vsi_agg_info(struct ice_hw *hw, u16 vsi_handle)
2690 struct ice_sched_agg_info *agg_info;
2692 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
2694 struct ice_sched_agg_vsi_info *agg_vsi_info;
2696 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2704 * ice_save_agg_vsi_tc_bitmap - save aggregator VSI TC bitmap
2705 * @pi: port information structure
2706 * @agg_id: aggregator ID
2707 * @vsi_handle: software VSI handle
2708 * @tc_bitmap: TC bitmap of enabled TC(s)
2710 * Save VSI to aggregator TC bitmap. This function needs to call with scheduler
2713 static enum ice_status
2714 ice_save_agg_vsi_tc_bitmap(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
2715 ice_bitmap_t *tc_bitmap)
2717 struct ice_sched_agg_vsi_info *agg_vsi_info;
2718 struct ice_sched_agg_info *agg_info;
2720 agg_info = ice_get_agg_info(pi->hw, agg_id);
2722 return ICE_ERR_PARAM;
2723 /* check if entry already exist */
2724 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2726 return ICE_ERR_PARAM;
2727 ice_cp_bitmap(agg_vsi_info->replay_tc_bitmap, tc_bitmap,
2728 ICE_MAX_TRAFFIC_CLASS);
2733 * ice_sched_assoc_vsi_to_agg - associate/move VSI to new/default aggregator
2734 * @pi: port information structure
2735 * @agg_id: aggregator ID
2736 * @vsi_handle: software VSI handle
2737 * @tc_bitmap: TC bitmap of enabled TC(s)
2739 * This function moves VSI to a new or default aggregator node. If VSI is
2740 * already associated to the aggregator node then no operation is performed on
2741 * the tree. This function needs to be called with scheduler lock held.
2743 static enum ice_status
2744 ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
2745 u16 vsi_handle, ice_bitmap_t *tc_bitmap)
2747 struct ice_sched_agg_vsi_info *agg_vsi_info;
2748 struct ice_sched_agg_info *agg_info;
2749 enum ice_status status = ICE_SUCCESS;
2750 struct ice_hw *hw = pi->hw;
2753 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
2754 return ICE_ERR_PARAM;
2755 agg_info = ice_get_agg_info(hw, agg_id);
2757 return ICE_ERR_PARAM;
2758 /* check if entry already exist */
2759 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
2760 if (!agg_vsi_info) {
2761 /* Create new entry for VSI under aggregator list */
2762 agg_vsi_info = (struct ice_sched_agg_vsi_info *)
2763 ice_malloc(hw, sizeof(*agg_vsi_info));
2765 return ICE_ERR_PARAM;
2767 /* add VSI ID into the aggregator list */
2768 agg_vsi_info->vsi_handle = vsi_handle;
2769 LIST_ADD(&agg_vsi_info->list_entry, &agg_info->agg_vsi_list);
2771 /* Move VSI node to new aggregator node for requested TC(s) */
2772 ice_for_each_traffic_class(tc) {
2773 if (!ice_is_tc_ena(*tc_bitmap, tc))
2776 /* Move VSI to new aggregator */
2777 status = ice_sched_move_vsi_to_agg(pi, vsi_handle, agg_id, tc);
2781 if (agg_id != ICE_DFLT_AGG_ID)
2782 ice_set_bit(tc, agg_vsi_info->tc_bitmap);
2784 ice_clear_bit(tc, agg_vsi_info->tc_bitmap);
2786 /* If VSI moved back to default aggregator, delete agg_vsi_info. */
2787 if (!ice_is_any_bit_set(agg_vsi_info->tc_bitmap,
2788 ICE_MAX_TRAFFIC_CLASS)) {
2789 LIST_DEL(&agg_vsi_info->list_entry);
2790 ice_free(hw, agg_vsi_info);
2796 * ice_sched_rm_unused_rl_prof - remove unused RL profile
2797 * @pi: port information structure
2799 * This function removes unused rate limit profiles from the HW and
2800 * SW DB. The caller needs to hold scheduler lock.
2802 static void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi)
2806 for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
2807 struct ice_aqc_rl_profile_info *rl_prof_elem;
2808 struct ice_aqc_rl_profile_info *rl_prof_tmp;
2810 LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
2811 &pi->rl_prof_list[ln],
2812 ice_aqc_rl_profile_info, list_entry) {
2813 if (!ice_sched_del_rl_profile(pi->hw, rl_prof_elem))
2814 ice_debug(pi->hw, ICE_DBG_SCHED,
2815 "Removed rl profile\n");
2821 * ice_sched_update_elem - update element
2822 * @hw: pointer to the HW struct
2823 * @node: pointer to node
2824 * @info: node info to update
2826 * It updates the HW DB, and local SW DB of node. It updates the scheduling
2827 * parameters of node from argument info data buffer (Info->data buf) and
2828 * returns success or error on config sched element failure. The caller
2829 * needs to hold scheduler lock.
2831 static enum ice_status
2832 ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,
2833 struct ice_aqc_txsched_elem_data *info)
2835 struct ice_aqc_conf_elem buf;
2836 enum ice_status status;
2840 buf.generic[0] = *info;
2841 /* Parent TEID is reserved field in this aq call */
2842 buf.generic[0].parent_teid = 0;
2843 /* Element type is reserved field in this aq call */
2844 buf.generic[0].data.elem_type = 0;
2845 /* Flags is reserved field in this aq call */
2846 buf.generic[0].data.flags = 0;
2849 /* Configure element node */
2850 status = ice_aq_cfg_sched_elems(hw, num_elems, &buf, sizeof(buf),
2852 if (status || elem_cfgd != num_elems) {
2853 ice_debug(hw, ICE_DBG_SCHED, "Config sched elem error\n");
2857 /* Config success case */
2858 /* Now update local SW DB */
2859 /* Only copy the data portion of info buffer */
2860 node->info.data = info->data;
2865 * ice_sched_cfg_node_bw_alloc - configure node BW weight/alloc params
2866 * @hw: pointer to the HW struct
2867 * @node: sched node to configure
2868 * @rl_type: rate limit type CIR, EIR, or shared
2869 * @bw_alloc: BW weight/allocation
2871 * This function configures node element's BW allocation.
2873 static enum ice_status
2874 ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node,
2875 enum ice_rl_type rl_type, u8 bw_alloc)
2877 struct ice_aqc_txsched_elem_data buf;
2878 struct ice_aqc_txsched_elem *data;
2879 enum ice_status status;
2883 if (rl_type == ICE_MIN_BW) {
2884 data->valid_sections |= ICE_AQC_ELEM_VALID_CIR;
2885 data->cir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
2886 } else if (rl_type == ICE_MAX_BW) {
2887 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
2888 data->eir_bw.bw_alloc = CPU_TO_LE16(bw_alloc);
2890 return ICE_ERR_PARAM;
2893 /* Configure element */
2894 status = ice_sched_update_elem(hw, node, &buf);
2899 * ice_move_vsi_to_agg - moves VSI to new or default aggregator
2900 * @pi: port information structure
2901 * @agg_id: aggregator ID
2902 * @vsi_handle: software VSI handle
2903 * @tc_bitmap: TC bitmap of enabled TC(s)
2905 * Move or associate VSI to a new or default aggregator node.
2908 ice_move_vsi_to_agg(struct ice_port_info *pi, u32 agg_id, u16 vsi_handle,
2911 ice_bitmap_t bitmap = tc_bitmap;
2912 enum ice_status status;
2914 ice_acquire_lock(&pi->sched_lock);
2915 status = ice_sched_assoc_vsi_to_agg(pi, agg_id, vsi_handle,
2916 (ice_bitmap_t *)&bitmap);
2918 status = ice_save_agg_vsi_tc_bitmap(pi, agg_id, vsi_handle,
2919 (ice_bitmap_t *)&bitmap);
2920 ice_release_lock(&pi->sched_lock);
2925 * ice_rm_agg_cfg - remove aggregator configuration
2926 * @pi: port information structure
2927 * @agg_id: aggregator ID
2929 * This function removes aggregator reference to VSI and delete aggregator ID
2930 * info. It removes the aggregator configuration completely.
2932 enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
2934 struct ice_sched_agg_info *agg_info;
2935 enum ice_status status = ICE_SUCCESS;
2938 ice_acquire_lock(&pi->sched_lock);
2939 agg_info = ice_get_agg_info(pi->hw, agg_id);
2941 status = ICE_ERR_DOES_NOT_EXIST;
2942 goto exit_ice_rm_agg_cfg;
2945 ice_for_each_traffic_class(tc) {
2946 status = ice_rm_agg_cfg_tc(pi, agg_info, tc, true);
2948 goto exit_ice_rm_agg_cfg;
2951 if (ice_is_any_bit_set(agg_info->tc_bitmap, ICE_MAX_TRAFFIC_CLASS)) {
2952 status = ICE_ERR_IN_USE;
2953 goto exit_ice_rm_agg_cfg;
2956 /* Safe to delete entry now */
2957 LIST_DEL(&agg_info->list_entry);
2958 ice_free(pi->hw, agg_info);
2960 /* Remove unused RL profile IDs from HW and SW DB */
2961 ice_sched_rm_unused_rl_prof(pi);
2963 exit_ice_rm_agg_cfg:
2964 ice_release_lock(&pi->sched_lock);
2969 * ice_set_clear_cir_bw_alloc - set or clear CIR BW alloc information
2970 * @bw_t_info: bandwidth type information structure
2971 * @bw_alloc: Bandwidth allocation information
2973 * Save or clear CIR BW alloc information (bw_alloc) in the passed param
2977 ice_set_clear_cir_bw_alloc(struct ice_bw_type_info *bw_t_info, u16 bw_alloc)
2979 bw_t_info->cir_bw.bw_alloc = bw_alloc;
2980 if (bw_t_info->cir_bw.bw_alloc)
2981 ice_set_bit(ICE_BW_TYPE_CIR_WT, bw_t_info->bw_t_bitmap);
2983 ice_clear_bit(ICE_BW_TYPE_CIR_WT, bw_t_info->bw_t_bitmap);
2987 * ice_set_clear_eir_bw_alloc - set or clear EIR BW alloc information
2988 * @bw_t_info: bandwidth type information structure
2989 * @bw_alloc: Bandwidth allocation information
2991 * Save or clear EIR BW alloc information (bw_alloc) in the passed param
2995 ice_set_clear_eir_bw_alloc(struct ice_bw_type_info *bw_t_info, u16 bw_alloc)
2997 bw_t_info->eir_bw.bw_alloc = bw_alloc;
2998 if (bw_t_info->eir_bw.bw_alloc)
2999 ice_set_bit(ICE_BW_TYPE_EIR_WT, bw_t_info->bw_t_bitmap);
3001 ice_clear_bit(ICE_BW_TYPE_EIR_WT, bw_t_info->bw_t_bitmap);
3005 * ice_sched_save_vsi_bw_alloc - save VSI node's BW alloc information
3006 * @pi: port information structure
3007 * @vsi_handle: sw VSI handle
3008 * @tc: traffic class
3009 * @rl_type: rate limit type min or max
3010 * @bw_alloc: Bandwidth allocation information
3012 * Save BW alloc information of VSI type node for post replay use.
3014 static enum ice_status
3015 ice_sched_save_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3016 enum ice_rl_type rl_type, u16 bw_alloc)
3018 struct ice_vsi_ctx *vsi_ctx;
3020 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3021 return ICE_ERR_PARAM;
3022 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
3024 return ICE_ERR_PARAM;
3027 ice_set_clear_cir_bw_alloc(&vsi_ctx->sched.bw_t_info[tc],
3031 ice_set_clear_eir_bw_alloc(&vsi_ctx->sched.bw_t_info[tc],
3035 return ICE_ERR_PARAM;
3041 * ice_set_clear_cir_bw - set or clear CIR BW
3042 * @bw_t_info: bandwidth type information structure
3043 * @bw: bandwidth in Kbps - Kilo bits per sec
3045 * Save or clear CIR bandwidth (BW) in the passed param bw_t_info.
3048 ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
3050 if (bw == ICE_SCHED_DFLT_BW) {
3051 ice_clear_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
3052 bw_t_info->cir_bw.bw = 0;
3054 /* Save type of BW information */
3055 ice_set_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
3056 bw_t_info->cir_bw.bw = bw;
3061 * ice_set_clear_eir_bw - set or clear EIR BW
3062 * @bw_t_info: bandwidth type information structure
3063 * @bw: bandwidth in Kbps - Kilo bits per sec
3065 * Save or clear EIR bandwidth (BW) in the passed param bw_t_info.
3068 ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
3070 if (bw == ICE_SCHED_DFLT_BW) {
3071 ice_clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
3072 bw_t_info->eir_bw.bw = 0;
3074 /* EIR BW and Shared BW profiles are mutually exclusive and
3075 * hence only one of them may be set for any given element.
3076 * First clear earlier saved shared BW information.
3078 ice_clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
3079 bw_t_info->shared_bw = 0;
3080 /* save EIR BW information */
3081 ice_set_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
3082 bw_t_info->eir_bw.bw = bw;
3087 * ice_set_clear_shared_bw - set or clear shared BW
3088 * @bw_t_info: bandwidth type information structure
3089 * @bw: bandwidth in Kbps - Kilo bits per sec
3091 * Save or clear shared bandwidth (BW) in the passed param bw_t_info.
3094 ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
3096 if (bw == ICE_SCHED_DFLT_BW) {
3097 ice_clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
3098 bw_t_info->shared_bw = 0;
3100 /* EIR BW and Shared BW profiles are mutually exclusive and
3101 * hence only one of them may be set for any given element.
3102 * First clear earlier saved EIR BW information.
3104 ice_clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
3105 bw_t_info->eir_bw.bw = 0;
3106 /* save shared BW information */
3107 ice_set_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
3108 bw_t_info->shared_bw = bw;
3113 * ice_sched_save_vsi_bw - save VSI node's BW information
3114 * @pi: port information structure
3115 * @vsi_handle: sw VSI handle
3116 * @tc: traffic class
3117 * @rl_type: rate limit type min, max, or shared
3118 * @bw: bandwidth in Kbps - Kilo bits per sec
3120 * Save BW information of VSI type node for post replay use.
3122 static enum ice_status
3123 ice_sched_save_vsi_bw(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3124 enum ice_rl_type rl_type, u32 bw)
3126 struct ice_vsi_ctx *vsi_ctx;
3128 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3129 return ICE_ERR_PARAM;
3130 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
3132 return ICE_ERR_PARAM;
3135 ice_set_clear_cir_bw(&vsi_ctx->sched.bw_t_info[tc], bw);
3138 ice_set_clear_eir_bw(&vsi_ctx->sched.bw_t_info[tc], bw);
3141 ice_set_clear_shared_bw(&vsi_ctx->sched.bw_t_info[tc], bw);
3144 return ICE_ERR_PARAM;
3150 * ice_set_clear_prio - set or clear priority information
3151 * @bw_t_info: bandwidth type information structure
3152 * @prio: priority to save
3154 * Save or clear priority (prio) in the passed param bw_t_info.
3157 ice_set_clear_prio(struct ice_bw_type_info *bw_t_info, u8 prio)
3159 bw_t_info->generic = prio;
3160 if (bw_t_info->generic)
3161 ice_set_bit(ICE_BW_TYPE_PRIO, bw_t_info->bw_t_bitmap);
3163 ice_clear_bit(ICE_BW_TYPE_PRIO, bw_t_info->bw_t_bitmap);
3167 * ice_sched_save_vsi_prio - save VSI node's priority information
3168 * @pi: port information structure
3169 * @vsi_handle: Software VSI handle
3170 * @tc: traffic class
3171 * @prio: priority to save
3173 * Save priority information of VSI type node for post replay use.
3175 static enum ice_status
3176 ice_sched_save_vsi_prio(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3179 struct ice_vsi_ctx *vsi_ctx;
3181 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3182 return ICE_ERR_PARAM;
3183 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
3185 return ICE_ERR_PARAM;
3186 if (tc >= ICE_MAX_TRAFFIC_CLASS)
3187 return ICE_ERR_PARAM;
3188 ice_set_clear_prio(&vsi_ctx->sched.bw_t_info[tc], prio);
3193 * ice_sched_save_agg_bw_alloc - save aggregator node's BW alloc information
3194 * @pi: port information structure
3195 * @agg_id: node aggregator ID
3196 * @tc: traffic class
3197 * @rl_type: rate limit type min or max
3198 * @bw_alloc: bandwidth alloc information
3200 * Save BW alloc information of AGG type node for post replay use.
3202 static enum ice_status
3203 ice_sched_save_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 tc,
3204 enum ice_rl_type rl_type, u16 bw_alloc)
3206 struct ice_sched_agg_info *agg_info;
3208 agg_info = ice_get_agg_info(pi->hw, agg_id);
3210 return ICE_ERR_PARAM;
3211 if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
3212 return ICE_ERR_PARAM;
3215 ice_set_clear_cir_bw_alloc(&agg_info->bw_t_info[tc], bw_alloc);
3218 ice_set_clear_eir_bw_alloc(&agg_info->bw_t_info[tc], bw_alloc);
3221 return ICE_ERR_PARAM;
3227 * ice_sched_save_agg_bw - save aggregator node's BW information
3228 * @pi: port information structure
3229 * @agg_id: node aggregator ID
3230 * @tc: traffic class
3231 * @rl_type: rate limit type min, max, or shared
3232 * @bw: bandwidth in Kbps - Kilo bits per sec
3234 * Save BW information of AGG type node for post replay use.
3236 static enum ice_status
3237 ice_sched_save_agg_bw(struct ice_port_info *pi, u32 agg_id, u8 tc,
3238 enum ice_rl_type rl_type, u32 bw)
3240 struct ice_sched_agg_info *agg_info;
3242 agg_info = ice_get_agg_info(pi->hw, agg_id);
3244 return ICE_ERR_PARAM;
3245 if (!ice_is_tc_ena(agg_info->tc_bitmap[0], tc))
3246 return ICE_ERR_PARAM;
3249 ice_set_clear_cir_bw(&agg_info->bw_t_info[tc], bw);
3252 ice_set_clear_eir_bw(&agg_info->bw_t_info[tc], bw);
3255 ice_set_clear_shared_bw(&agg_info->bw_t_info[tc], bw);
3258 return ICE_ERR_PARAM;
3264 * ice_cfg_vsi_bw_lmt_per_tc - configure VSI BW limit per TC
3265 * @pi: port information structure
3266 * @vsi_handle: software VSI handle
3267 * @tc: traffic class
3268 * @rl_type: min or max
3269 * @bw: bandwidth in Kbps
3271 * This function configures BW limit of VSI scheduling node based on TC
3275 ice_cfg_vsi_bw_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3276 enum ice_rl_type rl_type, u32 bw)
3278 enum ice_status status;
3280 status = ice_sched_set_node_bw_lmt_per_tc(pi, vsi_handle,
3284 ice_acquire_lock(&pi->sched_lock);
3285 status = ice_sched_save_vsi_bw(pi, vsi_handle, tc, rl_type, bw);
3286 ice_release_lock(&pi->sched_lock);
3292 * ice_cfg_dflt_vsi_bw_lmt_per_tc - configure default VSI BW limit per TC
3293 * @pi: port information structure
3294 * @vsi_handle: software VSI handle
3295 * @tc: traffic class
3296 * @rl_type: min or max
3298 * This function configures default BW limit of VSI scheduling node based on TC
3302 ice_cfg_vsi_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
3303 enum ice_rl_type rl_type)
3305 enum ice_status status;
3307 status = ice_sched_set_node_bw_lmt_per_tc(pi, vsi_handle,
3312 ice_acquire_lock(&pi->sched_lock);
3313 status = ice_sched_save_vsi_bw(pi, vsi_handle, tc, rl_type,
3315 ice_release_lock(&pi->sched_lock);
3321 * ice_cfg_agg_bw_lmt_per_tc - configure aggregator BW limit per TC
3322 * @pi: port information structure
3323 * @agg_id: aggregator ID
3324 * @tc: traffic class
3325 * @rl_type: min or max
3326 * @bw: bandwidth in Kbps
3328 * This function applies BW limit to aggregator scheduling node based on TC
3332 ice_cfg_agg_bw_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
3333 enum ice_rl_type rl_type, u32 bw)
3335 enum ice_status status;
3337 status = ice_sched_set_node_bw_lmt_per_tc(pi, agg_id, ICE_AGG_TYPE_AGG,
3340 ice_acquire_lock(&pi->sched_lock);
3341 status = ice_sched_save_agg_bw(pi, agg_id, tc, rl_type, bw);
3342 ice_release_lock(&pi->sched_lock);
3348 * ice_cfg_agg_bw_dflt_lmt_per_tc - configure aggregator BW default limit per TC
3349 * @pi: port information structure
3350 * @agg_id: aggregator ID
3351 * @tc: traffic class
3352 * @rl_type: min or max
3354 * This function applies default BW limit to aggregator scheduling node based
3355 * on TC information.
3358 ice_cfg_agg_bw_dflt_lmt_per_tc(struct ice_port_info *pi, u32 agg_id, u8 tc,
3359 enum ice_rl_type rl_type)
3361 enum ice_status status;
3363 status = ice_sched_set_node_bw_lmt_per_tc(pi, agg_id, ICE_AGG_TYPE_AGG,
3367 ice_acquire_lock(&pi->sched_lock);
3368 status = ice_sched_save_agg_bw(pi, agg_id, tc, rl_type,
3370 ice_release_lock(&pi->sched_lock);
3376 * ice_cfg_vsi_bw_shared_lmt - configure VSI BW shared limit
3377 * @pi: port information structure
3378 * @vsi_handle: software VSI handle
3379 * @bw: bandwidth in Kbps
3381 * This function Configures shared rate limiter(SRL) of all VSI type nodes
3382 * across all traffic classes for VSI matching handle.
3385 ice_cfg_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle, u32 bw)
3387 return ice_sched_set_vsi_bw_shared_lmt(pi, vsi_handle, bw);
3391 * ice_cfg_vsi_bw_no_shared_lmt - configure VSI BW for no shared limiter
3392 * @pi: port information structure
3393 * @vsi_handle: software VSI handle
3395 * This function removes the shared rate limiter(SRL) of all VSI type nodes
3396 * across all traffic classes for VSI matching handle.
3399 ice_cfg_vsi_bw_no_shared_lmt(struct ice_port_info *pi, u16 vsi_handle)
3401 return ice_sched_set_vsi_bw_shared_lmt(pi, vsi_handle,
3406 * ice_cfg_agg_bw_shared_lmt - configure aggregator BW shared limit
3407 * @pi: port information structure
3408 * @agg_id: aggregator ID
3409 * @bw: bandwidth in Kbps
3411 * This function configures the shared rate limiter(SRL) of all aggregator type
3412 * nodes across all traffic classes for aggregator matching agg_id.
3415 ice_cfg_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
3417 return ice_sched_set_agg_bw_shared_lmt(pi, agg_id, bw);
3421 * ice_cfg_agg_bw_no_shared_lmt - configure aggregator BW for no shared limiter
3422 * @pi: port information structure
3423 * @agg_id: aggregator ID
3425 * This function removes the shared rate limiter(SRL) of all aggregator type
3426 * nodes across all traffic classes for aggregator matching agg_id.
3429 ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id)
3431 return ice_sched_set_agg_bw_shared_lmt(pi, agg_id, ICE_SCHED_DFLT_BW);
3435 * ice_config_vsi_queue_priority - config VSI queue priority of node
3436 * @pi: port information structure
3437 * @num_qs: number of VSI queues
3438 * @q_ids: queue IDs array
3439 * @q_ids: queue IDs array
3440 * @q_prio: queue priority array
3442 * This function configures the queue node priority (Sibling Priority) of the
3443 * passed in VSI's queue(s) for a given traffic class (TC).
3446 ice_cfg_vsi_q_priority(struct ice_port_info *pi, u16 num_qs, u32 *q_ids,
3449 enum ice_status status = ICE_ERR_PARAM;
3452 ice_acquire_lock(&pi->sched_lock);
3454 for (i = 0; i < num_qs; i++) {
3455 struct ice_sched_node *node;
3457 node = ice_sched_find_node_by_teid(pi->root, q_ids[i]);
3458 if (!node || node->info.data.elem_type !=
3459 ICE_AQC_ELEM_TYPE_LEAF) {
3460 status = ICE_ERR_PARAM;
3463 /* Configure Priority */
3464 status = ice_sched_cfg_sibl_node_prio(pi, node, q_prio[i]);
3469 ice_release_lock(&pi->sched_lock);
3474 * ice_cfg_agg_vsi_priority_per_tc - config aggregator's VSI priority per TC
3475 * @pi: port information structure
3476 * @agg_id: Aggregator ID
3477 * @num_vsis: number of VSI(s)
3478 * @vsi_handle_arr: array of software VSI handles
3479 * @node_prio: pointer to node priority
3480 * @tc: traffic class
3482 * This function configures the node priority (Sibling Priority) of the
3483 * passed in VSI's for a given traffic class (TC) of an Aggregator ID.
3486 ice_cfg_agg_vsi_priority_per_tc(struct ice_port_info *pi, u32 agg_id,
3487 u16 num_vsis, u16 *vsi_handle_arr,
3488 u8 *node_prio, u8 tc)
3490 struct ice_sched_agg_vsi_info *agg_vsi_info;
3491 struct ice_sched_node *tc_node, *agg_node;
3492 enum ice_status status = ICE_ERR_PARAM;
3493 struct ice_sched_agg_info *agg_info;
3494 bool agg_id_present = false;
3495 struct ice_hw *hw = pi->hw;
3498 ice_acquire_lock(&pi->sched_lock);
3499 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
3501 if (agg_info->agg_id == agg_id) {
3502 agg_id_present = true;
3505 if (!agg_id_present)
3506 goto exit_agg_priority_per_tc;
3508 tc_node = ice_sched_get_tc_node(pi, tc);
3510 goto exit_agg_priority_per_tc;
3512 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
3514 goto exit_agg_priority_per_tc;
3516 if (num_vsis > hw->max_children[agg_node->tx_sched_layer])
3517 goto exit_agg_priority_per_tc;
3519 for (i = 0; i < num_vsis; i++) {
3520 struct ice_sched_node *vsi_node;
3521 bool vsi_handle_valid = false;
3524 status = ICE_ERR_PARAM;
3525 vsi_handle = vsi_handle_arr[i];
3526 if (!ice_is_vsi_valid(hw, vsi_handle))
3527 goto exit_agg_priority_per_tc;
3528 /* Verify child nodes before applying settings */
3529 LIST_FOR_EACH_ENTRY(agg_vsi_info, &agg_info->agg_vsi_list,
3530 ice_sched_agg_vsi_info, list_entry)
3531 if (agg_vsi_info->vsi_handle == vsi_handle) {
3532 /* cppcheck-suppress unreadVariable */
3533 vsi_handle_valid = true;
3537 if (!vsi_handle_valid)
3538 goto exit_agg_priority_per_tc;
3540 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
3542 goto exit_agg_priority_per_tc;
3544 if (ice_sched_find_node_in_subtree(hw, agg_node, vsi_node)) {
3545 /* Configure Priority */
3546 status = ice_sched_cfg_sibl_node_prio(pi, vsi_node,
3550 status = ice_sched_save_vsi_prio(pi, vsi_handle, tc,
3557 exit_agg_priority_per_tc:
3558 ice_release_lock(&pi->sched_lock);
3563 * ice_cfg_vsi_bw_alloc - config VSI BW alloc per TC
3564 * @pi: port information structure
3565 * @vsi_handle: software VSI handle
3566 * @ena_tcmap: enabled TC map
3567 * @rl_type: Rate limit type CIR/EIR
3568 * @bw_alloc: Array of BW alloc
3570 * This function configures the BW allocation of the passed in VSI's
3571 * node(s) for enabled traffic class.
3574 ice_cfg_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 ena_tcmap,
3575 enum ice_rl_type rl_type, u8 *bw_alloc)
3577 enum ice_status status = ICE_SUCCESS;
3580 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
3581 return ICE_ERR_PARAM;
3583 ice_acquire_lock(&pi->sched_lock);
3585 /* Return success if no nodes are present across TC */
3586 ice_for_each_traffic_class(tc) {
3587 struct ice_sched_node *tc_node, *vsi_node;
3589 if (!ice_is_tc_ena(ena_tcmap, tc))
3592 tc_node = ice_sched_get_tc_node(pi, tc);
3596 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
3600 status = ice_sched_cfg_node_bw_alloc(pi->hw, vsi_node, rl_type,
3604 status = ice_sched_save_vsi_bw_alloc(pi, vsi_handle, tc,
3605 rl_type, bw_alloc[tc]);
3610 ice_release_lock(&pi->sched_lock);
3615 * ice_cfg_agg_bw_alloc - config aggregator BW alloc
3616 * @pi: port information structure
3617 * @agg_id: aggregator ID
3618 * @ena_tcmap: enabled TC map
3619 * @rl_type: rate limit type CIR/EIR
3620 * @bw_alloc: array of BW alloc
3622 * This function configures the BW allocation of passed in aggregator for
3623 * enabled traffic class(s).
3626 ice_cfg_agg_bw_alloc(struct ice_port_info *pi, u32 agg_id, u8 ena_tcmap,
3627 enum ice_rl_type rl_type, u8 *bw_alloc)
3629 struct ice_sched_agg_info *agg_info;
3630 bool agg_id_present = false;
3631 enum ice_status status = ICE_SUCCESS;
3632 struct ice_hw *hw = pi->hw;
3635 ice_acquire_lock(&pi->sched_lock);
3636 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
3638 if (agg_info->agg_id == agg_id) {
3639 agg_id_present = true;
3642 if (!agg_id_present) {
3643 status = ICE_ERR_PARAM;
3644 goto exit_cfg_agg_bw_alloc;
3647 /* Return success if no nodes are present across TC */
3648 ice_for_each_traffic_class(tc) {
3649 struct ice_sched_node *tc_node, *agg_node;
3651 if (!ice_is_tc_ena(ena_tcmap, tc))
3654 tc_node = ice_sched_get_tc_node(pi, tc);
3658 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
3662 status = ice_sched_cfg_node_bw_alloc(hw, agg_node, rl_type,
3666 status = ice_sched_save_agg_bw_alloc(pi, agg_id, tc, rl_type,
3672 exit_cfg_agg_bw_alloc:
3673 ice_release_lock(&pi->sched_lock);
3678 * ice_sched_calc_wakeup - calculate RL profile wakeup parameter
3679 * @bw: bandwidth in Kbps
3681 * This function calculates the wakeup parameter of RL profile.
3683 static u16 ice_sched_calc_wakeup(s32 bw)
3685 s64 bytes_per_sec, wakeup_int, wakeup_a, wakeup_b, wakeup_f;
3689 /* Get the wakeup integer value */
3690 bytes_per_sec = DIV_64BIT(((s64)bw * 1000), BITS_PER_BYTE);
3691 wakeup_int = DIV_64BIT(ICE_RL_PROF_FREQUENCY, bytes_per_sec);
3692 if (wakeup_int > 63) {
3693 wakeup = (u16)((1 << 15) | wakeup_int);
3695 /* Calculate fraction value up to 4 decimals
3696 * Convert Integer value to a constant multiplier
3698 wakeup_b = (s64)ICE_RL_PROF_MULTIPLIER * wakeup_int;
3699 wakeup_a = DIV_64BIT((s64)ICE_RL_PROF_MULTIPLIER *
3700 ICE_RL_PROF_FREQUENCY, bytes_per_sec);
3702 /* Get Fraction value */
3703 wakeup_f = wakeup_a - wakeup_b;
3705 /* Round up the Fractional value via Ceil(Fractional value) */
3706 if (wakeup_f > DIV_64BIT(ICE_RL_PROF_MULTIPLIER, 2))
3709 wakeup_f_int = (s32)DIV_64BIT(wakeup_f * ICE_RL_PROF_FRACTION,
3710 ICE_RL_PROF_MULTIPLIER);
3711 wakeup |= (u16)(wakeup_int << 9);
3712 wakeup |= (u16)(0x1ff & wakeup_f_int);
3719 * ice_sched_bw_to_rl_profile - convert BW to profile parameters
3720 * @bw: bandwidth in Kbps
3721 * @profile: profile parameters to return
3723 * This function converts the BW to profile structure format.
3725 static enum ice_status
3726 ice_sched_bw_to_rl_profile(u32 bw, struct ice_aqc_rl_profile_elem *profile)
3728 enum ice_status status = ICE_ERR_PARAM;
3729 s64 bytes_per_sec, ts_rate, mv_tmp;
3735 /* Bw settings range is from 0.5Mb/sec to 100Gb/sec */
3736 if (bw < ICE_SCHED_MIN_BW || bw > ICE_SCHED_MAX_BW)
3739 /* Bytes per second from Kbps */
3740 bytes_per_sec = DIV_64BIT(((s64)bw * 1000), BITS_PER_BYTE);
3742 /* encode is 6 bits but really useful are 5 bits */
3743 for (i = 0; i < 64; i++) {
3744 u64 pow_result = BIT_ULL(i);
3746 ts_rate = DIV_64BIT((s64)ICE_RL_PROF_FREQUENCY,
3747 pow_result * ICE_RL_PROF_TS_MULTIPLIER);
3751 /* Multiplier value */
3752 mv_tmp = DIV_64BIT(bytes_per_sec * ICE_RL_PROF_MULTIPLIER,
3755 /* Round to the nearest ICE_RL_PROF_MULTIPLIER */
3756 mv = round_up_64bit(mv_tmp, ICE_RL_PROF_MULTIPLIER);
3758 /* First multiplier value greater than the given
3761 if (mv > ICE_RL_PROF_ACCURACY_BYTES) {
3770 wm = ice_sched_calc_wakeup(bw);
3771 profile->rl_multiply = CPU_TO_LE16(mv);
3772 profile->wake_up_calc = CPU_TO_LE16(wm);
3773 profile->rl_encode = CPU_TO_LE16(encode);
3774 status = ICE_SUCCESS;
3776 status = ICE_ERR_DOES_NOT_EXIST;
3783 * ice_sched_add_rl_profile - add RL profile
3784 * @pi: port information structure
3785 * @rl_type: type of rate limit BW - min, max, or shared
3786 * @bw: bandwidth in Kbps - Kilo bits per sec
3787 * @layer_num: specifies in which layer to create profile
3789 * This function first checks the existing list for corresponding BW
3790 * parameter. If it exists, it returns the associated profile otherwise
3791 * it creates a new rate limit profile for requested BW, and adds it to
3792 * the HW DB and local list. It returns the new profile or null on error.
3793 * The caller needs to hold the scheduler lock.
3795 static struct ice_aqc_rl_profile_info *
3796 ice_sched_add_rl_profile(struct ice_port_info *pi,
3797 enum ice_rl_type rl_type, u32 bw, u8 layer_num)
3799 struct ice_aqc_rl_profile_generic_elem *buf;
3800 struct ice_aqc_rl_profile_info *rl_prof_elem;
3801 u16 profiles_added = 0, num_profiles = 1;
3802 enum ice_status status = ICE_ERR_PARAM;
3808 profile_type = ICE_AQC_RL_PROFILE_TYPE_CIR;
3811 profile_type = ICE_AQC_RL_PROFILE_TYPE_EIR;
3814 profile_type = ICE_AQC_RL_PROFILE_TYPE_SRL;
3823 LIST_FOR_EACH_ENTRY(rl_prof_elem, &pi->rl_prof_list[layer_num],
3824 ice_aqc_rl_profile_info, list_entry)
3825 if (rl_prof_elem->profile.flags == profile_type &&
3826 rl_prof_elem->bw == bw)
3827 /* Return existing profile ID info */
3828 return rl_prof_elem;
3830 /* Create new profile ID */
3831 rl_prof_elem = (struct ice_aqc_rl_profile_info *)
3832 ice_malloc(hw, sizeof(*rl_prof_elem));
3837 status = ice_sched_bw_to_rl_profile(bw, &rl_prof_elem->profile);
3838 if (status != ICE_SUCCESS)
3839 goto exit_add_rl_prof;
3841 rl_prof_elem->bw = bw;
3842 /* layer_num is zero relative, and fw expects level from 1 to 9 */
3843 rl_prof_elem->profile.level = layer_num + 1;
3844 rl_prof_elem->profile.flags = profile_type;
3845 rl_prof_elem->profile.max_burst_size = CPU_TO_LE16(hw->max_burst_size);
3847 /* Create new entry in HW DB */
3848 buf = (struct ice_aqc_rl_profile_generic_elem *)
3849 &rl_prof_elem->profile;
3850 status = ice_aq_add_rl_profile(hw, num_profiles, buf, sizeof(*buf),
3851 &profiles_added, NULL);
3852 if (status || profiles_added != num_profiles)
3853 goto exit_add_rl_prof;
3855 /* Good entry - add in the list */
3856 rl_prof_elem->prof_id_ref = 0;
3857 LIST_ADD(&rl_prof_elem->list_entry, &pi->rl_prof_list[layer_num]);
3858 return rl_prof_elem;
3861 ice_free(hw, rl_prof_elem);
3866 * ice_sched_cfg_node_bw_lmt - configure node sched params
3867 * @hw: pointer to the HW struct
3868 * @node: sched node to configure
3869 * @rl_type: rate limit type CIR, EIR, or shared
3870 * @rl_prof_id: rate limit profile ID
3872 * This function configures node element's BW limit.
3874 static enum ice_status
3875 ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,
3876 enum ice_rl_type rl_type, u16 rl_prof_id)
3878 struct ice_aqc_txsched_elem_data buf;
3879 struct ice_aqc_txsched_elem *data;
3885 data->valid_sections |= ICE_AQC_ELEM_VALID_CIR;
3886 data->cir_bw.bw_profile_idx = CPU_TO_LE16(rl_prof_id);
3889 /* EIR BW and Shared BW profiles are mutually exclusive and
3890 * hence only one of them may be set for any given element
3892 if (data->valid_sections & ICE_AQC_ELEM_VALID_SHARED)
3894 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
3895 data->eir_bw.bw_profile_idx = CPU_TO_LE16(rl_prof_id);
3898 /* Check for removing shared BW */
3899 if (rl_prof_id == ICE_SCHED_NO_SHARED_RL_PROF_ID) {
3900 /* remove shared profile */
3901 data->valid_sections &= ~ICE_AQC_ELEM_VALID_SHARED;
3902 data->srl_id = 0; /* clear SRL field */
3904 /* enable back EIR to default profile */
3905 data->valid_sections |= ICE_AQC_ELEM_VALID_EIR;
3906 data->eir_bw.bw_profile_idx =
3907 CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
3910 /* EIR BW and Shared BW profiles are mutually exclusive and
3911 * hence only one of them may be set for any given element
3913 if ((data->valid_sections & ICE_AQC_ELEM_VALID_EIR) &&
3914 (LE16_TO_CPU(data->eir_bw.bw_profile_idx) !=
3915 ICE_SCHED_DFLT_RL_PROF_ID))
3917 /* EIR BW is set to default, disable it */
3918 data->valid_sections &= ~ICE_AQC_ELEM_VALID_EIR;
3919 /* Okay to enable shared BW now */
3920 data->valid_sections |= ICE_AQC_ELEM_VALID_SHARED;
3921 data->srl_id = CPU_TO_LE16(rl_prof_id);
3924 /* Unknown rate limit type */
3925 return ICE_ERR_PARAM;
3928 /* Configure element */
3929 return ice_sched_update_elem(hw, node, &buf);
3933 * ice_sched_get_node_rl_prof_id - get node's rate limit profile ID
3935 * @rl_type: rate limit type
3937 * If existing profile matches, it returns the corresponding rate
3938 * limit profile ID, otherwise it returns an invalid ID as error.
3941 ice_sched_get_node_rl_prof_id(struct ice_sched_node *node,
3942 enum ice_rl_type rl_type)
3944 u16 rl_prof_id = ICE_SCHED_INVAL_PROF_ID;
3945 struct ice_aqc_txsched_elem *data;
3947 data = &node->info.data;
3950 if (data->valid_sections & ICE_AQC_ELEM_VALID_CIR)
3951 rl_prof_id = LE16_TO_CPU(data->cir_bw.bw_profile_idx);
3954 if (data->valid_sections & ICE_AQC_ELEM_VALID_EIR)
3955 rl_prof_id = LE16_TO_CPU(data->eir_bw.bw_profile_idx);
3958 if (data->valid_sections & ICE_AQC_ELEM_VALID_SHARED)
3959 rl_prof_id = LE16_TO_CPU(data->srl_id);
3969 * ice_sched_get_rl_prof_layer - selects rate limit profile creation layer
3970 * @pi: port information structure
3971 * @rl_type: type of rate limit BW - min, max, or shared
3972 * @layer_index: layer index
3974 * This function returns requested profile creation layer.
3977 ice_sched_get_rl_prof_layer(struct ice_port_info *pi, enum ice_rl_type rl_type,
3980 struct ice_hw *hw = pi->hw;
3982 if (layer_index >= hw->num_tx_sched_layers)
3983 return ICE_SCHED_INVAL_LAYER_NUM;
3986 if (hw->layer_info[layer_index].max_cir_rl_profiles)
3990 if (hw->layer_info[layer_index].max_eir_rl_profiles)
3994 /* if current layer doesn't support SRL profile creation
3995 * then try a layer up or down.
3997 if (hw->layer_info[layer_index].max_srl_profiles)
3999 else if (layer_index < hw->num_tx_sched_layers - 1 &&
4000 hw->layer_info[layer_index + 1].max_srl_profiles)
4001 return layer_index + 1;
4002 else if (layer_index > 0 &&
4003 hw->layer_info[layer_index - 1].max_srl_profiles)
4004 return layer_index - 1;
4009 return ICE_SCHED_INVAL_LAYER_NUM;
4013 * ice_sched_get_srl_node - get shared rate limit node
4015 * @srl_layer: shared rate limit layer
4017 * This function returns SRL node to be used for shared rate limit purpose.
4018 * The caller needs to hold scheduler lock.
4020 static struct ice_sched_node *
4021 ice_sched_get_srl_node(struct ice_sched_node *node, u8 srl_layer)
4023 if (srl_layer > node->tx_sched_layer)
4024 return node->children[0];
4025 else if (srl_layer < node->tx_sched_layer)
4026 /* Node can't be created without a parent. It will always
4027 * have a valid parent except root node.
4029 return node->parent;
4035 * ice_sched_rm_rl_profile - remove RL profile ID
4036 * @pi: port information structure
4037 * @layer_num: layer number where profiles are saved
4038 * @profile_type: profile type like EIR, CIR, or SRL
4039 * @profile_id: profile ID to remove
4041 * This function removes rate limit profile from layer 'layer_num' of type
4042 * 'profile_type' and profile ID as 'profile_id'. The caller needs to hold
4045 static enum ice_status
4046 ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
4049 struct ice_aqc_rl_profile_info *rl_prof_elem;
4050 enum ice_status status = ICE_SUCCESS;
4052 /* Check the existing list for RL profile */
4053 LIST_FOR_EACH_ENTRY(rl_prof_elem, &pi->rl_prof_list[layer_num],
4054 ice_aqc_rl_profile_info, list_entry)
4055 if (rl_prof_elem->profile.flags == profile_type &&
4056 LE16_TO_CPU(rl_prof_elem->profile.profile_id) ==
4058 if (rl_prof_elem->prof_id_ref)
4059 rl_prof_elem->prof_id_ref--;
4061 /* Remove old profile ID from database */
4062 status = ice_sched_del_rl_profile(pi->hw, rl_prof_elem);
4063 if (status && status != ICE_ERR_IN_USE)
4064 ice_debug(pi->hw, ICE_DBG_SCHED,
4065 "Remove rl profile failed\n");
4068 if (status == ICE_ERR_IN_USE)
4069 status = ICE_SUCCESS;
4074 * ice_sched_set_node_bw_dflt - set node's bandwidth limit to default
4075 * @pi: port information structure
4076 * @node: pointer to node structure
4077 * @rl_type: rate limit type min, max, or shared
4078 * @layer_num: layer number where RL profiles are saved
4080 * This function configures node element's BW rate limit profile ID of
4081 * type CIR, EIR, or SRL to default. This function needs to be called
4082 * with the scheduler lock held.
4084 static enum ice_status
4085 ice_sched_set_node_bw_dflt(struct ice_port_info *pi,
4086 struct ice_sched_node *node,
4087 enum ice_rl_type rl_type, u8 layer_num)
4089 enum ice_status status;
4098 profile_type = ICE_AQC_RL_PROFILE_TYPE_CIR;
4099 rl_prof_id = ICE_SCHED_DFLT_RL_PROF_ID;
4102 profile_type = ICE_AQC_RL_PROFILE_TYPE_EIR;
4103 rl_prof_id = ICE_SCHED_DFLT_RL_PROF_ID;
4106 profile_type = ICE_AQC_RL_PROFILE_TYPE_SRL;
4107 /* No SRL is configured for default case */
4108 rl_prof_id = ICE_SCHED_NO_SHARED_RL_PROF_ID;
4111 return ICE_ERR_PARAM;
4113 /* Save existing RL prof ID for later clean up */
4114 old_id = ice_sched_get_node_rl_prof_id(node, rl_type);
4115 /* Configure BW scheduling parameters */
4116 status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);
4120 /* Remove stale RL profile ID */
4121 if (old_id == ICE_SCHED_DFLT_RL_PROF_ID ||
4122 old_id == ICE_SCHED_INVAL_PROF_ID)
4125 return ice_sched_rm_rl_profile(pi, layer_num, profile_type, old_id);
4129 * ice_sched_set_eir_srl_excl - set EIR/SRL exclusiveness
4130 * @pi: port information structure
4131 * @node: pointer to node structure
4132 * @layer_num: layer number where rate limit profiles are saved
4133 * @rl_type: rate limit type min, max, or shared
4134 * @bw: bandwidth value
4136 * This function prepares node element's bandwidth to SRL or EIR exclusively.
4137 * EIR BW and Shared BW profiles are mutually exclusive and hence only one of
4138 * them may be set for any given element. This function needs to be called
4139 * with the scheduler lock held.
4141 static enum ice_status
4142 ice_sched_set_eir_srl_excl(struct ice_port_info *pi,
4143 struct ice_sched_node *node,
4144 u8 layer_num, enum ice_rl_type rl_type, u32 bw)
4146 if (rl_type == ICE_SHARED_BW) {
4147 /* SRL node passed in this case, it may be different node */
4148 if (bw == ICE_SCHED_DFLT_BW)
4149 /* SRL being removed, ice_sched_cfg_node_bw_lmt()
4150 * enables EIR to default. EIR is not set in this
4151 * case, so no additional action is required.
4155 /* SRL being configured, set EIR to default here.
4156 * ice_sched_cfg_node_bw_lmt() disables EIR when it
4159 return ice_sched_set_node_bw_dflt(pi, node, ICE_MAX_BW,
4161 } else if (rl_type == ICE_MAX_BW &&
4162 node->info.data.valid_sections & ICE_AQC_ELEM_VALID_SHARED) {
4163 /* Remove Shared profile. Set default shared BW call
4164 * removes shared profile for a node.
4166 return ice_sched_set_node_bw_dflt(pi, node,
4174 * ice_sched_set_node_bw - set node's bandwidth
4175 * @pi: port information structure
4177 * @rl_type: rate limit type min, max, or shared
4178 * @bw: bandwidth in Kbps - Kilo bits per sec
4179 * @layer_num: layer number
4181 * This function adds new profile corresponding to requested BW, configures
4182 * node's RL profile ID of type CIR, EIR, or SRL, and removes old profile
4183 * ID from local database. The caller needs to hold scheduler lock.
4185 static enum ice_status
4186 ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
4187 enum ice_rl_type rl_type, u32 bw, u8 layer_num)
4189 struct ice_aqc_rl_profile_info *rl_prof_info;
4190 enum ice_status status = ICE_ERR_PARAM;
4191 struct ice_hw *hw = pi->hw;
4192 u16 old_id, rl_prof_id;
4194 rl_prof_info = ice_sched_add_rl_profile(pi, rl_type, bw, layer_num);
4198 rl_prof_id = LE16_TO_CPU(rl_prof_info->profile.profile_id);
4200 /* Save existing RL prof ID for later clean up */
4201 old_id = ice_sched_get_node_rl_prof_id(node, rl_type);
4202 /* Configure BW scheduling parameters */
4203 status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);
4207 /* New changes has been applied */
4208 /* Increment the profile ID reference count */
4209 rl_prof_info->prof_id_ref++;
4211 /* Check for old ID removal */
4212 if ((old_id == ICE_SCHED_DFLT_RL_PROF_ID && rl_type != ICE_SHARED_BW) ||
4213 old_id == ICE_SCHED_INVAL_PROF_ID || old_id == rl_prof_id)
4216 return ice_sched_rm_rl_profile(pi, layer_num,
4217 rl_prof_info->profile.flags,
4222 * ice_sched_set_node_bw_lmt - set node's BW limit
4223 * @pi: port information structure
4225 * @rl_type: rate limit type min, max, or shared
4226 * @bw: bandwidth in Kbps - Kilo bits per sec
4228 * It updates node's BW limit parameters like BW RL profile ID of type CIR,
4229 * EIR, or SRL. The caller needs to hold scheduler lock.
4231 static enum ice_status
4232 ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
4233 enum ice_rl_type rl_type, u32 bw)
4235 struct ice_sched_node *cfg_node = node;
4236 enum ice_status status;
4242 return ICE_ERR_PARAM;
4244 /* Remove unused RL profile IDs from HW and SW DB */
4245 ice_sched_rm_unused_rl_prof(pi);
4246 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
4247 node->tx_sched_layer);
4248 if (layer_num >= hw->num_tx_sched_layers)
4249 return ICE_ERR_PARAM;
4251 if (rl_type == ICE_SHARED_BW) {
4252 /* SRL node may be different */
4253 cfg_node = ice_sched_get_srl_node(node, layer_num);
4257 /* EIR BW and Shared BW profiles are mutually exclusive and
4258 * hence only one of them may be set for any given element
4260 status = ice_sched_set_eir_srl_excl(pi, cfg_node, layer_num, rl_type,
4264 if (bw == ICE_SCHED_DFLT_BW)
4265 return ice_sched_set_node_bw_dflt(pi, cfg_node, rl_type,
4267 return ice_sched_set_node_bw(pi, cfg_node, rl_type, bw, layer_num);
4271 * ice_sched_set_node_bw_dflt_lmt - set node's BW limit to default
4272 * @pi: port information structure
4273 * @node: pointer to node structure
4274 * @rl_type: rate limit type min, max, or shared
4276 * This function configures node element's BW rate limit profile ID of
4277 * type CIR, EIR, or SRL to default. This function needs to be called
4278 * with the scheduler lock held.
4280 static enum ice_status
4281 ice_sched_set_node_bw_dflt_lmt(struct ice_port_info *pi,
4282 struct ice_sched_node *node,
4283 enum ice_rl_type rl_type)
4285 return ice_sched_set_node_bw_lmt(pi, node, rl_type,
4290 * ice_sched_validate_srl_node - Check node for SRL applicability
4291 * @node: sched node to configure
4292 * @sel_layer: selected SRL layer
4294 * This function checks if the SRL can be applied to a selceted layer node on
4295 * behalf of the requested node (first argument). This function needs to be
4296 * called with scheduler lock held.
4298 static enum ice_status
4299 ice_sched_validate_srl_node(struct ice_sched_node *node, u8 sel_layer)
4301 /* SRL profiles are not available on all layers. Check if the
4302 * SRL profile can be applied to a node above or below the
4303 * requested node. SRL configuration is possible only if the
4304 * selected layer's node has single child.
4306 if (sel_layer == node->tx_sched_layer ||
4307 ((sel_layer == node->tx_sched_layer + 1) &&
4308 node->num_children == 1) ||
4309 ((sel_layer == node->tx_sched_layer - 1) &&
4310 (node->parent && node->parent->num_children == 1)))
4317 * ice_sched_save_q_bw - save queue node's BW information
4318 * @q_ctx: queue context structure
4319 * @rl_type: rate limit type min, max, or shared
4320 * @bw: bandwidth in Kbps - Kilo bits per sec
4322 * Save BW information of queue type node for post replay use.
4324 static enum ice_status
4325 ice_sched_save_q_bw(struct ice_q_ctx *q_ctx, enum ice_rl_type rl_type, u32 bw)
4329 ice_set_clear_cir_bw(&q_ctx->bw_t_info, bw);
4332 ice_set_clear_eir_bw(&q_ctx->bw_t_info, bw);
4335 ice_set_clear_shared_bw(&q_ctx->bw_t_info, bw);
4338 return ICE_ERR_PARAM;
4344 * ice_sched_set_q_bw_lmt - sets queue BW limit
4345 * @pi: port information structure
4346 * @vsi_handle: sw VSI handle
4347 * @tc: traffic class
4348 * @q_handle: software queue handle
4349 * @rl_type: min, max, or shared
4350 * @bw: bandwidth in Kbps
4352 * This function sets BW limit of queue scheduling node.
4354 static enum ice_status
4355 ice_sched_set_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
4356 u16 q_handle, enum ice_rl_type rl_type, u32 bw)
4358 enum ice_status status = ICE_ERR_PARAM;
4359 struct ice_sched_node *node;
4360 struct ice_q_ctx *q_ctx;
4362 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4363 return ICE_ERR_PARAM;
4364 ice_acquire_lock(&pi->sched_lock);
4365 q_ctx = ice_get_lan_q_ctx(pi->hw, vsi_handle, tc, q_handle);
4368 node = ice_sched_find_node_by_teid(pi->root, q_ctx->q_teid);
4370 ice_debug(pi->hw, ICE_DBG_SCHED, "Wrong q_teid\n");
4374 /* Return error if it is not a leaf node */
4375 if (node->info.data.elem_type != ICE_AQC_ELEM_TYPE_LEAF)
4378 /* SRL bandwidth layer selection */
4379 if (rl_type == ICE_SHARED_BW) {
4380 u8 sel_layer; /* selected layer */
4382 sel_layer = ice_sched_get_rl_prof_layer(pi, rl_type,
4383 node->tx_sched_layer);
4384 if (sel_layer >= pi->hw->num_tx_sched_layers) {
4385 status = ICE_ERR_PARAM;
4388 status = ice_sched_validate_srl_node(node, sel_layer);
4393 if (bw == ICE_SCHED_DFLT_BW)
4394 status = ice_sched_set_node_bw_dflt_lmt(pi, node, rl_type);
4396 status = ice_sched_set_node_bw_lmt(pi, node, rl_type, bw);
4399 status = ice_sched_save_q_bw(q_ctx, rl_type, bw);
4402 ice_release_lock(&pi->sched_lock);
4407 * ice_cfg_q_bw_lmt - configure queue BW limit
4408 * @pi: port information structure
4409 * @vsi_handle: sw VSI handle
4410 * @tc: traffic class
4411 * @q_handle: software queue handle
4412 * @rl_type: min, max, or shared
4413 * @bw: bandwidth in Kbps
4415 * This function configures BW limit of queue scheduling node.
4418 ice_cfg_q_bw_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
4419 u16 q_handle, enum ice_rl_type rl_type, u32 bw)
4421 return ice_sched_set_q_bw_lmt(pi, vsi_handle, tc, q_handle, rl_type,
4426 * ice_cfg_q_bw_dflt_lmt - configure queue BW default limit
4427 * @pi: port information structure
4428 * @vsi_handle: sw VSI handle
4429 * @tc: traffic class
4430 * @q_handle: software queue handle
4431 * @rl_type: min, max, or shared
4433 * This function configures BW default limit of queue scheduling node.
4436 ice_cfg_q_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
4437 u16 q_handle, enum ice_rl_type rl_type)
4439 return ice_sched_set_q_bw_lmt(pi, vsi_handle, tc, q_handle, rl_type,
4444 * ice_sched_save_tc_node_bw - save TC node BW limit
4445 * @pi: port information structure
4447 * @rl_type: min or max
4448 * @bw: bandwidth in Kbps
4450 * This function saves the modified values of bandwidth settings for later
4451 * replay purpose (restore) after reset.
4453 static enum ice_status
4454 ice_sched_save_tc_node_bw(struct ice_port_info *pi, u8 tc,
4455 enum ice_rl_type rl_type, u32 bw)
4457 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4458 return ICE_ERR_PARAM;
4461 ice_set_clear_cir_bw(&pi->tc_node_bw_t_info[tc], bw);
4464 ice_set_clear_eir_bw(&pi->tc_node_bw_t_info[tc], bw);
4467 ice_set_clear_shared_bw(&pi->tc_node_bw_t_info[tc], bw);
4470 return ICE_ERR_PARAM;
4476 * ice_sched_set_tc_node_bw_lmt - sets TC node BW limit
4477 * @pi: port information structure
4479 * @rl_type: min or max
4480 * @bw: bandwidth in Kbps
4482 * This function configures bandwidth limit of TC node.
4484 static enum ice_status
4485 ice_sched_set_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
4486 enum ice_rl_type rl_type, u32 bw)
4488 enum ice_status status = ICE_ERR_PARAM;
4489 struct ice_sched_node *tc_node;
4491 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4493 ice_acquire_lock(&pi->sched_lock);
4494 tc_node = ice_sched_get_tc_node(pi, tc);
4496 goto exit_set_tc_node_bw;
4497 if (bw == ICE_SCHED_DFLT_BW)
4498 status = ice_sched_set_node_bw_dflt_lmt(pi, tc_node, rl_type);
4500 status = ice_sched_set_node_bw_lmt(pi, tc_node, rl_type, bw);
4502 status = ice_sched_save_tc_node_bw(pi, tc, rl_type, bw);
4504 exit_set_tc_node_bw:
4505 ice_release_lock(&pi->sched_lock);
4510 * ice_cfg_tc_node_bw_lmt - configure TC node BW limit
4511 * @pi: port information structure
4513 * @rl_type: min or max
4514 * @bw: bandwidth in Kbps
4516 * This function configures BW limit of TC node.
4517 * Note: The minimum guaranteed reservation is done via DCBX.
4520 ice_cfg_tc_node_bw_lmt(struct ice_port_info *pi, u8 tc,
4521 enum ice_rl_type rl_type, u32 bw)
4523 return ice_sched_set_tc_node_bw_lmt(pi, tc, rl_type, bw);
4527 * ice_cfg_tc_node_bw_dflt_lmt - configure TC node BW default limit
4528 * @pi: port information structure
4530 * @rl_type: min or max
4532 * This function configures BW default limit of TC node.
4535 ice_cfg_tc_node_bw_dflt_lmt(struct ice_port_info *pi, u8 tc,
4536 enum ice_rl_type rl_type)
4538 return ice_sched_set_tc_node_bw_lmt(pi, tc, rl_type, ICE_SCHED_DFLT_BW);
4542 * ice_sched_save_tc_node_bw_alloc - save TC node's BW alloc information
4543 * @pi: port information structure
4544 * @tc: traffic class
4545 * @rl_type: rate limit type min or max
4546 * @bw_alloc: Bandwidth allocation information
4548 * Save BW alloc information of VSI type node for post replay use.
4550 static enum ice_status
4551 ice_sched_save_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
4552 enum ice_rl_type rl_type, u16 bw_alloc)
4554 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4555 return ICE_ERR_PARAM;
4558 ice_set_clear_cir_bw_alloc(&pi->tc_node_bw_t_info[tc],
4562 ice_set_clear_eir_bw_alloc(&pi->tc_node_bw_t_info[tc],
4566 return ICE_ERR_PARAM;
4572 * ice_sched_set_tc_node_bw_alloc - set TC node BW alloc
4573 * @pi: port information structure
4575 * @rl_type: min or max
4576 * @bw_alloc: bandwidth alloc
4578 * This function configures bandwidth alloc of TC node, also saves the
4579 * changed settings for replay purpose, and return success if it succeeds
4580 * in modifying bandwidth alloc setting.
4582 static enum ice_status
4583 ice_sched_set_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
4584 enum ice_rl_type rl_type, u8 bw_alloc)
4586 enum ice_status status = ICE_ERR_PARAM;
4587 struct ice_sched_node *tc_node;
4589 if (tc >= ICE_MAX_TRAFFIC_CLASS)
4591 ice_acquire_lock(&pi->sched_lock);
4592 tc_node = ice_sched_get_tc_node(pi, tc);
4594 goto exit_set_tc_node_bw_alloc;
4595 status = ice_sched_cfg_node_bw_alloc(pi->hw, tc_node, rl_type,
4598 goto exit_set_tc_node_bw_alloc;
4599 status = ice_sched_save_tc_node_bw_alloc(pi, tc, rl_type, bw_alloc);
4601 exit_set_tc_node_bw_alloc:
4602 ice_release_lock(&pi->sched_lock);
4607 * ice_cfg_tc_node_bw_alloc - configure TC node BW alloc
4608 * @pi: port information structure
4610 * @rl_type: min or max
4611 * @bw_alloc: bandwidth alloc
4613 * This function configures BW limit of TC node.
4614 * Note: The minimum guaranteed reservation is done via DCBX.
4617 ice_cfg_tc_node_bw_alloc(struct ice_port_info *pi, u8 tc,
4618 enum ice_rl_type rl_type, u8 bw_alloc)
4620 return ice_sched_set_tc_node_bw_alloc(pi, tc, rl_type, bw_alloc);
4624 * ice_sched_set_agg_bw_dflt_lmt - set aggregator node's BW limit to default
4625 * @pi: port information structure
4626 * @vsi_handle: software VSI handle
4628 * This function retrieves the aggregator ID based on VSI ID and TC,
4629 * and sets node's BW limit to default. This function needs to be
4630 * called with the scheduler lock held.
4633 ice_sched_set_agg_bw_dflt_lmt(struct ice_port_info *pi, u16 vsi_handle)
4635 struct ice_vsi_ctx *vsi_ctx;
4636 enum ice_status status = ICE_SUCCESS;
4639 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4640 return ICE_ERR_PARAM;
4641 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
4643 return ICE_ERR_PARAM;
4645 ice_for_each_traffic_class(tc) {
4646 struct ice_sched_node *node;
4648 node = vsi_ctx->sched.ag_node[tc];
4652 /* Set min profile to default */
4653 status = ice_sched_set_node_bw_dflt_lmt(pi, node, ICE_MIN_BW);
4657 /* Set max profile to default */
4658 status = ice_sched_set_node_bw_dflt_lmt(pi, node, ICE_MAX_BW);
4662 /* Remove shared profile, if there is one */
4663 status = ice_sched_set_node_bw_dflt_lmt(pi, node,
4673 * ice_sched_get_node_by_id_type - get node from ID type
4674 * @pi: port information structure
4676 * @agg_type: type of aggregator
4677 * @tc: traffic class
4679 * This function returns node identified by ID of type aggregator, and
4680 * based on traffic class (TC). This function needs to be called with
4681 * the scheduler lock held.
4683 static struct ice_sched_node *
4684 ice_sched_get_node_by_id_type(struct ice_port_info *pi, u32 id,
4685 enum ice_agg_type agg_type, u8 tc)
4687 struct ice_sched_node *node = NULL;
4688 struct ice_sched_node *child_node;
4691 case ICE_AGG_TYPE_VSI: {
4692 struct ice_vsi_ctx *vsi_ctx;
4693 u16 vsi_handle = (u16)id;
4695 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4697 /* Get sched_vsi_info */
4698 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
4701 node = vsi_ctx->sched.vsi_node[tc];
4705 case ICE_AGG_TYPE_AGG: {
4706 struct ice_sched_node *tc_node;
4708 tc_node = ice_sched_get_tc_node(pi, tc);
4710 node = ice_sched_get_agg_node(pi, tc_node, id);
4714 case ICE_AGG_TYPE_Q:
4715 /* The current implementation allows single queue to modify */
4716 node = ice_sched_get_node(pi, id);
4719 case ICE_AGG_TYPE_QG:
4720 /* The current implementation allows single qg to modify */
4721 child_node = ice_sched_get_node(pi, id);
4724 node = child_node->parent;
4735 * ice_sched_set_node_bw_lmt_per_tc - set node BW limit per TC
4736 * @pi: port information structure
4737 * @id: ID (software VSI handle or AGG ID)
4738 * @agg_type: aggregator type (VSI or AGG type node)
4739 * @tc: traffic class
4740 * @rl_type: min or max
4741 * @bw: bandwidth in Kbps
4743 * This function sets BW limit of VSI or Aggregator scheduling node
4744 * based on TC information from passed in argument BW.
4747 ice_sched_set_node_bw_lmt_per_tc(struct ice_port_info *pi, u32 id,
4748 enum ice_agg_type agg_type, u8 tc,
4749 enum ice_rl_type rl_type, u32 bw)
4751 enum ice_status status = ICE_ERR_PARAM;
4752 struct ice_sched_node *node;
4757 if (rl_type == ICE_UNKNOWN_BW)
4760 ice_acquire_lock(&pi->sched_lock);
4761 node = ice_sched_get_node_by_id_type(pi, id, agg_type, tc);
4763 ice_debug(pi->hw, ICE_DBG_SCHED, "Wrong id, agg type, or tc\n");
4764 goto exit_set_node_bw_lmt_per_tc;
4766 if (bw == ICE_SCHED_DFLT_BW)
4767 status = ice_sched_set_node_bw_dflt_lmt(pi, node, rl_type);
4769 status = ice_sched_set_node_bw_lmt(pi, node, rl_type, bw);
4771 exit_set_node_bw_lmt_per_tc:
4772 ice_release_lock(&pi->sched_lock);
4777 * ice_sched_validate_vsi_srl_node - validate VSI SRL node
4778 * @pi: port information structure
4779 * @vsi_handle: software VSI handle
4781 * This function validates SRL node of the VSI node if available SRL layer is
4782 * different than the VSI node layer on all TC(s).This function needs to be
4783 * called with scheduler lock held.
4785 static enum ice_status
4786 ice_sched_validate_vsi_srl_node(struct ice_port_info *pi, u16 vsi_handle)
4788 u8 sel_layer = ICE_SCHED_INVAL_LAYER_NUM;
4791 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4792 return ICE_ERR_PARAM;
4794 /* Return success if no nodes are present across TC */
4795 ice_for_each_traffic_class(tc) {
4796 struct ice_sched_node *tc_node, *vsi_node;
4797 enum ice_rl_type rl_type = ICE_SHARED_BW;
4798 enum ice_status status;
4800 tc_node = ice_sched_get_tc_node(pi, tc);
4804 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
4808 /* SRL bandwidth layer selection */
4809 if (sel_layer == ICE_SCHED_INVAL_LAYER_NUM) {
4810 u8 node_layer = vsi_node->tx_sched_layer;
4813 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
4815 if (layer_num >= pi->hw->num_tx_sched_layers)
4816 return ICE_ERR_PARAM;
4817 sel_layer = layer_num;
4820 status = ice_sched_validate_srl_node(vsi_node, sel_layer);
4828 * ice_sched_set_vsi_bw_shared_lmt - set VSI BW shared limit
4829 * @pi: port information structure
4830 * @vsi_handle: software VSI handle
4831 * @bw: bandwidth in Kbps
4833 * This function Configures shared rate limiter(SRL) of all VSI type nodes
4834 * across all traffic classes for VSI matching handle. When BW value of
4835 * ICE_SCHED_DFLT_BW is passed, it removes the SRL from the node.
4838 ice_sched_set_vsi_bw_shared_lmt(struct ice_port_info *pi, u16 vsi_handle,
4841 enum ice_status status = ICE_SUCCESS;
4845 return ICE_ERR_PARAM;
4847 if (!ice_is_vsi_valid(pi->hw, vsi_handle))
4848 return ICE_ERR_PARAM;
4850 ice_acquire_lock(&pi->sched_lock);
4851 status = ice_sched_validate_vsi_srl_node(pi, vsi_handle);
4853 goto exit_set_vsi_bw_shared_lmt;
4854 /* Return success if no nodes are present across TC */
4855 ice_for_each_traffic_class(tc) {
4856 struct ice_sched_node *tc_node, *vsi_node;
4857 enum ice_rl_type rl_type = ICE_SHARED_BW;
4859 tc_node = ice_sched_get_tc_node(pi, tc);
4863 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
4867 if (bw == ICE_SCHED_DFLT_BW)
4868 /* It removes existing SRL from the node */
4869 status = ice_sched_set_node_bw_dflt_lmt(pi, vsi_node,
4872 status = ice_sched_set_node_bw_lmt(pi, vsi_node,
4876 status = ice_sched_save_vsi_bw(pi, vsi_handle, tc, rl_type, bw);
4881 exit_set_vsi_bw_shared_lmt:
4882 ice_release_lock(&pi->sched_lock);
4887 * ice_sched_validate_agg_srl_node - validate AGG SRL node
4888 * @pi: port information structure
4889 * @agg_id: aggregator ID
4891 * This function validates SRL node of the AGG node if available SRL layer is
4892 * different than the AGG node layer on all TC(s).This function needs to be
4893 * called with scheduler lock held.
4895 static enum ice_status
4896 ice_sched_validate_agg_srl_node(struct ice_port_info *pi, u32 agg_id)
4898 u8 sel_layer = ICE_SCHED_INVAL_LAYER_NUM;
4899 struct ice_sched_agg_info *agg_info;
4900 bool agg_id_present = false;
4901 enum ice_status status = ICE_SUCCESS;
4904 LIST_FOR_EACH_ENTRY(agg_info, &pi->hw->agg_list, ice_sched_agg_info,
4906 if (agg_info->agg_id == agg_id) {
4907 agg_id_present = true;
4910 if (!agg_id_present)
4911 return ICE_ERR_PARAM;
4912 /* Return success if no nodes are present across TC */
4913 ice_for_each_traffic_class(tc) {
4914 struct ice_sched_node *tc_node, *agg_node;
4915 enum ice_rl_type rl_type = ICE_SHARED_BW;
4917 tc_node = ice_sched_get_tc_node(pi, tc);
4921 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
4924 /* SRL bandwidth layer selection */
4925 if (sel_layer == ICE_SCHED_INVAL_LAYER_NUM) {
4926 u8 node_layer = agg_node->tx_sched_layer;
4929 layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
4931 if (layer_num >= pi->hw->num_tx_sched_layers)
4932 return ICE_ERR_PARAM;
4933 sel_layer = layer_num;
4936 status = ice_sched_validate_srl_node(agg_node, sel_layer);
4944 * ice_sched_set_agg_bw_shared_lmt - set aggregator BW shared limit
4945 * @pi: port information structure
4946 * @agg_id: aggregator ID
4947 * @bw: bandwidth in Kbps
4949 * This function configures the shared rate limiter(SRL) of all aggregator type
4950 * nodes across all traffic classes for aggregator matching agg_id. When
4951 * BW value of ICE_SCHED_DFLT_BW is passed, it removes SRL from the
4955 ice_sched_set_agg_bw_shared_lmt(struct ice_port_info *pi, u32 agg_id, u32 bw)
4957 struct ice_sched_agg_info *agg_info;
4958 struct ice_sched_agg_info *tmp;
4959 bool agg_id_present = false;
4960 enum ice_status status = ICE_SUCCESS;
4964 return ICE_ERR_PARAM;
4966 ice_acquire_lock(&pi->sched_lock);
4967 status = ice_sched_validate_agg_srl_node(pi, agg_id);
4969 goto exit_agg_bw_shared_lmt;
4971 LIST_FOR_EACH_ENTRY_SAFE(agg_info, tmp, &pi->hw->agg_list,
4972 ice_sched_agg_info, list_entry)
4973 if (agg_info->agg_id == agg_id) {
4974 agg_id_present = true;
4978 if (!agg_id_present) {
4979 status = ICE_ERR_PARAM;
4980 goto exit_agg_bw_shared_lmt;
4983 /* Return success if no nodes are present across TC */
4984 ice_for_each_traffic_class(tc) {
4985 enum ice_rl_type rl_type = ICE_SHARED_BW;
4986 struct ice_sched_node *tc_node, *agg_node;
4988 tc_node = ice_sched_get_tc_node(pi, tc);
4992 agg_node = ice_sched_get_agg_node(pi, tc_node, agg_id);
4996 if (bw == ICE_SCHED_DFLT_BW)
4997 /* It removes existing SRL from the node */
4998 status = ice_sched_set_node_bw_dflt_lmt(pi, agg_node,
5001 status = ice_sched_set_node_bw_lmt(pi, agg_node,
5005 status = ice_sched_save_agg_bw(pi, agg_id, tc, rl_type, bw);
5010 exit_agg_bw_shared_lmt:
5011 ice_release_lock(&pi->sched_lock);
5016 * ice_sched_cfg_sibl_node_prio - configure node sibling priority
5017 * @pi: port information structure
5018 * @node: sched node to configure
5019 * @priority: sibling priority
5021 * This function configures node element's sibling priority only. This
5022 * function needs to be called with scheduler lock held.
5025 ice_sched_cfg_sibl_node_prio(struct ice_port_info *pi,
5026 struct ice_sched_node *node, u8 priority)
5028 struct ice_aqc_txsched_elem_data buf;
5029 struct ice_aqc_txsched_elem *data;
5030 struct ice_hw *hw = pi->hw;
5031 enum ice_status status;
5034 return ICE_ERR_PARAM;
5037 data->valid_sections |= ICE_AQC_ELEM_VALID_GENERIC;
5038 priority = (priority << ICE_AQC_ELEM_GENERIC_PRIO_S) &
5039 ICE_AQC_ELEM_GENERIC_PRIO_M;
5040 data->generic &= ~ICE_AQC_ELEM_GENERIC_PRIO_M;
5041 data->generic |= priority;
5043 /* Configure element */
5044 status = ice_sched_update_elem(hw, node, &buf);
5049 * ice_cfg_rl_burst_size - Set burst size value
5050 * @hw: pointer to the HW struct
5051 * @bytes: burst size in bytes
5053 * This function configures/set the burst size to requested new value. The new
5054 * burst size value is used for future rate limit calls. It doesn't change the
5055 * existing or previously created RL profiles.
5057 enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)
5059 u16 burst_size_to_prog;
5061 if (bytes < ICE_MIN_BURST_SIZE_ALLOWED ||
5062 bytes > ICE_MAX_BURST_SIZE_ALLOWED)
5063 return ICE_ERR_PARAM;
5064 if (ice_round_to_num(bytes, 64) <=
5065 ICE_MAX_BURST_SIZE_64_BYTE_GRANULARITY) {
5066 /* 64 byte granularity case */
5067 /* Disable MSB granularity bit */
5068 burst_size_to_prog = ICE_64_BYTE_GRANULARITY;
5069 /* round number to nearest 64 byte granularity */
5070 bytes = ice_round_to_num(bytes, 64);
5071 /* The value is in 64 byte chunks */
5072 burst_size_to_prog |= (u16)(bytes / 64);
5074 /* k bytes granularity case */
5075 /* Enable MSB granularity bit */
5076 burst_size_to_prog = ICE_KBYTE_GRANULARITY;
5077 /* round number to nearest 1024 granularity */
5078 bytes = ice_round_to_num(bytes, 1024);
5079 /* check rounding doesn't go beyond allowed */
5080 if (bytes > ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY)
5081 bytes = ICE_MAX_BURST_SIZE_KBYTE_GRANULARITY;
5082 /* The value is in k bytes */
5083 burst_size_to_prog |= (u16)(bytes / 1024);
5085 hw->max_burst_size = burst_size_to_prog;
5090 * ice_sched_replay_node_prio - re-configure node priority
5091 * @hw: pointer to the HW struct
5092 * @node: sched node to configure
5093 * @priority: priority value
5095 * This function configures node element's priority value. It
5096 * needs to be called with scheduler lock held.
5098 static enum ice_status
5099 ice_sched_replay_node_prio(struct ice_hw *hw, struct ice_sched_node *node,
5102 struct ice_aqc_txsched_elem_data buf;
5103 struct ice_aqc_txsched_elem *data;
5104 enum ice_status status;
5108 data->valid_sections |= ICE_AQC_ELEM_VALID_GENERIC;
5109 data->generic = priority;
5111 /* Configure element */
5112 status = ice_sched_update_elem(hw, node, &buf);
5117 * ice_sched_replay_node_bw - replay node(s) BW
5118 * @hw: pointer to the HW struct
5119 * @node: sched node to configure
5120 * @bw_t_info: BW type information
5122 * This function restores node's BW from bw_t_info. The caller needs
5123 * to hold the scheduler lock.
5125 static enum ice_status
5126 ice_sched_replay_node_bw(struct ice_hw *hw, struct ice_sched_node *node,
5127 struct ice_bw_type_info *bw_t_info)
5129 struct ice_port_info *pi = hw->port_info;
5130 enum ice_status status = ICE_ERR_PARAM;
5135 if (!ice_is_any_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CNT))
5137 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_PRIO)) {
5138 status = ice_sched_replay_node_prio(hw, node,
5139 bw_t_info->generic);
5143 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CIR)) {
5144 status = ice_sched_set_node_bw_lmt(pi, node, ICE_MIN_BW,
5145 bw_t_info->cir_bw.bw);
5149 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_CIR_WT)) {
5150 bw_alloc = bw_t_info->cir_bw.bw_alloc;
5151 status = ice_sched_cfg_node_bw_alloc(hw, node, ICE_MIN_BW,
5156 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_EIR)) {
5157 status = ice_sched_set_node_bw_lmt(pi, node, ICE_MAX_BW,
5158 bw_t_info->eir_bw.bw);
5162 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_EIR_WT)) {
5163 bw_alloc = bw_t_info->eir_bw.bw_alloc;
5164 status = ice_sched_cfg_node_bw_alloc(hw, node, ICE_MAX_BW,
5169 if (ice_is_bit_set(bw_t_info->bw_t_bitmap, ICE_BW_TYPE_SHARED))
5170 status = ice_sched_set_node_bw_lmt(pi, node, ICE_SHARED_BW,
5171 bw_t_info->shared_bw);
5176 * ice_sched_replay_agg_bw - replay aggregator node(s) BW
5177 * @hw: pointer to the HW struct
5178 * @agg_info: aggregator data structure
5180 * This function re-creates aggregator type nodes. The caller needs to hold
5181 * the scheduler lock.
5183 static enum ice_status
5184 ice_sched_replay_agg_bw(struct ice_hw *hw, struct ice_sched_agg_info *agg_info)
5186 struct ice_sched_node *tc_node, *agg_node;
5187 enum ice_status status = ICE_SUCCESS;
5191 return ICE_ERR_PARAM;
5192 ice_for_each_traffic_class(tc) {
5193 if (!ice_is_any_bit_set(agg_info->bw_t_info[tc].bw_t_bitmap,
5196 tc_node = ice_sched_get_tc_node(hw->port_info, tc);
5198 status = ICE_ERR_PARAM;
5201 agg_node = ice_sched_get_agg_node(hw->port_info, tc_node,
5204 status = ICE_ERR_PARAM;
5207 status = ice_sched_replay_node_bw(hw, agg_node,
5208 &agg_info->bw_t_info[tc]);
5216 * ice_sched_get_ena_tc_bitmap - get enabled TC bitmap
5217 * @pi: port info struct
5218 * @tc_bitmap: 8 bits TC bitmap to check
5219 * @ena_tc_bitmap: 8 bits enabled TC bitmap to return
5221 * This function returns enabled TC bitmap in variable ena_tc_bitmap. Some TCs
5222 * may be missing, it returns enabled TCs. This function needs to be called with
5223 * scheduler lock held.
5226 ice_sched_get_ena_tc_bitmap(struct ice_port_info *pi, ice_bitmap_t *tc_bitmap,
5227 ice_bitmap_t *ena_tc_bitmap)
5231 /* Some TC(s) may be missing after reset, adjust for replay */
5232 ice_for_each_traffic_class(tc)
5233 if (ice_is_tc_ena(*tc_bitmap, tc) &&
5234 (ice_sched_get_tc_node(pi, tc)))
5235 ice_set_bit(tc, ena_tc_bitmap);
5239 * ice_sched_replay_agg - recreate aggregator node(s)
5240 * @hw: pointer to the HW struct
5242 * This function recreate aggregator type nodes which are not replayed earlier.
5243 * It also replay aggregator BW information. These aggregator nodes are not
5244 * associated with VSI type node yet.
5246 void ice_sched_replay_agg(struct ice_hw *hw)
5248 struct ice_port_info *pi = hw->port_info;
5249 struct ice_sched_agg_info *agg_info;
5251 ice_acquire_lock(&pi->sched_lock);
5252 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
5254 /* replay aggregator (re-create aggregator node) */
5255 if (!ice_cmp_bitmap(agg_info->tc_bitmap,
5256 agg_info->replay_tc_bitmap,
5257 ICE_MAX_TRAFFIC_CLASS)) {
5258 ice_declare_bitmap(replay_bitmap,
5259 ICE_MAX_TRAFFIC_CLASS);
5260 enum ice_status status;
5262 ice_zero_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5263 ice_sched_get_ena_tc_bitmap(pi,
5264 agg_info->replay_tc_bitmap,
5266 status = ice_sched_cfg_agg(hw->port_info,
5271 ice_info(hw, "Replay agg id[%d] failed\n",
5273 /* Move on to next one */
5276 /* Replay aggregator node BW (restore aggregator BW) */
5277 status = ice_sched_replay_agg_bw(hw, agg_info);
5279 ice_info(hw, "Replay agg bw [id=%d] failed\n",
5283 ice_release_lock(&pi->sched_lock);
5287 * ice_sched_replay_agg_vsi_preinit - Agg/VSI replay pre initialization
5288 * @hw: pointer to the HW struct
5290 * This function initialize aggregator(s) TC bitmap to zero. A required
5291 * preinit step for replaying aggregators.
5293 void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw)
5295 struct ice_port_info *pi = hw->port_info;
5296 struct ice_sched_agg_info *agg_info;
5298 ice_acquire_lock(&pi->sched_lock);
5299 LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,
5301 struct ice_sched_agg_vsi_info *agg_vsi_info;
5303 agg_info->tc_bitmap[0] = 0;
5304 LIST_FOR_EACH_ENTRY(agg_vsi_info, &agg_info->agg_vsi_list,
5305 ice_sched_agg_vsi_info, list_entry)
5306 agg_vsi_info->tc_bitmap[0] = 0;
5308 ice_release_lock(&pi->sched_lock);
5312 * ice_sched_replay_tc_node_bw - replay TC node(s) BW
5313 * @pi: port information structure
5315 * This function replay TC nodes.
5318 ice_sched_replay_tc_node_bw(struct ice_port_info *pi)
5320 enum ice_status status = ICE_SUCCESS;
5324 return ICE_ERR_PARAM;
5325 ice_acquire_lock(&pi->sched_lock);
5326 ice_for_each_traffic_class(tc) {
5327 struct ice_sched_node *tc_node;
5329 tc_node = ice_sched_get_tc_node(pi, tc);
5331 continue; /* TC not present */
5332 status = ice_sched_replay_node_bw(pi->hw, tc_node,
5333 &pi->tc_node_bw_t_info[tc]);
5337 ice_release_lock(&pi->sched_lock);
5342 * ice_sched_replay_vsi_bw - replay VSI type node(s) BW
5343 * @hw: pointer to the HW struct
5344 * @vsi_handle: software VSI handle
5345 * @tc_bitmap: 8 bits TC bitmap
5347 * This function replays VSI type nodes bandwidth. This function needs to be
5348 * called with scheduler lock held.
5350 static enum ice_status
5351 ice_sched_replay_vsi_bw(struct ice_hw *hw, u16 vsi_handle,
5352 ice_bitmap_t *tc_bitmap)
5354 struct ice_sched_node *vsi_node, *tc_node;
5355 struct ice_port_info *pi = hw->port_info;
5356 struct ice_bw_type_info *bw_t_info;
5357 struct ice_vsi_ctx *vsi_ctx;
5358 enum ice_status status = ICE_SUCCESS;
5361 vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);
5363 return ICE_ERR_PARAM;
5364 ice_for_each_traffic_class(tc) {
5365 if (!ice_is_tc_ena(*tc_bitmap, tc))
5367 tc_node = ice_sched_get_tc_node(pi, tc);
5370 vsi_node = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
5373 bw_t_info = &vsi_ctx->sched.bw_t_info[tc];
5374 status = ice_sched_replay_node_bw(hw, vsi_node, bw_t_info);
5382 * ice_sched_replay_vsi_agg - replay aggregator & VSI to aggregator node(s)
5383 * @hw: pointer to the HW struct
5384 * @vsi_handle: software VSI handle
5386 * This function replays aggregator node, VSI to aggregator type nodes, and
5387 * their node bandwidth information. This function needs to be called with
5388 * scheduler lock held.
5390 static enum ice_status
5391 ice_sched_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
5393 ice_declare_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5394 struct ice_sched_agg_vsi_info *agg_vsi_info;
5395 struct ice_port_info *pi = hw->port_info;
5396 struct ice_sched_agg_info *agg_info;
5397 enum ice_status status;
5399 ice_zero_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5400 if (!ice_is_vsi_valid(hw, vsi_handle))
5401 return ICE_ERR_PARAM;
5402 agg_info = ice_get_vsi_agg_info(hw, vsi_handle);
5404 return ICE_SUCCESS; /* Not present in list - default Agg case */
5405 agg_vsi_info = ice_get_agg_vsi_info(agg_info, vsi_handle);
5407 return ICE_SUCCESS; /* Not present in list - default Agg case */
5408 ice_sched_get_ena_tc_bitmap(pi, agg_info->replay_tc_bitmap,
5410 /* Replay aggregator node associated to vsi_handle */
5411 status = ice_sched_cfg_agg(hw->port_info, agg_info->agg_id,
5412 ICE_AGG_TYPE_AGG, replay_bitmap);
5415 /* Replay aggregator node BW (restore aggregator BW) */
5416 status = ice_sched_replay_agg_bw(hw, agg_info);
5420 ice_zero_bitmap(replay_bitmap, ICE_MAX_TRAFFIC_CLASS);
5421 ice_sched_get_ena_tc_bitmap(pi, agg_vsi_info->replay_tc_bitmap,
5423 /* Move this VSI (vsi_handle) to above aggregator */
5424 status = ice_sched_assoc_vsi_to_agg(pi, agg_info->agg_id, vsi_handle,
5428 /* Replay VSI BW (restore VSI BW) */
5429 return ice_sched_replay_vsi_bw(hw, vsi_handle,
5430 agg_vsi_info->tc_bitmap);
5434 * ice_replay_vsi_agg - replay VSI to aggregator node
5435 * @hw: pointer to the HW struct
5436 * @vsi_handle: software VSI handle
5438 * This function replays association of VSI to aggregator type nodes, and
5439 * node bandwidth information.
5442 ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
5444 struct ice_port_info *pi = hw->port_info;
5445 enum ice_status status;
5447 ice_acquire_lock(&pi->sched_lock);
5448 status = ice_sched_replay_vsi_agg(hw, vsi_handle);
5449 ice_release_lock(&pi->sched_lock);
5454 * ice_sched_replay_q_bw - replay queue type node BW
5455 * @pi: port information structure
5456 * @q_ctx: queue context structure
5458 * This function replays queue type node bandwidth. This function needs to be
5459 * called with scheduler lock held.
5462 ice_sched_replay_q_bw(struct ice_port_info *pi, struct ice_q_ctx *q_ctx)
5464 struct ice_sched_node *q_node;
5466 /* Following also checks the presence of node in tree */
5467 q_node = ice_sched_find_node_by_teid(pi->root, q_ctx->q_teid);
5469 return ICE_ERR_PARAM;
5470 return ice_sched_replay_node_bw(pi->hw, q_node, &q_ctx->bw_t_info);