drivers/net/ice/ice_dcf_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2020 Intel Corporation
   3  */
   4
   5 #include <errno.h>
   6 #include <stdbool.h>
   7 #include <sys/types.h>
   8 #include <unistd.h>
   9
  10 #include <rte_interrupts.h>
  11 #include <rte_debug.h>
  12 #include <rte_pci.h>
  13 #include <rte_atomic.h>
  14 #include <rte_eal.h>
  15 #include <rte_ether.h>
  16 #include <ethdev_pci.h>
  17 #include <rte_kvargs.h>
  18 #include <rte_malloc.h>
  19 #include <rte_memzone.h>
  20 #include <rte_dev.h>
  21
  22 #include <iavf_devids.h>
  23
  24 #include "ice_generic_flow.h"
  25 #include "ice_dcf_ethdev.h"
  26 #include "ice_rxtx.h"
  27
  28 static int
  29 ice_dcf_dev_udp_tunnel_port_add(struct rte_eth_dev *dev,
  30                                 struct rte_eth_udp_tunnel *udp_tunnel);
  31 static int
  32 ice_dcf_dev_udp_tunnel_port_del(struct rte_eth_dev *dev,
  33                                 struct rte_eth_udp_tunnel *udp_tunnel);
  34
  35 static uint16_t
  36 ice_dcf_recv_pkts(__rte_unused void *rx_queue,
  37                   __rte_unused struct rte_mbuf **bufs,
  38                   __rte_unused uint16_t nb_pkts)
  39 {
  40         return 0;
  41 }
  42
  43 static uint16_t
  44 ice_dcf_xmit_pkts(__rte_unused void *tx_queue,
  45                   __rte_unused struct rte_mbuf **bufs,
  46                   __rte_unused uint16_t nb_pkts)
  47 {
  48         return 0;
  49 }
  50
  51 static int
  52 ice_dcf_init_rxq(struct rte_eth_dev *dev, struct ice_rx_queue *rxq)
  53 {
  54         struct ice_dcf_adapter *dcf_ad = dev->data->dev_private;
  55         struct rte_eth_dev_data *dev_data = dev->data;
  56         struct iavf_hw *hw = &dcf_ad->real_hw.avf;
  57         uint16_t buf_size, max_pkt_len, len;
  58
  59         buf_size = rte_pktmbuf_data_room_size(rxq->mp) - RTE_PKTMBUF_HEADROOM;
  60         rxq->rx_hdr_len = 0;
  61         rxq->rx_buf_len = RTE_ALIGN(buf_size, (1 << ICE_RLAN_CTX_DBUF_S));
  62         len = ICE_SUPPORT_CHAIN_NUM * rxq->rx_buf_len;
  63         max_pkt_len = RTE_MIN(len, dev->data->dev_conf.rxmode.max_rx_pkt_len);
  64
  65         /* Check if the jumbo frame and maximum packet length are set
  66          * correctly.
  67          */
  68         if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
  69                 if (max_pkt_len <= ICE_ETH_MAX_LEN ||
  70                     max_pkt_len > ICE_FRAME_SIZE_MAX) {
  71                         PMD_DRV_LOG(ERR, "maximum packet length must be "
  72                                     "larger than %u and smaller than %u, "
  73                                     "as jumbo frame is enabled",
  74                                     (uint32_t)ICE_ETH_MAX_LEN,
  75                                     (uint32_t)ICE_FRAME_SIZE_MAX);
  76                         return -EINVAL;
  77                 }
  78         } else {
  79                 if (max_pkt_len < RTE_ETHER_MIN_LEN ||
  80                     max_pkt_len > ICE_ETH_MAX_LEN) {
  81                         PMD_DRV_LOG(ERR, "maximum packet length must be "
  82                                     "larger than %u and smaller than %u, "
  83                                     "as jumbo frame is disabled",
  84                                     (uint32_t)RTE_ETHER_MIN_LEN,
  85                                     (uint32_t)ICE_ETH_MAX_LEN);
  86                         return -EINVAL;
  87                 }
  88         }
  89
  90         rxq->max_pkt_len = max_pkt_len;
  91         if ((dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_SCATTER) ||
  92             (rxq->max_pkt_len + 2 * ICE_VLAN_TAG_SIZE) > buf_size) {
  93                 dev_data->scattered_rx = 1;
  94         }
  95         rxq->qrx_tail = hw->hw_addr + IAVF_QRX_TAIL1(rxq->queue_id);
  96         IAVF_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
  97         IAVF_WRITE_FLUSH(hw);
  98
  99         return 0;
 100 }
 101
 102 static int
 103 ice_dcf_init_rx_queues(struct rte_eth_dev *dev)
 104 {
 105         struct ice_rx_queue **rxq =
 106                 (struct ice_rx_queue **)dev->data->rx_queues;
 107         int i, ret;
 108
 109         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 110                 if (!rxq[i] || !rxq[i]->q_set)
 111                         continue;
 112                 ret = ice_dcf_init_rxq(dev, rxq[i]);
 113                 if (ret)
 114                         return ret;
 115         }
 116
 117         ice_set_rx_function(dev);
 118         ice_set_tx_function(dev);
 119
 120         return 0;
 121 }
 122
 123 #define IAVF_MISC_VEC_ID                RTE_INTR_VEC_ZERO_OFFSET
 124 #define IAVF_RX_VEC_START               RTE_INTR_VEC_RXTX_OFFSET
 125
 126 #define IAVF_ITR_INDEX_DEFAULT          0
 127 #define IAVF_QUEUE_ITR_INTERVAL_DEFAULT 32 /* 32 us */
 128 #define IAVF_QUEUE_ITR_INTERVAL_MAX     8160 /* 8160 us */
 129
 130 static inline uint16_t
 131 iavf_calc_itr_interval(int16_t interval)
 132 {
 133         if (interval < 0 || interval > IAVF_QUEUE_ITR_INTERVAL_MAX)
 134                 interval = IAVF_QUEUE_ITR_INTERVAL_DEFAULT;
 135
 136         /* Convert to hardware count, as writing each 1 represents 2 us */
 137         return interval / 2;
 138 }
 139
 140 static int
 141 ice_dcf_config_rx_queues_irqs(struct rte_eth_dev *dev,
 142                                      struct rte_intr_handle *intr_handle)
 143 {
 144         struct ice_dcf_adapter *adapter = dev->data->dev_private;
 145         struct ice_dcf_hw *hw = &adapter->real_hw;
 146         uint16_t interval, i;
 147         int vec;
 148
 149         if (rte_intr_cap_multiple(intr_handle) &&
 150             dev->data->dev_conf.intr_conf.rxq) {
 151                 if (rte_intr_efd_enable(intr_handle, dev->data->nb_rx_queues))
 152                         return -1;
 153         }
 154
 155         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
 156                 intr_handle->intr_vec =
 157                         rte_zmalloc("intr_vec",
 158                                     dev->data->nb_rx_queues * sizeof(int), 0);
 159                 if (!intr_handle->intr_vec) {
 160                         PMD_DRV_LOG(ERR, "Failed to allocate %d rx intr_vec",
 161                                     dev->data->nb_rx_queues);
 162                         return -1;
 163                 }
 164         }
 165
 166         if (!dev->data->dev_conf.intr_conf.rxq ||
 167             !rte_intr_dp_is_en(intr_handle)) {
 168                 /* Rx interrupt disabled, Map interrupt only for writeback */
 169                 hw->nb_msix = 1;
 170                 if (hw->vf_res->vf_cap_flags &
 171                     VIRTCHNL_VF_OFFLOAD_WB_ON_ITR) {
 172                         /* If WB_ON_ITR supports, enable it */
 173                         hw->msix_base = IAVF_RX_VEC_START;
 174                         IAVF_WRITE_REG(&hw->avf,
 175                                        IAVF_VFINT_DYN_CTLN1(hw->msix_base - 1),
 176                                        IAVF_VFINT_DYN_CTLN1_ITR_INDX_MASK |
 177                                        IAVF_VFINT_DYN_CTLN1_WB_ON_ITR_MASK);
 178                 } else {
 179                         /* If no WB_ON_ITR offload flags, need to set
 180                          * interrupt for descriptor write back.
 181                          */
 182                         hw->msix_base = IAVF_MISC_VEC_ID;
 183
 184                         /* set ITR to max */
 185                         interval =
 186                         iavf_calc_itr_interval(IAVF_QUEUE_ITR_INTERVAL_MAX);
 187                         IAVF_WRITE_REG(&hw->avf, IAVF_VFINT_DYN_CTL01,
 188                                        IAVF_VFINT_DYN_CTL01_INTENA_MASK |
 189                                        (IAVF_ITR_INDEX_DEFAULT <<
 190                                         IAVF_VFINT_DYN_CTL01_ITR_INDX_SHIFT) |
 191                                        (interval <<
 192                                         IAVF_VFINT_DYN_CTL01_INTERVAL_SHIFT));
 193                 }
 194                 IAVF_WRITE_FLUSH(&hw->avf);
 195                 /* map all queues to the same interrupt */
 196                 for (i = 0; i < dev->data->nb_rx_queues; i++)
 197                         hw->rxq_map[hw->msix_base] |= 1 << i;
 198         } else {
 199                 if (!rte_intr_allow_others(intr_handle)) {
 200                         hw->nb_msix = 1;
 201                         hw->msix_base = IAVF_MISC_VEC_ID;
 202                         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 203                                 hw->rxq_map[hw->msix_base] |= 1 << i;
 204                                 intr_handle->intr_vec[i] = IAVF_MISC_VEC_ID;
 205                         }
 206                         PMD_DRV_LOG(DEBUG,
 207                                     "vector %u are mapping to all Rx queues",
 208                                     hw->msix_base);
 209                 } else {
 210                         /* If Rx interrupt is reuquired, and we can use
 211                          * multi interrupts, then the vec is from 1
 212                          */
 213                         hw->nb_msix = RTE_MIN(hw->vf_res->max_vectors,
 214                                               intr_handle->nb_efd);
 215                         hw->msix_base = IAVF_MISC_VEC_ID;
 216                         vec = IAVF_MISC_VEC_ID;
 217                         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 218                                 hw->rxq_map[vec] |= 1 << i;
 219                                 intr_handle->intr_vec[i] = vec++;
 220                                 if (vec >= hw->nb_msix)
 221                                         vec = IAVF_RX_VEC_START;
 222                         }
 223                         PMD_DRV_LOG(DEBUG,
 224                                     "%u vectors are mapping to %u Rx queues",
 225                                     hw->nb_msix, dev->data->nb_rx_queues);
 226                 }
 227         }
 228
 229         if (ice_dcf_config_irq_map(hw)) {
 230                 PMD_DRV_LOG(ERR, "config interrupt mapping failed");
 231                 return -1;
 232         }
 233         return 0;
 234 }
 235
 236 static int
 237 alloc_rxq_mbufs(struct ice_rx_queue *rxq)
 238 {
 239         volatile union ice_rx_flex_desc *rxd;
 240         struct rte_mbuf *mbuf = NULL;
 241         uint64_t dma_addr;
 242         uint16_t i;
 243
 244         for (i = 0; i < rxq->nb_rx_desc; i++) {
 245                 mbuf = rte_mbuf_raw_alloc(rxq->mp);
 246                 if (unlikely(!mbuf)) {
 247                         PMD_DRV_LOG(ERR, "Failed to allocate mbuf for RX");
 248                         return -ENOMEM;
 249                 }
 250
 251                 rte_mbuf_refcnt_set(mbuf, 1);
 252                 mbuf->next = NULL;
 253                 mbuf->data_off = RTE_PKTMBUF_HEADROOM;
 254                 mbuf->nb_segs = 1;
 255                 mbuf->port = rxq->port_id;
 256
 257                 dma_addr =
 258                         rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
 259
 260                 rxd = &rxq->rx_ring[i];
 261                 rxd->read.pkt_addr = dma_addr;
 262                 rxd->read.hdr_addr = 0;
 263 #ifndef RTE_LIBRTE_ICE_16BYTE_RX_DESC
 264                 rxd->read.rsvd1 = 0;
 265                 rxd->read.rsvd2 = 0;
 266 #endif
 267
 268                 rxq->sw_ring[i].mbuf = (void *)mbuf;
 269         }
 270
 271         return 0;
 272 }
 273
 274 static int
 275 ice_dcf_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 276 {
 277         struct ice_dcf_adapter *ad = dev->data->dev_private;
 278         struct iavf_hw *hw = &ad->real_hw.avf;
 279         struct ice_rx_queue *rxq;
 280         int err = 0;
 281
 282         if (rx_queue_id >= dev->data->nb_rx_queues)
 283                 return -EINVAL;
 284
 285         rxq = dev->data->rx_queues[rx_queue_id];
 286
 287         err = alloc_rxq_mbufs(rxq);
 288         if (err) {
 289                 PMD_DRV_LOG(ERR, "Failed to allocate RX queue mbuf");
 290                 return err;
 291         }
 292
 293         rte_wmb();
 294
 295         /* Init the RX tail register. */
 296         IAVF_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
 297         IAVF_WRITE_FLUSH(hw);
 298
 299         /* Ready to switch the queue on */
 300         err = ice_dcf_switch_queue(&ad->real_hw, rx_queue_id, true, true);
 301         if (err) {
 302                 PMD_DRV_LOG(ERR, "Failed to switch RX queue %u on",
 303                             rx_queue_id);
 304                 return err;
 305         }
 306
 307         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
 308
 309         return 0;
 310 }
 311
 312 static inline void
 313 reset_rx_queue(struct ice_rx_queue *rxq)
 314 {
 315         uint16_t len;
 316         uint32_t i;
 317
 318         if (!rxq)
 319                 return;
 320
 321         len = rxq->nb_rx_desc + ICE_RX_MAX_BURST;
 322
 323         for (i = 0; i < len * sizeof(union ice_rx_flex_desc); i++)
 324                 ((volatile char *)rxq->rx_ring)[i] = 0;
 325
 326         memset(&rxq->fake_mbuf, 0x0, sizeof(rxq->fake_mbuf));
 327
 328         for (i = 0; i < ICE_RX_MAX_BURST; i++)
 329                 rxq->sw_ring[rxq->nb_rx_desc + i].mbuf = &rxq->fake_mbuf;
 330
 331         /* for rx bulk */
 332         rxq->rx_nb_avail = 0;
 333         rxq->rx_next_avail = 0;
 334         rxq->rx_free_trigger = (uint16_t)(rxq->rx_free_thresh - 1);
 335
 336         rxq->rx_tail = 0;
 337         rxq->nb_rx_hold = 0;
 338         rxq->pkt_first_seg = NULL;
 339         rxq->pkt_last_seg = NULL;
 340 }
 341
 342 static inline void
 343 reset_tx_queue(struct ice_tx_queue *txq)
 344 {
 345         struct ice_tx_entry *txe;
 346         uint32_t i, size;
 347         uint16_t prev;
 348
 349         if (!txq) {
 350                 PMD_DRV_LOG(DEBUG, "Pointer to txq is NULL");
 351                 return;
 352         }
 353
 354         txe = txq->sw_ring;
 355         size = sizeof(struct ice_tx_desc) * txq->nb_tx_desc;
 356         for (i = 0; i < size; i++)
 357                 ((volatile char *)txq->tx_ring)[i] = 0;
 358
 359         prev = (uint16_t)(txq->nb_tx_desc - 1);
 360         for (i = 0; i < txq->nb_tx_desc; i++) {
 361                 txq->tx_ring[i].cmd_type_offset_bsz =
 362                         rte_cpu_to_le_64(IAVF_TX_DESC_DTYPE_DESC_DONE);
 363                 txe[i].mbuf =  NULL;
 364                 txe[i].last_id = i;
 365                 txe[prev].next_id = i;
 366                 prev = i;
 367         }
 368
 369         txq->tx_tail = 0;
 370         txq->nb_tx_used = 0;
 371
 372         txq->last_desc_cleaned = txq->nb_tx_desc - 1;
 373         txq->nb_tx_free = txq->nb_tx_desc - 1;
 374
 375         txq->tx_next_dd = txq->tx_rs_thresh - 1;
 376         txq->tx_next_rs = txq->tx_rs_thresh - 1;
 377 }
 378
 379 static int
 380 ice_dcf_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 381 {
 382         struct ice_dcf_adapter *ad = dev->data->dev_private;
 383         struct ice_dcf_hw *hw = &ad->real_hw;
 384         struct ice_rx_queue *rxq;
 385         int err;
 386
 387         if (rx_queue_id >= dev->data->nb_rx_queues)
 388                 return -EINVAL;
 389
 390         err = ice_dcf_switch_queue(hw, rx_queue_id, true, false);
 391         if (err) {
 392                 PMD_DRV_LOG(ERR, "Failed to switch RX queue %u off",
 393                             rx_queue_id);
 394                 return err;
 395         }
 396
 397         rxq = dev->data->rx_queues[rx_queue_id];
 398         rxq->rx_rel_mbufs(rxq);
 399         reset_rx_queue(rxq);
 400         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
 401
 402         return 0;
 403 }
 404
 405 static int
 406 ice_dcf_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
 407 {
 408         struct ice_dcf_adapter *ad = dev->data->dev_private;
 409         struct iavf_hw *hw = &ad->real_hw.avf;
 410         struct ice_tx_queue *txq;
 411         int err = 0;
 412
 413         if (tx_queue_id >= dev->data->nb_tx_queues)
 414                 return -EINVAL;
 415
 416         txq = dev->data->tx_queues[tx_queue_id];
 417
 418         /* Init the RX tail register. */
 419         txq->qtx_tail = hw->hw_addr + IAVF_QTX_TAIL1(tx_queue_id);
 420         IAVF_PCI_REG_WRITE(txq->qtx_tail, 0);
 421         IAVF_WRITE_FLUSH(hw);
 422
 423         /* Ready to switch the queue on */
 424         err = ice_dcf_switch_queue(&ad->real_hw, tx_queue_id, false, true);
 425
 426         if (err) {
 427                 PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on",
 428                             tx_queue_id);
 429                 return err;
 430         }
 431
 432         dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
 433
 434         return 0;
 435 }
 436
 437 static int
 438 ice_dcf_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
 439 {
 440         struct ice_dcf_adapter *ad = dev->data->dev_private;
 441         struct ice_dcf_hw *hw = &ad->real_hw;
 442         struct ice_tx_queue *txq;
 443         int err;
 444
 445         if (tx_queue_id >= dev->data->nb_tx_queues)
 446                 return -EINVAL;
 447
 448         err = ice_dcf_switch_queue(hw, tx_queue_id, false, false);
 449         if (err) {
 450                 PMD_DRV_LOG(ERR, "Failed to switch TX queue %u off",
 451                             tx_queue_id);
 452                 return err;
 453         }
 454
 455         txq = dev->data->tx_queues[tx_queue_id];
 456         txq->tx_rel_mbufs(txq);
 457         reset_tx_queue(txq);
 458         dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
 459
 460         return 0;
 461 }
 462
 463 static int
 464 ice_dcf_start_queues(struct rte_eth_dev *dev)
 465 {
 466         struct ice_rx_queue *rxq;
 467         struct ice_tx_queue *txq;
 468         int nb_rxq = 0;
 469         int nb_txq, i;
 470
 471         for (nb_txq = 0; nb_txq < dev->data->nb_tx_queues; nb_txq++) {
 472                 txq = dev->data->tx_queues[nb_txq];
 473                 if (txq->tx_deferred_start)
 474                         continue;
 475                 if (ice_dcf_tx_queue_start(dev, nb_txq) != 0) {
 476                         PMD_DRV_LOG(ERR, "Fail to start queue %u", nb_txq);
 477                         goto tx_err;
 478                 }
 479         }
 480
 481         for (nb_rxq = 0; nb_rxq < dev->data->nb_rx_queues; nb_rxq++) {
 482                 rxq = dev->data->rx_queues[nb_rxq];
 483                 if (rxq->rx_deferred_start)
 484                         continue;
 485                 if (ice_dcf_rx_queue_start(dev, nb_rxq) != 0) {
 486                         PMD_DRV_LOG(ERR, "Fail to start queue %u", nb_rxq);
 487                         goto rx_err;
 488                 }
 489         }
 490
 491         return 0;
 492
 493         /* stop the started queues if failed to start all queues */
 494 rx_err:
 495         for (i = 0; i < nb_rxq; i++)
 496                 ice_dcf_rx_queue_stop(dev, i);
 497 tx_err:
 498         for (i = 0; i < nb_txq; i++)
 499                 ice_dcf_tx_queue_stop(dev, i);
 500
 501         return -1;
 502 }
 503
 504 static int
 505 ice_dcf_dev_start(struct rte_eth_dev *dev)
 506 {
 507         struct ice_dcf_adapter *dcf_ad = dev->data->dev_private;
 508         struct rte_intr_handle *intr_handle = dev->intr_handle;
 509         struct ice_adapter *ad = &dcf_ad->parent;
 510         struct ice_dcf_hw *hw = &dcf_ad->real_hw;
 511         int ret;
 512
 513         ad->pf.adapter_stopped = 0;
 514
 515         hw->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
 516                                       dev->data->nb_tx_queues);
 517
 518         ret = ice_dcf_init_rx_queues(dev);
 519         if (ret) {
 520                 PMD_DRV_LOG(ERR, "Fail to init queues");
 521                 return ret;
 522         }
 523
 524         if (hw->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) {
 525                 ret = ice_dcf_init_rss(hw);
 526                 if (ret) {
 527                         PMD_DRV_LOG(ERR, "Failed to configure RSS");
 528                         return ret;
 529                 }
 530         }
 531
 532         ret = ice_dcf_configure_queues(hw);
 533         if (ret) {
 534                 PMD_DRV_LOG(ERR, "Fail to config queues");
 535                 return ret;
 536         }
 537
 538         ret = ice_dcf_config_rx_queues_irqs(dev, intr_handle);
 539         if (ret) {
 540                 PMD_DRV_LOG(ERR, "Fail to config rx queues' irqs");
 541                 return ret;
 542         }
 543
 544         if (dev->data->dev_conf.intr_conf.rxq != 0) {
 545                 rte_intr_disable(intr_handle);
 546                 rte_intr_enable(intr_handle);
 547         }
 548
 549         ret = ice_dcf_start_queues(dev);
 550         if (ret) {
 551                 PMD_DRV_LOG(ERR, "Failed to enable queues");
 552                 return ret;
 553         }
 554
 555         ret = ice_dcf_add_del_all_mac_addr(hw, true);
 556         if (ret) {
 557                 PMD_DRV_LOG(ERR, "Failed to add mac addr");
 558                 return ret;
 559         }
 560
 561         dev->data->dev_link.link_status = ETH_LINK_UP;
 562
 563         return 0;
 564 }
 565
 566 static void
 567 ice_dcf_stop_queues(struct rte_eth_dev *dev)
 568 {
 569         struct ice_dcf_adapter *ad = dev->data->dev_private;
 570         struct ice_dcf_hw *hw = &ad->real_hw;
 571         struct ice_rx_queue *rxq;
 572         struct ice_tx_queue *txq;
 573         int ret, i;
 574
 575         /* Stop All queues */
 576         ret = ice_dcf_disable_queues(hw);
 577         if (ret)
 578                 PMD_DRV_LOG(WARNING, "Fail to stop queues");
 579
 580         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 581                 txq = dev->data->tx_queues[i];
 582                 if (!txq)
 583                         continue;
 584                 txq->tx_rel_mbufs(txq);
 585                 reset_tx_queue(txq);
 586                 dev->data->tx_queue_state[i] = RTE_ETH_QUEUE_STATE_STOPPED;
 587         }
 588         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 589                 rxq = dev->data->rx_queues[i];
 590                 if (!rxq)
 591                         continue;
 592                 rxq->rx_rel_mbufs(rxq);
 593                 reset_rx_queue(rxq);
 594                 dev->data->rx_queue_state[i] = RTE_ETH_QUEUE_STATE_STOPPED;
 595         }
 596 }
 597
 598 static int
 599 ice_dcf_dev_stop(struct rte_eth_dev *dev)
 600 {
 601         struct ice_dcf_adapter *dcf_ad = dev->data->dev_private;
 602         struct rte_intr_handle *intr_handle = dev->intr_handle;
 603         struct ice_adapter *ad = &dcf_ad->parent;
 604
 605         if (ad->pf.adapter_stopped == 1) {
 606                 PMD_DRV_LOG(DEBUG, "Port is already stopped");
 607                 return 0;
 608         }
 609
 610         /* Stop the VF representors for this device */
 611         ice_dcf_vf_repr_stop_all(dcf_ad);
 612
 613         ice_dcf_stop_queues(dev);
 614
 615         rte_intr_efd_disable(intr_handle);
 616         if (intr_handle->intr_vec) {
 617                 rte_free(intr_handle->intr_vec);
 618                 intr_handle->intr_vec = NULL;
 619         }
 620
 621         ice_dcf_add_del_all_mac_addr(&dcf_ad->real_hw, false);
 622         dev->data->dev_link.link_status = ETH_LINK_DOWN;
 623         ad->pf.adapter_stopped = 1;
 624
 625         return 0;
 626 }
 627
 628 static int
 629 ice_dcf_dev_configure(struct rte_eth_dev *dev)
 630 {
 631         struct ice_dcf_adapter *dcf_ad = dev->data->dev_private;
 632         struct ice_adapter *ad = &dcf_ad->parent;
 633
 634         ad->rx_bulk_alloc_allowed = true;
 635         ad->tx_simple_allowed = true;
 636
 637         if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)
 638                 dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH;
 639
 640         return 0;
 641 }
 642
 643 static int
 644 ice_dcf_dev_info_get(struct rte_eth_dev *dev,
 645                      struct rte_eth_dev_info *dev_info)
 646 {
 647         struct ice_dcf_adapter *adapter = dev->data->dev_private;
 648         struct ice_dcf_hw *hw = &adapter->real_hw;
 649
 650         dev_info->max_mac_addrs = 1;
 651         dev_info->max_rx_queues = hw->vsi_res->num_queue_pairs;
 652         dev_info->max_tx_queues = hw->vsi_res->num_queue_pairs;
 653         dev_info->min_rx_bufsize = ICE_BUF_SIZE_MIN;
 654         dev_info->max_rx_pktlen = ICE_FRAME_SIZE_MAX;
 655         dev_info->hash_key_size = hw->vf_res->rss_key_size;
 656         dev_info->reta_size = hw->vf_res->rss_lut_size;
 657         dev_info->flow_type_rss_offloads = ICE_RSS_OFFLOAD_ALL;
 658
 659         dev_info->rx_offload_capa =
 660                 DEV_RX_OFFLOAD_VLAN_STRIP |
 661                 DEV_RX_OFFLOAD_IPV4_CKSUM |
 662                 DEV_RX_OFFLOAD_UDP_CKSUM |
 663                 DEV_RX_OFFLOAD_TCP_CKSUM |
 664                 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
 665                 DEV_RX_OFFLOAD_SCATTER |
 666                 DEV_RX_OFFLOAD_JUMBO_FRAME |
 667                 DEV_RX_OFFLOAD_VLAN_FILTER |
 668                 DEV_RX_OFFLOAD_RSS_HASH;
 669         dev_info->tx_offload_capa =
 670                 DEV_TX_OFFLOAD_VLAN_INSERT |
 671                 DEV_TX_OFFLOAD_IPV4_CKSUM |
 672                 DEV_TX_OFFLOAD_UDP_CKSUM |
 673                 DEV_TX_OFFLOAD_TCP_CKSUM |
 674                 DEV_TX_OFFLOAD_SCTP_CKSUM |
 675                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
 676                 DEV_TX_OFFLOAD_TCP_TSO |
 677                 DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
 678                 DEV_TX_OFFLOAD_GRE_TNL_TSO |
 679                 DEV_TX_OFFLOAD_IPIP_TNL_TSO |
 680                 DEV_TX_OFFLOAD_GENEVE_TNL_TSO |
 681                 DEV_TX_OFFLOAD_MULTI_SEGS;
 682
 683         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 684                 .rx_thresh = {
 685                         .pthresh = ICE_DEFAULT_RX_PTHRESH,
 686                         .hthresh = ICE_DEFAULT_RX_HTHRESH,
 687                         .wthresh = ICE_DEFAULT_RX_WTHRESH,
 688                 },
 689                 .rx_free_thresh = ICE_DEFAULT_RX_FREE_THRESH,
 690                 .rx_drop_en = 0,
 691                 .offloads = 0,
 692         };
 693
 694         dev_info->default_txconf = (struct rte_eth_txconf) {
 695                 .tx_thresh = {
 696                         .pthresh = ICE_DEFAULT_TX_PTHRESH,
 697                         .hthresh = ICE_DEFAULT_TX_HTHRESH,
 698                         .wthresh = ICE_DEFAULT_TX_WTHRESH,
 699                 },
 700                 .tx_free_thresh = ICE_DEFAULT_TX_FREE_THRESH,
 701                 .tx_rs_thresh = ICE_DEFAULT_TX_RSBIT_THRESH,
 702                 .offloads = 0,
 703         };
 704
 705         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
 706                 .nb_max = ICE_MAX_RING_DESC,
 707                 .nb_min = ICE_MIN_RING_DESC,
 708                 .nb_align = ICE_ALIGN_RING_DESC,
 709         };
 710
 711         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
 712                 .nb_max = ICE_MAX_RING_DESC,
 713                 .nb_min = ICE_MIN_RING_DESC,
 714                 .nb_align = ICE_ALIGN_RING_DESC,
 715         };
 716
 717         return 0;
 718 }
 719
 720 static int
 721 ice_dcf_dev_promiscuous_enable(__rte_unused struct rte_eth_dev *dev)
 722 {
 723         return 0;
 724 }
 725
 726 static int
 727 ice_dcf_dev_promiscuous_disable(__rte_unused struct rte_eth_dev *dev)
 728 {
 729         return 0;
 730 }
 731
 732 static int
 733 ice_dcf_dev_allmulticast_enable(__rte_unused struct rte_eth_dev *dev)
 734 {
 735         return 0;
 736 }
 737
 738 static int
 739 ice_dcf_dev_allmulticast_disable(__rte_unused struct rte_eth_dev *dev)
 740 {
 741         return 0;
 742 }
 743
 744 static int
 745 ice_dcf_dev_flow_ops_get(struct rte_eth_dev *dev,
 746                          const struct rte_flow_ops **ops)
 747 {
 748         if (!dev)
 749                 return -EINVAL;
 750
 751         *ops = &ice_flow_ops;
 752         return 0;
 753 }
 754
 755 #define ICE_DCF_32_BIT_WIDTH (CHAR_BIT * 4)
 756 #define ICE_DCF_48_BIT_WIDTH (CHAR_BIT * 6)
 757 #define ICE_DCF_48_BIT_MASK  RTE_LEN2MASK(ICE_DCF_48_BIT_WIDTH, uint64_t)
 758
 759 static void
 760 ice_dcf_stat_update_48(uint64_t *offset, uint64_t *stat)
 761 {
 762         if (*stat >= *offset)
 763                 *stat = *stat - *offset;
 764         else
 765                 *stat = (uint64_t)((*stat +
 766                         ((uint64_t)1 << ICE_DCF_48_BIT_WIDTH)) - *offset);
 767
 768         *stat &= ICE_DCF_48_BIT_MASK;
 769 }
 770
 771 static void
 772 ice_dcf_stat_update_32(uint64_t *offset, uint64_t *stat)
 773 {
 774         if (*stat >= *offset)
 775                 *stat = (uint64_t)(*stat - *offset);
 776         else
 777                 *stat = (uint64_t)((*stat +
 778                         ((uint64_t)1 << ICE_DCF_32_BIT_WIDTH)) - *offset);
 779 }
 780
 781 static void
 782 ice_dcf_update_stats(struct virtchnl_eth_stats *oes,
 783                      struct virtchnl_eth_stats *nes)
 784 {
 785         ice_dcf_stat_update_48(&oes->rx_bytes, &nes->rx_bytes);
 786         ice_dcf_stat_update_48(&oes->rx_unicast, &nes->rx_unicast);
 787         ice_dcf_stat_update_48(&oes->rx_multicast, &nes->rx_multicast);
 788         ice_dcf_stat_update_48(&oes->rx_broadcast, &nes->rx_broadcast);
 789         ice_dcf_stat_update_32(&oes->rx_discards, &nes->rx_discards);
 790         ice_dcf_stat_update_48(&oes->tx_bytes, &nes->tx_bytes);
 791         ice_dcf_stat_update_48(&oes->tx_unicast, &nes->tx_unicast);
 792         ice_dcf_stat_update_48(&oes->tx_multicast, &nes->tx_multicast);
 793         ice_dcf_stat_update_48(&oes->tx_broadcast, &nes->tx_broadcast);
 794         ice_dcf_stat_update_32(&oes->tx_errors, &nes->tx_errors);
 795         ice_dcf_stat_update_32(&oes->tx_discards, &nes->tx_discards);
 796 }
 797
 798
 799 static int
 800 ice_dcf_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
 801 {
 802         struct ice_dcf_adapter *ad = dev->data->dev_private;
 803         struct ice_dcf_hw *hw = &ad->real_hw;
 804         struct virtchnl_eth_stats pstats;
 805         int ret;
 806
 807         ret = ice_dcf_query_stats(hw, &pstats);
 808         if (ret == 0) {
 809                 ice_dcf_update_stats(&hw->eth_stats_offset, &pstats);
 810                 stats->ipackets = pstats.rx_unicast + pstats.rx_multicast +
 811                                 pstats.rx_broadcast - pstats.rx_discards;
 812                 stats->opackets = pstats.tx_broadcast + pstats.tx_multicast +
 813                                                 pstats.tx_unicast;
 814                 stats->imissed = pstats.rx_discards;
 815                 stats->oerrors = pstats.tx_errors + pstats.tx_discards;
 816                 stats->ibytes = pstats.rx_bytes;
 817                 stats->ibytes -= stats->ipackets * RTE_ETHER_CRC_LEN;
 818                 stats->obytes = pstats.tx_bytes;
 819         } else {
 820                 PMD_DRV_LOG(ERR, "Get statistics failed");
 821         }
 822         return ret;
 823 }
 824
 825 static int
 826 ice_dcf_stats_reset(struct rte_eth_dev *dev)
 827 {
 828         struct ice_dcf_adapter *ad = dev->data->dev_private;
 829         struct ice_dcf_hw *hw = &ad->real_hw;
 830         struct virtchnl_eth_stats pstats;
 831         int ret;
 832
 833         /* read stat values to clear hardware registers */
 834         ret = ice_dcf_query_stats(hw, &pstats);
 835         if (ret != 0)
 836                 return ret;
 837
 838         /* set stats offset base on current values */
 839         hw->eth_stats_offset = pstats;
 840
 841         return 0;
 842 }
 843
 844 static void
 845 ice_dcf_free_repr_info(struct ice_dcf_adapter *dcf_adapter)
 846 {
 847         if (dcf_adapter->repr_infos) {
 848                 rte_free(dcf_adapter->repr_infos);
 849                 dcf_adapter->repr_infos = NULL;
 850         }
 851 }
 852
 853 static int
 854 ice_dcf_init_repr_info(struct ice_dcf_adapter *dcf_adapter)
 855 {
 856         dcf_adapter->repr_infos =
 857                         rte_calloc("ice_dcf_rep_info",
 858                                    dcf_adapter->real_hw.num_vfs,
 859                                    sizeof(dcf_adapter->repr_infos[0]), 0);
 860         if (!dcf_adapter->repr_infos) {
 861                 PMD_DRV_LOG(ERR, "Failed to alloc memory for VF representors\n");
 862                 return -ENOMEM;
 863         }
 864
 865         return 0;
 866 }
 867
 868 static int
 869 ice_dcf_dev_close(struct rte_eth_dev *dev)
 870 {
 871         struct ice_dcf_adapter *adapter = dev->data->dev_private;
 872
 873         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 874                 return 0;
 875
 876         ice_dcf_free_repr_info(adapter);
 877         ice_dcf_uninit_parent_adapter(dev);
 878         ice_dcf_uninit_hw(dev, &adapter->real_hw);
 879
 880         return 0;
 881 }
 882
 883 static int
 884 ice_dcf_link_update(__rte_unused struct rte_eth_dev *dev,
 885                     __rte_unused int wait_to_complete)
 886 {
 887         return 0;
 888 }
 889
 890 /* Add UDP tunneling port */
 891 static int
 892 ice_dcf_dev_udp_tunnel_port_add(struct rte_eth_dev *dev,
 893                                 struct rte_eth_udp_tunnel *udp_tunnel)
 894 {
 895         struct ice_dcf_adapter *adapter = dev->data->dev_private;
 896         struct ice_adapter *parent_adapter = &adapter->parent;
 897         struct ice_hw *parent_hw = &parent_adapter->hw;
 898         int ret = 0;
 899
 900         if (!udp_tunnel)
 901                 return -EINVAL;
 902
 903         switch (udp_tunnel->prot_type) {
 904         case RTE_TUNNEL_TYPE_VXLAN:
 905                 ret = ice_create_tunnel(parent_hw, TNL_VXLAN,
 906                                         udp_tunnel->udp_port);
 907                 break;
 908         case RTE_TUNNEL_TYPE_ECPRI:
 909                 ret = ice_create_tunnel(parent_hw, TNL_ECPRI,
 910                                         udp_tunnel->udp_port);
 911                 break;
 912         default:
 913                 PMD_DRV_LOG(ERR, "Invalid tunnel type");
 914                 ret = -EINVAL;
 915                 break;
 916         }
 917
 918         return ret;
 919 }
 920
 921 /* Delete UDP tunneling port */
 922 static int
 923 ice_dcf_dev_udp_tunnel_port_del(struct rte_eth_dev *dev,
 924                                 struct rte_eth_udp_tunnel *udp_tunnel)
 925 {
 926         struct ice_dcf_adapter *adapter = dev->data->dev_private;
 927         struct ice_adapter *parent_adapter = &adapter->parent;
 928         struct ice_hw *parent_hw = &parent_adapter->hw;
 929         int ret = 0;
 930
 931         if (!udp_tunnel)
 932                 return -EINVAL;
 933
 934         switch (udp_tunnel->prot_type) {
 935         case RTE_TUNNEL_TYPE_VXLAN:
 936         case RTE_TUNNEL_TYPE_ECPRI:
 937                 ret = ice_destroy_tunnel(parent_hw, udp_tunnel->udp_port, 0);
 938                 break;
 939         default:
 940                 PMD_DRV_LOG(ERR, "Invalid tunnel type");
 941                 ret = -EINVAL;
 942                 break;
 943         }
 944
 945         return ret;
 946 }
 947
 948 static const struct eth_dev_ops ice_dcf_eth_dev_ops = {
 949         .dev_start               = ice_dcf_dev_start,
 950         .dev_stop                = ice_dcf_dev_stop,
 951         .dev_close               = ice_dcf_dev_close,
 952         .dev_configure           = ice_dcf_dev_configure,
 953         .dev_infos_get           = ice_dcf_dev_info_get,
 954         .rx_queue_setup          = ice_rx_queue_setup,
 955         .tx_queue_setup          = ice_tx_queue_setup,
 956         .rx_queue_release        = ice_rx_queue_release,
 957         .tx_queue_release        = ice_tx_queue_release,
 958         .rx_queue_start          = ice_dcf_rx_queue_start,
 959         .tx_queue_start          = ice_dcf_tx_queue_start,
 960         .rx_queue_stop           = ice_dcf_rx_queue_stop,
 961         .tx_queue_stop           = ice_dcf_tx_queue_stop,
 962         .link_update             = ice_dcf_link_update,
 963         .stats_get               = ice_dcf_stats_get,
 964         .stats_reset             = ice_dcf_stats_reset,
 965         .promiscuous_enable      = ice_dcf_dev_promiscuous_enable,
 966         .promiscuous_disable     = ice_dcf_dev_promiscuous_disable,
 967         .allmulticast_enable     = ice_dcf_dev_allmulticast_enable,
 968         .allmulticast_disable    = ice_dcf_dev_allmulticast_disable,
 969         .flow_ops_get            = ice_dcf_dev_flow_ops_get,
 970         .udp_tunnel_port_add     = ice_dcf_dev_udp_tunnel_port_add,
 971         .udp_tunnel_port_del     = ice_dcf_dev_udp_tunnel_port_del,
 972 };
 973
 974 static int
 975 ice_dcf_dev_init(struct rte_eth_dev *eth_dev)
 976 {
 977         struct ice_dcf_adapter *adapter = eth_dev->data->dev_private;
 978
 979         eth_dev->dev_ops = &ice_dcf_eth_dev_ops;
 980         eth_dev->rx_pkt_burst = ice_dcf_recv_pkts;
 981         eth_dev->tx_pkt_burst = ice_dcf_xmit_pkts;
 982
 983         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 984                 return 0;
 985
 986         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
 987
 988         adapter->real_hw.vc_event_msg_cb = ice_dcf_handle_pf_event_msg;
 989         if (ice_dcf_init_hw(eth_dev, &adapter->real_hw) != 0) {
 990                 PMD_INIT_LOG(ERR, "Failed to init DCF hardware");
 991                 return -1;
 992         }
 993
 994         if (ice_dcf_init_parent_adapter(eth_dev) != 0) {
 995                 PMD_INIT_LOG(ERR, "Failed to init DCF parent adapter");
 996                 ice_dcf_uninit_hw(eth_dev, &adapter->real_hw);
 997                 return -1;
 998         }
 999
1000         return 0;
1001 }
1002
1003 static int
1004 ice_dcf_dev_uninit(struct rte_eth_dev *eth_dev)
1005 {
1006         ice_dcf_dev_close(eth_dev);
1007
1008         return 0;
1009 }
1010
1011 static int
1012 ice_dcf_cap_check_handler(__rte_unused const char *key,
1013                           const char *value, __rte_unused void *opaque)
1014 {
1015         if (strcmp(value, "dcf"))
1016                 return -1;
1017
1018         return 0;
1019 }
1020
1021 static int
1022 ice_dcf_cap_selected(struct rte_devargs *devargs)
1023 {
1024         struct rte_kvargs *kvlist;
1025         const char *key = "cap";
1026         int ret = 0;
1027
1028         if (devargs == NULL)
1029                 return 0;
1030
1031         kvlist = rte_kvargs_parse(devargs->args, NULL);
1032         if (kvlist == NULL)
1033                 return 0;
1034
1035         if (!rte_kvargs_count(kvlist, key))
1036                 goto exit;
1037
1038         /* dcf capability selected when there's a key-value pair: cap=dcf */
1039         if (rte_kvargs_process(kvlist, key,
1040                                ice_dcf_cap_check_handler, NULL) < 0)
1041                 goto exit;
1042
1043         ret = 1;
1044
1045 exit:
1046         rte_kvargs_free(kvlist);
1047         return ret;
1048 }
1049
1050 static int
1051 eth_ice_dcf_pci_probe(__rte_unused struct rte_pci_driver *pci_drv,
1052                       struct rte_pci_device *pci_dev)
1053 {
1054         struct rte_eth_devargs eth_da = { .nb_representor_ports = 0 };
1055         struct ice_dcf_vf_repr_param repr_param;
1056         char repr_name[RTE_ETH_NAME_MAX_LEN];
1057         struct ice_dcf_adapter *dcf_adapter;
1058         struct rte_eth_dev *dcf_ethdev;
1059         uint16_t dcf_vsi_id;
1060         int i, ret;
1061
1062         if (!ice_dcf_cap_selected(pci_dev->device.devargs))
1063                 return 1;
1064
1065         ret = rte_eth_devargs_parse(pci_dev->device.devargs->args, &eth_da);
1066         if (ret)
1067                 return ret;
1068
1069         ret = rte_eth_dev_pci_generic_probe(pci_dev,
1070                                             sizeof(struct ice_dcf_adapter),
1071                                             ice_dcf_dev_init);
1072         if (ret || !eth_da.nb_representor_ports)
1073                 return ret;
1074         if (eth_da.type != RTE_ETH_REPRESENTOR_VF)
1075                 return -ENOTSUP;
1076
1077         dcf_ethdev = rte_eth_dev_allocated(pci_dev->device.name);
1078         if (dcf_ethdev == NULL)
1079                 return -ENODEV;
1080
1081         dcf_adapter = dcf_ethdev->data->dev_private;
1082         ret = ice_dcf_init_repr_info(dcf_adapter);
1083         if (ret)
1084                 return ret;
1085
1086         if (eth_da.nb_representor_ports > dcf_adapter->real_hw.num_vfs ||
1087             eth_da.nb_representor_ports >= RTE_MAX_ETHPORTS) {
1088                 PMD_DRV_LOG(ERR, "the number of port representors is too large: %u",
1089                             eth_da.nb_representor_ports);
1090                 ice_dcf_free_repr_info(dcf_adapter);
1091                 return -EINVAL;
1092         }
1093
1094         dcf_vsi_id = dcf_adapter->real_hw.vsi_id | VIRTCHNL_DCF_VF_VSI_VALID;
1095
1096         repr_param.dcf_eth_dev = dcf_ethdev;
1097         repr_param.switch_domain_id = 0;
1098
1099         for (i = 0; i < eth_da.nb_representor_ports; i++) {
1100                 uint16_t vf_id = eth_da.representor_ports[i];
1101                 struct rte_eth_dev *vf_rep_eth_dev;
1102
1103                 if (vf_id >= dcf_adapter->real_hw.num_vfs) {
1104                         PMD_DRV_LOG(ERR, "VF ID %u is out of range (0 ~ %u)",
1105                                     vf_id, dcf_adapter->real_hw.num_vfs - 1);
1106                         ret = -EINVAL;
1107                         break;
1108                 }
1109
1110                 if (dcf_adapter->real_hw.vf_vsi_map[vf_id] == dcf_vsi_id) {
1111                         PMD_DRV_LOG(ERR, "VF ID %u is DCF's ID.\n", vf_id);
1112                         ret = -EINVAL;
1113                         break;
1114                 }
1115
1116                 repr_param.vf_id = vf_id;
1117                 snprintf(repr_name, sizeof(repr_name), "net_%s_representor_%u",
1118                          pci_dev->device.name, vf_id);
1119                 ret = rte_eth_dev_create(&pci_dev->device, repr_name,
1120                                          sizeof(struct ice_dcf_vf_repr),
1121                                          NULL, NULL, ice_dcf_vf_repr_init,
1122                                          &repr_param);
1123                 if (ret) {
1124                         PMD_DRV_LOG(ERR, "failed to create DCF VF representor %s",
1125                                     repr_name);
1126                         break;
1127                 }
1128
1129                 vf_rep_eth_dev = rte_eth_dev_allocated(repr_name);
1130                 if (!vf_rep_eth_dev) {
1131                         PMD_DRV_LOG(ERR,
1132                                     "Failed to find the ethdev for DCF VF representor: %s",
1133                                     repr_name);
1134                         ret = -ENODEV;
1135                         break;
1136                 }
1137
1138                 dcf_adapter->repr_infos[vf_id].vf_rep_eth_dev = vf_rep_eth_dev;
1139                 dcf_adapter->num_reprs++;
1140         }
1141
1142         return ret;
1143 }
1144
1145 static int
1146 eth_ice_dcf_pci_remove(struct rte_pci_device *pci_dev)
1147 {
1148         struct rte_eth_dev *eth_dev;
1149
1150         eth_dev = rte_eth_dev_allocated(pci_dev->device.name);
1151         if (!eth_dev)
1152                 return 0;
1153
1154         if (eth_dev->data->dev_flags & RTE_ETH_DEV_REPRESENTOR)
1155                 return rte_eth_dev_pci_generic_remove(pci_dev,
1156                                                       ice_dcf_vf_repr_uninit);
1157         else
1158                 return rte_eth_dev_pci_generic_remove(pci_dev,
1159                                                       ice_dcf_dev_uninit);
1160 }
1161
1162 static const struct rte_pci_id pci_id_ice_dcf_map[] = {
1163         { RTE_PCI_DEVICE(IAVF_INTEL_VENDOR_ID, IAVF_DEV_ID_ADAPTIVE_VF) },
1164         { .vendor_id = 0, /* sentinel */ },
1165 };
1166
1167 static struct rte_pci_driver rte_ice_dcf_pmd = {
1168         .id_table = pci_id_ice_dcf_map,
1169         .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
1170         .probe = eth_ice_dcf_pci_probe,
1171         .remove = eth_ice_dcf_pci_remove,
1172 };
1173
1174 RTE_PMD_REGISTER_PCI(net_ice_dcf, rte_ice_dcf_pmd);
1175 RTE_PMD_REGISTER_PCI_TABLE(net_ice_dcf, pci_id_ice_dcf_map);
1176 RTE_PMD_REGISTER_KMOD_DEP(net_ice_dcf, "* igb_uio | vfio-pci");
1177 RTE_PMD_REGISTER_PARAM_STRING(net_ice_dcf, "cap=dcf");