net/ice: fix flow director rule after device stop
[dpdk.git] / drivers / net / ice / ice_fdir_filter.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2019 Intel Corporation
3  */
4
5 #include <stdio.h>
6 #include <rte_flow.h>
7 #include <rte_hash.h>
8 #include <rte_hash_crc.h>
9 #include "base/ice_fdir.h"
10 #include "base/ice_flow.h"
11 #include "base/ice_type.h"
12 #include "ice_ethdev.h"
13 #include "ice_rxtx.h"
14 #include "ice_generic_flow.h"
15
16 #define ICE_FDIR_IPV6_TC_OFFSET         20
17 #define ICE_IPV6_TC_MASK                (0xFF << ICE_FDIR_IPV6_TC_OFFSET)
18
19 #define ICE_FDIR_MAX_QREGION_SIZE       128
20
21 #define ICE_FDIR_INSET_ETH_IPV4 (\
22         ICE_INSET_DMAC | \
23         ICE_INSET_IPV4_SRC | ICE_INSET_IPV4_DST | ICE_INSET_IPV4_TOS | \
24         ICE_INSET_IPV4_TTL | ICE_INSET_IPV4_PROTO)
25
26 #define ICE_FDIR_INSET_ETH_IPV4_UDP (\
27         ICE_FDIR_INSET_ETH_IPV4 | \
28         ICE_INSET_UDP_SRC_PORT | ICE_INSET_UDP_DST_PORT)
29
30 #define ICE_FDIR_INSET_ETH_IPV4_TCP (\
31         ICE_FDIR_INSET_ETH_IPV4 | \
32         ICE_INSET_TCP_SRC_PORT | ICE_INSET_TCP_DST_PORT)
33
34 #define ICE_FDIR_INSET_ETH_IPV4_SCTP (\
35         ICE_FDIR_INSET_ETH_IPV4 | \
36         ICE_INSET_SCTP_SRC_PORT | ICE_INSET_SCTP_DST_PORT)
37
38 #define ICE_FDIR_INSET_ETH_IPV6 (\
39         ICE_INSET_DMAC | \
40         ICE_INSET_IPV6_SRC | ICE_INSET_IPV6_DST | ICE_INSET_IPV6_TC | \
41         ICE_INSET_IPV6_HOP_LIMIT | ICE_INSET_IPV6_NEXT_HDR)
42
43 #define ICE_FDIR_INSET_ETH_IPV6_UDP (\
44         ICE_FDIR_INSET_ETH_IPV6 | \
45         ICE_INSET_UDP_SRC_PORT | ICE_INSET_UDP_DST_PORT)
46
47 #define ICE_FDIR_INSET_ETH_IPV6_TCP (\
48         ICE_FDIR_INSET_ETH_IPV6 | \
49         ICE_INSET_TCP_SRC_PORT | ICE_INSET_TCP_DST_PORT)
50
51 #define ICE_FDIR_INSET_ETH_IPV6_SCTP (\
52         ICE_FDIR_INSET_ETH_IPV6 | \
53         ICE_INSET_SCTP_SRC_PORT | ICE_INSET_SCTP_DST_PORT)
54
55 #define ICE_FDIR_INSET_VXLAN_IPV4 (\
56         ICE_INSET_TUN_IPV4_SRC | ICE_INSET_TUN_IPV4_DST)
57
58 #define ICE_FDIR_INSET_VXLAN_IPV4_TCP (\
59         ICE_FDIR_INSET_VXLAN_IPV4 | \
60         ICE_INSET_TUN_TCP_SRC_PORT | ICE_INSET_TUN_TCP_DST_PORT)
61
62 #define ICE_FDIR_INSET_VXLAN_IPV4_UDP (\
63         ICE_FDIR_INSET_VXLAN_IPV4 | \
64         ICE_INSET_TUN_UDP_SRC_PORT | ICE_INSET_TUN_UDP_DST_PORT)
65
66 #define ICE_FDIR_INSET_VXLAN_IPV4_SCTP (\
67         ICE_FDIR_INSET_VXLAN_IPV4 | \
68         ICE_INSET_TUN_SCTP_SRC_PORT | ICE_INSET_TUN_SCTP_DST_PORT)
69
70 #define ICE_FDIR_INSET_GTPU_IPV4 (\
71         ICE_INSET_GTPU_TEID | ICE_INSET_GTPU_QFI)
72
73 static struct ice_pattern_match_item ice_fdir_pattern_os[] = {
74         {pattern_eth_ipv4,             ICE_FDIR_INSET_ETH_IPV4,              ICE_INSET_NONE},
75         {pattern_eth_ipv4_udp,         ICE_FDIR_INSET_ETH_IPV4_UDP,          ICE_INSET_NONE},
76         {pattern_eth_ipv4_tcp,         ICE_FDIR_INSET_ETH_IPV4_TCP,          ICE_INSET_NONE},
77         {pattern_eth_ipv4_sctp,        ICE_FDIR_INSET_ETH_IPV4_SCTP,         ICE_INSET_NONE},
78         {pattern_eth_ipv6,             ICE_FDIR_INSET_ETH_IPV6,              ICE_INSET_NONE},
79         {pattern_eth_ipv6_udp,         ICE_FDIR_INSET_ETH_IPV6_UDP,          ICE_INSET_NONE},
80         {pattern_eth_ipv6_tcp,         ICE_FDIR_INSET_ETH_IPV6_TCP,          ICE_INSET_NONE},
81         {pattern_eth_ipv6_sctp,        ICE_FDIR_INSET_ETH_IPV6_SCTP,         ICE_INSET_NONE},
82         {pattern_eth_ipv4_udp_vxlan_ipv4,
83                                        ICE_FDIR_INSET_VXLAN_IPV4,            ICE_INSET_NONE},
84         {pattern_eth_ipv4_udp_vxlan_ipv4_udp,
85                                        ICE_FDIR_INSET_VXLAN_IPV4_UDP,        ICE_INSET_NONE},
86         {pattern_eth_ipv4_udp_vxlan_ipv4_tcp,
87                                        ICE_FDIR_INSET_VXLAN_IPV4_TCP,        ICE_INSET_NONE},
88         {pattern_eth_ipv4_udp_vxlan_ipv4_sctp,
89                                        ICE_FDIR_INSET_VXLAN_IPV4_SCTP,       ICE_INSET_NONE},
90         {pattern_eth_ipv4_udp_vxlan_eth_ipv4,
91                                        ICE_FDIR_INSET_VXLAN_IPV4,            ICE_INSET_NONE},
92         {pattern_eth_ipv4_udp_vxlan_eth_ipv4_udp,
93                                        ICE_FDIR_INSET_VXLAN_IPV4_UDP,        ICE_INSET_NONE},
94         {pattern_eth_ipv4_udp_vxlan_eth_ipv4_tcp,
95                                        ICE_FDIR_INSET_VXLAN_IPV4_TCP,        ICE_INSET_NONE},
96         {pattern_eth_ipv4_udp_vxlan_eth_ipv4_sctp,
97                                        ICE_FDIR_INSET_VXLAN_IPV4_SCTP,       ICE_INSET_NONE},
98 };
99
100 static struct ice_pattern_match_item ice_fdir_pattern_comms[] = {
101         {pattern_eth_ipv4,             ICE_FDIR_INSET_ETH_IPV4,              ICE_INSET_NONE},
102         {pattern_eth_ipv4_udp,         ICE_FDIR_INSET_ETH_IPV4_UDP,          ICE_INSET_NONE},
103         {pattern_eth_ipv4_tcp,         ICE_FDIR_INSET_ETH_IPV4_TCP,          ICE_INSET_NONE},
104         {pattern_eth_ipv4_sctp,        ICE_FDIR_INSET_ETH_IPV4_SCTP,         ICE_INSET_NONE},
105         {pattern_eth_ipv6,             ICE_FDIR_INSET_ETH_IPV6,              ICE_INSET_NONE},
106         {pattern_eth_ipv6_udp,         ICE_FDIR_INSET_ETH_IPV6_UDP,          ICE_INSET_NONE},
107         {pattern_eth_ipv6_tcp,         ICE_FDIR_INSET_ETH_IPV6_TCP,          ICE_INSET_NONE},
108         {pattern_eth_ipv6_sctp,        ICE_FDIR_INSET_ETH_IPV6_SCTP,         ICE_INSET_NONE},
109         {pattern_eth_ipv4_udp_vxlan_ipv4,
110                                        ICE_FDIR_INSET_VXLAN_IPV4,            ICE_INSET_NONE},
111         {pattern_eth_ipv4_udp_vxlan_ipv4_udp,
112                                        ICE_FDIR_INSET_VXLAN_IPV4_UDP,        ICE_INSET_NONE},
113         {pattern_eth_ipv4_udp_vxlan_ipv4_tcp,
114                                        ICE_FDIR_INSET_VXLAN_IPV4_TCP,        ICE_INSET_NONE},
115         {pattern_eth_ipv4_udp_vxlan_ipv4_sctp,
116                                        ICE_FDIR_INSET_VXLAN_IPV4_SCTP,       ICE_INSET_NONE},
117         {pattern_eth_ipv4_udp_vxlan_eth_ipv4,
118                                        ICE_FDIR_INSET_VXLAN_IPV4,            ICE_INSET_NONE},
119         {pattern_eth_ipv4_udp_vxlan_eth_ipv4_udp,
120                                        ICE_FDIR_INSET_VXLAN_IPV4_UDP,        ICE_INSET_NONE},
121         {pattern_eth_ipv4_udp_vxlan_eth_ipv4_tcp,
122                                        ICE_FDIR_INSET_VXLAN_IPV4_TCP,        ICE_INSET_NONE},
123         {pattern_eth_ipv4_udp_vxlan_eth_ipv4_sctp,
124                                        ICE_FDIR_INSET_VXLAN_IPV4_SCTP,       ICE_INSET_NONE},
125         {pattern_eth_ipv4_gtpu_ipv4,   ICE_FDIR_INSET_GTPU_IPV4,             ICE_INSET_NONE},
126 };
127
128 static struct ice_flow_parser ice_fdir_parser_os;
129 static struct ice_flow_parser ice_fdir_parser_comms;
130
131 static const struct rte_memzone *
132 ice_memzone_reserve(const char *name, uint32_t len, int socket_id)
133 {
134         const struct rte_memzone *mz;
135
136         mz = rte_memzone_lookup(name);
137         if (mz)
138                 return mz;
139
140         return rte_memzone_reserve_aligned(name, len, socket_id,
141                                            RTE_MEMZONE_IOVA_CONTIG,
142                                            ICE_RING_BASE_ALIGN);
143 }
144
145 #define ICE_FDIR_MZ_NAME        "FDIR_MEMZONE"
146
147 static int
148 ice_fdir_prof_alloc(struct ice_hw *hw)
149 {
150         enum ice_fltr_ptype ptype, fltr_ptype;
151
152         if (!hw->fdir_prof) {
153                 hw->fdir_prof = (struct ice_fd_hw_prof **)
154                         ice_malloc(hw, ICE_FLTR_PTYPE_MAX *
155                                    sizeof(*hw->fdir_prof));
156                 if (!hw->fdir_prof)
157                         return -ENOMEM;
158         }
159         for (ptype = ICE_FLTR_PTYPE_NONF_NONE + 1;
160              ptype < ICE_FLTR_PTYPE_MAX;
161              ptype++) {
162                 if (!hw->fdir_prof[ptype]) {
163                         hw->fdir_prof[ptype] = (struct ice_fd_hw_prof *)
164                                 ice_malloc(hw, sizeof(**hw->fdir_prof));
165                         if (!hw->fdir_prof[ptype])
166                                 goto fail_mem;
167                 }
168         }
169         return 0;
170
171 fail_mem:
172         for (fltr_ptype = ICE_FLTR_PTYPE_NONF_NONE + 1;
173              fltr_ptype < ptype;
174              fltr_ptype++) {
175                 rte_free(hw->fdir_prof[fltr_ptype]);
176                 hw->fdir_prof[fltr_ptype] = NULL;
177         }
178
179         rte_free(hw->fdir_prof);
180         hw->fdir_prof = NULL;
181
182         return -ENOMEM;
183 }
184
185 static int
186 ice_fdir_counter_pool_add(__rte_unused struct ice_pf *pf,
187                           struct ice_fdir_counter_pool_container *container,
188                           uint32_t index_start,
189                           uint32_t len)
190 {
191         struct ice_fdir_counter_pool *pool;
192         uint32_t i;
193         int ret = 0;
194
195         pool = rte_zmalloc("ice_fdir_counter_pool",
196                            sizeof(*pool) +
197                            sizeof(struct ice_fdir_counter) * len,
198                            0);
199         if (!pool) {
200                 PMD_INIT_LOG(ERR,
201                              "Failed to allocate memory for fdir counter pool");
202                 return -ENOMEM;
203         }
204
205         TAILQ_INIT(&pool->counter_list);
206         TAILQ_INSERT_TAIL(&container->pool_list, pool, next);
207
208         for (i = 0; i < len; i++) {
209                 struct ice_fdir_counter *counter = &pool->counters[i];
210
211                 counter->hw_index = index_start + i;
212                 TAILQ_INSERT_TAIL(&pool->counter_list, counter, next);
213         }
214
215         if (container->index_free == ICE_FDIR_COUNTER_MAX_POOL_SIZE) {
216                 PMD_INIT_LOG(ERR, "FDIR counter pool is full");
217                 ret = -EINVAL;
218                 goto free_pool;
219         }
220
221         container->pools[container->index_free++] = pool;
222         return 0;
223
224 free_pool:
225         rte_free(pool);
226         return ret;
227 }
228
229 static int
230 ice_fdir_counter_init(struct ice_pf *pf)
231 {
232         struct ice_hw *hw = ICE_PF_TO_HW(pf);
233         struct ice_fdir_info *fdir_info = &pf->fdir;
234         struct ice_fdir_counter_pool_container *container =
235                                 &fdir_info->counter;
236         uint32_t cnt_index, len;
237         int ret;
238
239         TAILQ_INIT(&container->pool_list);
240
241         cnt_index = ICE_FDIR_COUNTER_INDEX(hw->fd_ctr_base);
242         len = ICE_FDIR_COUNTERS_PER_BLOCK;
243
244         ret = ice_fdir_counter_pool_add(pf, container, cnt_index, len);
245         if (ret) {
246                 PMD_INIT_LOG(ERR, "Failed to add fdir pool to container");
247                 return ret;
248         }
249
250         return 0;
251 }
252
253 static int
254 ice_fdir_counter_release(struct ice_pf *pf)
255 {
256         struct ice_fdir_info *fdir_info = &pf->fdir;
257         struct ice_fdir_counter_pool_container *container =
258                                 &fdir_info->counter;
259         uint8_t i;
260
261         for (i = 0; i < container->index_free; i++) {
262                 rte_free(container->pools[i]);
263                 container->pools[i] = NULL;
264         }
265
266         TAILQ_INIT(&container->pool_list);
267         container->index_free = 0;
268
269         return 0;
270 }
271
272 static struct ice_fdir_counter *
273 ice_fdir_counter_shared_search(struct ice_fdir_counter_pool_container
274                                         *container,
275                                uint32_t id)
276 {
277         struct ice_fdir_counter_pool *pool;
278         struct ice_fdir_counter *counter;
279         int i;
280
281         TAILQ_FOREACH(pool, &container->pool_list, next) {
282                 for (i = 0; i < ICE_FDIR_COUNTERS_PER_BLOCK; i++) {
283                         counter = &pool->counters[i];
284
285                         if (counter->shared &&
286                             counter->ref_cnt &&
287                             counter->id == id)
288                                 return counter;
289                 }
290         }
291
292         return NULL;
293 }
294
295 static struct ice_fdir_counter *
296 ice_fdir_counter_alloc(struct ice_pf *pf, uint32_t shared, uint32_t id)
297 {
298         struct ice_hw *hw = ICE_PF_TO_HW(pf);
299         struct ice_fdir_info *fdir_info = &pf->fdir;
300         struct ice_fdir_counter_pool_container *container =
301                                 &fdir_info->counter;
302         struct ice_fdir_counter_pool *pool = NULL;
303         struct ice_fdir_counter *counter_free = NULL;
304
305         if (shared) {
306                 counter_free = ice_fdir_counter_shared_search(container, id);
307                 if (counter_free) {
308                         if (counter_free->ref_cnt + 1 == 0) {
309                                 rte_errno = E2BIG;
310                                 return NULL;
311                         }
312                         counter_free->ref_cnt++;
313                         return counter_free;
314                 }
315         }
316
317         TAILQ_FOREACH(pool, &container->pool_list, next) {
318                 counter_free = TAILQ_FIRST(&pool->counter_list);
319                 if (counter_free)
320                         break;
321                 counter_free = NULL;
322         }
323
324         if (!counter_free) {
325                 PMD_DRV_LOG(ERR, "No free counter found\n");
326                 return NULL;
327         }
328
329         counter_free->shared = shared;
330         counter_free->id = id;
331         counter_free->ref_cnt = 1;
332         counter_free->pool = pool;
333
334         /* reset statistic counter value */
335         ICE_WRITE_REG(hw, GLSTAT_FD_CNT0H(counter_free->hw_index), 0);
336         ICE_WRITE_REG(hw, GLSTAT_FD_CNT0L(counter_free->hw_index), 0);
337
338         TAILQ_REMOVE(&pool->counter_list, counter_free, next);
339         if (TAILQ_EMPTY(&pool->counter_list)) {
340                 TAILQ_REMOVE(&container->pool_list, pool, next);
341                 TAILQ_INSERT_TAIL(&container->pool_list, pool, next);
342         }
343
344         return counter_free;
345 }
346
347 static void
348 ice_fdir_counter_free(__rte_unused struct ice_pf *pf,
349                       struct ice_fdir_counter *counter)
350 {
351         if (!counter)
352                 return;
353
354         if (--counter->ref_cnt == 0) {
355                 struct ice_fdir_counter_pool *pool = counter->pool;
356
357                 TAILQ_INSERT_TAIL(&pool->counter_list, counter, next);
358         }
359 }
360
361 static int
362 ice_fdir_init_filter_list(struct ice_pf *pf)
363 {
364         struct rte_eth_dev *dev = pf->adapter->eth_dev;
365         struct ice_fdir_info *fdir_info = &pf->fdir;
366         char fdir_hash_name[RTE_HASH_NAMESIZE];
367         int ret;
368
369         struct rte_hash_parameters fdir_hash_params = {
370                 .name = fdir_hash_name,
371                 .entries = ICE_MAX_FDIR_FILTER_NUM,
372                 .key_len = sizeof(struct ice_fdir_fltr_pattern),
373                 .hash_func = rte_hash_crc,
374                 .hash_func_init_val = 0,
375                 .socket_id = rte_socket_id(),
376                 .extra_flag = RTE_HASH_EXTRA_FLAGS_EXT_TABLE,
377         };
378
379         /* Initialize hash */
380         snprintf(fdir_hash_name, RTE_HASH_NAMESIZE,
381                  "fdir_%s", dev->device->name);
382         fdir_info->hash_table = rte_hash_create(&fdir_hash_params);
383         if (!fdir_info->hash_table) {
384                 PMD_INIT_LOG(ERR, "Failed to create fdir hash table!");
385                 return -EINVAL;
386         }
387         fdir_info->hash_map = rte_zmalloc("ice_fdir_hash_map",
388                                           sizeof(*fdir_info->hash_map) *
389                                           ICE_MAX_FDIR_FILTER_NUM,
390                                           0);
391         if (!fdir_info->hash_map) {
392                 PMD_INIT_LOG(ERR,
393                              "Failed to allocate memory for fdir hash map!");
394                 ret = -ENOMEM;
395                 goto err_fdir_hash_map_alloc;
396         }
397         return 0;
398
399 err_fdir_hash_map_alloc:
400         rte_hash_free(fdir_info->hash_table);
401
402         return ret;
403 }
404
405 static void
406 ice_fdir_release_filter_list(struct ice_pf *pf)
407 {
408         struct ice_fdir_info *fdir_info = &pf->fdir;
409
410         if (fdir_info->hash_map)
411                 rte_free(fdir_info->hash_map);
412         if (fdir_info->hash_table)
413                 rte_hash_free(fdir_info->hash_table);
414
415         fdir_info->hash_map = NULL;
416         fdir_info->hash_table = NULL;
417 }
418
419 /*
420  * ice_fdir_setup - reserve and initialize the Flow Director resources
421  * @pf: board private structure
422  */
423 static int
424 ice_fdir_setup(struct ice_pf *pf)
425 {
426         struct rte_eth_dev *eth_dev = pf->adapter->eth_dev;
427         struct ice_hw *hw = ICE_PF_TO_HW(pf);
428         const struct rte_memzone *mz = NULL;
429         char z_name[RTE_MEMZONE_NAMESIZE];
430         struct ice_vsi *vsi;
431         int err = ICE_SUCCESS;
432
433         if ((pf->flags & ICE_FLAG_FDIR) == 0) {
434                 PMD_INIT_LOG(ERR, "HW doesn't support FDIR");
435                 return -ENOTSUP;
436         }
437
438         PMD_DRV_LOG(INFO, "FDIR HW Capabilities: fd_fltr_guar = %u,"
439                     " fd_fltr_best_effort = %u.",
440                     hw->func_caps.fd_fltr_guar,
441                     hw->func_caps.fd_fltr_best_effort);
442
443         if (pf->fdir.fdir_vsi) {
444                 PMD_DRV_LOG(INFO, "FDIR initialization has been done.");
445                 return ICE_SUCCESS;
446         }
447
448         /* make new FDIR VSI */
449         vsi = ice_setup_vsi(pf, ICE_VSI_CTRL);
450         if (!vsi) {
451                 PMD_DRV_LOG(ERR, "Couldn't create FDIR VSI.");
452                 return -EINVAL;
453         }
454         pf->fdir.fdir_vsi = vsi;
455
456         err = ice_fdir_init_filter_list(pf);
457         if (err) {
458                 PMD_DRV_LOG(ERR, "Failed to init FDIR filter list.");
459                 return -EINVAL;
460         }
461
462         err = ice_fdir_counter_init(pf);
463         if (err) {
464                 PMD_DRV_LOG(ERR, "Failed to init FDIR counter.");
465                 return -EINVAL;
466         }
467
468         /*Fdir tx queue setup*/
469         err = ice_fdir_setup_tx_resources(pf);
470         if (err) {
471                 PMD_DRV_LOG(ERR, "Failed to setup FDIR TX resources.");
472                 goto fail_setup_tx;
473         }
474
475         /*Fdir rx queue setup*/
476         err = ice_fdir_setup_rx_resources(pf);
477         if (err) {
478                 PMD_DRV_LOG(ERR, "Failed to setup FDIR RX resources.");
479                 goto fail_setup_rx;
480         }
481
482         err = ice_fdir_tx_queue_start(eth_dev, pf->fdir.txq->queue_id);
483         if (err) {
484                 PMD_DRV_LOG(ERR, "Failed to start FDIR TX queue.");
485                 goto fail_mem;
486         }
487
488         err = ice_fdir_rx_queue_start(eth_dev, pf->fdir.rxq->queue_id);
489         if (err) {
490                 PMD_DRV_LOG(ERR, "Failed to start FDIR RX queue.");
491                 goto fail_mem;
492         }
493
494         /* Enable FDIR MSIX interrupt */
495         vsi->nb_used_qps = 1;
496         ice_vsi_queues_bind_intr(vsi);
497         ice_vsi_enable_queues_intr(vsi);
498
499         /* reserve memory for the fdir programming packet */
500         snprintf(z_name, sizeof(z_name), "ICE_%s_%d",
501                  ICE_FDIR_MZ_NAME,
502                  eth_dev->data->port_id);
503         mz = ice_memzone_reserve(z_name, ICE_FDIR_PKT_LEN, SOCKET_ID_ANY);
504         if (!mz) {
505                 PMD_DRV_LOG(ERR, "Cannot init memzone for "
506                             "flow director program packet.");
507                 err = -ENOMEM;
508                 goto fail_mem;
509         }
510         pf->fdir.prg_pkt = mz->addr;
511         pf->fdir.dma_addr = mz->iova;
512         pf->fdir.mz = mz;
513
514         err = ice_fdir_prof_alloc(hw);
515         if (err) {
516                 PMD_DRV_LOG(ERR, "Cannot allocate memory for "
517                             "flow director profile.");
518                 err = -ENOMEM;
519                 goto fail_prof;
520         }
521
522         PMD_DRV_LOG(INFO, "FDIR setup successfully, with programming queue %u.",
523                     vsi->base_queue);
524         return ICE_SUCCESS;
525
526 fail_prof:
527         rte_memzone_free(pf->fdir.mz);
528         pf->fdir.mz = NULL;
529 fail_mem:
530         ice_rx_queue_release(pf->fdir.rxq);
531         pf->fdir.rxq = NULL;
532 fail_setup_rx:
533         ice_tx_queue_release(pf->fdir.txq);
534         pf->fdir.txq = NULL;
535 fail_setup_tx:
536         ice_release_vsi(vsi);
537         pf->fdir.fdir_vsi = NULL;
538         return err;
539 }
540
541 static void
542 ice_fdir_prof_free(struct ice_hw *hw)
543 {
544         enum ice_fltr_ptype ptype;
545
546         for (ptype = ICE_FLTR_PTYPE_NONF_NONE + 1;
547              ptype < ICE_FLTR_PTYPE_MAX;
548              ptype++) {
549                 rte_free(hw->fdir_prof[ptype]);
550                 hw->fdir_prof[ptype] = NULL;
551         }
552
553         rte_free(hw->fdir_prof);
554         hw->fdir_prof = NULL;
555 }
556
557 /* Remove a profile for some filter type */
558 static void
559 ice_fdir_prof_rm(struct ice_pf *pf, enum ice_fltr_ptype ptype, bool is_tunnel)
560 {
561         struct ice_hw *hw = ICE_PF_TO_HW(pf);
562         struct ice_fd_hw_prof *hw_prof;
563         uint64_t prof_id;
564         uint16_t vsi_num;
565         int i;
566
567         if (!hw->fdir_prof || !hw->fdir_prof[ptype])
568                 return;
569
570         hw_prof = hw->fdir_prof[ptype];
571
572         prof_id = ptype + is_tunnel * ICE_FLTR_PTYPE_MAX;
573         for (i = 0; i < pf->hw_prof_cnt[ptype][is_tunnel]; i++) {
574                 if (hw_prof->entry_h[i][is_tunnel]) {
575                         vsi_num = ice_get_hw_vsi_num(hw,
576                                                      hw_prof->vsi_h[i]);
577                         ice_rem_prof_id_flow(hw, ICE_BLK_FD,
578                                              vsi_num, ptype);
579                         ice_flow_rem_entry(hw,
580                                            hw_prof->entry_h[i][is_tunnel]);
581                         hw_prof->entry_h[i][is_tunnel] = 0;
582                 }
583         }
584         ice_flow_rem_prof(hw, ICE_BLK_FD, prof_id);
585         rte_free(hw_prof->fdir_seg[is_tunnel]);
586         hw_prof->fdir_seg[is_tunnel] = NULL;
587
588         for (i = 0; i < hw_prof->cnt; i++)
589                 hw_prof->vsi_h[i] = 0;
590         pf->hw_prof_cnt[ptype][is_tunnel] = 0;
591 }
592
593 /* Remove all created profiles */
594 static void
595 ice_fdir_prof_rm_all(struct ice_pf *pf)
596 {
597         enum ice_fltr_ptype ptype;
598
599         for (ptype = ICE_FLTR_PTYPE_NONF_NONE + 1;
600              ptype < ICE_FLTR_PTYPE_MAX;
601              ptype++) {
602                 ice_fdir_prof_rm(pf, ptype, false);
603                 ice_fdir_prof_rm(pf, ptype, true);
604         }
605 }
606
607 /*
608  * ice_fdir_teardown - release the Flow Director resources
609  * @pf: board private structure
610  */
611 static void
612 ice_fdir_teardown(struct ice_pf *pf)
613 {
614         struct rte_eth_dev *eth_dev = pf->adapter->eth_dev;
615         struct ice_hw *hw = ICE_PF_TO_HW(pf);
616         struct ice_vsi *vsi;
617         int err;
618
619         vsi = pf->fdir.fdir_vsi;
620         if (!vsi)
621                 return;
622
623         ice_vsi_disable_queues_intr(vsi);
624
625         err = ice_fdir_tx_queue_stop(eth_dev, pf->fdir.txq->queue_id);
626         if (err)
627                 PMD_DRV_LOG(ERR, "Failed to stop TX queue.");
628
629         err = ice_fdir_rx_queue_stop(eth_dev, pf->fdir.rxq->queue_id);
630         if (err)
631                 PMD_DRV_LOG(ERR, "Failed to stop RX queue.");
632
633         err = ice_fdir_counter_release(pf);
634         if (err)
635                 PMD_DRV_LOG(ERR, "Failed to release FDIR counter resource.");
636
637         ice_fdir_release_filter_list(pf);
638
639         ice_tx_queue_release(pf->fdir.txq);
640         pf->fdir.txq = NULL;
641         ice_rx_queue_release(pf->fdir.rxq);
642         pf->fdir.rxq = NULL;
643         ice_fdir_prof_rm_all(pf);
644         ice_fdir_prof_free(hw);
645         ice_release_vsi(vsi);
646         pf->fdir.fdir_vsi = NULL;
647
648         if (pf->fdir.mz) {
649                 err = rte_memzone_free(pf->fdir.mz);
650                 pf->fdir.mz = NULL;
651                 if (err)
652                         PMD_DRV_LOG(ERR, "Failed to free FDIR memezone.");
653         }
654 }
655
656 static int
657 ice_fdir_hw_tbl_conf(struct ice_pf *pf, struct ice_vsi *vsi,
658                      struct ice_vsi *ctrl_vsi,
659                      struct ice_flow_seg_info *seg,
660                      enum ice_fltr_ptype ptype,
661                      bool is_tunnel)
662 {
663         struct ice_hw *hw = ICE_PF_TO_HW(pf);
664         enum ice_flow_dir dir = ICE_FLOW_RX;
665         struct ice_flow_seg_info *ori_seg;
666         struct ice_fd_hw_prof *hw_prof;
667         struct ice_flow_prof *prof;
668         uint64_t entry_1 = 0;
669         uint64_t entry_2 = 0;
670         uint16_t vsi_num;
671         int ret;
672         uint64_t prof_id;
673
674         hw_prof = hw->fdir_prof[ptype];
675         ori_seg = hw_prof->fdir_seg[is_tunnel];
676         if (ori_seg) {
677                 if (!is_tunnel) {
678                         if (!memcmp(ori_seg, seg, sizeof(*seg)))
679                                 return -EAGAIN;
680                 } else {
681                         if (!memcmp(&ori_seg[1], &seg[1], sizeof(*seg)))
682                                 return -EAGAIN;
683                 }
684
685                 if (pf->fdir_fltr_cnt[ptype][is_tunnel])
686                         return -EINVAL;
687
688                 ice_fdir_prof_rm(pf, ptype, is_tunnel);
689         }
690
691         prof_id = ptype + is_tunnel * ICE_FLTR_PTYPE_MAX;
692         ret = ice_flow_add_prof(hw, ICE_BLK_FD, dir, prof_id, seg,
693                                 (is_tunnel) ? 2 : 1, NULL, 0, &prof);
694         if (ret)
695                 return ret;
696         ret = ice_flow_add_entry(hw, ICE_BLK_FD, prof_id, vsi->idx,
697                                  vsi->idx, ICE_FLOW_PRIO_NORMAL,
698                                  seg, NULL, 0, &entry_1);
699         if (ret) {
700                 PMD_DRV_LOG(ERR, "Failed to add main VSI flow entry for %d.",
701                             ptype);
702                 goto err_add_prof;
703         }
704         ret = ice_flow_add_entry(hw, ICE_BLK_FD, prof_id, vsi->idx,
705                                  ctrl_vsi->idx, ICE_FLOW_PRIO_NORMAL,
706                                  seg, NULL, 0, &entry_2);
707         if (ret) {
708                 PMD_DRV_LOG(ERR, "Failed to add control VSI flow entry for %d.",
709                             ptype);
710                 goto err_add_entry;
711         }
712
713         pf->hw_prof_cnt[ptype][is_tunnel] = 0;
714         hw_prof->cnt = 0;
715         hw_prof->fdir_seg[is_tunnel] = seg;
716         hw_prof->vsi_h[hw_prof->cnt] = vsi->idx;
717         hw_prof->entry_h[hw_prof->cnt++][is_tunnel] = entry_1;
718         pf->hw_prof_cnt[ptype][is_tunnel]++;
719         hw_prof->vsi_h[hw_prof->cnt] = ctrl_vsi->idx;
720         hw_prof->entry_h[hw_prof->cnt++][is_tunnel] = entry_2;
721         pf->hw_prof_cnt[ptype][is_tunnel]++;
722
723         return ret;
724
725 err_add_entry:
726         vsi_num = ice_get_hw_vsi_num(hw, vsi->idx);
727         ice_rem_prof_id_flow(hw, ICE_BLK_FD, vsi_num, prof_id);
728         ice_flow_rem_entry(hw, entry_1);
729 err_add_prof:
730         ice_flow_rem_prof(hw, ICE_BLK_FD, prof_id);
731
732         return ret;
733 }
734
735 static void
736 ice_fdir_input_set_parse(uint64_t inset, enum ice_flow_field *field)
737 {
738         uint32_t i, j;
739
740         struct ice_inset_map {
741                 uint64_t inset;
742                 enum ice_flow_field fld;
743         };
744         static const struct ice_inset_map ice_inset_map[] = {
745                 {ICE_INSET_DMAC, ICE_FLOW_FIELD_IDX_ETH_DA},
746                 {ICE_INSET_IPV4_SRC, ICE_FLOW_FIELD_IDX_IPV4_SA},
747                 {ICE_INSET_IPV4_DST, ICE_FLOW_FIELD_IDX_IPV4_DA},
748                 {ICE_INSET_IPV4_TOS, ICE_FLOW_FIELD_IDX_IPV4_DSCP},
749                 {ICE_INSET_IPV4_TTL, ICE_FLOW_FIELD_IDX_IPV4_TTL},
750                 {ICE_INSET_IPV4_PROTO, ICE_FLOW_FIELD_IDX_IPV4_PROT},
751                 {ICE_INSET_IPV6_SRC, ICE_FLOW_FIELD_IDX_IPV6_SA},
752                 {ICE_INSET_IPV6_DST, ICE_FLOW_FIELD_IDX_IPV6_DA},
753                 {ICE_INSET_IPV6_TC, ICE_FLOW_FIELD_IDX_IPV6_DSCP},
754                 {ICE_INSET_IPV6_NEXT_HDR, ICE_FLOW_FIELD_IDX_IPV6_PROT},
755                 {ICE_INSET_IPV6_HOP_LIMIT, ICE_FLOW_FIELD_IDX_IPV6_TTL},
756                 {ICE_INSET_TCP_SRC_PORT, ICE_FLOW_FIELD_IDX_TCP_SRC_PORT},
757                 {ICE_INSET_TCP_DST_PORT, ICE_FLOW_FIELD_IDX_TCP_DST_PORT},
758                 {ICE_INSET_UDP_SRC_PORT, ICE_FLOW_FIELD_IDX_UDP_SRC_PORT},
759                 {ICE_INSET_UDP_DST_PORT, ICE_FLOW_FIELD_IDX_UDP_DST_PORT},
760                 {ICE_INSET_SCTP_SRC_PORT, ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT},
761                 {ICE_INSET_SCTP_DST_PORT, ICE_FLOW_FIELD_IDX_SCTP_DST_PORT},
762                 {ICE_INSET_TUN_IPV4_SRC, ICE_FLOW_FIELD_IDX_IPV4_SA},
763                 {ICE_INSET_TUN_IPV4_DST, ICE_FLOW_FIELD_IDX_IPV4_DA},
764                 {ICE_INSET_TUN_TCP_SRC_PORT, ICE_FLOW_FIELD_IDX_TCP_SRC_PORT},
765                 {ICE_INSET_TUN_TCP_DST_PORT, ICE_FLOW_FIELD_IDX_TCP_DST_PORT},
766                 {ICE_INSET_TUN_UDP_SRC_PORT, ICE_FLOW_FIELD_IDX_UDP_SRC_PORT},
767                 {ICE_INSET_TUN_UDP_DST_PORT, ICE_FLOW_FIELD_IDX_UDP_DST_PORT},
768                 {ICE_INSET_TUN_SCTP_SRC_PORT, ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT},
769                 {ICE_INSET_TUN_SCTP_DST_PORT, ICE_FLOW_FIELD_IDX_SCTP_DST_PORT},
770                 {ICE_INSET_GTPU_TEID, ICE_FLOW_FIELD_IDX_GTPU_EH_TEID},
771                 {ICE_INSET_GTPU_QFI, ICE_FLOW_FIELD_IDX_GTPU_EH_QFI},
772         };
773
774         for (i = 0, j = 0; i < RTE_DIM(ice_inset_map); i++) {
775                 if ((inset & ice_inset_map[i].inset) ==
776                     ice_inset_map[i].inset)
777                         field[j++] = ice_inset_map[i].fld;
778         }
779 }
780
781 static int
782 ice_fdir_input_set_conf(struct ice_pf *pf, enum ice_fltr_ptype flow,
783                         uint64_t input_set, bool is_tunnel)
784 {
785         struct ice_flow_seg_info *seg;
786         struct ice_flow_seg_info *seg_tun = NULL;
787         enum ice_flow_field field[ICE_FLOW_FIELD_IDX_MAX];
788         int i, ret;
789
790         if (!input_set)
791                 return -EINVAL;
792
793         seg = (struct ice_flow_seg_info *)
794                 ice_malloc(hw, sizeof(*seg));
795         if (!seg) {
796                 PMD_DRV_LOG(ERR, "No memory can be allocated");
797                 return -ENOMEM;
798         }
799
800         for (i = 0; i < ICE_FLOW_FIELD_IDX_MAX; i++)
801                 field[i] = ICE_FLOW_FIELD_IDX_MAX;
802         ice_fdir_input_set_parse(input_set, field);
803
804         switch (flow) {
805         case ICE_FLTR_PTYPE_NONF_IPV4_UDP:
806                 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_UDP |
807                                   ICE_FLOW_SEG_HDR_IPV4);
808                 break;
809         case ICE_FLTR_PTYPE_NONF_IPV4_TCP:
810                 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_TCP |
811                                   ICE_FLOW_SEG_HDR_IPV4);
812                 break;
813         case ICE_FLTR_PTYPE_NONF_IPV4_SCTP:
814                 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_SCTP |
815                                   ICE_FLOW_SEG_HDR_IPV4);
816                 break;
817         case ICE_FLTR_PTYPE_NONF_IPV4_OTHER:
818                 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_IPV4);
819                 break;
820         case ICE_FLTR_PTYPE_NONF_IPV6_UDP:
821                 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_UDP |
822                                   ICE_FLOW_SEG_HDR_IPV6);
823                 break;
824         case ICE_FLTR_PTYPE_NONF_IPV6_TCP:
825                 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_TCP |
826                                   ICE_FLOW_SEG_HDR_IPV6);
827                 break;
828         case ICE_FLTR_PTYPE_NONF_IPV6_SCTP:
829                 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_SCTP |
830                                   ICE_FLOW_SEG_HDR_IPV6);
831                 break;
832         case ICE_FLTR_PTYPE_NONF_IPV6_OTHER:
833                 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_IPV6);
834                 break;
835         case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_UDP:
836         case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP:
837         case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP:
838         case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER:
839                 ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_GTPU_EH |
840                                   ICE_FLOW_SEG_HDR_IPV4);
841                 break;
842         default:
843                 PMD_DRV_LOG(ERR, "not supported filter type.");
844                 break;
845         }
846
847         for (i = 0; field[i] != ICE_FLOW_FIELD_IDX_MAX; i++) {
848                 ice_flow_set_fld(seg, field[i],
849                                  ICE_FLOW_FLD_OFF_INVAL,
850                                  ICE_FLOW_FLD_OFF_INVAL,
851                                  ICE_FLOW_FLD_OFF_INVAL, false);
852         }
853
854         if (!is_tunnel) {
855                 ret = ice_fdir_hw_tbl_conf(pf, pf->main_vsi, pf->fdir.fdir_vsi,
856                                            seg, flow, false);
857         } else {
858                 seg_tun = (struct ice_flow_seg_info *)
859                         ice_malloc(hw, sizeof(*seg) * ICE_FD_HW_SEG_MAX);
860                 if (!seg_tun) {
861                         PMD_DRV_LOG(ERR, "No memory can be allocated");
862                         rte_free(seg);
863                         return -ENOMEM;
864                 }
865                 rte_memcpy(&seg_tun[1], seg, sizeof(*seg));
866                 ret = ice_fdir_hw_tbl_conf(pf, pf->main_vsi, pf->fdir.fdir_vsi,
867                                            seg_tun, flow, true);
868         }
869
870         if (!ret) {
871                 return ret;
872         } else if (ret < 0) {
873                 rte_free(seg);
874                 if (is_tunnel)
875                         rte_free(seg_tun);
876                 return (ret == -EAGAIN) ? 0 : ret;
877         } else {
878                 return ret;
879         }
880 }
881
882 static void
883 ice_fdir_cnt_update(struct ice_pf *pf, enum ice_fltr_ptype ptype,
884                     bool is_tunnel, bool add)
885 {
886         struct ice_hw *hw = ICE_PF_TO_HW(pf);
887         int cnt;
888
889         cnt = (add) ? 1 : -1;
890         hw->fdir_active_fltr += cnt;
891         if (ptype == ICE_FLTR_PTYPE_NONF_NONE || ptype >= ICE_FLTR_PTYPE_MAX)
892                 PMD_DRV_LOG(ERR, "Unknown filter type %d", ptype);
893         else
894                 pf->fdir_fltr_cnt[ptype][is_tunnel] += cnt;
895 }
896
897 static int
898 ice_fdir_init(struct ice_adapter *ad)
899 {
900         struct ice_pf *pf = &ad->pf;
901         struct ice_flow_parser *parser;
902         int ret;
903
904         ret = ice_fdir_setup(pf);
905         if (ret)
906                 return ret;
907
908         if (ad->active_pkg_type == ICE_PKG_TYPE_COMMS)
909                 parser = &ice_fdir_parser_comms;
910         else if (ad->active_pkg_type == ICE_PKG_TYPE_OS_DEFAULT)
911                 parser = &ice_fdir_parser_os;
912         else
913                 return -EINVAL;
914
915         return ice_register_parser(parser, ad);
916 }
917
918 static void
919 ice_fdir_uninit(struct ice_adapter *ad)
920 {
921         struct ice_pf *pf = &ad->pf;
922         struct ice_flow_parser *parser;
923
924         if (ad->active_pkg_type == ICE_PKG_TYPE_COMMS)
925                 parser = &ice_fdir_parser_comms;
926         else
927                 parser = &ice_fdir_parser_os;
928
929         ice_unregister_parser(parser, ad);
930
931         ice_fdir_teardown(pf);
932 }
933
934 static int
935 ice_fdir_is_tunnel_profile(enum ice_fdir_tunnel_type tunnel_type)
936 {
937         if (tunnel_type == ICE_FDIR_TUNNEL_TYPE_VXLAN)
938                 return 1;
939         else
940                 return 0;
941 }
942
943 static int
944 ice_fdir_add_del_filter(struct ice_pf *pf,
945                         struct ice_fdir_filter_conf *filter,
946                         bool add)
947 {
948         struct ice_fltr_desc desc;
949         struct ice_hw *hw = ICE_PF_TO_HW(pf);
950         unsigned char *pkt = (unsigned char *)pf->fdir.prg_pkt;
951         bool is_tun;
952         int ret;
953
954         filter->input.dest_vsi = pf->main_vsi->idx;
955
956         memset(&desc, 0, sizeof(desc));
957         ice_fdir_get_prgm_desc(hw, &filter->input, &desc, add);
958
959         is_tun = ice_fdir_is_tunnel_profile(filter->tunnel_type);
960
961         memset(pkt, 0, ICE_FDIR_PKT_LEN);
962         ret = ice_fdir_get_gen_prgm_pkt(hw, &filter->input, pkt, false, is_tun);
963         if (ret) {
964                 PMD_DRV_LOG(ERR, "Generate dummy packet failed");
965                 return -EINVAL;
966         }
967
968         return ice_fdir_programming(pf, &desc);
969 }
970
971 static void
972 ice_fdir_extract_fltr_key(struct ice_fdir_fltr_pattern *key,
973                           struct ice_fdir_filter_conf *filter)
974 {
975         struct ice_fdir_fltr *input = &filter->input;
976         memset(key, 0, sizeof(*key));
977
978         key->flow_type = input->flow_type;
979         rte_memcpy(&key->ip, &input->ip, sizeof(key->ip));
980         rte_memcpy(&key->mask, &input->mask, sizeof(key->mask));
981         rte_memcpy(&key->ext_data, &input->ext_data, sizeof(key->ext_data));
982         rte_memcpy(&key->ext_mask, &input->ext_mask, sizeof(key->ext_mask));
983
984         rte_memcpy(&key->gtpu_data, &input->gtpu_data, sizeof(key->gtpu_data));
985         rte_memcpy(&key->gtpu_mask, &input->gtpu_mask, sizeof(key->gtpu_mask));
986
987         key->tunnel_type = filter->tunnel_type;
988 }
989
990 /* Check if there exists the flow director filter */
991 static struct ice_fdir_filter_conf *
992 ice_fdir_entry_lookup(struct ice_fdir_info *fdir_info,
993                         const struct ice_fdir_fltr_pattern *key)
994 {
995         int ret;
996
997         ret = rte_hash_lookup(fdir_info->hash_table, key);
998         if (ret < 0)
999                 return NULL;
1000
1001         return fdir_info->hash_map[ret];
1002 }
1003
1004 /* Add a flow director entry into the SW list */
1005 static int
1006 ice_fdir_entry_insert(struct ice_pf *pf,
1007                       struct ice_fdir_filter_conf *entry,
1008                       struct ice_fdir_fltr_pattern *key)
1009 {
1010         struct ice_fdir_info *fdir_info = &pf->fdir;
1011         int ret;
1012
1013         ret = rte_hash_add_key(fdir_info->hash_table, key);
1014         if (ret < 0) {
1015                 PMD_DRV_LOG(ERR,
1016                             "Failed to insert fdir entry to hash table %d!",
1017                             ret);
1018                 return ret;
1019         }
1020         fdir_info->hash_map[ret] = entry;
1021
1022         return 0;
1023 }
1024
1025 /* Delete a flow director entry from the SW list */
1026 static int
1027 ice_fdir_entry_del(struct ice_pf *pf, struct ice_fdir_fltr_pattern *key)
1028 {
1029         struct ice_fdir_info *fdir_info = &pf->fdir;
1030         int ret;
1031
1032         ret = rte_hash_del_key(fdir_info->hash_table, key);
1033         if (ret < 0) {
1034                 PMD_DRV_LOG(ERR,
1035                             "Failed to delete fdir filter to hash table %d!",
1036                             ret);
1037                 return ret;
1038         }
1039         fdir_info->hash_map[ret] = NULL;
1040
1041         return 0;
1042 }
1043
1044 static int
1045 ice_fdir_create_filter(struct ice_adapter *ad,
1046                        struct rte_flow *flow,
1047                        void *meta,
1048                        struct rte_flow_error *error)
1049 {
1050         struct ice_pf *pf = &ad->pf;
1051         struct ice_fdir_filter_conf *filter = meta;
1052         struct ice_fdir_info *fdir_info = &pf->fdir;
1053         struct ice_fdir_filter_conf *entry, *node;
1054         struct ice_fdir_fltr_pattern key;
1055         bool is_tun;
1056         int ret;
1057
1058         ice_fdir_extract_fltr_key(&key, filter);
1059         node = ice_fdir_entry_lookup(fdir_info, &key);
1060         if (node) {
1061                 rte_flow_error_set(error, EEXIST,
1062                                    RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1063                                    "Rule already exists!");
1064                 return -rte_errno;
1065         }
1066
1067         entry = rte_zmalloc("fdir_entry", sizeof(*entry), 0);
1068         if (!entry) {
1069                 rte_flow_error_set(error, ENOMEM,
1070                                    RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1071                                    "Failed to allocate memory");
1072                 return -rte_errno;
1073         }
1074
1075         is_tun = ice_fdir_is_tunnel_profile(filter->tunnel_type);
1076
1077         ret = ice_fdir_input_set_conf(pf, filter->input.flow_type,
1078                         filter->input_set, is_tun);
1079         if (ret) {
1080                 rte_flow_error_set(error, -ret,
1081                                    RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1082                                    "Profile configure failed.");
1083                 goto free_entry;
1084         }
1085
1086         /* alloc counter for FDIR */
1087         if (filter->input.cnt_ena) {
1088                 struct rte_flow_action_count *act_count = &filter->act_count;
1089
1090                 filter->counter = ice_fdir_counter_alloc(pf,
1091                                                          act_count->shared,
1092                                                          act_count->id);
1093                 if (!filter->counter) {
1094                         rte_flow_error_set(error, EINVAL,
1095                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1096                                         "Failed to alloc FDIR counter.");
1097                         goto free_entry;
1098                 }
1099                 filter->input.cnt_index = filter->counter->hw_index;
1100         }
1101
1102         ret = ice_fdir_add_del_filter(pf, filter, true);
1103         if (ret) {
1104                 rte_flow_error_set(error, -ret,
1105                                    RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1106                                    "Add filter rule failed.");
1107                 goto free_counter;
1108         }
1109
1110         rte_memcpy(entry, filter, sizeof(*entry));
1111         ret = ice_fdir_entry_insert(pf, entry, &key);
1112         if (ret) {
1113                 rte_flow_error_set(error, -ret,
1114                                    RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1115                                    "Insert entry to table failed.");
1116                 goto free_entry;
1117         }
1118
1119         flow->rule = entry;
1120         ice_fdir_cnt_update(pf, filter->input.flow_type, is_tun, true);
1121
1122         return 0;
1123
1124 free_counter:
1125         if (filter->counter) {
1126                 ice_fdir_counter_free(pf, filter->counter);
1127                 filter->counter = NULL;
1128         }
1129
1130 free_entry:
1131         rte_free(entry);
1132         return -rte_errno;
1133 }
1134
1135 static int
1136 ice_fdir_destroy_filter(struct ice_adapter *ad,
1137                         struct rte_flow *flow,
1138                         struct rte_flow_error *error)
1139 {
1140         struct ice_pf *pf = &ad->pf;
1141         struct ice_fdir_info *fdir_info = &pf->fdir;
1142         struct ice_fdir_filter_conf *filter, *entry;
1143         struct ice_fdir_fltr_pattern key;
1144         bool is_tun;
1145         int ret;
1146
1147         filter = (struct ice_fdir_filter_conf *)flow->rule;
1148
1149         is_tun = ice_fdir_is_tunnel_profile(filter->tunnel_type);
1150
1151         if (filter->counter) {
1152                 ice_fdir_counter_free(pf, filter->counter);
1153                 filter->counter = NULL;
1154         }
1155
1156         ice_fdir_extract_fltr_key(&key, filter);
1157         entry = ice_fdir_entry_lookup(fdir_info, &key);
1158         if (!entry) {
1159                 rte_flow_error_set(error, ENOENT,
1160                                    RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1161                                    "Can't find entry.");
1162                 return -rte_errno;
1163         }
1164
1165         ret = ice_fdir_add_del_filter(pf, filter, false);
1166         if (ret) {
1167                 rte_flow_error_set(error, -ret,
1168                                    RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1169                                    "Del filter rule failed.");
1170                 return -rte_errno;
1171         }
1172
1173         ret = ice_fdir_entry_del(pf, &key);
1174         if (ret) {
1175                 rte_flow_error_set(error, -ret,
1176                                    RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1177                                    "Remove entry from table failed.");
1178                 return -rte_errno;
1179         }
1180
1181         ice_fdir_cnt_update(pf, filter->input.flow_type, is_tun, false);
1182         flow->rule = NULL;
1183
1184         rte_free(filter);
1185
1186         return 0;
1187 }
1188
1189 static int
1190 ice_fdir_query_count(struct ice_adapter *ad,
1191                       struct rte_flow *flow,
1192                       struct rte_flow_query_count *flow_stats,
1193                       struct rte_flow_error *error)
1194 {
1195         struct ice_pf *pf = &ad->pf;
1196         struct ice_hw *hw = ICE_PF_TO_HW(pf);
1197         struct ice_fdir_filter_conf *filter = flow->rule;
1198         struct ice_fdir_counter *counter = filter->counter;
1199         uint64_t hits_lo, hits_hi;
1200
1201         if (!counter) {
1202                 rte_flow_error_set(error, EINVAL,
1203                                   RTE_FLOW_ERROR_TYPE_ACTION,
1204                                   NULL,
1205                                   "FDIR counters not available");
1206                 return -rte_errno;
1207         }
1208
1209         /*
1210          * Reading the low 32-bits latches the high 32-bits into a shadow
1211          * register. Reading the high 32-bit returns the value in the
1212          * shadow register.
1213          */
1214         hits_lo = ICE_READ_REG(hw, GLSTAT_FD_CNT0L(counter->hw_index));
1215         hits_hi = ICE_READ_REG(hw, GLSTAT_FD_CNT0H(counter->hw_index));
1216
1217         flow_stats->hits_set = 1;
1218         flow_stats->hits = hits_lo | (hits_hi << 32);
1219         flow_stats->bytes_set = 0;
1220         flow_stats->bytes = 0;
1221
1222         if (flow_stats->reset) {
1223                 /* reset statistic counter value */
1224                 ICE_WRITE_REG(hw, GLSTAT_FD_CNT0H(counter->hw_index), 0);
1225                 ICE_WRITE_REG(hw, GLSTAT_FD_CNT0L(counter->hw_index), 0);
1226         }
1227
1228         return 0;
1229 }
1230
1231 static struct ice_flow_engine ice_fdir_engine = {
1232         .init = ice_fdir_init,
1233         .uninit = ice_fdir_uninit,
1234         .create = ice_fdir_create_filter,
1235         .destroy = ice_fdir_destroy_filter,
1236         .query_count = ice_fdir_query_count,
1237         .type = ICE_FLOW_ENGINE_FDIR,
1238 };
1239
1240 static int
1241 ice_fdir_parse_action_qregion(struct ice_pf *pf,
1242                               struct rte_flow_error *error,
1243                               const struct rte_flow_action *act,
1244                               struct ice_fdir_filter_conf *filter)
1245 {
1246         const struct rte_flow_action_rss *rss = act->conf;
1247         uint32_t i;
1248
1249         if (act->type != RTE_FLOW_ACTION_TYPE_RSS) {
1250                 rte_flow_error_set(error, EINVAL,
1251                                    RTE_FLOW_ERROR_TYPE_ACTION, act,
1252                                    "Invalid action.");
1253                 return -rte_errno;
1254         }
1255
1256         if (rss->queue_num <= 1) {
1257                 rte_flow_error_set(error, EINVAL,
1258                                    RTE_FLOW_ERROR_TYPE_ACTION, act,
1259                                    "Queue region size can't be 0 or 1.");
1260                 return -rte_errno;
1261         }
1262
1263         /* check if queue index for queue region is continuous */
1264         for (i = 0; i < rss->queue_num - 1; i++) {
1265                 if (rss->queue[i + 1] != rss->queue[i] + 1) {
1266                         rte_flow_error_set(error, EINVAL,
1267                                            RTE_FLOW_ERROR_TYPE_ACTION, act,
1268                                            "Discontinuous queue region");
1269                         return -rte_errno;
1270                 }
1271         }
1272
1273         if (rss->queue[rss->queue_num - 1] >= pf->dev_data->nb_rx_queues) {
1274                 rte_flow_error_set(error, EINVAL,
1275                                    RTE_FLOW_ERROR_TYPE_ACTION, act,
1276                                    "Invalid queue region indexes.");
1277                 return -rte_errno;
1278         }
1279
1280         if (!(rte_is_power_of_2(rss->queue_num) &&
1281              (rss->queue_num <= ICE_FDIR_MAX_QREGION_SIZE))) {
1282                 rte_flow_error_set(error, EINVAL,
1283                                    RTE_FLOW_ERROR_TYPE_ACTION, act,
1284                                    "The region size should be any of the following values:"
1285                                    "1, 2, 4, 8, 16, 32, 64, 128 as long as the total number "
1286                                    "of queues do not exceed the VSI allocation.");
1287                 return -rte_errno;
1288         }
1289
1290         filter->input.q_index = rss->queue[0];
1291         filter->input.q_region = rte_fls_u32(rss->queue_num) - 1;
1292         filter->input.dest_ctl = ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_QGROUP;
1293
1294         return 0;
1295 }
1296
1297 static int
1298 ice_fdir_parse_action(struct ice_adapter *ad,
1299                       const struct rte_flow_action actions[],
1300                       struct rte_flow_error *error,
1301                       struct ice_fdir_filter_conf *filter)
1302 {
1303         struct ice_pf *pf = &ad->pf;
1304         const struct rte_flow_action_queue *act_q;
1305         const struct rte_flow_action_mark *mark_spec = NULL;
1306         const struct rte_flow_action_count *act_count;
1307         uint32_t dest_num = 0;
1308         uint32_t mark_num = 0;
1309         uint32_t counter_num = 0;
1310         int ret;
1311
1312         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
1313                 switch (actions->type) {
1314                 case RTE_FLOW_ACTION_TYPE_VOID:
1315                         break;
1316                 case RTE_FLOW_ACTION_TYPE_QUEUE:
1317                         dest_num++;
1318
1319                         act_q = actions->conf;
1320                         filter->input.q_index = act_q->index;
1321                         if (filter->input.q_index >=
1322                                         pf->dev_data->nb_rx_queues) {
1323                                 rte_flow_error_set(error, EINVAL,
1324                                                    RTE_FLOW_ERROR_TYPE_ACTION,
1325                                                    actions,
1326                                                    "Invalid queue for FDIR.");
1327                                 return -rte_errno;
1328                         }
1329                         filter->input.dest_ctl =
1330                                 ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_QINDEX;
1331                         break;
1332                 case RTE_FLOW_ACTION_TYPE_DROP:
1333                         dest_num++;
1334
1335                         filter->input.dest_ctl =
1336                                 ICE_FLTR_PRGM_DESC_DEST_DROP_PKT;
1337                         break;
1338                 case RTE_FLOW_ACTION_TYPE_PASSTHRU:
1339                         dest_num++;
1340
1341                         filter->input.dest_ctl =
1342                                 ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_QINDEX;
1343                         filter->input.q_index = 0;
1344                         break;
1345                 case RTE_FLOW_ACTION_TYPE_RSS:
1346                         dest_num++;
1347
1348                         ret = ice_fdir_parse_action_qregion(pf,
1349                                                 error, actions, filter);
1350                         if (ret)
1351                                 return ret;
1352                         break;
1353                 case RTE_FLOW_ACTION_TYPE_MARK:
1354                         mark_num++;
1355
1356                         mark_spec = actions->conf;
1357                         filter->input.fltr_id = mark_spec->id;
1358                         break;
1359                 case RTE_FLOW_ACTION_TYPE_COUNT:
1360                         counter_num++;
1361
1362                         act_count = actions->conf;
1363                         filter->input.cnt_ena = ICE_FXD_FLTR_QW0_STAT_ENA_PKTS;
1364                         rte_memcpy(&filter->act_count, act_count,
1365                                                 sizeof(filter->act_count));
1366
1367                         break;
1368                 default:
1369                         rte_flow_error_set(error, EINVAL,
1370                                    RTE_FLOW_ERROR_TYPE_ACTION, actions,
1371                                    "Invalid action.");
1372                         return -rte_errno;
1373                 }
1374         }
1375
1376         if (dest_num == 0 || dest_num >= 2) {
1377                 rte_flow_error_set(error, EINVAL,
1378                            RTE_FLOW_ERROR_TYPE_ACTION, actions,
1379                            "Unsupported action combination");
1380                 return -rte_errno;
1381         }
1382
1383         if (mark_num >= 2) {
1384                 rte_flow_error_set(error, EINVAL,
1385                            RTE_FLOW_ERROR_TYPE_ACTION, actions,
1386                            "Too many mark actions");
1387                 return -rte_errno;
1388         }
1389
1390         if (counter_num >= 2) {
1391                 rte_flow_error_set(error, EINVAL,
1392                            RTE_FLOW_ERROR_TYPE_ACTION, actions,
1393                            "Too many count actions");
1394                 return -rte_errno;
1395         }
1396
1397         return 0;
1398 }
1399
1400 static int
1401 ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad,
1402                        const struct rte_flow_item pattern[],
1403                        struct rte_flow_error *error,
1404                        struct ice_fdir_filter_conf *filter)
1405 {
1406         const struct rte_flow_item *item = pattern;
1407         enum rte_flow_item_type item_type;
1408         enum rte_flow_item_type l3 = RTE_FLOW_ITEM_TYPE_END;
1409         enum ice_fdir_tunnel_type tunnel_type = ICE_FDIR_TUNNEL_TYPE_NONE;
1410         const struct rte_flow_item_eth *eth_spec, *eth_mask;
1411         const struct rte_flow_item_ipv4 *ipv4_spec, *ipv4_mask;
1412         const struct rte_flow_item_ipv6 *ipv6_spec, *ipv6_mask;
1413         const struct rte_flow_item_tcp *tcp_spec, *tcp_mask;
1414         const struct rte_flow_item_udp *udp_spec, *udp_mask;
1415         const struct rte_flow_item_sctp *sctp_spec, *sctp_mask;
1416         const struct rte_flow_item_vxlan *vxlan_spec, *vxlan_mask;
1417         const struct rte_flow_item_gtp *gtp_spec, *gtp_mask;
1418         const struct rte_flow_item_gtp_psc *gtp_psc_spec, *gtp_psc_mask;
1419         uint64_t input_set = ICE_INSET_NONE;
1420         uint8_t flow_type = ICE_FLTR_PTYPE_NONF_NONE;
1421         uint8_t  ipv6_addr_mask[16] = {
1422                 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1423                 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
1424         };
1425         uint32_t vtc_flow_cpu;
1426
1427
1428         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
1429                 if (item->last) {
1430                         rte_flow_error_set(error, EINVAL,
1431                                         RTE_FLOW_ERROR_TYPE_ITEM,
1432                                         item,
1433                                         "Not support range");
1434                         return -rte_errno;
1435                 }
1436                 item_type = item->type;
1437
1438                 switch (item_type) {
1439                 case RTE_FLOW_ITEM_TYPE_ETH:
1440                         eth_spec = item->spec;
1441                         eth_mask = item->mask;
1442
1443                         if (eth_spec && eth_mask) {
1444                                 if (!rte_is_zero_ether_addr(&eth_spec->src) ||
1445                                     !rte_is_zero_ether_addr(&eth_mask->src)) {
1446                                         rte_flow_error_set(error, EINVAL,
1447                                                 RTE_FLOW_ERROR_TYPE_ITEM,
1448                                                 item,
1449                                                 "Src mac not support");
1450                                         return -rte_errno;
1451                                 }
1452
1453                                 if (!rte_is_broadcast_ether_addr(&eth_mask->dst)) {
1454                                         rte_flow_error_set(error, EINVAL,
1455                                                 RTE_FLOW_ERROR_TYPE_ITEM,
1456                                                 item,
1457                                                 "Invalid mac addr mask");
1458                                         return -rte_errno;
1459                                 }
1460
1461                                 input_set |= ICE_INSET_DMAC;
1462                                 rte_memcpy(&filter->input.ext_data.dst_mac,
1463                                            &eth_spec->dst,
1464                                            RTE_ETHER_ADDR_LEN);
1465                         }
1466                         break;
1467                 case RTE_FLOW_ITEM_TYPE_IPV4:
1468                         l3 = RTE_FLOW_ITEM_TYPE_IPV4;
1469                         ipv4_spec = item->spec;
1470                         ipv4_mask = item->mask;
1471
1472                         if (ipv4_spec && ipv4_mask) {
1473                                 /* Check IPv4 mask and update input set */
1474                                 if (ipv4_mask->hdr.version_ihl ||
1475                                     ipv4_mask->hdr.total_length ||
1476                                     ipv4_mask->hdr.packet_id ||
1477                                     ipv4_mask->hdr.fragment_offset ||
1478                                     ipv4_mask->hdr.hdr_checksum) {
1479                                         rte_flow_error_set(error, EINVAL,
1480                                                    RTE_FLOW_ERROR_TYPE_ITEM,
1481                                                    item,
1482                                                    "Invalid IPv4 mask.");
1483                                         return -rte_errno;
1484                                 }
1485                                 if (ipv4_mask->hdr.src_addr == UINT32_MAX)
1486                                         input_set |= tunnel_type ?
1487                                                      ICE_INSET_TUN_IPV4_SRC :
1488                                                      ICE_INSET_IPV4_SRC;
1489                                 if (ipv4_mask->hdr.dst_addr == UINT32_MAX)
1490                                         input_set |= tunnel_type ?
1491                                                      ICE_INSET_TUN_IPV4_DST :
1492                                                      ICE_INSET_IPV4_DST;
1493                                 if (ipv4_mask->hdr.type_of_service == UINT8_MAX)
1494                                         input_set |= ICE_INSET_IPV4_TOS;
1495                                 if (ipv4_mask->hdr.time_to_live == UINT8_MAX)
1496                                         input_set |= ICE_INSET_IPV4_TTL;
1497                                 if (ipv4_mask->hdr.next_proto_id == UINT8_MAX)
1498                                         input_set |= ICE_INSET_IPV4_PROTO;
1499
1500                                 filter->input.ip.v4.dst_ip =
1501                                         ipv4_spec->hdr.src_addr;
1502                                 filter->input.ip.v4.src_ip =
1503                                         ipv4_spec->hdr.dst_addr;
1504                                 filter->input.ip.v4.tos =
1505                                         ipv4_spec->hdr.type_of_service;
1506                                 filter->input.ip.v4.ttl =
1507                                         ipv4_spec->hdr.time_to_live;
1508                                 filter->input.ip.v4.proto =
1509                                         ipv4_spec->hdr.next_proto_id;
1510                         }
1511
1512                         flow_type = ICE_FLTR_PTYPE_NONF_IPV4_OTHER;
1513                         break;
1514                 case RTE_FLOW_ITEM_TYPE_IPV6:
1515                         l3 = RTE_FLOW_ITEM_TYPE_IPV6;
1516                         ipv6_spec = item->spec;
1517                         ipv6_mask = item->mask;
1518
1519                         if (ipv6_spec && ipv6_mask) {
1520                                 /* Check IPv6 mask and update input set */
1521                                 if (ipv6_mask->hdr.payload_len) {
1522                                         rte_flow_error_set(error, EINVAL,
1523                                                    RTE_FLOW_ERROR_TYPE_ITEM,
1524                                                    item,
1525                                                    "Invalid IPv6 mask");
1526                                         return -rte_errno;
1527                                 }
1528
1529                                 if (!memcmp(ipv6_mask->hdr.src_addr,
1530                                             ipv6_addr_mask,
1531                                             RTE_DIM(ipv6_mask->hdr.src_addr)))
1532                                         input_set |= ICE_INSET_IPV6_SRC;
1533                                 if (!memcmp(ipv6_mask->hdr.dst_addr,
1534                                             ipv6_addr_mask,
1535                                             RTE_DIM(ipv6_mask->hdr.dst_addr)))
1536                                         input_set |= ICE_INSET_IPV6_DST;
1537
1538                                 if ((ipv6_mask->hdr.vtc_flow &
1539                                      rte_cpu_to_be_32(ICE_IPV6_TC_MASK))
1540                                     == rte_cpu_to_be_32(ICE_IPV6_TC_MASK))
1541                                         input_set |= ICE_INSET_IPV6_TC;
1542                                 if (ipv6_mask->hdr.proto == UINT8_MAX)
1543                                         input_set |= ICE_INSET_IPV6_NEXT_HDR;
1544                                 if (ipv6_mask->hdr.hop_limits == UINT8_MAX)
1545                                         input_set |= ICE_INSET_IPV6_HOP_LIMIT;
1546
1547                                 rte_memcpy(filter->input.ip.v6.dst_ip,
1548                                            ipv6_spec->hdr.src_addr, 16);
1549                                 rte_memcpy(filter->input.ip.v6.src_ip,
1550                                            ipv6_spec->hdr.dst_addr, 16);
1551
1552                                 vtc_flow_cpu =
1553                                       rte_be_to_cpu_32(ipv6_spec->hdr.vtc_flow);
1554                                 filter->input.ip.v6.tc =
1555                                         (uint8_t)(vtc_flow_cpu >>
1556                                                   ICE_FDIR_IPV6_TC_OFFSET);
1557                                 filter->input.ip.v6.proto =
1558                                         ipv6_spec->hdr.proto;
1559                                 filter->input.ip.v6.hlim =
1560                                         ipv6_spec->hdr.hop_limits;
1561                         }
1562
1563                         flow_type = ICE_FLTR_PTYPE_NONF_IPV6_OTHER;
1564                         break;
1565                 case RTE_FLOW_ITEM_TYPE_TCP:
1566                         tcp_spec = item->spec;
1567                         tcp_mask = item->mask;
1568
1569                         if (l3 == RTE_FLOW_ITEM_TYPE_IPV4)
1570                                 flow_type = ICE_FLTR_PTYPE_NONF_IPV4_TCP;
1571                         else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6)
1572                                 flow_type = ICE_FLTR_PTYPE_NONF_IPV6_TCP;
1573
1574                         if (tcp_spec && tcp_mask) {
1575                                 /* Check TCP mask and update input set */
1576                                 if (tcp_mask->hdr.sent_seq ||
1577                                     tcp_mask->hdr.recv_ack ||
1578                                     tcp_mask->hdr.data_off ||
1579                                     tcp_mask->hdr.tcp_flags ||
1580                                     tcp_mask->hdr.rx_win ||
1581                                     tcp_mask->hdr.cksum ||
1582                                     tcp_mask->hdr.tcp_urp) {
1583                                         rte_flow_error_set(error, EINVAL,
1584                                                    RTE_FLOW_ERROR_TYPE_ITEM,
1585                                                    item,
1586                                                    "Invalid TCP mask");
1587                                         return -rte_errno;
1588                                 }
1589
1590                                 if (tcp_mask->hdr.src_port == UINT16_MAX)
1591                                         input_set |= tunnel_type ?
1592                                                      ICE_INSET_TUN_TCP_SRC_PORT :
1593                                                      ICE_INSET_TCP_SRC_PORT;
1594                                 if (tcp_mask->hdr.dst_port == UINT16_MAX)
1595                                         input_set |= tunnel_type ?
1596                                                      ICE_INSET_TUN_TCP_DST_PORT :
1597                                                      ICE_INSET_TCP_DST_PORT;
1598
1599                                 /* Get filter info */
1600                                 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {
1601                                         filter->input.ip.v4.dst_port =
1602                                                 tcp_spec->hdr.src_port;
1603                                         filter->input.ip.v4.src_port =
1604                                                 tcp_spec->hdr.dst_port;
1605                                 } else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) {
1606                                         filter->input.ip.v6.dst_port =
1607                                                 tcp_spec->hdr.src_port;
1608                                         filter->input.ip.v6.src_port =
1609                                                 tcp_spec->hdr.dst_port;
1610                                 }
1611                         }
1612                         break;
1613                 case RTE_FLOW_ITEM_TYPE_UDP:
1614                         udp_spec = item->spec;
1615                         udp_mask = item->mask;
1616
1617                         if (l3 == RTE_FLOW_ITEM_TYPE_IPV4)
1618                                 flow_type = ICE_FLTR_PTYPE_NONF_IPV4_UDP;
1619                         else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6)
1620                                 flow_type = ICE_FLTR_PTYPE_NONF_IPV6_UDP;
1621
1622                         if (udp_spec && udp_mask) {
1623                                 /* Check UDP mask and update input set*/
1624                                 if (udp_mask->hdr.dgram_len ||
1625                                     udp_mask->hdr.dgram_cksum) {
1626                                         rte_flow_error_set(error, EINVAL,
1627                                                    RTE_FLOW_ERROR_TYPE_ITEM,
1628                                                    item,
1629                                                    "Invalid UDP mask");
1630                                         return -rte_errno;
1631                                 }
1632
1633                                 if (udp_mask->hdr.src_port == UINT16_MAX)
1634                                         input_set |= tunnel_type ?
1635                                                      ICE_INSET_TUN_UDP_SRC_PORT :
1636                                                      ICE_INSET_UDP_SRC_PORT;
1637                                 if (udp_mask->hdr.dst_port == UINT16_MAX)
1638                                         input_set |= tunnel_type ?
1639                                                      ICE_INSET_TUN_UDP_DST_PORT :
1640                                                      ICE_INSET_UDP_DST_PORT;
1641
1642                                 /* Get filter info */
1643                                 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {
1644                                         filter->input.ip.v4.dst_port =
1645                                                 udp_spec->hdr.src_port;
1646                                         filter->input.ip.v4.src_port =
1647                                                 udp_spec->hdr.dst_port;
1648                                 } else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) {
1649                                         filter->input.ip.v6.src_port =
1650                                                 udp_spec->hdr.dst_port;
1651                                         filter->input.ip.v6.dst_port =
1652                                                 udp_spec->hdr.src_port;
1653                                 }
1654                         }
1655                         break;
1656                 case RTE_FLOW_ITEM_TYPE_SCTP:
1657                         sctp_spec = item->spec;
1658                         sctp_mask = item->mask;
1659
1660                         if (l3 == RTE_FLOW_ITEM_TYPE_IPV4)
1661                                 flow_type = ICE_FLTR_PTYPE_NONF_IPV4_SCTP;
1662                         else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6)
1663                                 flow_type = ICE_FLTR_PTYPE_NONF_IPV6_SCTP;
1664
1665                         if (sctp_spec && sctp_mask) {
1666                                 /* Check SCTP mask and update input set */
1667                                 if (sctp_mask->hdr.cksum) {
1668                                         rte_flow_error_set(error, EINVAL,
1669                                                    RTE_FLOW_ERROR_TYPE_ITEM,
1670                                                    item,
1671                                                    "Invalid UDP mask");
1672                                         return -rte_errno;
1673                                 }
1674
1675                                 if (sctp_mask->hdr.src_port == UINT16_MAX)
1676                                         input_set |= tunnel_type ?
1677                                                      ICE_INSET_TUN_SCTP_SRC_PORT :
1678                                                      ICE_INSET_SCTP_SRC_PORT;
1679                                 if (sctp_mask->hdr.dst_port == UINT16_MAX)
1680                                         input_set |= tunnel_type ?
1681                                                      ICE_INSET_TUN_SCTP_DST_PORT :
1682                                                      ICE_INSET_SCTP_DST_PORT;
1683
1684                                 /* Get filter info */
1685                                 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {
1686                                         filter->input.ip.v4.dst_port =
1687                                                 sctp_spec->hdr.src_port;
1688                                         filter->input.ip.v4.src_port =
1689                                                 sctp_spec->hdr.dst_port;
1690                                 } else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) {
1691                                         filter->input.ip.v6.dst_port =
1692                                                 sctp_spec->hdr.src_port;
1693                                         filter->input.ip.v6.src_port =
1694                                                 sctp_spec->hdr.dst_port;
1695                                 }
1696                         }
1697                         break;
1698                 case RTE_FLOW_ITEM_TYPE_VOID:
1699                         break;
1700                 case RTE_FLOW_ITEM_TYPE_VXLAN:
1701                         l3 = RTE_FLOW_ITEM_TYPE_END;
1702                         vxlan_spec = item->spec;
1703                         vxlan_mask = item->mask;
1704
1705                         if (vxlan_spec || vxlan_mask) {
1706                                 rte_flow_error_set(error, EINVAL,
1707                                                    RTE_FLOW_ERROR_TYPE_ITEM,
1708                                                    item,
1709                                                    "Invalid vxlan field");
1710                                 return -rte_errno;
1711                         }
1712
1713                         tunnel_type = ICE_FDIR_TUNNEL_TYPE_VXLAN;
1714                         break;
1715                 case RTE_FLOW_ITEM_TYPE_GTPU:
1716                         l3 = RTE_FLOW_ITEM_TYPE_END;
1717                         gtp_spec = item->spec;
1718                         gtp_mask = item->mask;
1719
1720                         if (gtp_spec && gtp_mask) {
1721                                 if (gtp_mask->v_pt_rsv_flags ||
1722                                     gtp_mask->msg_type ||
1723                                     gtp_mask->msg_len) {
1724                                         rte_flow_error_set(error, EINVAL,
1725                                                    RTE_FLOW_ERROR_TYPE_ITEM,
1726                                                    item,
1727                                                    "Invalid GTP mask");
1728                                         return -rte_errno;
1729                                 }
1730
1731                                 if (gtp_mask->teid == UINT32_MAX)
1732                                         input_set |= ICE_INSET_GTPU_TEID;
1733
1734                                 filter->input.gtpu_data.teid = gtp_spec->teid;
1735                         }
1736                         break;
1737                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
1738                         gtp_psc_spec = item->spec;
1739                         gtp_psc_mask = item->mask;
1740
1741                         if (gtp_psc_spec && gtp_psc_mask) {
1742                                 if (gtp_psc_mask->qfi == UINT8_MAX)
1743                                         input_set |= ICE_INSET_GTPU_QFI;
1744
1745                                 filter->input.gtpu_data.qfi =
1746                                         gtp_psc_spec->qfi;
1747                         }
1748
1749                         tunnel_type = ICE_FDIR_TUNNEL_TYPE_GTPU;
1750                         break;
1751                 default:
1752                         rte_flow_error_set(error, EINVAL,
1753                                    RTE_FLOW_ERROR_TYPE_ITEM,
1754                                    item,
1755                                    "Invalid pattern item.");
1756                         return -rte_errno;
1757                 }
1758         }
1759
1760         if (tunnel_type == ICE_FDIR_TUNNEL_TYPE_GTPU)
1761                 flow_type = ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER;
1762
1763         filter->tunnel_type = tunnel_type;
1764         filter->input.flow_type = flow_type;
1765         filter->input_set = input_set;
1766
1767         return 0;
1768 }
1769
1770 static int
1771 ice_fdir_parse(struct ice_adapter *ad,
1772                struct ice_pattern_match_item *array,
1773                uint32_t array_len,
1774                const struct rte_flow_item pattern[],
1775                const struct rte_flow_action actions[],
1776                void **meta,
1777                struct rte_flow_error *error)
1778 {
1779         struct ice_pf *pf = &ad->pf;
1780         struct ice_fdir_filter_conf *filter = &pf->fdir.conf;
1781         struct ice_pattern_match_item *item = NULL;
1782         uint64_t input_set;
1783         int ret;
1784
1785         memset(filter, 0, sizeof(*filter));
1786         item = ice_search_pattern_match_item(pattern, array, array_len, error);
1787         if (!item)
1788                 return -rte_errno;
1789
1790         ret = ice_fdir_parse_pattern(ad, pattern, error, filter);
1791         if (ret)
1792                 return ret;
1793         input_set = filter->input_set;
1794         if (!input_set || input_set & ~item->input_set_mask) {
1795                 rte_flow_error_set(error, EINVAL,
1796                                    RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1797                                    pattern,
1798                                    "Invalid input set");
1799                 return -rte_errno;
1800         }
1801
1802         ret = ice_fdir_parse_action(ad, actions, error, filter);
1803         if (ret)
1804                 return ret;
1805
1806         *meta = filter;
1807
1808         return 0;
1809 }
1810
1811 static struct ice_flow_parser ice_fdir_parser_os = {
1812         .engine = &ice_fdir_engine,
1813         .array = ice_fdir_pattern_os,
1814         .array_len = RTE_DIM(ice_fdir_pattern_os),
1815         .parse_pattern_action = ice_fdir_parse,
1816         .stage = ICE_FLOW_STAGE_DISTRIBUTOR,
1817 };
1818
1819 static struct ice_flow_parser ice_fdir_parser_comms = {
1820         .engine = &ice_fdir_engine,
1821         .array = ice_fdir_pattern_comms,
1822         .array_len = RTE_DIM(ice_fdir_pattern_comms),
1823         .parse_pattern_action = ice_fdir_parse,
1824         .stage = ICE_FLOW_STAGE_DISTRIBUTOR,
1825 };
1826
1827 RTE_INIT(ice_fdir_engine_register)
1828 {
1829         ice_register_flow_engine(&ice_fdir_engine);
1830 }