drivers/net/ixgbe/ixgbe_tm.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2017 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <rte_malloc.h>
  35
  36 #include "ixgbe_ethdev.h"
  37
  38 static int ixgbe_tm_capabilities_get(struct rte_eth_dev *dev,
  39                                      struct rte_tm_capabilities *cap,
  40                                      struct rte_tm_error *error);
  41 static int ixgbe_shaper_profile_add(struct rte_eth_dev *dev,
  42                                     uint32_t shaper_profile_id,
  43                                     struct rte_tm_shaper_params *profile,
  44                                     struct rte_tm_error *error);
  45 static int ixgbe_shaper_profile_del(struct rte_eth_dev *dev,
  46                                     uint32_t shaper_profile_id,
  47                                     struct rte_tm_error *error);
  48 static int ixgbe_node_add(struct rte_eth_dev *dev, uint32_t node_id,
  49                           uint32_t parent_node_id, uint32_t priority,
  50                           uint32_t weight, uint32_t level_id,
  51                           struct rte_tm_node_params *params,
  52                           struct rte_tm_error *error);
  53 static int ixgbe_node_delete(struct rte_eth_dev *dev, uint32_t node_id,
  54                              struct rte_tm_error *error);
  55 static int ixgbe_node_type_get(struct rte_eth_dev *dev, uint32_t node_id,
  56                                int *is_leaf, struct rte_tm_error *error);
  57 static int ixgbe_level_capabilities_get(struct rte_eth_dev *dev,
  58                                         uint32_t level_id,
  59                                         struct rte_tm_level_capabilities *cap,
  60                                         struct rte_tm_error *error);
  61 static int ixgbe_node_capabilities_get(struct rte_eth_dev *dev,
  62                                        uint32_t node_id,
  63                                        struct rte_tm_node_capabilities *cap,
  64                                        struct rte_tm_error *error);
  65
  66 const struct rte_tm_ops ixgbe_tm_ops = {
  67         .capabilities_get = ixgbe_tm_capabilities_get,
  68         .shaper_profile_add = ixgbe_shaper_profile_add,
  69         .shaper_profile_delete = ixgbe_shaper_profile_del,
  70         .node_add = ixgbe_node_add,
  71         .node_delete = ixgbe_node_delete,
  72         .node_type_get = ixgbe_node_type_get,
  73         .level_capabilities_get = ixgbe_level_capabilities_get,
  74         .node_capabilities_get = ixgbe_node_capabilities_get,
  75 };
  76
  77 int
  78 ixgbe_tm_ops_get(struct rte_eth_dev *dev __rte_unused,
  79                  void *arg)
  80 {
  81         if (!arg)
  82                 return -EINVAL;
  83
  84         *(const void **)arg = &ixgbe_tm_ops;
  85
  86         return 0;
  87 }
  88
  89 void
  90 ixgbe_tm_conf_init(struct rte_eth_dev *dev)
  91 {
  92         struct ixgbe_tm_conf *tm_conf =
  93                 IXGBE_DEV_PRIVATE_TO_TM_CONF(dev->data->dev_private);
  94
  95         /* initialize shaper profile list */
  96         TAILQ_INIT(&tm_conf->shaper_profile_list);
  97
  98         /* initialize node configuration */
  99         tm_conf->root = NULL;
 100         TAILQ_INIT(&tm_conf->queue_list);
 101         TAILQ_INIT(&tm_conf->tc_list);
 102         tm_conf->nb_tc_node = 0;
 103         tm_conf->nb_queue_node = 0;
 104         tm_conf->committed = false;
 105 }
 106
 107 void
 108 ixgbe_tm_conf_uninit(struct rte_eth_dev *dev)
 109 {
 110         struct ixgbe_tm_conf *tm_conf =
 111                 IXGBE_DEV_PRIVATE_TO_TM_CONF(dev->data->dev_private);
 112         struct ixgbe_tm_shaper_profile *shaper_profile;
 113         struct ixgbe_tm_node *tm_node;
 114
 115         /* clear node configuration */
 116         while ((tm_node = TAILQ_FIRST(&tm_conf->queue_list))) {
 117                 TAILQ_REMOVE(&tm_conf->queue_list, tm_node, node);
 118                 rte_free(tm_node);
 119         }
 120         tm_conf->nb_queue_node = 0;
 121         while ((tm_node = TAILQ_FIRST(&tm_conf->tc_list))) {
 122                 TAILQ_REMOVE(&tm_conf->tc_list, tm_node, node);
 123                 rte_free(tm_node);
 124         }
 125         tm_conf->nb_tc_node = 0;
 126         if (tm_conf->root) {
 127                 rte_free(tm_conf->root);
 128                 tm_conf->root = NULL;
 129         }
 130
 131         /* Remove all shaper profiles */
 132         while ((shaper_profile =
 133                TAILQ_FIRST(&tm_conf->shaper_profile_list))) {
 134                 TAILQ_REMOVE(&tm_conf->shaper_profile_list,
 135                              shaper_profile, node);
 136                 rte_free(shaper_profile);
 137         }
 138 }
 139
 140 static inline uint8_t
 141 ixgbe_tc_nb_get(struct rte_eth_dev *dev)
 142 {
 143         struct rte_eth_conf *eth_conf;
 144         uint8_t nb_tcs = 0;
 145
 146         eth_conf = &dev->data->dev_conf;
 147         if (eth_conf->txmode.mq_mode == ETH_MQ_TX_DCB) {
 148                 nb_tcs = eth_conf->tx_adv_conf.dcb_tx_conf.nb_tcs;
 149         } else if (eth_conf->txmode.mq_mode == ETH_MQ_TX_VMDQ_DCB) {
 150                 if (eth_conf->tx_adv_conf.vmdq_dcb_tx_conf.nb_queue_pools ==
 151                     ETH_32_POOLS)
 152                         nb_tcs = ETH_4_TCS;
 153                 else
 154                         nb_tcs = ETH_8_TCS;
 155         } else {
 156                 nb_tcs = 1;
 157         }
 158
 159         return nb_tcs;
 160 }
 161
 162 static int
 163 ixgbe_tm_capabilities_get(struct rte_eth_dev *dev,
 164                           struct rte_tm_capabilities *cap,
 165                           struct rte_tm_error *error)
 166 {
 167         struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 168         uint8_t tc_nb = ixgbe_tc_nb_get(dev);
 169
 170         if (!cap || !error)
 171                 return -EINVAL;
 172
 173         if (tc_nb > hw->mac.max_tx_queues)
 174                 return -EINVAL;
 175
 176         error->type = RTE_TM_ERROR_TYPE_NONE;
 177
 178         /* set all the parameters to 0 first. */
 179         memset(cap, 0, sizeof(struct rte_tm_capabilities));
 180
 181         /**
 182          * here is the max capability not the current configuration.
 183          */
 184         /* port + TCs + queues */
 185         cap->n_nodes_max = 1 + IXGBE_DCB_MAX_TRAFFIC_CLASS +
 186                            hw->mac.max_tx_queues;
 187         cap->n_levels_max = 3;
 188         cap->non_leaf_nodes_identical = 1;
 189         cap->leaf_nodes_identical = 1;
 190         cap->shaper_n_max = cap->n_nodes_max;
 191         cap->shaper_private_n_max = cap->n_nodes_max;
 192         cap->shaper_private_dual_rate_n_max = 0;
 193         cap->shaper_private_rate_min = 0;
 194         /* 10Gbps -> 1.25GBps */
 195         cap->shaper_private_rate_max = 1250000000ull;
 196         cap->shaper_shared_n_max = 0;
 197         cap->shaper_shared_n_nodes_per_shaper_max = 0;
 198         cap->shaper_shared_n_shapers_per_node_max = 0;
 199         cap->shaper_shared_dual_rate_n_max = 0;
 200         cap->shaper_shared_rate_min = 0;
 201         cap->shaper_shared_rate_max = 0;
 202         cap->sched_n_children_max = hw->mac.max_tx_queues;
 203         /**
 204          * HW supports SP. But no plan to support it now.
 205          * So, all the nodes should have the same priority.
 206          */
 207         cap->sched_sp_n_priorities_max = 1;
 208         cap->sched_wfq_n_children_per_group_max = 0;
 209         cap->sched_wfq_n_groups_max = 0;
 210         /**
 211          * SW only supports fair round robin now.
 212          * So, all the nodes should have the same weight.
 213          */
 214         cap->sched_wfq_weight_max = 1;
 215         cap->cman_head_drop_supported = 0;
 216         cap->dynamic_update_mask = 0;
 217         cap->shaper_pkt_length_adjust_min = RTE_TM_ETH_FRAMING_OVERHEAD;
 218         cap->shaper_pkt_length_adjust_max = RTE_TM_ETH_FRAMING_OVERHEAD_FCS;
 219         cap->cman_wred_context_n_max = 0;
 220         cap->cman_wred_context_private_n_max = 0;
 221         cap->cman_wred_context_shared_n_max = 0;
 222         cap->cman_wred_context_shared_n_nodes_per_context_max = 0;
 223         cap->cman_wred_context_shared_n_contexts_per_node_max = 0;
 224         cap->stats_mask = 0;
 225
 226         return 0;
 227 }
 228
 229 static inline struct ixgbe_tm_shaper_profile *
 230 ixgbe_shaper_profile_search(struct rte_eth_dev *dev,
 231                             uint32_t shaper_profile_id)
 232 {
 233         struct ixgbe_tm_conf *tm_conf =
 234                 IXGBE_DEV_PRIVATE_TO_TM_CONF(dev->data->dev_private);
 235         struct ixgbe_shaper_profile_list *shaper_profile_list =
 236                 &tm_conf->shaper_profile_list;
 237         struct ixgbe_tm_shaper_profile *shaper_profile;
 238
 239         TAILQ_FOREACH(shaper_profile, shaper_profile_list, node) {
 240                 if (shaper_profile_id == shaper_profile->shaper_profile_id)
 241                         return shaper_profile;
 242         }
 243
 244         return NULL;
 245 }
 246
 247 static int
 248 ixgbe_shaper_profile_param_check(struct rte_tm_shaper_params *profile,
 249                                  struct rte_tm_error *error)
 250 {
 251         /* min rate not supported */
 252         if (profile->committed.rate) {
 253                 error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE_COMMITTED_RATE;
 254                 error->message = "committed rate not supported";
 255                 return -EINVAL;
 256         }
 257         /* min bucket size not supported */
 258         if (profile->committed.size) {
 259                 error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE_COMMITTED_SIZE;
 260                 error->message = "committed bucket size not supported";
 261                 return -EINVAL;
 262         }
 263         /* max bucket size not supported */
 264         if (profile->peak.size) {
 265                 error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE_PEAK_SIZE;
 266                 error->message = "peak bucket size not supported";
 267                 return -EINVAL;
 268         }
 269         /* length adjustment not supported */
 270         if (profile->pkt_length_adjust) {
 271                 error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE_PKT_ADJUST_LEN;
 272                 error->message = "packet length adjustment not supported";
 273                 return -EINVAL;
 274         }
 275
 276         return 0;
 277 }
 278
 279 static int
 280 ixgbe_shaper_profile_add(struct rte_eth_dev *dev,
 281                          uint32_t shaper_profile_id,
 282                          struct rte_tm_shaper_params *profile,
 283                          struct rte_tm_error *error)
 284 {
 285         struct ixgbe_tm_conf *tm_conf =
 286                 IXGBE_DEV_PRIVATE_TO_TM_CONF(dev->data->dev_private);
 287         struct ixgbe_tm_shaper_profile *shaper_profile;
 288         int ret;
 289
 290         if (!profile || !error)
 291                 return -EINVAL;
 292
 293         ret = ixgbe_shaper_profile_param_check(profile, error);
 294         if (ret)
 295                 return ret;
 296
 297         shaper_profile = ixgbe_shaper_profile_search(dev, shaper_profile_id);
 298
 299         if (shaper_profile) {
 300                 error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE_ID;
 301                 error->message = "profile ID exist";
 302                 return -EINVAL;
 303         }
 304
 305         shaper_profile = rte_zmalloc("ixgbe_tm_shaper_profile",
 306                                      sizeof(struct ixgbe_tm_shaper_profile),
 307                                      0);
 308         if (!shaper_profile)
 309                 return -ENOMEM;
 310         shaper_profile->shaper_profile_id = shaper_profile_id;
 311         (void)rte_memcpy(&shaper_profile->profile, profile,
 312                          sizeof(struct rte_tm_shaper_params));
 313         TAILQ_INSERT_TAIL(&tm_conf->shaper_profile_list,
 314                           shaper_profile, node);
 315
 316         return 0;
 317 }
 318
 319 static int
 320 ixgbe_shaper_profile_del(struct rte_eth_dev *dev,
 321                          uint32_t shaper_profile_id,
 322                          struct rte_tm_error *error)
 323 {
 324         struct ixgbe_tm_conf *tm_conf =
 325                 IXGBE_DEV_PRIVATE_TO_TM_CONF(dev->data->dev_private);
 326         struct ixgbe_tm_shaper_profile *shaper_profile;
 327
 328         if (!error)
 329                 return -EINVAL;
 330
 331         shaper_profile = ixgbe_shaper_profile_search(dev, shaper_profile_id);
 332
 333         if (!shaper_profile) {
 334                 error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE_ID;
 335                 error->message = "profile ID not exist";
 336                 return -EINVAL;
 337         }
 338
 339         /* don't delete a profile if it's used by one or several nodes */
 340         if (shaper_profile->reference_count) {
 341                 error->type = RTE_TM_ERROR_TYPE_SHAPER_PROFILE;
 342                 error->message = "profile in use";
 343                 return -EINVAL;
 344         }
 345
 346         TAILQ_REMOVE(&tm_conf->shaper_profile_list, shaper_profile, node);
 347         rte_free(shaper_profile);
 348
 349         return 0;
 350 }
 351
 352 static inline struct ixgbe_tm_node *
 353 ixgbe_tm_node_search(struct rte_eth_dev *dev, uint32_t node_id,
 354                      enum ixgbe_tm_node_type *node_type)
 355 {
 356         struct ixgbe_tm_conf *tm_conf =
 357                 IXGBE_DEV_PRIVATE_TO_TM_CONF(dev->data->dev_private);
 358         struct ixgbe_tm_node *tm_node;
 359
 360         if (tm_conf->root && tm_conf->root->id == node_id) {
 361                 *node_type = IXGBE_TM_NODE_TYPE_PORT;
 362                 return tm_conf->root;
 363         }
 364
 365         TAILQ_FOREACH(tm_node, &tm_conf->tc_list, node) {
 366                 if (tm_node->id == node_id) {
 367                         *node_type = IXGBE_TM_NODE_TYPE_TC;
 368                         return tm_node;
 369                 }
 370         }
 371
 372         TAILQ_FOREACH(tm_node, &tm_conf->queue_list, node) {
 373                 if (tm_node->id == node_id) {
 374                         *node_type = IXGBE_TM_NODE_TYPE_QUEUE;
 375                         return tm_node;
 376                 }
 377         }
 378
 379         return NULL;
 380 }
 381
 382 static void
 383 ixgbe_queue_base_nb_get(struct rte_eth_dev *dev, uint16_t tc_node_no,
 384                         uint16_t *base, uint16_t *nb)
 385 {
 386         uint8_t nb_tcs = ixgbe_tc_nb_get(dev);
 387         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
 388         uint16_t vf_num = pci_dev->max_vfs;
 389
 390         *base = 0;
 391         *nb = 0;
 392
 393         /* VT on */
 394         if (vf_num) {
 395                 /* no DCB */
 396                 if (nb_tcs == 1) {
 397                         if (vf_num >= ETH_32_POOLS) {
 398                                 *nb = 2;
 399                                 *base = vf_num * 2;
 400                         } else if (vf_num >= ETH_16_POOLS) {
 401                                 *nb = 4;
 402                                 *base = vf_num * 4;
 403                         } else {
 404                                 *nb = 8;
 405                                 *base = vf_num * 8;
 406                         }
 407                 } else {
 408                         /* DCB */
 409                         *nb = 1;
 410                         *base = vf_num * nb_tcs + tc_node_no;
 411                 }
 412         } else {
 413                 /* VT off */
 414                 if (nb_tcs == ETH_8_TCS) {
 415                         switch (tc_node_no) {
 416                         case 0:
 417                                 *base = 0;
 418                                 *nb = 32;
 419                                 break;
 420                         case 1:
 421                                 *base = 32;
 422                                 *nb = 32;
 423                                 break;
 424                         case 2:
 425                                 *base = 64;
 426                                 *nb = 16;
 427                                 break;
 428                         case 3:
 429                                 *base = 80;
 430                                 *nb = 16;
 431                                 break;
 432                         case 4:
 433                                 *base = 96;
 434                                 *nb = 8;
 435                                 break;
 436                         case 5:
 437                                 *base = 104;
 438                                 *nb = 8;
 439                                 break;
 440                         case 6:
 441                                 *base = 112;
 442                                 *nb = 8;
 443                                 break;
 444                         case 7:
 445                                 *base = 120;
 446                                 *nb = 8;
 447                                 break;
 448                         default:
 449                                 return;
 450                         }
 451                 } else {
 452                         switch (tc_node_no) {
 453                         /**
 454                          * If no VF and no DCB, only 64 queues can be used.
 455                          * This case also be covered by this "case 0".
 456                          */
 457                         case 0:
 458                                 *base = 0;
 459                                 *nb = 64;
 460                                 break;
 461                         case 1:
 462                                 *base = 64;
 463                                 *nb = 32;
 464                                 break;
 465                         case 2:
 466                                 *base = 96;
 467                                 *nb = 16;
 468                                 break;
 469                         case 3:
 470                                 *base = 112;
 471                                 *nb = 16;
 472                                 break;
 473                         default:
 474                                 return;
 475                         }
 476                 }
 477         }
 478 }
 479
 480 static int
 481 ixgbe_node_param_check(uint32_t node_id, uint32_t parent_node_id,
 482                        uint32_t priority, uint32_t weight,
 483                        struct rte_tm_node_params *params,
 484                        struct rte_tm_error *error)
 485 {
 486         if (node_id == RTE_TM_NODE_ID_NULL) {
 487                 error->type = RTE_TM_ERROR_TYPE_NODE_ID;
 488                 error->message = "invalid node id";
 489                 return -EINVAL;
 490         }
 491
 492         if (priority) {
 493                 error->type = RTE_TM_ERROR_TYPE_NODE_PRIORITY;
 494                 error->message = "priority should be 0";
 495                 return -EINVAL;
 496         }
 497
 498         if (weight != 1) {
 499                 error->type = RTE_TM_ERROR_TYPE_NODE_WEIGHT;
 500                 error->message = "weight must be 1";
 501                 return -EINVAL;
 502         }
 503
 504         /* not support shared shaper */
 505         if (params->shared_shaper_id) {
 506                 error->type = RTE_TM_ERROR_TYPE_NODE_PARAMS_SHARED_SHAPER_ID;
 507                 error->message = "shared shaper not supported";
 508                 return -EINVAL;
 509         }
 510         if (params->n_shared_shapers) {
 511                 error->type = RTE_TM_ERROR_TYPE_NODE_PARAMS_N_SHARED_SHAPERS;
 512                 error->message = "shared shaper not supported";
 513                 return -EINVAL;
 514         }
 515
 516         /* for root node */
 517         if (parent_node_id == RTE_TM_NODE_ID_NULL) {
 518                 /* check the unsupported parameters */
 519                 if (params->nonleaf.wfq_weight_mode) {
 520                         error->type =
 521                                 RTE_TM_ERROR_TYPE_NODE_PARAMS_WFQ_WEIGHT_MODE;
 522                         error->message = "WFQ not supported";
 523                         return -EINVAL;
 524                 }
 525                 if (params->nonleaf.n_sp_priorities != 1) {
 526                         error->type =
 527                                 RTE_TM_ERROR_TYPE_NODE_PARAMS_N_SP_PRIORITIES;
 528                         error->message = "SP priority not supported";
 529                         return -EINVAL;
 530                 } else if (params->nonleaf.wfq_weight_mode &&
 531                            !(*params->nonleaf.wfq_weight_mode)) {
 532                         error->type =
 533                                 RTE_TM_ERROR_TYPE_NODE_PARAMS_WFQ_WEIGHT_MODE;
 534                         error->message = "WFP should be byte mode";
 535                         return -EINVAL;
 536                 }
 537
 538                 return 0;
 539         }
 540
 541         /* for TC or queue node */
 542         /* check the unsupported parameters */
 543         if (params->leaf.cman) {
 544                 error->type = RTE_TM_ERROR_TYPE_NODE_PARAMS_CMAN;
 545                 error->message = "Congestion management not supported";
 546                 return -EINVAL;
 547         }
 548         if (params->leaf.wred.wred_profile_id !=
 549             RTE_TM_WRED_PROFILE_ID_NONE) {
 550                 error->type =
 551                         RTE_TM_ERROR_TYPE_NODE_PARAMS_WRED_PROFILE_ID;
 552                 error->message = "WRED not supported";
 553                 return -EINVAL;
 554         }
 555         if (params->leaf.wred.shared_wred_context_id) {
 556                 error->type =
 557                         RTE_TM_ERROR_TYPE_NODE_PARAMS_SHARED_WRED_CONTEXT_ID;
 558                 error->message = "WRED not supported";
 559                 return -EINVAL;
 560         }
 561         if (params->leaf.wred.n_shared_wred_contexts) {
 562                 error->type =
 563                         RTE_TM_ERROR_TYPE_NODE_PARAMS_N_SHARED_WRED_CONTEXTS;
 564                 error->message = "WRED not supported";
 565                 return -EINVAL;
 566         }
 567
 568         return 0;
 569 }
 570
 571 /**
 572  * Now the TC and queue configuration is controlled by DCB.
 573  * We need check if the node configuration follows the DCB configuration.
 574  * In the future, we may use TM to cover DCB.
 575  */
 576 static int
 577 ixgbe_node_add(struct rte_eth_dev *dev, uint32_t node_id,
 578                uint32_t parent_node_id, uint32_t priority,
 579                uint32_t weight, uint32_t level_id,
 580                struct rte_tm_node_params *params,
 581                struct rte_tm_error *error)
 582 {
 583         struct ixgbe_tm_conf *tm_conf =
 584                 IXGBE_DEV_PRIVATE_TO_TM_CONF(dev->data->dev_private);
 585         enum ixgbe_tm_node_type node_type = IXGBE_TM_NODE_TYPE_MAX;
 586         enum ixgbe_tm_node_type parent_node_type = IXGBE_TM_NODE_TYPE_MAX;
 587         struct ixgbe_tm_shaper_profile *shaper_profile;
 588         struct ixgbe_tm_node *tm_node;
 589         struct ixgbe_tm_node *parent_node;
 590         uint8_t nb_tcs;
 591         uint16_t q_base = 0;
 592         uint16_t q_nb = 0;
 593         int ret;
 594
 595         if (!params || !error)
 596                 return -EINVAL;
 597
 598         /* if already committed */
 599         if (tm_conf->committed) {
 600                 error->type = RTE_TM_ERROR_TYPE_UNSPECIFIED;
 601                 error->message = "already committed";
 602                 return -EINVAL;
 603         }
 604
 605         ret = ixgbe_node_param_check(node_id, parent_node_id, priority, weight,
 606                                      params, error);
 607         if (ret)
 608                 return ret;
 609
 610         /* check if the node ID is already used */
 611         if (ixgbe_tm_node_search(dev, node_id, &node_type)) {
 612                 error->type = RTE_TM_ERROR_TYPE_NODE_ID;
 613                 error->message = "node id already used";
 614                 return -EINVAL;
 615         }
 616
 617         /* check the shaper profile id */
 618         shaper_profile = ixgbe_shaper_profile_search(dev,
 619                                                      params->shaper_profile_id);
 620         if (!shaper_profile) {
 621                 error->type = RTE_TM_ERROR_TYPE_NODE_PARAMS_SHAPER_PROFILE_ID;
 622                 error->message = "shaper profile not exist";
 623                 return -EINVAL;
 624         }
 625
 626         /* root node if not have a parent */
 627         if (parent_node_id == RTE_TM_NODE_ID_NULL) {
 628                 /* check level */
 629                 if (level_id != RTE_TM_NODE_LEVEL_ID_ANY &&
 630                     level_id > IXGBE_TM_NODE_TYPE_PORT) {
 631                         error->type = RTE_TM_ERROR_TYPE_NODE_PARAMS;
 632                         error->message = "Wrong level";
 633                         return -EINVAL;
 634                 }
 635
 636                 /* obviously no more than one root */
 637                 if (tm_conf->root) {
 638                         error->type = RTE_TM_ERROR_TYPE_NODE_PARENT_NODE_ID;
 639                         error->message = "already have a root";
 640                         return -EINVAL;
 641                 }
 642
 643                 /* add the root node */
 644                 tm_node = rte_zmalloc("ixgbe_tm_node",
 645                                       sizeof(struct ixgbe_tm_node),
 646                                       0);
 647                 if (!tm_node)
 648                         return -ENOMEM;
 649                 tm_node->id = node_id;
 650                 tm_node->priority = priority;
 651                 tm_node->weight = weight;
 652                 tm_node->reference_count = 0;
 653                 tm_node->no = 0;
 654                 tm_node->parent = NULL;
 655                 tm_node->shaper_profile = shaper_profile;
 656                 (void)rte_memcpy(&tm_node->params, params,
 657                                  sizeof(struct rte_tm_node_params));
 658                 tm_conf->root = tm_node;
 659
 660                 /* increase the reference counter of the shaper profile */
 661                 shaper_profile->reference_count++;
 662
 663                 return 0;
 664         }
 665
 666         /* TC or queue node */
 667         /* check the parent node */
 668         parent_node = ixgbe_tm_node_search(dev, parent_node_id,
 669                                            &parent_node_type);
 670         if (!parent_node) {
 671                 error->type = RTE_TM_ERROR_TYPE_NODE_PARENT_NODE_ID;
 672                 error->message = "parent not exist";
 673                 return -EINVAL;
 674         }
 675         if (parent_node_type != IXGBE_TM_NODE_TYPE_PORT &&
 676             parent_node_type != IXGBE_TM_NODE_TYPE_TC) {
 677                 error->type = RTE_TM_ERROR_TYPE_NODE_PARENT_NODE_ID;
 678                 error->message = "parent is not port or TC";
 679                 return -EINVAL;
 680         }
 681         /* check level */
 682         if (level_id != RTE_TM_NODE_LEVEL_ID_ANY &&
 683             level_id != parent_node_type + 1) {
 684                 error->type = RTE_TM_ERROR_TYPE_NODE_PARAMS;
 685                 error->message = "Wrong level";
 686                 return -EINVAL;
 687         }
 688
 689         /* check the node number */
 690         if (parent_node_type == IXGBE_TM_NODE_TYPE_PORT) {
 691                 /* check TC number */
 692                 nb_tcs = ixgbe_tc_nb_get(dev);
 693                 if (tm_conf->nb_tc_node >= nb_tcs) {
 694                         error->type = RTE_TM_ERROR_TYPE_NODE_ID;
 695                         error->message = "too many TCs";
 696                         return -EINVAL;
 697                 }
 698         } else {
 699                 /* check queue number */
 700                 if (tm_conf->nb_queue_node >= dev->data->nb_tx_queues) {
 701                         error->type = RTE_TM_ERROR_TYPE_NODE_ID;
 702                         error->message = "too many queues";
 703                         return -EINVAL;
 704                 }
 705
 706                 ixgbe_queue_base_nb_get(dev, parent_node->no, &q_base, &q_nb);
 707                 if (parent_node->reference_count >= q_nb) {
 708                         error->type = RTE_TM_ERROR_TYPE_NODE_ID;
 709                         error->message = "too many queues than TC supported";
 710                         return -EINVAL;
 711                 }
 712
 713                 /**
 714                  * check the node id.
 715                  * For queue, the node id means queue id.
 716                  */
 717                 if (node_id >= dev->data->nb_tx_queues) {
 718                         error->type = RTE_TM_ERROR_TYPE_NODE_ID;
 719                         error->message = "too large queue id";
 720                         return -EINVAL;
 721                 }
 722         }
 723
 724         /* add the TC or queue node */
 725         tm_node = rte_zmalloc("ixgbe_tm_node",
 726                               sizeof(struct ixgbe_tm_node),
 727                               0);
 728         if (!tm_node)
 729                 return -ENOMEM;
 730         tm_node->id = node_id;
 731         tm_node->priority = priority;
 732         tm_node->weight = weight;
 733         tm_node->reference_count = 0;
 734         tm_node->parent = parent_node;
 735         tm_node->shaper_profile = shaper_profile;
 736         (void)rte_memcpy(&tm_node->params, params,
 737                          sizeof(struct rte_tm_node_params));
 738         if (parent_node_type == IXGBE_TM_NODE_TYPE_PORT) {
 739                 tm_node->no = parent_node->reference_count;
 740                 TAILQ_INSERT_TAIL(&tm_conf->tc_list,
 741                                   tm_node, node);
 742                 tm_conf->nb_tc_node++;
 743         } else {
 744                 tm_node->no = q_base + parent_node->reference_count;
 745                 TAILQ_INSERT_TAIL(&tm_conf->queue_list,
 746                                   tm_node, node);
 747                 tm_conf->nb_queue_node++;
 748         }
 749         tm_node->parent->reference_count++;
 750
 751         /* increase the reference counter of the shaper profile */
 752         shaper_profile->reference_count++;
 753
 754         return 0;
 755 }
 756
 757 static int
 758 ixgbe_node_delete(struct rte_eth_dev *dev, uint32_t node_id,
 759                   struct rte_tm_error *error)
 760 {
 761         struct ixgbe_tm_conf *tm_conf =
 762                 IXGBE_DEV_PRIVATE_TO_TM_CONF(dev->data->dev_private);
 763         enum ixgbe_tm_node_type node_type = IXGBE_TM_NODE_TYPE_MAX;
 764         struct ixgbe_tm_node *tm_node;
 765
 766         if (!error)
 767                 return -EINVAL;
 768
 769         /* if already committed */
 770         if (tm_conf->committed) {
 771                 error->type = RTE_TM_ERROR_TYPE_UNSPECIFIED;
 772                 error->message = "already committed";
 773                 return -EINVAL;
 774         }
 775
 776         if (node_id == RTE_TM_NODE_ID_NULL) {
 777                 error->type = RTE_TM_ERROR_TYPE_NODE_ID;
 778                 error->message = "invalid node id";
 779                 return -EINVAL;
 780         }
 781
 782         /* check the if the node id exists */
 783         tm_node = ixgbe_tm_node_search(dev, node_id, &node_type);
 784         if (!tm_node) {
 785                 error->type = RTE_TM_ERROR_TYPE_NODE_ID;
 786                 error->message = "no such node";
 787                 return -EINVAL;
 788         }
 789
 790         /* the node should have no child */
 791         if (tm_node->reference_count) {
 792                 error->type = RTE_TM_ERROR_TYPE_NODE_ID;
 793                 error->message =
 794                         "cannot delete a node which has children";
 795                 return -EINVAL;
 796         }
 797
 798         /* root node */
 799         if (node_type == IXGBE_TM_NODE_TYPE_PORT) {
 800                 tm_node->shaper_profile->reference_count--;
 801                 rte_free(tm_node);
 802                 tm_conf->root = NULL;
 803                 return 0;
 804         }
 805
 806         /* TC or queue node */
 807         tm_node->shaper_profile->reference_count--;
 808         tm_node->parent->reference_count--;
 809         if (node_type == IXGBE_TM_NODE_TYPE_TC) {
 810                 TAILQ_REMOVE(&tm_conf->tc_list, tm_node, node);
 811                 tm_conf->nb_tc_node--;
 812         } else {
 813                 TAILQ_REMOVE(&tm_conf->queue_list, tm_node, node);
 814                 tm_conf->nb_queue_node--;
 815         }
 816         rte_free(tm_node);
 817
 818         return 0;
 819 }
 820
 821 static int
 822 ixgbe_node_type_get(struct rte_eth_dev *dev, uint32_t node_id,
 823                     int *is_leaf, struct rte_tm_error *error)
 824 {
 825         enum ixgbe_tm_node_type node_type = IXGBE_TM_NODE_TYPE_MAX;
 826         struct ixgbe_tm_node *tm_node;
 827
 828         if (!is_leaf || !error)
 829                 return -EINVAL;
 830
 831         if (node_id == RTE_TM_NODE_ID_NULL) {
 832                 error->type = RTE_TM_ERROR_TYPE_NODE_ID;
 833                 error->message = "invalid node id";
 834                 return -EINVAL;
 835         }
 836
 837         /* check if the node id exists */
 838         tm_node = ixgbe_tm_node_search(dev, node_id, &node_type);
 839         if (!tm_node) {
 840                 error->type = RTE_TM_ERROR_TYPE_NODE_ID;
 841                 error->message = "no such node";
 842                 return -EINVAL;
 843         }
 844
 845         if (node_type == IXGBE_TM_NODE_TYPE_QUEUE)
 846                 *is_leaf = true;
 847         else
 848                 *is_leaf = false;
 849
 850         return 0;
 851 }
 852
 853 static int
 854 ixgbe_level_capabilities_get(struct rte_eth_dev *dev,
 855                              uint32_t level_id,
 856                              struct rte_tm_level_capabilities *cap,
 857                              struct rte_tm_error *error)
 858 {
 859         struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 860
 861         if (!cap || !error)
 862                 return -EINVAL;
 863
 864         if (level_id >= IXGBE_TM_NODE_TYPE_MAX) {
 865                 error->type = RTE_TM_ERROR_TYPE_LEVEL_ID;
 866                 error->message = "too deep level";
 867                 return -EINVAL;
 868         }
 869
 870         /* root node */
 871         if (level_id == IXGBE_TM_NODE_TYPE_PORT) {
 872                 cap->n_nodes_max = 1;
 873                 cap->n_nodes_nonleaf_max = 1;
 874                 cap->n_nodes_leaf_max = 0;
 875                 cap->non_leaf_nodes_identical = true;
 876                 cap->leaf_nodes_identical = true;
 877                 cap->nonleaf.shaper_private_supported = true;
 878                 cap->nonleaf.shaper_private_dual_rate_supported = false;
 879                 cap->nonleaf.shaper_private_rate_min = 0;
 880                 /* 10Gbps -> 1.25GBps */
 881                 cap->nonleaf.shaper_private_rate_max = 1250000000ull;
 882                 cap->nonleaf.shaper_shared_n_max = 0;
 883                 cap->nonleaf.sched_n_children_max = IXGBE_DCB_MAX_TRAFFIC_CLASS;
 884                 cap->nonleaf.sched_sp_n_priorities_max = 1;
 885                 cap->nonleaf.sched_wfq_n_children_per_group_max = 0;
 886                 cap->nonleaf.sched_wfq_n_groups_max = 0;
 887                 cap->nonleaf.sched_wfq_weight_max = 1;
 888                 cap->nonleaf.stats_mask = 0;
 889
 890                 return 0;
 891         }
 892
 893         /* TC or queue node */
 894         if (level_id == IXGBE_TM_NODE_TYPE_TC) {
 895                 /* TC */
 896                 cap->n_nodes_max = IXGBE_DCB_MAX_TRAFFIC_CLASS;
 897                 cap->n_nodes_nonleaf_max = IXGBE_DCB_MAX_TRAFFIC_CLASS;
 898                 cap->n_nodes_leaf_max = 0;
 899                 cap->non_leaf_nodes_identical = true;
 900         } else {
 901                 /* queue */
 902                 cap->n_nodes_max = hw->mac.max_tx_queues;
 903                 cap->n_nodes_nonleaf_max = 0;
 904                 cap->n_nodes_leaf_max = hw->mac.max_tx_queues;
 905                 cap->non_leaf_nodes_identical = true;
 906         }
 907         cap->leaf_nodes_identical = true;
 908         cap->leaf.shaper_private_supported = true;
 909         cap->leaf.shaper_private_dual_rate_supported = false;
 910         cap->leaf.shaper_private_rate_min = 0;
 911         /* 10Gbps -> 1.25GBps */
 912         cap->leaf.shaper_private_rate_max = 1250000000ull;
 913         cap->leaf.shaper_shared_n_max = 0;
 914         cap->leaf.cman_head_drop_supported = false;
 915         cap->leaf.cman_wred_context_private_supported = true;
 916         cap->leaf.cman_wred_context_shared_n_max = 0;
 917         cap->leaf.stats_mask = 0;
 918
 919         return 0;
 920 }
 921
 922 static int
 923 ixgbe_node_capabilities_get(struct rte_eth_dev *dev,
 924                             uint32_t node_id,
 925                             struct rte_tm_node_capabilities *cap,
 926                             struct rte_tm_error *error)
 927 {
 928         struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 929         enum ixgbe_tm_node_type node_type = IXGBE_TM_NODE_TYPE_MAX;
 930         struct ixgbe_tm_node *tm_node;
 931
 932         if (!cap || !error)
 933                 return -EINVAL;
 934
 935         if (node_id == RTE_TM_NODE_ID_NULL) {
 936                 error->type = RTE_TM_ERROR_TYPE_NODE_ID;
 937                 error->message = "invalid node id";
 938                 return -EINVAL;
 939         }
 940
 941         /* check if the node id exists */
 942         tm_node = ixgbe_tm_node_search(dev, node_id, &node_type);
 943         if (!tm_node) {
 944                 error->type = RTE_TM_ERROR_TYPE_NODE_ID;
 945                 error->message = "no such node";
 946                 return -EINVAL;
 947         }
 948
 949         cap->shaper_private_supported = true;
 950         cap->shaper_private_dual_rate_supported = false;
 951         cap->shaper_private_rate_min = 0;
 952         /* 10Gbps -> 1.25GBps */
 953         cap->shaper_private_rate_max = 1250000000ull;
 954         cap->shaper_shared_n_max = 0;
 955
 956         if (node_type == IXGBE_TM_NODE_TYPE_QUEUE) {
 957                 cap->leaf.cman_head_drop_supported = false;
 958                 cap->leaf.cman_wred_context_private_supported = true;
 959                 cap->leaf.cman_wred_context_shared_n_max = 0;
 960         } else {
 961                 if (node_type == IXGBE_TM_NODE_TYPE_PORT)
 962                         cap->nonleaf.sched_n_children_max =
 963                                 IXGBE_DCB_MAX_TRAFFIC_CLASS;
 964                 else
 965                         cap->nonleaf.sched_n_children_max =
 966                                 hw->mac.max_tx_queues;
 967                 cap->nonleaf.sched_sp_n_priorities_max = 1;
 968                 cap->nonleaf.sched_wfq_n_children_per_group_max = 0;
 969                 cap->nonleaf.sched_wfq_n_groups_max = 0;
 970                 cap->nonleaf.sched_wfq_weight_max = 1;
 971         }
 972
 973         cap->stats_mask = 0;
 974
 975         return 0;
 976 }