drivers/net/liquidio/base/lio_hw_defs.h

   1 /*
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2017 Cavium, Inc.. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Cavium, Inc. nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER(S) OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #ifndef _LIO_HW_DEFS_H_
  35 #define _LIO_HW_DEFS_H_
  36
  37 #include <rte_io.h>
  38
  39 #ifndef PCI_VENDOR_ID_CAVIUM
  40 #define PCI_VENDOR_ID_CAVIUM    0x177D
  41 #endif
  42
  43 #define LIO_CN23XX_VF_VID       0x9712
  44
  45 /* --------------------------CONFIG VALUES------------------------ */
  46
  47 /* CN23xx IQ configuration macros */
  48 #define CN23XX_MAX_RINGS_PER_PF                 64
  49 #define CN23XX_MAX_RINGS_PER_VF                 8
  50
  51 #define CN23XX_MAX_INPUT_QUEUES                 CN23XX_MAX_RINGS_PER_PF
  52 #define CN23XX_MAX_IQ_DESCRIPTORS               512
  53 #define CN23XX_MIN_IQ_DESCRIPTORS               128
  54
  55 #define CN23XX_MAX_OUTPUT_QUEUES                CN23XX_MAX_RINGS_PER_PF
  56 #define CN23XX_MAX_OQ_DESCRIPTORS               512
  57 #define CN23XX_MIN_OQ_DESCRIPTORS               128
  58 #define CN23XX_OQ_BUF_SIZE                      1536
  59
  60 #define CN23XX_OQ_REFIL_THRESHOLD               16
  61
  62 #define CN23XX_DEFAULT_NUM_PORTS                1
  63
  64 #define CN23XX_CFG_IO_QUEUES                    CN23XX_MAX_RINGS_PER_PF
  65
  66 /* common OCTEON configuration macros */
  67 #define OCTEON_64BYTE_INSTR                     64
  68 #define OCTEON_OQ_INFOPTR_MODE                  1
  69
  70 /* Max IOQs per LIO Link */
  71 #define LIO_MAX_IOQS_PER_IF                     64
  72
  73 enum lio_card_type {
  74         LIO_23XX /* 23xx */
  75 };
  76
  77 #define LIO_23XX_NAME "23xx"
  78
  79 #define LIO_DEVICE_NAME_LEN             32
  80 #define LIO_BASE_MAJOR_VERSION          1
  81 #define LIO_BASE_MINOR_VERSION          5
  82 #define LIO_BASE_MICRO_VERSION          1
  83
  84 /* Routines for reading and writing CSRs */
  85 #ifdef RTE_LIBRTE_LIO_DEBUG_REGS
  86 #define lio_write_csr(lio_dev, reg_off, value)                          \
  87         do {                                                            \
  88                 typeof(lio_dev) _dev = lio_dev;                         \
  89                 typeof(reg_off) _reg_off = reg_off;                     \
  90                 typeof(value) _value = value;                           \
  91                 PMD_REGS_LOG(_dev,                                      \
  92                              "Write32: Reg: 0x%08lx Val: 0x%08lx\n",    \
  93                              (unsigned long)_reg_off,                   \
  94                              (unsigned long)_value);                    \
  95                 rte_write32(_value, _dev->hw_addr + _reg_off);          \
  96         } while (0)
  97
  98 #define lio_write_csr64(lio_dev, reg_off, val64)                        \
  99         do {                                                            \
 100                 typeof(lio_dev) _dev = lio_dev;                         \
 101                 typeof(reg_off) _reg_off = reg_off;                     \
 102                 typeof(val64) _val64 = val64;                           \
 103                 PMD_REGS_LOG(                                           \
 104                     _dev,                                               \
 105                     "Write64: Reg: 0x%08lx Val: 0x%016llx\n",           \
 106                     (unsigned long)_reg_off,                            \
 107                     (unsigned long long)_val64);                        \
 108                 rte_write64(_val64, _dev->hw_addr + _reg_off);          \
 109         } while (0)
 110
 111 #define lio_read_csr(lio_dev, reg_off)                                  \
 112         ({                                                              \
 113                 typeof(lio_dev) _dev = lio_dev;                         \
 114                 typeof(reg_off) _reg_off = reg_off;                     \
 115                 uint32_t val = rte_read32(_dev->hw_addr + _reg_off);    \
 116                 PMD_REGS_LOG(_dev,                                      \
 117                              "Read32: Reg: 0x%08lx Val: 0x%08lx\n",     \
 118                              (unsigned long)_reg_off,                   \
 119                              (unsigned long)val);                       \
 120                 val;                                                    \
 121         })
 122
 123 #define lio_read_csr64(lio_dev, reg_off)                                \
 124         ({                                                              \
 125                 typeof(lio_dev) _dev = lio_dev;                         \
 126                 typeof(reg_off) _reg_off = reg_off;                     \
 127                 uint64_t val64 = rte_read64(_dev->hw_addr + _reg_off);  \
 128                 PMD_REGS_LOG(                                           \
 129                     _dev,                                               \
 130                     "Read64: Reg: 0x%08lx Val: 0x%016llx\n",            \
 131                     (unsigned long)_reg_off,                            \
 132                     (unsigned long long)val64);                         \
 133                 val64;                                                  \
 134         })
 135 #else
 136 #define lio_write_csr(lio_dev, reg_off, value)                          \
 137         rte_write32(value, (lio_dev)->hw_addr + (reg_off))
 138
 139 #define lio_write_csr64(lio_dev, reg_off, val64)                        \
 140         rte_write64(val64, (lio_dev)->hw_addr + (reg_off))
 141
 142 #define lio_read_csr(lio_dev, reg_off)                                  \
 143         rte_read32((lio_dev)->hw_addr + (reg_off))
 144
 145 #define lio_read_csr64(lio_dev, reg_off)                                \
 146         rte_read64((lio_dev)->hw_addr + (reg_off))
 147 #endif
 148 #endif /* _LIO_HW_DEFS_H_ */