4 * Copyright 2012 6WIND S.A.
5 * Copyright 2012 Mellanox
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of 6WIND S.A. nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 * - RSS hash key and options cannot be modified.
50 #include <arpa/inet.h>
53 #include <sys/ioctl.h>
54 #include <sys/socket.h>
55 #include <netinet/in.h>
56 #include <linux/ethtool.h>
57 #include <linux/sockios.h>
60 #include <rte_ether.h>
61 #include <rte_ethdev.h>
62 #include <rte_ethdev_pci.h>
65 #include <rte_errno.h>
66 #include <rte_mempool.h>
67 #include <rte_prefetch.h>
68 #include <rte_malloc.h>
69 #include <rte_spinlock.h>
70 #include <rte_atomic.h>
72 #include <rte_alarm.h>
73 #include <rte_memory.h>
75 #include <rte_kvargs.h>
76 #include <rte_interrupts.h>
77 #include <rte_branch_prediction.h>
79 /* Generated configuration header. */
80 #include "mlx4_autoconf.h"
84 #include "mlx4_flow.h"
86 /* Convenience macros for accessing mbuf fields. */
87 #define NEXT(m) ((m)->next)
88 #define DATA_LEN(m) ((m)->data_len)
89 #define PKT_LEN(m) ((m)->pkt_len)
90 #define DATA_OFF(m) ((m)->data_off)
91 #define SET_DATA_OFF(m, o) ((m)->data_off = (o))
92 #define NB_SEGS(m) ((m)->nb_segs)
93 #define PORT(m) ((m)->port)
95 /* Work Request ID data type (64 bit). */
104 #define WR_ID(o) (((wr_id_t *)&(o))->data)
106 /* Transpose flags. Useful to convert IBV to DPDK flags. */
107 #define TRANSPOSE(val, from, to) \
108 (((from) >= (to)) ? \
109 (((val) & (from)) / ((from) / (to))) : \
110 (((val) & (from)) * ((to) / (from))))
112 /** Configuration structure for device arguments. */
115 uint32_t present; /**< Bit-field for existing ports. */
116 uint32_t enabled; /**< Bit-field for user-enabled ports. */
120 /* Available parameters list. */
121 const char *pmd_mlx4_init_params[] = {
127 mlx4_rx_intr_enable(struct rte_eth_dev *dev, uint16_t idx);
130 mlx4_rx_intr_disable(struct rte_eth_dev *dev, uint16_t idx);
133 priv_rx_intr_vec_enable(struct priv *priv);
136 priv_rx_intr_vec_disable(struct priv *priv);
139 * Lock private structure to protect it from concurrent access in the
143 * Pointer to private structure.
145 void priv_lock(struct priv *priv)
147 rte_spinlock_lock(&priv->lock);
151 * Unlock private structure.
154 * Pointer to private structure.
156 void priv_unlock(struct priv *priv)
158 rte_spinlock_unlock(&priv->lock);
161 /* Allocate a buffer on the stack and fill it with a printf format string. */
162 #define MKSTR(name, ...) \
163 char name[snprintf(NULL, 0, __VA_ARGS__) + 1]; \
165 snprintf(name, sizeof(name), __VA_ARGS__)
168 * Get interface name from private structure.
171 * Pointer to private structure.
173 * Interface name output buffer.
176 * 0 on success, -1 on failure and errno is set.
179 priv_get_ifname(const struct priv *priv, char (*ifname)[IF_NAMESIZE])
183 unsigned int dev_type = 0;
184 unsigned int dev_port_prev = ~0u;
185 char match[IF_NAMESIZE] = "";
188 MKSTR(path, "%s/device/net", priv->ctx->device->ibdev_path);
194 while ((dent = readdir(dir)) != NULL) {
195 char *name = dent->d_name;
197 unsigned int dev_port;
200 if ((name[0] == '.') &&
201 ((name[1] == '\0') ||
202 ((name[1] == '.') && (name[2] == '\0'))))
205 MKSTR(path, "%s/device/net/%s/%s",
206 priv->ctx->device->ibdev_path, name,
207 (dev_type ? "dev_id" : "dev_port"));
209 file = fopen(path, "rb");
214 * Switch to dev_id when dev_port does not exist as
215 * is the case with Linux kernel versions < 3.15.
226 r = fscanf(file, (dev_type ? "%x" : "%u"), &dev_port);
231 * Switch to dev_id when dev_port returns the same value for
232 * all ports. May happen when using a MOFED release older than
233 * 3.0 with a Linux kernel >= 3.15.
235 if (dev_port == dev_port_prev)
237 dev_port_prev = dev_port;
238 if (dev_port == (priv->port - 1u))
239 snprintf(match, sizeof(match), "%s", name);
242 if (match[0] == '\0')
244 strncpy(*ifname, match, sizeof(*ifname));
249 * Read from sysfs entry.
252 * Pointer to private structure.
254 * Entry name relative to sysfs path.
256 * Data output buffer.
261 * 0 on success, -1 on failure and errno is set.
264 priv_sysfs_read(const struct priv *priv, const char *entry,
265 char *buf, size_t size)
267 char ifname[IF_NAMESIZE];
272 if (priv_get_ifname(priv, &ifname))
275 MKSTR(path, "%s/device/net/%s/%s", priv->ctx->device->ibdev_path,
278 file = fopen(path, "rb");
281 ret = fread(buf, 1, size, file);
283 if (((size_t)ret < size) && (ferror(file)))
293 * Write to sysfs entry.
296 * Pointer to private structure.
298 * Entry name relative to sysfs path.
305 * 0 on success, -1 on failure and errno is set.
308 priv_sysfs_write(const struct priv *priv, const char *entry,
309 char *buf, size_t size)
311 char ifname[IF_NAMESIZE];
316 if (priv_get_ifname(priv, &ifname))
319 MKSTR(path, "%s/device/net/%s/%s", priv->ctx->device->ibdev_path,
322 file = fopen(path, "wb");
325 ret = fwrite(buf, 1, size, file);
327 if (((size_t)ret < size) || (ferror(file)))
337 * Get unsigned long sysfs property.
340 * Pointer to private structure.
342 * Entry name relative to sysfs path.
344 * Value output buffer.
347 * 0 on success, -1 on failure and errno is set.
350 priv_get_sysfs_ulong(struct priv *priv, const char *name, unsigned long *value)
353 unsigned long value_ret;
356 ret = priv_sysfs_read(priv, name, value_str, (sizeof(value_str) - 1));
358 DEBUG("cannot read %s value from sysfs: %s",
359 name, strerror(errno));
362 value_str[ret] = '\0';
364 value_ret = strtoul(value_str, NULL, 0);
366 DEBUG("invalid %s value `%s': %s", name, value_str,
375 * Set unsigned long sysfs property.
378 * Pointer to private structure.
380 * Entry name relative to sysfs path.
385 * 0 on success, -1 on failure and errno is set.
388 priv_set_sysfs_ulong(struct priv *priv, const char *name, unsigned long value)
391 MKSTR(value_str, "%lu", value);
393 ret = priv_sysfs_write(priv, name, value_str, (sizeof(value_str) - 1));
395 DEBUG("cannot write %s `%s' (%lu) to sysfs: %s",
396 name, value_str, value, strerror(errno));
403 * Perform ifreq ioctl() on associated Ethernet device.
406 * Pointer to private structure.
408 * Request number to pass to ioctl().
410 * Interface request structure output buffer.
413 * 0 on success, -1 on failure and errno is set.
416 priv_ifreq(const struct priv *priv, int req, struct ifreq *ifr)
418 int sock = socket(PF_INET, SOCK_DGRAM, IPPROTO_IP);
423 if (priv_get_ifname(priv, &ifr->ifr_name) == 0)
424 ret = ioctl(sock, req, ifr);
433 * Pointer to private structure.
435 * MTU value output buffer.
438 * 0 on success, -1 on failure and errno is set.
441 priv_get_mtu(struct priv *priv, uint16_t *mtu)
443 unsigned long ulong_mtu;
445 if (priv_get_sysfs_ulong(priv, "mtu", &ulong_mtu) == -1)
455 * Pointer to private structure.
460 * 0 on success, -1 on failure and errno is set.
463 priv_set_mtu(struct priv *priv, uint16_t mtu)
467 if (priv_set_sysfs_ulong(priv, "mtu", mtu) ||
468 priv_get_mtu(priv, &new_mtu))
480 * Pointer to private structure.
482 * Bitmask for flags that must remain untouched.
484 * Bitmask for flags to modify.
487 * 0 on success, -1 on failure and errno is set.
490 priv_set_flags(struct priv *priv, unsigned int keep, unsigned int flags)
494 if (priv_get_sysfs_ulong(priv, "flags", &tmp) == -1)
497 tmp |= (flags & (~keep));
498 return priv_set_sysfs_ulong(priv, "flags", tmp);
501 /* Device configuration. */
504 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
505 unsigned int socket, const struct rte_eth_txconf *conf);
508 txq_cleanup(struct txq *txq);
511 rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,
512 unsigned int socket, int inactive,
513 const struct rte_eth_rxconf *conf,
514 struct rte_mempool *mp, int children_n,
515 struct rxq *rxq_parent);
518 rxq_cleanup(struct rxq *rxq);
521 * Create RSS parent queue.
523 * The new parent is inserted in front of the list in the private structure.
526 * Pointer to private structure.
528 * Queues indices array, if NULL use all Rx queues.
530 * The number of entries in queues[].
533 * Pointer to a parent rxq structure, NULL on failure.
536 priv_parent_create(struct priv *priv,
544 parent = rte_zmalloc("parent queue",
546 RTE_CACHE_LINE_SIZE);
548 ERROR("cannot allocate memory for RSS parent queue");
551 ret = rxq_setup(priv->dev, parent, 0, 0, 0,
552 NULL, NULL, children_n, NULL);
557 parent->rss.queues_n = children_n;
559 for (i = 0; i < children_n; ++i)
560 parent->rss.queues[i] = queues[i];
562 /* the default RSS ring case */
563 assert(priv->rxqs_n == children_n);
564 for (i = 0; i < priv->rxqs_n; ++i)
565 parent->rss.queues[i] = i;
567 LIST_INSERT_HEAD(&priv->parents, parent, next);
572 * Clean up RX queue parent structure.
575 * RX queue parent structure.
578 rxq_parent_cleanup(struct rxq *parent)
580 LIST_REMOVE(parent, next);
586 * Clean up parent structures from the parent list.
589 * Pointer to private structure.
592 priv_parent_list_cleanup(struct priv *priv)
594 while (!LIST_EMPTY(&priv->parents))
595 rxq_parent_cleanup(LIST_FIRST(&priv->parents));
599 * Ethernet device configuration.
601 * Prepare the driver for a given number of TX and RX queues.
602 * Allocate parent RSS queue when several RX queues are requested.
605 * Pointer to Ethernet device structure.
608 * 0 on success, errno value on failure.
611 dev_configure(struct rte_eth_dev *dev)
613 struct priv *priv = dev->data->dev_private;
614 unsigned int rxqs_n = dev->data->nb_rx_queues;
615 unsigned int txqs_n = dev->data->nb_tx_queues;
618 priv->rxqs = (void *)dev->data->rx_queues;
619 priv->txqs = (void *)dev->data->tx_queues;
620 if (txqs_n != priv->txqs_n) {
621 INFO("%p: TX queues number update: %u -> %u",
622 (void *)dev, priv->txqs_n, txqs_n);
623 priv->txqs_n = txqs_n;
625 if (rxqs_n == priv->rxqs_n)
627 if (!rte_is_power_of_2(rxqs_n) && !priv->isolated) {
630 n_active = rte_align32pow2(rxqs_n + 1) >> 1;
631 WARN("%p: number of RX queues must be a power"
632 " of 2: %u queues among %u will be active",
633 (void *)dev, n_active, rxqs_n);
636 INFO("%p: RX queues number update: %u -> %u",
637 (void *)dev, priv->rxqs_n, rxqs_n);
638 /* If RSS is enabled, disable it first. */
642 /* Only if there are no remaining child RX queues. */
643 for (i = 0; (i != priv->rxqs_n); ++i)
644 if ((*priv->rxqs)[i] != NULL)
646 priv_parent_list_cleanup(priv);
651 /* Nothing else to do. */
652 priv->rxqs_n = rxqs_n;
655 /* Allocate a new RSS parent queue if supported by hardware. */
657 ERROR("%p: only a single RX queue can be configured when"
658 " hardware doesn't support RSS",
662 /* Fail if hardware doesn't support that many RSS queues. */
663 if (rxqs_n >= priv->max_rss_tbl_sz) {
664 ERROR("%p: only %u RX queues can be configured for RSS",
665 (void *)dev, priv->max_rss_tbl_sz);
670 priv->rxqs_n = rxqs_n;
673 if (priv_parent_create(priv, NULL, priv->rxqs_n))
675 /* Failure, rollback. */
682 * DPDK callback for Ethernet device configuration.
685 * Pointer to Ethernet device structure.
688 * 0 on success, negative errno value on failure.
691 mlx4_dev_configure(struct rte_eth_dev *dev)
693 struct priv *priv = dev->data->dev_private;
697 ret = dev_configure(dev);
703 static uint16_t mlx4_tx_burst(void *, struct rte_mbuf **, uint16_t);
704 static uint16_t removed_rx_burst(void *, struct rte_mbuf **, uint16_t);
706 /* TX queues handling. */
709 * Allocate TX queue elements.
712 * Pointer to TX queue structure.
714 * Number of elements to allocate.
717 * 0 on success, errno value on failure.
720 txq_alloc_elts(struct txq *txq, unsigned int elts_n)
723 struct txq_elt (*elts)[elts_n] =
724 rte_calloc_socket("TXQ", 1, sizeof(*elts), 0, txq->socket);
725 linear_t (*elts_linear)[elts_n] =
726 rte_calloc_socket("TXQ", 1, sizeof(*elts_linear), 0,
728 struct ibv_mr *mr_linear = NULL;
731 if ((elts == NULL) || (elts_linear == NULL)) {
732 ERROR("%p: can't allocate packets array", (void *)txq);
737 ibv_reg_mr(txq->priv->pd, elts_linear, sizeof(*elts_linear),
738 IBV_ACCESS_LOCAL_WRITE);
739 if (mr_linear == NULL) {
740 ERROR("%p: unable to configure MR, ibv_reg_mr() failed",
745 for (i = 0; (i != elts_n); ++i) {
746 struct txq_elt *elt = &(*elts)[i];
750 DEBUG("%p: allocated and configured %u WRs", (void *)txq, elts_n);
751 txq->elts_n = elts_n;
756 /* Request send completion every MLX4_PMD_TX_PER_COMP_REQ packets or
757 * at least 4 times per ring. */
758 txq->elts_comp_cd_init =
759 ((MLX4_PMD_TX_PER_COMP_REQ < (elts_n / 4)) ?
760 MLX4_PMD_TX_PER_COMP_REQ : (elts_n / 4));
761 txq->elts_comp_cd = txq->elts_comp_cd_init;
762 txq->elts_linear = elts_linear;
763 txq->mr_linear = mr_linear;
767 if (mr_linear != NULL)
768 claim_zero(ibv_dereg_mr(mr_linear));
770 rte_free(elts_linear);
773 DEBUG("%p: failed, freed everything", (void *)txq);
779 * Free TX queue elements.
782 * Pointer to TX queue structure.
785 txq_free_elts(struct txq *txq)
787 unsigned int elts_n = txq->elts_n;
788 unsigned int elts_head = txq->elts_head;
789 unsigned int elts_tail = txq->elts_tail;
790 struct txq_elt (*elts)[elts_n] = txq->elts;
791 linear_t (*elts_linear)[elts_n] = txq->elts_linear;
792 struct ibv_mr *mr_linear = txq->mr_linear;
794 DEBUG("%p: freeing WRs", (void *)txq);
799 txq->elts_comp_cd = 0;
800 txq->elts_comp_cd_init = 0;
802 txq->elts_linear = NULL;
803 txq->mr_linear = NULL;
804 if (mr_linear != NULL)
805 claim_zero(ibv_dereg_mr(mr_linear));
807 rte_free(elts_linear);
810 while (elts_tail != elts_head) {
811 struct txq_elt *elt = &(*elts)[elts_tail];
813 assert(elt->buf != NULL);
814 rte_pktmbuf_free(elt->buf);
817 memset(elt, 0x77, sizeof(*elt));
819 if (++elts_tail == elts_n)
827 * Clean up a TX queue.
829 * Destroy objects, free allocated memory and reset the structure for reuse.
832 * Pointer to TX queue structure.
835 txq_cleanup(struct txq *txq)
837 struct ibv_exp_release_intf_params params;
840 DEBUG("cleaning up %p", (void *)txq);
842 if (txq->if_qp != NULL) {
843 assert(txq->priv != NULL);
844 assert(txq->priv->ctx != NULL);
845 assert(txq->qp != NULL);
846 params = (struct ibv_exp_release_intf_params){
849 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
853 if (txq->if_cq != NULL) {
854 assert(txq->priv != NULL);
855 assert(txq->priv->ctx != NULL);
856 assert(txq->cq != NULL);
857 params = (struct ibv_exp_release_intf_params){
860 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
865 claim_zero(ibv_destroy_qp(txq->qp));
867 claim_zero(ibv_destroy_cq(txq->cq));
868 if (txq->rd != NULL) {
869 struct ibv_exp_destroy_res_domain_attr attr = {
873 assert(txq->priv != NULL);
874 assert(txq->priv->ctx != NULL);
875 claim_zero(ibv_exp_destroy_res_domain(txq->priv->ctx,
879 for (i = 0; (i != elemof(txq->mp2mr)); ++i) {
880 if (txq->mp2mr[i].mp == NULL)
882 assert(txq->mp2mr[i].mr != NULL);
883 claim_zero(ibv_dereg_mr(txq->mp2mr[i].mr));
885 memset(txq, 0, sizeof(*txq));
889 * Manage TX completions.
891 * When sending a burst, mlx4_tx_burst() posts several WRs.
892 * To improve performance, a completion event is only required once every
893 * MLX4_PMD_TX_PER_COMP_REQ sends. Doing so discards completion information
894 * for other WRs, but this information would not be used anyway.
897 * Pointer to TX queue structure.
900 * 0 on success, -1 on failure.
903 txq_complete(struct txq *txq)
905 unsigned int elts_comp = txq->elts_comp;
906 unsigned int elts_tail = txq->elts_tail;
907 const unsigned int elts_n = txq->elts_n;
910 if (unlikely(elts_comp == 0))
912 wcs_n = txq->if_cq->poll_cnt(txq->cq, elts_comp);
913 if (unlikely(wcs_n == 0))
915 if (unlikely(wcs_n < 0)) {
916 DEBUG("%p: ibv_poll_cq() failed (wcs_n=%d)",
921 assert(elts_comp <= txq->elts_comp);
923 * Assume WC status is successful as nothing can be done about it
926 elts_tail += wcs_n * txq->elts_comp_cd_init;
927 if (elts_tail >= elts_n)
929 txq->elts_tail = elts_tail;
930 txq->elts_comp = elts_comp;
934 struct mlx4_check_mempool_data {
940 /* Called by mlx4_check_mempool() when iterating the memory chunks. */
941 static void mlx4_check_mempool_cb(struct rte_mempool *mp,
942 void *opaque, struct rte_mempool_memhdr *memhdr,
945 struct mlx4_check_mempool_data *data = opaque;
950 /* It already failed, skip the next chunks. */
953 /* It is the first chunk. */
954 if (data->start == NULL && data->end == NULL) {
955 data->start = memhdr->addr;
956 data->end = data->start + memhdr->len;
959 if (data->end == memhdr->addr) {
960 data->end += memhdr->len;
963 if (data->start == (char *)memhdr->addr + memhdr->len) {
964 data->start -= memhdr->len;
967 /* Error, mempool is not virtually contigous. */
972 * Check if a mempool can be used: it must be virtually contiguous.
975 * Pointer to memory pool.
977 * Pointer to the start address of the mempool virtual memory area
979 * Pointer to the end address of the mempool virtual memory area
982 * 0 on success (mempool is virtually contiguous), -1 on error.
984 static int mlx4_check_mempool(struct rte_mempool *mp, uintptr_t *start,
987 struct mlx4_check_mempool_data data;
989 memset(&data, 0, sizeof(data));
990 rte_mempool_mem_iter(mp, mlx4_check_mempool_cb, &data);
991 *start = (uintptr_t)data.start;
992 *end = (uintptr_t)data.end;
997 /* For best performance, this function should not be inlined. */
998 static struct ibv_mr *mlx4_mp2mr(struct ibv_pd *, struct rte_mempool *)
1002 * Register mempool as a memory region.
1005 * Pointer to protection domain.
1007 * Pointer to memory pool.
1010 * Memory region pointer, NULL in case of error.
1012 static struct ibv_mr *
1013 mlx4_mp2mr(struct ibv_pd *pd, struct rte_mempool *mp)
1015 const struct rte_memseg *ms = rte_eal_get_physmem_layout();
1020 if (mlx4_check_mempool(mp, &start, &end) != 0) {
1021 ERROR("mempool %p: not virtually contiguous",
1026 DEBUG("mempool %p area start=%p end=%p size=%zu",
1027 (void *)mp, (void *)start, (void *)end,
1028 (size_t)(end - start));
1029 /* Round start and end to page boundary if found in memory segments. */
1030 for (i = 0; (i < RTE_MAX_MEMSEG) && (ms[i].addr != NULL); ++i) {
1031 uintptr_t addr = (uintptr_t)ms[i].addr;
1032 size_t len = ms[i].len;
1033 unsigned int align = ms[i].hugepage_sz;
1035 if ((start > addr) && (start < addr + len))
1036 start = RTE_ALIGN_FLOOR(start, align);
1037 if ((end > addr) && (end < addr + len))
1038 end = RTE_ALIGN_CEIL(end, align);
1040 DEBUG("mempool %p using start=%p end=%p size=%zu for MR",
1041 (void *)mp, (void *)start, (void *)end,
1042 (size_t)(end - start));
1043 return ibv_reg_mr(pd,
1046 IBV_ACCESS_LOCAL_WRITE);
1050 * Get Memory Pool (MP) from mbuf. If mbuf is indirect, the pool from which
1051 * the cloned mbuf is allocated is returned instead.
1057 * Memory pool where data is located for given mbuf.
1059 static struct rte_mempool *
1060 txq_mb2mp(struct rte_mbuf *buf)
1062 if (unlikely(RTE_MBUF_INDIRECT(buf)))
1063 return rte_mbuf_from_indirect(buf)->pool;
1068 * Get Memory Region (MR) <-> Memory Pool (MP) association from txq->mp2mr[].
1069 * Add MP to txq->mp2mr[] if it's not registered yet. If mp2mr[] is full,
1070 * remove an entry first.
1073 * Pointer to TX queue structure.
1075 * Memory Pool for which a Memory Region lkey must be returned.
1078 * mr->lkey on success, (uint32_t)-1 on failure.
1081 txq_mp2mr(struct txq *txq, struct rte_mempool *mp)
1086 for (i = 0; (i != elemof(txq->mp2mr)); ++i) {
1087 if (unlikely(txq->mp2mr[i].mp == NULL)) {
1088 /* Unknown MP, add a new MR for it. */
1091 if (txq->mp2mr[i].mp == mp) {
1092 assert(txq->mp2mr[i].lkey != (uint32_t)-1);
1093 assert(txq->mp2mr[i].mr->lkey == txq->mp2mr[i].lkey);
1094 return txq->mp2mr[i].lkey;
1097 /* Add a new entry, register MR first. */
1098 DEBUG("%p: discovered new memory pool \"%s\" (%p)",
1099 (void *)txq, mp->name, (void *)mp);
1100 mr = mlx4_mp2mr(txq->priv->pd, mp);
1101 if (unlikely(mr == NULL)) {
1102 DEBUG("%p: unable to configure MR, ibv_reg_mr() failed.",
1104 return (uint32_t)-1;
1106 if (unlikely(i == elemof(txq->mp2mr))) {
1107 /* Table is full, remove oldest entry. */
1108 DEBUG("%p: MR <-> MP table full, dropping oldest entry.",
1111 claim_zero(ibv_dereg_mr(txq->mp2mr[0].mr));
1112 memmove(&txq->mp2mr[0], &txq->mp2mr[1],
1113 (sizeof(txq->mp2mr) - sizeof(txq->mp2mr[0])));
1115 /* Store the new entry. */
1116 txq->mp2mr[i].mp = mp;
1117 txq->mp2mr[i].mr = mr;
1118 txq->mp2mr[i].lkey = mr->lkey;
1119 DEBUG("%p: new MR lkey for MP \"%s\" (%p): 0x%08" PRIu32,
1120 (void *)txq, mp->name, (void *)mp, txq->mp2mr[i].lkey);
1121 return txq->mp2mr[i].lkey;
1124 struct txq_mp2mr_mbuf_check_data {
1129 * Callback function for rte_mempool_obj_iter() to check whether a given
1130 * mempool object looks like a mbuf.
1133 * The mempool pointer
1135 * Context data (struct txq_mp2mr_mbuf_check_data). Contains the
1140 * Object index, unused.
1143 txq_mp2mr_mbuf_check(struct rte_mempool *mp, void *arg, void *obj,
1144 uint32_t index __rte_unused)
1146 struct txq_mp2mr_mbuf_check_data *data = arg;
1147 struct rte_mbuf *buf = obj;
1149 /* Check whether mbuf structure fits element size and whether mempool
1150 * pointer is valid. */
1151 if (sizeof(*buf) > mp->elt_size || buf->pool != mp)
1156 * Iterator function for rte_mempool_walk() to register existing mempools and
1157 * fill the MP to MR cache of a TX queue.
1160 * Memory Pool to register.
1162 * Pointer to TX queue structure.
1165 txq_mp2mr_iter(struct rte_mempool *mp, void *arg)
1167 struct txq *txq = arg;
1168 struct txq_mp2mr_mbuf_check_data data = {
1172 /* Register mempool only if the first element looks like a mbuf. */
1173 if (rte_mempool_obj_iter(mp, txq_mp2mr_mbuf_check, &data) == 0 ||
1180 * Copy scattered mbuf contents to a single linear buffer.
1182 * @param[out] linear
1183 * Linear output buffer.
1185 * Scattered input buffer.
1188 * Number of bytes copied to the output buffer or 0 if not large enough.
1191 linearize_mbuf(linear_t *linear, struct rte_mbuf *buf)
1193 unsigned int size = 0;
1194 unsigned int offset;
1197 unsigned int len = DATA_LEN(buf);
1201 if (unlikely(size > sizeof(*linear)))
1203 memcpy(&(*linear)[offset],
1204 rte_pktmbuf_mtod(buf, uint8_t *),
1207 } while (buf != NULL);
1212 * Handle scattered buffers for mlx4_tx_burst().
1215 * TX queue structure.
1217 * Number of segments in buf.
1219 * TX queue element to fill.
1221 * Buffer to process.
1223 * Index of the linear buffer to use if necessary (normally txq->elts_head).
1225 * Array filled with SGEs on success.
1228 * A structure containing the processed packet size in bytes and the
1229 * number of SGEs. Both fields are set to (unsigned int)-1 in case of
1232 static struct tx_burst_sg_ret {
1233 unsigned int length;
1236 tx_burst_sg(struct txq *txq, unsigned int segs, struct txq_elt *elt,
1237 struct rte_mbuf *buf, unsigned int elts_head,
1238 struct ibv_sge (*sges)[MLX4_PMD_SGE_WR_N])
1240 unsigned int sent_size = 0;
1244 /* When there are too many segments, extra segments are
1245 * linearized in the last SGE. */
1246 if (unlikely(segs > elemof(*sges))) {
1247 segs = (elemof(*sges) - 1);
1250 /* Update element. */
1252 /* Register segments as SGEs. */
1253 for (j = 0; (j != segs); ++j) {
1254 struct ibv_sge *sge = &(*sges)[j];
1257 /* Retrieve Memory Region key for this memory pool. */
1258 lkey = txq_mp2mr(txq, txq_mb2mp(buf));
1259 if (unlikely(lkey == (uint32_t)-1)) {
1260 /* MR does not exist. */
1261 DEBUG("%p: unable to get MP <-> MR association",
1263 /* Clean up TX element. */
1268 sge->addr = rte_pktmbuf_mtod(buf, uintptr_t);
1270 rte_prefetch0((volatile void *)
1271 (uintptr_t)sge->addr);
1272 sge->length = DATA_LEN(buf);
1274 sent_size += sge->length;
1277 /* If buf is not NULL here and is not going to be linearized,
1278 * nb_segs is not valid. */
1280 assert((buf == NULL) || (linearize));
1281 /* Linearize extra segments. */
1283 struct ibv_sge *sge = &(*sges)[segs];
1284 linear_t *linear = &(*txq->elts_linear)[elts_head];
1285 unsigned int size = linearize_mbuf(linear, buf);
1287 assert(segs == (elemof(*sges) - 1));
1289 /* Invalid packet. */
1290 DEBUG("%p: packet too large to be linearized.",
1292 /* Clean up TX element. */
1296 /* If MLX4_PMD_SGE_WR_N is 1, free mbuf immediately. */
1297 if (elemof(*sges) == 1) {
1299 struct rte_mbuf *next = NEXT(buf);
1301 rte_pktmbuf_free_seg(buf);
1303 } while (buf != NULL);
1307 sge->addr = (uintptr_t)&(*linear)[0];
1309 sge->lkey = txq->mr_linear->lkey;
1311 /* Include last segment. */
1314 return (struct tx_burst_sg_ret){
1315 .length = sent_size,
1319 return (struct tx_burst_sg_ret){
1326 * DPDK callback for TX.
1329 * Generic pointer to TX queue structure.
1331 * Packets to transmit.
1333 * Number of packets in array.
1336 * Number of packets successfully transmitted (<= pkts_n).
1339 mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
1341 struct txq *txq = (struct txq *)dpdk_txq;
1342 unsigned int elts_head = txq->elts_head;
1343 const unsigned int elts_n = txq->elts_n;
1344 unsigned int elts_comp_cd = txq->elts_comp_cd;
1345 unsigned int elts_comp = 0;
1350 assert(elts_comp_cd != 0);
1352 max = (elts_n - (elts_head - txq->elts_tail));
1356 assert(max <= elts_n);
1357 /* Always leave one free entry in the ring. */
1363 for (i = 0; (i != max); ++i) {
1364 struct rte_mbuf *buf = pkts[i];
1365 unsigned int elts_head_next =
1366 (((elts_head + 1) == elts_n) ? 0 : elts_head + 1);
1367 struct txq_elt *elt_next = &(*txq->elts)[elts_head_next];
1368 struct txq_elt *elt = &(*txq->elts)[elts_head];
1369 unsigned int segs = NB_SEGS(buf);
1370 unsigned int sent_size = 0;
1371 uint32_t send_flags = 0;
1373 /* Clean up old buffer. */
1374 if (likely(elt->buf != NULL)) {
1375 struct rte_mbuf *tmp = elt->buf;
1379 memset(elt, 0x66, sizeof(*elt));
1381 /* Faster than rte_pktmbuf_free(). */
1383 struct rte_mbuf *next = NEXT(tmp);
1385 rte_pktmbuf_free_seg(tmp);
1387 } while (tmp != NULL);
1389 /* Request TX completion. */
1390 if (unlikely(--elts_comp_cd == 0)) {
1391 elts_comp_cd = txq->elts_comp_cd_init;
1393 send_flags |= IBV_EXP_QP_BURST_SIGNALED;
1395 /* Should we enable HW CKSUM offload */
1397 (PKT_TX_IP_CKSUM | PKT_TX_TCP_CKSUM | PKT_TX_UDP_CKSUM)) {
1398 send_flags |= IBV_EXP_QP_BURST_IP_CSUM;
1399 /* HW does not support checksum offloads at arbitrary
1400 * offsets but automatically recognizes the packet
1401 * type. For inner L3/L4 checksums, only VXLAN (UDP)
1402 * tunnels are currently supported. */
1403 if (RTE_ETH_IS_TUNNEL_PKT(buf->packet_type))
1404 send_flags |= IBV_EXP_QP_BURST_TUNNEL;
1406 if (likely(segs == 1)) {
1411 /* Retrieve buffer information. */
1412 addr = rte_pktmbuf_mtod(buf, uintptr_t);
1413 length = DATA_LEN(buf);
1414 /* Retrieve Memory Region key for this memory pool. */
1415 lkey = txq_mp2mr(txq, txq_mb2mp(buf));
1416 if (unlikely(lkey == (uint32_t)-1)) {
1417 /* MR does not exist. */
1418 DEBUG("%p: unable to get MP <-> MR"
1419 " association", (void *)txq);
1420 /* Clean up TX element. */
1424 /* Update element. */
1427 rte_prefetch0((volatile void *)
1429 RTE_MBUF_PREFETCH_TO_FREE(elt_next->buf);
1430 /* Put packet into send queue. */
1431 if (length <= txq->max_inline)
1432 err = txq->if_qp->send_pending_inline
1438 err = txq->if_qp->send_pending
1446 sent_size += length;
1448 struct ibv_sge sges[MLX4_PMD_SGE_WR_N];
1449 struct tx_burst_sg_ret ret;
1451 ret = tx_burst_sg(txq, segs, elt, buf, elts_head,
1453 if (ret.length == (unsigned int)-1)
1455 RTE_MBUF_PREFETCH_TO_FREE(elt_next->buf);
1456 /* Put SG list into send queue. */
1457 err = txq->if_qp->send_pending_sg_list
1464 sent_size += ret.length;
1466 elts_head = elts_head_next;
1467 /* Increment sent bytes counter. */
1468 txq->stats.obytes += sent_size;
1471 /* Take a shortcut if nothing must be sent. */
1472 if (unlikely(i == 0))
1474 /* Increment sent packets counter. */
1475 txq->stats.opackets += i;
1476 /* Ring QP doorbell. */
1477 err = txq->if_qp->send_flush(txq->qp);
1478 if (unlikely(err)) {
1479 /* A nonzero value is not supposed to be returned.
1480 * Nothing can be done about it. */
1481 DEBUG("%p: send_flush() failed with error %d",
1484 txq->elts_head = elts_head;
1485 txq->elts_comp += elts_comp;
1486 txq->elts_comp_cd = elts_comp_cd;
1491 * Configure a TX queue.
1494 * Pointer to Ethernet device structure.
1496 * Pointer to TX queue structure.
1498 * Number of descriptors to configure in queue.
1500 * NUMA socket on which memory must be allocated.
1502 * Thresholds parameters.
1505 * 0 on success, errno value on failure.
1508 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
1509 unsigned int socket, const struct rte_eth_txconf *conf)
1511 struct priv *priv = dev->data->dev_private;
1517 struct ibv_exp_query_intf_params params;
1518 struct ibv_exp_qp_init_attr init;
1519 struct ibv_exp_res_domain_init_attr rd;
1520 struct ibv_exp_cq_init_attr cq;
1521 struct ibv_exp_qp_attr mod;
1523 enum ibv_exp_query_intf_status status;
1526 (void)conf; /* Thresholds configuration (ignored). */
1529 if ((desc == 0) || (desc % MLX4_PMD_SGE_WR_N)) {
1530 ERROR("%p: invalid number of TX descriptors (must be a"
1531 " multiple of %d)", (void *)dev, MLX4_PMD_SGE_WR_N);
1534 desc /= MLX4_PMD_SGE_WR_N;
1535 /* MRs will be registered in mp2mr[] later. */
1536 attr.rd = (struct ibv_exp_res_domain_init_attr){
1537 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
1538 IBV_EXP_RES_DOMAIN_MSG_MODEL),
1539 .thread_model = IBV_EXP_THREAD_SINGLE,
1540 .msg_model = IBV_EXP_MSG_HIGH_BW,
1542 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
1543 if (tmpl.rd == NULL) {
1545 ERROR("%p: RD creation failure: %s",
1546 (void *)dev, strerror(ret));
1549 attr.cq = (struct ibv_exp_cq_init_attr){
1550 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
1551 .res_domain = tmpl.rd,
1553 tmpl.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, NULL, 0, &attr.cq);
1554 if (tmpl.cq == NULL) {
1556 ERROR("%p: CQ creation failure: %s",
1557 (void *)dev, strerror(ret));
1560 DEBUG("priv->device_attr.max_qp_wr is %d",
1561 priv->device_attr.max_qp_wr);
1562 DEBUG("priv->device_attr.max_sge is %d",
1563 priv->device_attr.max_sge);
1564 attr.init = (struct ibv_exp_qp_init_attr){
1565 /* CQ to be associated with the send queue. */
1567 /* CQ to be associated with the receive queue. */
1570 /* Max number of outstanding WRs. */
1571 .max_send_wr = ((priv->device_attr.max_qp_wr < desc) ?
1572 priv->device_attr.max_qp_wr :
1574 /* Max number of scatter/gather elements in a WR. */
1575 .max_send_sge = ((priv->device_attr.max_sge <
1576 MLX4_PMD_SGE_WR_N) ?
1577 priv->device_attr.max_sge :
1579 .max_inline_data = MLX4_PMD_MAX_INLINE,
1581 .qp_type = IBV_QPT_RAW_PACKET,
1582 /* Do *NOT* enable this, completions events are managed per
1586 .res_domain = tmpl.rd,
1587 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
1588 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
1590 tmpl.qp = ibv_exp_create_qp(priv->ctx, &attr.init);
1591 if (tmpl.qp == NULL) {
1592 ret = (errno ? errno : EINVAL);
1593 ERROR("%p: QP creation failure: %s",
1594 (void *)dev, strerror(ret));
1597 /* ibv_create_qp() updates this value. */
1598 tmpl.max_inline = attr.init.cap.max_inline_data;
1599 attr.mod = (struct ibv_exp_qp_attr){
1600 /* Move the QP to this state. */
1601 .qp_state = IBV_QPS_INIT,
1602 /* Primary port number. */
1603 .port_num = priv->port
1605 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod,
1606 (IBV_EXP_QP_STATE | IBV_EXP_QP_PORT));
1608 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
1609 (void *)dev, strerror(ret));
1612 ret = txq_alloc_elts(&tmpl, desc);
1614 ERROR("%p: TXQ allocation failed: %s",
1615 (void *)dev, strerror(ret));
1618 attr.mod = (struct ibv_exp_qp_attr){
1619 .qp_state = IBV_QPS_RTR
1621 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
1623 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
1624 (void *)dev, strerror(ret));
1627 attr.mod.qp_state = IBV_QPS_RTS;
1628 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
1630 ERROR("%p: QP state to IBV_QPS_RTS failed: %s",
1631 (void *)dev, strerror(ret));
1634 attr.params = (struct ibv_exp_query_intf_params){
1635 .intf_scope = IBV_EXP_INTF_GLOBAL,
1636 .intf = IBV_EXP_INTF_CQ,
1639 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
1640 if (tmpl.if_cq == NULL) {
1641 ERROR("%p: CQ interface family query failed with status %d",
1642 (void *)dev, status);
1645 attr.params = (struct ibv_exp_query_intf_params){
1646 .intf_scope = IBV_EXP_INTF_GLOBAL,
1647 .intf = IBV_EXP_INTF_QP_BURST,
1649 #ifdef HAVE_EXP_QP_BURST_CREATE_DISABLE_ETH_LOOPBACK
1650 /* MC loopback must be disabled when not using a VF. */
1653 IBV_EXP_QP_BURST_CREATE_DISABLE_ETH_LOOPBACK :
1657 tmpl.if_qp = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
1658 if (tmpl.if_qp == NULL) {
1659 ERROR("%p: QP interface family query failed with status %d",
1660 (void *)dev, status);
1663 /* Clean up txq in case we're reinitializing it. */
1664 DEBUG("%p: cleaning-up old txq just in case", (void *)txq);
1667 DEBUG("%p: txq updated with %p", (void *)txq, (void *)&tmpl);
1668 /* Pre-register known mempools. */
1669 rte_mempool_walk(txq_mp2mr_iter, txq);
1679 * DPDK callback to configure a TX queue.
1682 * Pointer to Ethernet device structure.
1686 * Number of descriptors to configure in queue.
1688 * NUMA socket on which memory must be allocated.
1690 * Thresholds parameters.
1693 * 0 on success, negative errno value on failure.
1696 mlx4_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1697 unsigned int socket, const struct rte_eth_txconf *conf)
1699 struct priv *priv = dev->data->dev_private;
1700 struct txq *txq = (*priv->txqs)[idx];
1704 DEBUG("%p: configuring queue %u for %u descriptors",
1705 (void *)dev, idx, desc);
1706 if (idx >= priv->txqs_n) {
1707 ERROR("%p: queue index out of range (%u >= %u)",
1708 (void *)dev, idx, priv->txqs_n);
1713 DEBUG("%p: reusing already allocated queue index %u (%p)",
1714 (void *)dev, idx, (void *)txq);
1715 if (priv->started) {
1719 (*priv->txqs)[idx] = NULL;
1722 txq = rte_calloc_socket("TXQ", 1, sizeof(*txq), 0, socket);
1724 ERROR("%p: unable to allocate queue index %u",
1730 ret = txq_setup(dev, txq, desc, socket, conf);
1734 txq->stats.idx = idx;
1735 DEBUG("%p: adding TX queue %p to list",
1736 (void *)dev, (void *)txq);
1737 (*priv->txqs)[idx] = txq;
1738 /* Update send callback. */
1739 dev->tx_pkt_burst = mlx4_tx_burst;
1746 * DPDK callback to release a TX queue.
1749 * Generic TX queue pointer.
1752 mlx4_tx_queue_release(void *dpdk_txq)
1754 struct txq *txq = (struct txq *)dpdk_txq;
1762 for (i = 0; (i != priv->txqs_n); ++i)
1763 if ((*priv->txqs)[i] == txq) {
1764 DEBUG("%p: removing TX queue %p from list",
1765 (void *)priv->dev, (void *)txq);
1766 (*priv->txqs)[i] = NULL;
1774 /* RX queues handling. */
1777 * Allocate RX queue elements with scattered packets support.
1780 * Pointer to RX queue structure.
1782 * Number of elements to allocate.
1784 * If not NULL, fetch buffers from this array instead of allocating them
1785 * with rte_pktmbuf_alloc().
1788 * 0 on success, errno value on failure.
1791 rxq_alloc_elts_sp(struct rxq *rxq, unsigned int elts_n,
1792 struct rte_mbuf **pool)
1795 struct rxq_elt_sp (*elts)[elts_n] =
1796 rte_calloc_socket("RXQ elements", 1, sizeof(*elts), 0,
1801 ERROR("%p: can't allocate packets array", (void *)rxq);
1805 /* For each WR (packet). */
1806 for (i = 0; (i != elts_n); ++i) {
1808 struct rxq_elt_sp *elt = &(*elts)[i];
1809 struct ibv_recv_wr *wr = &elt->wr;
1810 struct ibv_sge (*sges)[(elemof(elt->sges))] = &elt->sges;
1812 /* These two arrays must have the same size. */
1813 assert(elemof(elt->sges) == elemof(elt->bufs));
1816 wr->next = &(*elts)[(i + 1)].wr;
1817 wr->sg_list = &(*sges)[0];
1818 wr->num_sge = elemof(*sges);
1819 /* For each SGE (segment). */
1820 for (j = 0; (j != elemof(elt->bufs)); ++j) {
1821 struct ibv_sge *sge = &(*sges)[j];
1822 struct rte_mbuf *buf;
1826 assert(buf != NULL);
1827 rte_pktmbuf_reset(buf);
1829 buf = rte_pktmbuf_alloc(rxq->mp);
1831 assert(pool == NULL);
1832 ERROR("%p: empty mbuf pool", (void *)rxq);
1837 /* Headroom is reserved by rte_pktmbuf_alloc(). */
1838 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
1839 /* Buffer is supposed to be empty. */
1840 assert(rte_pktmbuf_data_len(buf) == 0);
1841 assert(rte_pktmbuf_pkt_len(buf) == 0);
1842 /* sge->addr must be able to store a pointer. */
1843 assert(sizeof(sge->addr) >= sizeof(uintptr_t));
1845 /* The first SGE keeps its headroom. */
1846 sge->addr = rte_pktmbuf_mtod(buf, uintptr_t);
1847 sge->length = (buf->buf_len -
1848 RTE_PKTMBUF_HEADROOM);
1850 /* Subsequent SGEs lose theirs. */
1851 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
1852 SET_DATA_OFF(buf, 0);
1853 sge->addr = (uintptr_t)buf->buf_addr;
1854 sge->length = buf->buf_len;
1856 sge->lkey = rxq->mr->lkey;
1857 /* Redundant check for tailroom. */
1858 assert(sge->length == rte_pktmbuf_tailroom(buf));
1861 /* The last WR pointer must be NULL. */
1862 (*elts)[(i - 1)].wr.next = NULL;
1863 DEBUG("%p: allocated and configured %u WRs (%zu segments)",
1864 (void *)rxq, elts_n, (elts_n * elemof((*elts)[0].sges)));
1865 rxq->elts_n = elts_n;
1867 rxq->elts.sp = elts;
1872 assert(pool == NULL);
1873 for (i = 0; (i != elemof(*elts)); ++i) {
1875 struct rxq_elt_sp *elt = &(*elts)[i];
1877 for (j = 0; (j != elemof(elt->bufs)); ++j) {
1878 struct rte_mbuf *buf = elt->bufs[j];
1881 rte_pktmbuf_free_seg(buf);
1886 DEBUG("%p: failed, freed everything", (void *)rxq);
1892 * Free RX queue elements with scattered packets support.
1895 * Pointer to RX queue structure.
1898 rxq_free_elts_sp(struct rxq *rxq)
1901 unsigned int elts_n = rxq->elts_n;
1902 struct rxq_elt_sp (*elts)[elts_n] = rxq->elts.sp;
1904 DEBUG("%p: freeing WRs", (void *)rxq);
1906 rxq->elts.sp = NULL;
1909 for (i = 0; (i != elemof(*elts)); ++i) {
1911 struct rxq_elt_sp *elt = &(*elts)[i];
1913 for (j = 0; (j != elemof(elt->bufs)); ++j) {
1914 struct rte_mbuf *buf = elt->bufs[j];
1917 rte_pktmbuf_free_seg(buf);
1924 * Allocate RX queue elements.
1927 * Pointer to RX queue structure.
1929 * Number of elements to allocate.
1931 * If not NULL, fetch buffers from this array instead of allocating them
1932 * with rte_pktmbuf_alloc().
1935 * 0 on success, errno value on failure.
1938 rxq_alloc_elts(struct rxq *rxq, unsigned int elts_n, struct rte_mbuf **pool)
1941 struct rxq_elt (*elts)[elts_n] =
1942 rte_calloc_socket("RXQ elements", 1, sizeof(*elts), 0,
1947 ERROR("%p: can't allocate packets array", (void *)rxq);
1951 /* For each WR (packet). */
1952 for (i = 0; (i != elts_n); ++i) {
1953 struct rxq_elt *elt = &(*elts)[i];
1954 struct ibv_recv_wr *wr = &elt->wr;
1955 struct ibv_sge *sge = &(*elts)[i].sge;
1956 struct rte_mbuf *buf;
1960 assert(buf != NULL);
1961 rte_pktmbuf_reset(buf);
1963 buf = rte_pktmbuf_alloc(rxq->mp);
1965 assert(pool == NULL);
1966 ERROR("%p: empty mbuf pool", (void *)rxq);
1970 /* Configure WR. Work request ID contains its own index in
1971 * the elts array and the offset between SGE buffer header and
1973 WR_ID(wr->wr_id).id = i;
1974 WR_ID(wr->wr_id).offset =
1975 (((uintptr_t)buf->buf_addr + RTE_PKTMBUF_HEADROOM) -
1977 wr->next = &(*elts)[(i + 1)].wr;
1980 /* Headroom is reserved by rte_pktmbuf_alloc(). */
1981 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
1982 /* Buffer is supposed to be empty. */
1983 assert(rte_pktmbuf_data_len(buf) == 0);
1984 assert(rte_pktmbuf_pkt_len(buf) == 0);
1985 /* sge->addr must be able to store a pointer. */
1986 assert(sizeof(sge->addr) >= sizeof(uintptr_t));
1987 /* SGE keeps its headroom. */
1988 sge->addr = (uintptr_t)
1989 ((uint8_t *)buf->buf_addr + RTE_PKTMBUF_HEADROOM);
1990 sge->length = (buf->buf_len - RTE_PKTMBUF_HEADROOM);
1991 sge->lkey = rxq->mr->lkey;
1992 /* Redundant check for tailroom. */
1993 assert(sge->length == rte_pktmbuf_tailroom(buf));
1994 /* Make sure elts index and SGE mbuf pointer can be deduced
1996 if ((WR_ID(wr->wr_id).id != i) ||
1997 ((void *)((uintptr_t)sge->addr -
1998 WR_ID(wr->wr_id).offset) != buf)) {
1999 ERROR("%p: cannot store index and offset in WR ID",
2002 rte_pktmbuf_free(buf);
2007 /* The last WR pointer must be NULL. */
2008 (*elts)[(i - 1)].wr.next = NULL;
2009 DEBUG("%p: allocated and configured %u single-segment WRs",
2010 (void *)rxq, elts_n);
2011 rxq->elts_n = elts_n;
2013 rxq->elts.no_sp = elts;
2018 assert(pool == NULL);
2019 for (i = 0; (i != elemof(*elts)); ++i) {
2020 struct rxq_elt *elt = &(*elts)[i];
2021 struct rte_mbuf *buf;
2023 if (elt->sge.addr == 0)
2025 assert(WR_ID(elt->wr.wr_id).id == i);
2026 buf = (void *)((uintptr_t)elt->sge.addr -
2027 WR_ID(elt->wr.wr_id).offset);
2028 rte_pktmbuf_free_seg(buf);
2032 DEBUG("%p: failed, freed everything", (void *)rxq);
2038 * Free RX queue elements.
2041 * Pointer to RX queue structure.
2044 rxq_free_elts(struct rxq *rxq)
2047 unsigned int elts_n = rxq->elts_n;
2048 struct rxq_elt (*elts)[elts_n] = rxq->elts.no_sp;
2050 DEBUG("%p: freeing WRs", (void *)rxq);
2052 rxq->elts.no_sp = NULL;
2055 for (i = 0; (i != elemof(*elts)); ++i) {
2056 struct rxq_elt *elt = &(*elts)[i];
2057 struct rte_mbuf *buf;
2059 if (elt->sge.addr == 0)
2061 assert(WR_ID(elt->wr.wr_id).id == i);
2062 buf = (void *)((uintptr_t)elt->sge.addr -
2063 WR_ID(elt->wr.wr_id).offset);
2064 rte_pktmbuf_free_seg(buf);
2070 * Delete flow steering rule.
2073 * Pointer to RX queue structure.
2075 * MAC address index.
2080 rxq_del_flow(struct rxq *rxq, unsigned int mac_index, unsigned int vlan_index)
2083 struct priv *priv = rxq->priv;
2084 const uint8_t (*mac)[ETHER_ADDR_LEN] =
2085 (const uint8_t (*)[ETHER_ADDR_LEN])
2086 priv->mac[mac_index].addr_bytes;
2088 assert(rxq->mac_flow[mac_index][vlan_index] != NULL);
2089 DEBUG("%p: removing MAC address %02x:%02x:%02x:%02x:%02x:%02x index %u"
2090 " (VLAN ID %" PRIu16 ")",
2092 (*mac)[0], (*mac)[1], (*mac)[2], (*mac)[3], (*mac)[4], (*mac)[5],
2093 mac_index, priv->vlan_filter[vlan_index].id);
2094 claim_zero(ibv_destroy_flow(rxq->mac_flow[mac_index][vlan_index]));
2095 rxq->mac_flow[mac_index][vlan_index] = NULL;
2099 * Unregister a MAC address from a RX queue.
2102 * Pointer to RX queue structure.
2104 * MAC address index.
2107 rxq_mac_addr_del(struct rxq *rxq, unsigned int mac_index)
2109 struct priv *priv = rxq->priv;
2111 unsigned int vlans = 0;
2113 assert(mac_index < elemof(priv->mac));
2114 if (!BITFIELD_ISSET(rxq->mac_configured, mac_index))
2116 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
2117 if (!priv->vlan_filter[i].enabled)
2119 rxq_del_flow(rxq, mac_index, i);
2123 rxq_del_flow(rxq, mac_index, 0);
2125 BITFIELD_RESET(rxq->mac_configured, mac_index);
2129 * Unregister all MAC addresses from a RX queue.
2132 * Pointer to RX queue structure.
2135 rxq_mac_addrs_del(struct rxq *rxq)
2137 struct priv *priv = rxq->priv;
2140 for (i = 0; (i != elemof(priv->mac)); ++i)
2141 rxq_mac_addr_del(rxq, i);
2145 * Add single flow steering rule.
2148 * Pointer to RX queue structure.
2150 * MAC address index to register.
2152 * VLAN index. Use -1 for a flow without VLAN.
2155 * 0 on success, errno value on failure.
2158 rxq_add_flow(struct rxq *rxq, unsigned int mac_index, unsigned int vlan_index)
2160 struct ibv_flow *flow;
2161 struct priv *priv = rxq->priv;
2162 const uint8_t (*mac)[ETHER_ADDR_LEN] =
2163 (const uint8_t (*)[ETHER_ADDR_LEN])
2164 priv->mac[mac_index].addr_bytes;
2166 /* Allocate flow specification on the stack. */
2167 struct __attribute__((packed)) {
2168 struct ibv_flow_attr attr;
2169 struct ibv_flow_spec_eth spec;
2171 struct ibv_flow_attr *attr = &data.attr;
2172 struct ibv_flow_spec_eth *spec = &data.spec;
2174 assert(mac_index < elemof(priv->mac));
2175 assert((vlan_index < elemof(priv->vlan_filter)) || (vlan_index == -1u));
2177 * No padding must be inserted by the compiler between attr and spec.
2178 * This layout is expected by libibverbs.
2180 assert(((uint8_t *)attr + sizeof(*attr)) == (uint8_t *)spec);
2181 *attr = (struct ibv_flow_attr){
2182 .type = IBV_FLOW_ATTR_NORMAL,
2188 *spec = (struct ibv_flow_spec_eth){
2189 .type = IBV_FLOW_SPEC_ETH,
2190 .size = sizeof(*spec),
2193 (*mac)[0], (*mac)[1], (*mac)[2],
2194 (*mac)[3], (*mac)[4], (*mac)[5]
2196 .vlan_tag = ((vlan_index != -1u) ?
2197 htons(priv->vlan_filter[vlan_index].id) :
2201 .dst_mac = "\xff\xff\xff\xff\xff\xff",
2202 .vlan_tag = ((vlan_index != -1u) ? htons(0xfff) : 0),
2205 DEBUG("%p: adding MAC address %02x:%02x:%02x:%02x:%02x:%02x index %u"
2206 " (VLAN %s %" PRIu16 ")",
2208 (*mac)[0], (*mac)[1], (*mac)[2], (*mac)[3], (*mac)[4], (*mac)[5],
2210 ((vlan_index != -1u) ? "ID" : "index"),
2211 ((vlan_index != -1u) ? priv->vlan_filter[vlan_index].id : -1u));
2212 /* Create related flow. */
2214 flow = ibv_create_flow(rxq->qp, attr);
2216 /* It's not clear whether errno is always set in this case. */
2217 ERROR("%p: flow configuration failed, errno=%d: %s",
2219 (errno ? strerror(errno) : "Unknown error"));
2224 if (vlan_index == -1u)
2226 assert(rxq->mac_flow[mac_index][vlan_index] == NULL);
2227 rxq->mac_flow[mac_index][vlan_index] = flow;
2232 * Register a MAC address in a RX queue.
2235 * Pointer to RX queue structure.
2237 * MAC address index to register.
2240 * 0 on success, errno value on failure.
2243 rxq_mac_addr_add(struct rxq *rxq, unsigned int mac_index)
2245 struct priv *priv = rxq->priv;
2247 unsigned int vlans = 0;
2250 assert(mac_index < elemof(priv->mac));
2251 if (BITFIELD_ISSET(rxq->mac_configured, mac_index))
2252 rxq_mac_addr_del(rxq, mac_index);
2253 /* Fill VLAN specifications. */
2254 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
2255 if (!priv->vlan_filter[i].enabled)
2257 /* Create related flow. */
2258 ret = rxq_add_flow(rxq, mac_index, i);
2263 /* Failure, rollback. */
2265 if (priv->vlan_filter[--i].enabled)
2266 rxq_del_flow(rxq, mac_index, i);
2270 /* In case there is no VLAN filter. */
2272 ret = rxq_add_flow(rxq, mac_index, -1);
2276 BITFIELD_SET(rxq->mac_configured, mac_index);
2281 * Register all MAC addresses in a RX queue.
2284 * Pointer to RX queue structure.
2287 * 0 on success, errno value on failure.
2290 rxq_mac_addrs_add(struct rxq *rxq)
2292 struct priv *priv = rxq->priv;
2296 for (i = 0; (i != elemof(priv->mac)); ++i) {
2297 if (!BITFIELD_ISSET(priv->mac_configured, i))
2299 ret = rxq_mac_addr_add(rxq, i);
2302 /* Failure, rollback. */
2304 rxq_mac_addr_del(rxq, --i);
2312 * Unregister a MAC address.
2314 * In RSS mode, the MAC address is unregistered from the parent queue,
2315 * otherwise it is unregistered from each queue directly.
2318 * Pointer to private structure.
2320 * MAC address index.
2323 priv_mac_addr_del(struct priv *priv, unsigned int mac_index)
2327 assert(!priv->isolated);
2328 assert(mac_index < elemof(priv->mac));
2329 if (!BITFIELD_ISSET(priv->mac_configured, mac_index))
2332 rxq_mac_addr_del(LIST_FIRST(&priv->parents), mac_index);
2335 for (i = 0; (i != priv->dev->data->nb_rx_queues); ++i)
2336 rxq_mac_addr_del((*priv->rxqs)[i], mac_index);
2338 BITFIELD_RESET(priv->mac_configured, mac_index);
2342 * Register a MAC address.
2344 * In RSS mode, the MAC address is registered in the parent queue,
2345 * otherwise it is registered in each queue directly.
2348 * Pointer to private structure.
2350 * MAC address index to use.
2352 * MAC address to register.
2355 * 0 on success, errno value on failure.
2358 priv_mac_addr_add(struct priv *priv, unsigned int mac_index,
2359 const uint8_t (*mac)[ETHER_ADDR_LEN])
2364 assert(mac_index < elemof(priv->mac));
2365 /* First, make sure this address isn't already configured. */
2366 for (i = 0; (i != elemof(priv->mac)); ++i) {
2367 /* Skip this index, it's going to be reconfigured. */
2370 if (!BITFIELD_ISSET(priv->mac_configured, i))
2372 if (memcmp(priv->mac[i].addr_bytes, *mac, sizeof(*mac)))
2374 /* Address already configured elsewhere, return with error. */
2377 if (BITFIELD_ISSET(priv->mac_configured, mac_index))
2378 priv_mac_addr_del(priv, mac_index);
2379 priv->mac[mac_index] = (struct ether_addr){
2381 (*mac)[0], (*mac)[1], (*mac)[2],
2382 (*mac)[3], (*mac)[4], (*mac)[5]
2385 /* If device isn't started, this is all we need to do. */
2386 if (!priv->started) {
2388 /* Verify that all queues have this index disabled. */
2389 for (i = 0; (i != priv->rxqs_n); ++i) {
2390 if ((*priv->rxqs)[i] == NULL)
2392 assert(!BITFIELD_ISSET
2393 ((*priv->rxqs)[i]->mac_configured, mac_index));
2399 ret = rxq_mac_addr_add(LIST_FIRST(&priv->parents), mac_index);
2404 for (i = 0; (i != priv->rxqs_n); ++i) {
2405 if ((*priv->rxqs)[i] == NULL)
2407 ret = rxq_mac_addr_add((*priv->rxqs)[i], mac_index);
2410 /* Failure, rollback. */
2412 if ((*priv->rxqs)[(--i)] != NULL)
2413 rxq_mac_addr_del((*priv->rxqs)[i], mac_index);
2417 BITFIELD_SET(priv->mac_configured, mac_index);
2422 * Clean up a RX queue.
2424 * Destroy objects, free allocated memory and reset the structure for reuse.
2427 * Pointer to RX queue structure.
2430 rxq_cleanup(struct rxq *rxq)
2432 struct ibv_exp_release_intf_params params;
2434 DEBUG("cleaning up %p", (void *)rxq);
2436 rxq_free_elts_sp(rxq);
2439 if (rxq->if_qp != NULL) {
2440 assert(rxq->priv != NULL);
2441 assert(rxq->priv->ctx != NULL);
2442 assert(rxq->qp != NULL);
2443 params = (struct ibv_exp_release_intf_params){
2446 claim_zero(ibv_exp_release_intf(rxq->priv->ctx,
2450 if (rxq->if_cq != NULL) {
2451 assert(rxq->priv != NULL);
2452 assert(rxq->priv->ctx != NULL);
2453 assert(rxq->cq != NULL);
2454 params = (struct ibv_exp_release_intf_params){
2457 claim_zero(ibv_exp_release_intf(rxq->priv->ctx,
2461 if (rxq->qp != NULL && !rxq->priv->isolated) {
2462 rxq_mac_addrs_del(rxq);
2464 if (rxq->qp != NULL)
2465 claim_zero(ibv_destroy_qp(rxq->qp));
2466 if (rxq->cq != NULL)
2467 claim_zero(ibv_destroy_cq(rxq->cq));
2468 if (rxq->channel != NULL)
2469 claim_zero(ibv_destroy_comp_channel(rxq->channel));
2470 if (rxq->rd != NULL) {
2471 struct ibv_exp_destroy_res_domain_attr attr = {
2475 assert(rxq->priv != NULL);
2476 assert(rxq->priv->ctx != NULL);
2477 claim_zero(ibv_exp_destroy_res_domain(rxq->priv->ctx,
2481 if (rxq->mr != NULL)
2482 claim_zero(ibv_dereg_mr(rxq->mr));
2483 memset(rxq, 0, sizeof(*rxq));
2487 * Translate RX completion flags to packet type.
2490 * RX completion flags returned by poll_length_flags().
2492 * @note: fix mlx4_dev_supported_ptypes_get() if any change here.
2495 * Packet type for struct rte_mbuf.
2497 static inline uint32_t
2498 rxq_cq_to_pkt_type(uint32_t flags)
2502 if (flags & IBV_EXP_CQ_RX_TUNNEL_PACKET)
2505 IBV_EXP_CQ_RX_OUTER_IPV4_PACKET,
2506 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN) |
2508 IBV_EXP_CQ_RX_OUTER_IPV6_PACKET,
2509 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN) |
2511 IBV_EXP_CQ_RX_IPV4_PACKET,
2512 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN) |
2514 IBV_EXP_CQ_RX_IPV6_PACKET,
2515 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN);
2519 IBV_EXP_CQ_RX_IPV4_PACKET,
2520 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN) |
2522 IBV_EXP_CQ_RX_IPV6_PACKET,
2523 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN);
2528 * Translate RX completion flags to offload flags.
2531 * Pointer to RX queue structure.
2533 * RX completion flags returned by poll_length_flags().
2536 * Offload flags (ol_flags) for struct rte_mbuf.
2538 static inline uint32_t
2539 rxq_cq_to_ol_flags(const struct rxq *rxq, uint32_t flags)
2541 uint32_t ol_flags = 0;
2546 IBV_EXP_CQ_RX_IP_CSUM_OK,
2547 PKT_RX_IP_CKSUM_GOOD) |
2549 IBV_EXP_CQ_RX_TCP_UDP_CSUM_OK,
2550 PKT_RX_L4_CKSUM_GOOD);
2551 if ((flags & IBV_EXP_CQ_RX_TUNNEL_PACKET) && (rxq->csum_l2tun))
2554 IBV_EXP_CQ_RX_OUTER_IP_CSUM_OK,
2555 PKT_RX_IP_CKSUM_GOOD) |
2557 IBV_EXP_CQ_RX_OUTER_TCP_UDP_CSUM_OK,
2558 PKT_RX_L4_CKSUM_GOOD);
2563 mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n);
2566 * DPDK callback for RX with scattered packets support.
2569 * Generic pointer to RX queue structure.
2571 * Array to store received packets.
2573 * Maximum number of packets in array.
2576 * Number of packets successfully received (<= pkts_n).
2579 mlx4_rx_burst_sp(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
2581 struct rxq *rxq = (struct rxq *)dpdk_rxq;
2582 struct rxq_elt_sp (*elts)[rxq->elts_n] = rxq->elts.sp;
2583 const unsigned int elts_n = rxq->elts_n;
2584 unsigned int elts_head = rxq->elts_head;
2585 struct ibv_recv_wr head;
2586 struct ibv_recv_wr **next = &head.next;
2587 struct ibv_recv_wr *bad_wr;
2589 unsigned int pkts_ret = 0;
2592 if (unlikely(!rxq->sp))
2593 return mlx4_rx_burst(dpdk_rxq, pkts, pkts_n);
2594 if (unlikely(elts == NULL)) /* See RTE_DEV_CMD_SET_MTU. */
2596 for (i = 0; (i != pkts_n); ++i) {
2597 struct rxq_elt_sp *elt = &(*elts)[elts_head];
2598 struct ibv_recv_wr *wr = &elt->wr;
2599 uint64_t wr_id = wr->wr_id;
2601 unsigned int pkt_buf_len;
2602 struct rte_mbuf *pkt_buf = NULL; /* Buffer returned in pkts. */
2603 struct rte_mbuf **pkt_buf_next = &pkt_buf;
2604 unsigned int seg_headroom = RTE_PKTMBUF_HEADROOM;
2608 /* Sanity checks. */
2612 assert(wr_id < rxq->elts_n);
2613 assert(wr->sg_list == elt->sges);
2614 assert(wr->num_sge == elemof(elt->sges));
2615 assert(elts_head < rxq->elts_n);
2616 assert(rxq->elts_head < rxq->elts_n);
2617 ret = rxq->if_cq->poll_length_flags(rxq->cq, NULL, NULL,
2619 if (unlikely(ret < 0)) {
2623 DEBUG("rxq=%p, poll_length() failed (ret=%d)",
2625 /* ibv_poll_cq() must be used in case of failure. */
2626 wcs_n = ibv_poll_cq(rxq->cq, 1, &wc);
2627 if (unlikely(wcs_n == 0))
2629 if (unlikely(wcs_n < 0)) {
2630 DEBUG("rxq=%p, ibv_poll_cq() failed (wcs_n=%d)",
2631 (void *)rxq, wcs_n);
2635 if (unlikely(wc.status != IBV_WC_SUCCESS)) {
2636 /* Whatever, just repost the offending WR. */
2637 DEBUG("rxq=%p, wr_id=%" PRIu64 ": bad work"
2638 " completion status (%d): %s",
2639 (void *)rxq, wc.wr_id, wc.status,
2640 ibv_wc_status_str(wc.status));
2641 /* Increment dropped packets counter. */
2642 ++rxq->stats.idropped;
2643 /* Link completed WRs together for repost. */
2654 /* Link completed WRs together for repost. */
2658 * Replace spent segments with new ones, concatenate and
2659 * return them as pkt_buf.
2662 struct ibv_sge *sge = &elt->sges[j];
2663 struct rte_mbuf *seg = elt->bufs[j];
2664 struct rte_mbuf *rep;
2665 unsigned int seg_tailroom;
2668 * Fetch initial bytes of packet descriptor into a
2669 * cacheline while allocating rep.
2672 rep = rte_mbuf_raw_alloc(rxq->mp);
2673 if (unlikely(rep == NULL)) {
2675 * Unable to allocate a replacement mbuf,
2678 DEBUG("rxq=%p, wr_id=%" PRIu64 ":"
2679 " can't allocate a new mbuf",
2680 (void *)rxq, wr_id);
2681 if (pkt_buf != NULL) {
2682 *pkt_buf_next = NULL;
2683 rte_pktmbuf_free(pkt_buf);
2685 /* Increase out of memory counters. */
2686 ++rxq->stats.rx_nombuf;
2687 ++rxq->priv->dev->data->rx_mbuf_alloc_failed;
2691 /* Poison user-modifiable fields in rep. */
2692 NEXT(rep) = (void *)((uintptr_t)-1);
2693 SET_DATA_OFF(rep, 0xdead);
2694 DATA_LEN(rep) = 0xd00d;
2695 PKT_LEN(rep) = 0xdeadd00d;
2696 NB_SEGS(rep) = 0x2a;
2700 * Clear special flags in mbuf to avoid
2701 * crashing while freeing.
2704 ~(uint64_t)(IND_ATTACHED_MBUF |
2707 assert(rep->buf_len == seg->buf_len);
2708 /* Reconfigure sge to use rep instead of seg. */
2709 assert(sge->lkey == rxq->mr->lkey);
2710 sge->addr = ((uintptr_t)rep->buf_addr + seg_headroom);
2713 /* Update pkt_buf if it's the first segment, or link
2714 * seg to the previous one and update pkt_buf_next. */
2715 *pkt_buf_next = seg;
2716 pkt_buf_next = &NEXT(seg);
2717 /* Update seg information. */
2718 seg_tailroom = (seg->buf_len - seg_headroom);
2719 assert(sge->length == seg_tailroom);
2720 SET_DATA_OFF(seg, seg_headroom);
2721 if (likely(len <= seg_tailroom)) {
2723 DATA_LEN(seg) = len;
2726 assert(rte_pktmbuf_headroom(seg) ==
2728 assert(rte_pktmbuf_tailroom(seg) ==
2729 (seg_tailroom - len));
2732 DATA_LEN(seg) = seg_tailroom;
2733 PKT_LEN(seg) = seg_tailroom;
2735 assert(rte_pktmbuf_headroom(seg) == seg_headroom);
2736 assert(rte_pktmbuf_tailroom(seg) == 0);
2737 /* Fix len and clear headroom for next segments. */
2738 len -= seg_tailroom;
2741 /* Update head and tail segments. */
2742 *pkt_buf_next = NULL;
2743 assert(pkt_buf != NULL);
2745 NB_SEGS(pkt_buf) = j;
2746 PORT(pkt_buf) = rxq->port_id;
2747 PKT_LEN(pkt_buf) = pkt_buf_len;
2748 pkt_buf->packet_type = rxq_cq_to_pkt_type(flags);
2749 pkt_buf->ol_flags = rxq_cq_to_ol_flags(rxq, flags);
2751 /* Return packet. */
2752 *(pkts++) = pkt_buf;
2754 /* Increase bytes counter. */
2755 rxq->stats.ibytes += pkt_buf_len;
2757 if (++elts_head >= elts_n)
2761 if (unlikely(i == 0))
2765 ret = ibv_post_recv(rxq->qp, head.next, &bad_wr);
2766 if (unlikely(ret)) {
2767 /* Inability to repost WRs is fatal. */
2768 DEBUG("%p: ibv_post_recv(): failed for WR %p: %s",
2774 rxq->elts_head = elts_head;
2775 /* Increase packets counter. */
2776 rxq->stats.ipackets += pkts_ret;
2781 * DPDK callback for RX.
2783 * The following function is the same as mlx4_rx_burst_sp(), except it doesn't
2784 * manage scattered packets. Improves performance when MRU is lower than the
2785 * size of the first segment.
2788 * Generic pointer to RX queue structure.
2790 * Array to store received packets.
2792 * Maximum number of packets in array.
2795 * Number of packets successfully received (<= pkts_n).
2798 mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
2800 struct rxq *rxq = (struct rxq *)dpdk_rxq;
2801 struct rxq_elt (*elts)[rxq->elts_n] = rxq->elts.no_sp;
2802 const unsigned int elts_n = rxq->elts_n;
2803 unsigned int elts_head = rxq->elts_head;
2804 struct ibv_sge sges[pkts_n];
2806 unsigned int pkts_ret = 0;
2809 if (unlikely(rxq->sp))
2810 return mlx4_rx_burst_sp(dpdk_rxq, pkts, pkts_n);
2811 for (i = 0; (i != pkts_n); ++i) {
2812 struct rxq_elt *elt = &(*elts)[elts_head];
2813 struct ibv_recv_wr *wr = &elt->wr;
2814 uint64_t wr_id = wr->wr_id;
2816 struct rte_mbuf *seg = (void *)((uintptr_t)elt->sge.addr -
2817 WR_ID(wr_id).offset);
2818 struct rte_mbuf *rep;
2821 /* Sanity checks. */
2822 assert(WR_ID(wr_id).id < rxq->elts_n);
2823 assert(wr->sg_list == &elt->sge);
2824 assert(wr->num_sge == 1);
2825 assert(elts_head < rxq->elts_n);
2826 assert(rxq->elts_head < rxq->elts_n);
2828 * Fetch initial bytes of packet descriptor into a
2829 * cacheline while allocating rep.
2831 rte_mbuf_prefetch_part1(seg);
2832 rte_mbuf_prefetch_part2(seg);
2833 ret = rxq->if_cq->poll_length_flags(rxq->cq, NULL, NULL,
2835 if (unlikely(ret < 0)) {
2839 DEBUG("rxq=%p, poll_length() failed (ret=%d)",
2841 /* ibv_poll_cq() must be used in case of failure. */
2842 wcs_n = ibv_poll_cq(rxq->cq, 1, &wc);
2843 if (unlikely(wcs_n == 0))
2845 if (unlikely(wcs_n < 0)) {
2846 DEBUG("rxq=%p, ibv_poll_cq() failed (wcs_n=%d)",
2847 (void *)rxq, wcs_n);
2851 if (unlikely(wc.status != IBV_WC_SUCCESS)) {
2852 /* Whatever, just repost the offending WR. */
2853 DEBUG("rxq=%p, wr_id=%" PRIu64 ": bad work"
2854 " completion status (%d): %s",
2855 (void *)rxq, wc.wr_id, wc.status,
2856 ibv_wc_status_str(wc.status));
2857 /* Increment dropped packets counter. */
2858 ++rxq->stats.idropped;
2859 /* Add SGE to array for repost. */
2868 rep = rte_mbuf_raw_alloc(rxq->mp);
2869 if (unlikely(rep == NULL)) {
2871 * Unable to allocate a replacement mbuf,
2874 DEBUG("rxq=%p, wr_id=%" PRIu32 ":"
2875 " can't allocate a new mbuf",
2876 (void *)rxq, WR_ID(wr_id).id);
2877 /* Increase out of memory counters. */
2878 ++rxq->stats.rx_nombuf;
2879 ++rxq->priv->dev->data->rx_mbuf_alloc_failed;
2880 /* Add SGE to array for repost. */
2885 /* Reconfigure sge to use rep instead of seg. */
2886 elt->sge.addr = (uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM;
2887 assert(elt->sge.lkey == rxq->mr->lkey);
2888 WR_ID(wr->wr_id).offset =
2889 (((uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM) -
2891 assert(WR_ID(wr->wr_id).id == WR_ID(wr_id).id);
2893 /* Add SGE to array for repost. */
2896 /* Update seg information. */
2897 SET_DATA_OFF(seg, RTE_PKTMBUF_HEADROOM);
2899 PORT(seg) = rxq->port_id;
2902 DATA_LEN(seg) = len;
2903 seg->packet_type = rxq_cq_to_pkt_type(flags);
2904 seg->ol_flags = rxq_cq_to_ol_flags(rxq, flags);
2906 /* Return packet. */
2909 /* Increase bytes counter. */
2910 rxq->stats.ibytes += len;
2912 if (++elts_head >= elts_n)
2916 if (unlikely(i == 0))
2919 ret = rxq->if_qp->recv_burst(rxq->qp, sges, i);
2920 if (unlikely(ret)) {
2921 /* Inability to repost WRs is fatal. */
2922 DEBUG("%p: recv_burst(): failed (ret=%d)",
2927 rxq->elts_head = elts_head;
2928 /* Increase packets counter. */
2929 rxq->stats.ipackets += pkts_ret;
2934 * Allocate a Queue Pair.
2935 * Optionally setup inline receive if supported.
2938 * Pointer to private structure.
2940 * Completion queue to associate with QP.
2942 * Number of descriptors in QP (hint only).
2945 * QP pointer or NULL in case of error.
2947 static struct ibv_qp *
2948 rxq_setup_qp(struct priv *priv, struct ibv_cq *cq, uint16_t desc,
2949 struct ibv_exp_res_domain *rd)
2951 struct ibv_exp_qp_init_attr attr = {
2952 /* CQ to be associated with the send queue. */
2954 /* CQ to be associated with the receive queue. */
2957 /* Max number of outstanding WRs. */
2958 .max_recv_wr = ((priv->device_attr.max_qp_wr < desc) ?
2959 priv->device_attr.max_qp_wr :
2961 /* Max number of scatter/gather elements in a WR. */
2962 .max_recv_sge = ((priv->device_attr.max_sge <
2963 MLX4_PMD_SGE_WR_N) ?
2964 priv->device_attr.max_sge :
2967 .qp_type = IBV_QPT_RAW_PACKET,
2968 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
2969 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
2974 attr.max_inl_recv = priv->inl_recv_size;
2975 attr.comp_mask |= IBV_EXP_QP_INIT_ATTR_INL_RECV;
2976 return ibv_exp_create_qp(priv->ctx, &attr);
2980 * Allocate a RSS Queue Pair.
2981 * Optionally setup inline receive if supported.
2984 * Pointer to private structure.
2986 * Completion queue to associate with QP.
2988 * Number of descriptors in QP (hint only).
2990 * If nonzero, a number of children for parent QP and zero for a child.
2992 * Pointer for a parent in a child case, NULL otherwise.
2995 * QP pointer or NULL in case of error.
2997 static struct ibv_qp *
2998 rxq_setup_qp_rss(struct priv *priv, struct ibv_cq *cq, uint16_t desc,
2999 int children_n, struct ibv_exp_res_domain *rd,
3000 struct rxq *rxq_parent)
3002 struct ibv_exp_qp_init_attr attr = {
3003 /* CQ to be associated with the send queue. */
3005 /* CQ to be associated with the receive queue. */
3008 /* Max number of outstanding WRs. */
3009 .max_recv_wr = ((priv->device_attr.max_qp_wr < desc) ?
3010 priv->device_attr.max_qp_wr :
3012 /* Max number of scatter/gather elements in a WR. */
3013 .max_recv_sge = ((priv->device_attr.max_sge <
3014 MLX4_PMD_SGE_WR_N) ?
3015 priv->device_attr.max_sge :
3018 .qp_type = IBV_QPT_RAW_PACKET,
3019 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
3020 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN |
3021 IBV_EXP_QP_INIT_ATTR_QPG),
3026 attr.max_inl_recv = priv->inl_recv_size,
3027 attr.comp_mask |= IBV_EXP_QP_INIT_ATTR_INL_RECV;
3028 if (children_n > 0) {
3029 attr.qpg.qpg_type = IBV_EXP_QPG_PARENT;
3030 /* TSS isn't necessary. */
3031 attr.qpg.parent_attrib.tss_child_count = 0;
3032 attr.qpg.parent_attrib.rss_child_count =
3033 rte_align32pow2(children_n + 1) >> 1;
3034 DEBUG("initializing parent RSS queue");
3036 attr.qpg.qpg_type = IBV_EXP_QPG_CHILD_RX;
3037 attr.qpg.qpg_parent = rxq_parent->qp;
3038 DEBUG("initializing child RSS queue");
3040 return ibv_exp_create_qp(priv->ctx, &attr);
3044 * Reconfigure a RX queue with new parameters.
3046 * rxq_rehash() does not allocate mbufs, which, if not done from the right
3047 * thread (such as a control thread), may corrupt the pool.
3048 * In case of failure, the queue is left untouched.
3051 * Pointer to Ethernet device structure.
3056 * 0 on success, errno value on failure.
3059 rxq_rehash(struct rte_eth_dev *dev, struct rxq *rxq)
3061 struct priv *priv = rxq->priv;
3062 struct rxq tmpl = *rxq;
3063 unsigned int mbuf_n;
3064 unsigned int desc_n;
3065 struct rte_mbuf **pool;
3067 struct ibv_exp_qp_attr mod;
3068 struct ibv_recv_wr *bad_wr;
3069 unsigned int mb_len;
3072 mb_len = rte_pktmbuf_data_room_size(rxq->mp);
3073 DEBUG("%p: rehashing queue %p", (void *)dev, (void *)rxq);
3074 /* Number of descriptors and mbufs currently allocated. */
3075 desc_n = (tmpl.elts_n * (tmpl.sp ? MLX4_PMD_SGE_WR_N : 1));
3077 /* Toggle RX checksum offload if hardware supports it. */
3078 if (priv->hw_csum) {
3079 tmpl.csum = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3080 rxq->csum = tmpl.csum;
3082 if (priv->hw_csum_l2tun) {
3083 tmpl.csum_l2tun = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3084 rxq->csum_l2tun = tmpl.csum_l2tun;
3086 /* Enable scattered packets support for this queue if necessary. */
3087 assert(mb_len >= RTE_PKTMBUF_HEADROOM);
3088 if (dev->data->dev_conf.rxmode.enable_scatter &&
3089 (dev->data->dev_conf.rxmode.max_rx_pkt_len >
3090 (mb_len - RTE_PKTMBUF_HEADROOM))) {
3092 desc_n /= MLX4_PMD_SGE_WR_N;
3095 DEBUG("%p: %s scattered packets support (%u WRs)",
3096 (void *)dev, (tmpl.sp ? "enabling" : "disabling"), desc_n);
3097 /* If scatter mode is the same as before, nothing to do. */
3098 if (tmpl.sp == rxq->sp) {
3099 DEBUG("%p: nothing to do", (void *)dev);
3102 /* Remove attached flows if RSS is disabled (no parent queue). */
3103 if (!priv->rss && !priv->isolated) {
3104 rxq_mac_addrs_del(&tmpl);
3105 /* Update original queue in case of failure. */
3106 memcpy(rxq->mac_configured, tmpl.mac_configured,
3107 sizeof(rxq->mac_configured));
3108 memcpy(rxq->mac_flow, tmpl.mac_flow, sizeof(rxq->mac_flow));
3110 /* From now on, any failure will render the queue unusable.
3111 * Reinitialize QP. */
3114 mod = (struct ibv_exp_qp_attr){ .qp_state = IBV_QPS_RESET };
3115 err = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3117 ERROR("%p: cannot reset QP: %s", (void *)dev, strerror(err));
3121 mod = (struct ibv_exp_qp_attr){
3122 /* Move the QP to this state. */
3123 .qp_state = IBV_QPS_INIT,
3124 /* Primary port number. */
3125 .port_num = priv->port
3127 err = ibv_exp_modify_qp(tmpl.qp, &mod,
3131 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
3132 (void *)dev, strerror(err));
3137 err = ibv_resize_cq(tmpl.cq, desc_n);
3139 ERROR("%p: cannot resize CQ: %s", (void *)dev, strerror(err));
3143 /* Reconfigure flows. Do not care for errors. */
3144 if (!priv->rss && !priv->isolated) {
3145 rxq_mac_addrs_add(&tmpl);
3146 /* Update original queue in case of failure. */
3147 memcpy(rxq->mac_configured, tmpl.mac_configured,
3148 sizeof(rxq->mac_configured));
3149 memcpy(rxq->mac_flow, tmpl.mac_flow, sizeof(rxq->mac_flow));
3151 /* Allocate pool. */
3152 pool = rte_malloc(__func__, (mbuf_n * sizeof(*pool)), 0);
3154 ERROR("%p: cannot allocate memory", (void *)dev);
3157 /* Snatch mbufs from original queue. */
3160 struct rxq_elt_sp (*elts)[rxq->elts_n] = rxq->elts.sp;
3162 for (i = 0; (i != elemof(*elts)); ++i) {
3163 struct rxq_elt_sp *elt = &(*elts)[i];
3166 for (j = 0; (j != elemof(elt->bufs)); ++j) {
3167 assert(elt->bufs[j] != NULL);
3168 pool[k++] = elt->bufs[j];
3172 struct rxq_elt (*elts)[rxq->elts_n] = rxq->elts.no_sp;
3174 for (i = 0; (i != elemof(*elts)); ++i) {
3175 struct rxq_elt *elt = &(*elts)[i];
3176 struct rte_mbuf *buf = (void *)
3177 ((uintptr_t)elt->sge.addr -
3178 WR_ID(elt->wr.wr_id).offset);
3180 assert(WR_ID(elt->wr.wr_id).id == i);
3184 assert(k == mbuf_n);
3186 tmpl.elts.sp = NULL;
3187 assert((void *)&tmpl.elts.sp == (void *)&tmpl.elts.no_sp);
3189 rxq_alloc_elts_sp(&tmpl, desc_n, pool) :
3190 rxq_alloc_elts(&tmpl, desc_n, pool));
3192 ERROR("%p: cannot reallocate WRs, aborting", (void *)dev);
3197 assert(tmpl.elts_n == desc_n);
3198 assert(tmpl.elts.sp != NULL);
3200 /* Clean up original data. */
3202 rte_free(rxq->elts.sp);
3203 rxq->elts.sp = NULL;
3207 err = ibv_post_recv(tmpl.qp,
3209 &(*tmpl.elts.sp)[0].wr :
3210 &(*tmpl.elts.no_sp)[0].wr),
3213 ERROR("%p: ibv_post_recv() failed for WR %p: %s",
3219 mod = (struct ibv_exp_qp_attr){
3220 .qp_state = IBV_QPS_RTR
3222 err = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3224 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
3225 (void *)dev, strerror(err));
3233 * Create verbs QP resources associated with a rxq.
3236 * Pointer to RX queue structure.
3238 * Number of descriptors to configure in queue.
3240 * If true, the queue is disabled because its index is higher or
3241 * equal to the real number of queues, which must be a power of 2.
3243 * The number of children in a parent case, zero for a child.
3245 * The pointer to a parent RX structure for a child in RSS case,
3249 * 0 on success, errno value on failure.
3252 rxq_create_qp(struct rxq *rxq,
3256 struct rxq *rxq_parent)
3259 struct ibv_exp_qp_attr mod;
3260 struct ibv_exp_query_intf_params params;
3261 enum ibv_exp_query_intf_status status;
3262 struct ibv_recv_wr *bad_wr;
3263 int parent = (children_n > 0);
3264 struct priv *priv = rxq->priv;
3266 if (priv->rss && !inactive && (rxq_parent || parent))
3267 rxq->qp = rxq_setup_qp_rss(priv, rxq->cq, desc,
3268 children_n, rxq->rd,
3271 rxq->qp = rxq_setup_qp(priv, rxq->cq, desc, rxq->rd);
3272 if (rxq->qp == NULL) {
3273 ret = (errno ? errno : EINVAL);
3274 ERROR("QP creation failure: %s",
3278 mod = (struct ibv_exp_qp_attr){
3279 /* Move the QP to this state. */
3280 .qp_state = IBV_QPS_INIT,
3281 /* Primary port number. */
3282 .port_num = priv->port
3284 ret = ibv_exp_modify_qp(rxq->qp, &mod,
3286 (parent ? IBV_EXP_QP_GROUP_RSS : 0) |
3289 ERROR("QP state to IBV_QPS_INIT failed: %s",
3293 if (!priv->isolated && (parent || !priv->rss)) {
3294 /* Configure MAC and broadcast addresses. */
3295 ret = rxq_mac_addrs_add(rxq);
3297 ERROR("QP flow attachment failed: %s",
3303 ret = ibv_post_recv(rxq->qp,
3305 &(*rxq->elts.sp)[0].wr :
3306 &(*rxq->elts.no_sp)[0].wr),
3309 ERROR("ibv_post_recv() failed for WR %p: %s",
3315 mod = (struct ibv_exp_qp_attr){
3316 .qp_state = IBV_QPS_RTR
3318 ret = ibv_exp_modify_qp(rxq->qp, &mod, IBV_EXP_QP_STATE);
3320 ERROR("QP state to IBV_QPS_RTR failed: %s",
3324 params = (struct ibv_exp_query_intf_params){
3325 .intf_scope = IBV_EXP_INTF_GLOBAL,
3326 .intf = IBV_EXP_INTF_QP_BURST,
3329 rxq->if_qp = ibv_exp_query_intf(priv->ctx, ¶ms, &status);
3330 if (rxq->if_qp == NULL) {
3331 ERROR("QP interface family query failed with status %d",
3339 * Configure a RX queue.
3342 * Pointer to Ethernet device structure.
3344 * Pointer to RX queue structure.
3346 * Number of descriptors to configure in queue.
3348 * NUMA socket on which memory must be allocated.
3350 * If true, the queue is disabled because its index is higher or
3351 * equal to the real number of queues, which must be a power of 2.
3353 * Thresholds parameters.
3355 * Memory pool for buffer allocations.
3357 * The number of children in a parent case, zero for a child.
3359 * The pointer to a parent RX structure (or NULL) in a child case,
3363 * 0 on success, errno value on failure.
3366 rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,
3367 unsigned int socket, int inactive,
3368 const struct rte_eth_rxconf *conf,
3369 struct rte_mempool *mp, int children_n,
3370 struct rxq *rxq_parent)
3372 struct priv *priv = dev->data->dev_private;
3379 struct ibv_exp_query_intf_params params;
3380 struct ibv_exp_cq_init_attr cq;
3381 struct ibv_exp_res_domain_init_attr rd;
3383 enum ibv_exp_query_intf_status status;
3384 unsigned int mb_len;
3386 int parent = (children_n > 0);
3388 (void)conf; /* Thresholds configuration (ignored). */
3390 * If this is a parent queue, hardware must support RSS and
3391 * RSS must be enabled.
3393 assert((!parent) || ((priv->hw_rss) && (priv->rss)));
3395 /* Even if unused, ibv_create_cq() requires at least one
3400 mb_len = rte_pktmbuf_data_room_size(mp);
3401 if ((desc == 0) || (desc % MLX4_PMD_SGE_WR_N)) {
3402 ERROR("%p: invalid number of RX descriptors (must be a"
3403 " multiple of %d)", (void *)dev, MLX4_PMD_SGE_WR_N);
3406 /* Toggle RX checksum offload if hardware supports it. */
3408 tmpl.csum = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3409 if (priv->hw_csum_l2tun)
3410 tmpl.csum_l2tun = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3411 /* Enable scattered packets support for this queue if necessary. */
3412 assert(mb_len >= RTE_PKTMBUF_HEADROOM);
3413 if (dev->data->dev_conf.rxmode.max_rx_pkt_len <=
3414 (mb_len - RTE_PKTMBUF_HEADROOM)) {
3416 } else if (dev->data->dev_conf.rxmode.enable_scatter) {
3418 desc /= MLX4_PMD_SGE_WR_N;
3420 WARN("%p: the requested maximum Rx packet size (%u) is"
3421 " larger than a single mbuf (%u) and scattered"
3422 " mode has not been requested",
3424 dev->data->dev_conf.rxmode.max_rx_pkt_len,
3425 mb_len - RTE_PKTMBUF_HEADROOM);
3427 DEBUG("%p: %s scattered packets support (%u WRs)",
3428 (void *)dev, (tmpl.sp ? "enabling" : "disabling"), desc);
3429 /* Use the entire RX mempool as the memory region. */
3430 tmpl.mr = mlx4_mp2mr(priv->pd, mp);
3431 if (tmpl.mr == NULL) {
3433 ERROR("%p: MR creation failure: %s",
3434 (void *)dev, strerror(ret));
3438 attr.rd = (struct ibv_exp_res_domain_init_attr){
3439 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
3440 IBV_EXP_RES_DOMAIN_MSG_MODEL),
3441 .thread_model = IBV_EXP_THREAD_SINGLE,
3442 .msg_model = IBV_EXP_MSG_HIGH_BW,
3444 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
3445 if (tmpl.rd == NULL) {
3447 ERROR("%p: RD creation failure: %s",
3448 (void *)dev, strerror(ret));
3451 if (dev->data->dev_conf.intr_conf.rxq) {
3452 tmpl.channel = ibv_create_comp_channel(priv->ctx);
3453 if (tmpl.channel == NULL) {
3455 ERROR("%p: Rx interrupt completion channel creation"
3457 (void *)dev, strerror(ret));
3461 attr.cq = (struct ibv_exp_cq_init_attr){
3462 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
3463 .res_domain = tmpl.rd,
3465 tmpl.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, tmpl.channel, 0,
3467 if (tmpl.cq == NULL) {
3469 ERROR("%p: CQ creation failure: %s",
3470 (void *)dev, strerror(ret));
3473 DEBUG("priv->device_attr.max_qp_wr is %d",
3474 priv->device_attr.max_qp_wr);
3475 DEBUG("priv->device_attr.max_sge is %d",
3476 priv->device_attr.max_sge);
3477 /* Allocate descriptors for RX queues, except for the RSS parent. */
3481 ret = rxq_alloc_elts_sp(&tmpl, desc, NULL);
3483 ret = rxq_alloc_elts(&tmpl, desc, NULL);
3485 ERROR("%p: RXQ allocation failed: %s",
3486 (void *)dev, strerror(ret));
3490 if (parent || rxq_parent || !priv->rss) {
3491 ret = rxq_create_qp(&tmpl, desc, inactive,
3492 children_n, rxq_parent);
3497 tmpl.port_id = dev->data->port_id;
3498 DEBUG("%p: RTE port ID: %u", (void *)rxq, tmpl.port_id);
3499 attr.params = (struct ibv_exp_query_intf_params){
3500 .intf_scope = IBV_EXP_INTF_GLOBAL,
3501 .intf = IBV_EXP_INTF_CQ,
3504 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
3505 if (tmpl.if_cq == NULL) {
3507 ERROR("%p: CQ interface family query failed with status %d",
3508 (void *)dev, status);
3511 /* Clean up rxq in case we're reinitializing it. */
3512 DEBUG("%p: cleaning-up old rxq just in case", (void *)rxq);
3515 DEBUG("%p: rxq updated with %p", (void *)rxq, (void *)&tmpl);
3525 * DPDK callback to configure a RX queue.
3528 * Pointer to Ethernet device structure.
3532 * Number of descriptors to configure in queue.
3534 * NUMA socket on which memory must be allocated.
3536 * Thresholds parameters.
3538 * Memory pool for buffer allocations.
3541 * 0 on success, negative errno value on failure.
3544 mlx4_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
3545 unsigned int socket, const struct rte_eth_rxconf *conf,
3546 struct rte_mempool *mp)
3549 struct priv *priv = dev->data->dev_private;
3550 struct rxq *rxq = (*priv->rxqs)[idx];
3555 DEBUG("%p: configuring queue %u for %u descriptors",
3556 (void *)dev, idx, desc);
3557 if (idx >= priv->rxqs_n) {
3558 ERROR("%p: queue index out of range (%u >= %u)",
3559 (void *)dev, idx, priv->rxqs_n);
3564 DEBUG("%p: reusing already allocated queue index %u (%p)",
3565 (void *)dev, idx, (void *)rxq);
3566 if (priv->started) {
3570 (*priv->rxqs)[idx] = NULL;
3573 rxq = rte_calloc_socket("RXQ", 1, sizeof(*rxq), 0, socket);
3575 ERROR("%p: unable to allocate queue index %u",
3581 if (priv->rss && !priv->isolated) {
3582 /* The list consists of the single default one. */
3583 parent = LIST_FIRST(&priv->parents);
3584 if (idx >= rte_align32pow2(priv->rxqs_n + 1) >> 1)
3589 ret = rxq_setup(dev, rxq, desc, socket,
3590 inactive, conf, mp, 0, parent);
3594 rxq->stats.idx = idx;
3595 DEBUG("%p: adding RX queue %p to list",
3596 (void *)dev, (void *)rxq);
3597 (*priv->rxqs)[idx] = rxq;
3598 /* Update receive callback. */
3600 dev->rx_pkt_burst = mlx4_rx_burst_sp;
3602 dev->rx_pkt_burst = mlx4_rx_burst;
3609 * DPDK callback to release a RX queue.
3612 * Generic RX queue pointer.
3615 mlx4_rx_queue_release(void *dpdk_rxq)
3617 struct rxq *rxq = (struct rxq *)dpdk_rxq;
3625 for (i = 0; (i != priv->rxqs_n); ++i)
3626 if ((*priv->rxqs)[i] == rxq) {
3627 DEBUG("%p: removing RX queue %p from list",
3628 (void *)priv->dev, (void *)rxq);
3629 (*priv->rxqs)[i] = NULL;
3638 priv_dev_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
3641 priv_dev_removal_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
3644 priv_dev_link_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
3647 * DPDK callback to start the device.
3649 * Simulate device start by attaching all configured flows.
3652 * Pointer to Ethernet device structure.
3655 * 0 on success, negative errno value on failure.
3658 mlx4_dev_start(struct rte_eth_dev *dev)
3660 struct priv *priv = dev->data->dev_private;
3667 if (priv->started) {
3671 DEBUG("%p: attaching configured flows to all RX queues", (void *)dev);
3673 if (priv->isolated) {
3676 } else if (priv->rss) {
3677 rxq = LIST_FIRST(&priv->parents);
3680 rxq = (*priv->rxqs)[0];
3683 /* Iterate only once when RSS is enabled. */
3685 /* Ignore nonexistent RX queues. */
3688 ret = rxq_mac_addrs_add(rxq);
3691 WARN("%p: QP flow attachment failed: %s",
3692 (void *)dev, strerror(ret));
3694 } while ((--r) && ((rxq = (*priv->rxqs)[++i]), i));
3695 ret = priv_dev_link_interrupt_handler_install(priv, dev);
3697 ERROR("%p: LSC handler install failed",
3701 ret = priv_dev_removal_interrupt_handler_install(priv, dev);
3703 ERROR("%p: RMV handler install failed",
3707 ret = priv_rx_intr_vec_enable(priv);
3709 ERROR("%p: Rx interrupt vector creation failed",
3713 ret = mlx4_priv_flow_start(priv);
3715 ERROR("%p: flow start failed: %s",
3716 (void *)dev, strerror(ret));
3724 rxq = (*priv->rxqs)[i--];
3726 rxq_mac_addrs_del(rxq);
3735 * DPDK callback to stop the device.
3737 * Simulate device stop by detaching all configured flows.
3740 * Pointer to Ethernet device structure.
3743 mlx4_dev_stop(struct rte_eth_dev *dev)
3745 struct priv *priv = dev->data->dev_private;
3751 if (!priv->started) {
3755 DEBUG("%p: detaching flows from all RX queues", (void *)dev);
3757 if (priv->isolated) {
3760 } else if (priv->rss) {
3761 rxq = LIST_FIRST(&priv->parents);
3764 rxq = (*priv->rxqs)[0];
3767 mlx4_priv_flow_stop(priv);
3768 /* Iterate only once when RSS is enabled. */
3770 /* Ignore nonexistent RX queues. */
3773 rxq_mac_addrs_del(rxq);
3774 } while ((--r) && ((rxq = (*priv->rxqs)[++i]), i));
3779 * Dummy DPDK callback for TX.
3781 * This function is used to temporarily replace the real callback during
3782 * unsafe control operations on the queue, or in case of error.
3785 * Generic pointer to TX queue structure.
3787 * Packets to transmit.
3789 * Number of packets in array.
3792 * Number of packets successfully transmitted (<= pkts_n).
3795 removed_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
3804 * Dummy DPDK callback for RX.
3806 * This function is used to temporarily replace the real callback during
3807 * unsafe control operations on the queue, or in case of error.
3810 * Generic pointer to RX queue structure.
3812 * Array to store received packets.
3814 * Maximum number of packets in array.
3817 * Number of packets successfully received (<= pkts_n).
3820 removed_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
3829 priv_dev_interrupt_handler_uninstall(struct priv *, struct rte_eth_dev *);
3832 priv_dev_removal_interrupt_handler_uninstall(struct priv *,
3833 struct rte_eth_dev *);
3836 priv_dev_link_interrupt_handler_uninstall(struct priv *, struct rte_eth_dev *);
3839 * DPDK callback to close the device.
3841 * Destroy all queues and objects, free memory.
3844 * Pointer to Ethernet device structure.
3847 mlx4_dev_close(struct rte_eth_dev *dev)
3849 struct priv *priv = dev->data->dev_private;
3856 DEBUG("%p: closing device \"%s\"",
3858 ((priv->ctx != NULL) ? priv->ctx->device->name : ""));
3859 /* Prevent crashes when queues are still in use. This is unfortunately
3860 * still required for DPDK 1.3 because some programs (such as testpmd)
3861 * never release them before closing the device. */
3862 dev->rx_pkt_burst = removed_rx_burst;
3863 dev->tx_pkt_burst = removed_tx_burst;
3864 if (priv->rxqs != NULL) {
3865 /* XXX race condition if mlx4_rx_burst() is still running. */
3867 for (i = 0; (i != priv->rxqs_n); ++i) {
3868 tmp = (*priv->rxqs)[i];
3871 (*priv->rxqs)[i] = NULL;
3878 if (priv->txqs != NULL) {
3879 /* XXX race condition if mlx4_tx_burst() is still running. */
3881 for (i = 0; (i != priv->txqs_n); ++i) {
3882 tmp = (*priv->txqs)[i];
3885 (*priv->txqs)[i] = NULL;
3893 priv_parent_list_cleanup(priv);
3894 if (priv->pd != NULL) {
3895 assert(priv->ctx != NULL);
3896 claim_zero(ibv_dealloc_pd(priv->pd));
3897 claim_zero(ibv_close_device(priv->ctx));
3899 assert(priv->ctx == NULL);
3900 priv_dev_removal_interrupt_handler_uninstall(priv, dev);
3901 priv_dev_link_interrupt_handler_uninstall(priv, dev);
3902 priv_rx_intr_vec_disable(priv);
3904 memset(priv, 0, sizeof(*priv));
3908 * Change the link state (UP / DOWN).
3911 * Pointer to Ethernet device private data.
3913 * Nonzero for link up, otherwise link down.
3916 * 0 on success, errno value on failure.
3919 priv_set_link(struct priv *priv, int up)
3921 struct rte_eth_dev *dev = priv->dev;
3926 err = priv_set_flags(priv, ~IFF_UP, IFF_UP);
3929 for (i = 0; i < priv->rxqs_n; i++)
3930 if ((*priv->rxqs)[i]->sp)
3932 /* Check if an sp queue exists.
3933 * Note: Some old frames might be received.
3935 if (i == priv->rxqs_n)
3936 dev->rx_pkt_burst = mlx4_rx_burst;
3938 dev->rx_pkt_burst = mlx4_rx_burst_sp;
3939 dev->tx_pkt_burst = mlx4_tx_burst;
3941 err = priv_set_flags(priv, ~IFF_UP, ~IFF_UP);
3944 dev->rx_pkt_burst = removed_rx_burst;
3945 dev->tx_pkt_burst = removed_tx_burst;
3951 * DPDK callback to bring the link DOWN.
3954 * Pointer to Ethernet device structure.
3957 * 0 on success, errno value on failure.
3960 mlx4_set_link_down(struct rte_eth_dev *dev)
3962 struct priv *priv = dev->data->dev_private;
3966 err = priv_set_link(priv, 0);
3972 * DPDK callback to bring the link UP.
3975 * Pointer to Ethernet device structure.
3978 * 0 on success, errno value on failure.
3981 mlx4_set_link_up(struct rte_eth_dev *dev)
3983 struct priv *priv = dev->data->dev_private;
3987 err = priv_set_link(priv, 1);
3992 * DPDK callback to get information about the device.
3995 * Pointer to Ethernet device structure.
3997 * Info structure output buffer.
4000 mlx4_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
4002 struct priv *priv = dev->data->dev_private;
4004 char ifname[IF_NAMESIZE];
4006 info->pci_dev = RTE_ETH_DEV_TO_PCI(dev);
4011 /* FIXME: we should ask the device for these values. */
4012 info->min_rx_bufsize = 32;
4013 info->max_rx_pktlen = 65536;
4015 * Since we need one CQ per QP, the limit is the minimum number
4016 * between the two values.
4018 max = ((priv->device_attr.max_cq > priv->device_attr.max_qp) ?
4019 priv->device_attr.max_qp : priv->device_attr.max_cq);
4020 /* If max >= 65535 then max = 0, max_rx_queues is uint16_t. */
4023 info->max_rx_queues = max;
4024 info->max_tx_queues = max;
4025 /* Last array entry is reserved for broadcast. */
4026 info->max_mac_addrs = (elemof(priv->mac) - 1);
4027 info->rx_offload_capa =
4029 (DEV_RX_OFFLOAD_IPV4_CKSUM |
4030 DEV_RX_OFFLOAD_UDP_CKSUM |
4031 DEV_RX_OFFLOAD_TCP_CKSUM) :
4033 info->tx_offload_capa =
4035 (DEV_TX_OFFLOAD_IPV4_CKSUM |
4036 DEV_TX_OFFLOAD_UDP_CKSUM |
4037 DEV_TX_OFFLOAD_TCP_CKSUM) :
4039 if (priv_get_ifname(priv, &ifname) == 0)
4040 info->if_index = if_nametoindex(ifname);
4043 ETH_LINK_SPEED_10G |
4044 ETH_LINK_SPEED_20G |
4045 ETH_LINK_SPEED_40G |
4050 static const uint32_t *
4051 mlx4_dev_supported_ptypes_get(struct rte_eth_dev *dev)
4053 static const uint32_t ptypes[] = {
4054 /* refers to rxq_cq_to_pkt_type() */
4057 RTE_PTYPE_INNER_L3_IPV4,
4058 RTE_PTYPE_INNER_L3_IPV6,
4062 if (dev->rx_pkt_burst == mlx4_rx_burst ||
4063 dev->rx_pkt_burst == mlx4_rx_burst_sp)
4069 * DPDK callback to get device statistics.
4072 * Pointer to Ethernet device structure.
4074 * Stats structure output buffer.
4077 mlx4_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
4079 struct priv *priv = dev->data->dev_private;
4080 struct rte_eth_stats tmp = {0};
4087 /* Add software counters. */
4088 for (i = 0; (i != priv->rxqs_n); ++i) {
4089 struct rxq *rxq = (*priv->rxqs)[i];
4093 idx = rxq->stats.idx;
4094 if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
4095 tmp.q_ipackets[idx] += rxq->stats.ipackets;
4096 tmp.q_ibytes[idx] += rxq->stats.ibytes;
4097 tmp.q_errors[idx] += (rxq->stats.idropped +
4098 rxq->stats.rx_nombuf);
4100 tmp.ipackets += rxq->stats.ipackets;
4101 tmp.ibytes += rxq->stats.ibytes;
4102 tmp.ierrors += rxq->stats.idropped;
4103 tmp.rx_nombuf += rxq->stats.rx_nombuf;
4105 for (i = 0; (i != priv->txqs_n); ++i) {
4106 struct txq *txq = (*priv->txqs)[i];
4110 idx = txq->stats.idx;
4111 if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
4112 tmp.q_opackets[idx] += txq->stats.opackets;
4113 tmp.q_obytes[idx] += txq->stats.obytes;
4114 tmp.q_errors[idx] += txq->stats.odropped;
4116 tmp.opackets += txq->stats.opackets;
4117 tmp.obytes += txq->stats.obytes;
4118 tmp.oerrors += txq->stats.odropped;
4125 * DPDK callback to clear device statistics.
4128 * Pointer to Ethernet device structure.
4131 mlx4_stats_reset(struct rte_eth_dev *dev)
4133 struct priv *priv = dev->data->dev_private;
4140 for (i = 0; (i != priv->rxqs_n); ++i) {
4141 if ((*priv->rxqs)[i] == NULL)
4143 idx = (*priv->rxqs)[i]->stats.idx;
4144 (*priv->rxqs)[i]->stats =
4145 (struct mlx4_rxq_stats){ .idx = idx };
4147 for (i = 0; (i != priv->txqs_n); ++i) {
4148 if ((*priv->txqs)[i] == NULL)
4150 idx = (*priv->txqs)[i]->stats.idx;
4151 (*priv->txqs)[i]->stats =
4152 (struct mlx4_txq_stats){ .idx = idx };
4158 * DPDK callback to remove a MAC address.
4161 * Pointer to Ethernet device structure.
4163 * MAC address index.
4166 mlx4_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
4168 struct priv *priv = dev->data->dev_private;
4173 DEBUG("%p: removing MAC address from index %" PRIu32,
4174 (void *)dev, index);
4175 /* Last array entry is reserved for broadcast. */
4176 if (index >= (elemof(priv->mac) - 1))
4178 priv_mac_addr_del(priv, index);
4184 * DPDK callback to add a MAC address.
4187 * Pointer to Ethernet device structure.
4189 * MAC address to register.
4191 * MAC address index.
4193 * VMDq pool index to associate address with (ignored).
4196 mlx4_mac_addr_add(struct rte_eth_dev *dev, struct ether_addr *mac_addr,
4197 uint32_t index, uint32_t vmdq)
4199 struct priv *priv = dev->data->dev_private;
4204 if (priv->isolated) {
4205 DEBUG("%p: cannot add MAC address, "
4206 "device is in isolated mode", (void *)dev);
4210 DEBUG("%p: adding MAC address at index %" PRIu32,
4211 (void *)dev, index);
4212 /* Last array entry is reserved for broadcast. */
4213 if (index >= (elemof(priv->mac) - 1)) {
4217 re = priv_mac_addr_add(priv, index,
4218 (const uint8_t (*)[ETHER_ADDR_LEN])
4219 mac_addr->addr_bytes);
4226 * DPDK callback to set the primary MAC address.
4229 * Pointer to Ethernet device structure.
4231 * MAC address to register.
4234 mlx4_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
4236 DEBUG("%p: setting primary MAC address", (void *)dev);
4237 mlx4_mac_addr_remove(dev, 0);
4238 mlx4_mac_addr_add(dev, mac_addr, 0, 0);
4242 * DPDK callback to retrieve physical link information.
4245 * Pointer to Ethernet device structure.
4246 * @param wait_to_complete
4247 * Wait for request completion (ignored).
4250 mlx4_link_update(struct rte_eth_dev *dev, int wait_to_complete)
4252 const struct priv *priv = dev->data->dev_private;
4253 struct ethtool_cmd edata = {
4257 struct rte_eth_link dev_link;
4260 /* priv_lock() is not taken to allow concurrent calls. */
4264 (void)wait_to_complete;
4265 if (priv_ifreq(priv, SIOCGIFFLAGS, &ifr)) {
4266 WARN("ioctl(SIOCGIFFLAGS) failed: %s", strerror(errno));
4269 memset(&dev_link, 0, sizeof(dev_link));
4270 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) &&
4271 (ifr.ifr_flags & IFF_RUNNING));
4272 ifr.ifr_data = (void *)&edata;
4273 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4274 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GSET) failed: %s",
4278 link_speed = ethtool_cmd_speed(&edata);
4279 if (link_speed == -1)
4280 dev_link.link_speed = 0;
4282 dev_link.link_speed = link_speed;
4283 dev_link.link_duplex = ((edata.duplex == DUPLEX_HALF) ?
4284 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX);
4285 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds &
4286 ETH_LINK_SPEED_FIXED);
4287 if (memcmp(&dev_link, &dev->data->dev_link, sizeof(dev_link))) {
4288 /* Link status changed. */
4289 dev->data->dev_link = dev_link;
4292 /* Link status is still the same. */
4297 * DPDK callback to change the MTU.
4299 * Setting the MTU affects hardware MRU (packets larger than the MTU cannot be
4300 * received). Use this as a hint to enable/disable scattered packets support
4301 * and improve performance when not needed.
4302 * Since failure is not an option, reconfiguring queues on the fly is not
4306 * Pointer to Ethernet device structure.
4311 * 0 on success, negative errno value on failure.
4314 mlx4_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
4316 struct priv *priv = dev->data->dev_private;
4319 uint16_t (*rx_func)(void *, struct rte_mbuf **, uint16_t) =
4323 /* Set kernel interface MTU first. */
4324 if (priv_set_mtu(priv, mtu)) {
4326 WARN("cannot set port %u MTU to %u: %s", priv->port, mtu,
4330 DEBUG("adapter port %u MTU set to %u", priv->port, mtu);
4332 /* Temporarily replace RX handler with a fake one, assuming it has not
4333 * been copied elsewhere. */
4334 dev->rx_pkt_burst = removed_rx_burst;
4335 /* Make sure everyone has left mlx4_rx_burst() and uses
4336 * removed_rx_burst() instead. */
4339 /* Reconfigure each RX queue. */
4340 for (i = 0; (i != priv->rxqs_n); ++i) {
4341 struct rxq *rxq = (*priv->rxqs)[i];
4342 unsigned int max_frame_len;
4346 /* Calculate new maximum frame length according to MTU. */
4347 max_frame_len = (priv->mtu + ETHER_HDR_LEN +
4348 (ETHER_MAX_VLAN_FRAME_LEN - ETHER_MAX_LEN));
4349 /* Provide new values to rxq_setup(). */
4350 dev->data->dev_conf.rxmode.jumbo_frame =
4351 (max_frame_len > ETHER_MAX_LEN);
4352 dev->data->dev_conf.rxmode.max_rx_pkt_len = max_frame_len;
4353 ret = rxq_rehash(dev, rxq);
4355 /* Force SP RX if that queue requires it and abort. */
4357 rx_func = mlx4_rx_burst_sp;
4360 /* Reenable non-RSS queue attributes. No need to check
4361 * for errors at this stage. */
4362 if (!priv->rss && !priv->isolated) {
4363 rxq_mac_addrs_add(rxq);
4365 /* Scattered burst function takes priority. */
4367 rx_func = mlx4_rx_burst_sp;
4369 /* Burst functions can now be called again. */
4371 dev->rx_pkt_burst = rx_func;
4379 * DPDK callback to get flow control status.
4382 * Pointer to Ethernet device structure.
4383 * @param[out] fc_conf
4384 * Flow control output buffer.
4387 * 0 on success, negative errno value on failure.
4390 mlx4_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
4392 struct priv *priv = dev->data->dev_private;
4394 struct ethtool_pauseparam ethpause = {
4395 .cmd = ETHTOOL_GPAUSEPARAM
4399 ifr.ifr_data = (void *)ðpause;
4401 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4403 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GPAUSEPARAM)"
4409 fc_conf->autoneg = ethpause.autoneg;
4410 if (ethpause.rx_pause && ethpause.tx_pause)
4411 fc_conf->mode = RTE_FC_FULL;
4412 else if (ethpause.rx_pause)
4413 fc_conf->mode = RTE_FC_RX_PAUSE;
4414 else if (ethpause.tx_pause)
4415 fc_conf->mode = RTE_FC_TX_PAUSE;
4417 fc_conf->mode = RTE_FC_NONE;
4427 * DPDK callback to modify flow control parameters.
4430 * Pointer to Ethernet device structure.
4431 * @param[in] fc_conf
4432 * Flow control parameters.
4435 * 0 on success, negative errno value on failure.
4438 mlx4_dev_set_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
4440 struct priv *priv = dev->data->dev_private;
4442 struct ethtool_pauseparam ethpause = {
4443 .cmd = ETHTOOL_SPAUSEPARAM
4447 ifr.ifr_data = (void *)ðpause;
4448 ethpause.autoneg = fc_conf->autoneg;
4449 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
4450 (fc_conf->mode & RTE_FC_RX_PAUSE))
4451 ethpause.rx_pause = 1;
4453 ethpause.rx_pause = 0;
4455 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
4456 (fc_conf->mode & RTE_FC_TX_PAUSE))
4457 ethpause.tx_pause = 1;
4459 ethpause.tx_pause = 0;
4462 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4464 WARN("ioctl(SIOCETHTOOL, ETHTOOL_SPAUSEPARAM)"
4478 * Configure a VLAN filter.
4481 * Pointer to Ethernet device structure.
4483 * VLAN ID to filter.
4488 * 0 on success, errno value on failure.
4491 vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
4493 struct priv *priv = dev->data->dev_private;
4495 unsigned int j = -1;
4497 DEBUG("%p: %s VLAN filter ID %" PRIu16,
4498 (void *)dev, (on ? "enable" : "disable"), vlan_id);
4499 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
4500 if (!priv->vlan_filter[i].enabled) {
4501 /* Unused index, remember it. */
4505 if (priv->vlan_filter[i].id != vlan_id)
4507 /* This VLAN ID is already known, use its index. */
4511 /* Check if there's room for another VLAN filter. */
4512 if (j == (unsigned int)-1)
4515 * VLAN filters apply to all configured MAC addresses, flow
4516 * specifications must be reconfigured accordingly.
4518 priv->vlan_filter[j].id = vlan_id;
4519 if ((on) && (!priv->vlan_filter[j].enabled)) {
4521 * Filter is disabled, enable it.
4522 * Rehashing flows in all RX queues is necessary.
4525 rxq_mac_addrs_del(LIST_FIRST(&priv->parents));
4527 for (i = 0; (i != priv->rxqs_n); ++i)
4528 if ((*priv->rxqs)[i] != NULL)
4529 rxq_mac_addrs_del((*priv->rxqs)[i]);
4530 priv->vlan_filter[j].enabled = 1;
4531 if (priv->started) {
4533 rxq_mac_addrs_add(LIST_FIRST(&priv->parents));
4535 for (i = 0; (i != priv->rxqs_n); ++i) {
4536 if ((*priv->rxqs)[i] == NULL)
4538 rxq_mac_addrs_add((*priv->rxqs)[i]);
4541 } else if ((!on) && (priv->vlan_filter[j].enabled)) {
4543 * Filter is enabled, disable it.
4544 * Rehashing flows in all RX queues is necessary.
4547 rxq_mac_addrs_del(LIST_FIRST(&priv->parents));
4549 for (i = 0; (i != priv->rxqs_n); ++i)
4550 if ((*priv->rxqs)[i] != NULL)
4551 rxq_mac_addrs_del((*priv->rxqs)[i]);
4552 priv->vlan_filter[j].enabled = 0;
4553 if (priv->started) {
4555 rxq_mac_addrs_add(LIST_FIRST(&priv->parents));
4557 for (i = 0; (i != priv->rxqs_n); ++i) {
4558 if ((*priv->rxqs)[i] == NULL)
4560 rxq_mac_addrs_add((*priv->rxqs)[i]);
4568 * DPDK callback to configure a VLAN filter.
4571 * Pointer to Ethernet device structure.
4573 * VLAN ID to filter.
4578 * 0 on success, negative errno value on failure.
4581 mlx4_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
4583 struct priv *priv = dev->data->dev_private;
4587 if (priv->isolated) {
4588 DEBUG("%p: cannot set vlan filter, "
4589 "device is in isolated mode", (void *)dev);
4593 ret = vlan_filter_set(dev, vlan_id, on);
4599 const struct rte_flow_ops mlx4_flow_ops = {
4600 .validate = mlx4_flow_validate,
4601 .create = mlx4_flow_create,
4602 .destroy = mlx4_flow_destroy,
4603 .flush = mlx4_flow_flush,
4605 .isolate = mlx4_flow_isolate,
4609 * Manage filter operations.
4612 * Pointer to Ethernet device structure.
4613 * @param filter_type
4616 * Operation to perform.
4618 * Pointer to operation-specific structure.
4621 * 0 on success, negative errno value on failure.
4624 mlx4_dev_filter_ctrl(struct rte_eth_dev *dev,
4625 enum rte_filter_type filter_type,
4626 enum rte_filter_op filter_op,
4631 switch (filter_type) {
4632 case RTE_ETH_FILTER_GENERIC:
4633 if (filter_op != RTE_ETH_FILTER_GET)
4635 *(const void **)arg = &mlx4_flow_ops;
4638 ERROR("%p: filter type (%d) not supported",
4639 (void *)dev, filter_type);
4645 static const struct eth_dev_ops mlx4_dev_ops = {
4646 .dev_configure = mlx4_dev_configure,
4647 .dev_start = mlx4_dev_start,
4648 .dev_stop = mlx4_dev_stop,
4649 .dev_set_link_down = mlx4_set_link_down,
4650 .dev_set_link_up = mlx4_set_link_up,
4651 .dev_close = mlx4_dev_close,
4652 .link_update = mlx4_link_update,
4653 .stats_get = mlx4_stats_get,
4654 .stats_reset = mlx4_stats_reset,
4655 .dev_infos_get = mlx4_dev_infos_get,
4656 .dev_supported_ptypes_get = mlx4_dev_supported_ptypes_get,
4657 .vlan_filter_set = mlx4_vlan_filter_set,
4658 .rx_queue_setup = mlx4_rx_queue_setup,
4659 .tx_queue_setup = mlx4_tx_queue_setup,
4660 .rx_queue_release = mlx4_rx_queue_release,
4661 .tx_queue_release = mlx4_tx_queue_release,
4662 .flow_ctrl_get = mlx4_dev_get_flow_ctrl,
4663 .flow_ctrl_set = mlx4_dev_set_flow_ctrl,
4664 .mac_addr_remove = mlx4_mac_addr_remove,
4665 .mac_addr_add = mlx4_mac_addr_add,
4666 .mac_addr_set = mlx4_mac_addr_set,
4667 .mtu_set = mlx4_dev_set_mtu,
4668 .filter_ctrl = mlx4_dev_filter_ctrl,
4669 .rx_queue_intr_enable = mlx4_rx_intr_enable,
4670 .rx_queue_intr_disable = mlx4_rx_intr_disable,
4674 * Get PCI information from struct ibv_device.
4677 * Pointer to Ethernet device structure.
4678 * @param[out] pci_addr
4679 * PCI bus address output buffer.
4682 * 0 on success, -1 on failure and errno is set.
4685 mlx4_ibv_device_to_pci_addr(const struct ibv_device *device,
4686 struct rte_pci_addr *pci_addr)
4690 MKSTR(path, "%s/device/uevent", device->ibdev_path);
4692 file = fopen(path, "rb");
4695 while (fgets(line, sizeof(line), file) == line) {
4696 size_t len = strlen(line);
4699 /* Truncate long lines. */
4700 if (len == (sizeof(line) - 1))
4701 while (line[(len - 1)] != '\n') {
4705 line[(len - 1)] = ret;
4707 /* Extract information. */
4710 "%" SCNx32 ":%" SCNx8 ":%" SCNx8 ".%" SCNx8 "\n",
4714 &pci_addr->function) == 4) {
4724 * Get MAC address by querying netdevice.
4727 * struct priv for the requested device.
4729 * MAC address output buffer.
4732 * 0 on success, -1 on failure and errno is set.
4735 priv_get_mac(struct priv *priv, uint8_t (*mac)[ETHER_ADDR_LEN])
4737 struct ifreq request;
4739 if (priv_ifreq(priv, SIOCGIFHWADDR, &request))
4741 memcpy(mac, request.ifr_hwaddr.sa_data, ETHER_ADDR_LEN);
4746 * Retrieve integer value from environment variable.
4749 * Environment variable name.
4752 * Integer value, 0 if the variable is not set.
4755 mlx4_getenv_int(const char *name)
4757 const char *val = getenv(name);
4765 mlx4_dev_link_status_handler(void *);
4767 mlx4_dev_interrupt_handler(void *);
4770 * Link/device status handler.
4773 * Pointer to private structure.
4775 * Pointer to the rte_eth_dev structure.
4777 * Pointer to event flags holder.
4783 priv_dev_status_handler(struct priv *priv, struct rte_eth_dev *dev,
4786 struct ibv_async_event event;
4787 int port_change = 0;
4788 struct rte_eth_link *link = &dev->data->dev_link;
4792 /* Read all message and acknowledge them. */
4794 if (ibv_get_async_event(priv->ctx, &event))
4796 if ((event.event_type == IBV_EVENT_PORT_ACTIVE ||
4797 event.event_type == IBV_EVENT_PORT_ERR) &&
4798 (priv->intr_conf.lsc == 1)) {
4801 } else if (event.event_type == IBV_EVENT_DEVICE_FATAL &&
4802 priv->intr_conf.rmv == 1) {
4803 *events |= (1 << RTE_ETH_EVENT_INTR_RMV);
4806 DEBUG("event type %d on port %d not handled",
4807 event.event_type, event.element.port_num);
4808 ibv_ack_async_event(&event);
4812 mlx4_link_update(dev, 0);
4813 if (((link->link_speed == 0) && link->link_status) ||
4814 ((link->link_speed != 0) && !link->link_status)) {
4815 if (!priv->pending_alarm) {
4816 /* Inconsistent status, check again later. */
4817 priv->pending_alarm = 1;
4818 rte_eal_alarm_set(MLX4_ALARM_TIMEOUT_US,
4819 mlx4_dev_link_status_handler,
4823 *events |= (1 << RTE_ETH_EVENT_INTR_LSC);
4829 * Handle delayed link status event.
4832 * Registered argument.
4835 mlx4_dev_link_status_handler(void *arg)
4837 struct rte_eth_dev *dev = arg;
4838 struct priv *priv = dev->data->dev_private;
4843 assert(priv->pending_alarm == 1);
4844 priv->pending_alarm = 0;
4845 ret = priv_dev_status_handler(priv, dev, &events);
4847 if (ret > 0 && events & (1 << RTE_ETH_EVENT_INTR_LSC))
4848 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL,
4853 * Handle interrupts from the NIC.
4855 * @param[in] intr_handle
4856 * Interrupt handler.
4858 * Callback argument.
4861 mlx4_dev_interrupt_handler(void *cb_arg)
4863 struct rte_eth_dev *dev = cb_arg;
4864 struct priv *priv = dev->data->dev_private;
4870 ret = priv_dev_status_handler(priv, dev, &ev);
4873 for (i = RTE_ETH_EVENT_UNKNOWN;
4874 i < RTE_ETH_EVENT_MAX;
4876 if (ev & (1 << i)) {
4878 _rte_eth_dev_callback_process(dev, i, NULL,
4884 WARN("%d event%s not processed", ret,
4885 (ret > 1 ? "s were" : " was"));
4890 * Uninstall interrupt handler.
4893 * Pointer to private structure.
4895 * Pointer to the rte_eth_dev structure.
4897 * 0 on success, negative errno value on failure.
4900 priv_dev_interrupt_handler_uninstall(struct priv *priv, struct rte_eth_dev *dev)
4904 if (priv->intr_conf.lsc ||
4905 priv->intr_conf.rmv)
4907 ret = rte_intr_callback_unregister(&priv->intr_handle,
4908 mlx4_dev_interrupt_handler,
4911 ERROR("rte_intr_callback_unregister failed with %d"
4913 (errno ? " (errno: " : ""),
4914 (errno ? strerror(errno) : ""),
4915 (errno ? ")" : ""));
4917 priv->intr_handle.fd = 0;
4918 priv->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
4923 * Install interrupt handler.
4926 * Pointer to private structure.
4928 * Pointer to the rte_eth_dev structure.
4930 * 0 on success, negative errno value on failure.
4933 priv_dev_interrupt_handler_install(struct priv *priv,
4934 struct rte_eth_dev *dev)
4939 /* Check whether the interrupt handler has already been installed
4940 * for either type of interrupt
4942 if (priv->intr_conf.lsc &&
4943 priv->intr_conf.rmv &&
4944 priv->intr_handle.fd)
4946 assert(priv->ctx->async_fd > 0);
4947 flags = fcntl(priv->ctx->async_fd, F_GETFL);
4948 rc = fcntl(priv->ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
4950 INFO("failed to change file descriptor async event queue");
4951 dev->data->dev_conf.intr_conf.lsc = 0;
4952 dev->data->dev_conf.intr_conf.rmv = 0;
4955 priv->intr_handle.fd = priv->ctx->async_fd;
4956 priv->intr_handle.type = RTE_INTR_HANDLE_EXT;
4957 rc = rte_intr_callback_register(&priv->intr_handle,
4958 mlx4_dev_interrupt_handler,
4961 ERROR("rte_intr_callback_register failed "
4962 " (errno: %s)", strerror(errno));
4970 * Uninstall interrupt handler.
4973 * Pointer to private structure.
4975 * Pointer to the rte_eth_dev structure.
4977 * 0 on success, negative value on error.
4980 priv_dev_removal_interrupt_handler_uninstall(struct priv *priv,
4981 struct rte_eth_dev *dev)
4983 if (dev->data->dev_conf.intr_conf.rmv) {
4984 priv->intr_conf.rmv = 0;
4985 return priv_dev_interrupt_handler_uninstall(priv, dev);
4991 * Uninstall interrupt handler.
4994 * Pointer to private structure.
4996 * Pointer to the rte_eth_dev structure.
4998 * 0 on success, negative value on error,
5001 priv_dev_link_interrupt_handler_uninstall(struct priv *priv,
5002 struct rte_eth_dev *dev)
5006 if (dev->data->dev_conf.intr_conf.lsc) {
5007 priv->intr_conf.lsc = 0;
5008 ret = priv_dev_interrupt_handler_uninstall(priv, dev);
5012 if (priv->pending_alarm)
5013 if (rte_eal_alarm_cancel(mlx4_dev_link_status_handler,
5015 ERROR("rte_eal_alarm_cancel failed "
5016 " (errno: %s)", strerror(rte_errno));
5019 priv->pending_alarm = 0;
5024 * Install link interrupt handler.
5027 * Pointer to private structure.
5029 * Pointer to the rte_eth_dev structure.
5031 * 0 on success, negative value on error.
5034 priv_dev_link_interrupt_handler_install(struct priv *priv,
5035 struct rte_eth_dev *dev)
5039 if (dev->data->dev_conf.intr_conf.lsc) {
5040 ret = priv_dev_interrupt_handler_install(priv, dev);
5043 priv->intr_conf.lsc = 1;
5049 * Install removal interrupt handler.
5052 * Pointer to private structure.
5054 * Pointer to the rte_eth_dev structure.
5056 * 0 on success, negative value on error.
5059 priv_dev_removal_interrupt_handler_install(struct priv *priv,
5060 struct rte_eth_dev *dev)
5064 if (dev->data->dev_conf.intr_conf.rmv) {
5065 ret = priv_dev_interrupt_handler_install(priv, dev);
5068 priv->intr_conf.rmv = 1;
5074 * Allocate queue vector and fill epoll fd list for Rx interrupts.
5077 * Pointer to private structure.
5080 * 0 on success, negative on failure.
5083 priv_rx_intr_vec_enable(struct priv *priv)
5086 unsigned int rxqs_n = priv->rxqs_n;
5087 unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
5088 unsigned int count = 0;
5089 struct rte_intr_handle *intr_handle = priv->dev->intr_handle;
5091 if (!priv->dev->data->dev_conf.intr_conf.rxq)
5093 priv_rx_intr_vec_disable(priv);
5094 intr_handle->intr_vec = malloc(sizeof(intr_handle->intr_vec[rxqs_n]));
5095 if (intr_handle->intr_vec == NULL) {
5096 ERROR("failed to allocate memory for interrupt vector,"
5097 " Rx interrupts will not be supported");
5100 intr_handle->type = RTE_INTR_HANDLE_EXT;
5101 for (i = 0; i != n; ++i) {
5102 struct rxq *rxq = (*priv->rxqs)[i];
5107 /* Skip queues that cannot request interrupts. */
5108 if (!rxq || !rxq->channel) {
5109 /* Use invalid intr_vec[] index to disable entry. */
5110 intr_handle->intr_vec[i] =
5111 RTE_INTR_VEC_RXTX_OFFSET +
5112 RTE_MAX_RXTX_INTR_VEC_ID;
5115 if (count >= RTE_MAX_RXTX_INTR_VEC_ID) {
5116 ERROR("too many Rx queues for interrupt vector size"
5117 " (%d), Rx interrupts cannot be enabled",
5118 RTE_MAX_RXTX_INTR_VEC_ID);
5119 priv_rx_intr_vec_disable(priv);
5122 fd = rxq->channel->fd;
5123 flags = fcntl(fd, F_GETFL);
5124 rc = fcntl(fd, F_SETFL, flags | O_NONBLOCK);
5126 ERROR("failed to make Rx interrupt file descriptor"
5127 " %d non-blocking for queue index %d", fd, i);
5128 priv_rx_intr_vec_disable(priv);
5131 intr_handle->intr_vec[i] = RTE_INTR_VEC_RXTX_OFFSET + count;
5132 intr_handle->efds[count] = fd;
5136 priv_rx_intr_vec_disable(priv);
5138 intr_handle->nb_efd = count;
5143 * Clean up Rx interrupts handler.
5146 * Pointer to private structure.
5149 priv_rx_intr_vec_disable(struct priv *priv)
5151 struct rte_intr_handle *intr_handle = priv->dev->intr_handle;
5153 rte_intr_free_epoll_fd(intr_handle);
5154 free(intr_handle->intr_vec);
5155 intr_handle->nb_efd = 0;
5156 intr_handle->intr_vec = NULL;
5160 * DPDK callback for Rx queue interrupt enable.
5163 * Pointer to Ethernet device structure.
5168 * 0 on success, negative on failure.
5171 mlx4_rx_intr_enable(struct rte_eth_dev *dev, uint16_t idx)
5173 struct priv *priv = dev->data->dev_private;
5174 struct rxq *rxq = (*priv->rxqs)[idx];
5177 if (!rxq || !rxq->channel)
5180 ret = ibv_req_notify_cq(rxq->cq, 0);
5182 WARN("unable to arm interrupt on rx queue %d", idx);
5187 * DPDK callback for Rx queue interrupt disable.
5190 * Pointer to Ethernet device structure.
5195 * 0 on success, negative on failure.
5198 mlx4_rx_intr_disable(struct rte_eth_dev *dev, uint16_t idx)
5200 struct priv *priv = dev->data->dev_private;
5201 struct rxq *rxq = (*priv->rxqs)[idx];
5202 struct ibv_cq *ev_cq;
5206 if (!rxq || !rxq->channel) {
5209 ret = ibv_get_cq_event(rxq->cq->channel, &ev_cq, &ev_ctx);
5210 if (ret || ev_cq != rxq->cq)
5214 WARN("unable to disable interrupt on rx queue %d",
5217 ibv_ack_cq_events(rxq->cq, 1);
5222 * Verify and store value for device argument.
5225 * Key argument to verify.
5227 * Value associated with key.
5228 * @param[in, out] conf
5229 * Shared configuration data.
5232 * 0 on success, negative errno value on failure.
5235 mlx4_arg_parse(const char *key, const char *val, struct mlx4_conf *conf)
5240 tmp = strtoul(val, NULL, 0);
5242 WARN("%s: \"%s\" is not a valid integer", key, val);
5245 if (strcmp(MLX4_PMD_PORT_KVARG, key) == 0) {
5246 uint32_t ports = rte_log2_u32(conf->ports.present);
5249 ERROR("port index %lu outside range [0,%" PRIu32 ")",
5253 if (!(conf->ports.present & (1 << tmp))) {
5254 ERROR("invalid port index %lu", tmp);
5257 conf->ports.enabled |= 1 << tmp;
5259 WARN("%s: unknown parameter", key);
5266 * Parse device parameters.
5269 * Device arguments structure.
5272 * 0 on success, negative errno value on failure.
5275 mlx4_args(struct rte_devargs *devargs, struct mlx4_conf *conf)
5277 struct rte_kvargs *kvlist;
5278 unsigned int arg_count;
5282 if (devargs == NULL)
5284 kvlist = rte_kvargs_parse(devargs->args, pmd_mlx4_init_params);
5285 if (kvlist == NULL) {
5286 ERROR("failed to parse kvargs");
5289 /* Process parameters. */
5290 for (i = 0; pmd_mlx4_init_params[i]; ++i) {
5291 arg_count = rte_kvargs_count(kvlist, MLX4_PMD_PORT_KVARG);
5292 while (arg_count-- > 0) {
5293 ret = rte_kvargs_process(kvlist,
5294 MLX4_PMD_PORT_KVARG,
5295 (int (*)(const char *,
5305 rte_kvargs_free(kvlist);
5309 static struct rte_pci_driver mlx4_driver;
5312 * DPDK callback to register a PCI device.
5314 * This function creates an Ethernet device for each port of a given
5317 * @param[in] pci_drv
5318 * PCI driver structure (mlx4_driver).
5319 * @param[in] pci_dev
5320 * PCI device information.
5323 * 0 on success, negative errno value on failure.
5326 mlx4_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
5328 struct ibv_device **list;
5329 struct ibv_device *ibv_dev;
5331 struct ibv_context *attr_ctx = NULL;
5332 struct ibv_device_attr device_attr;
5333 struct mlx4_conf conf = {
5340 assert(pci_drv == &mlx4_driver);
5342 list = ibv_get_device_list(&i);
5345 if (errno == ENOSYS)
5346 ERROR("cannot list devices, is ib_uverbs loaded?");
5351 * For each listed device, check related sysfs entry against
5352 * the provided PCI ID.
5355 struct rte_pci_addr pci_addr;
5358 DEBUG("checking device \"%s\"", list[i]->name);
5359 if (mlx4_ibv_device_to_pci_addr(list[i], &pci_addr))
5361 if ((pci_dev->addr.domain != pci_addr.domain) ||
5362 (pci_dev->addr.bus != pci_addr.bus) ||
5363 (pci_dev->addr.devid != pci_addr.devid) ||
5364 (pci_dev->addr.function != pci_addr.function))
5366 vf = (pci_dev->id.device_id ==
5367 PCI_DEVICE_ID_MELLANOX_CONNECTX3VF);
5368 INFO("PCI information matches, using device \"%s\" (VF: %s)",
5369 list[i]->name, (vf ? "true" : "false"));
5370 attr_ctx = ibv_open_device(list[i]);
5374 if (attr_ctx == NULL) {
5375 ibv_free_device_list(list);
5378 ERROR("cannot access device, is mlx4_ib loaded?");
5381 ERROR("cannot use device, are drivers up to date?");
5389 DEBUG("device opened");
5390 if (ibv_query_device(attr_ctx, &device_attr)) {
5394 INFO("%u port(s) detected", device_attr.phys_port_cnt);
5396 conf.ports.present |= (UINT64_C(1) << device_attr.phys_port_cnt) - 1;
5397 if (mlx4_args(pci_dev->device.devargs, &conf)) {
5398 ERROR("failed to process device arguments");
5402 /* Use all ports when none are defined */
5403 if (!conf.ports.enabled)
5404 conf.ports.enabled = conf.ports.present;
5405 for (i = 0; i < device_attr.phys_port_cnt; i++) {
5406 uint32_t port = i + 1; /* ports are indexed from one */
5407 struct ibv_context *ctx = NULL;
5408 struct ibv_port_attr port_attr;
5409 struct ibv_pd *pd = NULL;
5410 struct priv *priv = NULL;
5411 struct rte_eth_dev *eth_dev = NULL;
5412 struct ibv_exp_device_attr exp_device_attr;
5413 struct ether_addr mac;
5415 /* If port is not enabled, skip. */
5416 if (!(conf.ports.enabled & (1 << i)))
5418 exp_device_attr.comp_mask = IBV_EXP_DEVICE_ATTR_EXP_CAP_FLAGS;
5419 exp_device_attr.comp_mask |= IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ;
5421 DEBUG("using port %u", port);
5423 ctx = ibv_open_device(ibv_dev);
5429 /* Check port status. */
5430 err = ibv_query_port(ctx, port, &port_attr);
5432 ERROR("port query failed: %s", strerror(err));
5437 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
5438 ERROR("port %d is not configured in Ethernet mode",
5444 if (port_attr.state != IBV_PORT_ACTIVE)
5445 DEBUG("port %d is not active: \"%s\" (%d)",
5446 port, ibv_port_state_str(port_attr.state),
5449 /* Allocate protection domain. */
5450 pd = ibv_alloc_pd(ctx);
5452 ERROR("PD allocation failure");
5457 /* from rte_ethdev.c */
5458 priv = rte_zmalloc("ethdev private structure",
5460 RTE_CACHE_LINE_SIZE);
5462 ERROR("priv allocation failure");
5468 priv->device_attr = device_attr;
5471 priv->mtu = ETHER_MTU;
5472 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
5473 ERROR("ibv_exp_query_device() failed");
5477 if ((exp_device_attr.exp_device_cap_flags &
5478 IBV_EXP_DEVICE_QPG) &&
5479 (exp_device_attr.exp_device_cap_flags &
5480 IBV_EXP_DEVICE_UD_RSS) &&
5481 (exp_device_attr.comp_mask &
5482 IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ) &&
5483 (exp_device_attr.max_rss_tbl_sz > 0)) {
5486 priv->max_rss_tbl_sz = exp_device_attr.max_rss_tbl_sz;
5490 priv->max_rss_tbl_sz = 0;
5492 priv->hw_tss = !!(exp_device_attr.exp_device_cap_flags &
5493 IBV_EXP_DEVICE_UD_TSS);
5494 DEBUG("device flags: %s%s%s",
5495 (priv->hw_qpg ? "IBV_DEVICE_QPG " : ""),
5496 (priv->hw_tss ? "IBV_DEVICE_TSS " : ""),
5497 (priv->hw_rss ? "IBV_DEVICE_RSS " : ""));
5499 DEBUG("maximum RSS indirection table size: %u",
5500 exp_device_attr.max_rss_tbl_sz);
5503 ((exp_device_attr.exp_device_cap_flags &
5504 IBV_EXP_DEVICE_RX_CSUM_TCP_UDP_PKT) &&
5505 (exp_device_attr.exp_device_cap_flags &
5506 IBV_EXP_DEVICE_RX_CSUM_IP_PKT));
5507 DEBUG("checksum offloading is %ssupported",
5508 (priv->hw_csum ? "" : "not "));
5510 priv->hw_csum_l2tun = !!(exp_device_attr.exp_device_cap_flags &
5511 IBV_EXP_DEVICE_VXLAN_SUPPORT);
5512 DEBUG("L2 tunnel checksum offloads are %ssupported",
5513 (priv->hw_csum_l2tun ? "" : "not "));
5515 priv->inl_recv_size = mlx4_getenv_int("MLX4_INLINE_RECV_SIZE");
5517 if (priv->inl_recv_size) {
5518 exp_device_attr.comp_mask =
5519 IBV_EXP_DEVICE_ATTR_INLINE_RECV_SZ;
5520 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
5521 INFO("Couldn't query device for inline-receive"
5523 priv->inl_recv_size = 0;
5525 if ((unsigned)exp_device_attr.inline_recv_sz <
5526 priv->inl_recv_size) {
5527 INFO("Max inline-receive (%d) <"
5528 " requested inline-receive (%u)",
5529 exp_device_attr.inline_recv_sz,
5530 priv->inl_recv_size);
5531 priv->inl_recv_size =
5532 exp_device_attr.inline_recv_sz;
5535 INFO("Set inline receive size to %u",
5536 priv->inl_recv_size);
5540 /* Configure the first MAC address by default. */
5541 if (priv_get_mac(priv, &mac.addr_bytes)) {
5542 ERROR("cannot get MAC address, is mlx4_en loaded?"
5543 " (errno: %s)", strerror(errno));
5547 INFO("port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
5549 mac.addr_bytes[0], mac.addr_bytes[1],
5550 mac.addr_bytes[2], mac.addr_bytes[3],
5551 mac.addr_bytes[4], mac.addr_bytes[5]);
5552 /* Register MAC and broadcast addresses. */
5553 claim_zero(priv_mac_addr_add(priv, 0,
5554 (const uint8_t (*)[ETHER_ADDR_LEN])
5556 claim_zero(priv_mac_addr_add(priv, (elemof(priv->mac) - 1),
5557 &(const uint8_t [ETHER_ADDR_LEN])
5558 { "\xff\xff\xff\xff\xff\xff" }));
5561 char ifname[IF_NAMESIZE];
5563 if (priv_get_ifname(priv, &ifname) == 0)
5564 DEBUG("port %u ifname is \"%s\"",
5565 priv->port, ifname);
5567 DEBUG("port %u ifname is unknown", priv->port);
5570 /* Get actual MTU if possible. */
5571 priv_get_mtu(priv, &priv->mtu);
5572 DEBUG("port %u MTU is %u", priv->port, priv->mtu);
5574 /* from rte_ethdev.c */
5576 char name[RTE_ETH_NAME_MAX_LEN];
5578 snprintf(name, sizeof(name), "%s port %u",
5579 ibv_get_device_name(ibv_dev), port);
5580 eth_dev = rte_eth_dev_allocate(name);
5582 if (eth_dev == NULL) {
5583 ERROR("can not allocate rte ethdev");
5588 eth_dev->data->dev_private = priv;
5589 eth_dev->data->mac_addrs = priv->mac;
5590 eth_dev->device = &pci_dev->device;
5592 rte_eth_copy_pci_info(eth_dev, pci_dev);
5594 eth_dev->device->driver = &mlx4_driver.driver;
5597 * Copy and override interrupt handle to prevent it from
5598 * being shared between all ethdev instances of a given PCI
5599 * device. This is required to properly handle Rx interrupts
5602 priv->intr_handle_dev = *eth_dev->intr_handle;
5603 eth_dev->intr_handle = &priv->intr_handle_dev;
5605 priv->dev = eth_dev;
5606 eth_dev->dev_ops = &mlx4_dev_ops;
5607 eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
5609 /* Bring Ethernet device up. */
5610 DEBUG("forcing Ethernet interface up");
5611 priv_set_flags(priv, ~IFF_UP, IFF_UP);
5612 /* Update link status once if waiting for LSC. */
5613 if (eth_dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC)
5614 mlx4_link_update(eth_dev, 0);
5620 claim_zero(ibv_dealloc_pd(pd));
5622 claim_zero(ibv_close_device(ctx));
5624 rte_eth_dev_release_port(eth_dev);
5627 if (i == device_attr.phys_port_cnt)
5631 * XXX if something went wrong in the loop above, there is a resource
5632 * leak (ctx, pd, priv, dpdk ethdev) but we can do nothing about it as
5633 * long as the dpdk does not provide a way to deallocate a ethdev and a
5634 * way to enumerate the registered ethdevs to free the previous ones.
5639 claim_zero(ibv_close_device(attr_ctx));
5641 ibv_free_device_list(list);
5646 static const struct rte_pci_id mlx4_pci_id_map[] = {
5648 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
5649 PCI_DEVICE_ID_MELLANOX_CONNECTX3)
5652 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
5653 PCI_DEVICE_ID_MELLANOX_CONNECTX3PRO)
5656 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
5657 PCI_DEVICE_ID_MELLANOX_CONNECTX3VF)
5664 static struct rte_pci_driver mlx4_driver = {
5666 .name = MLX4_DRIVER_NAME
5668 .id_table = mlx4_pci_id_map,
5669 .probe = mlx4_pci_probe,
5670 .drv_flags = RTE_PCI_DRV_INTR_LSC |
5671 RTE_PCI_DRV_INTR_RMV,
5675 * Driver initialization routine.
5677 RTE_INIT(rte_mlx4_pmd_init);
5679 rte_mlx4_pmd_init(void)
5681 RTE_BUILD_BUG_ON(sizeof(wr_id_t) != sizeof(uint64_t));
5683 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
5684 * huge pages. Calling ibv_fork_init() during init allows
5685 * applications to use fork() safely for purposes other than
5686 * using this PMD, which is not supported in forked processes.
5688 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
5690 rte_pci_register(&mlx4_driver);
5693 RTE_PMD_EXPORT_NAME(net_mlx4, __COUNTER__);
5694 RTE_PMD_REGISTER_PCI_TABLE(net_mlx4, mlx4_pci_id_map);
5695 RTE_PMD_REGISTER_KMOD_DEP(net_mlx4,
5696 "* ib_uverbs & mlx4_en & mlx4_core & mlx4_ib");