drivers/net/mlx5/linux/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2020 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12 #include <net/if.h>
  13 #include <linux/rtnetlink.h>
  14 #include <linux/sockios.h>
  15 #include <linux/ethtool.h>
  16 #include <fcntl.h>
  17
  18 #include <rte_malloc.h>
  19 #include <ethdev_driver.h>
  20 #include <ethdev_pci.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_common.h>
  24 #include <rte_kvargs.h>
  25 #include <rte_rwlock.h>
  26 #include <rte_spinlock.h>
  27 #include <rte_string_fns.h>
  28 #include <rte_alarm.h>
  29 #include <rte_eal_paging.h>
  30
  31 #include <mlx5_glue.h>
  32 #include <mlx5_devx_cmds.h>
  33 #include <mlx5_common.h>
  34 #include <mlx5_common_mp.h>
  35 #include <mlx5_common_mr.h>
  36 #include <mlx5_malloc.h>
  37
  38 #include "mlx5_defs.h"
  39 #include "mlx5.h"
  40 #include "mlx5_common_os.h"
  41 #include "mlx5_utils.h"
  42 #include "mlx5_rxtx.h"
  43 #include "mlx5_rx.h"
  44 #include "mlx5_autoconf.h"
  45 #include "mlx5_mr.h"
  46 #include "mlx5_flow.h"
  47 #include "rte_pmd_mlx5.h"
  48 #include "mlx5_verbs.h"
  49 #include "mlx5_nl.h"
  50 #include "mlx5_devx.h"
  51
  52 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
  53
  54 #ifndef HAVE_IBV_MLX5_MOD_MPW
  55 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
  56 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
  57 #endif
  58
  59 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
  60 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
  61 #endif
  62
  63 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  64
  65 /* Spinlock for mlx5_shared_data allocation. */
  66 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  67
  68 /* Process local data for secondary processes. */
  69 static struct mlx5_local_data mlx5_local_data;
  70
  71 /**
  72  * Set the completion channel file descriptor interrupt as non-blocking.
  73  *
  74  * @param[in] rxq_obj
  75  *   Pointer to RQ channel object, which includes the channel fd
  76  *
  77  * @param[out] fd
  78  *   The file descriptor (representing the intetrrupt) used in this channel.
  79  *
  80  * @return
  81  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
  82  */
  83 int
  84 mlx5_os_set_nonblock_channel_fd(int fd)
  85 {
  86         int flags;
  87
  88         flags = fcntl(fd, F_GETFL);
  89         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
  90 }
  91
  92 /**
  93  * Get mlx5 device attributes. The glue function query_device_ex() is called
  94  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
  95  * device attributes from the glue out parameter.
  96  *
  97  * @param dev
  98  *   Pointer to ibv context.
  99  *
 100  * @param device_attr
 101  *   Pointer to mlx5 device attributes.
 102  *
 103  * @return
 104  *   0 on success, non zero error number otherwise
 105  */
 106 int
 107 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
 108 {
 109         int err;
 110         struct ibv_device_attr_ex attr_ex;
 111         memset(device_attr, 0, sizeof(*device_attr));
 112         err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
 113         if (err)
 114                 return err;
 115
 116         device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
 117         device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
 118         device_attr->max_sge = attr_ex.orig_attr.max_sge;
 119         device_attr->max_cq = attr_ex.orig_attr.max_cq;
 120         device_attr->max_cqe = attr_ex.orig_attr.max_cqe;
 121         device_attr->max_mr = attr_ex.orig_attr.max_mr;
 122         device_attr->max_pd = attr_ex.orig_attr.max_pd;
 123         device_attr->max_qp = attr_ex.orig_attr.max_qp;
 124         device_attr->max_srq = attr_ex.orig_attr.max_srq;
 125         device_attr->max_srq_wr = attr_ex.orig_attr.max_srq_wr;
 126         device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
 127         device_attr->max_rwq_indirection_table_size =
 128                 attr_ex.rss_caps.max_rwq_indirection_table_size;
 129         device_attr->max_tso = attr_ex.tso_caps.max_tso;
 130         device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
 131
 132         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 133         err = mlx5_glue->dv_query_device(ctx, &dv_attr);
 134         if (err)
 135                 return err;
 136
 137         device_attr->flags = dv_attr.flags;
 138         device_attr->comp_mask = dv_attr.comp_mask;
 139 #ifdef HAVE_IBV_MLX5_MOD_SWP
 140         device_attr->sw_parsing_offloads =
 141                 dv_attr.sw_parsing_caps.sw_parsing_offloads;
 142 #endif
 143         device_attr->min_single_stride_log_num_of_bytes =
 144                 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
 145         device_attr->max_single_stride_log_num_of_bytes =
 146                 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
 147         device_attr->min_single_wqe_log_num_of_strides =
 148                 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
 149         device_attr->max_single_wqe_log_num_of_strides =
 150                 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
 151         device_attr->stride_supported_qpts =
 152                 dv_attr.striding_rq_caps.supported_qpts;
 153 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 154         device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
 155 #endif
 156
 157         return err;
 158 }
 159
 160 /**
 161  * Verbs callback to allocate a memory. This function should allocate the space
 162  * according to the size provided residing inside a huge page.
 163  * Please note that all allocation must respect the alignment from libmlx5
 164  * (i.e. currently rte_mem_page_size()).
 165  *
 166  * @param[in] size
 167  *   The size in bytes of the memory to allocate.
 168  * @param[in] data
 169  *   A pointer to the callback data.
 170  *
 171  * @return
 172  *   Allocated buffer, NULL otherwise and rte_errno is set.
 173  */
 174 static void *
 175 mlx5_alloc_verbs_buf(size_t size, void *data)
 176 {
 177         struct mlx5_dev_ctx_shared *sh = data;
 178         void *ret;
 179         size_t alignment = rte_mem_page_size();
 180         if (alignment == (size_t)-1) {
 181                 DRV_LOG(ERR, "Failed to get mem page size");
 182                 rte_errno = ENOMEM;
 183                 return NULL;
 184         }
 185
 186         MLX5_ASSERT(data != NULL);
 187         ret = mlx5_malloc(0, size, alignment, sh->numa_node);
 188         if (!ret && size)
 189                 rte_errno = ENOMEM;
 190         return ret;
 191 }
 192
 193 /**
 194  * Verbs callback to free a memory.
 195  *
 196  * @param[in] ptr
 197  *   A pointer to the memory to free.
 198  * @param[in] data
 199  *   A pointer to the callback data.
 200  */
 201 static void
 202 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 203 {
 204         MLX5_ASSERT(data != NULL);
 205         mlx5_free(ptr);
 206 }
 207
 208 /**
 209  * Initialize DR related data within private structure.
 210  * Routine checks the reference counter and does actual
 211  * resources creation/initialization only if counter is zero.
 212  *
 213  * @param[in] priv
 214  *   Pointer to the private device data structure.
 215  *
 216  * @return
 217  *   Zero on success, positive error code otherwise.
 218  */
 219 static int
 220 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 221 {
 222         struct mlx5_dev_ctx_shared *sh = priv->sh;
 223         char s[MLX5_HLIST_NAMESIZE] __rte_unused;
 224         int err;
 225
 226         MLX5_ASSERT(sh && sh->refcnt);
 227         if (sh->refcnt > 1)
 228                 return 0;
 229         err = mlx5_alloc_table_hash_list(priv);
 230         if (err)
 231                 goto error;
 232         /* The resources below are only valid with DV support. */
 233 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 234         /* Init port id action cache list. */
 235         snprintf(s, sizeof(s), "%s_port_id_action_cache", sh->ibdev_name);
 236         mlx5_cache_list_init(&sh->port_id_action_list, s, 0, sh,
 237                              flow_dv_port_id_create_cb,
 238                              flow_dv_port_id_match_cb,
 239                              flow_dv_port_id_remove_cb);
 240         /* Init push vlan action cache list. */
 241         snprintf(s, sizeof(s), "%s_push_vlan_action_cache", sh->ibdev_name);
 242         mlx5_cache_list_init(&sh->push_vlan_action_list, s, 0, sh,
 243                              flow_dv_push_vlan_create_cb,
 244                              flow_dv_push_vlan_match_cb,
 245                              flow_dv_push_vlan_remove_cb);
 246         /* Init sample action cache list. */
 247         snprintf(s, sizeof(s), "%s_sample_action_cache", sh->ibdev_name);
 248         mlx5_cache_list_init(&sh->sample_action_list, s, 0, sh,
 249                              flow_dv_sample_create_cb,
 250                              flow_dv_sample_match_cb,
 251                              flow_dv_sample_remove_cb);
 252         /* Init dest array action cache list. */
 253         snprintf(s, sizeof(s), "%s_dest_array_cache", sh->ibdev_name);
 254         mlx5_cache_list_init(&sh->dest_array_list, s, 0, sh,
 255                              flow_dv_dest_array_create_cb,
 256                              flow_dv_dest_array_match_cb,
 257                              flow_dv_dest_array_remove_cb);
 258         /* Create tags hash list table. */
 259         snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name);
 260         sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE, 0,
 261                                           MLX5_HLIST_WRITE_MOST,
 262                                           flow_dv_tag_create_cb,
 263                                           flow_dv_tag_match_cb,
 264                                           flow_dv_tag_remove_cb);
 265         if (!sh->tag_table) {
 266                 DRV_LOG(ERR, "tags with hash creation failed.");
 267                 err = ENOMEM;
 268                 goto error;
 269         }
 270         sh->tag_table->ctx = sh;
 271         snprintf(s, sizeof(s), "%s_hdr_modify", sh->ibdev_name);
 272         sh->modify_cmds = mlx5_hlist_create(s, MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
 273                                             0, MLX5_HLIST_WRITE_MOST |
 274                                             MLX5_HLIST_DIRECT_KEY,
 275                                             flow_dv_modify_create_cb,
 276                                             flow_dv_modify_match_cb,
 277                                             flow_dv_modify_remove_cb);
 278         if (!sh->modify_cmds) {
 279                 DRV_LOG(ERR, "hdr modify hash creation failed");
 280                 err = ENOMEM;
 281                 goto error;
 282         }
 283         sh->modify_cmds->ctx = sh;
 284         snprintf(s, sizeof(s), "%s_encaps_decaps", sh->ibdev_name);
 285         sh->encaps_decaps = mlx5_hlist_create(s,
 286                                               MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
 287                                               0, MLX5_HLIST_DIRECT_KEY |
 288                                               MLX5_HLIST_WRITE_MOST,
 289                                               flow_dv_encap_decap_create_cb,
 290                                               flow_dv_encap_decap_match_cb,
 291                                               flow_dv_encap_decap_remove_cb);
 292         if (!sh->encaps_decaps) {
 293                 DRV_LOG(ERR, "encap decap hash creation failed");
 294                 err = ENOMEM;
 295                 goto error;
 296         }
 297         sh->encaps_decaps->ctx = sh;
 298 #endif
 299 #ifdef HAVE_MLX5DV_DR
 300         void *domain;
 301
 302         /* Reference counter is zero, we should initialize structures. */
 303         domain = mlx5_glue->dr_create_domain(sh->ctx,
 304                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 305         if (!domain) {
 306                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 307                 err = errno;
 308                 goto error;
 309         }
 310         sh->rx_domain = domain;
 311         domain = mlx5_glue->dr_create_domain(sh->ctx,
 312                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 313         if (!domain) {
 314                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 315                 err = errno;
 316                 goto error;
 317         }
 318         sh->tx_domain = domain;
 319 #ifdef HAVE_MLX5DV_DR_ESWITCH
 320         if (priv->config.dv_esw_en) {
 321                 domain  = mlx5_glue->dr_create_domain
 322                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 323                 if (!domain) {
 324                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 325                         err = errno;
 326                         goto error;
 327                 }
 328                 sh->fdb_domain = domain;
 329         }
 330         /*
 331          * The drop action is just some dummy placeholder in rdma-core. It
 332          * does not belong to domains and has no any attributes, and, can be
 333          * shared by the entire device.
 334          */
 335         sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop();
 336         if (!sh->dr_drop_action) {
 337                 DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop");
 338                 err = errno;
 339                 goto error;
 340         }
 341 #endif
 342         if (!sh->tunnel_hub)
 343                 err = mlx5_alloc_tunnel_hub(sh);
 344         if (err) {
 345                 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
 346                 goto error;
 347         }
 348         if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
 349                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
 350                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
 351                 if (sh->fdb_domain)
 352                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
 353         }
 354         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 355 #endif /* HAVE_MLX5DV_DR */
 356         sh->default_miss_action =
 357                         mlx5_glue->dr_create_flow_action_default_miss();
 358         if (!sh->default_miss_action)
 359                 DRV_LOG(WARNING, "Default miss action is not supported.");
 360         return 0;
 361 error:
 362         /* Rollback the created objects. */
 363         if (sh->rx_domain) {
 364                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 365                 sh->rx_domain = NULL;
 366         }
 367         if (sh->tx_domain) {
 368                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 369                 sh->tx_domain = NULL;
 370         }
 371         if (sh->fdb_domain) {
 372                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 373                 sh->fdb_domain = NULL;
 374         }
 375         if (sh->dr_drop_action) {
 376                 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
 377                 sh->dr_drop_action = NULL;
 378         }
 379         if (sh->pop_vlan_action) {
 380                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 381                 sh->pop_vlan_action = NULL;
 382         }
 383         if (sh->encaps_decaps) {
 384                 mlx5_hlist_destroy(sh->encaps_decaps);
 385                 sh->encaps_decaps = NULL;
 386         }
 387         if (sh->modify_cmds) {
 388                 mlx5_hlist_destroy(sh->modify_cmds);
 389                 sh->modify_cmds = NULL;
 390         }
 391         if (sh->tag_table) {
 392                 /* tags should be destroyed with flow before. */
 393                 mlx5_hlist_destroy(sh->tag_table);
 394                 sh->tag_table = NULL;
 395         }
 396         if (sh->tunnel_hub) {
 397                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 398                 sh->tunnel_hub = NULL;
 399         }
 400         mlx5_free_table_hash_list(priv);
 401         return err;
 402 }
 403
 404 /**
 405  * Destroy DR related data within private structure.
 406  *
 407  * @param[in] priv
 408  *   Pointer to the private device data structure.
 409  */
 410 void
 411 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 412 {
 413         struct mlx5_dev_ctx_shared *sh = priv->sh;
 414
 415         MLX5_ASSERT(sh && sh->refcnt);
 416         if (sh->refcnt > 1)
 417                 return;
 418 #ifdef HAVE_MLX5DV_DR
 419         if (sh->rx_domain) {
 420                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 421                 sh->rx_domain = NULL;
 422         }
 423         if (sh->tx_domain) {
 424                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 425                 sh->tx_domain = NULL;
 426         }
 427 #ifdef HAVE_MLX5DV_DR_ESWITCH
 428         if (sh->fdb_domain) {
 429                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 430                 sh->fdb_domain = NULL;
 431         }
 432         if (sh->dr_drop_action) {
 433                 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
 434                 sh->dr_drop_action = NULL;
 435         }
 436 #endif
 437         if (sh->pop_vlan_action) {
 438                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 439                 sh->pop_vlan_action = NULL;
 440         }
 441 #endif /* HAVE_MLX5DV_DR */
 442         if (sh->default_miss_action)
 443                 mlx5_glue->destroy_flow_action
 444                                 (sh->default_miss_action);
 445         if (sh->encaps_decaps) {
 446                 mlx5_hlist_destroy(sh->encaps_decaps);
 447                 sh->encaps_decaps = NULL;
 448         }
 449         if (sh->modify_cmds) {
 450                 mlx5_hlist_destroy(sh->modify_cmds);
 451                 sh->modify_cmds = NULL;
 452         }
 453         if (sh->tag_table) {
 454                 /* tags should be destroyed with flow before. */
 455                 mlx5_hlist_destroy(sh->tag_table);
 456                 sh->tag_table = NULL;
 457         }
 458         if (sh->tunnel_hub) {
 459                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 460                 sh->tunnel_hub = NULL;
 461         }
 462         mlx5_cache_list_destroy(&sh->port_id_action_list);
 463         mlx5_cache_list_destroy(&sh->push_vlan_action_list);
 464         mlx5_free_table_hash_list(priv);
 465 }
 466
 467 /**
 468  * Initialize shared data between primary and secondary process.
 469  *
 470  * A memzone is reserved by primary process and secondary processes attach to
 471  * the memzone.
 472  *
 473  * @return
 474  *   0 on success, a negative errno value otherwise and rte_errno is set.
 475  */
 476 static int
 477 mlx5_init_shared_data(void)
 478 {
 479         const struct rte_memzone *mz;
 480         int ret = 0;
 481
 482         rte_spinlock_lock(&mlx5_shared_data_lock);
 483         if (mlx5_shared_data == NULL) {
 484                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 485                         /* Allocate shared memory. */
 486                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 487                                                  sizeof(*mlx5_shared_data),
 488                                                  SOCKET_ID_ANY, 0);
 489                         if (mz == NULL) {
 490                                 DRV_LOG(ERR,
 491                                         "Cannot allocate mlx5 shared data");
 492                                 ret = -rte_errno;
 493                                 goto error;
 494                         }
 495                         mlx5_shared_data = mz->addr;
 496                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 497                         rte_spinlock_init(&mlx5_shared_data->lock);
 498                 } else {
 499                         /* Lookup allocated shared memory. */
 500                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 501                         if (mz == NULL) {
 502                                 DRV_LOG(ERR,
 503                                         "Cannot attach mlx5 shared data");
 504                                 ret = -rte_errno;
 505                                 goto error;
 506                         }
 507                         mlx5_shared_data = mz->addr;
 508                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 509                 }
 510         }
 511 error:
 512         rte_spinlock_unlock(&mlx5_shared_data_lock);
 513         return ret;
 514 }
 515
 516 /**
 517  * PMD global initialization.
 518  *
 519  * Independent from individual device, this function initializes global
 520  * per-PMD data structures distinguishing primary and secondary processes.
 521  * Hence, each initialization is called once per a process.
 522  *
 523  * @return
 524  *   0 on success, a negative errno value otherwise and rte_errno is set.
 525  */
 526 static int
 527 mlx5_init_once(void)
 528 {
 529         struct mlx5_shared_data *sd;
 530         struct mlx5_local_data *ld = &mlx5_local_data;
 531         int ret = 0;
 532
 533         if (mlx5_init_shared_data())
 534                 return -rte_errno;
 535         sd = mlx5_shared_data;
 536         MLX5_ASSERT(sd);
 537         rte_spinlock_lock(&sd->lock);
 538         switch (rte_eal_process_type()) {
 539         case RTE_PROC_PRIMARY:
 540                 if (sd->init_done)
 541                         break;
 542                 LIST_INIT(&sd->mem_event_cb_list);
 543                 rte_rwlock_init(&sd->mem_event_rwlock);
 544                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
 545                                                 mlx5_mr_mem_event_cb, NULL);
 546                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
 547                                            mlx5_mp_os_primary_handle);
 548                 if (ret)
 549                         goto out;
 550                 sd->init_done = true;
 551                 break;
 552         case RTE_PROC_SECONDARY:
 553                 if (ld->init_done)
 554                         break;
 555                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
 556                                              mlx5_mp_os_secondary_handle);
 557                 if (ret)
 558                         goto out;
 559                 ++sd->secondary_cnt;
 560                 ld->init_done = true;
 561                 break;
 562         default:
 563                 break;
 564         }
 565 out:
 566         rte_spinlock_unlock(&sd->lock);
 567         return ret;
 568 }
 569
 570 /**
 571  * Create the Tx queue DevX/Verbs object.
 572  *
 573  * @param dev
 574  *   Pointer to Ethernet device.
 575  * @param idx
 576  *   Queue index in DPDK Tx queue array.
 577  *
 578  * @return
 579  *   0 on success, a negative errno value otherwise and rte_errno is set.
 580  */
 581 static int
 582 mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
 583 {
 584         struct mlx5_priv *priv = dev->data->dev_private;
 585         struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
 586         struct mlx5_txq_ctrl *txq_ctrl =
 587                         container_of(txq_data, struct mlx5_txq_ctrl, txq);
 588
 589         if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
 590                 return mlx5_txq_devx_obj_new(dev, idx);
 591 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 592         if (!priv->config.dv_esw_en)
 593                 return mlx5_txq_devx_obj_new(dev, idx);
 594 #endif
 595         return mlx5_txq_ibv_obj_new(dev, idx);
 596 }
 597
 598 /**
 599  * Release an Tx DevX/verbs queue object.
 600  *
 601  * @param txq_obj
 602  *   DevX/Verbs Tx queue object.
 603  */
 604 static void
 605 mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)
 606 {
 607         if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
 608                 mlx5_txq_devx_obj_release(txq_obj);
 609                 return;
 610         }
 611 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 612         if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) {
 613                 mlx5_txq_devx_obj_release(txq_obj);
 614                 return;
 615         }
 616 #endif
 617         mlx5_txq_ibv_obj_release(txq_obj);
 618 }
 619
 620 /**
 621  * DV flow counter mode detect and config.
 622  *
 623  * @param dev
 624  *   Pointer to rte_eth_dev structure.
 625  *
 626  */
 627 static void
 628 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
 629 {
 630 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 631         struct mlx5_priv *priv = dev->data->dev_private;
 632         struct mlx5_dev_ctx_shared *sh = priv->sh;
 633         bool fallback;
 634
 635 #ifndef HAVE_IBV_DEVX_ASYNC
 636         fallback = true;
 637 #else
 638         fallback = false;
 639         if (!priv->config.devx || !priv->config.dv_flow_en ||
 640             !priv->config.hca_attr.flow_counters_dump ||
 641             !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
 642             (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
 643                 fallback = true;
 644 #endif
 645         if (fallback)
 646                 DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
 647                         "counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
 648                         priv->config.hca_attr.flow_counters_dump,
 649                         priv->config.hca_attr.flow_counter_bulk_alloc_bitmap);
 650         /* Initialize fallback mode only on the port initializes sh. */
 651         if (sh->refcnt == 1)
 652                 sh->cmng.counter_fallback = fallback;
 653         else if (fallback != sh->cmng.counter_fallback)
 654                 DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
 655                         "with others:%d.", PORT_ID(priv), fallback);
 656 #endif
 657 }
 658
 659 static void
 660 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
 661 {
 662         struct mlx5_priv *priv = dev->data->dev_private;
 663         void *ctx = priv->sh->ctx;
 664
 665         priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
 666         if (!priv->q_counters) {
 667                 struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
 668                 struct ibv_wq *wq;
 669
 670                 DRV_LOG(DEBUG, "Port %d queue counter object cannot be created "
 671                         "by DevX - fall-back to use the kernel driver global "
 672                         "queue counter.", dev->data->port_id);
 673                 /* Create WQ by kernel and query its queue counter ID. */
 674                 if (cq) {
 675                         wq = mlx5_glue->create_wq(ctx,
 676                                                   &(struct ibv_wq_init_attr){
 677                                                     .wq_type = IBV_WQT_RQ,
 678                                                     .max_wr = 1,
 679                                                     .max_sge = 1,
 680                                                     .pd = priv->sh->pd,
 681                                                     .cq = cq,
 682                                                 });
 683                         if (wq) {
 684                                 /* Counter is assigned only on RDY state. */
 685                                 int ret = mlx5_glue->modify_wq(wq,
 686                                                  &(struct ibv_wq_attr){
 687                                                  .attr_mask = IBV_WQ_ATTR_STATE,
 688                                                  .wq_state = IBV_WQS_RDY,
 689                                                 });
 690
 691                                 if (ret == 0)
 692                                         mlx5_devx_cmd_wq_query(wq,
 693                                                          &priv->counter_set_id);
 694                                 claim_zero(mlx5_glue->destroy_wq(wq));
 695                         }
 696                         claim_zero(mlx5_glue->destroy_cq(cq));
 697                 }
 698         } else {
 699                 priv->counter_set_id = priv->q_counters->id;
 700         }
 701         if (priv->counter_set_id == 0)
 702                 DRV_LOG(INFO, "Part of the port %d statistics will not be "
 703                         "available.", dev->data->port_id);
 704 }
 705
 706 /**
 707  * Check if representor spawn info match devargs.
 708  *
 709  * @param spawn
 710  *   Verbs device parameters (name, port, switch_info) to spawn.
 711  * @param eth_da
 712  *   Device devargs to probe.
 713  *
 714  * @return
 715  *   Match result.
 716  */
 717 static bool
 718 mlx5_representor_match(struct mlx5_dev_spawn_data *spawn,
 719                        struct rte_eth_devargs *eth_da)
 720 {
 721         struct mlx5_switch_info *switch_info = &spawn->info;
 722         unsigned int p, f;
 723         uint16_t id;
 724         uint16_t repr_id = mlx5_representor_id_encode(switch_info,
 725                                                       eth_da->type);
 726
 727         switch (eth_da->type) {
 728         case RTE_ETH_REPRESENTOR_SF:
 729                 if (!(spawn->info.port_name == -1 &&
 730                       switch_info->name_type ==
 731                                 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 732                     switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) {
 733                         rte_errno = EBUSY;
 734                         return false;
 735                 }
 736                 break;
 737         case RTE_ETH_REPRESENTOR_VF:
 738                 /* Allows HPF representor index -1 as exception. */
 739                 if (!(spawn->info.port_name == -1 &&
 740                       switch_info->name_type ==
 741                                 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 742                     switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) {
 743                         rte_errno = EBUSY;
 744                         return false;
 745                 }
 746                 break;
 747         case RTE_ETH_REPRESENTOR_NONE:
 748                 rte_errno = EBUSY;
 749                 return false;
 750         default:
 751                 rte_errno = ENOTSUP;
 752                 DRV_LOG(ERR, "unsupported representor type");
 753                 return false;
 754         }
 755         /* Check representor ID: */
 756         for (p = 0; p < eth_da->nb_ports; ++p) {
 757                 if (spawn->pf_bond < 0) {
 758                         /* For non-LAG mode, allow and ignore pf. */
 759                         switch_info->pf_num = eth_da->ports[p];
 760                         repr_id = mlx5_representor_id_encode(switch_info,
 761                                                              eth_da->type);
 762                 }
 763                 for (f = 0; f < eth_da->nb_representor_ports; ++f) {
 764                         id = MLX5_REPRESENTOR_ID
 765                                 (eth_da->ports[p], eth_da->type,
 766                                  eth_da->representor_ports[f]);
 767                         if (repr_id == id)
 768                                 return true;
 769                 }
 770         }
 771         rte_errno = EBUSY;
 772         return false;
 773 }
 774
 775
 776 /**
 777  * Spawn an Ethernet device from Verbs information.
 778  *
 779  * @param dpdk_dev
 780  *   Backing DPDK device.
 781  * @param spawn
 782  *   Verbs device parameters (name, port, switch_info) to spawn.
 783  * @param config
 784  *   Device configuration parameters.
 785  * @param config
 786  *   Device arguments.
 787  *
 788  * @return
 789  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 790  *   is set. The following errors are defined:
 791  *
 792  *   EBUSY: device is not supposed to be spawned.
 793  *   EEXIST: device is already spawned
 794  */
 795 static struct rte_eth_dev *
 796 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 797                struct mlx5_dev_spawn_data *spawn,
 798                struct mlx5_dev_config *config,
 799                struct rte_eth_devargs *eth_da)
 800 {
 801         const struct mlx5_switch_info *switch_info = &spawn->info;
 802         struct mlx5_dev_ctx_shared *sh = NULL;
 803         struct ibv_port_attr port_attr;
 804         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 805         struct rte_eth_dev *eth_dev = NULL;
 806         struct mlx5_priv *priv = NULL;
 807         int err = 0;
 808         unsigned int hw_padding = 0;
 809         unsigned int mps;
 810         unsigned int tunnel_en = 0;
 811         unsigned int mpls_en = 0;
 812         unsigned int swp = 0;
 813         unsigned int mprq = 0;
 814         unsigned int mprq_min_stride_size_n = 0;
 815         unsigned int mprq_max_stride_size_n = 0;
 816         unsigned int mprq_min_stride_num_n = 0;
 817         unsigned int mprq_max_stride_num_n = 0;
 818         struct rte_ether_addr mac;
 819         char name[RTE_ETH_NAME_MAX_LEN];
 820         int own_domain_id = 0;
 821         uint16_t port_id;
 822 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 823         struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
 824 #endif
 825
 826         /* Determine if this port representor is supposed to be spawned. */
 827         if (switch_info->representor && dpdk_dev->devargs &&
 828             !mlx5_representor_match(spawn, eth_da))
 829                 return NULL;
 830         /* Build device name. */
 831         if (spawn->pf_bond < 0) {
 832                 /* Single device. */
 833                 if (!switch_info->representor)
 834                         strlcpy(name, dpdk_dev->name, sizeof(name));
 835                 else
 836                         err = snprintf(name, sizeof(name), "%s_representor_%s%u",
 837                                  dpdk_dev->name,
 838                                  switch_info->name_type ==
 839                                  MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
 840                                  switch_info->port_name);
 841         } else {
 842                 /* Bonding device. */
 843                 if (!switch_info->representor) {
 844                         err = snprintf(name, sizeof(name), "%s_%s",
 845                                  dpdk_dev->name,
 846                                  mlx5_os_get_dev_device_name(spawn->phys_dev));
 847                 } else {
 848                         err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u",
 849                                 dpdk_dev->name,
 850                                 mlx5_os_get_dev_device_name(spawn->phys_dev),
 851                                 switch_info->ctrl_num,
 852                                 switch_info->pf_num,
 853                                 switch_info->name_type ==
 854                                 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
 855                                 switch_info->port_name);
 856                 }
 857         }
 858         if (err >= (int)sizeof(name))
 859                 DRV_LOG(WARNING, "device name overflow %s", name);
 860         /* check if the device is already spawned */
 861         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 862                 rte_errno = EEXIST;
 863                 return NULL;
 864         }
 865         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 866         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 867                 struct mlx5_mp_id mp_id;
 868
 869                 eth_dev = rte_eth_dev_attach_secondary(name);
 870                 if (eth_dev == NULL) {
 871                         DRV_LOG(ERR, "can not attach rte ethdev");
 872                         rte_errno = ENOMEM;
 873                         return NULL;
 874                 }
 875                 eth_dev->device = dpdk_dev;
 876                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
 877                 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
 878                 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
 879                 err = mlx5_proc_priv_init(eth_dev);
 880                 if (err)
 881                         return NULL;
 882                 mp_id.port_id = eth_dev->data->port_id;
 883                 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 884                 /* Receive command fd from primary process */
 885                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
 886                 if (err < 0)
 887                         goto err_secondary;
 888                 /* Remap UAR for Tx queues. */
 889                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
 890                 if (err)
 891                         goto err_secondary;
 892                 /*
 893                  * Ethdev pointer is still required as input since
 894                  * the primary device is not accessible from the
 895                  * secondary process.
 896                  */
 897                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
 898                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
 899                 return eth_dev;
 900 err_secondary:
 901                 mlx5_dev_close(eth_dev);
 902                 return NULL;
 903         }
 904         /*
 905          * Some parameters ("tx_db_nc" in particularly) are needed in
 906          * advance to create dv/verbs device context. We proceed the
 907          * devargs here to get ones, and later proceed devargs again
 908          * to override some hardware settings.
 909          */
 910         err = mlx5_args(config, dpdk_dev->devargs);
 911         if (err) {
 912                 err = rte_errno;
 913                 DRV_LOG(ERR, "failed to process device arguments: %s",
 914                         strerror(rte_errno));
 915                 goto error;
 916         }
 917         if (config->dv_miss_info) {
 918                 if (switch_info->master || switch_info->representor)
 919                         config->dv_xmeta_en = MLX5_XMETA_MODE_META16;
 920         }
 921         mlx5_malloc_mem_select(config->sys_mem_en);
 922         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
 923         if (!sh)
 924                 return NULL;
 925         config->devx = sh->devx;
 926 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
 927         config->dest_tir = 1;
 928 #endif
 929 #ifdef HAVE_IBV_MLX5_MOD_SWP
 930         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
 931 #endif
 932         /*
 933          * Multi-packet send is supported by ConnectX-4 Lx PF as well
 934          * as all ConnectX-5 devices.
 935          */
 936 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 937         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
 938 #endif
 939 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 940         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
 941 #endif
 942         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
 943         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
 944                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
 945                         DRV_LOG(DEBUG, "enhanced MPW is supported");
 946                         mps = MLX5_MPW_ENHANCED;
 947                 } else {
 948                         DRV_LOG(DEBUG, "MPW is supported");
 949                         mps = MLX5_MPW;
 950                 }
 951         } else {
 952                 DRV_LOG(DEBUG, "MPW isn't supported");
 953                 mps = MLX5_MPW_DISABLED;
 954         }
 955 #ifdef HAVE_IBV_MLX5_MOD_SWP
 956         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
 957                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
 958         DRV_LOG(DEBUG, "SWP support: %u", swp);
 959 #endif
 960         config->swp = !!swp;
 961 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 962         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
 963                 struct mlx5dv_striding_rq_caps mprq_caps =
 964                         dv_attr.striding_rq_caps;
 965
 966                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
 967                         mprq_caps.min_single_stride_log_num_of_bytes);
 968                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
 969                         mprq_caps.max_single_stride_log_num_of_bytes);
 970                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
 971                         mprq_caps.min_single_wqe_log_num_of_strides);
 972                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
 973                         mprq_caps.max_single_wqe_log_num_of_strides);
 974                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
 975                         mprq_caps.supported_qpts);
 976                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
 977                 mprq = 1;
 978                 mprq_min_stride_size_n =
 979                         mprq_caps.min_single_stride_log_num_of_bytes;
 980                 mprq_max_stride_size_n =
 981                         mprq_caps.max_single_stride_log_num_of_bytes;
 982                 mprq_min_stride_num_n =
 983                         mprq_caps.min_single_wqe_log_num_of_strides;
 984                 mprq_max_stride_num_n =
 985                         mprq_caps.max_single_wqe_log_num_of_strides;
 986         }
 987 #endif
 988         /* Rx CQE compression is enabled by default. */
 989         config->cqe_comp = 1;
 990 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 991         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
 992                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
 993                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
 994                              (dv_attr.tunnel_offloads_caps &
 995                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
 996                              (dv_attr.tunnel_offloads_caps &
 997                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
 998         }
 999         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1000                 tunnel_en ? "" : "not ");
1001 #else
1002         DRV_LOG(WARNING,
1003                 "tunnel offloading disabled due to old OFED/rdma-core version");
1004 #endif
1005         config->tunnel_en = tunnel_en;
1006 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1007         mpls_en = ((dv_attr.tunnel_offloads_caps &
1008                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1009                    (dv_attr.tunnel_offloads_caps &
1010                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1011         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1012                 mpls_en ? "" : "not ");
1013 #else
1014         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1015                 " old OFED/rdma-core version or firmware configuration");
1016 #endif
1017         config->mpls_en = mpls_en;
1018         /* Check port status. */
1019         err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
1020         if (err) {
1021                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1022                 goto error;
1023         }
1024         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1025                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1026                 err = EINVAL;
1027                 goto error;
1028         }
1029         if (port_attr.state != IBV_PORT_ACTIVE)
1030                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1031                         mlx5_glue->port_state_str(port_attr.state),
1032                         port_attr.state);
1033         /* Allocate private eth device data. */
1034         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
1035                            sizeof(*priv),
1036                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1037         if (priv == NULL) {
1038                 DRV_LOG(ERR, "priv allocation failure");
1039                 err = ENOMEM;
1040                 goto error;
1041         }
1042         priv->sh = sh;
1043         priv->dev_port = spawn->phys_port;
1044         priv->pci_dev = spawn->pci_dev;
1045         priv->mtu = RTE_ETHER_MTU;
1046         /* Some internal functions rely on Netlink sockets, open them now. */
1047         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1048         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1049         priv->representor = !!switch_info->representor;
1050         priv->master = !!switch_info->master;
1051         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1052         priv->vport_meta_tag = 0;
1053         priv->vport_meta_mask = 0;
1054         priv->pf_bond = spawn->pf_bond;
1055 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
1056         /*
1057          * The DevX port query API is implemented. E-Switch may use
1058          * either vport or reg_c[0] metadata register to match on
1059          * vport index. The engaged part of metadata register is
1060          * defined by mask.
1061          */
1062         if (switch_info->representor || switch_info->master) {
1063                 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
1064                                       MLX5DV_DEVX_PORT_MATCH_REG_C_0;
1065                 err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port,
1066                                                  &devx_port);
1067                 if (err) {
1068                         DRV_LOG(WARNING,
1069                                 "can't query devx port %d on device %s",
1070                                 spawn->phys_port,
1071                                 mlx5_os_get_dev_device_name(spawn->phys_dev));
1072                         devx_port.comp_mask = 0;
1073                 }
1074         }
1075         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
1076                 priv->vport_meta_tag = devx_port.reg_c_0.value;
1077                 priv->vport_meta_mask = devx_port.reg_c_0.mask;
1078                 if (!priv->vport_meta_mask) {
1079                         DRV_LOG(ERR, "vport zero mask for port %d"
1080                                      " on bonding device %s",
1081                                      spawn->phys_port,
1082                                      mlx5_os_get_dev_device_name
1083                                                         (spawn->phys_dev));
1084                         err = ENOTSUP;
1085                         goto error;
1086                 }
1087                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
1088                         DRV_LOG(ERR, "invalid vport tag for port %d"
1089                                      " on bonding device %s",
1090                                      spawn->phys_port,
1091                                      mlx5_os_get_dev_device_name
1092                                                         (spawn->phys_dev));
1093                         err = ENOTSUP;
1094                         goto error;
1095                 }
1096         }
1097         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
1098                 priv->vport_id = devx_port.vport_num;
1099         } else if (spawn->pf_bond >= 0) {
1100                 DRV_LOG(ERR, "can't deduce vport index for port %d"
1101                              " on bonding device %s",
1102                              spawn->phys_port,
1103                              mlx5_os_get_dev_device_name(spawn->phys_dev));
1104                 err = ENOTSUP;
1105                 goto error;
1106         } else {
1107                 /* Suppose vport index in compatible way. */
1108                 priv->vport_id = switch_info->representor ?
1109                                  switch_info->port_name + 1 : -1;
1110         }
1111 #else
1112         /*
1113          * Kernel/rdma_core support single E-Switch per PF configurations
1114          * only and vport_id field contains the vport index for
1115          * associated VF, which is deduced from representor port name.
1116          * For example, let's have the IB device port 10, it has
1117          * attached network device eth0, which has port name attribute
1118          * pf0vf2, we can deduce the VF number as 2, and set vport index
1119          * as 3 (2+1). This assigning schema should be changed if the
1120          * multiple E-Switch instances per PF configurations or/and PCI
1121          * subfunctions are added.
1122          */
1123         priv->vport_id = switch_info->representor ?
1124                          switch_info->port_name + 1 : -1;
1125 #endif
1126         priv->representor_id = mlx5_representor_id_encode(switch_info,
1127                                                           eth_da->type);
1128         /*
1129          * Look for sibling devices in order to reuse their switch domain
1130          * if any, otherwise allocate one.
1131          */
1132         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1133                 const struct mlx5_priv *opriv =
1134                         rte_eth_devices[port_id].data->dev_private;
1135
1136                 if (!opriv ||
1137                     opriv->sh != priv->sh ||
1138                         opriv->domain_id ==
1139                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1140                         continue;
1141                 priv->domain_id = opriv->domain_id;
1142                 break;
1143         }
1144         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1145                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1146                 if (err) {
1147                         err = rte_errno;
1148                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1149                                 strerror(rte_errno));
1150                         goto error;
1151                 }
1152                 own_domain_id = 1;
1153         }
1154         /* Override some values set by hardware configuration. */
1155         mlx5_args(config, dpdk_dev->devargs);
1156         err = mlx5_dev_check_sibling_config(priv, config);
1157         if (err)
1158                 goto error;
1159         config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1160                             IBV_DEVICE_RAW_IP_CSUM);
1161         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1162                 (config->hw_csum ? "" : "not "));
1163 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1164         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1165         DRV_LOG(DEBUG, "counters are not supported");
1166 #endif
1167 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
1168         if (config->dv_flow_en) {
1169                 DRV_LOG(WARNING, "DV flow is not supported");
1170                 config->dv_flow_en = 0;
1171         }
1172 #endif
1173         config->ind_table_max_size =
1174                 sh->device_attr.max_rwq_indirection_table_size;
1175         /*
1176          * Remove this check once DPDK supports larger/variable
1177          * indirection tables.
1178          */
1179         if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1180                 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1181         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1182                 config->ind_table_max_size);
1183         config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1184                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1185         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1186                 (config->hw_vlan_strip ? "" : "not "));
1187         config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1188                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1189 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1190         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1191 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1192         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1193                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1194 #endif
1195         if (config->hw_padding && !hw_padding) {
1196                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1197                 config->hw_padding = 0;
1198         } else if (config->hw_padding) {
1199                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1200         }
1201         config->tso = (sh->device_attr.max_tso > 0 &&
1202                       (sh->device_attr.tso_supported_qpts &
1203                        (1 << IBV_QPT_RAW_PACKET)));
1204         if (config->tso)
1205                 config->tso_max_payload_sz = sh->device_attr.max_tso;
1206         /*
1207          * MPW is disabled by default, while the Enhanced MPW is enabled
1208          * by default.
1209          */
1210         if (config->mps == MLX5_ARG_UNSET)
1211                 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1212                                                           MLX5_MPW_DISABLED;
1213         else
1214                 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
1215         DRV_LOG(INFO, "%sMPS is %s",
1216                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1217                 config->mps == MLX5_MPW ? "legacy " : "",
1218                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1219         if (config->devx) {
1220                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
1221                 if (err) {
1222                         err = -err;
1223                         goto error;
1224                 }
1225                 /* Check relax ordering support. */
1226                 if (!haswell_broadwell_cpu) {
1227                         sh->cmng.relaxed_ordering_write =
1228                                 config->hca_attr.relaxed_ordering_write;
1229                         sh->cmng.relaxed_ordering_read =
1230                                 config->hca_attr.relaxed_ordering_read;
1231                 } else {
1232                         sh->cmng.relaxed_ordering_read = 0;
1233                         sh->cmng.relaxed_ordering_write = 0;
1234                 }
1235                 sh->rq_ts_format = config->hca_attr.rq_ts_format;
1236                 sh->sq_ts_format = config->hca_attr.sq_ts_format;
1237                 sh->qp_ts_format = config->hca_attr.qp_ts_format;
1238                 /* Check for LRO support. */
1239                 if (config->dest_tir && config->hca_attr.lro_cap &&
1240                     config->dv_flow_en) {
1241                         /* TBD check tunnel lro caps. */
1242                         config->lro.supported = config->hca_attr.lro_cap;
1243                         DRV_LOG(DEBUG, "Device supports LRO");
1244                         /*
1245                          * If LRO timeout is not configured by application,
1246                          * use the minimal supported value.
1247                          */
1248                         if (!config->lro.timeout)
1249                                 config->lro.timeout =
1250                                 config->hca_attr.lro_timer_supported_periods[0];
1251                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1252                                 config->lro.timeout);
1253                         DRV_LOG(DEBUG, "LRO minimal size of TCP segment "
1254                                 "required for coalescing is %d bytes",
1255                                 config->hca_attr.lro_min_mss_size);
1256                 }
1257 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
1258                 if (config->hca_attr.qos.sup &&
1259                     config->hca_attr.qos.flow_meter_old &&
1260                     config->dv_flow_en) {
1261                         uint8_t reg_c_mask =
1262                                 config->hca_attr.qos.flow_meter_reg_c_ids;
1263                         /*
1264                          * Meter needs two REG_C's for color match and pre-sfx
1265                          * flow match. Here get the REG_C for color match.
1266                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
1267                          */
1268                         reg_c_mask &= 0xfc;
1269                         if (__builtin_popcount(reg_c_mask) < 1) {
1270                                 priv->mtr_en = 0;
1271                                 DRV_LOG(WARNING, "No available register for"
1272                                         " meter.");
1273                         } else {
1274                                 /*
1275                                  * The meter color register is used by the
1276                                  * flow-hit feature as well.
1277                                  * The flow-hit feature must use REG_C_3
1278                                  * Prefer REG_C_3 if it is available.
1279                                  */
1280                                 if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
1281                                         priv->mtr_color_reg = REG_C_3;
1282                                 else
1283                                         priv->mtr_color_reg = ffs(reg_c_mask)
1284                                                               - 1 + REG_C_0;
1285                                 priv->mtr_en = 1;
1286                                 priv->mtr_reg_share =
1287                                       config->hca_attr.qos.flow_meter;
1288                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1289                                         priv->mtr_color_reg);
1290                         }
1291                 }
1292 #endif
1293 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
1294                 if (config->hca_attr.flow_hit_aso &&
1295                     priv->mtr_color_reg == REG_C_3) {
1296                         sh->flow_hit_aso_en = 1;
1297                         err = mlx5_flow_aso_age_mng_init(sh);
1298                         if (err) {
1299                                 err = -err;
1300                                 goto error;
1301                         }
1302                         DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
1303                 }
1304 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
1305 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1306                 if (config->hca_attr.log_max_ft_sampler_num > 0  &&
1307                     config->dv_flow_en) {
1308                         priv->sampler_en = 1;
1309                         DRV_LOG(DEBUG, "Sampler enabled!");
1310                 } else {
1311                         priv->sampler_en = 0;
1312                         if (!config->hca_attr.log_max_ft_sampler_num)
1313                                 DRV_LOG(WARNING,
1314                                         "No available register for sampler.");
1315                         else
1316                                 DRV_LOG(DEBUG, "DV flow is not supported!");
1317                 }
1318 #endif
1319         }
1320         if (config->cqe_comp && RTE_CACHE_LINE_SIZE == 128 &&
1321             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) {
1322                 DRV_LOG(WARNING, "Rx CQE 128B compression is not supported");
1323                 config->cqe_comp = 0;
1324         }
1325         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_FTAG_STRIDX &&
1326             (!config->devx || !config->hca_attr.mini_cqe_resp_flow_tag)) {
1327                 DRV_LOG(WARNING, "Flow Tag CQE compression"
1328                                  " format isn't supported.");
1329                 config->cqe_comp = 0;
1330         }
1331         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_L34H_STRIDX &&
1332             (!config->devx || !config->hca_attr.mini_cqe_resp_l3_l4_tag)) {
1333                 DRV_LOG(WARNING, "L3/L4 Header CQE compression"
1334                                  " format isn't supported.");
1335                 config->cqe_comp = 0;
1336         }
1337         DRV_LOG(DEBUG, "Rx CQE compression is %ssupported",
1338                         config->cqe_comp ? "" : "not ");
1339         if (config->tx_pp) {
1340                 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1341                         config->hca_attr.dev_freq_khz);
1342                 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1343                         config->hca_attr.qos.packet_pacing ? "" : "not ");
1344                 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1345                         config->hca_attr.cross_channel ? "" : "not ");
1346                 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1347                         config->hca_attr.wqe_index_ignore ? "" : "not ");
1348                 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1349                         config->hca_attr.non_wire_sq ? "" : "not ");
1350                 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1351                         config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1352                         config->hca_attr.log_max_static_sq_wq);
1353                 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1354                         config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1355                 if (!config->devx) {
1356                         DRV_LOG(ERR, "DevX is required for packet pacing");
1357                         err = ENODEV;
1358                         goto error;
1359                 }
1360                 if (!config->hca_attr.qos.packet_pacing) {
1361                         DRV_LOG(ERR, "Packet pacing is not supported");
1362                         err = ENODEV;
1363                         goto error;
1364                 }
1365                 if (!config->hca_attr.cross_channel) {
1366                         DRV_LOG(ERR, "Cross channel operations are"
1367                                      " required for packet pacing");
1368                         err = ENODEV;
1369                         goto error;
1370                 }
1371                 if (!config->hca_attr.wqe_index_ignore) {
1372                         DRV_LOG(ERR, "WQE index ignore feature is"
1373                                      " required for packet pacing");
1374                         err = ENODEV;
1375                         goto error;
1376                 }
1377                 if (!config->hca_attr.non_wire_sq) {
1378                         DRV_LOG(ERR, "Non-wire SQ feature is"
1379                                      " required for packet pacing");
1380                         err = ENODEV;
1381                         goto error;
1382                 }
1383                 if (!config->hca_attr.log_max_static_sq_wq) {
1384                         DRV_LOG(ERR, "Static WQE SQ feature is"
1385                                      " required for packet pacing");
1386                         err = ENODEV;
1387                         goto error;
1388                 }
1389                 if (!config->hca_attr.qos.wqe_rate_pp) {
1390                         DRV_LOG(ERR, "WQE rate mode is required"
1391                                      " for packet pacing");
1392                         err = ENODEV;
1393                         goto error;
1394                 }
1395 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1396                 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1397                              " can't create queues for packet pacing");
1398                 err = ENODEV;
1399                 goto error;
1400 #endif
1401         }
1402         if (config->devx) {
1403                 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1404
1405                 err = config->hca_attr.access_register_user ?
1406                         mlx5_devx_cmd_register_read
1407                                 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1408                                 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1409                 if (!err) {
1410                         uint32_t ts_mode;
1411
1412                         /* MTUTC register is read successfully. */
1413                         ts_mode = MLX5_GET(register_mtutc, reg,
1414                                            time_stamp_mode);
1415                         if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1416                                 config->rt_timestamp = 1;
1417                 } else {
1418                         /* Kernel does not support register reading. */
1419                         if (config->hca_attr.dev_freq_khz ==
1420                                                  (NS_PER_S / MS_PER_S))
1421                                 config->rt_timestamp = 1;
1422                 }
1423         }
1424         /*
1425          * If HW has bug working with tunnel packet decapsulation and
1426          * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1427          * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1428          */
1429         if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1430                 config->hw_fcs_strip = 0;
1431         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1432                 (config->hw_fcs_strip ? "" : "not "));
1433         if (config->mprq.enabled && mprq) {
1434                 if (config->mprq.stride_num_n &&
1435                     (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1436                      config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1437                         config->mprq.stride_num_n =
1438                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1439                                                 mprq_min_stride_num_n),
1440                                         mprq_max_stride_num_n);
1441                         DRV_LOG(WARNING,
1442                                 "the number of strides"
1443                                 " for Multi-Packet RQ is out of range,"
1444                                 " setting default value (%u)",
1445                                 1 << config->mprq.stride_num_n);
1446                 }
1447                 if (config->mprq.stride_size_n &&
1448                     (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1449                      config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1450                         config->mprq.stride_size_n =
1451                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1452                                                 mprq_min_stride_size_n),
1453                                         mprq_max_stride_size_n);
1454                         DRV_LOG(WARNING,
1455                                 "the size of a stride"
1456                                 " for Multi-Packet RQ is out of range,"
1457                                 " setting default value (%u)",
1458                                 1 << config->mprq.stride_size_n);
1459                 }
1460                 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1461                 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1462         } else if (config->mprq.enabled && !mprq) {
1463                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1464                 config->mprq.enabled = 0;
1465         }
1466         if (config->max_dump_files_num == 0)
1467                 config->max_dump_files_num = 128;
1468         eth_dev = rte_eth_dev_allocate(name);
1469         if (eth_dev == NULL) {
1470                 DRV_LOG(ERR, "can not allocate rte ethdev");
1471                 err = ENOMEM;
1472                 goto error;
1473         }
1474         if (priv->representor) {
1475                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1476                 eth_dev->data->representor_id = priv->representor_id;
1477         }
1478         priv->mp_id.port_id = eth_dev->data->port_id;
1479         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
1480         /*
1481          * Store associated network device interface index. This index
1482          * is permanent throughout the lifetime of device. So, we may store
1483          * the ifindex here and use the cached value further.
1484          */
1485         MLX5_ASSERT(spawn->ifindex);
1486         priv->if_index = spawn->ifindex;
1487         eth_dev->data->dev_private = priv;
1488         priv->dev_data = eth_dev->data;
1489         eth_dev->data->mac_addrs = priv->mac;
1490         eth_dev->device = dpdk_dev;
1491         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1492         /* Configure the first MAC address by default. */
1493         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1494                 DRV_LOG(ERR,
1495                         "port %u cannot get MAC address, is mlx5_en"
1496                         " loaded? (errno: %s)",
1497                         eth_dev->data->port_id, strerror(rte_errno));
1498                 err = ENODEV;
1499                 goto error;
1500         }
1501         DRV_LOG(INFO,
1502                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1503                 eth_dev->data->port_id,
1504                 mac.addr_bytes[0], mac.addr_bytes[1],
1505                 mac.addr_bytes[2], mac.addr_bytes[3],
1506                 mac.addr_bytes[4], mac.addr_bytes[5]);
1507 #ifdef RTE_LIBRTE_MLX5_DEBUG
1508         {
1509                 char ifname[MLX5_NAMESIZE];
1510
1511                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1512                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1513                                 eth_dev->data->port_id, ifname);
1514                 else
1515                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1516                                 eth_dev->data->port_id);
1517         }
1518 #endif
1519         /* Get actual MTU if possible. */
1520         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1521         if (err) {
1522                 err = rte_errno;
1523                 goto error;
1524         }
1525         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1526                 priv->mtu);
1527         /* Initialize burst functions to prevent crashes before link-up. */
1528         eth_dev->rx_pkt_burst = removed_rx_burst;
1529         eth_dev->tx_pkt_burst = removed_tx_burst;
1530         eth_dev->dev_ops = &mlx5_dev_ops;
1531         eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1532         eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1533         eth_dev->rx_queue_count = mlx5_rx_queue_count;
1534         /* Register MAC address. */
1535         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1536         if (config->vf && config->vf_nl_en)
1537                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1538                                       mlx5_ifindex(eth_dev),
1539                                       eth_dev->data->mac_addrs,
1540                                       MLX5_MAX_MAC_ADDRESSES);
1541         priv->flows = 0;
1542         priv->ctrl_flows = 0;
1543         rte_spinlock_init(&priv->flow_list_lock);
1544         TAILQ_INIT(&priv->flow_meters);
1545         TAILQ_INIT(&priv->flow_meter_profiles);
1546         /* Hint libmlx5 to use PMD allocator for data plane resources */
1547         mlx5_glue->dv_set_context_attr(sh->ctx,
1548                         MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1549                         (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
1550                                 .alloc = &mlx5_alloc_verbs_buf,
1551                                 .free = &mlx5_free_verbs_buf,
1552                                 .data = sh,
1553                         }));
1554         /* Bring Ethernet device up. */
1555         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1556                 eth_dev->data->port_id);
1557         mlx5_set_link_up(eth_dev);
1558         /*
1559          * Even though the interrupt handler is not installed yet,
1560          * interrupts will still trigger on the async_fd from
1561          * Verbs context returned by ibv_open_device().
1562          */
1563         mlx5_link_update(eth_dev, 0);
1564 #ifdef HAVE_MLX5DV_DR_ESWITCH
1565         if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1566               (switch_info->representor || switch_info->master)))
1567                 config->dv_esw_en = 0;
1568 #else
1569         config->dv_esw_en = 0;
1570 #endif
1571         /* Detect minimal data bytes to inline. */
1572         mlx5_set_min_inline(spawn, config);
1573         /* Store device configuration on private structure. */
1574         priv->config = *config;
1575         /* Create context for virtual machine VLAN workaround. */
1576         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1577         if (config->dv_flow_en) {
1578                 err = mlx5_alloc_shared_dr(priv);
1579                 if (err)
1580                         goto error;
1581         }
1582         if (config->devx && config->dv_flow_en && config->dest_tir) {
1583                 priv->obj_ops = devx_obj_ops;
1584                 priv->obj_ops.drop_action_create =
1585                                                 ibv_obj_ops.drop_action_create;
1586                 priv->obj_ops.drop_action_destroy =
1587                                                 ibv_obj_ops.drop_action_destroy;
1588 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1589                 priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify;
1590 #else
1591                 if (config->dv_esw_en)
1592                         priv->obj_ops.txq_obj_modify =
1593                                                 ibv_obj_ops.txq_obj_modify;
1594 #endif
1595                 /* Use specific wrappers for Tx object. */
1596                 priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;
1597                 priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;
1598                 mlx5_queue_counter_id_prepare(eth_dev);
1599
1600         } else {
1601                 priv->obj_ops = ibv_obj_ops;
1602         }
1603         priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
1604         if (!priv->drop_queue.hrxq)
1605                 goto error;
1606         /* Supported Verbs flow priority number detection. */
1607         err = mlx5_flow_discover_priorities(eth_dev);
1608         if (err < 0) {
1609                 err = -err;
1610                 goto error;
1611         }
1612         priv->config.flow_prio = err;
1613         if (!priv->config.dv_esw_en &&
1614             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1615                 DRV_LOG(WARNING, "metadata mode %u is not supported "
1616                                  "(no E-Switch)", priv->config.dv_xmeta_en);
1617                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1618         }
1619         mlx5_set_metadata_mask(eth_dev);
1620         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1621             !priv->sh->dv_regc0_mask) {
1622                 DRV_LOG(ERR, "metadata mode %u is not supported "
1623                              "(no metadata reg_c[0] is available)",
1624                              priv->config.dv_xmeta_en);
1625                         err = ENOTSUP;
1626                         goto error;
1627         }
1628         mlx5_cache_list_init(&priv->hrxqs, "hrxq", 0, eth_dev,
1629                              mlx5_hrxq_create_cb,
1630                              mlx5_hrxq_match_cb,
1631                              mlx5_hrxq_remove_cb);
1632         /* Query availability of metadata reg_c's. */
1633         err = mlx5_flow_discover_mreg_c(eth_dev);
1634         if (err < 0) {
1635                 err = -err;
1636                 goto error;
1637         }
1638         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1639                 DRV_LOG(DEBUG,
1640                         "port %u extensive metadata register is not supported",
1641                         eth_dev->data->port_id);
1642                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1643                         DRV_LOG(ERR, "metadata mode %u is not supported "
1644                                      "(no metadata registers available)",
1645                                      priv->config.dv_xmeta_en);
1646                         err = ENOTSUP;
1647                         goto error;
1648                 }
1649         }
1650         if (priv->config.dv_flow_en &&
1651             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1652             mlx5_flow_ext_mreg_supported(eth_dev) &&
1653             priv->sh->dv_regc0_mask) {
1654                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1655                                                       MLX5_FLOW_MREG_HTABLE_SZ,
1656                                                       0, 0,
1657                                                       flow_dv_mreg_create_cb,
1658                                                       flow_dv_mreg_match_cb,
1659                                                       flow_dv_mreg_remove_cb);
1660                 if (!priv->mreg_cp_tbl) {
1661                         err = ENOMEM;
1662                         goto error;
1663                 }
1664                 priv->mreg_cp_tbl->ctx = eth_dev;
1665         }
1666         rte_spinlock_init(&priv->shared_act_sl);
1667         mlx5_flow_counter_mode_config(eth_dev);
1668         if (priv->config.dv_flow_en)
1669                 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
1670         return eth_dev;
1671 error:
1672         if (priv) {
1673                 if (priv->mreg_cp_tbl)
1674                         mlx5_hlist_destroy(priv->mreg_cp_tbl);
1675                 if (priv->sh)
1676                         mlx5_os_free_shared_dr(priv);
1677                 if (priv->nl_socket_route >= 0)
1678                         close(priv->nl_socket_route);
1679                 if (priv->nl_socket_rdma >= 0)
1680                         close(priv->nl_socket_rdma);
1681                 if (priv->vmwa_context)
1682                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1683                 if (eth_dev && priv->drop_queue.hrxq)
1684                         mlx5_drop_action_destroy(eth_dev);
1685                 if (own_domain_id)
1686                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1687                 mlx5_cache_list_destroy(&priv->hrxqs);
1688                 mlx5_free(priv);
1689                 if (eth_dev != NULL)
1690                         eth_dev->data->dev_private = NULL;
1691         }
1692         if (eth_dev != NULL) {
1693                 /* mac_addrs must not be freed alone because part of
1694                  * dev_private
1695                  **/
1696                 eth_dev->data->mac_addrs = NULL;
1697                 rte_eth_dev_release_port(eth_dev);
1698         }
1699         if (sh)
1700                 mlx5_free_shared_dev_ctx(sh);
1701         MLX5_ASSERT(err > 0);
1702         rte_errno = err;
1703         return NULL;
1704 }
1705
1706 /**
1707  * Comparison callback to sort device data.
1708  *
1709  * This is meant to be used with qsort().
1710  *
1711  * @param a[in]
1712  *   Pointer to pointer to first data object.
1713  * @param b[in]
1714  *   Pointer to pointer to second data object.
1715  *
1716  * @return
1717  *   0 if both objects are equal, less than 0 if the first argument is less
1718  *   than the second, greater than 0 otherwise.
1719  */
1720 static int
1721 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1722 {
1723         const struct mlx5_switch_info *si_a =
1724                 &((const struct mlx5_dev_spawn_data *)a)->info;
1725         const struct mlx5_switch_info *si_b =
1726                 &((const struct mlx5_dev_spawn_data *)b)->info;
1727         int ret;
1728
1729         /* Master device first. */
1730         ret = si_b->master - si_a->master;
1731         if (ret)
1732                 return ret;
1733         /* Then representor devices. */
1734         ret = si_b->representor - si_a->representor;
1735         if (ret)
1736                 return ret;
1737         /* Unidentified devices come last in no specific order. */
1738         if (!si_a->representor)
1739                 return 0;
1740         /* Order representors by name. */
1741         return si_a->port_name - si_b->port_name;
1742 }
1743
1744 /**
1745  * Match PCI information for possible slaves of bonding device.
1746  *
1747  * @param[in] ibv_dev
1748  *   Pointer to Infiniband device structure.
1749  * @param[in] pci_dev
1750  *   Pointer to primary PCI address structure to match.
1751  * @param[in] nl_rdma
1752  *   Netlink RDMA group socket handle.
1753  * @param[in] owner
1754  *   Rerepsentor owner PF index.
1755  * @param[out] bond_info
1756  *   Pointer to bonding information.
1757  *
1758  * @return
1759  *   negative value if no bonding device found, otherwise
1760  *   positive index of slave PF in bonding.
1761  */
1762 static int
1763 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1764                            const struct rte_pci_addr *pci_dev,
1765                            int nl_rdma, uint16_t owner,
1766                            struct mlx5_bond_info *bond_info)
1767 {
1768         char ifname[IF_NAMESIZE + 1];
1769         unsigned int ifindex;
1770         unsigned int np, i;
1771         FILE *bond_file = NULL, *file;
1772         int pf = -1;
1773         int ret;
1774
1775         /*
1776          * Try to get master device name. If something goes
1777          * wrong suppose the lack of kernel support and no
1778          * bonding devices.
1779          */
1780         memset(bond_info, 0, sizeof(*bond_info));
1781         if (nl_rdma < 0)
1782                 return -1;
1783         if (!strstr(ibv_dev->name, "bond"))
1784                 return -1;
1785         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
1786         if (!np)
1787                 return -1;
1788         /*
1789          * The Master device might not be on the predefined
1790          * port (not on port index 1, it is not garanted),
1791          * we have to scan all Infiniband device port and
1792          * find master.
1793          */
1794         for (i = 1; i <= np; ++i) {
1795                 /* Check whether Infiniband port is populated. */
1796                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
1797                 if (!ifindex)
1798                         continue;
1799                 if (!if_indextoname(ifindex, ifname))
1800                         continue;
1801                 /* Try to read bonding slave names from sysfs. */
1802                 MKSTR(slaves,
1803                       "/sys/class/net/%s/master/bonding/slaves", ifname);
1804                 bond_file = fopen(slaves, "r");
1805                 if (bond_file)
1806                         break;
1807         }
1808         if (!bond_file)
1809                 return -1;
1810         /* Use safe format to check maximal buffer length. */
1811         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1812         while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1813                 char tmp_str[IF_NAMESIZE + 32];
1814                 struct rte_pci_addr pci_addr;
1815                 struct mlx5_switch_info info;
1816
1817                 /* Process slave interface names in the loop. */
1818                 snprintf(tmp_str, sizeof(tmp_str),
1819                          "/sys/class/net/%s", ifname);
1820                 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
1821                         DRV_LOG(WARNING, "can not get PCI address"
1822                                          " for netdev \"%s\"", ifname);
1823                         continue;
1824                 }
1825                 /* Slave interface PCI address match found. */
1826                 snprintf(tmp_str, sizeof(tmp_str),
1827                          "/sys/class/net/%s/phys_port_name", ifname);
1828                 file = fopen(tmp_str, "rb");
1829                 if (!file)
1830                         break;
1831                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1832                 if (fscanf(file, "%32s", tmp_str) == 1)
1833                         mlx5_translate_port_name(tmp_str, &info);
1834                 fclose(file);
1835                 /* Only process PF ports. */
1836                 if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY &&
1837                     info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1838                         continue;
1839                 /* Check max bonding member. */
1840                 if (info.port_name >= MLX5_BOND_MAX_PORTS) {
1841                         DRV_LOG(WARNING, "bonding index out of range, "
1842                                 "please increase MLX5_BOND_MAX_PORTS: %s",
1843                                 tmp_str);
1844                         break;
1845                 }
1846                 /* Match PCI address. */
1847                 if (pci_dev->domain == pci_addr.domain &&
1848                     pci_dev->bus == pci_addr.bus &&
1849                     pci_dev->devid == pci_addr.devid &&
1850                     pci_dev->function + owner == pci_addr.function)
1851                         pf = info.port_name;
1852                 /* Get ifindex. */
1853                 snprintf(tmp_str, sizeof(tmp_str),
1854                          "/sys/class/net/%s/ifindex", ifname);
1855                 file = fopen(tmp_str, "rb");
1856                 if (!file)
1857                         break;
1858                 ret = fscanf(file, "%u", &ifindex);
1859                 fclose(file);
1860                 if (ret != 1)
1861                         break;
1862                 /* Save bonding info. */
1863                 strncpy(bond_info->ports[info.port_name].ifname, ifname,
1864                         sizeof(bond_info->ports[0].ifname));
1865                 bond_info->ports[info.port_name].pci_addr = pci_addr;
1866                 bond_info->ports[info.port_name].ifindex = ifindex;
1867                 bond_info->n_port++;
1868         }
1869         if (pf >= 0) {
1870                 /* Get bond interface info */
1871                 ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex,
1872                                            bond_info->ifname);
1873                 if (ret)
1874                         DRV_LOG(ERR, "unable to get bond info: %s",
1875                                 strerror(rte_errno));
1876                 else
1877                         DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
1878                                 ifindex, bond_info->ifindex, bond_info->ifname);
1879         }
1880         return pf;
1881 }
1882
1883 /**
1884  * Register a PCI device within bonding.
1885  *
1886  * This function spawns Ethernet devices out of a given PCI device and
1887  * bonding owner PF index.
1888  *
1889  * @param[in] pci_dev
1890  *   PCI device information.
1891  * @param[in] req_eth_da
1892  *   Requested ethdev device argument.
1893  * @param[in] owner_id
1894  *   Requested owner PF port ID within bonding device, default to 0.
1895  *
1896  * @return
1897  *   0 on success, a negative errno value otherwise and rte_errno is set.
1898  */
1899 static int
1900 mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev,
1901                      struct rte_eth_devargs *req_eth_da,
1902                      uint16_t owner_id)
1903 {
1904         struct ibv_device **ibv_list;
1905         /*
1906          * Number of found IB Devices matching with requested PCI BDF.
1907          * nd != 1 means there are multiple IB devices over the same
1908          * PCI device and we have representors and master.
1909          */
1910         unsigned int nd = 0;
1911         /*
1912          * Number of found IB device Ports. nd = 1 and np = 1..n means
1913          * we have the single multiport IB device, and there may be
1914          * representors attached to some of found ports.
1915          */
1916         unsigned int np = 0;
1917         /*
1918          * Number of DPDK ethernet devices to Spawn - either over
1919          * multiple IB devices or multiple ports of single IB device.
1920          * Actually this is the number of iterations to spawn.
1921          */
1922         unsigned int ns = 0;
1923         /*
1924          * Bonding device
1925          *   < 0 - no bonding device (single one)
1926          *  >= 0 - bonding device (value is slave PF index)
1927          */
1928         int bd = -1;
1929         struct mlx5_dev_spawn_data *list = NULL;
1930         struct mlx5_dev_config dev_config;
1931         unsigned int dev_config_vf;
1932         struct rte_eth_devargs eth_da = *req_eth_da;
1933         struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */
1934         struct mlx5_bond_info bond_info;
1935         int ret = -1;
1936
1937         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1938                 mlx5_pmd_socket_init();
1939         ret = mlx5_init_once();
1940         if (ret) {
1941                 DRV_LOG(ERR, "unable to init PMD global data: %s",
1942                         strerror(rte_errno));
1943                 return -rte_errno;
1944         }
1945         errno = 0;
1946         ibv_list = mlx5_glue->get_device_list(&ret);
1947         if (!ibv_list) {
1948                 rte_errno = errno ? errno : ENOSYS;
1949                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1950                 return -rte_errno;
1951         }
1952         /*
1953          * First scan the list of all Infiniband devices to find
1954          * matching ones, gathering into the list.
1955          */
1956         struct ibv_device *ibv_match[ret + 1];
1957         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
1958         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1959         unsigned int i;
1960
1961         while (ret-- > 0) {
1962                 struct rte_pci_addr pci_addr;
1963
1964                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1965                 bd = mlx5_device_bond_pci_match
1966                                 (ibv_list[ret], &owner_pci, nl_rdma, owner_id,
1967                                  &bond_info);
1968                 if (bd >= 0) {
1969                         /*
1970                          * Bonding device detected. Only one match is allowed,
1971                          * the bonding is supported over multi-port IB device,
1972                          * there should be no matches on representor PCI
1973                          * functions or non VF LAG bonding devices with
1974                          * specified address.
1975                          */
1976                         if (nd) {
1977                                 DRV_LOG(ERR,
1978                                         "multiple PCI match on bonding device"
1979                                         "\"%s\" found", ibv_list[ret]->name);
1980                                 rte_errno = ENOENT;
1981                                 ret = -rte_errno;
1982                                 goto exit;
1983                         }
1984                         /* Amend owner pci address if owner PF ID specified. */
1985                         if (eth_da.nb_representor_ports)
1986                                 owner_pci.function += owner_id;
1987                         DRV_LOG(INFO, "PCI information matches for"
1988                                       " slave %d bonding device \"%s\"",
1989                                       bd, ibv_list[ret]->name);
1990                         ibv_match[nd++] = ibv_list[ret];
1991                         break;
1992                 } else {
1993                         /* Bonding device not found. */
1994                         if (mlx5_dev_to_pci_addr
1995                                 (ibv_list[ret]->ibdev_path, &pci_addr))
1996                                 continue;
1997                         if (owner_pci.domain != pci_addr.domain ||
1998                             owner_pci.bus != pci_addr.bus ||
1999                             owner_pci.devid != pci_addr.devid ||
2000                             owner_pci.function != pci_addr.function)
2001                                 continue;
2002                         DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2003                                 ibv_list[ret]->name);
2004                         ibv_match[nd++] = ibv_list[ret];
2005                 }
2006         }
2007         ibv_match[nd] = NULL;
2008         if (!nd) {
2009                 /* No device matches, just complain and bail out. */
2010                 DRV_LOG(WARNING,
2011                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
2012                         " are kernel drivers loaded?",
2013                         owner_pci.domain, owner_pci.bus,
2014                         owner_pci.devid, owner_pci.function);
2015                 rte_errno = ENOENT;
2016                 ret = -rte_errno;
2017                 goto exit;
2018         }
2019         if (nd == 1) {
2020                 /*
2021                  * Found single matching device may have multiple ports.
2022                  * Each port may be representor, we have to check the port
2023                  * number and check the representors existence.
2024                  */
2025                 if (nl_rdma >= 0)
2026                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2027                 if (!np)
2028                         DRV_LOG(WARNING, "can not get IB device \"%s\""
2029                                          " ports number", ibv_match[0]->name);
2030                 if (bd >= 0 && !np) {
2031                         DRV_LOG(ERR, "can not get ports"
2032                                      " for bonding device");
2033                         rte_errno = ENOENT;
2034                         ret = -rte_errno;
2035                         goto exit;
2036                 }
2037         }
2038 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
2039         if (bd >= 0) {
2040                 /*
2041                  * This may happen if there is VF LAG kernel support and
2042                  * application is compiled with older rdma_core library.
2043                  */
2044                 DRV_LOG(ERR,
2045                         "No kernel/verbs support for VF LAG bonding found.");
2046                 rte_errno = ENOTSUP;
2047                 ret = -rte_errno;
2048                 goto exit;
2049         }
2050 #endif
2051         /*
2052          * Now we can determine the maximal
2053          * amount of devices to be spawned.
2054          */
2055         list = mlx5_malloc(MLX5_MEM_ZERO,
2056                            sizeof(struct mlx5_dev_spawn_data) *
2057                            (np ? np : nd),
2058                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
2059         if (!list) {
2060                 DRV_LOG(ERR, "spawn data array allocation failure");
2061                 rte_errno = ENOMEM;
2062                 ret = -rte_errno;
2063                 goto exit;
2064         }
2065         if (bd >= 0 || np > 1) {
2066                 /*
2067                  * Single IB device with multiple ports found,
2068                  * it may be E-Switch master device and representors.
2069                  * We have to perform identification through the ports.
2070                  */
2071                 MLX5_ASSERT(nl_rdma >= 0);
2072                 MLX5_ASSERT(ns == 0);
2073                 MLX5_ASSERT(nd == 1);
2074                 MLX5_ASSERT(np);
2075                 for (i = 1; i <= np; ++i) {
2076                         list[ns].bond_info = &bond_info;
2077                         list[ns].max_port = np;
2078                         list[ns].phys_port = i;
2079                         list[ns].phys_dev = ibv_match[0];
2080                         list[ns].eth_dev = NULL;
2081                         list[ns].pci_dev = pci_dev;
2082                         list[ns].pf_bond = bd;
2083                         list[ns].ifindex = mlx5_nl_ifindex
2084                                 (nl_rdma,
2085                                 mlx5_os_get_dev_device_name
2086                                                 (list[ns].phys_dev), i);
2087                         if (!list[ns].ifindex) {
2088                                 /*
2089                                  * No network interface index found for the
2090                                  * specified port, it means there is no
2091                                  * representor on this port. It's OK,
2092                                  * there can be disabled ports, for example
2093                                  * if sriov_numvfs < sriov_totalvfs.
2094                                  */
2095                                 continue;
2096                         }
2097                         ret = -1;
2098                         if (nl_route >= 0)
2099                                 ret = mlx5_nl_switch_info
2100                                                (nl_route,
2101                                                 list[ns].ifindex,
2102                                                 &list[ns].info);
2103                         if (ret || (!list[ns].info.representor &&
2104                                     !list[ns].info.master)) {
2105                                 /*
2106                                  * We failed to recognize representors with
2107                                  * Netlink, let's try to perform the task
2108                                  * with sysfs.
2109                                  */
2110                                 ret =  mlx5_sysfs_switch_info
2111                                                 (list[ns].ifindex,
2112                                                  &list[ns].info);
2113                         }
2114 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
2115                         if (!ret && bd >= 0) {
2116                                 switch (list[ns].info.name_type) {
2117                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2118                                         if (list[ns].info.port_name == bd)
2119                                                 ns++;
2120                                         break;
2121                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2122                                         /* Fallthrough */
2123                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2124                                         /* Fallthrough */
2125                                 case MLX5_PHYS_PORT_NAME_TYPE_PFSF:
2126                                         if (list[ns].info.pf_num == bd)
2127                                                 ns++;
2128                                         break;
2129                                 default:
2130                                         break;
2131                                 }
2132                                 continue;
2133                         }
2134 #endif
2135                         if (!ret && (list[ns].info.representor ^
2136                                      list[ns].info.master))
2137                                 ns++;
2138                 }
2139                 if (!ns) {
2140                         DRV_LOG(ERR,
2141                                 "unable to recognize master/representors"
2142                                 " on the IB device with multiple ports");
2143                         rte_errno = ENOENT;
2144                         ret = -rte_errno;
2145                         goto exit;
2146                 }
2147         } else {
2148                 /*
2149                  * The existence of several matching entries (nd > 1) means
2150                  * port representors have been instantiated. No existing Verbs
2151                  * call nor sysfs entries can tell them apart, this can only
2152                  * be done through Netlink calls assuming kernel drivers are
2153                  * recent enough to support them.
2154                  *
2155                  * In the event of identification failure through Netlink,
2156                  * try again through sysfs, then:
2157                  *
2158                  * 1. A single IB device matches (nd == 1) with single
2159                  *    port (np=0/1) and is not a representor, assume
2160                  *    no switch support.
2161                  *
2162                  * 2. Otherwise no safe assumptions can be made;
2163                  *    complain louder and bail out.
2164                  */
2165                 for (i = 0; i != nd; ++i) {
2166                         memset(&list[ns].info, 0, sizeof(list[ns].info));
2167                         list[ns].bond_info = NULL;
2168                         list[ns].max_port = 1;
2169                         list[ns].phys_port = 1;
2170                         list[ns].phys_dev = ibv_match[i];
2171                         list[ns].eth_dev = NULL;
2172                         list[ns].pci_dev = pci_dev;
2173                         list[ns].pf_bond = -1;
2174                         list[ns].ifindex = 0;
2175                         if (nl_rdma >= 0)
2176                                 list[ns].ifindex = mlx5_nl_ifindex
2177                                 (nl_rdma,
2178                                 mlx5_os_get_dev_device_name
2179                                                 (list[ns].phys_dev), 1);
2180                         if (!list[ns].ifindex) {
2181                                 char ifname[IF_NAMESIZE];
2182
2183                                 /*
2184                                  * Netlink failed, it may happen with old
2185                                  * ib_core kernel driver (before 4.16).
2186                                  * We can assume there is old driver because
2187                                  * here we are processing single ports IB
2188                                  * devices. Let's try sysfs to retrieve
2189                                  * the ifindex. The method works for
2190                                  * master device only.
2191                                  */
2192                                 if (nd > 1) {
2193                                         /*
2194                                          * Multiple devices found, assume
2195                                          * representors, can not distinguish
2196                                          * master/representor and retrieve
2197                                          * ifindex via sysfs.
2198                                          */
2199                                         continue;
2200                                 }
2201                                 ret = mlx5_get_ifname_sysfs
2202                                         (ibv_match[i]->ibdev_path, ifname);
2203                                 if (!ret)
2204                                         list[ns].ifindex =
2205                                                 if_nametoindex(ifname);
2206                                 if (!list[ns].ifindex) {
2207                                         /*
2208                                          * No network interface index found
2209                                          * for the specified device, it means
2210                                          * there it is neither representor
2211                                          * nor master.
2212                                          */
2213                                         continue;
2214                                 }
2215                         }
2216                         ret = -1;
2217                         if (nl_route >= 0)
2218                                 ret = mlx5_nl_switch_info
2219                                                (nl_route,
2220                                                 list[ns].ifindex,
2221                                                 &list[ns].info);
2222                         if (ret || (!list[ns].info.representor &&
2223                                     !list[ns].info.master)) {
2224                                 /*
2225                                  * We failed to recognize representors with
2226                                  * Netlink, let's try to perform the task
2227                                  * with sysfs.
2228                                  */
2229                                 ret =  mlx5_sysfs_switch_info
2230                                                 (list[ns].ifindex,
2231                                                  &list[ns].info);
2232                         }
2233                         if (!ret && (list[ns].info.representor ^
2234                                      list[ns].info.master)) {
2235                                 ns++;
2236                         } else if ((nd == 1) &&
2237                                    !list[ns].info.representor &&
2238                                    !list[ns].info.master) {
2239                                 /*
2240                                  * Single IB device with
2241                                  * one physical port and
2242                                  * attached network device.
2243                                  * May be SRIOV is not enabled
2244                                  * or there is no representors.
2245                                  */
2246                                 DRV_LOG(INFO, "no E-Switch support detected");
2247                                 ns++;
2248                                 break;
2249                         }
2250                 }
2251                 if (!ns) {
2252                         DRV_LOG(ERR,
2253                                 "unable to recognize master/representors"
2254                                 " on the multiple IB devices");
2255                         rte_errno = ENOENT;
2256                         ret = -rte_errno;
2257                         goto exit;
2258                 }
2259         }
2260         MLX5_ASSERT(ns);
2261         /*
2262          * Sort list to probe devices in natural order for users convenience
2263          * (i.e. master first, then representors from lowest to highest ID).
2264          */
2265         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2266         /* Device specific configuration. */
2267         switch (pci_dev->id.device_id) {
2268         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2269         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2270         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2271         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2272         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2273         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2274         case PCI_DEVICE_ID_MELLANOX_CONNECTXVF:
2275                 dev_config_vf = 1;
2276                 break;
2277         default:
2278                 dev_config_vf = 0;
2279                 break;
2280         }
2281         if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) {
2282                 /* Set devargs default values. */
2283                 if (eth_da.nb_mh_controllers == 0) {
2284                         eth_da.nb_mh_controllers = 1;
2285                         eth_da.mh_controllers[0] = 0;
2286                 }
2287                 if (eth_da.nb_ports == 0 && ns > 0) {
2288                         if (list[0].pf_bond >= 0 && list[0].info.representor)
2289                                 DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s",
2290                                         pci_dev->device.devargs->args);
2291                         eth_da.nb_ports = 1;
2292                         eth_da.ports[0] = list[0].info.pf_num;
2293                 }
2294                 if (eth_da.nb_representor_ports == 0) {
2295                         eth_da.nb_representor_ports = 1;
2296                         eth_da.representor_ports[0] = 0;
2297                 }
2298         }
2299         for (i = 0; i != ns; ++i) {
2300                 uint32_t restore;
2301
2302                 /* Default configuration. */
2303                 memset(&dev_config, 0, sizeof(struct mlx5_dev_config));
2304                 dev_config.vf = dev_config_vf;
2305                 dev_config.mps = MLX5_ARG_UNSET;
2306                 dev_config.dbnc = MLX5_ARG_UNSET;
2307                 dev_config.rx_vec_en = 1;
2308                 dev_config.txq_inline_max = MLX5_ARG_UNSET;
2309                 dev_config.txq_inline_min = MLX5_ARG_UNSET;
2310                 dev_config.txq_inline_mpw = MLX5_ARG_UNSET;
2311                 dev_config.txqs_inline = MLX5_ARG_UNSET;
2312                 dev_config.vf_nl_en = 1;
2313                 dev_config.mr_ext_memseg_en = 1;
2314                 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
2315                 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
2316                 dev_config.dv_esw_en = 1;
2317                 dev_config.dv_flow_en = 1;
2318                 dev_config.decap_en = 1;
2319                 dev_config.log_hp_size = MLX5_ARG_UNSET;
2320                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2321                                                  &list[i],
2322                                                  &dev_config,
2323                                                  &eth_da);
2324                 if (!list[i].eth_dev) {
2325                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2326                                 break;
2327                         /* Device is disabled or already spawned. Ignore it. */
2328                         continue;
2329                 }
2330                 restore = list[i].eth_dev->data->dev_flags;
2331                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2332                 /* Restore non-PCI flags cleared by the above call. */
2333                 list[i].eth_dev->data->dev_flags |= restore;
2334                 rte_eth_dev_probing_finish(list[i].eth_dev);
2335         }
2336         if (i != ns) {
2337                 DRV_LOG(ERR,
2338                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2339                         " encountering an error: %s",
2340                         owner_pci.domain, owner_pci.bus,
2341                         owner_pci.devid, owner_pci.function,
2342                         strerror(rte_errno));
2343                 ret = -rte_errno;
2344                 /* Roll back. */
2345                 while (i--) {
2346                         if (!list[i].eth_dev)
2347                                 continue;
2348                         mlx5_dev_close(list[i].eth_dev);
2349                         /* mac_addrs must not be freed because in dev_private */
2350                         list[i].eth_dev->data->mac_addrs = NULL;
2351                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2352                 }
2353                 /* Restore original error. */
2354                 rte_errno = -ret;
2355         } else {
2356                 ret = 0;
2357         }
2358 exit:
2359         /*
2360          * Do the routine cleanup:
2361          * - close opened Netlink sockets
2362          * - free allocated spawn data array
2363          * - free the Infiniband device list
2364          */
2365         if (nl_rdma >= 0)
2366                 close(nl_rdma);
2367         if (nl_route >= 0)
2368                 close(nl_route);
2369         if (list)
2370                 mlx5_free(list);
2371         MLX5_ASSERT(ibv_list);
2372         mlx5_glue->free_device_list(ibv_list);
2373         return ret;
2374 }
2375
2376 /**
2377  * DPDK callback to register a PCI device.
2378  *
2379  * This function spawns Ethernet devices out of a given PCI device.
2380  *
2381  * @param[in] pci_drv
2382  *   PCI driver structure (mlx5_driver).
2383  * @param[in] pci_dev
2384  *   PCI device information.
2385  *
2386  * @return
2387  *   0 on success, a negative errno value otherwise and rte_errno is set.
2388  */
2389 int
2390 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2391                   struct rte_pci_device *pci_dev)
2392 {
2393         struct rte_eth_devargs eth_da = { .type = RTE_ETH_REPRESENTOR_NONE };
2394         int ret = 0;
2395         uint16_t p;
2396
2397         if (pci_dev->device.devargs) {
2398                 /* Parse representor information from device argument. */
2399                 if (pci_dev->device.devargs->cls_str)
2400                         ret = rte_eth_devargs_parse
2401                                 (pci_dev->device.devargs->cls_str, &eth_da);
2402                 if (ret) {
2403                         DRV_LOG(ERR, "failed to parse device arguments: %s",
2404                                 pci_dev->device.devargs->cls_str);
2405                         return -rte_errno;
2406                 }
2407                 if (eth_da.type == RTE_ETH_REPRESENTOR_NONE) {
2408                         /* Support legacy device argument */
2409                         ret = rte_eth_devargs_parse
2410                                 (pci_dev->device.devargs->args, &eth_da);
2411                         if (ret) {
2412                                 DRV_LOG(ERR, "failed to parse device arguments: %s",
2413                                         pci_dev->device.devargs->args);
2414                                 return -rte_errno;
2415                         }
2416                 }
2417         }
2418
2419         if (eth_da.nb_ports > 0) {
2420                 /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */
2421                 for (p = 0; p < eth_da.nb_ports; p++)
2422                         ret = mlx5_os_pci_probe_pf(pci_dev, &eth_da,
2423                                                    eth_da.ports[p]);
2424         } else {
2425                 ret = mlx5_os_pci_probe_pf(pci_dev, &eth_da, 0);
2426         }
2427         return ret;
2428 }
2429
2430 static int
2431 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
2432 {
2433         char *env;
2434         int value;
2435
2436         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2437         /* Get environment variable to store. */
2438         env = getenv(MLX5_SHUT_UP_BF);
2439         value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
2440         if (config->dbnc == MLX5_ARG_UNSET)
2441                 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
2442         else
2443                 setenv(MLX5_SHUT_UP_BF,
2444                        config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
2445         return value;
2446 }
2447
2448 static void
2449 mlx5_restore_doorbell_mapping_env(int value)
2450 {
2451         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2452         /* Restore the original environment variable state. */
2453         if (value == MLX5_ARG_UNSET)
2454                 unsetenv(MLX5_SHUT_UP_BF);
2455         else
2456                 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
2457 }
2458
2459 /**
2460  * Extract pdn of PD object using DV API.
2461  *
2462  * @param[in] pd
2463  *   Pointer to the verbs PD object.
2464  * @param[out] pdn
2465  *   Pointer to the PD object number variable.
2466  *
2467  * @return
2468  *   0 on success, error value otherwise.
2469  */
2470 int
2471 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
2472 {
2473 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2474         struct mlx5dv_obj obj;
2475         struct mlx5dv_pd pd_info;
2476         int ret = 0;
2477
2478         obj.pd.in = pd;
2479         obj.pd.out = &pd_info;
2480         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
2481         if (ret) {
2482                 DRV_LOG(DEBUG, "Fail to get PD object info");
2483                 return ret;
2484         }
2485         *pdn = pd_info.pdn;
2486         return 0;
2487 #else
2488         (void)pd;
2489         (void)pdn;
2490         return -ENOTSUP;
2491 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
2492 }
2493
2494 /**
2495  * Function API to open IB device.
2496  *
2497  * This function calls the Linux glue APIs to open a device.
2498  *
2499  * @param[in] spawn
2500  *   Pointer to the IB device attributes (name, port, etc).
2501  * @param[out] config
2502  *   Pointer to device configuration structure.
2503  * @param[out] sh
2504  *   Pointer to shared context structure.
2505  *
2506  * @return
2507  *   0 on success, a positive error value otherwise.
2508  */
2509 int
2510 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
2511                      const struct mlx5_dev_config *config,
2512                      struct mlx5_dev_ctx_shared *sh)
2513 {
2514         int dbmap_env;
2515         int err = 0;
2516
2517         sh->numa_node = spawn->pci_dev->device.numa_node;
2518         pthread_mutex_init(&sh->txpp.mutex, NULL);
2519         /*
2520          * Configure environment variable "MLX5_BF_SHUT_UP"
2521          * before the device creation. The rdma_core library
2522          * checks the variable at device creation and
2523          * stores the result internally.
2524          */
2525         dbmap_env = mlx5_config_doorbell_mapping_env(config);
2526         /* Try to open IB device with DV first, then usual Verbs. */
2527         errno = 0;
2528         sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
2529         if (sh->ctx) {
2530                 sh->devx = 1;
2531                 DRV_LOG(DEBUG, "DevX is supported");
2532                 /* The device is created, no need for environment. */
2533                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2534         } else {
2535                 /* The environment variable is still configured. */
2536                 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
2537                 err = errno ? errno : ENODEV;
2538                 /*
2539                  * The environment variable is not needed anymore,
2540                  * all device creation attempts are completed.
2541                  */
2542                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2543                 if (!sh->ctx)
2544                         return err;
2545                 DRV_LOG(DEBUG, "DevX is NOT supported");
2546                 err = 0;
2547         }
2548         if (!err && sh->ctx) {
2549                 /* Hint libmlx5 to use PMD allocator for data plane resources */
2550                 mlx5_glue->dv_set_context_attr(sh->ctx,
2551                         MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
2552                         (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
2553                                 .alloc = &mlx5_alloc_verbs_buf,
2554                                 .free = &mlx5_free_verbs_buf,
2555                                 .data = sh,
2556                         }));
2557         }
2558         return err;
2559 }
2560
2561 /**
2562  * Install shared asynchronous device events handler.
2563  * This function is implemented to support event sharing
2564  * between multiple ports of single IB device.
2565  *
2566  * @param sh
2567  *   Pointer to mlx5_dev_ctx_shared object.
2568  */
2569 void
2570 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2571 {
2572         int ret;
2573         int flags;
2574
2575         sh->intr_handle.fd = -1;
2576         flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
2577         ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
2578                     F_SETFL, flags | O_NONBLOCK);
2579         if (ret) {
2580                 DRV_LOG(INFO, "failed to change file descriptor async event"
2581                         " queue");
2582         } else {
2583                 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
2584                 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2585                 if (rte_intr_callback_register(&sh->intr_handle,
2586                                         mlx5_dev_interrupt_handler, sh)) {
2587                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2588                         sh->intr_handle.fd = -1;
2589                 }
2590         }
2591         if (sh->devx) {
2592 #ifdef HAVE_IBV_DEVX_ASYNC
2593                 sh->intr_handle_devx.fd = -1;
2594                 sh->devx_comp =
2595                         (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
2596                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2597                 if (!devx_comp) {
2598                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2599                         return;
2600                 }
2601                 flags = fcntl(devx_comp->fd, F_GETFL);
2602                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2603                 if (ret) {
2604                         DRV_LOG(INFO, "failed to change file descriptor"
2605                                 " devx comp");
2606                         return;
2607                 }
2608                 sh->intr_handle_devx.fd = devx_comp->fd;
2609                 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2610                 if (rte_intr_callback_register(&sh->intr_handle_devx,
2611                                         mlx5_dev_interrupt_handler_devx, sh)) {
2612                         DRV_LOG(INFO, "Fail to install the devx shared"
2613                                 " interrupt.");
2614                         sh->intr_handle_devx.fd = -1;
2615                 }
2616 #endif /* HAVE_IBV_DEVX_ASYNC */
2617         }
2618 }
2619
2620 /**
2621  * Uninstall shared asynchronous device events handler.
2622  * This function is implemented to support event sharing
2623  * between multiple ports of single IB device.
2624  *
2625  * @param dev
2626  *   Pointer to mlx5_dev_ctx_shared object.
2627  */
2628 void
2629 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2630 {
2631         if (sh->intr_handle.fd >= 0)
2632                 mlx5_intr_callback_unregister(&sh->intr_handle,
2633                                               mlx5_dev_interrupt_handler, sh);
2634 #ifdef HAVE_IBV_DEVX_ASYNC
2635         if (sh->intr_handle_devx.fd >= 0)
2636                 rte_intr_callback_unregister(&sh->intr_handle_devx,
2637                                   mlx5_dev_interrupt_handler_devx, sh);
2638         if (sh->devx_comp)
2639                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2640 #endif
2641 }
2642
2643 /**
2644  * Read statistics by a named counter.
2645  *
2646  * @param[in] priv
2647  *   Pointer to the private device data structure.
2648  * @param[in] ctr_name
2649  *   Pointer to the name of the statistic counter to read
2650  * @param[out] stat
2651  *   Pointer to read statistic value.
2652  * @return
2653  *   0 on success and stat is valud, 1 if failed to read the value
2654  *   rte_errno is set.
2655  *
2656  */
2657 int
2658 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2659                       uint64_t *stat)
2660 {
2661         int fd;
2662
2663         if (priv->sh) {
2664                 if (priv->q_counters != NULL &&
2665                     strcmp(ctr_name, "out_of_buffer") == 0)
2666                         return mlx5_devx_cmd_queue_counter_query(priv->sh->ctx,
2667                                                            0, (uint32_t *)stat);
2668                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2669                       priv->sh->ibdev_path,
2670                       priv->dev_port,
2671                       ctr_name);
2672                 fd = open(path, O_RDONLY);
2673                 /*
2674                  * in switchdev the file location is not per port
2675                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2676                  */
2677                 if (fd == -1) {
2678                         MKSTR(path1, "%s/hw_counters/%s",
2679                               priv->sh->ibdev_path,
2680                               ctr_name);
2681                         fd = open(path1, O_RDONLY);
2682                 }
2683                 if (fd != -1) {
2684                         char buf[21] = {'\0'};
2685                         ssize_t n = read(fd, buf, sizeof(buf));
2686
2687                         close(fd);
2688                         if (n != -1) {
2689                                 *stat = strtoull(buf, NULL, 10);
2690                                 return 0;
2691                         }
2692                 }
2693         }
2694         *stat = 0;
2695         return 1;
2696 }
2697
2698 /**
2699  * Set the reg_mr and dereg_mr call backs
2700  *
2701  * @param reg_mr_cb[out]
2702  *   Pointer to reg_mr func
2703  * @param dereg_mr_cb[out]
2704  *   Pointer to dereg_mr func
2705  *
2706  */
2707 void
2708 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2709                       mlx5_dereg_mr_t *dereg_mr_cb)
2710 {
2711         *reg_mr_cb = mlx5_mr_verbs_ops.reg_mr;
2712         *dereg_mr_cb = mlx5_mr_verbs_ops.dereg_mr;
2713 }
2714
2715 /**
2716  * Remove a MAC address from device
2717  *
2718  * @param dev
2719  *   Pointer to Ethernet device structure.
2720  * @param index
2721  *   MAC address index.
2722  */
2723 void
2724 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2725 {
2726         struct mlx5_priv *priv = dev->data->dev_private;
2727         const int vf = priv->config.vf;
2728
2729         if (vf)
2730                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2731                                         mlx5_ifindex(dev), priv->mac_own,
2732                                         &dev->data->mac_addrs[index], index);
2733 }
2734
2735 /**
2736  * Adds a MAC address to the device
2737  *
2738  * @param dev
2739  *   Pointer to Ethernet device structure.
2740  * @param mac_addr
2741  *   MAC address to register.
2742  * @param index
2743  *   MAC address index.
2744  *
2745  * @return
2746  *   0 on success, a negative errno value otherwise
2747  */
2748 int
2749 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2750                      uint32_t index)
2751 {
2752         struct mlx5_priv *priv = dev->data->dev_private;
2753         const int vf = priv->config.vf;
2754         int ret = 0;
2755
2756         if (vf)
2757                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2758                                            mlx5_ifindex(dev), priv->mac_own,
2759                                            mac, index);
2760         return ret;
2761 }
2762
2763 /**
2764  * Modify a VF MAC address
2765  *
2766  * @param priv
2767  *   Pointer to device private data.
2768  * @param mac_addr
2769  *   MAC address to modify into.
2770  * @param iface_idx
2771  *   Net device interface index
2772  * @param vf_index
2773  *   VF index
2774  *
2775  * @return
2776  *   0 on success, a negative errno value otherwise
2777  */
2778 int
2779 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2780                            unsigned int iface_idx,
2781                            struct rte_ether_addr *mac_addr,
2782                            int vf_index)
2783 {
2784         return mlx5_nl_vf_mac_addr_modify
2785                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2786 }
2787
2788 /**
2789  * Set device promiscuous mode
2790  *
2791  * @param dev
2792  *   Pointer to Ethernet device structure.
2793  * @param enable
2794  *   0 - promiscuous is disabled, otherwise - enabled
2795  *
2796  * @return
2797  *   0 on success, a negative error value otherwise
2798  */
2799 int
2800 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2801 {
2802         struct mlx5_priv *priv = dev->data->dev_private;
2803
2804         return mlx5_nl_promisc(priv->nl_socket_route,
2805                                mlx5_ifindex(dev), !!enable);
2806 }
2807
2808 /**
2809  * Set device promiscuous mode
2810  *
2811  * @param dev
2812  *   Pointer to Ethernet device structure.
2813  * @param enable
2814  *   0 - all multicase is disabled, otherwise - enabled
2815  *
2816  * @return
2817  *   0 on success, a negative error value otherwise
2818  */
2819 int
2820 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2821 {
2822         struct mlx5_priv *priv = dev->data->dev_private;
2823
2824         return mlx5_nl_allmulti(priv->nl_socket_route,
2825                                 mlx5_ifindex(dev), !!enable);
2826 }
2827
2828 /**
2829  * Flush device MAC addresses
2830  *
2831  * @param dev
2832  *   Pointer to Ethernet device structure.
2833  *
2834  */
2835 void
2836 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2837 {
2838         struct mlx5_priv *priv = dev->data->dev_private;
2839
2840         mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2841                                dev->data->mac_addrs,
2842                                MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2843 }