drivers/net/mlx5/linux/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2020 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12 #include <net/if.h>
  13 #include <linux/rtnetlink.h>
  14 #include <linux/sockios.h>
  15 #include <linux/ethtool.h>
  16 #include <fcntl.h>
  17
  18 #include <rte_malloc.h>
  19 #include <rte_ethdev_driver.h>
  20 #include <rte_ethdev_pci.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_common.h>
  24 #include <rte_kvargs.h>
  25 #include <rte_rwlock.h>
  26 #include <rte_spinlock.h>
  27 #include <rte_string_fns.h>
  28 #include <rte_alarm.h>
  29 #include <rte_eal_paging.h>
  30
  31 #include <mlx5_glue.h>
  32 #include <mlx5_devx_cmds.h>
  33 #include <mlx5_common.h>
  34 #include <mlx5_common_mp.h>
  35 #include <mlx5_common_mr.h>
  36 #include <mlx5_malloc.h>
  37
  38 #include "mlx5_defs.h"
  39 #include "mlx5.h"
  40 #include "mlx5_common_os.h"
  41 #include "mlx5_utils.h"
  42 #include "mlx5_rxtx.h"
  43 #include "mlx5_autoconf.h"
  44 #include "mlx5_mr.h"
  45 #include "mlx5_flow.h"
  46 #include "rte_pmd_mlx5.h"
  47 #include "mlx5_verbs.h"
  48 #include "mlx5_nl.h"
  49 #include "mlx5_devx.h"
  50
  51 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
  52
  53 #ifndef HAVE_IBV_MLX5_MOD_MPW
  54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
  55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
  56 #endif
  57
  58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
  59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
  60 #endif
  61
  62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  63
  64 /* Spinlock for mlx5_shared_data allocation. */
  65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  66
  67 /* Process local data for secondary processes. */
  68 static struct mlx5_local_data mlx5_local_data;
  69
  70 /**
  71  * Set the completion channel file descriptor interrupt as non-blocking.
  72  *
  73  * @param[in] rxq_obj
  74  *   Pointer to RQ channel object, which includes the channel fd
  75  *
  76  * @param[out] fd
  77  *   The file descriptor (representing the intetrrupt) used in this channel.
  78  *
  79  * @return
  80  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
  81  */
  82 int
  83 mlx5_os_set_nonblock_channel_fd(int fd)
  84 {
  85         int flags;
  86
  87         flags = fcntl(fd, F_GETFL);
  88         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
  89 }
  90
  91 /**
  92  * Get mlx5 device attributes. The glue function query_device_ex() is called
  93  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
  94  * device attributes from the glue out parameter.
  95  *
  96  * @param dev
  97  *   Pointer to ibv context.
  98  *
  99  * @param device_attr
 100  *   Pointer to mlx5 device attributes.
 101  *
 102  * @return
 103  *   0 on success, non zero error number otherwise
 104  */
 105 int
 106 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
 107 {
 108         int err;
 109         struct ibv_device_attr_ex attr_ex;
 110         memset(device_attr, 0, sizeof(*device_attr));
 111         err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
 112         if (err)
 113                 return err;
 114
 115         device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
 116         device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
 117         device_attr->max_sge = attr_ex.orig_attr.max_sge;
 118         device_attr->max_cq = attr_ex.orig_attr.max_cq;
 119         device_attr->max_qp = attr_ex.orig_attr.max_qp;
 120         device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
 121         device_attr->max_rwq_indirection_table_size =
 122                 attr_ex.rss_caps.max_rwq_indirection_table_size;
 123         device_attr->max_tso = attr_ex.tso_caps.max_tso;
 124         device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
 125
 126         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 127         err = mlx5_glue->dv_query_device(ctx, &dv_attr);
 128         if (err)
 129                 return err;
 130
 131         device_attr->flags = dv_attr.flags;
 132         device_attr->comp_mask = dv_attr.comp_mask;
 133 #ifdef HAVE_IBV_MLX5_MOD_SWP
 134         device_attr->sw_parsing_offloads =
 135                 dv_attr.sw_parsing_caps.sw_parsing_offloads;
 136 #endif
 137         device_attr->min_single_stride_log_num_of_bytes =
 138                 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
 139         device_attr->max_single_stride_log_num_of_bytes =
 140                 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
 141         device_attr->min_single_wqe_log_num_of_strides =
 142                 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
 143         device_attr->max_single_wqe_log_num_of_strides =
 144                 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
 145         device_attr->stride_supported_qpts =
 146                 dv_attr.striding_rq_caps.supported_qpts;
 147 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 148         device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
 149 #endif
 150
 151         return err;
 152 }
 153
 154 /**
 155  * Verbs callback to allocate a memory. This function should allocate the space
 156  * according to the size provided residing inside a huge page.
 157  * Please note that all allocation must respect the alignment from libmlx5
 158  * (i.e. currently rte_mem_page_size()).
 159  *
 160  * @param[in] size
 161  *   The size in bytes of the memory to allocate.
 162  * @param[in] data
 163  *   A pointer to the callback data.
 164  *
 165  * @return
 166  *   Allocated buffer, NULL otherwise and rte_errno is set.
 167  */
 168 static void *
 169 mlx5_alloc_verbs_buf(size_t size, void *data)
 170 {
 171         struct mlx5_priv *priv = data;
 172         void *ret;
 173         unsigned int socket = SOCKET_ID_ANY;
 174         size_t alignment = rte_mem_page_size();
 175         if (alignment == (size_t)-1) {
 176                 DRV_LOG(ERR, "Failed to get mem page size");
 177                 rte_errno = ENOMEM;
 178                 return NULL;
 179         }
 180
 181         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
 182                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 183
 184                 socket = ctrl->socket;
 185         } else if (priv->verbs_alloc_ctx.type ==
 186                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
 187                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 188
 189                 socket = ctrl->socket;
 190         }
 191         MLX5_ASSERT(data != NULL);
 192         ret = mlx5_malloc(0, size, alignment, socket);
 193         if (!ret && size)
 194                 rte_errno = ENOMEM;
 195         return ret;
 196 }
 197
 198 /**
 199  * Verbs callback to free a memory.
 200  *
 201  * @param[in] ptr
 202  *   A pointer to the memory to free.
 203  * @param[in] data
 204  *   A pointer to the callback data.
 205  */
 206 static void
 207 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 208 {
 209         MLX5_ASSERT(data != NULL);
 210         mlx5_free(ptr);
 211 }
 212
 213 /**
 214  * Initialize DR related data within private structure.
 215  * Routine checks the reference counter and does actual
 216  * resources creation/initialization only if counter is zero.
 217  *
 218  * @param[in] priv
 219  *   Pointer to the private device data structure.
 220  *
 221  * @return
 222  *   Zero on success, positive error code otherwise.
 223  */
 224 static int
 225 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 226 {
 227         struct mlx5_dev_ctx_shared *sh = priv->sh;
 228         char s[MLX5_HLIST_NAMESIZE] __rte_unused;
 229         int err;
 230
 231         MLX5_ASSERT(sh && sh->refcnt);
 232         if (sh->refcnt > 1)
 233                 return 0;
 234         err = mlx5_alloc_table_hash_list(priv);
 235         if (err)
 236                 goto error;
 237         /* The resources below are only valid with DV support. */
 238 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 239         /* Init port id action cache list. */
 240         snprintf(s, sizeof(s), "%s_port_id_action_cache", sh->ibdev_name);
 241         mlx5_cache_list_init(&sh->port_id_action_list, s, 0, sh,
 242                              flow_dv_port_id_create_cb,
 243                              flow_dv_port_id_match_cb,
 244                              flow_dv_port_id_remove_cb);
 245         /* Init push vlan action cache list. */
 246         snprintf(s, sizeof(s), "%s_push_vlan_action_cache", sh->ibdev_name);
 247         mlx5_cache_list_init(&sh->push_vlan_action_list, s, 0, sh,
 248                              flow_dv_push_vlan_create_cb,
 249                              flow_dv_push_vlan_match_cb,
 250                              flow_dv_push_vlan_remove_cb);
 251         /* Init sample action cache list. */
 252         snprintf(s, sizeof(s), "%s_sample_action_cache", sh->ibdev_name);
 253         mlx5_cache_list_init(&sh->sample_action_list, s, 0,
 254                              &rte_eth_devices[priv->dev_data->port_id],
 255                              flow_dv_sample_create_cb,
 256                              flow_dv_sample_match_cb,
 257                              flow_dv_sample_remove_cb);
 258         /* Init dest array action cache list. */
 259         snprintf(s, sizeof(s), "%s_dest_array_cache", sh->ibdev_name);
 260         mlx5_cache_list_init(&sh->dest_array_list, s, 0,
 261                              &rte_eth_devices[priv->dev_data->port_id],
 262                              flow_dv_dest_array_create_cb,
 263                              flow_dv_dest_array_match_cb,
 264                              flow_dv_dest_array_remove_cb);
 265         /* Create tags hash list table. */
 266         snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name);
 267         sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE, 0,
 268                                           MLX5_HLIST_WRITE_MOST,
 269                                           flow_dv_tag_create_cb, NULL,
 270                                           flow_dv_tag_remove_cb);
 271         if (!sh->tag_table) {
 272                 DRV_LOG(ERR, "tags with hash creation failed.");
 273                 err = ENOMEM;
 274                 goto error;
 275         }
 276         sh->tag_table->ctx = sh;
 277         snprintf(s, sizeof(s), "%s_hdr_modify", sh->ibdev_name);
 278         sh->modify_cmds = mlx5_hlist_create(s, MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
 279                                             0, MLX5_HLIST_WRITE_MOST |
 280                                             MLX5_HLIST_DIRECT_KEY,
 281                                             flow_dv_modify_create_cb,
 282                                             flow_dv_modify_match_cb,
 283                                             flow_dv_modify_remove_cb);
 284         if (!sh->modify_cmds) {
 285                 DRV_LOG(ERR, "hdr modify hash creation failed");
 286                 err = ENOMEM;
 287                 goto error;
 288         }
 289         sh->modify_cmds->ctx = sh;
 290         snprintf(s, sizeof(s), "%s_encaps_decaps", sh->ibdev_name);
 291         sh->encaps_decaps = mlx5_hlist_create(s,
 292                                               MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
 293                                               0, MLX5_HLIST_DIRECT_KEY |
 294                                               MLX5_HLIST_WRITE_MOST,
 295                                               flow_dv_encap_decap_create_cb,
 296                                               flow_dv_encap_decap_match_cb,
 297                                               flow_dv_encap_decap_remove_cb);
 298         if (!sh->encaps_decaps) {
 299                 DRV_LOG(ERR, "encap decap hash creation failed");
 300                 err = ENOMEM;
 301                 goto error;
 302         }
 303         sh->encaps_decaps->ctx = sh;
 304 #endif
 305 #ifdef HAVE_MLX5DV_DR
 306         void *domain;
 307
 308         /* Reference counter is zero, we should initialize structures. */
 309         domain = mlx5_glue->dr_create_domain(sh->ctx,
 310                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 311         if (!domain) {
 312                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 313                 err = errno;
 314                 goto error;
 315         }
 316         sh->rx_domain = domain;
 317         domain = mlx5_glue->dr_create_domain(sh->ctx,
 318                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 319         if (!domain) {
 320                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 321                 err = errno;
 322                 goto error;
 323         }
 324         sh->tx_domain = domain;
 325 #ifdef HAVE_MLX5DV_DR_ESWITCH
 326         if (priv->config.dv_esw_en) {
 327                 domain  = mlx5_glue->dr_create_domain
 328                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 329                 if (!domain) {
 330                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 331                         err = errno;
 332                         goto error;
 333                 }
 334                 sh->fdb_domain = domain;
 335                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 336         }
 337 #endif
 338         if (!sh->tunnel_hub)
 339                 err = mlx5_alloc_tunnel_hub(sh);
 340         if (err) {
 341                 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
 342                 goto error;
 343         }
 344         if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
 345                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
 346                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
 347                 if (sh->fdb_domain)
 348                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
 349         }
 350         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 351 #endif /* HAVE_MLX5DV_DR */
 352         sh->default_miss_action =
 353                         mlx5_glue->dr_create_flow_action_default_miss();
 354         if (!sh->default_miss_action)
 355                 DRV_LOG(WARNING, "Default miss action is not supported.");
 356         return 0;
 357 error:
 358         /* Rollback the created objects. */
 359         if (sh->rx_domain) {
 360                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 361                 sh->rx_domain = NULL;
 362         }
 363         if (sh->tx_domain) {
 364                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 365                 sh->tx_domain = NULL;
 366         }
 367         if (sh->fdb_domain) {
 368                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 369                 sh->fdb_domain = NULL;
 370         }
 371         if (sh->esw_drop_action) {
 372                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 373                 sh->esw_drop_action = NULL;
 374         }
 375         if (sh->pop_vlan_action) {
 376                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 377                 sh->pop_vlan_action = NULL;
 378         }
 379         if (sh->encaps_decaps) {
 380                 mlx5_hlist_destroy(sh->encaps_decaps);
 381                 sh->encaps_decaps = NULL;
 382         }
 383         if (sh->modify_cmds) {
 384                 mlx5_hlist_destroy(sh->modify_cmds);
 385                 sh->modify_cmds = NULL;
 386         }
 387         if (sh->tag_table) {
 388                 /* tags should be destroyed with flow before. */
 389                 mlx5_hlist_destroy(sh->tag_table);
 390                 sh->tag_table = NULL;
 391         }
 392         if (sh->tunnel_hub) {
 393                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 394                 sh->tunnel_hub = NULL;
 395         }
 396         mlx5_free_table_hash_list(priv);
 397         return err;
 398 }
 399
 400 /**
 401  * Destroy DR related data within private structure.
 402  *
 403  * @param[in] priv
 404  *   Pointer to the private device data structure.
 405  */
 406 void
 407 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 408 {
 409         struct mlx5_dev_ctx_shared *sh = priv->sh;
 410
 411         MLX5_ASSERT(sh && sh->refcnt);
 412         if (sh->refcnt > 1)
 413                 return;
 414 #ifdef HAVE_MLX5DV_DR
 415         if (sh->rx_domain) {
 416                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 417                 sh->rx_domain = NULL;
 418         }
 419         if (sh->tx_domain) {
 420                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 421                 sh->tx_domain = NULL;
 422         }
 423 #ifdef HAVE_MLX5DV_DR_ESWITCH
 424         if (sh->fdb_domain) {
 425                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 426                 sh->fdb_domain = NULL;
 427         }
 428         if (sh->esw_drop_action) {
 429                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 430                 sh->esw_drop_action = NULL;
 431         }
 432 #endif
 433         if (sh->pop_vlan_action) {
 434                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 435                 sh->pop_vlan_action = NULL;
 436         }
 437 #endif /* HAVE_MLX5DV_DR */
 438         if (sh->default_miss_action)
 439                 mlx5_glue->destroy_flow_action
 440                                 (sh->default_miss_action);
 441         if (sh->encaps_decaps) {
 442                 mlx5_hlist_destroy(sh->encaps_decaps);
 443                 sh->encaps_decaps = NULL;
 444         }
 445         if (sh->modify_cmds) {
 446                 mlx5_hlist_destroy(sh->modify_cmds);
 447                 sh->modify_cmds = NULL;
 448         }
 449         if (sh->tag_table) {
 450                 /* tags should be destroyed with flow before. */
 451                 mlx5_hlist_destroy(sh->tag_table);
 452                 sh->tag_table = NULL;
 453         }
 454         if (sh->tunnel_hub) {
 455                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 456                 sh->tunnel_hub = NULL;
 457         }
 458         mlx5_cache_list_destroy(&sh->port_id_action_list);
 459         mlx5_cache_list_destroy(&sh->push_vlan_action_list);
 460         mlx5_free_table_hash_list(priv);
 461 }
 462
 463 /**
 464  * Initialize shared data between primary and secondary process.
 465  *
 466  * A memzone is reserved by primary process and secondary processes attach to
 467  * the memzone.
 468  *
 469  * @return
 470  *   0 on success, a negative errno value otherwise and rte_errno is set.
 471  */
 472 static int
 473 mlx5_init_shared_data(void)
 474 {
 475         const struct rte_memzone *mz;
 476         int ret = 0;
 477
 478         rte_spinlock_lock(&mlx5_shared_data_lock);
 479         if (mlx5_shared_data == NULL) {
 480                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 481                         /* Allocate shared memory. */
 482                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 483                                                  sizeof(*mlx5_shared_data),
 484                                                  SOCKET_ID_ANY, 0);
 485                         if (mz == NULL) {
 486                                 DRV_LOG(ERR,
 487                                         "Cannot allocate mlx5 shared data");
 488                                 ret = -rte_errno;
 489                                 goto error;
 490                         }
 491                         mlx5_shared_data = mz->addr;
 492                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 493                         rte_spinlock_init(&mlx5_shared_data->lock);
 494                 } else {
 495                         /* Lookup allocated shared memory. */
 496                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 497                         if (mz == NULL) {
 498                                 DRV_LOG(ERR,
 499                                         "Cannot attach mlx5 shared data");
 500                                 ret = -rte_errno;
 501                                 goto error;
 502                         }
 503                         mlx5_shared_data = mz->addr;
 504                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 505                 }
 506         }
 507 error:
 508         rte_spinlock_unlock(&mlx5_shared_data_lock);
 509         return ret;
 510 }
 511
 512 /**
 513  * PMD global initialization.
 514  *
 515  * Independent from individual device, this function initializes global
 516  * per-PMD data structures distinguishing primary and secondary processes.
 517  * Hence, each initialization is called once per a process.
 518  *
 519  * @return
 520  *   0 on success, a negative errno value otherwise and rte_errno is set.
 521  */
 522 static int
 523 mlx5_init_once(void)
 524 {
 525         struct mlx5_shared_data *sd;
 526         struct mlx5_local_data *ld = &mlx5_local_data;
 527         int ret = 0;
 528
 529         if (mlx5_init_shared_data())
 530                 return -rte_errno;
 531         sd = mlx5_shared_data;
 532         MLX5_ASSERT(sd);
 533         rte_spinlock_lock(&sd->lock);
 534         switch (rte_eal_process_type()) {
 535         case RTE_PROC_PRIMARY:
 536                 if (sd->init_done)
 537                         break;
 538                 LIST_INIT(&sd->mem_event_cb_list);
 539                 rte_rwlock_init(&sd->mem_event_rwlock);
 540                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
 541                                                 mlx5_mr_mem_event_cb, NULL);
 542                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
 543                                            mlx5_mp_os_primary_handle);
 544                 if (ret)
 545                         goto out;
 546                 sd->init_done = true;
 547                 break;
 548         case RTE_PROC_SECONDARY:
 549                 if (ld->init_done)
 550                         break;
 551                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
 552                                              mlx5_mp_os_secondary_handle);
 553                 if (ret)
 554                         goto out;
 555                 ++sd->secondary_cnt;
 556                 ld->init_done = true;
 557                 break;
 558         default:
 559                 break;
 560         }
 561 out:
 562         rte_spinlock_unlock(&sd->lock);
 563         return ret;
 564 }
 565
 566 /**
 567  * Create the Tx queue DevX/Verbs object.
 568  *
 569  * @param dev
 570  *   Pointer to Ethernet device.
 571  * @param idx
 572  *   Queue index in DPDK Tx queue array.
 573  *
 574  * @return
 575  *   0 on success, a negative errno value otherwise and rte_errno is set.
 576  */
 577 static int
 578 mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
 579 {
 580         struct mlx5_priv *priv = dev->data->dev_private;
 581         struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
 582         struct mlx5_txq_ctrl *txq_ctrl =
 583                         container_of(txq_data, struct mlx5_txq_ctrl, txq);
 584
 585         if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
 586                 return mlx5_txq_devx_obj_new(dev, idx);
 587 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 588         if (!priv->config.dv_esw_en)
 589                 return mlx5_txq_devx_obj_new(dev, idx);
 590 #endif
 591         return mlx5_txq_ibv_obj_new(dev, idx);
 592 }
 593
 594 /**
 595  * Release an Tx DevX/verbs queue object.
 596  *
 597  * @param txq_obj
 598  *   DevX/Verbs Tx queue object.
 599  */
 600 static void
 601 mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)
 602 {
 603         if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
 604                 mlx5_txq_devx_obj_release(txq_obj);
 605                 return;
 606         }
 607 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 608         if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) {
 609                 mlx5_txq_devx_obj_release(txq_obj);
 610                 return;
 611         }
 612 #endif
 613         mlx5_txq_ibv_obj_release(txq_obj);
 614 }
 615
 616 /**
 617  * DV flow counter mode detect and config.
 618  *
 619  * @param dev
 620  *   Pointer to rte_eth_dev structure.
 621  *
 622  */
 623 static void
 624 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
 625 {
 626 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 627         struct mlx5_priv *priv = dev->data->dev_private;
 628         struct mlx5_dev_ctx_shared *sh = priv->sh;
 629         bool fallback;
 630
 631 #ifndef HAVE_IBV_DEVX_ASYNC
 632         fallback = true;
 633 #else
 634         fallback = false;
 635         if (!priv->config.devx || !priv->config.dv_flow_en ||
 636             !priv->config.hca_attr.flow_counters_dump ||
 637             !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
 638             (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
 639                 fallback = true;
 640 #endif
 641         if (fallback)
 642                 DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
 643                         "counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
 644                         priv->config.hca_attr.flow_counters_dump,
 645                         priv->config.hca_attr.flow_counter_bulk_alloc_bitmap);
 646         /* Initialize fallback mode only on the port initializes sh. */
 647         if (sh->refcnt == 1)
 648                 sh->cmng.counter_fallback = fallback;
 649         else if (fallback != sh->cmng.counter_fallback)
 650                 DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
 651                         "with others:%d.", PORT_ID(priv), fallback);
 652 #endif
 653 }
 654
 655 /**
 656  * Spawn an Ethernet device from Verbs information.
 657  *
 658  * @param dpdk_dev
 659  *   Backing DPDK device.
 660  * @param spawn
 661  *   Verbs device parameters (name, port, switch_info) to spawn.
 662  * @param config
 663  *   Device configuration parameters.
 664  *
 665  * @return
 666  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 667  *   is set. The following errors are defined:
 668  *
 669  *   EBUSY: device is not supposed to be spawned.
 670  *   EEXIST: device is already spawned
 671  */
 672 static struct rte_eth_dev *
 673 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 674                struct mlx5_dev_spawn_data *spawn,
 675                struct mlx5_dev_config *config)
 676 {
 677         const struct mlx5_switch_info *switch_info = &spawn->info;
 678         struct mlx5_dev_ctx_shared *sh = NULL;
 679         struct ibv_port_attr port_attr;
 680         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 681         struct rte_eth_dev *eth_dev = NULL;
 682         struct mlx5_priv *priv = NULL;
 683         int err = 0;
 684         unsigned int hw_padding = 0;
 685         unsigned int mps;
 686         unsigned int cqe_comp;
 687         unsigned int cqe_pad = 0;
 688         unsigned int tunnel_en = 0;
 689         unsigned int mpls_en = 0;
 690         unsigned int swp = 0;
 691         unsigned int mprq = 0;
 692         unsigned int mprq_min_stride_size_n = 0;
 693         unsigned int mprq_max_stride_size_n = 0;
 694         unsigned int mprq_min_stride_num_n = 0;
 695         unsigned int mprq_max_stride_num_n = 0;
 696         struct rte_ether_addr mac;
 697         char name[RTE_ETH_NAME_MAX_LEN];
 698         int own_domain_id = 0;
 699         uint16_t port_id;
 700         unsigned int i;
 701 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 702         struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
 703 #endif
 704
 705         /* Determine if this port representor is supposed to be spawned. */
 706         if (switch_info->representor && dpdk_dev->devargs) {
 707                 struct rte_eth_devargs eth_da;
 708
 709                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
 710                 if (err) {
 711                         rte_errno = -err;
 712                         DRV_LOG(ERR, "failed to process device arguments: %s",
 713                                 strerror(rte_errno));
 714                         return NULL;
 715                 }
 716                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
 717                         if (eth_da.representor_ports[i] ==
 718                             (uint16_t)switch_info->port_name)
 719                                 break;
 720                 if (i == eth_da.nb_representor_ports) {
 721                         rte_errno = EBUSY;
 722                         return NULL;
 723                 }
 724         }
 725         /* Build device name. */
 726         if (spawn->pf_bond <  0) {
 727                 /* Single device. */
 728                 if (!switch_info->representor)
 729                         strlcpy(name, dpdk_dev->name, sizeof(name));
 730                 else
 731                         snprintf(name, sizeof(name), "%s_representor_%u",
 732                                  dpdk_dev->name, switch_info->port_name);
 733         } else {
 734                 /* Bonding device. */
 735                 if (!switch_info->representor)
 736                         snprintf(name, sizeof(name), "%s_%s",
 737                                  dpdk_dev->name,
 738                                  mlx5_os_get_dev_device_name(spawn->phys_dev));
 739                 else
 740                         snprintf(name, sizeof(name), "%s_%s_representor_%u",
 741                                  dpdk_dev->name,
 742                                  mlx5_os_get_dev_device_name(spawn->phys_dev),
 743                                  switch_info->port_name);
 744         }
 745         /* check if the device is already spawned */
 746         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 747                 rte_errno = EEXIST;
 748                 return NULL;
 749         }
 750         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 751         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 752                 struct mlx5_mp_id mp_id;
 753
 754                 eth_dev = rte_eth_dev_attach_secondary(name);
 755                 if (eth_dev == NULL) {
 756                         DRV_LOG(ERR, "can not attach rte ethdev");
 757                         rte_errno = ENOMEM;
 758                         return NULL;
 759                 }
 760                 priv = eth_dev->data->dev_private;
 761                 if (priv->sh->bond_dev != UINT16_MAX)
 762                         /* For bonding port, use primary PCI device. */
 763                         eth_dev->device =
 764                                 rte_eth_devices[priv->sh->bond_dev].device;
 765                 else
 766                         eth_dev->device = dpdk_dev;
 767                 eth_dev->dev_ops = &mlx5_os_dev_sec_ops;
 768                 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
 769                 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
 770                 err = mlx5_proc_priv_init(eth_dev);
 771                 if (err)
 772                         return NULL;
 773                 mp_id.port_id = eth_dev->data->port_id;
 774                 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 775                 /* Receive command fd from primary process */
 776                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
 777                 if (err < 0)
 778                         goto err_secondary;
 779                 /* Remap UAR for Tx queues. */
 780                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
 781                 if (err)
 782                         goto err_secondary;
 783                 /*
 784                  * Ethdev pointer is still required as input since
 785                  * the primary device is not accessible from the
 786                  * secondary process.
 787                  */
 788                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
 789                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
 790                 return eth_dev;
 791 err_secondary:
 792                 mlx5_dev_close(eth_dev);
 793                 return NULL;
 794         }
 795         /*
 796          * Some parameters ("tx_db_nc" in particularly) are needed in
 797          * advance to create dv/verbs device context. We proceed the
 798          * devargs here to get ones, and later proceed devargs again
 799          * to override some hardware settings.
 800          */
 801         err = mlx5_args(config, dpdk_dev->devargs);
 802         if (err) {
 803                 err = rte_errno;
 804                 DRV_LOG(ERR, "failed to process device arguments: %s",
 805                         strerror(rte_errno));
 806                 goto error;
 807         }
 808         if (config->dv_miss_info) {
 809                 if (switch_info->master || switch_info->representor)
 810                         config->dv_xmeta_en = MLX5_XMETA_MODE_META16;
 811         }
 812         mlx5_malloc_mem_select(config->sys_mem_en);
 813         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
 814         if (!sh)
 815                 return NULL;
 816         config->devx = sh->devx;
 817 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
 818         config->dest_tir = 1;
 819 #endif
 820 #ifdef HAVE_IBV_MLX5_MOD_SWP
 821         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
 822 #endif
 823         /*
 824          * Multi-packet send is supported by ConnectX-4 Lx PF as well
 825          * as all ConnectX-5 devices.
 826          */
 827 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 828         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
 829 #endif
 830 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 831         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
 832 #endif
 833         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
 834         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
 835                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
 836                         DRV_LOG(DEBUG, "enhanced MPW is supported");
 837                         mps = MLX5_MPW_ENHANCED;
 838                 } else {
 839                         DRV_LOG(DEBUG, "MPW is supported");
 840                         mps = MLX5_MPW;
 841                 }
 842         } else {
 843                 DRV_LOG(DEBUG, "MPW isn't supported");
 844                 mps = MLX5_MPW_DISABLED;
 845         }
 846 #ifdef HAVE_IBV_MLX5_MOD_SWP
 847         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
 848                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
 849         DRV_LOG(DEBUG, "SWP support: %u", swp);
 850 #endif
 851         config->swp = !!swp;
 852 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 853         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
 854                 struct mlx5dv_striding_rq_caps mprq_caps =
 855                         dv_attr.striding_rq_caps;
 856
 857                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
 858                         mprq_caps.min_single_stride_log_num_of_bytes);
 859                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
 860                         mprq_caps.max_single_stride_log_num_of_bytes);
 861                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
 862                         mprq_caps.min_single_wqe_log_num_of_strides);
 863                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
 864                         mprq_caps.max_single_wqe_log_num_of_strides);
 865                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
 866                         mprq_caps.supported_qpts);
 867                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
 868                 mprq = 1;
 869                 mprq_min_stride_size_n =
 870                         mprq_caps.min_single_stride_log_num_of_bytes;
 871                 mprq_max_stride_size_n =
 872                         mprq_caps.max_single_stride_log_num_of_bytes;
 873                 mprq_min_stride_num_n =
 874                         mprq_caps.min_single_wqe_log_num_of_strides;
 875                 mprq_max_stride_num_n =
 876                         mprq_caps.max_single_wqe_log_num_of_strides;
 877         }
 878 #endif
 879         if (RTE_CACHE_LINE_SIZE == 128 &&
 880             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
 881                 cqe_comp = 0;
 882         else
 883                 cqe_comp = 1;
 884         config->cqe_comp = cqe_comp;
 885 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
 886         /* Whether device supports 128B Rx CQE padding. */
 887         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
 888                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
 889 #endif
 890 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 891         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
 892                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
 893                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
 894                              (dv_attr.tunnel_offloads_caps &
 895                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
 896                              (dv_attr.tunnel_offloads_caps &
 897                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
 898         }
 899         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
 900                 tunnel_en ? "" : "not ");
 901 #else
 902         DRV_LOG(WARNING,
 903                 "tunnel offloading disabled due to old OFED/rdma-core version");
 904 #endif
 905         config->tunnel_en = tunnel_en;
 906 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
 907         mpls_en = ((dv_attr.tunnel_offloads_caps &
 908                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
 909                    (dv_attr.tunnel_offloads_caps &
 910                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
 911         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
 912                 mpls_en ? "" : "not ");
 913 #else
 914         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
 915                 " old OFED/rdma-core version or firmware configuration");
 916 #endif
 917         config->mpls_en = mpls_en;
 918         /* Check port status. */
 919         err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
 920         if (err) {
 921                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
 922                 goto error;
 923         }
 924         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
 925                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
 926                 err = EINVAL;
 927                 goto error;
 928         }
 929         if (port_attr.state != IBV_PORT_ACTIVE)
 930                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
 931                         mlx5_glue->port_state_str(port_attr.state),
 932                         port_attr.state);
 933         /* Allocate private eth device data. */
 934         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
 935                            sizeof(*priv),
 936                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
 937         if (priv == NULL) {
 938                 DRV_LOG(ERR, "priv allocation failure");
 939                 err = ENOMEM;
 940                 goto error;
 941         }
 942         priv->sh = sh;
 943         priv->dev_port = spawn->phys_port;
 944         priv->pci_dev = spawn->pci_dev;
 945         priv->mtu = RTE_ETHER_MTU;
 946         priv->mp_id.port_id = port_id;
 947         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 948         /* Some internal functions rely on Netlink sockets, open them now. */
 949         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
 950         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
 951         priv->representor = !!switch_info->representor;
 952         priv->master = !!switch_info->master;
 953         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
 954         priv->vport_meta_tag = 0;
 955         priv->vport_meta_mask = 0;
 956         priv->pf_bond = spawn->pf_bond;
 957 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 958         /*
 959          * The DevX port query API is implemented. E-Switch may use
 960          * either vport or reg_c[0] metadata register to match on
 961          * vport index. The engaged part of metadata register is
 962          * defined by mask.
 963          */
 964         if (switch_info->representor || switch_info->master) {
 965                 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
 966                                       MLX5DV_DEVX_PORT_MATCH_REG_C_0;
 967                 err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port,
 968                                                  &devx_port);
 969                 if (err) {
 970                         DRV_LOG(WARNING,
 971                                 "can't query devx port %d on device %s",
 972                                 spawn->phys_port,
 973                                 mlx5_os_get_dev_device_name(spawn->phys_dev));
 974                         devx_port.comp_mask = 0;
 975                 }
 976         }
 977         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
 978                 priv->vport_meta_tag = devx_port.reg_c_0.value;
 979                 priv->vport_meta_mask = devx_port.reg_c_0.mask;
 980                 if (!priv->vport_meta_mask) {
 981                         DRV_LOG(ERR, "vport zero mask for port %d"
 982                                      " on bonding device %s",
 983                                      spawn->phys_port,
 984                                      mlx5_os_get_dev_device_name
 985                                                         (spawn->phys_dev));
 986                         err = ENOTSUP;
 987                         goto error;
 988                 }
 989                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
 990                         DRV_LOG(ERR, "invalid vport tag for port %d"
 991                                      " on bonding device %s",
 992                                      spawn->phys_port,
 993                                      mlx5_os_get_dev_device_name
 994                                                         (spawn->phys_dev));
 995                         err = ENOTSUP;
 996                         goto error;
 997                 }
 998         }
 999         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
1000                 priv->vport_id = devx_port.vport_num;
1001         } else if (spawn->pf_bond >= 0) {
1002                 DRV_LOG(ERR, "can't deduce vport index for port %d"
1003                              " on bonding device %s",
1004                              spawn->phys_port,
1005                              mlx5_os_get_dev_device_name(spawn->phys_dev));
1006                 err = ENOTSUP;
1007                 goto error;
1008         } else {
1009                 /* Suppose vport index in compatible way. */
1010                 priv->vport_id = switch_info->representor ?
1011                                  switch_info->port_name + 1 : -1;
1012         }
1013 #else
1014         /*
1015          * Kernel/rdma_core support single E-Switch per PF configurations
1016          * only and vport_id field contains the vport index for
1017          * associated VF, which is deduced from representor port name.
1018          * For example, let's have the IB device port 10, it has
1019          * attached network device eth0, which has port name attribute
1020          * pf0vf2, we can deduce the VF number as 2, and set vport index
1021          * as 3 (2+1). This assigning schema should be changed if the
1022          * multiple E-Switch instances per PF configurations or/and PCI
1023          * subfunctions are added.
1024          */
1025         priv->vport_id = switch_info->representor ?
1026                          switch_info->port_name + 1 : -1;
1027 #endif
1028         /* representor_id field keeps the unmodified VF index. */
1029         priv->representor_id = switch_info->representor ?
1030                                switch_info->port_name : -1;
1031         /*
1032          * Look for sibling devices in order to reuse their switch domain
1033          * if any, otherwise allocate one.
1034          */
1035         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1036                 const struct mlx5_priv *opriv =
1037                         rte_eth_devices[port_id].data->dev_private;
1038
1039                 if (!opriv ||
1040                     opriv->sh != priv->sh ||
1041                         opriv->domain_id ==
1042                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1043                         continue;
1044                 priv->domain_id = opriv->domain_id;
1045                 break;
1046         }
1047         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1048                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1049                 if (err) {
1050                         err = rte_errno;
1051                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1052                                 strerror(rte_errno));
1053                         goto error;
1054                 }
1055                 own_domain_id = 1;
1056         }
1057         /* Override some values set by hardware configuration. */
1058         mlx5_args(config, dpdk_dev->devargs);
1059         err = mlx5_dev_check_sibling_config(priv, config);
1060         if (err)
1061                 goto error;
1062         config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1063                             IBV_DEVICE_RAW_IP_CSUM);
1064         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1065                 (config->hw_csum ? "" : "not "));
1066 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1067         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1068         DRV_LOG(DEBUG, "counters are not supported");
1069 #endif
1070 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
1071         if (config->dv_flow_en) {
1072                 DRV_LOG(WARNING, "DV flow is not supported");
1073                 config->dv_flow_en = 0;
1074         }
1075 #endif
1076         config->ind_table_max_size =
1077                 sh->device_attr.max_rwq_indirection_table_size;
1078         /*
1079          * Remove this check once DPDK supports larger/variable
1080          * indirection tables.
1081          */
1082         if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1083                 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1084         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1085                 config->ind_table_max_size);
1086         config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1087                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1088         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1089                 (config->hw_vlan_strip ? "" : "not "));
1090         config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1091                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1092 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1093         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1094 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1095         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1096                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1097 #endif
1098         if (config->hw_padding && !hw_padding) {
1099                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1100                 config->hw_padding = 0;
1101         } else if (config->hw_padding) {
1102                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1103         }
1104         config->tso = (sh->device_attr.max_tso > 0 &&
1105                       (sh->device_attr.tso_supported_qpts &
1106                        (1 << IBV_QPT_RAW_PACKET)));
1107         if (config->tso)
1108                 config->tso_max_payload_sz = sh->device_attr.max_tso;
1109         /*
1110          * MPW is disabled by default, while the Enhanced MPW is enabled
1111          * by default.
1112          */
1113         if (config->mps == MLX5_ARG_UNSET)
1114                 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1115                                                           MLX5_MPW_DISABLED;
1116         else
1117                 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
1118         DRV_LOG(INFO, "%sMPS is %s",
1119                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1120                 config->mps == MLX5_MPW ? "legacy " : "",
1121                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1122         if (config->cqe_comp && !cqe_comp) {
1123                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1124                 config->cqe_comp = 0;
1125         }
1126         if (config->cqe_pad && !cqe_pad) {
1127                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1128                 config->cqe_pad = 0;
1129         } else if (config->cqe_pad) {
1130                 DRV_LOG(INFO, "Rx CQE padding is enabled");
1131         }
1132         if (config->devx) {
1133                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
1134                 if (err) {
1135                         err = -err;
1136                         goto error;
1137                 }
1138 #ifdef HAVE_MLX5DV_DR_ACTION_FLOW_HIT
1139                 if (config->hca_attr.flow_hit_aso) {
1140                         sh->flow_hit_aso_en = 1;
1141                         err = mlx5_flow_aso_age_mng_init(sh);
1142                         if (err) {
1143                                 err = -err;
1144                                 goto error;
1145                         }
1146                         DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
1147                 }
1148 #endif /* HAVE_MLX5DV_DR_ACTION_FLOW_HIT */
1149                 /* Check relax ordering support. */
1150                 if (!haswell_broadwell_cpu) {
1151                         sh->cmng.relaxed_ordering_write =
1152                                 config->hca_attr.relaxed_ordering_write;
1153                         sh->cmng.relaxed_ordering_read =
1154                                 config->hca_attr.relaxed_ordering_read;
1155                 } else {
1156                         sh->cmng.relaxed_ordering_read = 0;
1157                         sh->cmng.relaxed_ordering_write = 0;
1158                 }
1159                 /* Check for LRO support. */
1160                 if (config->dest_tir && config->hca_attr.lro_cap &&
1161                     config->dv_flow_en) {
1162                         /* TBD check tunnel lro caps. */
1163                         config->lro.supported = config->hca_attr.lro_cap;
1164                         DRV_LOG(DEBUG, "Device supports LRO");
1165                         /*
1166                          * If LRO timeout is not configured by application,
1167                          * use the minimal supported value.
1168                          */
1169                         if (!config->lro.timeout)
1170                                 config->lro.timeout =
1171                                 config->hca_attr.lro_timer_supported_periods[0];
1172                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1173                                 config->lro.timeout);
1174                         DRV_LOG(DEBUG, "LRO minimal size of TCP segment "
1175                                 "required for coalescing is %d bytes",
1176                                 config->hca_attr.lro_min_mss_size);
1177                 }
1178 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
1179                 if (config->hca_attr.qos.sup &&
1180                     config->hca_attr.qos.srtcm_sup &&
1181                     config->dv_flow_en) {
1182                         uint8_t reg_c_mask =
1183                                 config->hca_attr.qos.flow_meter_reg_c_ids;
1184                         /*
1185                          * Meter needs two REG_C's for color match and pre-sfx
1186                          * flow match. Here get the REG_C for color match.
1187                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
1188                          */
1189                         reg_c_mask &= 0xfc;
1190                         if (__builtin_popcount(reg_c_mask) < 1) {
1191                                 priv->mtr_en = 0;
1192                                 DRV_LOG(WARNING, "No available register for"
1193                                         " meter.");
1194                         } else {
1195                                 priv->mtr_color_reg = ffs(reg_c_mask) - 1 +
1196                                                       REG_C_0;
1197                                 priv->mtr_en = 1;
1198                                 priv->mtr_reg_share =
1199                                       config->hca_attr.qos.flow_meter_reg_share;
1200                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1201                                         priv->mtr_color_reg);
1202                         }
1203                 }
1204 #endif
1205 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1206                 if (config->hca_attr.log_max_ft_sampler_num > 0  &&
1207                     config->dv_flow_en) {
1208                         priv->sampler_en = 1;
1209                         DRV_LOG(DEBUG, "The Sampler enabled!\n");
1210                 } else {
1211                         priv->sampler_en = 0;
1212                         if (!config->hca_attr.log_max_ft_sampler_num)
1213                                 DRV_LOG(WARNING, "No available register for"
1214                                                 " Sampler.");
1215                         else
1216                                 DRV_LOG(DEBUG, "DV flow is not supported!\n");
1217                 }
1218 #endif
1219         }
1220         if (config->tx_pp) {
1221                 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1222                         config->hca_attr.dev_freq_khz);
1223                 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1224                         config->hca_attr.qos.packet_pacing ? "" : "not ");
1225                 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1226                         config->hca_attr.cross_channel ? "" : "not ");
1227                 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1228                         config->hca_attr.wqe_index_ignore ? "" : "not ");
1229                 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1230                         config->hca_attr.non_wire_sq ? "" : "not ");
1231                 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1232                         config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1233                         config->hca_attr.log_max_static_sq_wq);
1234                 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1235                         config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1236                 if (!config->devx) {
1237                         DRV_LOG(ERR, "DevX is required for packet pacing");
1238                         err = ENODEV;
1239                         goto error;
1240                 }
1241                 if (!config->hca_attr.qos.packet_pacing) {
1242                         DRV_LOG(ERR, "Packet pacing is not supported");
1243                         err = ENODEV;
1244                         goto error;
1245                 }
1246                 if (!config->hca_attr.cross_channel) {
1247                         DRV_LOG(ERR, "Cross channel operations are"
1248                                      " required for packet pacing");
1249                         err = ENODEV;
1250                         goto error;
1251                 }
1252                 if (!config->hca_attr.wqe_index_ignore) {
1253                         DRV_LOG(ERR, "WQE index ignore feature is"
1254                                      " required for packet pacing");
1255                         err = ENODEV;
1256                         goto error;
1257                 }
1258                 if (!config->hca_attr.non_wire_sq) {
1259                         DRV_LOG(ERR, "Non-wire SQ feature is"
1260                                      " required for packet pacing");
1261                         err = ENODEV;
1262                         goto error;
1263                 }
1264                 if (!config->hca_attr.log_max_static_sq_wq) {
1265                         DRV_LOG(ERR, "Static WQE SQ feature is"
1266                                      " required for packet pacing");
1267                         err = ENODEV;
1268                         goto error;
1269                 }
1270                 if (!config->hca_attr.qos.wqe_rate_pp) {
1271                         DRV_LOG(ERR, "WQE rate mode is required"
1272                                      " for packet pacing");
1273                         err = ENODEV;
1274                         goto error;
1275                 }
1276 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1277                 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1278                              " can't create queues for packet pacing");
1279                 err = ENODEV;
1280                 goto error;
1281 #endif
1282         }
1283         if (config->devx) {
1284                 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1285
1286                 err = config->hca_attr.access_register_user ?
1287                         mlx5_devx_cmd_register_read
1288                                 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1289                                 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1290                 if (!err) {
1291                         uint32_t ts_mode;
1292
1293                         /* MTUTC register is read successfully. */
1294                         ts_mode = MLX5_GET(register_mtutc, reg,
1295                                            time_stamp_mode);
1296                         if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1297                                 config->rt_timestamp = 1;
1298                 } else {
1299                         /* Kernel does not support register reading. */
1300                         if (config->hca_attr.dev_freq_khz ==
1301                                                  (NS_PER_S / MS_PER_S))
1302                                 config->rt_timestamp = 1;
1303                 }
1304         }
1305         /*
1306          * If HW has bug working with tunnel packet decapsulation and
1307          * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1308          * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1309          */
1310         if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1311                 config->hw_fcs_strip = 0;
1312         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1313                 (config->hw_fcs_strip ? "" : "not "));
1314         if (config->mprq.enabled && mprq) {
1315                 if (config->mprq.stride_num_n &&
1316                     (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1317                      config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1318                         config->mprq.stride_num_n =
1319                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1320                                                 mprq_min_stride_num_n),
1321                                         mprq_max_stride_num_n);
1322                         DRV_LOG(WARNING,
1323                                 "the number of strides"
1324                                 " for Multi-Packet RQ is out of range,"
1325                                 " setting default value (%u)",
1326                                 1 << config->mprq.stride_num_n);
1327                 }
1328                 if (config->mprq.stride_size_n &&
1329                     (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1330                      config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1331                         config->mprq.stride_size_n =
1332                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1333                                                 mprq_min_stride_size_n),
1334                                         mprq_max_stride_size_n);
1335                         DRV_LOG(WARNING,
1336                                 "the size of a stride"
1337                                 " for Multi-Packet RQ is out of range,"
1338                                 " setting default value (%u)",
1339                                 1 << config->mprq.stride_size_n);
1340                 }
1341                 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1342                 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1343         } else if (config->mprq.enabled && !mprq) {
1344                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1345                 config->mprq.enabled = 0;
1346         }
1347         if (config->max_dump_files_num == 0)
1348                 config->max_dump_files_num = 128;
1349         eth_dev = rte_eth_dev_allocate(name);
1350         if (eth_dev == NULL) {
1351                 DRV_LOG(ERR, "can not allocate rte ethdev");
1352                 err = ENOMEM;
1353                 goto error;
1354         }
1355         if (priv->representor) {
1356                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1357                 eth_dev->data->representor_id = priv->representor_id;
1358         }
1359         /*
1360          * Store associated network device interface index. This index
1361          * is permanent throughout the lifetime of device. So, we may store
1362          * the ifindex here and use the cached value further.
1363          */
1364         MLX5_ASSERT(spawn->ifindex);
1365         priv->if_index = spawn->ifindex;
1366         if (priv->pf_bond >= 0 && priv->master) {
1367                 /* Get bond interface info */
1368                 err = mlx5_sysfs_bond_info(priv->if_index,
1369                                      &priv->bond_ifindex,
1370                                      priv->bond_name);
1371                 if (err)
1372                         DRV_LOG(ERR, "unable to get bond info: %s",
1373                                 strerror(rte_errno));
1374                 else
1375                         DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
1376                                 priv->if_index, priv->bond_ifindex,
1377                                 priv->bond_name);
1378         }
1379         eth_dev->data->dev_private = priv;
1380         priv->dev_data = eth_dev->data;
1381         eth_dev->data->mac_addrs = priv->mac;
1382         if (spawn->pf_bond < 0) {
1383                 eth_dev->device = dpdk_dev;
1384         } else {
1385                 /* Use primary bond PCI as device. */
1386                 if (sh->bond_dev == UINT16_MAX) {
1387                         sh->bond_dev = eth_dev->data->port_id;
1388                         eth_dev->device = dpdk_dev;
1389                 } else {
1390                         eth_dev->device = rte_eth_devices[sh->bond_dev].device;
1391                 }
1392         }
1393         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1394         /* Configure the first MAC address by default. */
1395         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1396                 DRV_LOG(ERR,
1397                         "port %u cannot get MAC address, is mlx5_en"
1398                         " loaded? (errno: %s)",
1399                         eth_dev->data->port_id, strerror(rte_errno));
1400                 err = ENODEV;
1401                 goto error;
1402         }
1403         DRV_LOG(INFO,
1404                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1405                 eth_dev->data->port_id,
1406                 mac.addr_bytes[0], mac.addr_bytes[1],
1407                 mac.addr_bytes[2], mac.addr_bytes[3],
1408                 mac.addr_bytes[4], mac.addr_bytes[5]);
1409 #ifdef RTE_LIBRTE_MLX5_DEBUG
1410         {
1411                 char ifname[IF_NAMESIZE];
1412
1413                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1414                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1415                                 eth_dev->data->port_id, ifname);
1416                 else
1417                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1418                                 eth_dev->data->port_id);
1419         }
1420 #endif
1421         /* Get actual MTU if possible. */
1422         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1423         if (err) {
1424                 err = rte_errno;
1425                 goto error;
1426         }
1427         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1428                 priv->mtu);
1429         /* Initialize burst functions to prevent crashes before link-up. */
1430         eth_dev->rx_pkt_burst = removed_rx_burst;
1431         eth_dev->tx_pkt_burst = removed_tx_burst;
1432         eth_dev->dev_ops = &mlx5_os_dev_ops;
1433         eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1434         eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1435         eth_dev->rx_queue_count = mlx5_rx_queue_count;
1436         /* Register MAC address. */
1437         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1438         if (config->vf && config->vf_nl_en)
1439                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1440                                       mlx5_ifindex(eth_dev),
1441                                       eth_dev->data->mac_addrs,
1442                                       MLX5_MAX_MAC_ADDRESSES);
1443         priv->flows = 0;
1444         priv->ctrl_flows = 0;
1445         rte_spinlock_init(&priv->flow_list_lock);
1446         TAILQ_INIT(&priv->flow_meters);
1447         TAILQ_INIT(&priv->flow_meter_profiles);
1448         /* Hint libmlx5 to use PMD allocator for data plane resources */
1449         mlx5_glue->dv_set_context_attr(sh->ctx,
1450                         MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1451                         (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
1452                                 .alloc = &mlx5_alloc_verbs_buf,
1453                                 .free = &mlx5_free_verbs_buf,
1454                                 .data = priv,
1455                         }));
1456         /* Bring Ethernet device up. */
1457         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1458                 eth_dev->data->port_id);
1459         mlx5_set_link_up(eth_dev);
1460         /*
1461          * Even though the interrupt handler is not installed yet,
1462          * interrupts will still trigger on the async_fd from
1463          * Verbs context returned by ibv_open_device().
1464          */
1465         mlx5_link_update(eth_dev, 0);
1466 #ifdef HAVE_MLX5DV_DR_ESWITCH
1467         if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1468               (switch_info->representor || switch_info->master)))
1469                 config->dv_esw_en = 0;
1470 #else
1471         config->dv_esw_en = 0;
1472 #endif
1473         /* Detect minimal data bytes to inline. */
1474         mlx5_set_min_inline(spawn, config);
1475         /* Store device configuration on private structure. */
1476         priv->config = *config;
1477         /* Create context for virtual machine VLAN workaround. */
1478         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1479         if (config->dv_flow_en) {
1480                 err = mlx5_alloc_shared_dr(priv);
1481                 if (err)
1482                         goto error;
1483         }
1484         if (config->devx && config->dv_flow_en && config->dest_tir) {
1485                 priv->obj_ops = devx_obj_ops;
1486                 priv->obj_ops.drop_action_create =
1487                                                 ibv_obj_ops.drop_action_create;
1488                 priv->obj_ops.drop_action_destroy =
1489                                                 ibv_obj_ops.drop_action_destroy;
1490 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1491                 priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify;
1492 #else
1493                 if (config->dv_esw_en)
1494                         priv->obj_ops.txq_obj_modify =
1495                                                 ibv_obj_ops.txq_obj_modify;
1496 #endif
1497                 /* Use specific wrappers for Tx object. */
1498                 priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;
1499                 priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;
1500
1501         } else {
1502                 priv->obj_ops = ibv_obj_ops;
1503         }
1504         priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
1505         if (!priv->drop_queue.hrxq)
1506                 goto error;
1507         /* Supported Verbs flow priority number detection. */
1508         err = mlx5_flow_discover_priorities(eth_dev);
1509         if (err < 0) {
1510                 err = -err;
1511                 goto error;
1512         }
1513         priv->config.flow_prio = err;
1514         if (!priv->config.dv_esw_en &&
1515             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1516                 DRV_LOG(WARNING, "metadata mode %u is not supported "
1517                                  "(no E-Switch)", priv->config.dv_xmeta_en);
1518                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1519         }
1520         mlx5_set_metadata_mask(eth_dev);
1521         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1522             !priv->sh->dv_regc0_mask) {
1523                 DRV_LOG(ERR, "metadata mode %u is not supported "
1524                              "(no metadata reg_c[0] is available)",
1525                              priv->config.dv_xmeta_en);
1526                         err = ENOTSUP;
1527                         goto error;
1528         }
1529         mlx5_cache_list_init(&priv->hrxqs, "hrxq", 0, eth_dev,
1530                              mlx5_hrxq_create_cb,
1531                              mlx5_hrxq_match_cb,
1532                              mlx5_hrxq_remove_cb);
1533         /* Query availability of metadata reg_c's. */
1534         err = mlx5_flow_discover_mreg_c(eth_dev);
1535         if (err < 0) {
1536                 err = -err;
1537                 goto error;
1538         }
1539         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1540                 DRV_LOG(DEBUG,
1541                         "port %u extensive metadata register is not supported",
1542                         eth_dev->data->port_id);
1543                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1544                         DRV_LOG(ERR, "metadata mode %u is not supported "
1545                                      "(no metadata registers available)",
1546                                      priv->config.dv_xmeta_en);
1547                         err = ENOTSUP;
1548                         goto error;
1549                 }
1550         }
1551         if (priv->config.dv_flow_en &&
1552             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1553             mlx5_flow_ext_mreg_supported(eth_dev) &&
1554             priv->sh->dv_regc0_mask) {
1555                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1556                                                       MLX5_FLOW_MREG_HTABLE_SZ,
1557                                                       0, 0,
1558                                                       flow_dv_mreg_create_cb,
1559                                                       NULL,
1560                                                       flow_dv_mreg_remove_cb);
1561                 if (!priv->mreg_cp_tbl) {
1562                         err = ENOMEM;
1563                         goto error;
1564                 }
1565                 priv->mreg_cp_tbl->ctx = eth_dev;
1566         }
1567         rte_spinlock_init(&priv->shared_act_sl);
1568         mlx5_flow_counter_mode_config(eth_dev);
1569         if (priv->config.dv_flow_en)
1570                 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
1571         return eth_dev;
1572 error:
1573         if (priv) {
1574                 if (priv->mreg_cp_tbl)
1575                         mlx5_hlist_destroy(priv->mreg_cp_tbl);
1576                 if (priv->sh)
1577                         mlx5_os_free_shared_dr(priv);
1578                 if (priv->nl_socket_route >= 0)
1579                         close(priv->nl_socket_route);
1580                 if (priv->nl_socket_rdma >= 0)
1581                         close(priv->nl_socket_rdma);
1582                 if (priv->vmwa_context)
1583                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1584                 if (eth_dev && priv->drop_queue.hrxq)
1585                         mlx5_drop_action_destroy(eth_dev);
1586                 if (own_domain_id)
1587                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1588                 mlx5_cache_list_destroy(&priv->hrxqs);
1589                 mlx5_free(priv);
1590                 if (eth_dev != NULL)
1591                         eth_dev->data->dev_private = NULL;
1592         }
1593         if (eth_dev != NULL) {
1594                 /* mac_addrs must not be freed alone because part of
1595                  * dev_private
1596                  **/
1597                 eth_dev->data->mac_addrs = NULL;
1598                 rte_eth_dev_release_port(eth_dev);
1599         }
1600         if (sh)
1601                 mlx5_free_shared_dev_ctx(sh);
1602         MLX5_ASSERT(err > 0);
1603         rte_errno = err;
1604         return NULL;
1605 }
1606
1607 /**
1608  * Comparison callback to sort device data.
1609  *
1610  * This is meant to be used with qsort().
1611  *
1612  * @param a[in]
1613  *   Pointer to pointer to first data object.
1614  * @param b[in]
1615  *   Pointer to pointer to second data object.
1616  *
1617  * @return
1618  *   0 if both objects are equal, less than 0 if the first argument is less
1619  *   than the second, greater than 0 otherwise.
1620  */
1621 static int
1622 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1623 {
1624         const struct mlx5_switch_info *si_a =
1625                 &((const struct mlx5_dev_spawn_data *)a)->info;
1626         const struct mlx5_switch_info *si_b =
1627                 &((const struct mlx5_dev_spawn_data *)b)->info;
1628         int ret;
1629
1630         /* Master device first. */
1631         ret = si_b->master - si_a->master;
1632         if (ret)
1633                 return ret;
1634         /* Then representor devices. */
1635         ret = si_b->representor - si_a->representor;
1636         if (ret)
1637                 return ret;
1638         /* Unidentified devices come last in no specific order. */
1639         if (!si_a->representor)
1640                 return 0;
1641         /* Order representors by name. */
1642         return si_a->port_name - si_b->port_name;
1643 }
1644
1645 /**
1646  * Match PCI information for possible slaves of bonding device.
1647  *
1648  * @param[in] ibv_dev
1649  *   Pointer to Infiniband device structure.
1650  * @param[in] pci_dev
1651  *   Pointer to PCI device structure to match PCI address.
1652  * @param[in] nl_rdma
1653  *   Netlink RDMA group socket handle.
1654  *
1655  * @return
1656  *   negative value if no bonding device found, otherwise
1657  *   positive index of slave PF in bonding.
1658  */
1659 static int
1660 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1661                            const struct rte_pci_device *pci_dev,
1662                            int nl_rdma)
1663 {
1664         char ifname[IF_NAMESIZE + 1];
1665         unsigned int ifindex;
1666         unsigned int np, i;
1667         FILE *file = NULL;
1668         int pf = -1;
1669
1670         /*
1671          * Try to get master device name. If something goes
1672          * wrong suppose the lack of kernel support and no
1673          * bonding devices.
1674          */
1675         if (nl_rdma < 0)
1676                 return -1;
1677         if (!strstr(ibv_dev->name, "bond"))
1678                 return -1;
1679         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
1680         if (!np)
1681                 return -1;
1682         /*
1683          * The Master device might not be on the predefined
1684          * port (not on port index 1, it is not garanted),
1685          * we have to scan all Infiniband device port and
1686          * find master.
1687          */
1688         for (i = 1; i <= np; ++i) {
1689                 /* Check whether Infiniband port is populated. */
1690                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
1691                 if (!ifindex)
1692                         continue;
1693                 if (!if_indextoname(ifindex, ifname))
1694                         continue;
1695                 /* Try to read bonding slave names from sysfs. */
1696                 MKSTR(slaves,
1697                       "/sys/class/net/%s/master/bonding/slaves", ifname);
1698                 file = fopen(slaves, "r");
1699                 if (file)
1700                         break;
1701         }
1702         if (!file)
1703                 return -1;
1704         /* Use safe format to check maximal buffer length. */
1705         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1706         while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1707                 char tmp_str[IF_NAMESIZE + 32];
1708                 struct rte_pci_addr pci_addr;
1709                 struct mlx5_switch_info info;
1710
1711                 /* Process slave interface names in the loop. */
1712                 snprintf(tmp_str, sizeof(tmp_str),
1713                          "/sys/class/net/%s", ifname);
1714                 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
1715                         DRV_LOG(WARNING, "can not get PCI address"
1716                                          " for netdev \"%s\"", ifname);
1717                         continue;
1718                 }
1719                 if (pci_dev->addr.domain != pci_addr.domain ||
1720                     pci_dev->addr.bus != pci_addr.bus ||
1721                     pci_dev->addr.devid != pci_addr.devid ||
1722                     pci_dev->addr.function != pci_addr.function)
1723                         continue;
1724                 /* Slave interface PCI address match found. */
1725                 fclose(file);
1726                 snprintf(tmp_str, sizeof(tmp_str),
1727                          "/sys/class/net/%s/phys_port_name", ifname);
1728                 file = fopen(tmp_str, "rb");
1729                 if (!file)
1730                         break;
1731                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1732                 if (fscanf(file, "%32s", tmp_str) == 1)
1733                         mlx5_translate_port_name(tmp_str, &info);
1734                 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
1735                     info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1736                         pf = info.port_name;
1737                 break;
1738         }
1739         if (file)
1740                 fclose(file);
1741         return pf;
1742 }
1743
1744 /**
1745  * DPDK callback to register a PCI device.
1746  *
1747  * This function spawns Ethernet devices out of a given PCI device.
1748  *
1749  * @param[in] pci_drv
1750  *   PCI driver structure (mlx5_driver).
1751  * @param[in] pci_dev
1752  *   PCI device information.
1753  *
1754  * @return
1755  *   0 on success, a negative errno value otherwise and rte_errno is set.
1756  */
1757 int
1758 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1759                   struct rte_pci_device *pci_dev)
1760 {
1761         struct ibv_device **ibv_list;
1762         /*
1763          * Number of found IB Devices matching with requested PCI BDF.
1764          * nd != 1 means there are multiple IB devices over the same
1765          * PCI device and we have representors and master.
1766          */
1767         unsigned int nd = 0;
1768         /*
1769          * Number of found IB device Ports. nd = 1 and np = 1..n means
1770          * we have the single multiport IB device, and there may be
1771          * representors attached to some of found ports.
1772          */
1773         unsigned int np = 0;
1774         /*
1775          * Number of DPDK ethernet devices to Spawn - either over
1776          * multiple IB devices or multiple ports of single IB device.
1777          * Actually this is the number of iterations to spawn.
1778          */
1779         unsigned int ns = 0;
1780         /*
1781          * Bonding device
1782          *   < 0 - no bonding device (single one)
1783          *  >= 0 - bonding device (value is slave PF index)
1784          */
1785         int bd = -1;
1786         struct mlx5_dev_spawn_data *list = NULL;
1787         struct mlx5_dev_config dev_config;
1788         unsigned int dev_config_vf;
1789         int ret;
1790
1791         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1792                 mlx5_pmd_socket_init();
1793         ret = mlx5_init_once();
1794         if (ret) {
1795                 DRV_LOG(ERR, "unable to init PMD global data: %s",
1796                         strerror(rte_errno));
1797                 return -rte_errno;
1798         }
1799         errno = 0;
1800         ibv_list = mlx5_glue->get_device_list(&ret);
1801         if (!ibv_list) {
1802                 rte_errno = errno ? errno : ENOSYS;
1803                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1804                 return -rte_errno;
1805         }
1806         /*
1807          * First scan the list of all Infiniband devices to find
1808          * matching ones, gathering into the list.
1809          */
1810         struct ibv_device *ibv_match[ret + 1];
1811         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
1812         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1813         unsigned int i;
1814
1815         while (ret-- > 0) {
1816                 struct rte_pci_addr pci_addr;
1817
1818                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1819                 bd = mlx5_device_bond_pci_match
1820                                 (ibv_list[ret], pci_dev, nl_rdma);
1821                 if (bd >= 0) {
1822                         /*
1823                          * Bonding device detected. Only one match is allowed,
1824                          * the bonding is supported over multi-port IB device,
1825                          * there should be no matches on representor PCI
1826                          * functions or non VF LAG bonding devices with
1827                          * specified address.
1828                          */
1829                         if (nd) {
1830                                 DRV_LOG(ERR,
1831                                         "multiple PCI match on bonding device"
1832                                         "\"%s\" found", ibv_list[ret]->name);
1833                                 rte_errno = ENOENT;
1834                                 ret = -rte_errno;
1835                                 goto exit;
1836                         }
1837                         DRV_LOG(INFO, "PCI information matches for"
1838                                       " slave %d bonding device \"%s\"",
1839                                       bd, ibv_list[ret]->name);
1840                         ibv_match[nd++] = ibv_list[ret];
1841                         break;
1842                 }
1843                 if (mlx5_dev_to_pci_addr
1844                         (ibv_list[ret]->ibdev_path, &pci_addr))
1845                         continue;
1846                 if (pci_dev->addr.domain != pci_addr.domain ||
1847                     pci_dev->addr.bus != pci_addr.bus ||
1848                     pci_dev->addr.devid != pci_addr.devid ||
1849                     pci_dev->addr.function != pci_addr.function)
1850                         continue;
1851                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1852                         ibv_list[ret]->name);
1853                 ibv_match[nd++] = ibv_list[ret];
1854         }
1855         ibv_match[nd] = NULL;
1856         if (!nd) {
1857                 /* No device matches, just complain and bail out. */
1858                 DRV_LOG(WARNING,
1859                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
1860                         " are kernel drivers loaded?",
1861                         pci_dev->addr.domain, pci_dev->addr.bus,
1862                         pci_dev->addr.devid, pci_dev->addr.function);
1863                 rte_errno = ENOENT;
1864                 ret = -rte_errno;
1865                 goto exit;
1866         }
1867         if (nd == 1) {
1868                 /*
1869                  * Found single matching device may have multiple ports.
1870                  * Each port may be representor, we have to check the port
1871                  * number and check the representors existence.
1872                  */
1873                 if (nl_rdma >= 0)
1874                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1875                 if (!np)
1876                         DRV_LOG(WARNING, "can not get IB device \"%s\""
1877                                          " ports number", ibv_match[0]->name);
1878                 if (bd >= 0 && !np) {
1879                         DRV_LOG(ERR, "can not get ports"
1880                                      " for bonding device");
1881                         rte_errno = ENOENT;
1882                         ret = -rte_errno;
1883                         goto exit;
1884                 }
1885         }
1886 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
1887         if (bd >= 0) {
1888                 /*
1889                  * This may happen if there is VF LAG kernel support and
1890                  * application is compiled with older rdma_core library.
1891                  */
1892                 DRV_LOG(ERR,
1893                         "No kernel/verbs support for VF LAG bonding found.");
1894                 rte_errno = ENOTSUP;
1895                 ret = -rte_errno;
1896                 goto exit;
1897         }
1898 #endif
1899         /*
1900          * Now we can determine the maximal
1901          * amount of devices to be spawned.
1902          */
1903         list = mlx5_malloc(MLX5_MEM_ZERO,
1904                            sizeof(struct mlx5_dev_spawn_data) *
1905                            (np ? np : nd),
1906                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1907         if (!list) {
1908                 DRV_LOG(ERR, "spawn data array allocation failure");
1909                 rte_errno = ENOMEM;
1910                 ret = -rte_errno;
1911                 goto exit;
1912         }
1913         if (bd >= 0 || np > 1) {
1914                 /*
1915                  * Single IB device with multiple ports found,
1916                  * it may be E-Switch master device and representors.
1917                  * We have to perform identification through the ports.
1918                  */
1919                 MLX5_ASSERT(nl_rdma >= 0);
1920                 MLX5_ASSERT(ns == 0);
1921                 MLX5_ASSERT(nd == 1);
1922                 MLX5_ASSERT(np);
1923                 for (i = 1; i <= np; ++i) {
1924                         list[ns].max_port = np;
1925                         list[ns].phys_port = i;
1926                         list[ns].phys_dev = ibv_match[0];
1927                         list[ns].eth_dev = NULL;
1928                         list[ns].pci_dev = pci_dev;
1929                         list[ns].pf_bond = bd;
1930                         list[ns].ifindex = mlx5_nl_ifindex
1931                                 (nl_rdma,
1932                                 mlx5_os_get_dev_device_name
1933                                                 (list[ns].phys_dev), i);
1934                         if (!list[ns].ifindex) {
1935                                 /*
1936                                  * No network interface index found for the
1937                                  * specified port, it means there is no
1938                                  * representor on this port. It's OK,
1939                                  * there can be disabled ports, for example
1940                                  * if sriov_numvfs < sriov_totalvfs.
1941                                  */
1942                                 continue;
1943                         }
1944                         ret = -1;
1945                         if (nl_route >= 0)
1946                                 ret = mlx5_nl_switch_info
1947                                                (nl_route,
1948                                                 list[ns].ifindex,
1949                                                 &list[ns].info);
1950                         if (ret || (!list[ns].info.representor &&
1951                                     !list[ns].info.master)) {
1952                                 /*
1953                                  * We failed to recognize representors with
1954                                  * Netlink, let's try to perform the task
1955                                  * with sysfs.
1956                                  */
1957                                 ret =  mlx5_sysfs_switch_info
1958                                                 (list[ns].ifindex,
1959                                                  &list[ns].info);
1960                         }
1961 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
1962                         if (!ret && bd >= 0) {
1963                                 switch (list[ns].info.name_type) {
1964                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
1965                                         if (list[ns].info.port_name == bd)
1966                                                 ns++;
1967                                         break;
1968                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
1969                                         /* Fallthrough */
1970                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
1971                                         if (list[ns].info.pf_num == bd)
1972                                                 ns++;
1973                                         break;
1974                                 default:
1975                                         break;
1976                                 }
1977                                 continue;
1978                         }
1979 #endif
1980                         if (!ret && (list[ns].info.representor ^
1981                                      list[ns].info.master))
1982                                 ns++;
1983                 }
1984                 if (!ns) {
1985                         DRV_LOG(ERR,
1986                                 "unable to recognize master/representors"
1987                                 " on the IB device with multiple ports");
1988                         rte_errno = ENOENT;
1989                         ret = -rte_errno;
1990                         goto exit;
1991                 }
1992         } else {
1993                 /*
1994                  * The existence of several matching entries (nd > 1) means
1995                  * port representors have been instantiated. No existing Verbs
1996                  * call nor sysfs entries can tell them apart, this can only
1997                  * be done through Netlink calls assuming kernel drivers are
1998                  * recent enough to support them.
1999                  *
2000                  * In the event of identification failure through Netlink,
2001                  * try again through sysfs, then:
2002                  *
2003                  * 1. A single IB device matches (nd == 1) with single
2004                  *    port (np=0/1) and is not a representor, assume
2005                  *    no switch support.
2006                  *
2007                  * 2. Otherwise no safe assumptions can be made;
2008                  *    complain louder and bail out.
2009                  */
2010                 for (i = 0; i != nd; ++i) {
2011                         memset(&list[ns].info, 0, sizeof(list[ns].info));
2012                         list[ns].max_port = 1;
2013                         list[ns].phys_port = 1;
2014                         list[ns].phys_dev = ibv_match[i];
2015                         list[ns].eth_dev = NULL;
2016                         list[ns].pci_dev = pci_dev;
2017                         list[ns].pf_bond = -1;
2018                         list[ns].ifindex = 0;
2019                         if (nl_rdma >= 0)
2020                                 list[ns].ifindex = mlx5_nl_ifindex
2021                                 (nl_rdma,
2022                                 mlx5_os_get_dev_device_name
2023                                                 (list[ns].phys_dev), 1);
2024                         if (!list[ns].ifindex) {
2025                                 char ifname[IF_NAMESIZE];
2026
2027                                 /*
2028                                  * Netlink failed, it may happen with old
2029                                  * ib_core kernel driver (before 4.16).
2030                                  * We can assume there is old driver because
2031                                  * here we are processing single ports IB
2032                                  * devices. Let's try sysfs to retrieve
2033                                  * the ifindex. The method works for
2034                                  * master device only.
2035                                  */
2036                                 if (nd > 1) {
2037                                         /*
2038                                          * Multiple devices found, assume
2039                                          * representors, can not distinguish
2040                                          * master/representor and retrieve
2041                                          * ifindex via sysfs.
2042                                          */
2043                                         continue;
2044                                 }
2045                                 ret = mlx5_get_ifname_sysfs
2046                                         (ibv_match[i]->ibdev_path, ifname);
2047                                 if (!ret)
2048                                         list[ns].ifindex =
2049                                                 if_nametoindex(ifname);
2050                                 if (!list[ns].ifindex) {
2051                                         /*
2052                                          * No network interface index found
2053                                          * for the specified device, it means
2054                                          * there it is neither representor
2055                                          * nor master.
2056                                          */
2057                                         continue;
2058                                 }
2059                         }
2060                         ret = -1;
2061                         if (nl_route >= 0)
2062                                 ret = mlx5_nl_switch_info
2063                                                (nl_route,
2064                                                 list[ns].ifindex,
2065                                                 &list[ns].info);
2066                         if (ret || (!list[ns].info.representor &&
2067                                     !list[ns].info.master)) {
2068                                 /*
2069                                  * We failed to recognize representors with
2070                                  * Netlink, let's try to perform the task
2071                                  * with sysfs.
2072                                  */
2073                                 ret =  mlx5_sysfs_switch_info
2074                                                 (list[ns].ifindex,
2075                                                  &list[ns].info);
2076                         }
2077                         if (!ret && (list[ns].info.representor ^
2078                                      list[ns].info.master)) {
2079                                 ns++;
2080                         } else if ((nd == 1) &&
2081                                    !list[ns].info.representor &&
2082                                    !list[ns].info.master) {
2083                                 /*
2084                                  * Single IB device with
2085                                  * one physical port and
2086                                  * attached network device.
2087                                  * May be SRIOV is not enabled
2088                                  * or there is no representors.
2089                                  */
2090                                 DRV_LOG(INFO, "no E-Switch support detected");
2091                                 ns++;
2092                                 break;
2093                         }
2094                 }
2095                 if (!ns) {
2096                         DRV_LOG(ERR,
2097                                 "unable to recognize master/representors"
2098                                 " on the multiple IB devices");
2099                         rte_errno = ENOENT;
2100                         ret = -rte_errno;
2101                         goto exit;
2102                 }
2103         }
2104         MLX5_ASSERT(ns);
2105         /*
2106          * Sort list to probe devices in natural order for users convenience
2107          * (i.e. master first, then representors from lowest to highest ID).
2108          */
2109         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2110         /* Device specific configuration. */
2111         switch (pci_dev->id.device_id) {
2112         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2113         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2114         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2115         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2116         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2117         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2118         case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF:
2119                 dev_config_vf = 1;
2120                 break;
2121         default:
2122                 dev_config_vf = 0;
2123                 break;
2124         }
2125         for (i = 0; i != ns; ++i) {
2126                 uint32_t restore;
2127
2128                 /* Default configuration. */
2129                 memset(&dev_config, 0, sizeof(struct mlx5_dev_config));
2130                 dev_config.vf = dev_config_vf;
2131                 dev_config.mps = MLX5_ARG_UNSET;
2132                 dev_config.dbnc = MLX5_ARG_UNSET;
2133                 dev_config.rx_vec_en = 1;
2134                 dev_config.txq_inline_max = MLX5_ARG_UNSET;
2135                 dev_config.txq_inline_min = MLX5_ARG_UNSET;
2136                 dev_config.txq_inline_mpw = MLX5_ARG_UNSET;
2137                 dev_config.txqs_inline = MLX5_ARG_UNSET;
2138                 dev_config.vf_nl_en = 1;
2139                 dev_config.mr_ext_memseg_en = 1;
2140                 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
2141                 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
2142                 dev_config.dv_esw_en = 1;
2143                 dev_config.dv_flow_en = 1;
2144                 dev_config.decap_en = 1;
2145                 dev_config.log_hp_size = MLX5_ARG_UNSET;
2146                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2147                                                  &list[i],
2148                                                  &dev_config);
2149                 if (!list[i].eth_dev) {
2150                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2151                                 break;
2152                         /* Device is disabled or already spawned. Ignore it. */
2153                         continue;
2154                 }
2155                 restore = list[i].eth_dev->data->dev_flags;
2156                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2157                 /* Restore non-PCI flags cleared by the above call. */
2158                 list[i].eth_dev->data->dev_flags |= restore;
2159                 rte_eth_dev_probing_finish(list[i].eth_dev);
2160         }
2161         if (i != ns) {
2162                 DRV_LOG(ERR,
2163                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2164                         " encountering an error: %s",
2165                         pci_dev->addr.domain, pci_dev->addr.bus,
2166                         pci_dev->addr.devid, pci_dev->addr.function,
2167                         strerror(rte_errno));
2168                 ret = -rte_errno;
2169                 /* Roll back. */
2170                 while (i--) {
2171                         if (!list[i].eth_dev)
2172                                 continue;
2173                         mlx5_dev_close(list[i].eth_dev);
2174                         /* mac_addrs must not be freed because in dev_private */
2175                         list[i].eth_dev->data->mac_addrs = NULL;
2176                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2177                 }
2178                 /* Restore original error. */
2179                 rte_errno = -ret;
2180         } else {
2181                 ret = 0;
2182         }
2183 exit:
2184         /*
2185          * Do the routine cleanup:
2186          * - close opened Netlink sockets
2187          * - free allocated spawn data array
2188          * - free the Infiniband device list
2189          */
2190         if (nl_rdma >= 0)
2191                 close(nl_rdma);
2192         if (nl_route >= 0)
2193                 close(nl_route);
2194         if (list)
2195                 mlx5_free(list);
2196         MLX5_ASSERT(ibv_list);
2197         mlx5_glue->free_device_list(ibv_list);
2198         return ret;
2199 }
2200
2201 static int
2202 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
2203 {
2204         char *env;
2205         int value;
2206
2207         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2208         /* Get environment variable to store. */
2209         env = getenv(MLX5_SHUT_UP_BF);
2210         value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
2211         if (config->dbnc == MLX5_ARG_UNSET)
2212                 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
2213         else
2214                 setenv(MLX5_SHUT_UP_BF,
2215                        config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
2216         return value;
2217 }
2218
2219 static void
2220 mlx5_restore_doorbell_mapping_env(int value)
2221 {
2222         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2223         /* Restore the original environment variable state. */
2224         if (value == MLX5_ARG_UNSET)
2225                 unsetenv(MLX5_SHUT_UP_BF);
2226         else
2227                 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
2228 }
2229
2230 /**
2231  * Extract pdn of PD object using DV API.
2232  *
2233  * @param[in] pd
2234  *   Pointer to the verbs PD object.
2235  * @param[out] pdn
2236  *   Pointer to the PD object number variable.
2237  *
2238  * @return
2239  *   0 on success, error value otherwise.
2240  */
2241 int
2242 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
2243 {
2244 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2245         struct mlx5dv_obj obj;
2246         struct mlx5dv_pd pd_info;
2247         int ret = 0;
2248
2249         obj.pd.in = pd;
2250         obj.pd.out = &pd_info;
2251         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
2252         if (ret) {
2253                 DRV_LOG(DEBUG, "Fail to get PD object info");
2254                 return ret;
2255         }
2256         *pdn = pd_info.pdn;
2257         return 0;
2258 #else
2259         (void)pd;
2260         (void)pdn;
2261         return -ENOTSUP;
2262 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
2263 }
2264
2265 /**
2266  * Function API to open IB device.
2267  *
2268  * This function calls the Linux glue APIs to open a device.
2269  *
2270  * @param[in] spawn
2271  *   Pointer to the IB device attributes (name, port, etc).
2272  * @param[out] config
2273  *   Pointer to device configuration structure.
2274  * @param[out] sh
2275  *   Pointer to shared context structure.
2276  *
2277  * @return
2278  *   0 on success, a positive error value otherwise.
2279  */
2280 int
2281 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
2282                      const struct mlx5_dev_config *config,
2283                      struct mlx5_dev_ctx_shared *sh)
2284 {
2285         int dbmap_env;
2286         int err = 0;
2287
2288         sh->numa_node = spawn->pci_dev->device.numa_node;
2289         pthread_mutex_init(&sh->txpp.mutex, NULL);
2290         /*
2291          * Configure environment variable "MLX5_BF_SHUT_UP"
2292          * before the device creation. The rdma_core library
2293          * checks the variable at device creation and
2294          * stores the result internally.
2295          */
2296         dbmap_env = mlx5_config_doorbell_mapping_env(config);
2297         /* Try to open IB device with DV first, then usual Verbs. */
2298         errno = 0;
2299         sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
2300         if (sh->ctx) {
2301                 sh->devx = 1;
2302                 DRV_LOG(DEBUG, "DevX is supported");
2303                 /* The device is created, no need for environment. */
2304                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2305         } else {
2306                 /* The environment variable is still configured. */
2307                 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
2308                 err = errno ? errno : ENODEV;
2309                 /*
2310                  * The environment variable is not needed anymore,
2311                  * all device creation attempts are completed.
2312                  */
2313                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2314                 if (!sh->ctx)
2315                         return err;
2316                 DRV_LOG(DEBUG, "DevX is NOT supported");
2317                 err = 0;
2318         }
2319         return err;
2320 }
2321
2322 /**
2323  * Install shared asynchronous device events handler.
2324  * This function is implemented to support event sharing
2325  * between multiple ports of single IB device.
2326  *
2327  * @param sh
2328  *   Pointer to mlx5_dev_ctx_shared object.
2329  */
2330 void
2331 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2332 {
2333         int ret;
2334         int flags;
2335
2336         sh->intr_handle.fd = -1;
2337         flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
2338         ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
2339                     F_SETFL, flags | O_NONBLOCK);
2340         if (ret) {
2341                 DRV_LOG(INFO, "failed to change file descriptor async event"
2342                         " queue");
2343         } else {
2344                 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
2345                 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2346                 if (rte_intr_callback_register(&sh->intr_handle,
2347                                         mlx5_dev_interrupt_handler, sh)) {
2348                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2349                         sh->intr_handle.fd = -1;
2350                 }
2351         }
2352         if (sh->devx) {
2353 #ifdef HAVE_IBV_DEVX_ASYNC
2354                 sh->intr_handle_devx.fd = -1;
2355                 sh->devx_comp =
2356                         (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
2357                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2358                 if (!devx_comp) {
2359                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2360                         return;
2361                 }
2362                 flags = fcntl(devx_comp->fd, F_GETFL);
2363                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2364                 if (ret) {
2365                         DRV_LOG(INFO, "failed to change file descriptor"
2366                                 " devx comp");
2367                         return;
2368                 }
2369                 sh->intr_handle_devx.fd = devx_comp->fd;
2370                 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2371                 if (rte_intr_callback_register(&sh->intr_handle_devx,
2372                                         mlx5_dev_interrupt_handler_devx, sh)) {
2373                         DRV_LOG(INFO, "Fail to install the devx shared"
2374                                 " interrupt.");
2375                         sh->intr_handle_devx.fd = -1;
2376                 }
2377 #endif /* HAVE_IBV_DEVX_ASYNC */
2378         }
2379 }
2380
2381 /**
2382  * Uninstall shared asynchronous device events handler.
2383  * This function is implemented to support event sharing
2384  * between multiple ports of single IB device.
2385  *
2386  * @param dev
2387  *   Pointer to mlx5_dev_ctx_shared object.
2388  */
2389 void
2390 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2391 {
2392         if (sh->intr_handle.fd >= 0)
2393                 mlx5_intr_callback_unregister(&sh->intr_handle,
2394                                               mlx5_dev_interrupt_handler, sh);
2395 #ifdef HAVE_IBV_DEVX_ASYNC
2396         if (sh->intr_handle_devx.fd >= 0)
2397                 rte_intr_callback_unregister(&sh->intr_handle_devx,
2398                                   mlx5_dev_interrupt_handler_devx, sh);
2399         if (sh->devx_comp)
2400                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2401 #endif
2402 }
2403
2404 /**
2405  * Read statistics by a named counter.
2406  *
2407  * @param[in] priv
2408  *   Pointer to the private device data structure.
2409  * @param[in] ctr_name
2410  *   Pointer to the name of the statistic counter to read
2411  * @param[out] stat
2412  *   Pointer to read statistic value.
2413  * @return
2414  *   0 on success and stat is valud, 1 if failed to read the value
2415  *   rte_errno is set.
2416  *
2417  */
2418 int
2419 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2420                       uint64_t *stat)
2421 {
2422         int fd;
2423
2424         if (priv->sh) {
2425                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2426                       priv->sh->ibdev_path,
2427                       priv->dev_port,
2428                       ctr_name);
2429                 fd = open(path, O_RDONLY);
2430                 /*
2431                  * in switchdev the file location is not per port
2432                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2433                  */
2434                 if (fd == -1) {
2435                         MKSTR(path1, "%s/hw_counters/%s",
2436                               priv->sh->ibdev_path,
2437                               ctr_name);
2438                         fd = open(path1, O_RDONLY);
2439                 }
2440                 if (fd != -1) {
2441                         char buf[21] = {'\0'};
2442                         ssize_t n = read(fd, buf, sizeof(buf));
2443
2444                         close(fd);
2445                         if (n != -1) {
2446                                 *stat = strtoull(buf, NULL, 10);
2447                                 return 0;
2448                         }
2449                 }
2450         }
2451         *stat = 0;
2452         return 1;
2453 }
2454
2455 /**
2456  * Set the reg_mr and dereg_mr call backs
2457  *
2458  * @param reg_mr_cb[out]
2459  *   Pointer to reg_mr func
2460  * @param dereg_mr_cb[out]
2461  *   Pointer to dereg_mr func
2462  *
2463  */
2464 void
2465 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2466                       mlx5_dereg_mr_t *dereg_mr_cb)
2467 {
2468         *reg_mr_cb = mlx5_verbs_ops.reg_mr;
2469         *dereg_mr_cb = mlx5_verbs_ops.dereg_mr;
2470 }
2471
2472 /**
2473  * Remove a MAC address from device
2474  *
2475  * @param dev
2476  *   Pointer to Ethernet device structure.
2477  * @param index
2478  *   MAC address index.
2479  */
2480 void
2481 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2482 {
2483         struct mlx5_priv *priv = dev->data->dev_private;
2484         const int vf = priv->config.vf;
2485
2486         if (vf)
2487                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2488                                         mlx5_ifindex(dev), priv->mac_own,
2489                                         &dev->data->mac_addrs[index], index);
2490 }
2491
2492 /**
2493  * Adds a MAC address to the device
2494  *
2495  * @param dev
2496  *   Pointer to Ethernet device structure.
2497  * @param mac_addr
2498  *   MAC address to register.
2499  * @param index
2500  *   MAC address index.
2501  *
2502  * @return
2503  *   0 on success, a negative errno value otherwise
2504  */
2505 int
2506 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2507                      uint32_t index)
2508 {
2509         struct mlx5_priv *priv = dev->data->dev_private;
2510         const int vf = priv->config.vf;
2511         int ret = 0;
2512
2513         if (vf)
2514                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2515                                            mlx5_ifindex(dev), priv->mac_own,
2516                                            mac, index);
2517         return ret;
2518 }
2519
2520 /**
2521  * Modify a VF MAC address
2522  *
2523  * @param priv
2524  *   Pointer to device private data.
2525  * @param mac_addr
2526  *   MAC address to modify into.
2527  * @param iface_idx
2528  *   Net device interface index
2529  * @param vf_index
2530  *   VF index
2531  *
2532  * @return
2533  *   0 on success, a negative errno value otherwise
2534  */
2535 int
2536 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2537                            unsigned int iface_idx,
2538                            struct rte_ether_addr *mac_addr,
2539                            int vf_index)
2540 {
2541         return mlx5_nl_vf_mac_addr_modify
2542                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2543 }
2544
2545 /**
2546  * Set device promiscuous mode
2547  *
2548  * @param dev
2549  *   Pointer to Ethernet device structure.
2550  * @param enable
2551  *   0 - promiscuous is disabled, otherwise - enabled
2552  *
2553  * @return
2554  *   0 on success, a negative error value otherwise
2555  */
2556 int
2557 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2558 {
2559         struct mlx5_priv *priv = dev->data->dev_private;
2560
2561         return mlx5_nl_promisc(priv->nl_socket_route,
2562                                mlx5_ifindex(dev), !!enable);
2563 }
2564
2565 /**
2566  * Set device promiscuous mode
2567  *
2568  * @param dev
2569  *   Pointer to Ethernet device structure.
2570  * @param enable
2571  *   0 - all multicase is disabled, otherwise - enabled
2572  *
2573  * @return
2574  *   0 on success, a negative error value otherwise
2575  */
2576 int
2577 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2578 {
2579         struct mlx5_priv *priv = dev->data->dev_private;
2580
2581         return mlx5_nl_allmulti(priv->nl_socket_route,
2582                                 mlx5_ifindex(dev), !!enable);
2583 }
2584
2585 /**
2586  * Flush device MAC addresses
2587  *
2588  * @param dev
2589  *   Pointer to Ethernet device structure.
2590  *
2591  */
2592 void
2593 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2594 {
2595         struct mlx5_priv *priv = dev->data->dev_private;
2596
2597         mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2598                                dev->data->mac_addrs,
2599                                MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2600 }
2601
2602 const struct eth_dev_ops mlx5_os_dev_ops = {
2603         .dev_configure = mlx5_dev_configure,
2604         .dev_start = mlx5_dev_start,
2605         .dev_stop = mlx5_dev_stop,
2606         .dev_set_link_down = mlx5_set_link_down,
2607         .dev_set_link_up = mlx5_set_link_up,
2608         .dev_close = mlx5_dev_close,
2609         .promiscuous_enable = mlx5_promiscuous_enable,
2610         .promiscuous_disable = mlx5_promiscuous_disable,
2611         .allmulticast_enable = mlx5_allmulticast_enable,
2612         .allmulticast_disable = mlx5_allmulticast_disable,
2613         .link_update = mlx5_link_update,
2614         .stats_get = mlx5_stats_get,
2615         .stats_reset = mlx5_stats_reset,
2616         .xstats_get = mlx5_xstats_get,
2617         .xstats_reset = mlx5_xstats_reset,
2618         .xstats_get_names = mlx5_xstats_get_names,
2619         .fw_version_get = mlx5_fw_version_get,
2620         .dev_infos_get = mlx5_dev_infos_get,
2621         .read_clock = mlx5_txpp_read_clock,
2622         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2623         .vlan_filter_set = mlx5_vlan_filter_set,
2624         .rx_queue_setup = mlx5_rx_queue_setup,
2625         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2626         .tx_queue_setup = mlx5_tx_queue_setup,
2627         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2628         .rx_queue_release = mlx5_rx_queue_release,
2629         .tx_queue_release = mlx5_tx_queue_release,
2630         .rx_queue_start = mlx5_rx_queue_start,
2631         .rx_queue_stop = mlx5_rx_queue_stop,
2632         .tx_queue_start = mlx5_tx_queue_start,
2633         .tx_queue_stop = mlx5_tx_queue_stop,
2634         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2635         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2636         .mac_addr_remove = mlx5_mac_addr_remove,
2637         .mac_addr_add = mlx5_mac_addr_add,
2638         .mac_addr_set = mlx5_mac_addr_set,
2639         .set_mc_addr_list = mlx5_set_mc_addr_list,
2640         .mtu_set = mlx5_dev_set_mtu,
2641         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2642         .vlan_offload_set = mlx5_vlan_offload_set,
2643         .reta_update = mlx5_dev_rss_reta_update,
2644         .reta_query = mlx5_dev_rss_reta_query,
2645         .rss_hash_update = mlx5_rss_hash_update,
2646         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
2647         .filter_ctrl = mlx5_dev_filter_ctrl,
2648         .rxq_info_get = mlx5_rxq_info_get,
2649         .txq_info_get = mlx5_txq_info_get,
2650         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2651         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2652         .rx_queue_intr_enable = mlx5_rx_intr_enable,
2653         .rx_queue_intr_disable = mlx5_rx_intr_disable,
2654         .is_removed = mlx5_is_removed,
2655         .udp_tunnel_port_add  = mlx5_udp_tunnel_port_add,
2656         .get_module_info = mlx5_get_module_info,
2657         .get_module_eeprom = mlx5_get_module_eeprom,
2658         .hairpin_cap_get = mlx5_hairpin_cap_get,
2659         .mtr_ops_get = mlx5_flow_meter_ops_get,
2660         .hairpin_bind = mlx5_hairpin_bind,
2661         .hairpin_unbind = mlx5_hairpin_unbind,
2662         .hairpin_get_peer_ports = mlx5_hairpin_get_peer_ports,
2663         .hairpin_queue_peer_update = mlx5_hairpin_queue_peer_update,
2664         .hairpin_queue_peer_bind = mlx5_hairpin_queue_peer_bind,
2665         .hairpin_queue_peer_unbind = mlx5_hairpin_queue_peer_unbind,
2666 };
2667
2668 /* Available operations from secondary process. */
2669 const struct eth_dev_ops mlx5_os_dev_sec_ops = {
2670         .stats_get = mlx5_stats_get,
2671         .stats_reset = mlx5_stats_reset,
2672         .xstats_get = mlx5_xstats_get,
2673         .xstats_reset = mlx5_xstats_reset,
2674         .xstats_get_names = mlx5_xstats_get_names,
2675         .fw_version_get = mlx5_fw_version_get,
2676         .dev_infos_get = mlx5_dev_infos_get,
2677         .read_clock = mlx5_txpp_read_clock,
2678         .rx_queue_start = mlx5_rx_queue_start,
2679         .rx_queue_stop = mlx5_rx_queue_stop,
2680         .tx_queue_start = mlx5_tx_queue_start,
2681         .tx_queue_stop = mlx5_tx_queue_stop,
2682         .rxq_info_get = mlx5_rxq_info_get,
2683         .txq_info_get = mlx5_txq_info_get,
2684         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2685         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2686         .get_module_info = mlx5_get_module_info,
2687         .get_module_eeprom = mlx5_get_module_eeprom,
2688 };
2689
2690 /* Available operations in flow isolated mode. */
2691 const struct eth_dev_ops mlx5_os_dev_ops_isolate = {
2692         .dev_configure = mlx5_dev_configure,
2693         .dev_start = mlx5_dev_start,
2694         .dev_stop = mlx5_dev_stop,
2695         .dev_set_link_down = mlx5_set_link_down,
2696         .dev_set_link_up = mlx5_set_link_up,
2697         .dev_close = mlx5_dev_close,
2698         .promiscuous_enable = mlx5_promiscuous_enable,
2699         .promiscuous_disable = mlx5_promiscuous_disable,
2700         .allmulticast_enable = mlx5_allmulticast_enable,
2701         .allmulticast_disable = mlx5_allmulticast_disable,
2702         .link_update = mlx5_link_update,
2703         .stats_get = mlx5_stats_get,
2704         .stats_reset = mlx5_stats_reset,
2705         .xstats_get = mlx5_xstats_get,
2706         .xstats_reset = mlx5_xstats_reset,
2707         .xstats_get_names = mlx5_xstats_get_names,
2708         .fw_version_get = mlx5_fw_version_get,
2709         .dev_infos_get = mlx5_dev_infos_get,
2710         .read_clock = mlx5_txpp_read_clock,
2711         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2712         .vlan_filter_set = mlx5_vlan_filter_set,
2713         .rx_queue_setup = mlx5_rx_queue_setup,
2714         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2715         .tx_queue_setup = mlx5_tx_queue_setup,
2716         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2717         .rx_queue_release = mlx5_rx_queue_release,
2718         .tx_queue_release = mlx5_tx_queue_release,
2719         .rx_queue_start = mlx5_rx_queue_start,
2720         .rx_queue_stop = mlx5_rx_queue_stop,
2721         .tx_queue_start = mlx5_tx_queue_start,
2722         .tx_queue_stop = mlx5_tx_queue_stop,
2723         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2724         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2725         .mac_addr_remove = mlx5_mac_addr_remove,
2726         .mac_addr_add = mlx5_mac_addr_add,
2727         .mac_addr_set = mlx5_mac_addr_set,
2728         .set_mc_addr_list = mlx5_set_mc_addr_list,
2729         .mtu_set = mlx5_dev_set_mtu,
2730         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2731         .vlan_offload_set = mlx5_vlan_offload_set,
2732         .filter_ctrl = mlx5_dev_filter_ctrl,
2733         .rxq_info_get = mlx5_rxq_info_get,
2734         .txq_info_get = mlx5_txq_info_get,
2735         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2736         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2737         .rx_queue_intr_enable = mlx5_rx_intr_enable,
2738         .rx_queue_intr_disable = mlx5_rx_intr_disable,
2739         .is_removed = mlx5_is_removed,
2740         .get_module_info = mlx5_get_module_info,
2741         .get_module_eeprom = mlx5_get_module_eeprom,
2742         .hairpin_cap_get = mlx5_hairpin_cap_get,
2743         .mtr_ops_get = mlx5_flow_meter_ops_get,
2744         .hairpin_bind = mlx5_hairpin_bind,
2745         .hairpin_unbind = mlx5_hairpin_unbind,
2746         .hairpin_get_peer_ports = mlx5_hairpin_get_peer_ports,
2747         .hairpin_queue_peer_update = mlx5_hairpin_queue_peer_update,
2748         .hairpin_queue_peer_bind = mlx5_hairpin_queue_peer_bind,
2749         .hairpin_queue_peer_unbind = mlx5_hairpin_queue_peer_unbind,
2750 };