drivers/net/mlx5/linux/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2020 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12 #include <net/if.h>
  13 #include <linux/rtnetlink.h>
  14 #include <linux/sockios.h>
  15 #include <linux/ethtool.h>
  16 #include <fcntl.h>
  17
  18 #include <rte_malloc.h>
  19 #include <rte_ethdev_driver.h>
  20 #include <rte_ethdev_pci.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_common.h>
  24 #include <rte_kvargs.h>
  25 #include <rte_rwlock.h>
  26 #include <rte_spinlock.h>
  27 #include <rte_string_fns.h>
  28 #include <rte_alarm.h>
  29 #include <rte_eal_paging.h>
  30
  31 #include <mlx5_glue.h>
  32 #include <mlx5_devx_cmds.h>
  33 #include <mlx5_common.h>
  34 #include <mlx5_common_mp.h>
  35 #include <mlx5_common_mr.h>
  36 #include <mlx5_malloc.h>
  37
  38 #include "mlx5_defs.h"
  39 #include "mlx5.h"
  40 #include "mlx5_common_os.h"
  41 #include "mlx5_utils.h"
  42 #include "mlx5_rxtx.h"
  43 #include "mlx5_autoconf.h"
  44 #include "mlx5_mr.h"
  45 #include "mlx5_flow.h"
  46 #include "rte_pmd_mlx5.h"
  47 #include "mlx5_verbs.h"
  48 #include "mlx5_nl.h"
  49 #include "mlx5_devx.h"
  50
  51 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
  52
  53 #ifndef HAVE_IBV_MLX5_MOD_MPW
  54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
  55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
  56 #endif
  57
  58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
  59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
  60 #endif
  61
  62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  63
  64 /* Spinlock for mlx5_shared_data allocation. */
  65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  66
  67 /* Process local data for secondary processes. */
  68 static struct mlx5_local_data mlx5_local_data;
  69
  70 /**
  71  * Set the completion channel file descriptor interrupt as non-blocking.
  72  *
  73  * @param[in] rxq_obj
  74  *   Pointer to RQ channel object, which includes the channel fd
  75  *
  76  * @param[out] fd
  77  *   The file descriptor (representing the intetrrupt) used in this channel.
  78  *
  79  * @return
  80  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
  81  */
  82 int
  83 mlx5_os_set_nonblock_channel_fd(int fd)
  84 {
  85         int flags;
  86
  87         flags = fcntl(fd, F_GETFL);
  88         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
  89 }
  90
  91 /**
  92  * Get mlx5 device attributes. The glue function query_device_ex() is called
  93  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
  94  * device attributes from the glue out parameter.
  95  *
  96  * @param dev
  97  *   Pointer to ibv context.
  98  *
  99  * @param device_attr
 100  *   Pointer to mlx5 device attributes.
 101  *
 102  * @return
 103  *   0 on success, non zero error number otherwise
 104  */
 105 int
 106 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
 107 {
 108         int err;
 109         struct ibv_device_attr_ex attr_ex;
 110         memset(device_attr, 0, sizeof(*device_attr));
 111         err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
 112         if (err)
 113                 return err;
 114
 115         device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
 116         device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
 117         device_attr->max_sge = attr_ex.orig_attr.max_sge;
 118         device_attr->max_cq = attr_ex.orig_attr.max_cq;
 119         device_attr->max_qp = attr_ex.orig_attr.max_qp;
 120         device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
 121         device_attr->max_rwq_indirection_table_size =
 122                 attr_ex.rss_caps.max_rwq_indirection_table_size;
 123         device_attr->max_tso = attr_ex.tso_caps.max_tso;
 124         device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
 125
 126         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 127         err = mlx5_glue->dv_query_device(ctx, &dv_attr);
 128         if (err)
 129                 return err;
 130
 131         device_attr->flags = dv_attr.flags;
 132         device_attr->comp_mask = dv_attr.comp_mask;
 133 #ifdef HAVE_IBV_MLX5_MOD_SWP
 134         device_attr->sw_parsing_offloads =
 135                 dv_attr.sw_parsing_caps.sw_parsing_offloads;
 136 #endif
 137         device_attr->min_single_stride_log_num_of_bytes =
 138                 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
 139         device_attr->max_single_stride_log_num_of_bytes =
 140                 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
 141         device_attr->min_single_wqe_log_num_of_strides =
 142                 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
 143         device_attr->max_single_wqe_log_num_of_strides =
 144                 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
 145         device_attr->stride_supported_qpts =
 146                 dv_attr.striding_rq_caps.supported_qpts;
 147 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 148         device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
 149 #endif
 150
 151         return err;
 152 }
 153
 154 /**
 155  * Verbs callback to allocate a memory. This function should allocate the space
 156  * according to the size provided residing inside a huge page.
 157  * Please note that all allocation must respect the alignment from libmlx5
 158  * (i.e. currently rte_mem_page_size()).
 159  *
 160  * @param[in] size
 161  *   The size in bytes of the memory to allocate.
 162  * @param[in] data
 163  *   A pointer to the callback data.
 164  *
 165  * @return
 166  *   Allocated buffer, NULL otherwise and rte_errno is set.
 167  */
 168 static void *
 169 mlx5_alloc_verbs_buf(size_t size, void *data)
 170 {
 171         struct mlx5_priv *priv = data;
 172         void *ret;
 173         unsigned int socket = SOCKET_ID_ANY;
 174         size_t alignment = rte_mem_page_size();
 175         if (alignment == (size_t)-1) {
 176                 DRV_LOG(ERR, "Failed to get mem page size");
 177                 rte_errno = ENOMEM;
 178                 return NULL;
 179         }
 180
 181         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
 182                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 183
 184                 socket = ctrl->socket;
 185         } else if (priv->verbs_alloc_ctx.type ==
 186                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
 187                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 188
 189                 socket = ctrl->socket;
 190         }
 191         MLX5_ASSERT(data != NULL);
 192         ret = mlx5_malloc(0, size, alignment, socket);
 193         if (!ret && size)
 194                 rte_errno = ENOMEM;
 195         return ret;
 196 }
 197
 198 /**
 199  * Verbs callback to free a memory.
 200  *
 201  * @param[in] ptr
 202  *   A pointer to the memory to free.
 203  * @param[in] data
 204  *   A pointer to the callback data.
 205  */
 206 static void
 207 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 208 {
 209         MLX5_ASSERT(data != NULL);
 210         mlx5_free(ptr);
 211 }
 212
 213 /**
 214  * Initialize DR related data within private structure.
 215  * Routine checks the reference counter and does actual
 216  * resources creation/initialization only if counter is zero.
 217  *
 218  * @param[in] priv
 219  *   Pointer to the private device data structure.
 220  *
 221  * @return
 222  *   Zero on success, positive error code otherwise.
 223  */
 224 static int
 225 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 226 {
 227         struct mlx5_dev_ctx_shared *sh = priv->sh;
 228         char s[MLX5_HLIST_NAMESIZE] __rte_unused;
 229         int err;
 230
 231         MLX5_ASSERT(sh && sh->refcnt);
 232         if (sh->refcnt > 1)
 233                 return 0;
 234         err = mlx5_alloc_table_hash_list(priv);
 235         if (err)
 236                 goto error;
 237         /* The resources below are only valid with DV support. */
 238 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 239         /* Create tags hash list table. */
 240         snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name);
 241         sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE, 0,
 242                                           MLX5_HLIST_WRITE_MOST,
 243                                           flow_dv_tag_create_cb, NULL,
 244                                           flow_dv_tag_remove_cb);
 245         if (!sh->tag_table) {
 246                 DRV_LOG(ERR, "tags with hash creation failed.");
 247                 err = ENOMEM;
 248                 goto error;
 249         }
 250         sh->tag_table->ctx = sh;
 251         snprintf(s, sizeof(s), "%s_hdr_modify", sh->ibdev_name);
 252         sh->modify_cmds = mlx5_hlist_create(s, MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
 253                                             0, 0, NULL, NULL, NULL);
 254         if (!sh->modify_cmds) {
 255                 DRV_LOG(ERR, "hdr modify hash creation failed");
 256                 err = ENOMEM;
 257                 goto error;
 258         }
 259         snprintf(s, sizeof(s), "%s_encaps_decaps", sh->ibdev_name);
 260         sh->encaps_decaps = mlx5_hlist_create(s,
 261                                               MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
 262                                               0, 0, NULL, NULL, NULL);
 263         if (!sh->encaps_decaps) {
 264                 DRV_LOG(ERR, "encap decap hash creation failed");
 265                 err = ENOMEM;
 266                 goto error;
 267         }
 268 #endif
 269 #ifdef HAVE_MLX5DV_DR
 270         void *domain;
 271
 272         /* Reference counter is zero, we should initialize structures. */
 273         domain = mlx5_glue->dr_create_domain(sh->ctx,
 274                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 275         if (!domain) {
 276                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 277                 err = errno;
 278                 goto error;
 279         }
 280         sh->rx_domain = domain;
 281         domain = mlx5_glue->dr_create_domain(sh->ctx,
 282                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 283         if (!domain) {
 284                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 285                 err = errno;
 286                 goto error;
 287         }
 288         pthread_mutex_init(&sh->dv_mutex, NULL);
 289         sh->tx_domain = domain;
 290 #ifdef HAVE_MLX5DV_DR_ESWITCH
 291         if (priv->config.dv_esw_en) {
 292                 domain  = mlx5_glue->dr_create_domain
 293                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 294                 if (!domain) {
 295                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 296                         err = errno;
 297                         goto error;
 298                 }
 299                 sh->fdb_domain = domain;
 300                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 301         }
 302 #endif
 303         if (!sh->tunnel_hub)
 304                 err = mlx5_alloc_tunnel_hub(sh);
 305         if (err) {
 306                 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
 307                 goto error;
 308         }
 309         if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
 310                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
 311                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
 312                 if (sh->fdb_domain)
 313                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
 314         }
 315         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 316 #endif /* HAVE_MLX5DV_DR */
 317         sh->default_miss_action =
 318                         mlx5_glue->dr_create_flow_action_default_miss();
 319         if (!sh->default_miss_action)
 320                 DRV_LOG(WARNING, "Default miss action is not supported.");
 321         return 0;
 322 error:
 323         /* Rollback the created objects. */
 324         if (sh->rx_domain) {
 325                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 326                 sh->rx_domain = NULL;
 327         }
 328         if (sh->tx_domain) {
 329                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 330                 sh->tx_domain = NULL;
 331         }
 332         if (sh->fdb_domain) {
 333                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 334                 sh->fdb_domain = NULL;
 335         }
 336         if (sh->esw_drop_action) {
 337                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 338                 sh->esw_drop_action = NULL;
 339         }
 340         if (sh->pop_vlan_action) {
 341                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 342                 sh->pop_vlan_action = NULL;
 343         }
 344         if (sh->encaps_decaps) {
 345                 mlx5_hlist_destroy(sh->encaps_decaps);
 346                 sh->encaps_decaps = NULL;
 347         }
 348         if (sh->modify_cmds) {
 349                 mlx5_hlist_destroy(sh->modify_cmds);
 350                 sh->modify_cmds = NULL;
 351         }
 352         if (sh->tag_table) {
 353                 /* tags should be destroyed with flow before. */
 354                 mlx5_hlist_destroy(sh->tag_table);
 355                 sh->tag_table = NULL;
 356         }
 357         if (sh->tunnel_hub) {
 358                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 359                 sh->tunnel_hub = NULL;
 360         }
 361         mlx5_free_table_hash_list(priv);
 362         return err;
 363 }
 364
 365 /**
 366  * Destroy DR related data within private structure.
 367  *
 368  * @param[in] priv
 369  *   Pointer to the private device data structure.
 370  */
 371 void
 372 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 373 {
 374         struct mlx5_dev_ctx_shared *sh = priv->sh;
 375
 376         MLX5_ASSERT(sh && sh->refcnt);
 377         if (sh->refcnt > 1)
 378                 return;
 379 #ifdef HAVE_MLX5DV_DR
 380         if (sh->rx_domain) {
 381                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 382                 sh->rx_domain = NULL;
 383         }
 384         if (sh->tx_domain) {
 385                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 386                 sh->tx_domain = NULL;
 387         }
 388 #ifdef HAVE_MLX5DV_DR_ESWITCH
 389         if (sh->fdb_domain) {
 390                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 391                 sh->fdb_domain = NULL;
 392         }
 393         if (sh->esw_drop_action) {
 394                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 395                 sh->esw_drop_action = NULL;
 396         }
 397 #endif
 398         if (sh->pop_vlan_action) {
 399                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 400                 sh->pop_vlan_action = NULL;
 401         }
 402         pthread_mutex_destroy(&sh->dv_mutex);
 403 #endif /* HAVE_MLX5DV_DR */
 404         if (sh->default_miss_action)
 405                 mlx5_glue->destroy_flow_action
 406                                 (sh->default_miss_action);
 407         if (sh->encaps_decaps) {
 408                 mlx5_hlist_destroy(sh->encaps_decaps);
 409                 sh->encaps_decaps = NULL;
 410         }
 411         if (sh->modify_cmds) {
 412                 mlx5_hlist_destroy(sh->modify_cmds);
 413                 sh->modify_cmds = NULL;
 414         }
 415         if (sh->tag_table) {
 416                 /* tags should be destroyed with flow before. */
 417                 mlx5_hlist_destroy(sh->tag_table);
 418                 sh->tag_table = NULL;
 419         }
 420         if (sh->tunnel_hub) {
 421                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 422                 sh->tunnel_hub = NULL;
 423         }
 424         mlx5_free_table_hash_list(priv);
 425 }
 426
 427 /**
 428  * Initialize shared data between primary and secondary process.
 429  *
 430  * A memzone is reserved by primary process and secondary processes attach to
 431  * the memzone.
 432  *
 433  * @return
 434  *   0 on success, a negative errno value otherwise and rte_errno is set.
 435  */
 436 static int
 437 mlx5_init_shared_data(void)
 438 {
 439         const struct rte_memzone *mz;
 440         int ret = 0;
 441
 442         rte_spinlock_lock(&mlx5_shared_data_lock);
 443         if (mlx5_shared_data == NULL) {
 444                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 445                         /* Allocate shared memory. */
 446                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 447                                                  sizeof(*mlx5_shared_data),
 448                                                  SOCKET_ID_ANY, 0);
 449                         if (mz == NULL) {
 450                                 DRV_LOG(ERR,
 451                                         "Cannot allocate mlx5 shared data");
 452                                 ret = -rte_errno;
 453                                 goto error;
 454                         }
 455                         mlx5_shared_data = mz->addr;
 456                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 457                         rte_spinlock_init(&mlx5_shared_data->lock);
 458                 } else {
 459                         /* Lookup allocated shared memory. */
 460                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 461                         if (mz == NULL) {
 462                                 DRV_LOG(ERR,
 463                                         "Cannot attach mlx5 shared data");
 464                                 ret = -rte_errno;
 465                                 goto error;
 466                         }
 467                         mlx5_shared_data = mz->addr;
 468                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 469                 }
 470         }
 471 error:
 472         rte_spinlock_unlock(&mlx5_shared_data_lock);
 473         return ret;
 474 }
 475
 476 /**
 477  * PMD global initialization.
 478  *
 479  * Independent from individual device, this function initializes global
 480  * per-PMD data structures distinguishing primary and secondary processes.
 481  * Hence, each initialization is called once per a process.
 482  *
 483  * @return
 484  *   0 on success, a negative errno value otherwise and rte_errno is set.
 485  */
 486 static int
 487 mlx5_init_once(void)
 488 {
 489         struct mlx5_shared_data *sd;
 490         struct mlx5_local_data *ld = &mlx5_local_data;
 491         int ret = 0;
 492
 493         if (mlx5_init_shared_data())
 494                 return -rte_errno;
 495         sd = mlx5_shared_data;
 496         MLX5_ASSERT(sd);
 497         rte_spinlock_lock(&sd->lock);
 498         switch (rte_eal_process_type()) {
 499         case RTE_PROC_PRIMARY:
 500                 if (sd->init_done)
 501                         break;
 502                 LIST_INIT(&sd->mem_event_cb_list);
 503                 rte_rwlock_init(&sd->mem_event_rwlock);
 504                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
 505                                                 mlx5_mr_mem_event_cb, NULL);
 506                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
 507                                            mlx5_mp_os_primary_handle);
 508                 if (ret)
 509                         goto out;
 510                 sd->init_done = true;
 511                 break;
 512         case RTE_PROC_SECONDARY:
 513                 if (ld->init_done)
 514                         break;
 515                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
 516                                              mlx5_mp_os_secondary_handle);
 517                 if (ret)
 518                         goto out;
 519                 ++sd->secondary_cnt;
 520                 ld->init_done = true;
 521                 break;
 522         default:
 523                 break;
 524         }
 525 out:
 526         rte_spinlock_unlock(&sd->lock);
 527         return ret;
 528 }
 529
 530 /**
 531  * Create the Tx queue DevX/Verbs object.
 532  *
 533  * @param dev
 534  *   Pointer to Ethernet device.
 535  * @param idx
 536  *   Queue index in DPDK Tx queue array.
 537  *
 538  * @return
 539  *   0 on success, a negative errno value otherwise and rte_errno is set.
 540  */
 541 static int
 542 mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
 543 {
 544         struct mlx5_priv *priv = dev->data->dev_private;
 545         struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
 546         struct mlx5_txq_ctrl *txq_ctrl =
 547                         container_of(txq_data, struct mlx5_txq_ctrl, txq);
 548
 549         if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
 550                 return mlx5_txq_devx_obj_new(dev, idx);
 551 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 552         if (!priv->config.dv_esw_en)
 553                 return mlx5_txq_devx_obj_new(dev, idx);
 554 #endif
 555         return mlx5_txq_ibv_obj_new(dev, idx);
 556 }
 557
 558 /**
 559  * Release an Tx DevX/verbs queue object.
 560  *
 561  * @param txq_obj
 562  *   DevX/Verbs Tx queue object.
 563  */
 564 static void
 565 mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)
 566 {
 567         if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
 568                 mlx5_txq_devx_obj_release(txq_obj);
 569                 return;
 570         }
 571 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 572         if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) {
 573                 mlx5_txq_devx_obj_release(txq_obj);
 574                 return;
 575         }
 576 #endif
 577         mlx5_txq_ibv_obj_release(txq_obj);
 578 }
 579
 580 /**
 581  * DV flow counter mode detect and config.
 582  *
 583  * @param dev
 584  *   Pointer to rte_eth_dev structure.
 585  *
 586  */
 587 static void
 588 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
 589 {
 590 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 591         struct mlx5_priv *priv = dev->data->dev_private;
 592         struct mlx5_dev_ctx_shared *sh = priv->sh;
 593         bool fallback;
 594
 595 #ifndef HAVE_IBV_DEVX_ASYNC
 596         fallback = true;
 597 #else
 598         fallback = false;
 599         if (!priv->config.devx || !priv->config.dv_flow_en ||
 600             !priv->config.hca_attr.flow_counters_dump ||
 601             !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
 602             (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
 603                 fallback = true;
 604 #endif
 605         if (fallback)
 606                 DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
 607                         "counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
 608                         priv->config.hca_attr.flow_counters_dump,
 609                         priv->config.hca_attr.flow_counter_bulk_alloc_bitmap);
 610         /* Initialize fallback mode only on the port initializes sh. */
 611         if (sh->refcnt == 1)
 612                 sh->cmng.counter_fallback = fallback;
 613         else if (fallback != sh->cmng.counter_fallback)
 614                 DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
 615                         "with others:%d.", PORT_ID(priv), fallback);
 616 #endif
 617 }
 618
 619 /**
 620  * Spawn an Ethernet device from Verbs information.
 621  *
 622  * @param dpdk_dev
 623  *   Backing DPDK device.
 624  * @param spawn
 625  *   Verbs device parameters (name, port, switch_info) to spawn.
 626  * @param config
 627  *   Device configuration parameters.
 628  *
 629  * @return
 630  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 631  *   is set. The following errors are defined:
 632  *
 633  *   EBUSY: device is not supposed to be spawned.
 634  *   EEXIST: device is already spawned
 635  */
 636 static struct rte_eth_dev *
 637 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 638                struct mlx5_dev_spawn_data *spawn,
 639                struct mlx5_dev_config *config)
 640 {
 641         const struct mlx5_switch_info *switch_info = &spawn->info;
 642         struct mlx5_dev_ctx_shared *sh = NULL;
 643         struct ibv_port_attr port_attr;
 644         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 645         struct rte_eth_dev *eth_dev = NULL;
 646         struct mlx5_priv *priv = NULL;
 647         int err = 0;
 648         unsigned int hw_padding = 0;
 649         unsigned int mps;
 650         unsigned int cqe_comp;
 651         unsigned int cqe_pad = 0;
 652         unsigned int tunnel_en = 0;
 653         unsigned int mpls_en = 0;
 654         unsigned int swp = 0;
 655         unsigned int mprq = 0;
 656         unsigned int mprq_min_stride_size_n = 0;
 657         unsigned int mprq_max_stride_size_n = 0;
 658         unsigned int mprq_min_stride_num_n = 0;
 659         unsigned int mprq_max_stride_num_n = 0;
 660         struct rte_ether_addr mac;
 661         char name[RTE_ETH_NAME_MAX_LEN];
 662         int own_domain_id = 0;
 663         uint16_t port_id;
 664         unsigned int i;
 665 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 666         struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
 667 #endif
 668
 669         /* Determine if this port representor is supposed to be spawned. */
 670         if (switch_info->representor && dpdk_dev->devargs) {
 671                 struct rte_eth_devargs eth_da;
 672
 673                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
 674                 if (err) {
 675                         rte_errno = -err;
 676                         DRV_LOG(ERR, "failed to process device arguments: %s",
 677                                 strerror(rte_errno));
 678                         return NULL;
 679                 }
 680                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
 681                         if (eth_da.representor_ports[i] ==
 682                             (uint16_t)switch_info->port_name)
 683                                 break;
 684                 if (i == eth_da.nb_representor_ports) {
 685                         rte_errno = EBUSY;
 686                         return NULL;
 687                 }
 688         }
 689         /* Build device name. */
 690         if (spawn->pf_bond <  0) {
 691                 /* Single device. */
 692                 if (!switch_info->representor)
 693                         strlcpy(name, dpdk_dev->name, sizeof(name));
 694                 else
 695                         snprintf(name, sizeof(name), "%s_representor_%u",
 696                                  dpdk_dev->name, switch_info->port_name);
 697         } else {
 698                 /* Bonding device. */
 699                 if (!switch_info->representor)
 700                         snprintf(name, sizeof(name), "%s_%s",
 701                                  dpdk_dev->name,
 702                                  mlx5_os_get_dev_device_name(spawn->phys_dev));
 703                 else
 704                         snprintf(name, sizeof(name), "%s_%s_representor_%u",
 705                                  dpdk_dev->name,
 706                                  mlx5_os_get_dev_device_name(spawn->phys_dev),
 707                                  switch_info->port_name);
 708         }
 709         /* check if the device is already spawned */
 710         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 711                 rte_errno = EEXIST;
 712                 return NULL;
 713         }
 714         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 715         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 716                 struct mlx5_mp_id mp_id;
 717
 718                 eth_dev = rte_eth_dev_attach_secondary(name);
 719                 if (eth_dev == NULL) {
 720                         DRV_LOG(ERR, "can not attach rte ethdev");
 721                         rte_errno = ENOMEM;
 722                         return NULL;
 723                 }
 724                 eth_dev->device = dpdk_dev;
 725                 eth_dev->dev_ops = &mlx5_os_dev_sec_ops;
 726                 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
 727                 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
 728                 err = mlx5_proc_priv_init(eth_dev);
 729                 if (err)
 730                         return NULL;
 731                 mp_id.port_id = eth_dev->data->port_id;
 732                 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 733                 /* Receive command fd from primary process */
 734                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
 735                 if (err < 0)
 736                         goto err_secondary;
 737                 /* Remap UAR for Tx queues. */
 738                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
 739                 if (err)
 740                         goto err_secondary;
 741                 /*
 742                  * Ethdev pointer is still required as input since
 743                  * the primary device is not accessible from the
 744                  * secondary process.
 745                  */
 746                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
 747                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
 748                 return eth_dev;
 749 err_secondary:
 750                 mlx5_dev_close(eth_dev);
 751                 return NULL;
 752         }
 753         /*
 754          * Some parameters ("tx_db_nc" in particularly) are needed in
 755          * advance to create dv/verbs device context. We proceed the
 756          * devargs here to get ones, and later proceed devargs again
 757          * to override some hardware settings.
 758          */
 759         err = mlx5_args(config, dpdk_dev->devargs);
 760         if (err) {
 761                 err = rte_errno;
 762                 DRV_LOG(ERR, "failed to process device arguments: %s",
 763                         strerror(rte_errno));
 764                 goto error;
 765         }
 766         if (config->dv_miss_info) {
 767                 if (switch_info->master || switch_info->representor)
 768                         config->dv_xmeta_en = MLX5_XMETA_MODE_META16;
 769         }
 770         mlx5_malloc_mem_select(config->sys_mem_en);
 771         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
 772         if (!sh)
 773                 return NULL;
 774         config->devx = sh->devx;
 775 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
 776         config->dest_tir = 1;
 777 #endif
 778 #ifdef HAVE_IBV_MLX5_MOD_SWP
 779         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
 780 #endif
 781         /*
 782          * Multi-packet send is supported by ConnectX-4 Lx PF as well
 783          * as all ConnectX-5 devices.
 784          */
 785 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 786         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
 787 #endif
 788 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 789         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
 790 #endif
 791         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
 792         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
 793                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
 794                         DRV_LOG(DEBUG, "enhanced MPW is supported");
 795                         mps = MLX5_MPW_ENHANCED;
 796                 } else {
 797                         DRV_LOG(DEBUG, "MPW is supported");
 798                         mps = MLX5_MPW;
 799                 }
 800         } else {
 801                 DRV_LOG(DEBUG, "MPW isn't supported");
 802                 mps = MLX5_MPW_DISABLED;
 803         }
 804 #ifdef HAVE_IBV_MLX5_MOD_SWP
 805         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
 806                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
 807         DRV_LOG(DEBUG, "SWP support: %u", swp);
 808 #endif
 809         config->swp = !!swp;
 810 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 811         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
 812                 struct mlx5dv_striding_rq_caps mprq_caps =
 813                         dv_attr.striding_rq_caps;
 814
 815                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
 816                         mprq_caps.min_single_stride_log_num_of_bytes);
 817                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
 818                         mprq_caps.max_single_stride_log_num_of_bytes);
 819                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
 820                         mprq_caps.min_single_wqe_log_num_of_strides);
 821                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
 822                         mprq_caps.max_single_wqe_log_num_of_strides);
 823                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
 824                         mprq_caps.supported_qpts);
 825                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
 826                 mprq = 1;
 827                 mprq_min_stride_size_n =
 828                         mprq_caps.min_single_stride_log_num_of_bytes;
 829                 mprq_max_stride_size_n =
 830                         mprq_caps.max_single_stride_log_num_of_bytes;
 831                 mprq_min_stride_num_n =
 832                         mprq_caps.min_single_wqe_log_num_of_strides;
 833                 mprq_max_stride_num_n =
 834                         mprq_caps.max_single_wqe_log_num_of_strides;
 835         }
 836 #endif
 837         if (RTE_CACHE_LINE_SIZE == 128 &&
 838             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
 839                 cqe_comp = 0;
 840         else
 841                 cqe_comp = 1;
 842         config->cqe_comp = cqe_comp;
 843 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
 844         /* Whether device supports 128B Rx CQE padding. */
 845         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
 846                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
 847 #endif
 848 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 849         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
 850                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
 851                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
 852                              (dv_attr.tunnel_offloads_caps &
 853                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
 854                              (dv_attr.tunnel_offloads_caps &
 855                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
 856         }
 857         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
 858                 tunnel_en ? "" : "not ");
 859 #else
 860         DRV_LOG(WARNING,
 861                 "tunnel offloading disabled due to old OFED/rdma-core version");
 862 #endif
 863         config->tunnel_en = tunnel_en;
 864 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
 865         mpls_en = ((dv_attr.tunnel_offloads_caps &
 866                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
 867                    (dv_attr.tunnel_offloads_caps &
 868                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
 869         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
 870                 mpls_en ? "" : "not ");
 871 #else
 872         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
 873                 " old OFED/rdma-core version or firmware configuration");
 874 #endif
 875         config->mpls_en = mpls_en;
 876         /* Check port status. */
 877         err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
 878         if (err) {
 879                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
 880                 goto error;
 881         }
 882         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
 883                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
 884                 err = EINVAL;
 885                 goto error;
 886         }
 887         if (port_attr.state != IBV_PORT_ACTIVE)
 888                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
 889                         mlx5_glue->port_state_str(port_attr.state),
 890                         port_attr.state);
 891         /* Allocate private eth device data. */
 892         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
 893                            sizeof(*priv),
 894                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
 895         if (priv == NULL) {
 896                 DRV_LOG(ERR, "priv allocation failure");
 897                 err = ENOMEM;
 898                 goto error;
 899         }
 900         priv->sh = sh;
 901         priv->dev_port = spawn->phys_port;
 902         priv->pci_dev = spawn->pci_dev;
 903         priv->mtu = RTE_ETHER_MTU;
 904         priv->mp_id.port_id = port_id;
 905         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 906         /* Some internal functions rely on Netlink sockets, open them now. */
 907         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
 908         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
 909         priv->representor = !!switch_info->representor;
 910         priv->master = !!switch_info->master;
 911         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
 912         priv->vport_meta_tag = 0;
 913         priv->vport_meta_mask = 0;
 914         priv->pf_bond = spawn->pf_bond;
 915 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 916         /*
 917          * The DevX port query API is implemented. E-Switch may use
 918          * either vport or reg_c[0] metadata register to match on
 919          * vport index. The engaged part of metadata register is
 920          * defined by mask.
 921          */
 922         if (switch_info->representor || switch_info->master) {
 923                 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
 924                                       MLX5DV_DEVX_PORT_MATCH_REG_C_0;
 925                 err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port,
 926                                                  &devx_port);
 927                 if (err) {
 928                         DRV_LOG(WARNING,
 929                                 "can't query devx port %d on device %s",
 930                                 spawn->phys_port,
 931                                 mlx5_os_get_dev_device_name(spawn->phys_dev));
 932                         devx_port.comp_mask = 0;
 933                 }
 934         }
 935         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
 936                 priv->vport_meta_tag = devx_port.reg_c_0.value;
 937                 priv->vport_meta_mask = devx_port.reg_c_0.mask;
 938                 if (!priv->vport_meta_mask) {
 939                         DRV_LOG(ERR, "vport zero mask for port %d"
 940                                      " on bonding device %s",
 941                                      spawn->phys_port,
 942                                      mlx5_os_get_dev_device_name
 943                                                         (spawn->phys_dev));
 944                         err = ENOTSUP;
 945                         goto error;
 946                 }
 947                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
 948                         DRV_LOG(ERR, "invalid vport tag for port %d"
 949                                      " on bonding device %s",
 950                                      spawn->phys_port,
 951                                      mlx5_os_get_dev_device_name
 952                                                         (spawn->phys_dev));
 953                         err = ENOTSUP;
 954                         goto error;
 955                 }
 956         }
 957         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
 958                 priv->vport_id = devx_port.vport_num;
 959         } else if (spawn->pf_bond >= 0) {
 960                 DRV_LOG(ERR, "can't deduce vport index for port %d"
 961                              " on bonding device %s",
 962                              spawn->phys_port,
 963                              mlx5_os_get_dev_device_name(spawn->phys_dev));
 964                 err = ENOTSUP;
 965                 goto error;
 966         } else {
 967                 /* Suppose vport index in compatible way. */
 968                 priv->vport_id = switch_info->representor ?
 969                                  switch_info->port_name + 1 : -1;
 970         }
 971 #else
 972         /*
 973          * Kernel/rdma_core support single E-Switch per PF configurations
 974          * only and vport_id field contains the vport index for
 975          * associated VF, which is deduced from representor port name.
 976          * For example, let's have the IB device port 10, it has
 977          * attached network device eth0, which has port name attribute
 978          * pf0vf2, we can deduce the VF number as 2, and set vport index
 979          * as 3 (2+1). This assigning schema should be changed if the
 980          * multiple E-Switch instances per PF configurations or/and PCI
 981          * subfunctions are added.
 982          */
 983         priv->vport_id = switch_info->representor ?
 984                          switch_info->port_name + 1 : -1;
 985 #endif
 986         /* representor_id field keeps the unmodified VF index. */
 987         priv->representor_id = switch_info->representor ?
 988                                switch_info->port_name : -1;
 989         /*
 990          * Look for sibling devices in order to reuse their switch domain
 991          * if any, otherwise allocate one.
 992          */
 993         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
 994                 const struct mlx5_priv *opriv =
 995                         rte_eth_devices[port_id].data->dev_private;
 996
 997                 if (!opriv ||
 998                     opriv->sh != priv->sh ||
 999                         opriv->domain_id ==
1000                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1001                         continue;
1002                 priv->domain_id = opriv->domain_id;
1003                 break;
1004         }
1005         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1006                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1007                 if (err) {
1008                         err = rte_errno;
1009                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1010                                 strerror(rte_errno));
1011                         goto error;
1012                 }
1013                 own_domain_id = 1;
1014         }
1015         /* Override some values set by hardware configuration. */
1016         mlx5_args(config, dpdk_dev->devargs);
1017         err = mlx5_dev_check_sibling_config(priv, config);
1018         if (err)
1019                 goto error;
1020         config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1021                             IBV_DEVICE_RAW_IP_CSUM);
1022         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1023                 (config->hw_csum ? "" : "not "));
1024 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1025         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1026         DRV_LOG(DEBUG, "counters are not supported");
1027 #endif
1028 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
1029         if (config->dv_flow_en) {
1030                 DRV_LOG(WARNING, "DV flow is not supported");
1031                 config->dv_flow_en = 0;
1032         }
1033 #endif
1034         config->ind_table_max_size =
1035                 sh->device_attr.max_rwq_indirection_table_size;
1036         /*
1037          * Remove this check once DPDK supports larger/variable
1038          * indirection tables.
1039          */
1040         if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1041                 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1042         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1043                 config->ind_table_max_size);
1044         config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1045                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1046         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1047                 (config->hw_vlan_strip ? "" : "not "));
1048         config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1049                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1050 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1051         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1052 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1053         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1054                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1055 #endif
1056         if (config->hw_padding && !hw_padding) {
1057                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1058                 config->hw_padding = 0;
1059         } else if (config->hw_padding) {
1060                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1061         }
1062         config->tso = (sh->device_attr.max_tso > 0 &&
1063                       (sh->device_attr.tso_supported_qpts &
1064                        (1 << IBV_QPT_RAW_PACKET)));
1065         if (config->tso)
1066                 config->tso_max_payload_sz = sh->device_attr.max_tso;
1067         /*
1068          * MPW is disabled by default, while the Enhanced MPW is enabled
1069          * by default.
1070          */
1071         if (config->mps == MLX5_ARG_UNSET)
1072                 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1073                                                           MLX5_MPW_DISABLED;
1074         else
1075                 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
1076         DRV_LOG(INFO, "%sMPS is %s",
1077                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1078                 config->mps == MLX5_MPW ? "legacy " : "",
1079                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1080         if (config->cqe_comp && !cqe_comp) {
1081                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1082                 config->cqe_comp = 0;
1083         }
1084         if (config->cqe_pad && !cqe_pad) {
1085                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1086                 config->cqe_pad = 0;
1087         } else if (config->cqe_pad) {
1088                 DRV_LOG(INFO, "Rx CQE padding is enabled");
1089         }
1090         if (config->devx) {
1091                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
1092                 if (err) {
1093                         err = -err;
1094                         goto error;
1095                 }
1096                 /* Check relax ordering support. */
1097                 if (config->hca_attr.relaxed_ordering_write &&
1098                     config->hca_attr.relaxed_ordering_read  &&
1099                     !haswell_broadwell_cpu)
1100                         sh->cmng.relaxed_ordering = 1;
1101                 /* Check for LRO support. */
1102                 if (config->dest_tir && config->hca_attr.lro_cap &&
1103                     config->dv_flow_en) {
1104                         /* TBD check tunnel lro caps. */
1105                         config->lro.supported = config->hca_attr.lro_cap;
1106                         DRV_LOG(DEBUG, "Device supports LRO");
1107                         /*
1108                          * If LRO timeout is not configured by application,
1109                          * use the minimal supported value.
1110                          */
1111                         if (!config->lro.timeout)
1112                                 config->lro.timeout =
1113                                 config->hca_attr.lro_timer_supported_periods[0];
1114                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1115                                 config->lro.timeout);
1116                         DRV_LOG(DEBUG, "LRO minimal size of TCP segment "
1117                                 "required for coalescing is %d bytes",
1118                                 config->hca_attr.lro_min_mss_size);
1119                 }
1120 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
1121                 if (config->hca_attr.qos.sup &&
1122                     config->hca_attr.qos.srtcm_sup &&
1123                     config->dv_flow_en) {
1124                         uint8_t reg_c_mask =
1125                                 config->hca_attr.qos.flow_meter_reg_c_ids;
1126                         /*
1127                          * Meter needs two REG_C's for color match and pre-sfx
1128                          * flow match. Here get the REG_C for color match.
1129                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
1130                          */
1131                         reg_c_mask &= 0xfc;
1132                         if (__builtin_popcount(reg_c_mask) < 1) {
1133                                 priv->mtr_en = 0;
1134                                 DRV_LOG(WARNING, "No available register for"
1135                                         " meter.");
1136                         } else {
1137                                 priv->mtr_color_reg = ffs(reg_c_mask) - 1 +
1138                                                       REG_C_0;
1139                                 priv->mtr_en = 1;
1140                                 priv->mtr_reg_share =
1141                                       config->hca_attr.qos.flow_meter_reg_share;
1142                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1143                                         priv->mtr_color_reg);
1144                         }
1145                 }
1146 #endif
1147 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1148                 if (config->hca_attr.log_max_ft_sampler_num > 0  &&
1149                     config->dv_flow_en) {
1150                         priv->sampler_en = 1;
1151                         DRV_LOG(DEBUG, "The Sampler enabled!\n");
1152                 } else {
1153                         priv->sampler_en = 0;
1154                         if (!config->hca_attr.log_max_ft_sampler_num)
1155                                 DRV_LOG(WARNING, "No available register for"
1156                                                 " Sampler.");
1157                         else
1158                                 DRV_LOG(DEBUG, "DV flow is not supported!\n");
1159                 }
1160 #endif
1161         }
1162         if (config->tx_pp) {
1163                 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1164                         config->hca_attr.dev_freq_khz);
1165                 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1166                         config->hca_attr.qos.packet_pacing ? "" : "not ");
1167                 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1168                         config->hca_attr.cross_channel ? "" : "not ");
1169                 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1170                         config->hca_attr.wqe_index_ignore ? "" : "not ");
1171                 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1172                         config->hca_attr.non_wire_sq ? "" : "not ");
1173                 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1174                         config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1175                         config->hca_attr.log_max_static_sq_wq);
1176                 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1177                         config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1178                 if (!config->devx) {
1179                         DRV_LOG(ERR, "DevX is required for packet pacing");
1180                         err = ENODEV;
1181                         goto error;
1182                 }
1183                 if (!config->hca_attr.qos.packet_pacing) {
1184                         DRV_LOG(ERR, "Packet pacing is not supported");
1185                         err = ENODEV;
1186                         goto error;
1187                 }
1188                 if (!config->hca_attr.cross_channel) {
1189                         DRV_LOG(ERR, "Cross channel operations are"
1190                                      " required for packet pacing");
1191                         err = ENODEV;
1192                         goto error;
1193                 }
1194                 if (!config->hca_attr.wqe_index_ignore) {
1195                         DRV_LOG(ERR, "WQE index ignore feature is"
1196                                      " required for packet pacing");
1197                         err = ENODEV;
1198                         goto error;
1199                 }
1200                 if (!config->hca_attr.non_wire_sq) {
1201                         DRV_LOG(ERR, "Non-wire SQ feature is"
1202                                      " required for packet pacing");
1203                         err = ENODEV;
1204                         goto error;
1205                 }
1206                 if (!config->hca_attr.log_max_static_sq_wq) {
1207                         DRV_LOG(ERR, "Static WQE SQ feature is"
1208                                      " required for packet pacing");
1209                         err = ENODEV;
1210                         goto error;
1211                 }
1212                 if (!config->hca_attr.qos.wqe_rate_pp) {
1213                         DRV_LOG(ERR, "WQE rate mode is required"
1214                                      " for packet pacing");
1215                         err = ENODEV;
1216                         goto error;
1217                 }
1218 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1219                 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1220                              " can't create queues for packet pacing");
1221                 err = ENODEV;
1222                 goto error;
1223 #endif
1224         }
1225         if (config->devx) {
1226                 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1227
1228                 err = config->hca_attr.access_register_user ?
1229                         mlx5_devx_cmd_register_read
1230                                 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1231                                 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1232                 if (!err) {
1233                         uint32_t ts_mode;
1234
1235                         /* MTUTC register is read successfully. */
1236                         ts_mode = MLX5_GET(register_mtutc, reg,
1237                                            time_stamp_mode);
1238                         if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1239                                 config->rt_timestamp = 1;
1240                 } else {
1241                         /* Kernel does not support register reading. */
1242                         if (config->hca_attr.dev_freq_khz ==
1243                                                  (NS_PER_S / MS_PER_S))
1244                                 config->rt_timestamp = 1;
1245                 }
1246         }
1247         /*
1248          * If HW has bug working with tunnel packet decapsulation and
1249          * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1250          * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1251          */
1252         if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1253                 config->hw_fcs_strip = 0;
1254         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1255                 (config->hw_fcs_strip ? "" : "not "));
1256         if (config->mprq.enabled && mprq) {
1257                 if (config->mprq.stride_num_n &&
1258                     (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1259                      config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1260                         config->mprq.stride_num_n =
1261                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1262                                                 mprq_min_stride_num_n),
1263                                         mprq_max_stride_num_n);
1264                         DRV_LOG(WARNING,
1265                                 "the number of strides"
1266                                 " for Multi-Packet RQ is out of range,"
1267                                 " setting default value (%u)",
1268                                 1 << config->mprq.stride_num_n);
1269                 }
1270                 if (config->mprq.stride_size_n &&
1271                     (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1272                      config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1273                         config->mprq.stride_size_n =
1274                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1275                                                 mprq_min_stride_size_n),
1276                                         mprq_max_stride_size_n);
1277                         DRV_LOG(WARNING,
1278                                 "the size of a stride"
1279                                 " for Multi-Packet RQ is out of range,"
1280                                 " setting default value (%u)",
1281                                 1 << config->mprq.stride_size_n);
1282                 }
1283                 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1284                 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1285         } else if (config->mprq.enabled && !mprq) {
1286                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1287                 config->mprq.enabled = 0;
1288         }
1289         if (config->max_dump_files_num == 0)
1290                 config->max_dump_files_num = 128;
1291         eth_dev = rte_eth_dev_allocate(name);
1292         if (eth_dev == NULL) {
1293                 DRV_LOG(ERR, "can not allocate rte ethdev");
1294                 err = ENOMEM;
1295                 goto error;
1296         }
1297         if (priv->representor) {
1298                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1299                 eth_dev->data->representor_id = priv->representor_id;
1300         }
1301         /*
1302          * Store associated network device interface index. This index
1303          * is permanent throughout the lifetime of device. So, we may store
1304          * the ifindex here and use the cached value further.
1305          */
1306         MLX5_ASSERT(spawn->ifindex);
1307         priv->if_index = spawn->ifindex;
1308         if (priv->pf_bond >= 0 && priv->master) {
1309                 /* Get bond interface info */
1310                 err = mlx5_sysfs_bond_info(priv->if_index,
1311                                      &priv->bond_ifindex,
1312                                      priv->bond_name);
1313                 if (err)
1314                         DRV_LOG(ERR, "unable to get bond info: %s",
1315                                 strerror(rte_errno));
1316                 else
1317                         DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
1318                                 priv->if_index, priv->bond_ifindex,
1319                                 priv->bond_name);
1320         }
1321         eth_dev->data->dev_private = priv;
1322         priv->dev_data = eth_dev->data;
1323         eth_dev->data->mac_addrs = priv->mac;
1324         eth_dev->device = dpdk_dev;
1325         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1326         /* Configure the first MAC address by default. */
1327         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1328                 DRV_LOG(ERR,
1329                         "port %u cannot get MAC address, is mlx5_en"
1330                         " loaded? (errno: %s)",
1331                         eth_dev->data->port_id, strerror(rte_errno));
1332                 err = ENODEV;
1333                 goto error;
1334         }
1335         DRV_LOG(INFO,
1336                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1337                 eth_dev->data->port_id,
1338                 mac.addr_bytes[0], mac.addr_bytes[1],
1339                 mac.addr_bytes[2], mac.addr_bytes[3],
1340                 mac.addr_bytes[4], mac.addr_bytes[5]);
1341 #ifdef RTE_LIBRTE_MLX5_DEBUG
1342         {
1343                 char ifname[IF_NAMESIZE];
1344
1345                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1346                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1347                                 eth_dev->data->port_id, ifname);
1348                 else
1349                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1350                                 eth_dev->data->port_id);
1351         }
1352 #endif
1353         /* Get actual MTU if possible. */
1354         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1355         if (err) {
1356                 err = rte_errno;
1357                 goto error;
1358         }
1359         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1360                 priv->mtu);
1361         /* Initialize burst functions to prevent crashes before link-up. */
1362         eth_dev->rx_pkt_burst = removed_rx_burst;
1363         eth_dev->tx_pkt_burst = removed_tx_burst;
1364         eth_dev->dev_ops = &mlx5_os_dev_ops;
1365         eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1366         eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1367         eth_dev->rx_queue_count = mlx5_rx_queue_count;
1368         /* Register MAC address. */
1369         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1370         if (config->vf && config->vf_nl_en)
1371                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1372                                       mlx5_ifindex(eth_dev),
1373                                       eth_dev->data->mac_addrs,
1374                                       MLX5_MAX_MAC_ADDRESSES);
1375         priv->flows = 0;
1376         priv->ctrl_flows = 0;
1377         rte_spinlock_init(&priv->flow_list_lock);
1378         TAILQ_INIT(&priv->flow_meters);
1379         TAILQ_INIT(&priv->flow_meter_profiles);
1380         /* Hint libmlx5 to use PMD allocator for data plane resources */
1381         mlx5_glue->dv_set_context_attr(sh->ctx,
1382                         MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1383                         (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
1384                                 .alloc = &mlx5_alloc_verbs_buf,
1385                                 .free = &mlx5_free_verbs_buf,
1386                                 .data = priv,
1387                         }));
1388         /* Bring Ethernet device up. */
1389         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1390                 eth_dev->data->port_id);
1391         mlx5_set_link_up(eth_dev);
1392         /*
1393          * Even though the interrupt handler is not installed yet,
1394          * interrupts will still trigger on the async_fd from
1395          * Verbs context returned by ibv_open_device().
1396          */
1397         mlx5_link_update(eth_dev, 0);
1398 #ifdef HAVE_MLX5DV_DR_ESWITCH
1399         if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1400               (switch_info->representor || switch_info->master)))
1401                 config->dv_esw_en = 0;
1402 #else
1403         config->dv_esw_en = 0;
1404 #endif
1405         /* Detect minimal data bytes to inline. */
1406         mlx5_set_min_inline(spawn, config);
1407         /* Store device configuration on private structure. */
1408         priv->config = *config;
1409         /* Create context for virtual machine VLAN workaround. */
1410         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1411         if (config->dv_flow_en) {
1412                 err = mlx5_alloc_shared_dr(priv);
1413                 if (err)
1414                         goto error;
1415         }
1416         if (config->devx && config->dv_flow_en && config->dest_tir) {
1417                 priv->obj_ops = devx_obj_ops;
1418                 priv->obj_ops.drop_action_create =
1419                                                 ibv_obj_ops.drop_action_create;
1420                 priv->obj_ops.drop_action_destroy =
1421                                                 ibv_obj_ops.drop_action_destroy;
1422 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1423                 priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify;
1424 #else
1425                 if (config->dv_esw_en)
1426                         priv->obj_ops.txq_obj_modify =
1427                                                 ibv_obj_ops.txq_obj_modify;
1428 #endif
1429                 /* Use specific wrappers for Tx object. */
1430                 priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;
1431                 priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;
1432
1433         } else {
1434                 priv->obj_ops = ibv_obj_ops;
1435         }
1436         priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
1437         if (!priv->drop_queue.hrxq)
1438                 goto error;
1439         /* Supported Verbs flow priority number detection. */
1440         err = mlx5_flow_discover_priorities(eth_dev);
1441         if (err < 0) {
1442                 err = -err;
1443                 goto error;
1444         }
1445         priv->config.flow_prio = err;
1446         if (!priv->config.dv_esw_en &&
1447             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1448                 DRV_LOG(WARNING, "metadata mode %u is not supported "
1449                                  "(no E-Switch)", priv->config.dv_xmeta_en);
1450                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1451         }
1452         mlx5_set_metadata_mask(eth_dev);
1453         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1454             !priv->sh->dv_regc0_mask) {
1455                 DRV_LOG(ERR, "metadata mode %u is not supported "
1456                              "(no metadata reg_c[0] is available)",
1457                              priv->config.dv_xmeta_en);
1458                         err = ENOTSUP;
1459                         goto error;
1460         }
1461         /* Query availability of metadata reg_c's. */
1462         err = mlx5_flow_discover_mreg_c(eth_dev);
1463         if (err < 0) {
1464                 err = -err;
1465                 goto error;
1466         }
1467         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1468                 DRV_LOG(DEBUG,
1469                         "port %u extensive metadata register is not supported",
1470                         eth_dev->data->port_id);
1471                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1472                         DRV_LOG(ERR, "metadata mode %u is not supported "
1473                                      "(no metadata registers available)",
1474                                      priv->config.dv_xmeta_en);
1475                         err = ENOTSUP;
1476                         goto error;
1477                 }
1478         }
1479         if (priv->config.dv_flow_en &&
1480             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1481             mlx5_flow_ext_mreg_supported(eth_dev) &&
1482             priv->sh->dv_regc0_mask) {
1483                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1484                                                       MLX5_FLOW_MREG_HTABLE_SZ,
1485                                                       0, 0,
1486                                                       NULL, NULL, NULL);
1487                 if (!priv->mreg_cp_tbl) {
1488                         err = ENOMEM;
1489                         goto error;
1490                 }
1491         }
1492         mlx5_flow_counter_mode_config(eth_dev);
1493         return eth_dev;
1494 error:
1495         if (priv) {
1496                 if (priv->mreg_cp_tbl)
1497                         mlx5_hlist_destroy(priv->mreg_cp_tbl);
1498                 if (priv->sh)
1499                         mlx5_os_free_shared_dr(priv);
1500                 if (priv->nl_socket_route >= 0)
1501                         close(priv->nl_socket_route);
1502                 if (priv->nl_socket_rdma >= 0)
1503                         close(priv->nl_socket_rdma);
1504                 if (priv->vmwa_context)
1505                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1506                 if (eth_dev && priv->drop_queue.hrxq)
1507                         mlx5_drop_action_destroy(eth_dev);
1508                 if (own_domain_id)
1509                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1510                 mlx5_free(priv);
1511                 if (eth_dev != NULL)
1512                         eth_dev->data->dev_private = NULL;
1513         }
1514         if (eth_dev != NULL) {
1515                 /* mac_addrs must not be freed alone because part of
1516                  * dev_private
1517                  **/
1518                 eth_dev->data->mac_addrs = NULL;
1519                 rte_eth_dev_release_port(eth_dev);
1520         }
1521         if (sh)
1522                 mlx5_free_shared_dev_ctx(sh);
1523         MLX5_ASSERT(err > 0);
1524         rte_errno = err;
1525         return NULL;
1526 }
1527
1528 /**
1529  * Comparison callback to sort device data.
1530  *
1531  * This is meant to be used with qsort().
1532  *
1533  * @param a[in]
1534  *   Pointer to pointer to first data object.
1535  * @param b[in]
1536  *   Pointer to pointer to second data object.
1537  *
1538  * @return
1539  *   0 if both objects are equal, less than 0 if the first argument is less
1540  *   than the second, greater than 0 otherwise.
1541  */
1542 static int
1543 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1544 {
1545         const struct mlx5_switch_info *si_a =
1546                 &((const struct mlx5_dev_spawn_data *)a)->info;
1547         const struct mlx5_switch_info *si_b =
1548                 &((const struct mlx5_dev_spawn_data *)b)->info;
1549         int ret;
1550
1551         /* Master device first. */
1552         ret = si_b->master - si_a->master;
1553         if (ret)
1554                 return ret;
1555         /* Then representor devices. */
1556         ret = si_b->representor - si_a->representor;
1557         if (ret)
1558                 return ret;
1559         /* Unidentified devices come last in no specific order. */
1560         if (!si_a->representor)
1561                 return 0;
1562         /* Order representors by name. */
1563         return si_a->port_name - si_b->port_name;
1564 }
1565
1566 /**
1567  * Match PCI information for possible slaves of bonding device.
1568  *
1569  * @param[in] ibv_dev
1570  *   Pointer to Infiniband device structure.
1571  * @param[in] pci_dev
1572  *   Pointer to PCI device structure to match PCI address.
1573  * @param[in] nl_rdma
1574  *   Netlink RDMA group socket handle.
1575  *
1576  * @return
1577  *   negative value if no bonding device found, otherwise
1578  *   positive index of slave PF in bonding.
1579  */
1580 static int
1581 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1582                            const struct rte_pci_device *pci_dev,
1583                            int nl_rdma)
1584 {
1585         char ifname[IF_NAMESIZE + 1];
1586         unsigned int ifindex;
1587         unsigned int np, i;
1588         FILE *file = NULL;
1589         int pf = -1;
1590
1591         /*
1592          * Try to get master device name. If something goes
1593          * wrong suppose the lack of kernel support and no
1594          * bonding devices.
1595          */
1596         if (nl_rdma < 0)
1597                 return -1;
1598         if (!strstr(ibv_dev->name, "bond"))
1599                 return -1;
1600         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
1601         if (!np)
1602                 return -1;
1603         /*
1604          * The Master device might not be on the predefined
1605          * port (not on port index 1, it is not garanted),
1606          * we have to scan all Infiniband device port and
1607          * find master.
1608          */
1609         for (i = 1; i <= np; ++i) {
1610                 /* Check whether Infiniband port is populated. */
1611                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
1612                 if (!ifindex)
1613                         continue;
1614                 if (!if_indextoname(ifindex, ifname))
1615                         continue;
1616                 /* Try to read bonding slave names from sysfs. */
1617                 MKSTR(slaves,
1618                       "/sys/class/net/%s/master/bonding/slaves", ifname);
1619                 file = fopen(slaves, "r");
1620                 if (file)
1621                         break;
1622         }
1623         if (!file)
1624                 return -1;
1625         /* Use safe format to check maximal buffer length. */
1626         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1627         while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1628                 char tmp_str[IF_NAMESIZE + 32];
1629                 struct rte_pci_addr pci_addr;
1630                 struct mlx5_switch_info info;
1631
1632                 /* Process slave interface names in the loop. */
1633                 snprintf(tmp_str, sizeof(tmp_str),
1634                          "/sys/class/net/%s", ifname);
1635                 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
1636                         DRV_LOG(WARNING, "can not get PCI address"
1637                                          " for netdev \"%s\"", ifname);
1638                         continue;
1639                 }
1640                 if (pci_dev->addr.domain != pci_addr.domain ||
1641                     pci_dev->addr.bus != pci_addr.bus ||
1642                     pci_dev->addr.devid != pci_addr.devid ||
1643                     pci_dev->addr.function != pci_addr.function)
1644                         continue;
1645                 /* Slave interface PCI address match found. */
1646                 fclose(file);
1647                 snprintf(tmp_str, sizeof(tmp_str),
1648                          "/sys/class/net/%s/phys_port_name", ifname);
1649                 file = fopen(tmp_str, "rb");
1650                 if (!file)
1651                         break;
1652                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1653                 if (fscanf(file, "%32s", tmp_str) == 1)
1654                         mlx5_translate_port_name(tmp_str, &info);
1655                 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
1656                     info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1657                         pf = info.port_name;
1658                 break;
1659         }
1660         if (file)
1661                 fclose(file);
1662         return pf;
1663 }
1664
1665 /**
1666  * DPDK callback to register a PCI device.
1667  *
1668  * This function spawns Ethernet devices out of a given PCI device.
1669  *
1670  * @param[in] pci_drv
1671  *   PCI driver structure (mlx5_driver).
1672  * @param[in] pci_dev
1673  *   PCI device information.
1674  *
1675  * @return
1676  *   0 on success, a negative errno value otherwise and rte_errno is set.
1677  */
1678 int
1679 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1680                   struct rte_pci_device *pci_dev)
1681 {
1682         struct ibv_device **ibv_list;
1683         /*
1684          * Number of found IB Devices matching with requested PCI BDF.
1685          * nd != 1 means there are multiple IB devices over the same
1686          * PCI device and we have representors and master.
1687          */
1688         unsigned int nd = 0;
1689         /*
1690          * Number of found IB device Ports. nd = 1 and np = 1..n means
1691          * we have the single multiport IB device, and there may be
1692          * representors attached to some of found ports.
1693          */
1694         unsigned int np = 0;
1695         /*
1696          * Number of DPDK ethernet devices to Spawn - either over
1697          * multiple IB devices or multiple ports of single IB device.
1698          * Actually this is the number of iterations to spawn.
1699          */
1700         unsigned int ns = 0;
1701         /*
1702          * Bonding device
1703          *   < 0 - no bonding device (single one)
1704          *  >= 0 - bonding device (value is slave PF index)
1705          */
1706         int bd = -1;
1707         struct mlx5_dev_spawn_data *list = NULL;
1708         struct mlx5_dev_config dev_config;
1709         unsigned int dev_config_vf;
1710         int ret;
1711
1712         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1713                 mlx5_pmd_socket_init();
1714         ret = mlx5_init_once();
1715         if (ret) {
1716                 DRV_LOG(ERR, "unable to init PMD global data: %s",
1717                         strerror(rte_errno));
1718                 return -rte_errno;
1719         }
1720         errno = 0;
1721         ibv_list = mlx5_glue->get_device_list(&ret);
1722         if (!ibv_list) {
1723                 rte_errno = errno ? errno : ENOSYS;
1724                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1725                 return -rte_errno;
1726         }
1727         /*
1728          * First scan the list of all Infiniband devices to find
1729          * matching ones, gathering into the list.
1730          */
1731         struct ibv_device *ibv_match[ret + 1];
1732         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
1733         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1734         unsigned int i;
1735
1736         while (ret-- > 0) {
1737                 struct rte_pci_addr pci_addr;
1738
1739                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1740                 bd = mlx5_device_bond_pci_match
1741                                 (ibv_list[ret], pci_dev, nl_rdma);
1742                 if (bd >= 0) {
1743                         /*
1744                          * Bonding device detected. Only one match is allowed,
1745                          * the bonding is supported over multi-port IB device,
1746                          * there should be no matches on representor PCI
1747                          * functions or non VF LAG bonding devices with
1748                          * specified address.
1749                          */
1750                         if (nd) {
1751                                 DRV_LOG(ERR,
1752                                         "multiple PCI match on bonding device"
1753                                         "\"%s\" found", ibv_list[ret]->name);
1754                                 rte_errno = ENOENT;
1755                                 ret = -rte_errno;
1756                                 goto exit;
1757                         }
1758                         DRV_LOG(INFO, "PCI information matches for"
1759                                       " slave %d bonding device \"%s\"",
1760                                       bd, ibv_list[ret]->name);
1761                         ibv_match[nd++] = ibv_list[ret];
1762                         break;
1763                 }
1764                 if (mlx5_dev_to_pci_addr
1765                         (ibv_list[ret]->ibdev_path, &pci_addr))
1766                         continue;
1767                 if (pci_dev->addr.domain != pci_addr.domain ||
1768                     pci_dev->addr.bus != pci_addr.bus ||
1769                     pci_dev->addr.devid != pci_addr.devid ||
1770                     pci_dev->addr.function != pci_addr.function)
1771                         continue;
1772                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1773                         ibv_list[ret]->name);
1774                 ibv_match[nd++] = ibv_list[ret];
1775         }
1776         ibv_match[nd] = NULL;
1777         if (!nd) {
1778                 /* No device matches, just complain and bail out. */
1779                 DRV_LOG(WARNING,
1780                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
1781                         " are kernel drivers loaded?",
1782                         pci_dev->addr.domain, pci_dev->addr.bus,
1783                         pci_dev->addr.devid, pci_dev->addr.function);
1784                 rte_errno = ENOENT;
1785                 ret = -rte_errno;
1786                 goto exit;
1787         }
1788         if (nd == 1) {
1789                 /*
1790                  * Found single matching device may have multiple ports.
1791                  * Each port may be representor, we have to check the port
1792                  * number and check the representors existence.
1793                  */
1794                 if (nl_rdma >= 0)
1795                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1796                 if (!np)
1797                         DRV_LOG(WARNING, "can not get IB device \"%s\""
1798                                          " ports number", ibv_match[0]->name);
1799                 if (bd >= 0 && !np) {
1800                         DRV_LOG(ERR, "can not get ports"
1801                                      " for bonding device");
1802                         rte_errno = ENOENT;
1803                         ret = -rte_errno;
1804                         goto exit;
1805                 }
1806         }
1807 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
1808         if (bd >= 0) {
1809                 /*
1810                  * This may happen if there is VF LAG kernel support and
1811                  * application is compiled with older rdma_core library.
1812                  */
1813                 DRV_LOG(ERR,
1814                         "No kernel/verbs support for VF LAG bonding found.");
1815                 rte_errno = ENOTSUP;
1816                 ret = -rte_errno;
1817                 goto exit;
1818         }
1819 #endif
1820         /*
1821          * Now we can determine the maximal
1822          * amount of devices to be spawned.
1823          */
1824         list = mlx5_malloc(MLX5_MEM_ZERO,
1825                            sizeof(struct mlx5_dev_spawn_data) *
1826                            (np ? np : nd),
1827                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1828         if (!list) {
1829                 DRV_LOG(ERR, "spawn data array allocation failure");
1830                 rte_errno = ENOMEM;
1831                 ret = -rte_errno;
1832                 goto exit;
1833         }
1834         if (bd >= 0 || np > 1) {
1835                 /*
1836                  * Single IB device with multiple ports found,
1837                  * it may be E-Switch master device and representors.
1838                  * We have to perform identification through the ports.
1839                  */
1840                 MLX5_ASSERT(nl_rdma >= 0);
1841                 MLX5_ASSERT(ns == 0);
1842                 MLX5_ASSERT(nd == 1);
1843                 MLX5_ASSERT(np);
1844                 for (i = 1; i <= np; ++i) {
1845                         list[ns].max_port = np;
1846                         list[ns].phys_port = i;
1847                         list[ns].phys_dev = ibv_match[0];
1848                         list[ns].eth_dev = NULL;
1849                         list[ns].pci_dev = pci_dev;
1850                         list[ns].pf_bond = bd;
1851                         list[ns].ifindex = mlx5_nl_ifindex
1852                                 (nl_rdma,
1853                                 mlx5_os_get_dev_device_name
1854                                                 (list[ns].phys_dev), i);
1855                         if (!list[ns].ifindex) {
1856                                 /*
1857                                  * No network interface index found for the
1858                                  * specified port, it means there is no
1859                                  * representor on this port. It's OK,
1860                                  * there can be disabled ports, for example
1861                                  * if sriov_numvfs < sriov_totalvfs.
1862                                  */
1863                                 continue;
1864                         }
1865                         ret = -1;
1866                         if (nl_route >= 0)
1867                                 ret = mlx5_nl_switch_info
1868                                                (nl_route,
1869                                                 list[ns].ifindex,
1870                                                 &list[ns].info);
1871                         if (ret || (!list[ns].info.representor &&
1872                                     !list[ns].info.master)) {
1873                                 /*
1874                                  * We failed to recognize representors with
1875                                  * Netlink, let's try to perform the task
1876                                  * with sysfs.
1877                                  */
1878                                 ret =  mlx5_sysfs_switch_info
1879                                                 (list[ns].ifindex,
1880                                                  &list[ns].info);
1881                         }
1882                         if (!ret && bd >= 0) {
1883                                 switch (list[ns].info.name_type) {
1884                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
1885                                         if (list[ns].info.port_name == bd)
1886                                                 ns++;
1887                                         break;
1888                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
1889                                         /* Fallthrough */
1890                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
1891                                         if (list[ns].info.pf_num == bd)
1892                                                 ns++;
1893                                         break;
1894                                 default:
1895                                         break;
1896                                 }
1897                                 continue;
1898                         }
1899                         if (!ret && (list[ns].info.representor ^
1900                                      list[ns].info.master))
1901                                 ns++;
1902                 }
1903                 if (!ns) {
1904                         DRV_LOG(ERR,
1905                                 "unable to recognize master/representors"
1906                                 " on the IB device with multiple ports");
1907                         rte_errno = ENOENT;
1908                         ret = -rte_errno;
1909                         goto exit;
1910                 }
1911         } else {
1912                 /*
1913                  * The existence of several matching entries (nd > 1) means
1914                  * port representors have been instantiated. No existing Verbs
1915                  * call nor sysfs entries can tell them apart, this can only
1916                  * be done through Netlink calls assuming kernel drivers are
1917                  * recent enough to support them.
1918                  *
1919                  * In the event of identification failure through Netlink,
1920                  * try again through sysfs, then:
1921                  *
1922                  * 1. A single IB device matches (nd == 1) with single
1923                  *    port (np=0/1) and is not a representor, assume
1924                  *    no switch support.
1925                  *
1926                  * 2. Otherwise no safe assumptions can be made;
1927                  *    complain louder and bail out.
1928                  */
1929                 for (i = 0; i != nd; ++i) {
1930                         memset(&list[ns].info, 0, sizeof(list[ns].info));
1931                         list[ns].max_port = 1;
1932                         list[ns].phys_port = 1;
1933                         list[ns].phys_dev = ibv_match[i];
1934                         list[ns].eth_dev = NULL;
1935                         list[ns].pci_dev = pci_dev;
1936                         list[ns].pf_bond = -1;
1937                         list[ns].ifindex = 0;
1938                         if (nl_rdma >= 0)
1939                                 list[ns].ifindex = mlx5_nl_ifindex
1940                                 (nl_rdma,
1941                                 mlx5_os_get_dev_device_name
1942                                                 (list[ns].phys_dev), 1);
1943                         if (!list[ns].ifindex) {
1944                                 char ifname[IF_NAMESIZE];
1945
1946                                 /*
1947                                  * Netlink failed, it may happen with old
1948                                  * ib_core kernel driver (before 4.16).
1949                                  * We can assume there is old driver because
1950                                  * here we are processing single ports IB
1951                                  * devices. Let's try sysfs to retrieve
1952                                  * the ifindex. The method works for
1953                                  * master device only.
1954                                  */
1955                                 if (nd > 1) {
1956                                         /*
1957                                          * Multiple devices found, assume
1958                                          * representors, can not distinguish
1959                                          * master/representor and retrieve
1960                                          * ifindex via sysfs.
1961                                          */
1962                                         continue;
1963                                 }
1964                                 ret = mlx5_get_ifname_sysfs
1965                                         (ibv_match[i]->ibdev_path, ifname);
1966                                 if (!ret)
1967                                         list[ns].ifindex =
1968                                                 if_nametoindex(ifname);
1969                                 if (!list[ns].ifindex) {
1970                                         /*
1971                                          * No network interface index found
1972                                          * for the specified device, it means
1973                                          * there it is neither representor
1974                                          * nor master.
1975                                          */
1976                                         continue;
1977                                 }
1978                         }
1979                         ret = -1;
1980                         if (nl_route >= 0)
1981                                 ret = mlx5_nl_switch_info
1982                                                (nl_route,
1983                                                 list[ns].ifindex,
1984                                                 &list[ns].info);
1985                         if (ret || (!list[ns].info.representor &&
1986                                     !list[ns].info.master)) {
1987                                 /*
1988                                  * We failed to recognize representors with
1989                                  * Netlink, let's try to perform the task
1990                                  * with sysfs.
1991                                  */
1992                                 ret =  mlx5_sysfs_switch_info
1993                                                 (list[ns].ifindex,
1994                                                  &list[ns].info);
1995                         }
1996                         if (!ret && (list[ns].info.representor ^
1997                                      list[ns].info.master)) {
1998                                 ns++;
1999                         } else if ((nd == 1) &&
2000                                    !list[ns].info.representor &&
2001                                    !list[ns].info.master) {
2002                                 /*
2003                                  * Single IB device with
2004                                  * one physical port and
2005                                  * attached network device.
2006                                  * May be SRIOV is not enabled
2007                                  * or there is no representors.
2008                                  */
2009                                 DRV_LOG(INFO, "no E-Switch support detected");
2010                                 ns++;
2011                                 break;
2012                         }
2013                 }
2014                 if (!ns) {
2015                         DRV_LOG(ERR,
2016                                 "unable to recognize master/representors"
2017                                 " on the multiple IB devices");
2018                         rte_errno = ENOENT;
2019                         ret = -rte_errno;
2020                         goto exit;
2021                 }
2022         }
2023         MLX5_ASSERT(ns);
2024         /*
2025          * Sort list to probe devices in natural order for users convenience
2026          * (i.e. master first, then representors from lowest to highest ID).
2027          */
2028         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2029         /* Device specific configuration. */
2030         switch (pci_dev->id.device_id) {
2031         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2032         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2033         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2034         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2035         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2036         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2037         case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF:
2038                 dev_config_vf = 1;
2039                 break;
2040         default:
2041                 dev_config_vf = 0;
2042                 break;
2043         }
2044         for (i = 0; i != ns; ++i) {
2045                 uint32_t restore;
2046
2047                 /* Default configuration. */
2048                 memset(&dev_config, 0, sizeof(struct mlx5_dev_config));
2049                 dev_config.vf = dev_config_vf;
2050                 dev_config.mps = MLX5_ARG_UNSET;
2051                 dev_config.dbnc = MLX5_ARG_UNSET;
2052                 dev_config.rx_vec_en = 1;
2053                 dev_config.txq_inline_max = MLX5_ARG_UNSET;
2054                 dev_config.txq_inline_min = MLX5_ARG_UNSET;
2055                 dev_config.txq_inline_mpw = MLX5_ARG_UNSET;
2056                 dev_config.txqs_inline = MLX5_ARG_UNSET;
2057                 dev_config.vf_nl_en = 1;
2058                 dev_config.mr_ext_memseg_en = 1;
2059                 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
2060                 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
2061                 dev_config.dv_esw_en = 1;
2062                 dev_config.dv_flow_en = 1;
2063                 dev_config.decap_en = 1;
2064                 dev_config.log_hp_size = MLX5_ARG_UNSET;
2065                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2066                                                  &list[i],
2067                                                  &dev_config);
2068                 if (!list[i].eth_dev) {
2069                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2070                                 break;
2071                         /* Device is disabled or already spawned. Ignore it. */
2072                         continue;
2073                 }
2074                 restore = list[i].eth_dev->data->dev_flags;
2075                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2076                 /* Restore non-PCI flags cleared by the above call. */
2077                 list[i].eth_dev->data->dev_flags |= restore;
2078                 rte_eth_dev_probing_finish(list[i].eth_dev);
2079         }
2080         if (i != ns) {
2081                 DRV_LOG(ERR,
2082                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2083                         " encountering an error: %s",
2084                         pci_dev->addr.domain, pci_dev->addr.bus,
2085                         pci_dev->addr.devid, pci_dev->addr.function,
2086                         strerror(rte_errno));
2087                 ret = -rte_errno;
2088                 /* Roll back. */
2089                 while (i--) {
2090                         if (!list[i].eth_dev)
2091                                 continue;
2092                         mlx5_dev_close(list[i].eth_dev);
2093                         /* mac_addrs must not be freed because in dev_private */
2094                         list[i].eth_dev->data->mac_addrs = NULL;
2095                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2096                 }
2097                 /* Restore original error. */
2098                 rte_errno = -ret;
2099         } else {
2100                 ret = 0;
2101         }
2102 exit:
2103         /*
2104          * Do the routine cleanup:
2105          * - close opened Netlink sockets
2106          * - free allocated spawn data array
2107          * - free the Infiniband device list
2108          */
2109         if (nl_rdma >= 0)
2110                 close(nl_rdma);
2111         if (nl_route >= 0)
2112                 close(nl_route);
2113         if (list)
2114                 mlx5_free(list);
2115         MLX5_ASSERT(ibv_list);
2116         mlx5_glue->free_device_list(ibv_list);
2117         return ret;
2118 }
2119
2120 static int
2121 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
2122 {
2123         char *env;
2124         int value;
2125
2126         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2127         /* Get environment variable to store. */
2128         env = getenv(MLX5_SHUT_UP_BF);
2129         value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
2130         if (config->dbnc == MLX5_ARG_UNSET)
2131                 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
2132         else
2133                 setenv(MLX5_SHUT_UP_BF,
2134                        config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
2135         return value;
2136 }
2137
2138 static void
2139 mlx5_restore_doorbell_mapping_env(int value)
2140 {
2141         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2142         /* Restore the original environment variable state. */
2143         if (value == MLX5_ARG_UNSET)
2144                 unsetenv(MLX5_SHUT_UP_BF);
2145         else
2146                 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
2147 }
2148
2149 /**
2150  * Extract pdn of PD object using DV API.
2151  *
2152  * @param[in] pd
2153  *   Pointer to the verbs PD object.
2154  * @param[out] pdn
2155  *   Pointer to the PD object number variable.
2156  *
2157  * @return
2158  *   0 on success, error value otherwise.
2159  */
2160 int
2161 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
2162 {
2163 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2164         struct mlx5dv_obj obj;
2165         struct mlx5dv_pd pd_info;
2166         int ret = 0;
2167
2168         obj.pd.in = pd;
2169         obj.pd.out = &pd_info;
2170         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
2171         if (ret) {
2172                 DRV_LOG(DEBUG, "Fail to get PD object info");
2173                 return ret;
2174         }
2175         *pdn = pd_info.pdn;
2176         return 0;
2177 #else
2178         (void)pd;
2179         (void)pdn;
2180         return -ENOTSUP;
2181 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
2182 }
2183
2184 /**
2185  * Function API to open IB device.
2186  *
2187  * This function calls the Linux glue APIs to open a device.
2188  *
2189  * @param[in] spawn
2190  *   Pointer to the IB device attributes (name, port, etc).
2191  * @param[out] config
2192  *   Pointer to device configuration structure.
2193  * @param[out] sh
2194  *   Pointer to shared context structure.
2195  *
2196  * @return
2197  *   0 on success, a positive error value otherwise.
2198  */
2199 int
2200 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
2201                      const struct mlx5_dev_config *config,
2202                      struct mlx5_dev_ctx_shared *sh)
2203 {
2204         int dbmap_env;
2205         int err = 0;
2206
2207         sh->numa_node = spawn->pci_dev->device.numa_node;
2208         pthread_mutex_init(&sh->txpp.mutex, NULL);
2209         /*
2210          * Configure environment variable "MLX5_BF_SHUT_UP"
2211          * before the device creation. The rdma_core library
2212          * checks the variable at device creation and
2213          * stores the result internally.
2214          */
2215         dbmap_env = mlx5_config_doorbell_mapping_env(config);
2216         /* Try to open IB device with DV first, then usual Verbs. */
2217         errno = 0;
2218         sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
2219         if (sh->ctx) {
2220                 sh->devx = 1;
2221                 DRV_LOG(DEBUG, "DevX is supported");
2222                 /* The device is created, no need for environment. */
2223                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2224         } else {
2225                 /* The environment variable is still configured. */
2226                 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
2227                 err = errno ? errno : ENODEV;
2228                 /*
2229                  * The environment variable is not needed anymore,
2230                  * all device creation attempts are completed.
2231                  */
2232                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2233                 if (!sh->ctx)
2234                         return err;
2235                 DRV_LOG(DEBUG, "DevX is NOT supported");
2236                 err = 0;
2237         }
2238         return err;
2239 }
2240
2241 /**
2242  * Install shared asynchronous device events handler.
2243  * This function is implemented to support event sharing
2244  * between multiple ports of single IB device.
2245  *
2246  * @param sh
2247  *   Pointer to mlx5_dev_ctx_shared object.
2248  */
2249 void
2250 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2251 {
2252         int ret;
2253         int flags;
2254
2255         sh->intr_handle.fd = -1;
2256         flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
2257         ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
2258                     F_SETFL, flags | O_NONBLOCK);
2259         if (ret) {
2260                 DRV_LOG(INFO, "failed to change file descriptor async event"
2261                         " queue");
2262         } else {
2263                 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
2264                 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2265                 if (rte_intr_callback_register(&sh->intr_handle,
2266                                         mlx5_dev_interrupt_handler, sh)) {
2267                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2268                         sh->intr_handle.fd = -1;
2269                 }
2270         }
2271         if (sh->devx) {
2272 #ifdef HAVE_IBV_DEVX_ASYNC
2273                 sh->intr_handle_devx.fd = -1;
2274                 sh->devx_comp =
2275                         (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
2276                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2277                 if (!devx_comp) {
2278                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2279                         return;
2280                 }
2281                 flags = fcntl(devx_comp->fd, F_GETFL);
2282                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2283                 if (ret) {
2284                         DRV_LOG(INFO, "failed to change file descriptor"
2285                                 " devx comp");
2286                         return;
2287                 }
2288                 sh->intr_handle_devx.fd = devx_comp->fd;
2289                 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2290                 if (rte_intr_callback_register(&sh->intr_handle_devx,
2291                                         mlx5_dev_interrupt_handler_devx, sh)) {
2292                         DRV_LOG(INFO, "Fail to install the devx shared"
2293                                 " interrupt.");
2294                         sh->intr_handle_devx.fd = -1;
2295                 }
2296 #endif /* HAVE_IBV_DEVX_ASYNC */
2297         }
2298 }
2299
2300 /**
2301  * Uninstall shared asynchronous device events handler.
2302  * This function is implemented to support event sharing
2303  * between multiple ports of single IB device.
2304  *
2305  * @param dev
2306  *   Pointer to mlx5_dev_ctx_shared object.
2307  */
2308 void
2309 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2310 {
2311         if (sh->intr_handle.fd >= 0)
2312                 mlx5_intr_callback_unregister(&sh->intr_handle,
2313                                               mlx5_dev_interrupt_handler, sh);
2314 #ifdef HAVE_IBV_DEVX_ASYNC
2315         if (sh->intr_handle_devx.fd >= 0)
2316                 rte_intr_callback_unregister(&sh->intr_handle_devx,
2317                                   mlx5_dev_interrupt_handler_devx, sh);
2318         if (sh->devx_comp)
2319                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2320 #endif
2321 }
2322
2323 /**
2324  * Read statistics by a named counter.
2325  *
2326  * @param[in] priv
2327  *   Pointer to the private device data structure.
2328  * @param[in] ctr_name
2329  *   Pointer to the name of the statistic counter to read
2330  * @param[out] stat
2331  *   Pointer to read statistic value.
2332  * @return
2333  *   0 on success and stat is valud, 1 if failed to read the value
2334  *   rte_errno is set.
2335  *
2336  */
2337 int
2338 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2339                       uint64_t *stat)
2340 {
2341         int fd;
2342
2343         if (priv->sh) {
2344                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2345                       priv->sh->ibdev_path,
2346                       priv->dev_port,
2347                       ctr_name);
2348                 fd = open(path, O_RDONLY);
2349                 /*
2350                  * in switchdev the file location is not per port
2351                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2352                  */
2353                 if (fd == -1) {
2354                         MKSTR(path1, "%s/hw_counters/%s",
2355                               priv->sh->ibdev_path,
2356                               ctr_name);
2357                         fd = open(path1, O_RDONLY);
2358                 }
2359                 if (fd != -1) {
2360                         char buf[21] = {'\0'};
2361                         ssize_t n = read(fd, buf, sizeof(buf));
2362
2363                         close(fd);
2364                         if (n != -1) {
2365                                 *stat = strtoull(buf, NULL, 10);
2366                                 return 0;
2367                         }
2368                 }
2369         }
2370         *stat = 0;
2371         return 1;
2372 }
2373
2374 /**
2375  * Set the reg_mr and dereg_mr call backs
2376  *
2377  * @param reg_mr_cb[out]
2378  *   Pointer to reg_mr func
2379  * @param dereg_mr_cb[out]
2380  *   Pointer to dereg_mr func
2381  *
2382  */
2383 void
2384 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2385                       mlx5_dereg_mr_t *dereg_mr_cb)
2386 {
2387         *reg_mr_cb = mlx5_verbs_ops.reg_mr;
2388         *dereg_mr_cb = mlx5_verbs_ops.dereg_mr;
2389 }
2390
2391 /**
2392  * Remove a MAC address from device
2393  *
2394  * @param dev
2395  *   Pointer to Ethernet device structure.
2396  * @param index
2397  *   MAC address index.
2398  */
2399 void
2400 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2401 {
2402         struct mlx5_priv *priv = dev->data->dev_private;
2403         const int vf = priv->config.vf;
2404
2405         if (vf)
2406                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2407                                         mlx5_ifindex(dev), priv->mac_own,
2408                                         &dev->data->mac_addrs[index], index);
2409 }
2410
2411 /**
2412  * Adds a MAC address to the device
2413  *
2414  * @param dev
2415  *   Pointer to Ethernet device structure.
2416  * @param mac_addr
2417  *   MAC address to register.
2418  * @param index
2419  *   MAC address index.
2420  *
2421  * @return
2422  *   0 on success, a negative errno value otherwise
2423  */
2424 int
2425 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2426                      uint32_t index)
2427 {
2428         struct mlx5_priv *priv = dev->data->dev_private;
2429         const int vf = priv->config.vf;
2430         int ret = 0;
2431
2432         if (vf)
2433                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2434                                            mlx5_ifindex(dev), priv->mac_own,
2435                                            mac, index);
2436         return ret;
2437 }
2438
2439 /**
2440  * Modify a VF MAC address
2441  *
2442  * @param priv
2443  *   Pointer to device private data.
2444  * @param mac_addr
2445  *   MAC address to modify into.
2446  * @param iface_idx
2447  *   Net device interface index
2448  * @param vf_index
2449  *   VF index
2450  *
2451  * @return
2452  *   0 on success, a negative errno value otherwise
2453  */
2454 int
2455 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2456                            unsigned int iface_idx,
2457                            struct rte_ether_addr *mac_addr,
2458                            int vf_index)
2459 {
2460         return mlx5_nl_vf_mac_addr_modify
2461                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2462 }
2463
2464 /**
2465  * Set device promiscuous mode
2466  *
2467  * @param dev
2468  *   Pointer to Ethernet device structure.
2469  * @param enable
2470  *   0 - promiscuous is disabled, otherwise - enabled
2471  *
2472  * @return
2473  *   0 on success, a negative error value otherwise
2474  */
2475 int
2476 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2477 {
2478         struct mlx5_priv *priv = dev->data->dev_private;
2479
2480         return mlx5_nl_promisc(priv->nl_socket_route,
2481                                mlx5_ifindex(dev), !!enable);
2482 }
2483
2484 /**
2485  * Set device promiscuous mode
2486  *
2487  * @param dev
2488  *   Pointer to Ethernet device structure.
2489  * @param enable
2490  *   0 - all multicase is disabled, otherwise - enabled
2491  *
2492  * @return
2493  *   0 on success, a negative error value otherwise
2494  */
2495 int
2496 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2497 {
2498         struct mlx5_priv *priv = dev->data->dev_private;
2499
2500         return mlx5_nl_allmulti(priv->nl_socket_route,
2501                                 mlx5_ifindex(dev), !!enable);
2502 }
2503
2504 /**
2505  * Flush device MAC addresses
2506  *
2507  * @param dev
2508  *   Pointer to Ethernet device structure.
2509  *
2510  */
2511 void
2512 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2513 {
2514         struct mlx5_priv *priv = dev->data->dev_private;
2515
2516         mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2517                                dev->data->mac_addrs,
2518                                MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2519 }
2520
2521 const struct eth_dev_ops mlx5_os_dev_ops = {
2522         .dev_configure = mlx5_dev_configure,
2523         .dev_start = mlx5_dev_start,
2524         .dev_stop = mlx5_dev_stop,
2525         .dev_set_link_down = mlx5_set_link_down,
2526         .dev_set_link_up = mlx5_set_link_up,
2527         .dev_close = mlx5_dev_close,
2528         .promiscuous_enable = mlx5_promiscuous_enable,
2529         .promiscuous_disable = mlx5_promiscuous_disable,
2530         .allmulticast_enable = mlx5_allmulticast_enable,
2531         .allmulticast_disable = mlx5_allmulticast_disable,
2532         .link_update = mlx5_link_update,
2533         .stats_get = mlx5_stats_get,
2534         .stats_reset = mlx5_stats_reset,
2535         .xstats_get = mlx5_xstats_get,
2536         .xstats_reset = mlx5_xstats_reset,
2537         .xstats_get_names = mlx5_xstats_get_names,
2538         .fw_version_get = mlx5_fw_version_get,
2539         .dev_infos_get = mlx5_dev_infos_get,
2540         .read_clock = mlx5_txpp_read_clock,
2541         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2542         .vlan_filter_set = mlx5_vlan_filter_set,
2543         .rx_queue_setup = mlx5_rx_queue_setup,
2544         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2545         .tx_queue_setup = mlx5_tx_queue_setup,
2546         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2547         .rx_queue_release = mlx5_rx_queue_release,
2548         .tx_queue_release = mlx5_tx_queue_release,
2549         .rx_queue_start = mlx5_rx_queue_start,
2550         .rx_queue_stop = mlx5_rx_queue_stop,
2551         .tx_queue_start = mlx5_tx_queue_start,
2552         .tx_queue_stop = mlx5_tx_queue_stop,
2553         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2554         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2555         .mac_addr_remove = mlx5_mac_addr_remove,
2556         .mac_addr_add = mlx5_mac_addr_add,
2557         .mac_addr_set = mlx5_mac_addr_set,
2558         .set_mc_addr_list = mlx5_set_mc_addr_list,
2559         .mtu_set = mlx5_dev_set_mtu,
2560         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2561         .vlan_offload_set = mlx5_vlan_offload_set,
2562         .reta_update = mlx5_dev_rss_reta_update,
2563         .reta_query = mlx5_dev_rss_reta_query,
2564         .rss_hash_update = mlx5_rss_hash_update,
2565         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
2566         .filter_ctrl = mlx5_dev_filter_ctrl,
2567         .rxq_info_get = mlx5_rxq_info_get,
2568         .txq_info_get = mlx5_txq_info_get,
2569         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2570         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2571         .rx_queue_intr_enable = mlx5_rx_intr_enable,
2572         .rx_queue_intr_disable = mlx5_rx_intr_disable,
2573         .is_removed = mlx5_is_removed,
2574         .udp_tunnel_port_add  = mlx5_udp_tunnel_port_add,
2575         .get_module_info = mlx5_get_module_info,
2576         .get_module_eeprom = mlx5_get_module_eeprom,
2577         .hairpin_cap_get = mlx5_hairpin_cap_get,
2578         .mtr_ops_get = mlx5_flow_meter_ops_get,
2579         .hairpin_bind = mlx5_hairpin_bind,
2580         .hairpin_unbind = mlx5_hairpin_unbind,
2581         .hairpin_get_peer_ports = mlx5_hairpin_get_peer_ports,
2582         .hairpin_queue_peer_update = mlx5_hairpin_queue_peer_update,
2583         .hairpin_queue_peer_bind = mlx5_hairpin_queue_peer_bind,
2584         .hairpin_queue_peer_unbind = mlx5_hairpin_queue_peer_unbind,
2585 };
2586
2587 /* Available operations from secondary process. */
2588 const struct eth_dev_ops mlx5_os_dev_sec_ops = {
2589         .stats_get = mlx5_stats_get,
2590         .stats_reset = mlx5_stats_reset,
2591         .xstats_get = mlx5_xstats_get,
2592         .xstats_reset = mlx5_xstats_reset,
2593         .xstats_get_names = mlx5_xstats_get_names,
2594         .fw_version_get = mlx5_fw_version_get,
2595         .dev_infos_get = mlx5_dev_infos_get,
2596         .read_clock = mlx5_txpp_read_clock,
2597         .rx_queue_start = mlx5_rx_queue_start,
2598         .rx_queue_stop = mlx5_rx_queue_stop,
2599         .tx_queue_start = mlx5_tx_queue_start,
2600         .tx_queue_stop = mlx5_tx_queue_stop,
2601         .rxq_info_get = mlx5_rxq_info_get,
2602         .txq_info_get = mlx5_txq_info_get,
2603         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2604         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2605         .get_module_info = mlx5_get_module_info,
2606         .get_module_eeprom = mlx5_get_module_eeprom,
2607 };
2608
2609 /* Available operations in flow isolated mode. */
2610 const struct eth_dev_ops mlx5_os_dev_ops_isolate = {
2611         .dev_configure = mlx5_dev_configure,
2612         .dev_start = mlx5_dev_start,
2613         .dev_stop = mlx5_dev_stop,
2614         .dev_set_link_down = mlx5_set_link_down,
2615         .dev_set_link_up = mlx5_set_link_up,
2616         .dev_close = mlx5_dev_close,
2617         .promiscuous_enable = mlx5_promiscuous_enable,
2618         .promiscuous_disable = mlx5_promiscuous_disable,
2619         .allmulticast_enable = mlx5_allmulticast_enable,
2620         .allmulticast_disable = mlx5_allmulticast_disable,
2621         .link_update = mlx5_link_update,
2622         .stats_get = mlx5_stats_get,
2623         .stats_reset = mlx5_stats_reset,
2624         .xstats_get = mlx5_xstats_get,
2625         .xstats_reset = mlx5_xstats_reset,
2626         .xstats_get_names = mlx5_xstats_get_names,
2627         .fw_version_get = mlx5_fw_version_get,
2628         .dev_infos_get = mlx5_dev_infos_get,
2629         .read_clock = mlx5_txpp_read_clock,
2630         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2631         .vlan_filter_set = mlx5_vlan_filter_set,
2632         .rx_queue_setup = mlx5_rx_queue_setup,
2633         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2634         .tx_queue_setup = mlx5_tx_queue_setup,
2635         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2636         .rx_queue_release = mlx5_rx_queue_release,
2637         .tx_queue_release = mlx5_tx_queue_release,
2638         .rx_queue_start = mlx5_rx_queue_start,
2639         .rx_queue_stop = mlx5_rx_queue_stop,
2640         .tx_queue_start = mlx5_tx_queue_start,
2641         .tx_queue_stop = mlx5_tx_queue_stop,
2642         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2643         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2644         .mac_addr_remove = mlx5_mac_addr_remove,
2645         .mac_addr_add = mlx5_mac_addr_add,
2646         .mac_addr_set = mlx5_mac_addr_set,
2647         .set_mc_addr_list = mlx5_set_mc_addr_list,
2648         .mtu_set = mlx5_dev_set_mtu,
2649         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2650         .vlan_offload_set = mlx5_vlan_offload_set,
2651         .filter_ctrl = mlx5_dev_filter_ctrl,
2652         .rxq_info_get = mlx5_rxq_info_get,
2653         .txq_info_get = mlx5_txq_info_get,
2654         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2655         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2656         .rx_queue_intr_enable = mlx5_rx_intr_enable,
2657         .rx_queue_intr_disable = mlx5_rx_intr_disable,
2658         .is_removed = mlx5_is_removed,
2659         .get_module_info = mlx5_get_module_info,
2660         .get_module_eeprom = mlx5_get_module_eeprom,
2661         .hairpin_cap_get = mlx5_hairpin_cap_get,
2662         .mtr_ops_get = mlx5_flow_meter_ops_get,
2663         .hairpin_bind = mlx5_hairpin_bind,
2664         .hairpin_unbind = mlx5_hairpin_unbind,
2665         .hairpin_get_peer_ports = mlx5_hairpin_get_peer_ports,
2666         .hairpin_queue_peer_update = mlx5_hairpin_queue_peer_update,
2667         .hairpin_queue_peer_bind = mlx5_hairpin_queue_peer_bind,
2668         .hairpin_queue_peer_unbind = mlx5_hairpin_queue_peer_unbind,
2669 };