drivers/net/mlx5/linux/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2020 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12 #include <net/if.h>
  13 #include <linux/rtnetlink.h>
  14 #include <linux/sockios.h>
  15 #include <linux/ethtool.h>
  16 #include <fcntl.h>
  17
  18 #include <rte_malloc.h>
  19 #include <rte_ethdev_driver.h>
  20 #include <rte_ethdev_pci.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_common.h>
  24 #include <rte_kvargs.h>
  25 #include <rte_rwlock.h>
  26 #include <rte_spinlock.h>
  27 #include <rte_string_fns.h>
  28 #include <rte_alarm.h>
  29 #include <rte_eal_paging.h>
  30
  31 #include <mlx5_glue.h>
  32 #include <mlx5_devx_cmds.h>
  33 #include <mlx5_common.h>
  34 #include <mlx5_common_mp.h>
  35 #include <mlx5_common_mr.h>
  36 #include <mlx5_malloc.h>
  37
  38 #include "mlx5_defs.h"
  39 #include "mlx5.h"
  40 #include "mlx5_common_os.h"
  41 #include "mlx5_utils.h"
  42 #include "mlx5_rxtx.h"
  43 #include "mlx5_autoconf.h"
  44 #include "mlx5_mr.h"
  45 #include "mlx5_flow.h"
  46 #include "rte_pmd_mlx5.h"
  47 #include "mlx5_verbs.h"
  48 #include "mlx5_nl.h"
  49 #include "mlx5_devx.h"
  50
  51 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
  52
  53 #ifndef HAVE_IBV_MLX5_MOD_MPW
  54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
  55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
  56 #endif
  57
  58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
  59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
  60 #endif
  61
  62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  63
  64 /* Spinlock for mlx5_shared_data allocation. */
  65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  66
  67 /* Process local data for secondary processes. */
  68 static struct mlx5_local_data mlx5_local_data;
  69
  70 /**
  71  * Set the completion channel file descriptor interrupt as non-blocking.
  72  *
  73  * @param[in] rxq_obj
  74  *   Pointer to RQ channel object, which includes the channel fd
  75  *
  76  * @param[out] fd
  77  *   The file descriptor (representing the intetrrupt) used in this channel.
  78  *
  79  * @return
  80  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
  81  */
  82 int
  83 mlx5_os_set_nonblock_channel_fd(int fd)
  84 {
  85         int flags;
  86
  87         flags = fcntl(fd, F_GETFL);
  88         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
  89 }
  90
  91 /**
  92  * Get mlx5 device attributes. The glue function query_device_ex() is called
  93  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
  94  * device attributes from the glue out parameter.
  95  *
  96  * @param dev
  97  *   Pointer to ibv context.
  98  *
  99  * @param device_attr
 100  *   Pointer to mlx5 device attributes.
 101  *
 102  * @return
 103  *   0 on success, non zero error number otherwise
 104  */
 105 int
 106 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
 107 {
 108         int err;
 109         struct ibv_device_attr_ex attr_ex;
 110         memset(device_attr, 0, sizeof(*device_attr));
 111         err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
 112         if (err)
 113                 return err;
 114
 115         device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
 116         device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
 117         device_attr->max_sge = attr_ex.orig_attr.max_sge;
 118         device_attr->max_cq = attr_ex.orig_attr.max_cq;
 119         device_attr->max_qp = attr_ex.orig_attr.max_qp;
 120         device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
 121         device_attr->max_rwq_indirection_table_size =
 122                 attr_ex.rss_caps.max_rwq_indirection_table_size;
 123         device_attr->max_tso = attr_ex.tso_caps.max_tso;
 124         device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
 125
 126         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 127         err = mlx5_glue->dv_query_device(ctx, &dv_attr);
 128         if (err)
 129                 return err;
 130
 131         device_attr->flags = dv_attr.flags;
 132         device_attr->comp_mask = dv_attr.comp_mask;
 133 #ifdef HAVE_IBV_MLX5_MOD_SWP
 134         device_attr->sw_parsing_offloads =
 135                 dv_attr.sw_parsing_caps.sw_parsing_offloads;
 136 #endif
 137         device_attr->min_single_stride_log_num_of_bytes =
 138                 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
 139         device_attr->max_single_stride_log_num_of_bytes =
 140                 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
 141         device_attr->min_single_wqe_log_num_of_strides =
 142                 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
 143         device_attr->max_single_wqe_log_num_of_strides =
 144                 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
 145         device_attr->stride_supported_qpts =
 146                 dv_attr.striding_rq_caps.supported_qpts;
 147 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 148         device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
 149 #endif
 150
 151         return err;
 152 }
 153
 154 /**
 155  * Verbs callback to allocate a memory. This function should allocate the space
 156  * according to the size provided residing inside a huge page.
 157  * Please note that all allocation must respect the alignment from libmlx5
 158  * (i.e. currently rte_mem_page_size()).
 159  *
 160  * @param[in] size
 161  *   The size in bytes of the memory to allocate.
 162  * @param[in] data
 163  *   A pointer to the callback data.
 164  *
 165  * @return
 166  *   Allocated buffer, NULL otherwise and rte_errno is set.
 167  */
 168 static void *
 169 mlx5_alloc_verbs_buf(size_t size, void *data)
 170 {
 171         struct mlx5_priv *priv = data;
 172         void *ret;
 173         unsigned int socket = SOCKET_ID_ANY;
 174         size_t alignment = rte_mem_page_size();
 175         if (alignment == (size_t)-1) {
 176                 DRV_LOG(ERR, "Failed to get mem page size");
 177                 rte_errno = ENOMEM;
 178                 return NULL;
 179         }
 180
 181         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
 182                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 183
 184                 socket = ctrl->socket;
 185         } else if (priv->verbs_alloc_ctx.type ==
 186                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
 187                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 188
 189                 socket = ctrl->socket;
 190         }
 191         MLX5_ASSERT(data != NULL);
 192         ret = mlx5_malloc(0, size, alignment, socket);
 193         if (!ret && size)
 194                 rte_errno = ENOMEM;
 195         return ret;
 196 }
 197
 198 /**
 199  * Verbs callback to free a memory.
 200  *
 201  * @param[in] ptr
 202  *   A pointer to the memory to free.
 203  * @param[in] data
 204  *   A pointer to the callback data.
 205  */
 206 static void
 207 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 208 {
 209         MLX5_ASSERT(data != NULL);
 210         mlx5_free(ptr);
 211 }
 212
 213 /**
 214  * Initialize DR related data within private structure.
 215  * Routine checks the reference counter and does actual
 216  * resources creation/initialization only if counter is zero.
 217  *
 218  * @param[in] priv
 219  *   Pointer to the private device data structure.
 220  *
 221  * @return
 222  *   Zero on success, positive error code otherwise.
 223  */
 224 static int
 225 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 226 {
 227         struct mlx5_dev_ctx_shared *sh = priv->sh;
 228         char s[MLX5_HLIST_NAMESIZE];
 229         int err = 0;
 230
 231         if (!sh->flow_tbls)
 232                 err = mlx5_alloc_table_hash_list(priv);
 233         else
 234                 DRV_LOG(DEBUG, "sh->flow_tbls[%p] already created, reuse\n",
 235                         (void *)sh->flow_tbls);
 236         if (err)
 237                 return err;
 238         /* Create tags hash list table. */
 239         snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name);
 240         sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE);
 241         if (!sh->tag_table) {
 242                 DRV_LOG(ERR, "tags with hash creation failed.");
 243                 err = ENOMEM;
 244                 goto error;
 245         }
 246         snprintf(s, sizeof(s), "%s_hdr_modify", sh->ibdev_name);
 247         sh->modify_cmds = mlx5_hlist_create(s, MLX5_FLOW_HDR_MODIFY_HTABLE_SZ);
 248         if (!sh->modify_cmds) {
 249                 DRV_LOG(ERR, "hdr modify hash creation failed");
 250                 err = ENOMEM;
 251                 goto error;
 252         }
 253         snprintf(s, sizeof(s), "%s_encaps_decaps", sh->ibdev_name);
 254         sh->encaps_decaps = mlx5_hlist_create(s,
 255                                               MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ);
 256         if (!sh->encaps_decaps) {
 257                 DRV_LOG(ERR, "encap decap hash creation failed");
 258                 err = ENOMEM;
 259                 goto error;
 260         }
 261 #ifdef HAVE_MLX5DV_DR
 262         void *domain;
 263
 264         if (sh->dv_refcnt) {
 265                 /* Shared DV/DR structures is already initialized. */
 266                 sh->dv_refcnt++;
 267                 priv->dr_shared = 1;
 268                 return 0;
 269         }
 270         /* Reference counter is zero, we should initialize structures. */
 271         domain = mlx5_glue->dr_create_domain(sh->ctx,
 272                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 273         if (!domain) {
 274                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 275                 err = errno;
 276                 goto error;
 277         }
 278         sh->rx_domain = domain;
 279         domain = mlx5_glue->dr_create_domain(sh->ctx,
 280                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 281         if (!domain) {
 282                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 283                 err = errno;
 284                 goto error;
 285         }
 286         pthread_mutex_init(&sh->dv_mutex, NULL);
 287         sh->tx_domain = domain;
 288 #ifdef HAVE_MLX5DV_DR_ESWITCH
 289         if (priv->config.dv_esw_en) {
 290                 domain  = mlx5_glue->dr_create_domain
 291                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 292                 if (!domain) {
 293                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 294                         err = errno;
 295                         goto error;
 296                 }
 297                 sh->fdb_domain = domain;
 298                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 299         }
 300 #endif
 301         if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
 302                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
 303                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
 304                 if (sh->fdb_domain)
 305                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
 306         }
 307         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 308 #endif /* HAVE_MLX5DV_DR */
 309         sh->dv_refcnt++;
 310         priv->dr_shared = 1;
 311         return 0;
 312 error:
 313         /* Rollback the created objects. */
 314         if (sh->rx_domain) {
 315                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 316                 sh->rx_domain = NULL;
 317         }
 318         if (sh->tx_domain) {
 319                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 320                 sh->tx_domain = NULL;
 321         }
 322         if (sh->fdb_domain) {
 323                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 324                 sh->fdb_domain = NULL;
 325         }
 326         if (sh->esw_drop_action) {
 327                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 328                 sh->esw_drop_action = NULL;
 329         }
 330         if (sh->pop_vlan_action) {
 331                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 332                 sh->pop_vlan_action = NULL;
 333         }
 334         if (sh->encaps_decaps) {
 335                 mlx5_hlist_destroy(sh->encaps_decaps, NULL, NULL);
 336                 sh->encaps_decaps = NULL;
 337         }
 338         if (sh->modify_cmds) {
 339                 mlx5_hlist_destroy(sh->modify_cmds, NULL, NULL);
 340                 sh->modify_cmds = NULL;
 341         }
 342         if (sh->tag_table) {
 343                 /* tags should be destroyed with flow before. */
 344                 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
 345                 sh->tag_table = NULL;
 346         }
 347         mlx5_free_table_hash_list(priv);
 348         return err;
 349 }
 350
 351 /**
 352  * Destroy DR related data within private structure.
 353  *
 354  * @param[in] priv
 355  *   Pointer to the private device data structure.
 356  */
 357 void
 358 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 359 {
 360         struct mlx5_dev_ctx_shared *sh;
 361
 362         if (!priv->dr_shared)
 363                 return;
 364         priv->dr_shared = 0;
 365         sh = priv->sh;
 366         MLX5_ASSERT(sh);
 367 #ifdef HAVE_MLX5DV_DR
 368         MLX5_ASSERT(sh->dv_refcnt);
 369         if (sh->dv_refcnt && --sh->dv_refcnt)
 370                 return;
 371         if (sh->rx_domain) {
 372                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 373                 sh->rx_domain = NULL;
 374         }
 375         if (sh->tx_domain) {
 376                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 377                 sh->tx_domain = NULL;
 378         }
 379 #ifdef HAVE_MLX5DV_DR_ESWITCH
 380         if (sh->fdb_domain) {
 381                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 382                 sh->fdb_domain = NULL;
 383         }
 384         if (sh->esw_drop_action) {
 385                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 386                 sh->esw_drop_action = NULL;
 387         }
 388 #endif
 389         if (sh->pop_vlan_action) {
 390                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 391                 sh->pop_vlan_action = NULL;
 392         }
 393         pthread_mutex_destroy(&sh->dv_mutex);
 394 #endif /* HAVE_MLX5DV_DR */
 395         if (sh->encaps_decaps) {
 396                 mlx5_hlist_destroy(sh->encaps_decaps, NULL, NULL);
 397                 sh->encaps_decaps = NULL;
 398         }
 399         if (sh->modify_cmds) {
 400                 mlx5_hlist_destroy(sh->modify_cmds, NULL, NULL);
 401                 sh->modify_cmds = NULL;
 402         }
 403         if (sh->tag_table) {
 404                 /* tags should be destroyed with flow before. */
 405                 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
 406                 sh->tag_table = NULL;
 407         }
 408         mlx5_free_table_hash_list(priv);
 409 }
 410
 411 /**
 412  * Initialize shared data between primary and secondary process.
 413  *
 414  * A memzone is reserved by primary process and secondary processes attach to
 415  * the memzone.
 416  *
 417  * @return
 418  *   0 on success, a negative errno value otherwise and rte_errno is set.
 419  */
 420 static int
 421 mlx5_init_shared_data(void)
 422 {
 423         const struct rte_memzone *mz;
 424         int ret = 0;
 425
 426         rte_spinlock_lock(&mlx5_shared_data_lock);
 427         if (mlx5_shared_data == NULL) {
 428                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 429                         /* Allocate shared memory. */
 430                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 431                                                  sizeof(*mlx5_shared_data),
 432                                                  SOCKET_ID_ANY, 0);
 433                         if (mz == NULL) {
 434                                 DRV_LOG(ERR,
 435                                         "Cannot allocate mlx5 shared data");
 436                                 ret = -rte_errno;
 437                                 goto error;
 438                         }
 439                         mlx5_shared_data = mz->addr;
 440                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 441                         rte_spinlock_init(&mlx5_shared_data->lock);
 442                 } else {
 443                         /* Lookup allocated shared memory. */
 444                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 445                         if (mz == NULL) {
 446                                 DRV_LOG(ERR,
 447                                         "Cannot attach mlx5 shared data");
 448                                 ret = -rte_errno;
 449                                 goto error;
 450                         }
 451                         mlx5_shared_data = mz->addr;
 452                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 453                 }
 454         }
 455 error:
 456         rte_spinlock_unlock(&mlx5_shared_data_lock);
 457         return ret;
 458 }
 459
 460 /**
 461  * PMD global initialization.
 462  *
 463  * Independent from individual device, this function initializes global
 464  * per-PMD data structures distinguishing primary and secondary processes.
 465  * Hence, each initialization is called once per a process.
 466  *
 467  * @return
 468  *   0 on success, a negative errno value otherwise and rte_errno is set.
 469  */
 470 static int
 471 mlx5_init_once(void)
 472 {
 473         struct mlx5_shared_data *sd;
 474         struct mlx5_local_data *ld = &mlx5_local_data;
 475         int ret = 0;
 476
 477         if (mlx5_init_shared_data())
 478                 return -rte_errno;
 479         sd = mlx5_shared_data;
 480         MLX5_ASSERT(sd);
 481         rte_spinlock_lock(&sd->lock);
 482         switch (rte_eal_process_type()) {
 483         case RTE_PROC_PRIMARY:
 484                 if (sd->init_done)
 485                         break;
 486                 LIST_INIT(&sd->mem_event_cb_list);
 487                 rte_rwlock_init(&sd->mem_event_rwlock);
 488                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
 489                                                 mlx5_mr_mem_event_cb, NULL);
 490                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
 491                                            mlx5_mp_os_primary_handle);
 492                 if (ret)
 493                         goto out;
 494                 sd->init_done = true;
 495                 break;
 496         case RTE_PROC_SECONDARY:
 497                 if (ld->init_done)
 498                         break;
 499                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
 500                                              mlx5_mp_os_secondary_handle);
 501                 if (ret)
 502                         goto out;
 503                 ++sd->secondary_cnt;
 504                 ld->init_done = true;
 505                 break;
 506         default:
 507                 break;
 508         }
 509 out:
 510         rte_spinlock_unlock(&sd->lock);
 511         return ret;
 512 }
 513
 514 /**
 515  * Create the Tx queue DevX/Verbs object.
 516  *
 517  * @param dev
 518  *   Pointer to Ethernet device.
 519  * @param idx
 520  *   Queue index in DPDK Tx queue array.
 521  *
 522  * @return
 523  *   0 on success, a negative errno value otherwise and rte_errno is set.
 524  */
 525 static int
 526 mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
 527 {
 528         struct mlx5_priv *priv = dev->data->dev_private;
 529         struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
 530         struct mlx5_txq_ctrl *txq_ctrl =
 531                         container_of(txq_data, struct mlx5_txq_ctrl, txq);
 532
 533         if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
 534                 return mlx5_txq_devx_obj_new(dev, idx);
 535 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 536         if (!priv->config.dv_esw_en)
 537                 return mlx5_txq_devx_obj_new(dev, idx);
 538 #endif
 539         return mlx5_txq_ibv_obj_new(dev, idx);
 540 }
 541
 542 /**
 543  * Release an Tx DevX/verbs queue object.
 544  *
 545  * @param txq_obj
 546  *   DevX/Verbs Tx queue object.
 547  */
 548 static void
 549 mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)
 550 {
 551         if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
 552                 mlx5_txq_devx_obj_release(txq_obj);
 553                 return;
 554         }
 555 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 556         if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) {
 557                 mlx5_txq_devx_obj_release(txq_obj);
 558                 return;
 559         }
 560 #endif
 561         mlx5_txq_ibv_obj_release(txq_obj);
 562 }
 563
 564 /**
 565  * Spawn an Ethernet device from Verbs information.
 566  *
 567  * @param dpdk_dev
 568  *   Backing DPDK device.
 569  * @param spawn
 570  *   Verbs device parameters (name, port, switch_info) to spawn.
 571  * @param config
 572  *   Device configuration parameters.
 573  *
 574  * @return
 575  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 576  *   is set. The following errors are defined:
 577  *
 578  *   EBUSY: device is not supposed to be spawned.
 579  *   EEXIST: device is already spawned
 580  */
 581 static struct rte_eth_dev *
 582 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 583                struct mlx5_dev_spawn_data *spawn,
 584                struct mlx5_dev_config *config)
 585 {
 586         const struct mlx5_switch_info *switch_info = &spawn->info;
 587         struct mlx5_dev_ctx_shared *sh = NULL;
 588         struct ibv_port_attr port_attr;
 589         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 590         struct rte_eth_dev *eth_dev = NULL;
 591         struct mlx5_priv *priv = NULL;
 592         int err = 0;
 593         unsigned int hw_padding = 0;
 594         unsigned int mps;
 595         unsigned int cqe_comp;
 596         unsigned int cqe_pad = 0;
 597         unsigned int tunnel_en = 0;
 598         unsigned int mpls_en = 0;
 599         unsigned int swp = 0;
 600         unsigned int mprq = 0;
 601         unsigned int mprq_min_stride_size_n = 0;
 602         unsigned int mprq_max_stride_size_n = 0;
 603         unsigned int mprq_min_stride_num_n = 0;
 604         unsigned int mprq_max_stride_num_n = 0;
 605         struct rte_ether_addr mac;
 606         char name[RTE_ETH_NAME_MAX_LEN];
 607         int own_domain_id = 0;
 608         uint16_t port_id;
 609         unsigned int i;
 610 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 611         struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
 612 #endif
 613
 614         /* Determine if this port representor is supposed to be spawned. */
 615         if (switch_info->representor && dpdk_dev->devargs) {
 616                 struct rte_eth_devargs eth_da;
 617
 618                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
 619                 if (err) {
 620                         rte_errno = -err;
 621                         DRV_LOG(ERR, "failed to process device arguments: %s",
 622                                 strerror(rte_errno));
 623                         return NULL;
 624                 }
 625                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
 626                         if (eth_da.representor_ports[i] ==
 627                             (uint16_t)switch_info->port_name)
 628                                 break;
 629                 if (i == eth_da.nb_representor_ports) {
 630                         rte_errno = EBUSY;
 631                         return NULL;
 632                 }
 633         }
 634         /* Build device name. */
 635         if (spawn->pf_bond <  0) {
 636                 /* Single device. */
 637                 if (!switch_info->representor)
 638                         strlcpy(name, dpdk_dev->name, sizeof(name));
 639                 else
 640                         snprintf(name, sizeof(name), "%s_representor_%u",
 641                                  dpdk_dev->name, switch_info->port_name);
 642         } else {
 643                 /* Bonding device. */
 644                 if (!switch_info->representor)
 645                         snprintf(name, sizeof(name), "%s_%s",
 646                                  dpdk_dev->name,
 647                                  mlx5_os_get_dev_device_name(spawn->phys_dev));
 648                 else
 649                         snprintf(name, sizeof(name), "%s_%s_representor_%u",
 650                                  dpdk_dev->name,
 651                                  mlx5_os_get_dev_device_name(spawn->phys_dev),
 652                                  switch_info->port_name);
 653         }
 654         /* check if the device is already spawned */
 655         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 656                 rte_errno = EEXIST;
 657                 return NULL;
 658         }
 659         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 660         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 661                 struct mlx5_mp_id mp_id;
 662
 663                 eth_dev = rte_eth_dev_attach_secondary(name);
 664                 if (eth_dev == NULL) {
 665                         DRV_LOG(ERR, "can not attach rte ethdev");
 666                         rte_errno = ENOMEM;
 667                         return NULL;
 668                 }
 669                 eth_dev->device = dpdk_dev;
 670                 eth_dev->dev_ops = &mlx5_os_dev_sec_ops;
 671                 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
 672                 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
 673                 err = mlx5_proc_priv_init(eth_dev);
 674                 if (err)
 675                         return NULL;
 676                 mp_id.port_id = eth_dev->data->port_id;
 677                 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 678                 /* Receive command fd from primary process */
 679                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
 680                 if (err < 0)
 681                         goto err_secondary;
 682                 /* Remap UAR for Tx queues. */
 683                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
 684                 if (err)
 685                         goto err_secondary;
 686                 /*
 687                  * Ethdev pointer is still required as input since
 688                  * the primary device is not accessible from the
 689                  * secondary process.
 690                  */
 691                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
 692                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
 693                 return eth_dev;
 694 err_secondary:
 695                 mlx5_dev_close(eth_dev);
 696                 return NULL;
 697         }
 698         /*
 699          * Some parameters ("tx_db_nc" in particularly) are needed in
 700          * advance to create dv/verbs device context. We proceed the
 701          * devargs here to get ones, and later proceed devargs again
 702          * to override some hardware settings.
 703          */
 704         err = mlx5_args(config, dpdk_dev->devargs);
 705         if (err) {
 706                 err = rte_errno;
 707                 DRV_LOG(ERR, "failed to process device arguments: %s",
 708                         strerror(rte_errno));
 709                 goto error;
 710         }
 711         mlx5_malloc_mem_select(config->sys_mem_en);
 712         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
 713         if (!sh)
 714                 return NULL;
 715         config->devx = sh->devx;
 716 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
 717         config->dest_tir = 1;
 718 #endif
 719 #ifdef HAVE_IBV_MLX5_MOD_SWP
 720         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
 721 #endif
 722         /*
 723          * Multi-packet send is supported by ConnectX-4 Lx PF as well
 724          * as all ConnectX-5 devices.
 725          */
 726 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 727         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
 728 #endif
 729 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 730         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
 731 #endif
 732         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
 733         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
 734                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
 735                         DRV_LOG(DEBUG, "enhanced MPW is supported");
 736                         mps = MLX5_MPW_ENHANCED;
 737                 } else {
 738                         DRV_LOG(DEBUG, "MPW is supported");
 739                         mps = MLX5_MPW;
 740                 }
 741         } else {
 742                 DRV_LOG(DEBUG, "MPW isn't supported");
 743                 mps = MLX5_MPW_DISABLED;
 744         }
 745 #ifdef HAVE_IBV_MLX5_MOD_SWP
 746         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
 747                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
 748         DRV_LOG(DEBUG, "SWP support: %u", swp);
 749 #endif
 750         config->swp = !!swp;
 751 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 752         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
 753                 struct mlx5dv_striding_rq_caps mprq_caps =
 754                         dv_attr.striding_rq_caps;
 755
 756                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
 757                         mprq_caps.min_single_stride_log_num_of_bytes);
 758                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
 759                         mprq_caps.max_single_stride_log_num_of_bytes);
 760                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
 761                         mprq_caps.min_single_wqe_log_num_of_strides);
 762                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
 763                         mprq_caps.max_single_wqe_log_num_of_strides);
 764                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
 765                         mprq_caps.supported_qpts);
 766                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
 767                 mprq = 1;
 768                 mprq_min_stride_size_n =
 769                         mprq_caps.min_single_stride_log_num_of_bytes;
 770                 mprq_max_stride_size_n =
 771                         mprq_caps.max_single_stride_log_num_of_bytes;
 772                 mprq_min_stride_num_n =
 773                         mprq_caps.min_single_wqe_log_num_of_strides;
 774                 mprq_max_stride_num_n =
 775                         mprq_caps.max_single_wqe_log_num_of_strides;
 776         }
 777 #endif
 778         if (RTE_CACHE_LINE_SIZE == 128 &&
 779             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
 780                 cqe_comp = 0;
 781         else
 782                 cqe_comp = 1;
 783         config->cqe_comp = cqe_comp;
 784 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
 785         /* Whether device supports 128B Rx CQE padding. */
 786         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
 787                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
 788 #endif
 789 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 790         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
 791                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
 792                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
 793                              (dv_attr.tunnel_offloads_caps &
 794                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
 795                              (dv_attr.tunnel_offloads_caps &
 796                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
 797         }
 798         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
 799                 tunnel_en ? "" : "not ");
 800 #else
 801         DRV_LOG(WARNING,
 802                 "tunnel offloading disabled due to old OFED/rdma-core version");
 803 #endif
 804         config->tunnel_en = tunnel_en;
 805 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
 806         mpls_en = ((dv_attr.tunnel_offloads_caps &
 807                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
 808                    (dv_attr.tunnel_offloads_caps &
 809                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
 810         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
 811                 mpls_en ? "" : "not ");
 812 #else
 813         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
 814                 " old OFED/rdma-core version or firmware configuration");
 815 #endif
 816         config->mpls_en = mpls_en;
 817         /* Check port status. */
 818         err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
 819         if (err) {
 820                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
 821                 goto error;
 822         }
 823         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
 824                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
 825                 err = EINVAL;
 826                 goto error;
 827         }
 828         if (port_attr.state != IBV_PORT_ACTIVE)
 829                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
 830                         mlx5_glue->port_state_str(port_attr.state),
 831                         port_attr.state);
 832         /* Allocate private eth device data. */
 833         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
 834                            sizeof(*priv),
 835                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
 836         if (priv == NULL) {
 837                 DRV_LOG(ERR, "priv allocation failure");
 838                 err = ENOMEM;
 839                 goto error;
 840         }
 841         priv->sh = sh;
 842         priv->dev_port = spawn->phys_port;
 843         priv->pci_dev = spawn->pci_dev;
 844         priv->mtu = RTE_ETHER_MTU;
 845         priv->mp_id.port_id = port_id;
 846         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 847         /* Some internal functions rely on Netlink sockets, open them now. */
 848         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
 849         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
 850         priv->representor = !!switch_info->representor;
 851         priv->master = !!switch_info->master;
 852         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
 853         priv->vport_meta_tag = 0;
 854         priv->vport_meta_mask = 0;
 855         priv->pf_bond = spawn->pf_bond;
 856 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 857         /*
 858          * The DevX port query API is implemented. E-Switch may use
 859          * either vport or reg_c[0] metadata register to match on
 860          * vport index. The engaged part of metadata register is
 861          * defined by mask.
 862          */
 863         if (switch_info->representor || switch_info->master) {
 864                 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
 865                                       MLX5DV_DEVX_PORT_MATCH_REG_C_0;
 866                 err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port,
 867                                                  &devx_port);
 868                 if (err) {
 869                         DRV_LOG(WARNING,
 870                                 "can't query devx port %d on device %s",
 871                                 spawn->phys_port,
 872                                 mlx5_os_get_dev_device_name(spawn->phys_dev));
 873                         devx_port.comp_mask = 0;
 874                 }
 875         }
 876         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
 877                 priv->vport_meta_tag = devx_port.reg_c_0.value;
 878                 priv->vport_meta_mask = devx_port.reg_c_0.mask;
 879                 if (!priv->vport_meta_mask) {
 880                         DRV_LOG(ERR, "vport zero mask for port %d"
 881                                      " on bonding device %s",
 882                                      spawn->phys_port,
 883                                      mlx5_os_get_dev_device_name
 884                                                         (spawn->phys_dev));
 885                         err = ENOTSUP;
 886                         goto error;
 887                 }
 888                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
 889                         DRV_LOG(ERR, "invalid vport tag for port %d"
 890                                      " on bonding device %s",
 891                                      spawn->phys_port,
 892                                      mlx5_os_get_dev_device_name
 893                                                         (spawn->phys_dev));
 894                         err = ENOTSUP;
 895                         goto error;
 896                 }
 897         }
 898         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
 899                 priv->vport_id = devx_port.vport_num;
 900         } else if (spawn->pf_bond >= 0) {
 901                 DRV_LOG(ERR, "can't deduce vport index for port %d"
 902                              " on bonding device %s",
 903                              spawn->phys_port,
 904                              mlx5_os_get_dev_device_name(spawn->phys_dev));
 905                 err = ENOTSUP;
 906                 goto error;
 907         } else {
 908                 /* Suppose vport index in compatible way. */
 909                 priv->vport_id = switch_info->representor ?
 910                                  switch_info->port_name + 1 : -1;
 911         }
 912 #else
 913         /*
 914          * Kernel/rdma_core support single E-Switch per PF configurations
 915          * only and vport_id field contains the vport index for
 916          * associated VF, which is deduced from representor port name.
 917          * For example, let's have the IB device port 10, it has
 918          * attached network device eth0, which has port name attribute
 919          * pf0vf2, we can deduce the VF number as 2, and set vport index
 920          * as 3 (2+1). This assigning schema should be changed if the
 921          * multiple E-Switch instances per PF configurations or/and PCI
 922          * subfunctions are added.
 923          */
 924         priv->vport_id = switch_info->representor ?
 925                          switch_info->port_name + 1 : -1;
 926 #endif
 927         /* representor_id field keeps the unmodified VF index. */
 928         priv->representor_id = switch_info->representor ?
 929                                switch_info->port_name : -1;
 930         /*
 931          * Look for sibling devices in order to reuse their switch domain
 932          * if any, otherwise allocate one.
 933          */
 934         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
 935                 const struct mlx5_priv *opriv =
 936                         rte_eth_devices[port_id].data->dev_private;
 937
 938                 if (!opriv ||
 939                     opriv->sh != priv->sh ||
 940                         opriv->domain_id ==
 941                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
 942                         continue;
 943                 priv->domain_id = opriv->domain_id;
 944                 break;
 945         }
 946         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
 947                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
 948                 if (err) {
 949                         err = rte_errno;
 950                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
 951                                 strerror(rte_errno));
 952                         goto error;
 953                 }
 954                 own_domain_id = 1;
 955         }
 956         /* Override some values set by hardware configuration. */
 957         mlx5_args(config, dpdk_dev->devargs);
 958         err = mlx5_dev_check_sibling_config(priv, config);
 959         if (err)
 960                 goto error;
 961         config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
 962                             IBV_DEVICE_RAW_IP_CSUM);
 963         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
 964                 (config->hw_csum ? "" : "not "));
 965 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
 966         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
 967         DRV_LOG(DEBUG, "counters are not supported");
 968 #endif
 969 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
 970         if (config->dv_flow_en) {
 971                 DRV_LOG(WARNING, "DV flow is not supported");
 972                 config->dv_flow_en = 0;
 973         }
 974 #endif
 975         config->ind_table_max_size =
 976                 sh->device_attr.max_rwq_indirection_table_size;
 977         /*
 978          * Remove this check once DPDK supports larger/variable
 979          * indirection tables.
 980          */
 981         if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
 982                 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
 983         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
 984                 config->ind_table_max_size);
 985         config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
 986                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
 987         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
 988                 (config->hw_vlan_strip ? "" : "not "));
 989         config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
 990                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
 991 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
 992         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
 993 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
 994         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
 995                         IBV_DEVICE_PCI_WRITE_END_PADDING);
 996 #endif
 997         if (config->hw_padding && !hw_padding) {
 998                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
 999                 config->hw_padding = 0;
1000         } else if (config->hw_padding) {
1001                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1002         }
1003         config->tso = (sh->device_attr.max_tso > 0 &&
1004                       (sh->device_attr.tso_supported_qpts &
1005                        (1 << IBV_QPT_RAW_PACKET)));
1006         if (config->tso)
1007                 config->tso_max_payload_sz = sh->device_attr.max_tso;
1008         /*
1009          * MPW is disabled by default, while the Enhanced MPW is enabled
1010          * by default.
1011          */
1012         if (config->mps == MLX5_ARG_UNSET)
1013                 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1014                                                           MLX5_MPW_DISABLED;
1015         else
1016                 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
1017         DRV_LOG(INFO, "%sMPS is %s",
1018                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1019                 config->mps == MLX5_MPW ? "legacy " : "",
1020                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1021         if (config->cqe_comp && !cqe_comp) {
1022                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1023                 config->cqe_comp = 0;
1024         }
1025         if (config->cqe_pad && !cqe_pad) {
1026                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1027                 config->cqe_pad = 0;
1028         } else if (config->cqe_pad) {
1029                 DRV_LOG(INFO, "Rx CQE padding is enabled");
1030         }
1031         if (config->devx) {
1032                 priv->counter_fallback = 0;
1033                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
1034                 if (err) {
1035                         err = -err;
1036                         goto error;
1037                 }
1038                 if (!config->hca_attr.flow_counters_dump)
1039                         priv->counter_fallback = 1;
1040 #ifndef HAVE_IBV_DEVX_ASYNC
1041                 priv->counter_fallback = 1;
1042 #endif
1043                 if (priv->counter_fallback)
1044                         DRV_LOG(INFO, "Use fall-back DV counter management");
1045                 /* Check for LRO support. */
1046                 if (config->dest_tir && config->hca_attr.lro_cap &&
1047                     config->dv_flow_en) {
1048                         /* TBD check tunnel lro caps. */
1049                         config->lro.supported = config->hca_attr.lro_cap;
1050                         DRV_LOG(DEBUG, "Device supports LRO");
1051                         /*
1052                          * If LRO timeout is not configured by application,
1053                          * use the minimal supported value.
1054                          */
1055                         if (!config->lro.timeout)
1056                                 config->lro.timeout =
1057                                 config->hca_attr.lro_timer_supported_periods[0];
1058                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1059                                 config->lro.timeout);
1060                         DRV_LOG(DEBUG, "LRO minimal size of TCP segment "
1061                                 "required for coalescing is %d bytes",
1062                                 config->hca_attr.lro_min_mss_size);
1063                 }
1064 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
1065                 if (config->hca_attr.qos.sup &&
1066                     config->hca_attr.qos.srtcm_sup &&
1067                     config->dv_flow_en) {
1068                         uint8_t reg_c_mask =
1069                                 config->hca_attr.qos.flow_meter_reg_c_ids;
1070                         /*
1071                          * Meter needs two REG_C's for color match and pre-sfx
1072                          * flow match. Here get the REG_C for color match.
1073                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
1074                          */
1075                         reg_c_mask &= 0xfc;
1076                         if (__builtin_popcount(reg_c_mask) < 1) {
1077                                 priv->mtr_en = 0;
1078                                 DRV_LOG(WARNING, "No available register for"
1079                                         " meter.");
1080                         } else {
1081                                 priv->mtr_color_reg = ffs(reg_c_mask) - 1 +
1082                                                       REG_C_0;
1083                                 priv->mtr_en = 1;
1084                                 priv->mtr_reg_share =
1085                                       config->hca_attr.qos.flow_meter_reg_share;
1086                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1087                                         priv->mtr_color_reg);
1088                         }
1089                 }
1090 #endif
1091 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1092                 if (config->hca_attr.log_max_ft_sampler_num > 0  &&
1093                     config->dv_flow_en) {
1094                         priv->sampler_en = 1;
1095                         DRV_LOG(DEBUG, "The Sampler enabled!\n");
1096                 } else {
1097                         priv->sampler_en = 0;
1098                         if (!config->hca_attr.log_max_ft_sampler_num)
1099                                 DRV_LOG(WARNING, "No available register for"
1100                                                 " Sampler.");
1101                         else
1102                                 DRV_LOG(DEBUG, "DV flow is not supported!\n");
1103                 }
1104 #endif
1105         }
1106         if (config->tx_pp) {
1107                 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1108                         config->hca_attr.dev_freq_khz);
1109                 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1110                         config->hca_attr.qos.packet_pacing ? "" : "not ");
1111                 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1112                         config->hca_attr.cross_channel ? "" : "not ");
1113                 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1114                         config->hca_attr.wqe_index_ignore ? "" : "not ");
1115                 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1116                         config->hca_attr.non_wire_sq ? "" : "not ");
1117                 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1118                         config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1119                         config->hca_attr.log_max_static_sq_wq);
1120                 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1121                         config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1122                 if (!config->devx) {
1123                         DRV_LOG(ERR, "DevX is required for packet pacing");
1124                         err = ENODEV;
1125                         goto error;
1126                 }
1127                 if (!config->hca_attr.qos.packet_pacing) {
1128                         DRV_LOG(ERR, "Packet pacing is not supported");
1129                         err = ENODEV;
1130                         goto error;
1131                 }
1132                 if (!config->hca_attr.cross_channel) {
1133                         DRV_LOG(ERR, "Cross channel operations are"
1134                                      " required for packet pacing");
1135                         err = ENODEV;
1136                         goto error;
1137                 }
1138                 if (!config->hca_attr.wqe_index_ignore) {
1139                         DRV_LOG(ERR, "WQE index ignore feature is"
1140                                      " required for packet pacing");
1141                         err = ENODEV;
1142                         goto error;
1143                 }
1144                 if (!config->hca_attr.non_wire_sq) {
1145                         DRV_LOG(ERR, "Non-wire SQ feature is"
1146                                      " required for packet pacing");
1147                         err = ENODEV;
1148                         goto error;
1149                 }
1150                 if (!config->hca_attr.log_max_static_sq_wq) {
1151                         DRV_LOG(ERR, "Static WQE SQ feature is"
1152                                      " required for packet pacing");
1153                         err = ENODEV;
1154                         goto error;
1155                 }
1156                 if (!config->hca_attr.qos.wqe_rate_pp) {
1157                         DRV_LOG(ERR, "WQE rate mode is required"
1158                                      " for packet pacing");
1159                         err = ENODEV;
1160                         goto error;
1161                 }
1162 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1163                 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1164                              " can't create queues for packet pacing");
1165                 err = ENODEV;
1166                 goto error;
1167 #endif
1168         }
1169         if (config->devx) {
1170                 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1171
1172                 err = config->hca_attr.access_register_user ?
1173                         mlx5_devx_cmd_register_read
1174                                 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1175                                 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1176                 if (!err) {
1177                         uint32_t ts_mode;
1178
1179                         /* MTUTC register is read successfully. */
1180                         ts_mode = MLX5_GET(register_mtutc, reg,
1181                                            time_stamp_mode);
1182                         if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1183                                 config->rt_timestamp = 1;
1184                 } else {
1185                         /* Kernel does not support register reading. */
1186                         if (config->hca_attr.dev_freq_khz ==
1187                                                  (NS_PER_S / MS_PER_S))
1188                                 config->rt_timestamp = 1;
1189                 }
1190         }
1191         /*
1192          * If HW has bug working with tunnel packet decapsulation and
1193          * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1194          * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1195          */
1196         if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1197                 config->hw_fcs_strip = 0;
1198         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1199                 (config->hw_fcs_strip ? "" : "not "));
1200         if (config->mprq.enabled && mprq) {
1201                 if (config->mprq.stride_num_n &&
1202                     (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1203                      config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1204                         config->mprq.stride_num_n =
1205                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1206                                                 mprq_min_stride_num_n),
1207                                         mprq_max_stride_num_n);
1208                         DRV_LOG(WARNING,
1209                                 "the number of strides"
1210                                 " for Multi-Packet RQ is out of range,"
1211                                 " setting default value (%u)",
1212                                 1 << config->mprq.stride_num_n);
1213                 }
1214                 if (config->mprq.stride_size_n &&
1215                     (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1216                      config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1217                         config->mprq.stride_size_n =
1218                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1219                                                 mprq_min_stride_size_n),
1220                                         mprq_max_stride_size_n);
1221                         DRV_LOG(WARNING,
1222                                 "the size of a stride"
1223                                 " for Multi-Packet RQ is out of range,"
1224                                 " setting default value (%u)",
1225                                 1 << config->mprq.stride_size_n);
1226                 }
1227                 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1228                 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1229         } else if (config->mprq.enabled && !mprq) {
1230                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1231                 config->mprq.enabled = 0;
1232         }
1233         if (config->max_dump_files_num == 0)
1234                 config->max_dump_files_num = 128;
1235         eth_dev = rte_eth_dev_allocate(name);
1236         if (eth_dev == NULL) {
1237                 DRV_LOG(ERR, "can not allocate rte ethdev");
1238                 err = ENOMEM;
1239                 goto error;
1240         }
1241         if (priv->representor) {
1242                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1243                 eth_dev->data->representor_id = priv->representor_id;
1244         }
1245         /*
1246          * Store associated network device interface index. This index
1247          * is permanent throughout the lifetime of device. So, we may store
1248          * the ifindex here and use the cached value further.
1249          */
1250         MLX5_ASSERT(spawn->ifindex);
1251         priv->if_index = spawn->ifindex;
1252         if (priv->pf_bond >= 0 && priv->master) {
1253                 /* Get bond interface info */
1254                 err = mlx5_sysfs_bond_info(priv->if_index,
1255                                      &priv->bond_ifindex,
1256                                      priv->bond_name);
1257                 if (err)
1258                         DRV_LOG(ERR, "unable to get bond info: %s",
1259                                 strerror(rte_errno));
1260                 else
1261                         DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
1262                                 priv->if_index, priv->bond_ifindex,
1263                                 priv->bond_name);
1264         }
1265         eth_dev->data->dev_private = priv;
1266         priv->dev_data = eth_dev->data;
1267         eth_dev->data->mac_addrs = priv->mac;
1268         eth_dev->device = dpdk_dev;
1269         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1270         /* Configure the first MAC address by default. */
1271         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1272                 DRV_LOG(ERR,
1273                         "port %u cannot get MAC address, is mlx5_en"
1274                         " loaded? (errno: %s)",
1275                         eth_dev->data->port_id, strerror(rte_errno));
1276                 err = ENODEV;
1277                 goto error;
1278         }
1279         DRV_LOG(INFO,
1280                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1281                 eth_dev->data->port_id,
1282                 mac.addr_bytes[0], mac.addr_bytes[1],
1283                 mac.addr_bytes[2], mac.addr_bytes[3],
1284                 mac.addr_bytes[4], mac.addr_bytes[5]);
1285 #ifdef RTE_LIBRTE_MLX5_DEBUG
1286         {
1287                 char ifname[IF_NAMESIZE];
1288
1289                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1290                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1291                                 eth_dev->data->port_id, ifname);
1292                 else
1293                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1294                                 eth_dev->data->port_id);
1295         }
1296 #endif
1297         /* Get actual MTU if possible. */
1298         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1299         if (err) {
1300                 err = rte_errno;
1301                 goto error;
1302         }
1303         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1304                 priv->mtu);
1305         /* Initialize burst functions to prevent crashes before link-up. */
1306         eth_dev->rx_pkt_burst = removed_rx_burst;
1307         eth_dev->tx_pkt_burst = removed_tx_burst;
1308         eth_dev->dev_ops = &mlx5_os_dev_ops;
1309         eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1310         eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1311         eth_dev->rx_queue_count = mlx5_rx_queue_count;
1312         /* Register MAC address. */
1313         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1314         if (config->vf && config->vf_nl_en)
1315                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1316                                       mlx5_ifindex(eth_dev),
1317                                       eth_dev->data->mac_addrs,
1318                                       MLX5_MAX_MAC_ADDRESSES);
1319         priv->flows = 0;
1320         priv->ctrl_flows = 0;
1321         TAILQ_INIT(&priv->flow_meters);
1322         TAILQ_INIT(&priv->flow_meter_profiles);
1323         /* Hint libmlx5 to use PMD allocator for data plane resources */
1324         mlx5_glue->dv_set_context_attr(sh->ctx,
1325                         MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1326                         (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
1327                                 .alloc = &mlx5_alloc_verbs_buf,
1328                                 .free = &mlx5_free_verbs_buf,
1329                                 .data = priv,
1330                         }));
1331         /* Bring Ethernet device up. */
1332         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1333                 eth_dev->data->port_id);
1334         mlx5_set_link_up(eth_dev);
1335         /*
1336          * Even though the interrupt handler is not installed yet,
1337          * interrupts will still trigger on the async_fd from
1338          * Verbs context returned by ibv_open_device().
1339          */
1340         mlx5_link_update(eth_dev, 0);
1341 #ifdef HAVE_MLX5DV_DR_ESWITCH
1342         if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1343               (switch_info->representor || switch_info->master)))
1344                 config->dv_esw_en = 0;
1345 #else
1346         config->dv_esw_en = 0;
1347 #endif
1348         /* Detect minimal data bytes to inline. */
1349         mlx5_set_min_inline(spawn, config);
1350         /* Store device configuration on private structure. */
1351         priv->config = *config;
1352         /* Create context for virtual machine VLAN workaround. */
1353         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1354         if (config->dv_flow_en) {
1355                 err = mlx5_alloc_shared_dr(priv);
1356                 if (err)
1357                         goto error;
1358                 /*
1359                  * RSS id is shared with meter flow id. Meter flow id can only
1360                  * use the 24 MSB of the register.
1361                  */
1362                 priv->qrss_id_pool = mlx5_flow_id_pool_alloc(UINT32_MAX >>
1363                                      MLX5_MTR_COLOR_BITS);
1364                 if (!priv->qrss_id_pool) {
1365                         DRV_LOG(ERR, "can't create flow id pool");
1366                         err = ENOMEM;
1367                         goto error;
1368                 }
1369         }
1370         if (config->devx && config->dv_flow_en && config->dest_tir) {
1371                 priv->obj_ops = devx_obj_ops;
1372                 priv->obj_ops.drop_action_create =
1373                                                 ibv_obj_ops.drop_action_create;
1374                 priv->obj_ops.drop_action_destroy =
1375                                                 ibv_obj_ops.drop_action_destroy;
1376 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1377                 priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify;
1378 #else
1379                 if (config->dv_esw_en)
1380                         priv->obj_ops.txq_obj_modify =
1381                                                 ibv_obj_ops.txq_obj_modify;
1382 #endif
1383                 /* Use specific wrappers for Tx object. */
1384                 priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;
1385                 priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;
1386
1387         } else {
1388                 priv->obj_ops = ibv_obj_ops;
1389         }
1390         /* Supported Verbs flow priority number detection. */
1391         err = mlx5_flow_discover_priorities(eth_dev);
1392         if (err < 0) {
1393                 err = -err;
1394                 goto error;
1395         }
1396         priv->config.flow_prio = err;
1397         if (!priv->config.dv_esw_en &&
1398             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1399                 DRV_LOG(WARNING, "metadata mode %u is not supported "
1400                                  "(no E-Switch)", priv->config.dv_xmeta_en);
1401                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1402         }
1403         mlx5_set_metadata_mask(eth_dev);
1404         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1405             !priv->sh->dv_regc0_mask) {
1406                 DRV_LOG(ERR, "metadata mode %u is not supported "
1407                              "(no metadata reg_c[0] is available)",
1408                              priv->config.dv_xmeta_en);
1409                         err = ENOTSUP;
1410                         goto error;
1411         }
1412         /*
1413          * Allocate the buffer for flow creating, just once.
1414          * The allocation must be done before any flow creating.
1415          */
1416         mlx5_flow_alloc_intermediate(eth_dev);
1417         /* Query availability of metadata reg_c's. */
1418         err = mlx5_flow_discover_mreg_c(eth_dev);
1419         if (err < 0) {
1420                 err = -err;
1421                 goto error;
1422         }
1423         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1424                 DRV_LOG(DEBUG,
1425                         "port %u extensive metadata register is not supported",
1426                         eth_dev->data->port_id);
1427                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1428                         DRV_LOG(ERR, "metadata mode %u is not supported "
1429                                      "(no metadata registers available)",
1430                                      priv->config.dv_xmeta_en);
1431                         err = ENOTSUP;
1432                         goto error;
1433                 }
1434         }
1435         if (priv->config.dv_flow_en &&
1436             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1437             mlx5_flow_ext_mreg_supported(eth_dev) &&
1438             priv->sh->dv_regc0_mask) {
1439                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1440                                                       MLX5_FLOW_MREG_HTABLE_SZ);
1441                 if (!priv->mreg_cp_tbl) {
1442                         err = ENOMEM;
1443                         goto error;
1444                 }
1445         }
1446         return eth_dev;
1447 error:
1448         if (priv) {
1449                 if (priv->mreg_cp_tbl)
1450                         mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
1451                 if (priv->sh)
1452                         mlx5_os_free_shared_dr(priv);
1453                 if (priv->nl_socket_route >= 0)
1454                         close(priv->nl_socket_route);
1455                 if (priv->nl_socket_rdma >= 0)
1456                         close(priv->nl_socket_rdma);
1457                 if (priv->vmwa_context)
1458                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1459                 if (priv->qrss_id_pool)
1460                         mlx5_flow_id_pool_release(priv->qrss_id_pool);
1461                 if (own_domain_id)
1462                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1463                 mlx5_free(priv);
1464                 if (eth_dev != NULL)
1465                         eth_dev->data->dev_private = NULL;
1466         }
1467         if (eth_dev != NULL) {
1468                 /* mac_addrs must not be freed alone because part of
1469                  * dev_private
1470                  **/
1471                 eth_dev->data->mac_addrs = NULL;
1472                 rte_eth_dev_release_port(eth_dev);
1473         }
1474         if (sh)
1475                 mlx5_free_shared_dev_ctx(sh);
1476         MLX5_ASSERT(err > 0);
1477         rte_errno = err;
1478         return NULL;
1479 }
1480
1481 /**
1482  * Comparison callback to sort device data.
1483  *
1484  * This is meant to be used with qsort().
1485  *
1486  * @param a[in]
1487  *   Pointer to pointer to first data object.
1488  * @param b[in]
1489  *   Pointer to pointer to second data object.
1490  *
1491  * @return
1492  *   0 if both objects are equal, less than 0 if the first argument is less
1493  *   than the second, greater than 0 otherwise.
1494  */
1495 static int
1496 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1497 {
1498         const struct mlx5_switch_info *si_a =
1499                 &((const struct mlx5_dev_spawn_data *)a)->info;
1500         const struct mlx5_switch_info *si_b =
1501                 &((const struct mlx5_dev_spawn_data *)b)->info;
1502         int ret;
1503
1504         /* Master device first. */
1505         ret = si_b->master - si_a->master;
1506         if (ret)
1507                 return ret;
1508         /* Then representor devices. */
1509         ret = si_b->representor - si_a->representor;
1510         if (ret)
1511                 return ret;
1512         /* Unidentified devices come last in no specific order. */
1513         if (!si_a->representor)
1514                 return 0;
1515         /* Order representors by name. */
1516         return si_a->port_name - si_b->port_name;
1517 }
1518
1519 /**
1520  * Match PCI information for possible slaves of bonding device.
1521  *
1522  * @param[in] ibv_dev
1523  *   Pointer to Infiniband device structure.
1524  * @param[in] pci_dev
1525  *   Pointer to PCI device structure to match PCI address.
1526  * @param[in] nl_rdma
1527  *   Netlink RDMA group socket handle.
1528  *
1529  * @return
1530  *   negative value if no bonding device found, otherwise
1531  *   positive index of slave PF in bonding.
1532  */
1533 static int
1534 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1535                            const struct rte_pci_device *pci_dev,
1536                            int nl_rdma)
1537 {
1538         char ifname[IF_NAMESIZE + 1];
1539         unsigned int ifindex;
1540         unsigned int np, i;
1541         FILE *file = NULL;
1542         int pf = -1;
1543
1544         /*
1545          * Try to get master device name. If something goes
1546          * wrong suppose the lack of kernel support and no
1547          * bonding devices.
1548          */
1549         if (nl_rdma < 0)
1550                 return -1;
1551         if (!strstr(ibv_dev->name, "bond"))
1552                 return -1;
1553         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
1554         if (!np)
1555                 return -1;
1556         /*
1557          * The Master device might not be on the predefined
1558          * port (not on port index 1, it is not garanted),
1559          * we have to scan all Infiniband device port and
1560          * find master.
1561          */
1562         for (i = 1; i <= np; ++i) {
1563                 /* Check whether Infiniband port is populated. */
1564                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
1565                 if (!ifindex)
1566                         continue;
1567                 if (!if_indextoname(ifindex, ifname))
1568                         continue;
1569                 /* Try to read bonding slave names from sysfs. */
1570                 MKSTR(slaves,
1571                       "/sys/class/net/%s/master/bonding/slaves", ifname);
1572                 file = fopen(slaves, "r");
1573                 if (file)
1574                         break;
1575         }
1576         if (!file)
1577                 return -1;
1578         /* Use safe format to check maximal buffer length. */
1579         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1580         while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1581                 char tmp_str[IF_NAMESIZE + 32];
1582                 struct rte_pci_addr pci_addr;
1583                 struct mlx5_switch_info info;
1584
1585                 /* Process slave interface names in the loop. */
1586                 snprintf(tmp_str, sizeof(tmp_str),
1587                          "/sys/class/net/%s", ifname);
1588                 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
1589                         DRV_LOG(WARNING, "can not get PCI address"
1590                                          " for netdev \"%s\"", ifname);
1591                         continue;
1592                 }
1593                 if (pci_dev->addr.domain != pci_addr.domain ||
1594                     pci_dev->addr.bus != pci_addr.bus ||
1595                     pci_dev->addr.devid != pci_addr.devid ||
1596                     pci_dev->addr.function != pci_addr.function)
1597                         continue;
1598                 /* Slave interface PCI address match found. */
1599                 fclose(file);
1600                 snprintf(tmp_str, sizeof(tmp_str),
1601                          "/sys/class/net/%s/phys_port_name", ifname);
1602                 file = fopen(tmp_str, "rb");
1603                 if (!file)
1604                         break;
1605                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1606                 if (fscanf(file, "%32s", tmp_str) == 1)
1607                         mlx5_translate_port_name(tmp_str, &info);
1608                 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
1609                     info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1610                         pf = info.port_name;
1611                 break;
1612         }
1613         if (file)
1614                 fclose(file);
1615         return pf;
1616 }
1617
1618 /**
1619  * DPDK callback to register a PCI device.
1620  *
1621  * This function spawns Ethernet devices out of a given PCI device.
1622  *
1623  * @param[in] pci_drv
1624  *   PCI driver structure (mlx5_driver).
1625  * @param[in] pci_dev
1626  *   PCI device information.
1627  *
1628  * @return
1629  *   0 on success, a negative errno value otherwise and rte_errno is set.
1630  */
1631 int
1632 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1633                   struct rte_pci_device *pci_dev)
1634 {
1635         struct ibv_device **ibv_list;
1636         /*
1637          * Number of found IB Devices matching with requested PCI BDF.
1638          * nd != 1 means there are multiple IB devices over the same
1639          * PCI device and we have representors and master.
1640          */
1641         unsigned int nd = 0;
1642         /*
1643          * Number of found IB device Ports. nd = 1 and np = 1..n means
1644          * we have the single multiport IB device, and there may be
1645          * representors attached to some of found ports.
1646          */
1647         unsigned int np = 0;
1648         /*
1649          * Number of DPDK ethernet devices to Spawn - either over
1650          * multiple IB devices or multiple ports of single IB device.
1651          * Actually this is the number of iterations to spawn.
1652          */
1653         unsigned int ns = 0;
1654         /*
1655          * Bonding device
1656          *   < 0 - no bonding device (single one)
1657          *  >= 0 - bonding device (value is slave PF index)
1658          */
1659         int bd = -1;
1660         struct mlx5_dev_spawn_data *list = NULL;
1661         struct mlx5_dev_config dev_config;
1662         unsigned int dev_config_vf;
1663         int ret;
1664
1665         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1666                 mlx5_pmd_socket_init();
1667         ret = mlx5_init_once();
1668         if (ret) {
1669                 DRV_LOG(ERR, "unable to init PMD global data: %s",
1670                         strerror(rte_errno));
1671                 return -rte_errno;
1672         }
1673         errno = 0;
1674         ibv_list = mlx5_glue->get_device_list(&ret);
1675         if (!ibv_list) {
1676                 rte_errno = errno ? errno : ENOSYS;
1677                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1678                 return -rte_errno;
1679         }
1680         /*
1681          * First scan the list of all Infiniband devices to find
1682          * matching ones, gathering into the list.
1683          */
1684         struct ibv_device *ibv_match[ret + 1];
1685         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
1686         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1687         unsigned int i;
1688
1689         while (ret-- > 0) {
1690                 struct rte_pci_addr pci_addr;
1691
1692                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1693                 bd = mlx5_device_bond_pci_match
1694                                 (ibv_list[ret], pci_dev, nl_rdma);
1695                 if (bd >= 0) {
1696                         /*
1697                          * Bonding device detected. Only one match is allowed,
1698                          * the bonding is supported over multi-port IB device,
1699                          * there should be no matches on representor PCI
1700                          * functions or non VF LAG bonding devices with
1701                          * specified address.
1702                          */
1703                         if (nd) {
1704                                 DRV_LOG(ERR,
1705                                         "multiple PCI match on bonding device"
1706                                         "\"%s\" found", ibv_list[ret]->name);
1707                                 rte_errno = ENOENT;
1708                                 ret = -rte_errno;
1709                                 goto exit;
1710                         }
1711                         DRV_LOG(INFO, "PCI information matches for"
1712                                       " slave %d bonding device \"%s\"",
1713                                       bd, ibv_list[ret]->name);
1714                         ibv_match[nd++] = ibv_list[ret];
1715                         break;
1716                 }
1717                 if (mlx5_dev_to_pci_addr
1718                         (ibv_list[ret]->ibdev_path, &pci_addr))
1719                         continue;
1720                 if (pci_dev->addr.domain != pci_addr.domain ||
1721                     pci_dev->addr.bus != pci_addr.bus ||
1722                     pci_dev->addr.devid != pci_addr.devid ||
1723                     pci_dev->addr.function != pci_addr.function)
1724                         continue;
1725                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1726                         ibv_list[ret]->name);
1727                 ibv_match[nd++] = ibv_list[ret];
1728         }
1729         ibv_match[nd] = NULL;
1730         if (!nd) {
1731                 /* No device matches, just complain and bail out. */
1732                 DRV_LOG(WARNING,
1733                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
1734                         " are kernel drivers loaded?",
1735                         pci_dev->addr.domain, pci_dev->addr.bus,
1736                         pci_dev->addr.devid, pci_dev->addr.function);
1737                 rte_errno = ENOENT;
1738                 ret = -rte_errno;
1739                 goto exit;
1740         }
1741         if (nd == 1) {
1742                 /*
1743                  * Found single matching device may have multiple ports.
1744                  * Each port may be representor, we have to check the port
1745                  * number and check the representors existence.
1746                  */
1747                 if (nl_rdma >= 0)
1748                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1749                 if (!np)
1750                         DRV_LOG(WARNING, "can not get IB device \"%s\""
1751                                          " ports number", ibv_match[0]->name);
1752                 if (bd >= 0 && !np) {
1753                         DRV_LOG(ERR, "can not get ports"
1754                                      " for bonding device");
1755                         rte_errno = ENOENT;
1756                         ret = -rte_errno;
1757                         goto exit;
1758                 }
1759         }
1760 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
1761         if (bd >= 0) {
1762                 /*
1763                  * This may happen if there is VF LAG kernel support and
1764                  * application is compiled with older rdma_core library.
1765                  */
1766                 DRV_LOG(ERR,
1767                         "No kernel/verbs support for VF LAG bonding found.");
1768                 rte_errno = ENOTSUP;
1769                 ret = -rte_errno;
1770                 goto exit;
1771         }
1772 #endif
1773         /*
1774          * Now we can determine the maximal
1775          * amount of devices to be spawned.
1776          */
1777         list = mlx5_malloc(MLX5_MEM_ZERO,
1778                            sizeof(struct mlx5_dev_spawn_data) *
1779                            (np ? np : nd),
1780                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1781         if (!list) {
1782                 DRV_LOG(ERR, "spawn data array allocation failure");
1783                 rte_errno = ENOMEM;
1784                 ret = -rte_errno;
1785                 goto exit;
1786         }
1787         if (bd >= 0 || np > 1) {
1788                 /*
1789                  * Single IB device with multiple ports found,
1790                  * it may be E-Switch master device and representors.
1791                  * We have to perform identification through the ports.
1792                  */
1793                 MLX5_ASSERT(nl_rdma >= 0);
1794                 MLX5_ASSERT(ns == 0);
1795                 MLX5_ASSERT(nd == 1);
1796                 MLX5_ASSERT(np);
1797                 for (i = 1; i <= np; ++i) {
1798                         list[ns].max_port = np;
1799                         list[ns].phys_port = i;
1800                         list[ns].phys_dev = ibv_match[0];
1801                         list[ns].eth_dev = NULL;
1802                         list[ns].pci_dev = pci_dev;
1803                         list[ns].pf_bond = bd;
1804                         list[ns].ifindex = mlx5_nl_ifindex
1805                                 (nl_rdma,
1806                                 mlx5_os_get_dev_device_name
1807                                                 (list[ns].phys_dev), i);
1808                         if (!list[ns].ifindex) {
1809                                 /*
1810                                  * No network interface index found for the
1811                                  * specified port, it means there is no
1812                                  * representor on this port. It's OK,
1813                                  * there can be disabled ports, for example
1814                                  * if sriov_numvfs < sriov_totalvfs.
1815                                  */
1816                                 continue;
1817                         }
1818                         ret = -1;
1819                         if (nl_route >= 0)
1820                                 ret = mlx5_nl_switch_info
1821                                                (nl_route,
1822                                                 list[ns].ifindex,
1823                                                 &list[ns].info);
1824                         if (ret || (!list[ns].info.representor &&
1825                                     !list[ns].info.master)) {
1826                                 /*
1827                                  * We failed to recognize representors with
1828                                  * Netlink, let's try to perform the task
1829                                  * with sysfs.
1830                                  */
1831                                 ret =  mlx5_sysfs_switch_info
1832                                                 (list[ns].ifindex,
1833                                                  &list[ns].info);
1834                         }
1835                         if (!ret && bd >= 0) {
1836                                 switch (list[ns].info.name_type) {
1837                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
1838                                         if (list[ns].info.port_name == bd)
1839                                                 ns++;
1840                                         break;
1841                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
1842                                         /* Fallthrough */
1843                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
1844                                         if (list[ns].info.pf_num == bd)
1845                                                 ns++;
1846                                         break;
1847                                 default:
1848                                         break;
1849                                 }
1850                                 continue;
1851                         }
1852                         if (!ret && (list[ns].info.representor ^
1853                                      list[ns].info.master))
1854                                 ns++;
1855                 }
1856                 if (!ns) {
1857                         DRV_LOG(ERR,
1858                                 "unable to recognize master/representors"
1859                                 " on the IB device with multiple ports");
1860                         rte_errno = ENOENT;
1861                         ret = -rte_errno;
1862                         goto exit;
1863                 }
1864         } else {
1865                 /*
1866                  * The existence of several matching entries (nd > 1) means
1867                  * port representors have been instantiated. No existing Verbs
1868                  * call nor sysfs entries can tell them apart, this can only
1869                  * be done through Netlink calls assuming kernel drivers are
1870                  * recent enough to support them.
1871                  *
1872                  * In the event of identification failure through Netlink,
1873                  * try again through sysfs, then:
1874                  *
1875                  * 1. A single IB device matches (nd == 1) with single
1876                  *    port (np=0/1) and is not a representor, assume
1877                  *    no switch support.
1878                  *
1879                  * 2. Otherwise no safe assumptions can be made;
1880                  *    complain louder and bail out.
1881                  */
1882                 for (i = 0; i != nd; ++i) {
1883                         memset(&list[ns].info, 0, sizeof(list[ns].info));
1884                         list[ns].max_port = 1;
1885                         list[ns].phys_port = 1;
1886                         list[ns].phys_dev = ibv_match[i];
1887                         list[ns].eth_dev = NULL;
1888                         list[ns].pci_dev = pci_dev;
1889                         list[ns].pf_bond = -1;
1890                         list[ns].ifindex = 0;
1891                         if (nl_rdma >= 0)
1892                                 list[ns].ifindex = mlx5_nl_ifindex
1893                                 (nl_rdma,
1894                                 mlx5_os_get_dev_device_name
1895                                                 (list[ns].phys_dev), 1);
1896                         if (!list[ns].ifindex) {
1897                                 char ifname[IF_NAMESIZE];
1898
1899                                 /*
1900                                  * Netlink failed, it may happen with old
1901                                  * ib_core kernel driver (before 4.16).
1902                                  * We can assume there is old driver because
1903                                  * here we are processing single ports IB
1904                                  * devices. Let's try sysfs to retrieve
1905                                  * the ifindex. The method works for
1906                                  * master device only.
1907                                  */
1908                                 if (nd > 1) {
1909                                         /*
1910                                          * Multiple devices found, assume
1911                                          * representors, can not distinguish
1912                                          * master/representor and retrieve
1913                                          * ifindex via sysfs.
1914                                          */
1915                                         continue;
1916                                 }
1917                                 ret = mlx5_get_ifname_sysfs
1918                                         (ibv_match[i]->ibdev_path, ifname);
1919                                 if (!ret)
1920                                         list[ns].ifindex =
1921                                                 if_nametoindex(ifname);
1922                                 if (!list[ns].ifindex) {
1923                                         /*
1924                                          * No network interface index found
1925                                          * for the specified device, it means
1926                                          * there it is neither representor
1927                                          * nor master.
1928                                          */
1929                                         continue;
1930                                 }
1931                         }
1932                         ret = -1;
1933                         if (nl_route >= 0)
1934                                 ret = mlx5_nl_switch_info
1935                                                (nl_route,
1936                                                 list[ns].ifindex,
1937                                                 &list[ns].info);
1938                         if (ret || (!list[ns].info.representor &&
1939                                     !list[ns].info.master)) {
1940                                 /*
1941                                  * We failed to recognize representors with
1942                                  * Netlink, let's try to perform the task
1943                                  * with sysfs.
1944                                  */
1945                                 ret =  mlx5_sysfs_switch_info
1946                                                 (list[ns].ifindex,
1947                                                  &list[ns].info);
1948                         }
1949                         if (!ret && (list[ns].info.representor ^
1950                                      list[ns].info.master)) {
1951                                 ns++;
1952                         } else if ((nd == 1) &&
1953                                    !list[ns].info.representor &&
1954                                    !list[ns].info.master) {
1955                                 /*
1956                                  * Single IB device with
1957                                  * one physical port and
1958                                  * attached network device.
1959                                  * May be SRIOV is not enabled
1960                                  * or there is no representors.
1961                                  */
1962                                 DRV_LOG(INFO, "no E-Switch support detected");
1963                                 ns++;
1964                                 break;
1965                         }
1966                 }
1967                 if (!ns) {
1968                         DRV_LOG(ERR,
1969                                 "unable to recognize master/representors"
1970                                 " on the multiple IB devices");
1971                         rte_errno = ENOENT;
1972                         ret = -rte_errno;
1973                         goto exit;
1974                 }
1975         }
1976         MLX5_ASSERT(ns);
1977         /*
1978          * Sort list to probe devices in natural order for users convenience
1979          * (i.e. master first, then representors from lowest to highest ID).
1980          */
1981         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
1982         /* Device specific configuration. */
1983         switch (pci_dev->id.device_id) {
1984         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1985         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1986         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1987         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1988         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
1989         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
1990         case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF:
1991                 dev_config_vf = 1;
1992                 break;
1993         default:
1994                 dev_config_vf = 0;
1995                 break;
1996         }
1997         for (i = 0; i != ns; ++i) {
1998                 uint32_t restore;
1999
2000                 /* Default configuration. */
2001                 memset(&dev_config, 0, sizeof(struct mlx5_dev_config));
2002                 dev_config.vf = dev_config_vf;
2003                 dev_config.mps = MLX5_ARG_UNSET;
2004                 dev_config.dbnc = MLX5_ARG_UNSET;
2005                 dev_config.rx_vec_en = 1;
2006                 dev_config.txq_inline_max = MLX5_ARG_UNSET;
2007                 dev_config.txq_inline_min = MLX5_ARG_UNSET;
2008                 dev_config.txq_inline_mpw = MLX5_ARG_UNSET;
2009                 dev_config.txqs_inline = MLX5_ARG_UNSET;
2010                 dev_config.vf_nl_en = 1;
2011                 dev_config.mr_ext_memseg_en = 1;
2012                 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
2013                 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
2014                 dev_config.dv_esw_en = 1;
2015                 dev_config.dv_flow_en = 1;
2016                 dev_config.decap_en = 1;
2017                 dev_config.log_hp_size = MLX5_ARG_UNSET;
2018                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2019                                                  &list[i],
2020                                                  &dev_config);
2021                 if (!list[i].eth_dev) {
2022                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2023                                 break;
2024                         /* Device is disabled or already spawned. Ignore it. */
2025                         continue;
2026                 }
2027                 restore = list[i].eth_dev->data->dev_flags;
2028                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2029                 /* Restore non-PCI flags cleared by the above call. */
2030                 list[i].eth_dev->data->dev_flags |= restore;
2031                 rte_eth_dev_probing_finish(list[i].eth_dev);
2032         }
2033         if (i != ns) {
2034                 DRV_LOG(ERR,
2035                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2036                         " encountering an error: %s",
2037                         pci_dev->addr.domain, pci_dev->addr.bus,
2038                         pci_dev->addr.devid, pci_dev->addr.function,
2039                         strerror(rte_errno));
2040                 ret = -rte_errno;
2041                 /* Roll back. */
2042                 while (i--) {
2043                         if (!list[i].eth_dev)
2044                                 continue;
2045                         mlx5_dev_close(list[i].eth_dev);
2046                         /* mac_addrs must not be freed because in dev_private */
2047                         list[i].eth_dev->data->mac_addrs = NULL;
2048                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2049                 }
2050                 /* Restore original error. */
2051                 rte_errno = -ret;
2052         } else {
2053                 ret = 0;
2054         }
2055 exit:
2056         /*
2057          * Do the routine cleanup:
2058          * - close opened Netlink sockets
2059          * - free allocated spawn data array
2060          * - free the Infiniband device list
2061          */
2062         if (nl_rdma >= 0)
2063                 close(nl_rdma);
2064         if (nl_route >= 0)
2065                 close(nl_route);
2066         if (list)
2067                 mlx5_free(list);
2068         MLX5_ASSERT(ibv_list);
2069         mlx5_glue->free_device_list(ibv_list);
2070         return ret;
2071 }
2072
2073 static int
2074 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
2075 {
2076         char *env;
2077         int value;
2078
2079         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2080         /* Get environment variable to store. */
2081         env = getenv(MLX5_SHUT_UP_BF);
2082         value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
2083         if (config->dbnc == MLX5_ARG_UNSET)
2084                 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
2085         else
2086                 setenv(MLX5_SHUT_UP_BF,
2087                        config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
2088         return value;
2089 }
2090
2091 static void
2092 mlx5_restore_doorbell_mapping_env(int value)
2093 {
2094         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2095         /* Restore the original environment variable state. */
2096         if (value == MLX5_ARG_UNSET)
2097                 unsetenv(MLX5_SHUT_UP_BF);
2098         else
2099                 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
2100 }
2101
2102 /**
2103  * Extract pdn of PD object using DV API.
2104  *
2105  * @param[in] pd
2106  *   Pointer to the verbs PD object.
2107  * @param[out] pdn
2108  *   Pointer to the PD object number variable.
2109  *
2110  * @return
2111  *   0 on success, error value otherwise.
2112  */
2113 int
2114 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
2115 {
2116 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2117         struct mlx5dv_obj obj;
2118         struct mlx5dv_pd pd_info;
2119         int ret = 0;
2120
2121         obj.pd.in = pd;
2122         obj.pd.out = &pd_info;
2123         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
2124         if (ret) {
2125                 DRV_LOG(DEBUG, "Fail to get PD object info");
2126                 return ret;
2127         }
2128         *pdn = pd_info.pdn;
2129         return 0;
2130 #else
2131         (void)pd;
2132         (void)pdn;
2133         return -ENOTSUP;
2134 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
2135 }
2136
2137 /**
2138  * Function API to open IB device.
2139  *
2140  * This function calls the Linux glue APIs to open a device.
2141  *
2142  * @param[in] spawn
2143  *   Pointer to the IB device attributes (name, port, etc).
2144  * @param[out] config
2145  *   Pointer to device configuration structure.
2146  * @param[out] sh
2147  *   Pointer to shared context structure.
2148  *
2149  * @return
2150  *   0 on success, a positive error value otherwise.
2151  */
2152 int
2153 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
2154                      const struct mlx5_dev_config *config,
2155                      struct mlx5_dev_ctx_shared *sh)
2156 {
2157         int dbmap_env;
2158         int err = 0;
2159
2160         sh->numa_node = spawn->pci_dev->device.numa_node;
2161         pthread_mutex_init(&sh->txpp.mutex, NULL);
2162         /*
2163          * Configure environment variable "MLX5_BF_SHUT_UP"
2164          * before the device creation. The rdma_core library
2165          * checks the variable at device creation and
2166          * stores the result internally.
2167          */
2168         dbmap_env = mlx5_config_doorbell_mapping_env(config);
2169         /* Try to open IB device with DV first, then usual Verbs. */
2170         errno = 0;
2171         sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
2172         if (sh->ctx) {
2173                 sh->devx = 1;
2174                 DRV_LOG(DEBUG, "DevX is supported");
2175                 /* The device is created, no need for environment. */
2176                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2177         } else {
2178                 /* The environment variable is still configured. */
2179                 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
2180                 err = errno ? errno : ENODEV;
2181                 /*
2182                  * The environment variable is not needed anymore,
2183                  * all device creation attempts are completed.
2184                  */
2185                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2186                 if (!sh->ctx)
2187                         return err;
2188                 DRV_LOG(DEBUG, "DevX is NOT supported");
2189                 err = 0;
2190         }
2191         return err;
2192 }
2193
2194 /**
2195  * Install shared asynchronous device events handler.
2196  * This function is implemented to support event sharing
2197  * between multiple ports of single IB device.
2198  *
2199  * @param sh
2200  *   Pointer to mlx5_dev_ctx_shared object.
2201  */
2202 void
2203 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2204 {
2205         int ret;
2206         int flags;
2207
2208         sh->intr_handle.fd = -1;
2209         flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
2210         ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
2211                     F_SETFL, flags | O_NONBLOCK);
2212         if (ret) {
2213                 DRV_LOG(INFO, "failed to change file descriptor async event"
2214                         " queue");
2215         } else {
2216                 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
2217                 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2218                 if (rte_intr_callback_register(&sh->intr_handle,
2219                                         mlx5_dev_interrupt_handler, sh)) {
2220                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2221                         sh->intr_handle.fd = -1;
2222                 }
2223         }
2224         if (sh->devx) {
2225 #ifdef HAVE_IBV_DEVX_ASYNC
2226                 sh->intr_handle_devx.fd = -1;
2227                 sh->devx_comp =
2228                         (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
2229                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2230                 if (!devx_comp) {
2231                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2232                         return;
2233                 }
2234                 flags = fcntl(devx_comp->fd, F_GETFL);
2235                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2236                 if (ret) {
2237                         DRV_LOG(INFO, "failed to change file descriptor"
2238                                 " devx comp");
2239                         return;
2240                 }
2241                 sh->intr_handle_devx.fd = devx_comp->fd;
2242                 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2243                 if (rte_intr_callback_register(&sh->intr_handle_devx,
2244                                         mlx5_dev_interrupt_handler_devx, sh)) {
2245                         DRV_LOG(INFO, "Fail to install the devx shared"
2246                                 " interrupt.");
2247                         sh->intr_handle_devx.fd = -1;
2248                 }
2249 #endif /* HAVE_IBV_DEVX_ASYNC */
2250         }
2251 }
2252
2253 /**
2254  * Uninstall shared asynchronous device events handler.
2255  * This function is implemented to support event sharing
2256  * between multiple ports of single IB device.
2257  *
2258  * @param dev
2259  *   Pointer to mlx5_dev_ctx_shared object.
2260  */
2261 void
2262 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2263 {
2264         if (sh->intr_handle.fd >= 0)
2265                 mlx5_intr_callback_unregister(&sh->intr_handle,
2266                                               mlx5_dev_interrupt_handler, sh);
2267 #ifdef HAVE_IBV_DEVX_ASYNC
2268         if (sh->intr_handle_devx.fd >= 0)
2269                 rte_intr_callback_unregister(&sh->intr_handle_devx,
2270                                   mlx5_dev_interrupt_handler_devx, sh);
2271         if (sh->devx_comp)
2272                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2273 #endif
2274 }
2275
2276 /**
2277  * Read statistics by a named counter.
2278  *
2279  * @param[in] priv
2280  *   Pointer to the private device data structure.
2281  * @param[in] ctr_name
2282  *   Pointer to the name of the statistic counter to read
2283  * @param[out] stat
2284  *   Pointer to read statistic value.
2285  * @return
2286  *   0 on success and stat is valud, 1 if failed to read the value
2287  *   rte_errno is set.
2288  *
2289  */
2290 int
2291 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2292                       uint64_t *stat)
2293 {
2294         int fd;
2295
2296         if (priv->sh) {
2297                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2298                       priv->sh->ibdev_path,
2299                       priv->dev_port,
2300                       ctr_name);
2301                 fd = open(path, O_RDONLY);
2302                 /*
2303                  * in switchdev the file location is not per port
2304                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2305                  */
2306                 if (fd == -1) {
2307                         MKSTR(path1, "%s/hw_counters/%s",
2308                               priv->sh->ibdev_path,
2309                               ctr_name);
2310                         fd = open(path1, O_RDONLY);
2311                 }
2312                 if (fd != -1) {
2313                         char buf[21] = {'\0'};
2314                         ssize_t n = read(fd, buf, sizeof(buf));
2315
2316                         close(fd);
2317                         if (n != -1) {
2318                                 *stat = strtoull(buf, NULL, 10);
2319                                 return 0;
2320                         }
2321                 }
2322         }
2323         *stat = 0;
2324         return 1;
2325 }
2326
2327 /**
2328  * Set the reg_mr and dereg_mr call backs
2329  *
2330  * @param reg_mr_cb[out]
2331  *   Pointer to reg_mr func
2332  * @param dereg_mr_cb[out]
2333  *   Pointer to dereg_mr func
2334  *
2335  */
2336 void
2337 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2338                       mlx5_dereg_mr_t *dereg_mr_cb)
2339 {
2340         *reg_mr_cb = mlx5_verbs_ops.reg_mr;
2341         *dereg_mr_cb = mlx5_verbs_ops.dereg_mr;
2342 }
2343
2344 /**
2345  * Remove a MAC address from device
2346  *
2347  * @param dev
2348  *   Pointer to Ethernet device structure.
2349  * @param index
2350  *   MAC address index.
2351  */
2352 void
2353 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2354 {
2355         struct mlx5_priv *priv = dev->data->dev_private;
2356         const int vf = priv->config.vf;
2357
2358         if (vf)
2359                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2360                                         mlx5_ifindex(dev), priv->mac_own,
2361                                         &dev->data->mac_addrs[index], index);
2362 }
2363
2364 /**
2365  * Adds a MAC address to the device
2366  *
2367  * @param dev
2368  *   Pointer to Ethernet device structure.
2369  * @param mac_addr
2370  *   MAC address to register.
2371  * @param index
2372  *   MAC address index.
2373  *
2374  * @return
2375  *   0 on success, a negative errno value otherwise
2376  */
2377 int
2378 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2379                      uint32_t index)
2380 {
2381         struct mlx5_priv *priv = dev->data->dev_private;
2382         const int vf = priv->config.vf;
2383         int ret = 0;
2384
2385         if (vf)
2386                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2387                                            mlx5_ifindex(dev), priv->mac_own,
2388                                            mac, index);
2389         return ret;
2390 }
2391
2392 /**
2393  * Modify a VF MAC address
2394  *
2395  * @param priv
2396  *   Pointer to device private data.
2397  * @param mac_addr
2398  *   MAC address to modify into.
2399  * @param iface_idx
2400  *   Net device interface index
2401  * @param vf_index
2402  *   VF index
2403  *
2404  * @return
2405  *   0 on success, a negative errno value otherwise
2406  */
2407 int
2408 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2409                            unsigned int iface_idx,
2410                            struct rte_ether_addr *mac_addr,
2411                            int vf_index)
2412 {
2413         return mlx5_nl_vf_mac_addr_modify
2414                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2415 }
2416
2417 /**
2418  * Set device promiscuous mode
2419  *
2420  * @param dev
2421  *   Pointer to Ethernet device structure.
2422  * @param enable
2423  *   0 - promiscuous is disabled, otherwise - enabled
2424  *
2425  * @return
2426  *   0 on success, a negative error value otherwise
2427  */
2428 int
2429 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2430 {
2431         struct mlx5_priv *priv = dev->data->dev_private;
2432
2433         return mlx5_nl_promisc(priv->nl_socket_route,
2434                                mlx5_ifindex(dev), !!enable);
2435 }
2436
2437 /**
2438  * Set device promiscuous mode
2439  *
2440  * @param dev
2441  *   Pointer to Ethernet device structure.
2442  * @param enable
2443  *   0 - all multicase is disabled, otherwise - enabled
2444  *
2445  * @return
2446  *   0 on success, a negative error value otherwise
2447  */
2448 int
2449 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2450 {
2451         struct mlx5_priv *priv = dev->data->dev_private;
2452
2453         return mlx5_nl_allmulti(priv->nl_socket_route,
2454                                 mlx5_ifindex(dev), !!enable);
2455 }
2456
2457 /**
2458  * Flush device MAC addresses
2459  *
2460  * @param dev
2461  *   Pointer to Ethernet device structure.
2462  *
2463  */
2464 void
2465 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2466 {
2467         struct mlx5_priv *priv = dev->data->dev_private;
2468
2469         mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2470                                dev->data->mac_addrs,
2471                                MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2472 }
2473
2474 const struct eth_dev_ops mlx5_os_dev_ops = {
2475         .dev_configure = mlx5_dev_configure,
2476         .dev_start = mlx5_dev_start,
2477         .dev_stop = mlx5_dev_stop,
2478         .dev_set_link_down = mlx5_set_link_down,
2479         .dev_set_link_up = mlx5_set_link_up,
2480         .dev_close = mlx5_dev_close,
2481         .promiscuous_enable = mlx5_promiscuous_enable,
2482         .promiscuous_disable = mlx5_promiscuous_disable,
2483         .allmulticast_enable = mlx5_allmulticast_enable,
2484         .allmulticast_disable = mlx5_allmulticast_disable,
2485         .link_update = mlx5_link_update,
2486         .stats_get = mlx5_stats_get,
2487         .stats_reset = mlx5_stats_reset,
2488         .xstats_get = mlx5_xstats_get,
2489         .xstats_reset = mlx5_xstats_reset,
2490         .xstats_get_names = mlx5_xstats_get_names,
2491         .fw_version_get = mlx5_fw_version_get,
2492         .dev_infos_get = mlx5_dev_infos_get,
2493         .read_clock = mlx5_txpp_read_clock,
2494         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2495         .vlan_filter_set = mlx5_vlan_filter_set,
2496         .rx_queue_setup = mlx5_rx_queue_setup,
2497         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2498         .tx_queue_setup = mlx5_tx_queue_setup,
2499         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2500         .rx_queue_release = mlx5_rx_queue_release,
2501         .tx_queue_release = mlx5_tx_queue_release,
2502         .rx_queue_start = mlx5_rx_queue_start,
2503         .rx_queue_stop = mlx5_rx_queue_stop,
2504         .tx_queue_start = mlx5_tx_queue_start,
2505         .tx_queue_stop = mlx5_tx_queue_stop,
2506         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2507         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2508         .mac_addr_remove = mlx5_mac_addr_remove,
2509         .mac_addr_add = mlx5_mac_addr_add,
2510         .mac_addr_set = mlx5_mac_addr_set,
2511         .set_mc_addr_list = mlx5_set_mc_addr_list,
2512         .mtu_set = mlx5_dev_set_mtu,
2513         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2514         .vlan_offload_set = mlx5_vlan_offload_set,
2515         .reta_update = mlx5_dev_rss_reta_update,
2516         .reta_query = mlx5_dev_rss_reta_query,
2517         .rss_hash_update = mlx5_rss_hash_update,
2518         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
2519         .filter_ctrl = mlx5_dev_filter_ctrl,
2520         .rxq_info_get = mlx5_rxq_info_get,
2521         .txq_info_get = mlx5_txq_info_get,
2522         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2523         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2524         .rx_queue_intr_enable = mlx5_rx_intr_enable,
2525         .rx_queue_intr_disable = mlx5_rx_intr_disable,
2526         .is_removed = mlx5_is_removed,
2527         .udp_tunnel_port_add  = mlx5_udp_tunnel_port_add,
2528         .get_module_info = mlx5_get_module_info,
2529         .get_module_eeprom = mlx5_get_module_eeprom,
2530         .hairpin_cap_get = mlx5_hairpin_cap_get,
2531         .mtr_ops_get = mlx5_flow_meter_ops_get,
2532 };
2533
2534 /* Available operations from secondary process. */
2535 const struct eth_dev_ops mlx5_os_dev_sec_ops = {
2536         .stats_get = mlx5_stats_get,
2537         .stats_reset = mlx5_stats_reset,
2538         .xstats_get = mlx5_xstats_get,
2539         .xstats_reset = mlx5_xstats_reset,
2540         .xstats_get_names = mlx5_xstats_get_names,
2541         .fw_version_get = mlx5_fw_version_get,
2542         .dev_infos_get = mlx5_dev_infos_get,
2543         .read_clock = mlx5_txpp_read_clock,
2544         .rx_queue_start = mlx5_rx_queue_start,
2545         .rx_queue_stop = mlx5_rx_queue_stop,
2546         .tx_queue_start = mlx5_tx_queue_start,
2547         .tx_queue_stop = mlx5_tx_queue_stop,
2548         .rxq_info_get = mlx5_rxq_info_get,
2549         .txq_info_get = mlx5_txq_info_get,
2550         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2551         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2552         .get_module_info = mlx5_get_module_info,
2553         .get_module_eeprom = mlx5_get_module_eeprom,
2554 };
2555
2556 /* Available operations in flow isolated mode. */
2557 const struct eth_dev_ops mlx5_os_dev_ops_isolate = {
2558         .dev_configure = mlx5_dev_configure,
2559         .dev_start = mlx5_dev_start,
2560         .dev_stop = mlx5_dev_stop,
2561         .dev_set_link_down = mlx5_set_link_down,
2562         .dev_set_link_up = mlx5_set_link_up,
2563         .dev_close = mlx5_dev_close,
2564         .promiscuous_enable = mlx5_promiscuous_enable,
2565         .promiscuous_disable = mlx5_promiscuous_disable,
2566         .allmulticast_enable = mlx5_allmulticast_enable,
2567         .allmulticast_disable = mlx5_allmulticast_disable,
2568         .link_update = mlx5_link_update,
2569         .stats_get = mlx5_stats_get,
2570         .stats_reset = mlx5_stats_reset,
2571         .xstats_get = mlx5_xstats_get,
2572         .xstats_reset = mlx5_xstats_reset,
2573         .xstats_get_names = mlx5_xstats_get_names,
2574         .fw_version_get = mlx5_fw_version_get,
2575         .dev_infos_get = mlx5_dev_infos_get,
2576         .read_clock = mlx5_txpp_read_clock,
2577         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2578         .vlan_filter_set = mlx5_vlan_filter_set,
2579         .rx_queue_setup = mlx5_rx_queue_setup,
2580         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2581         .tx_queue_setup = mlx5_tx_queue_setup,
2582         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2583         .rx_queue_release = mlx5_rx_queue_release,
2584         .tx_queue_release = mlx5_tx_queue_release,
2585         .rx_queue_start = mlx5_rx_queue_start,
2586         .rx_queue_stop = mlx5_rx_queue_stop,
2587         .tx_queue_start = mlx5_tx_queue_start,
2588         .tx_queue_stop = mlx5_tx_queue_stop,
2589         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2590         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2591         .mac_addr_remove = mlx5_mac_addr_remove,
2592         .mac_addr_add = mlx5_mac_addr_add,
2593         .mac_addr_set = mlx5_mac_addr_set,
2594         .set_mc_addr_list = mlx5_set_mc_addr_list,
2595         .mtu_set = mlx5_dev_set_mtu,
2596         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2597         .vlan_offload_set = mlx5_vlan_offload_set,
2598         .filter_ctrl = mlx5_dev_filter_ctrl,
2599         .rxq_info_get = mlx5_rxq_info_get,
2600         .txq_info_get = mlx5_txq_info_get,
2601         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2602         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2603         .rx_queue_intr_enable = mlx5_rx_intr_enable,
2604         .rx_queue_intr_disable = mlx5_rx_intr_disable,
2605         .is_removed = mlx5_is_removed,
2606         .get_module_info = mlx5_get_module_info,
2607         .get_module_eeprom = mlx5_get_module_eeprom,
2608         .hairpin_cap_get = mlx5_hairpin_cap_get,
2609         .mtr_ops_get = mlx5_flow_meter_ops_get,
2610 };