drivers/net/mlx5/linux/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2020 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12 #include <net/if.h>
  13 #include <linux/rtnetlink.h>
  14 #include <linux/sockios.h>
  15 #include <linux/ethtool.h>
  16 #include <fcntl.h>
  17
  18 #include <rte_malloc.h>
  19 #include <rte_ethdev_driver.h>
  20 #include <rte_ethdev_pci.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_common.h>
  24 #include <rte_kvargs.h>
  25 #include <rte_rwlock.h>
  26 #include <rte_spinlock.h>
  27 #include <rte_string_fns.h>
  28 #include <rte_alarm.h>
  29 #include <rte_eal_paging.h>
  30
  31 #include <mlx5_glue.h>
  32 #include <mlx5_devx_cmds.h>
  33 #include <mlx5_common.h>
  34 #include <mlx5_common_mp.h>
  35 #include <mlx5_common_mr.h>
  36 #include <mlx5_malloc.h>
  37
  38 #include "mlx5_defs.h"
  39 #include "mlx5.h"
  40 #include "mlx5_common_os.h"
  41 #include "mlx5_utils.h"
  42 #include "mlx5_rxtx.h"
  43 #include "mlx5_autoconf.h"
  44 #include "mlx5_mr.h"
  45 #include "mlx5_flow.h"
  46 #include "rte_pmd_mlx5.h"
  47 #include "mlx5_verbs.h"
  48 #include "mlx5_nl.h"
  49 #include "mlx5_devx.h"
  50
  51 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
  52
  53 #ifndef HAVE_IBV_MLX5_MOD_MPW
  54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
  55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
  56 #endif
  57
  58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
  59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
  60 #endif
  61
  62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  63
  64 /* Spinlock for mlx5_shared_data allocation. */
  65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  66
  67 /* Process local data for secondary processes. */
  68 static struct mlx5_local_data mlx5_local_data;
  69
  70 /**
  71  * Set the completion channel file descriptor interrupt as non-blocking.
  72  *
  73  * @param[in] rxq_obj
  74  *   Pointer to RQ channel object, which includes the channel fd
  75  *
  76  * @param[out] fd
  77  *   The file descriptor (representing the intetrrupt) used in this channel.
  78  *
  79  * @return
  80  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
  81  */
  82 int
  83 mlx5_os_set_nonblock_channel_fd(int fd)
  84 {
  85         int flags;
  86
  87         flags = fcntl(fd, F_GETFL);
  88         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
  89 }
  90
  91 /**
  92  * Get mlx5 device attributes. The glue function query_device_ex() is called
  93  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
  94  * device attributes from the glue out parameter.
  95  *
  96  * @param dev
  97  *   Pointer to ibv context.
  98  *
  99  * @param device_attr
 100  *   Pointer to mlx5 device attributes.
 101  *
 102  * @return
 103  *   0 on success, non zero error number otherwise
 104  */
 105 int
 106 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
 107 {
 108         int err;
 109         struct ibv_device_attr_ex attr_ex;
 110         memset(device_attr, 0, sizeof(*device_attr));
 111         err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
 112         if (err)
 113                 return err;
 114
 115         device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
 116         device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
 117         device_attr->max_sge = attr_ex.orig_attr.max_sge;
 118         device_attr->max_cq = attr_ex.orig_attr.max_cq;
 119         device_attr->max_qp = attr_ex.orig_attr.max_qp;
 120         device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
 121         device_attr->max_rwq_indirection_table_size =
 122                 attr_ex.rss_caps.max_rwq_indirection_table_size;
 123         device_attr->max_tso = attr_ex.tso_caps.max_tso;
 124         device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
 125
 126         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 127         err = mlx5_glue->dv_query_device(ctx, &dv_attr);
 128         if (err)
 129                 return err;
 130
 131         device_attr->flags = dv_attr.flags;
 132         device_attr->comp_mask = dv_attr.comp_mask;
 133 #ifdef HAVE_IBV_MLX5_MOD_SWP
 134         device_attr->sw_parsing_offloads =
 135                 dv_attr.sw_parsing_caps.sw_parsing_offloads;
 136 #endif
 137         device_attr->min_single_stride_log_num_of_bytes =
 138                 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
 139         device_attr->max_single_stride_log_num_of_bytes =
 140                 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
 141         device_attr->min_single_wqe_log_num_of_strides =
 142                 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
 143         device_attr->max_single_wqe_log_num_of_strides =
 144                 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
 145         device_attr->stride_supported_qpts =
 146                 dv_attr.striding_rq_caps.supported_qpts;
 147 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 148         device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
 149 #endif
 150
 151         return err;
 152 }
 153
 154 /**
 155  * Verbs callback to allocate a memory. This function should allocate the space
 156  * according to the size provided residing inside a huge page.
 157  * Please note that all allocation must respect the alignment from libmlx5
 158  * (i.e. currently rte_mem_page_size()).
 159  *
 160  * @param[in] size
 161  *   The size in bytes of the memory to allocate.
 162  * @param[in] data
 163  *   A pointer to the callback data.
 164  *
 165  * @return
 166  *   Allocated buffer, NULL otherwise and rte_errno is set.
 167  */
 168 static void *
 169 mlx5_alloc_verbs_buf(size_t size, void *data)
 170 {
 171         struct mlx5_priv *priv = data;
 172         void *ret;
 173         unsigned int socket = SOCKET_ID_ANY;
 174         size_t alignment = rte_mem_page_size();
 175         if (alignment == (size_t)-1) {
 176                 DRV_LOG(ERR, "Failed to get mem page size");
 177                 rte_errno = ENOMEM;
 178                 return NULL;
 179         }
 180
 181         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
 182                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 183
 184                 socket = ctrl->socket;
 185         } else if (priv->verbs_alloc_ctx.type ==
 186                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
 187                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 188
 189                 socket = ctrl->socket;
 190         }
 191         MLX5_ASSERT(data != NULL);
 192         ret = mlx5_malloc(0, size, alignment, socket);
 193         if (!ret && size)
 194                 rte_errno = ENOMEM;
 195         return ret;
 196 }
 197
 198 /**
 199  * Verbs callback to free a memory.
 200  *
 201  * @param[in] ptr
 202  *   A pointer to the memory to free.
 203  * @param[in] data
 204  *   A pointer to the callback data.
 205  */
 206 static void
 207 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 208 {
 209         MLX5_ASSERT(data != NULL);
 210         mlx5_free(ptr);
 211 }
 212
 213 /**
 214  * Initialize DR related data within private structure.
 215  * Routine checks the reference counter and does actual
 216  * resources creation/initialization only if counter is zero.
 217  *
 218  * @param[in] priv
 219  *   Pointer to the private device data structure.
 220  *
 221  * @return
 222  *   Zero on success, positive error code otherwise.
 223  */
 224 static int
 225 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 226 {
 227         struct mlx5_dev_ctx_shared *sh = priv->sh;
 228         char s[MLX5_HLIST_NAMESIZE] __rte_unused;
 229         int err;
 230
 231         MLX5_ASSERT(sh && sh->refcnt);
 232         if (sh->refcnt > 1)
 233                 return 0;
 234         err = mlx5_alloc_table_hash_list(priv);
 235         if (err)
 236                 goto error;
 237         /* The resources below are only valid with DV support. */
 238 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 239         /* Create tags hash list table. */
 240         snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name);
 241         sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE, 0,
 242                                           0, NULL, NULL, NULL);
 243         if (!sh->tag_table) {
 244                 DRV_LOG(ERR, "tags with hash creation failed.");
 245                 err = ENOMEM;
 246                 goto error;
 247         }
 248         snprintf(s, sizeof(s), "%s_hdr_modify", sh->ibdev_name);
 249         sh->modify_cmds = mlx5_hlist_create(s, MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
 250                                             0, 0, NULL, NULL, NULL);
 251         if (!sh->modify_cmds) {
 252                 DRV_LOG(ERR, "hdr modify hash creation failed");
 253                 err = ENOMEM;
 254                 goto error;
 255         }
 256         snprintf(s, sizeof(s), "%s_encaps_decaps", sh->ibdev_name);
 257         sh->encaps_decaps = mlx5_hlist_create(s,
 258                                               MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
 259                                               0, 0, NULL, NULL, NULL);
 260         if (!sh->encaps_decaps) {
 261                 DRV_LOG(ERR, "encap decap hash creation failed");
 262                 err = ENOMEM;
 263                 goto error;
 264         }
 265 #endif
 266 #ifdef HAVE_MLX5DV_DR
 267         void *domain;
 268
 269         /* Reference counter is zero, we should initialize structures. */
 270         domain = mlx5_glue->dr_create_domain(sh->ctx,
 271                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 272         if (!domain) {
 273                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 274                 err = errno;
 275                 goto error;
 276         }
 277         sh->rx_domain = domain;
 278         domain = mlx5_glue->dr_create_domain(sh->ctx,
 279                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 280         if (!domain) {
 281                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 282                 err = errno;
 283                 goto error;
 284         }
 285         pthread_mutex_init(&sh->dv_mutex, NULL);
 286         sh->tx_domain = domain;
 287 #ifdef HAVE_MLX5DV_DR_ESWITCH
 288         if (priv->config.dv_esw_en) {
 289                 domain  = mlx5_glue->dr_create_domain
 290                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 291                 if (!domain) {
 292                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 293                         err = errno;
 294                         goto error;
 295                 }
 296                 sh->fdb_domain = domain;
 297                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 298         }
 299 #endif
 300         if (!sh->tunnel_hub)
 301                 err = mlx5_alloc_tunnel_hub(sh);
 302         if (err) {
 303                 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
 304                 goto error;
 305         }
 306         if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
 307                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
 308                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
 309                 if (sh->fdb_domain)
 310                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
 311         }
 312         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 313 #endif /* HAVE_MLX5DV_DR */
 314         sh->default_miss_action =
 315                         mlx5_glue->dr_create_flow_action_default_miss();
 316         if (!sh->default_miss_action)
 317                 DRV_LOG(WARNING, "Default miss action is not supported.");
 318         return 0;
 319 error:
 320         /* Rollback the created objects. */
 321         if (sh->rx_domain) {
 322                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 323                 sh->rx_domain = NULL;
 324         }
 325         if (sh->tx_domain) {
 326                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 327                 sh->tx_domain = NULL;
 328         }
 329         if (sh->fdb_domain) {
 330                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 331                 sh->fdb_domain = NULL;
 332         }
 333         if (sh->esw_drop_action) {
 334                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 335                 sh->esw_drop_action = NULL;
 336         }
 337         if (sh->pop_vlan_action) {
 338                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 339                 sh->pop_vlan_action = NULL;
 340         }
 341         if (sh->encaps_decaps) {
 342                 mlx5_hlist_destroy(sh->encaps_decaps);
 343                 sh->encaps_decaps = NULL;
 344         }
 345         if (sh->modify_cmds) {
 346                 mlx5_hlist_destroy(sh->modify_cmds);
 347                 sh->modify_cmds = NULL;
 348         }
 349         if (sh->tag_table) {
 350                 /* tags should be destroyed with flow before. */
 351                 mlx5_hlist_destroy(sh->tag_table);
 352                 sh->tag_table = NULL;
 353         }
 354         if (sh->tunnel_hub) {
 355                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 356                 sh->tunnel_hub = NULL;
 357         }
 358         mlx5_free_table_hash_list(priv);
 359         return err;
 360 }
 361
 362 /**
 363  * Destroy DR related data within private structure.
 364  *
 365  * @param[in] priv
 366  *   Pointer to the private device data structure.
 367  */
 368 void
 369 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 370 {
 371         struct mlx5_dev_ctx_shared *sh = priv->sh;
 372
 373         MLX5_ASSERT(sh && sh->refcnt);
 374         if (sh->refcnt > 1)
 375                 return;
 376 #ifdef HAVE_MLX5DV_DR
 377         if (sh->rx_domain) {
 378                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 379                 sh->rx_domain = NULL;
 380         }
 381         if (sh->tx_domain) {
 382                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 383                 sh->tx_domain = NULL;
 384         }
 385 #ifdef HAVE_MLX5DV_DR_ESWITCH
 386         if (sh->fdb_domain) {
 387                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 388                 sh->fdb_domain = NULL;
 389         }
 390         if (sh->esw_drop_action) {
 391                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 392                 sh->esw_drop_action = NULL;
 393         }
 394 #endif
 395         if (sh->pop_vlan_action) {
 396                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 397                 sh->pop_vlan_action = NULL;
 398         }
 399         pthread_mutex_destroy(&sh->dv_mutex);
 400 #endif /* HAVE_MLX5DV_DR */
 401         if (sh->default_miss_action)
 402                 mlx5_glue->destroy_flow_action
 403                                 (sh->default_miss_action);
 404         if (sh->encaps_decaps) {
 405                 mlx5_hlist_destroy(sh->encaps_decaps);
 406                 sh->encaps_decaps = NULL;
 407         }
 408         if (sh->modify_cmds) {
 409                 mlx5_hlist_destroy(sh->modify_cmds);
 410                 sh->modify_cmds = NULL;
 411         }
 412         if (sh->tag_table) {
 413                 /* tags should be destroyed with flow before. */
 414                 mlx5_hlist_destroy(sh->tag_table);
 415                 sh->tag_table = NULL;
 416         }
 417         if (sh->tunnel_hub) {
 418                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 419                 sh->tunnel_hub = NULL;
 420         }
 421         mlx5_free_table_hash_list(priv);
 422 }
 423
 424 /**
 425  * Initialize shared data between primary and secondary process.
 426  *
 427  * A memzone is reserved by primary process and secondary processes attach to
 428  * the memzone.
 429  *
 430  * @return
 431  *   0 on success, a negative errno value otherwise and rte_errno is set.
 432  */
 433 static int
 434 mlx5_init_shared_data(void)
 435 {
 436         const struct rte_memzone *mz;
 437         int ret = 0;
 438
 439         rte_spinlock_lock(&mlx5_shared_data_lock);
 440         if (mlx5_shared_data == NULL) {
 441                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 442                         /* Allocate shared memory. */
 443                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 444                                                  sizeof(*mlx5_shared_data),
 445                                                  SOCKET_ID_ANY, 0);
 446                         if (mz == NULL) {
 447                                 DRV_LOG(ERR,
 448                                         "Cannot allocate mlx5 shared data");
 449                                 ret = -rte_errno;
 450                                 goto error;
 451                         }
 452                         mlx5_shared_data = mz->addr;
 453                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 454                         rte_spinlock_init(&mlx5_shared_data->lock);
 455                 } else {
 456                         /* Lookup allocated shared memory. */
 457                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 458                         if (mz == NULL) {
 459                                 DRV_LOG(ERR,
 460                                         "Cannot attach mlx5 shared data");
 461                                 ret = -rte_errno;
 462                                 goto error;
 463                         }
 464                         mlx5_shared_data = mz->addr;
 465                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 466                 }
 467         }
 468 error:
 469         rte_spinlock_unlock(&mlx5_shared_data_lock);
 470         return ret;
 471 }
 472
 473 /**
 474  * PMD global initialization.
 475  *
 476  * Independent from individual device, this function initializes global
 477  * per-PMD data structures distinguishing primary and secondary processes.
 478  * Hence, each initialization is called once per a process.
 479  *
 480  * @return
 481  *   0 on success, a negative errno value otherwise and rte_errno is set.
 482  */
 483 static int
 484 mlx5_init_once(void)
 485 {
 486         struct mlx5_shared_data *sd;
 487         struct mlx5_local_data *ld = &mlx5_local_data;
 488         int ret = 0;
 489
 490         if (mlx5_init_shared_data())
 491                 return -rte_errno;
 492         sd = mlx5_shared_data;
 493         MLX5_ASSERT(sd);
 494         rte_spinlock_lock(&sd->lock);
 495         switch (rte_eal_process_type()) {
 496         case RTE_PROC_PRIMARY:
 497                 if (sd->init_done)
 498                         break;
 499                 LIST_INIT(&sd->mem_event_cb_list);
 500                 rte_rwlock_init(&sd->mem_event_rwlock);
 501                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
 502                                                 mlx5_mr_mem_event_cb, NULL);
 503                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
 504                                            mlx5_mp_os_primary_handle);
 505                 if (ret)
 506                         goto out;
 507                 sd->init_done = true;
 508                 break;
 509         case RTE_PROC_SECONDARY:
 510                 if (ld->init_done)
 511                         break;
 512                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
 513                                              mlx5_mp_os_secondary_handle);
 514                 if (ret)
 515                         goto out;
 516                 ++sd->secondary_cnt;
 517                 ld->init_done = true;
 518                 break;
 519         default:
 520                 break;
 521         }
 522 out:
 523         rte_spinlock_unlock(&sd->lock);
 524         return ret;
 525 }
 526
 527 /**
 528  * Create the Tx queue DevX/Verbs object.
 529  *
 530  * @param dev
 531  *   Pointer to Ethernet device.
 532  * @param idx
 533  *   Queue index in DPDK Tx queue array.
 534  *
 535  * @return
 536  *   0 on success, a negative errno value otherwise and rte_errno is set.
 537  */
 538 static int
 539 mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
 540 {
 541         struct mlx5_priv *priv = dev->data->dev_private;
 542         struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
 543         struct mlx5_txq_ctrl *txq_ctrl =
 544                         container_of(txq_data, struct mlx5_txq_ctrl, txq);
 545
 546         if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
 547                 return mlx5_txq_devx_obj_new(dev, idx);
 548 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 549         if (!priv->config.dv_esw_en)
 550                 return mlx5_txq_devx_obj_new(dev, idx);
 551 #endif
 552         return mlx5_txq_ibv_obj_new(dev, idx);
 553 }
 554
 555 /**
 556  * Release an Tx DevX/verbs queue object.
 557  *
 558  * @param txq_obj
 559  *   DevX/Verbs Tx queue object.
 560  */
 561 static void
 562 mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)
 563 {
 564         if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
 565                 mlx5_txq_devx_obj_release(txq_obj);
 566                 return;
 567         }
 568 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 569         if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) {
 570                 mlx5_txq_devx_obj_release(txq_obj);
 571                 return;
 572         }
 573 #endif
 574         mlx5_txq_ibv_obj_release(txq_obj);
 575 }
 576
 577 /**
 578  * DV flow counter mode detect and config.
 579  *
 580  * @param dev
 581  *   Pointer to rte_eth_dev structure.
 582  *
 583  */
 584 static void
 585 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
 586 {
 587 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 588         struct mlx5_priv *priv = dev->data->dev_private;
 589         struct mlx5_dev_ctx_shared *sh = priv->sh;
 590         bool fallback;
 591
 592 #ifndef HAVE_IBV_DEVX_ASYNC
 593         fallback = true;
 594 #else
 595         fallback = false;
 596         if (!priv->config.devx || !priv->config.dv_flow_en ||
 597             !priv->config.hca_attr.flow_counters_dump ||
 598             !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
 599             (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
 600                 fallback = true;
 601 #endif
 602         if (fallback)
 603                 DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
 604                         "counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
 605                         priv->config.hca_attr.flow_counters_dump,
 606                         priv->config.hca_attr.flow_counter_bulk_alloc_bitmap);
 607         /* Initialize fallback mode only on the port initializes sh. */
 608         if (sh->refcnt == 1)
 609                 sh->cmng.counter_fallback = fallback;
 610         else if (fallback != sh->cmng.counter_fallback)
 611                 DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
 612                         "with others:%d.", PORT_ID(priv), fallback);
 613 #endif
 614 }
 615
 616 /**
 617  * Spawn an Ethernet device from Verbs information.
 618  *
 619  * @param dpdk_dev
 620  *   Backing DPDK device.
 621  * @param spawn
 622  *   Verbs device parameters (name, port, switch_info) to spawn.
 623  * @param config
 624  *   Device configuration parameters.
 625  *
 626  * @return
 627  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 628  *   is set. The following errors are defined:
 629  *
 630  *   EBUSY: device is not supposed to be spawned.
 631  *   EEXIST: device is already spawned
 632  */
 633 static struct rte_eth_dev *
 634 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 635                struct mlx5_dev_spawn_data *spawn,
 636                struct mlx5_dev_config *config)
 637 {
 638         const struct mlx5_switch_info *switch_info = &spawn->info;
 639         struct mlx5_dev_ctx_shared *sh = NULL;
 640         struct ibv_port_attr port_attr;
 641         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 642         struct rte_eth_dev *eth_dev = NULL;
 643         struct mlx5_priv *priv = NULL;
 644         int err = 0;
 645         unsigned int hw_padding = 0;
 646         unsigned int mps;
 647         unsigned int cqe_comp;
 648         unsigned int cqe_pad = 0;
 649         unsigned int tunnel_en = 0;
 650         unsigned int mpls_en = 0;
 651         unsigned int swp = 0;
 652         unsigned int mprq = 0;
 653         unsigned int mprq_min_stride_size_n = 0;
 654         unsigned int mprq_max_stride_size_n = 0;
 655         unsigned int mprq_min_stride_num_n = 0;
 656         unsigned int mprq_max_stride_num_n = 0;
 657         struct rte_ether_addr mac;
 658         char name[RTE_ETH_NAME_MAX_LEN];
 659         int own_domain_id = 0;
 660         uint16_t port_id;
 661         unsigned int i;
 662 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 663         struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
 664 #endif
 665
 666         /* Determine if this port representor is supposed to be spawned. */
 667         if (switch_info->representor && dpdk_dev->devargs) {
 668                 struct rte_eth_devargs eth_da;
 669
 670                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
 671                 if (err) {
 672                         rte_errno = -err;
 673                         DRV_LOG(ERR, "failed to process device arguments: %s",
 674                                 strerror(rte_errno));
 675                         return NULL;
 676                 }
 677                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
 678                         if (eth_da.representor_ports[i] ==
 679                             (uint16_t)switch_info->port_name)
 680                                 break;
 681                 if (i == eth_da.nb_representor_ports) {
 682                         rte_errno = EBUSY;
 683                         return NULL;
 684                 }
 685         }
 686         /* Build device name. */
 687         if (spawn->pf_bond <  0) {
 688                 /* Single device. */
 689                 if (!switch_info->representor)
 690                         strlcpy(name, dpdk_dev->name, sizeof(name));
 691                 else
 692                         snprintf(name, sizeof(name), "%s_representor_%u",
 693                                  dpdk_dev->name, switch_info->port_name);
 694         } else {
 695                 /* Bonding device. */
 696                 if (!switch_info->representor)
 697                         snprintf(name, sizeof(name), "%s_%s",
 698                                  dpdk_dev->name,
 699                                  mlx5_os_get_dev_device_name(spawn->phys_dev));
 700                 else
 701                         snprintf(name, sizeof(name), "%s_%s_representor_%u",
 702                                  dpdk_dev->name,
 703                                  mlx5_os_get_dev_device_name(spawn->phys_dev),
 704                                  switch_info->port_name);
 705         }
 706         /* check if the device is already spawned */
 707         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 708                 rte_errno = EEXIST;
 709                 return NULL;
 710         }
 711         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 712         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 713                 struct mlx5_mp_id mp_id;
 714
 715                 eth_dev = rte_eth_dev_attach_secondary(name);
 716                 if (eth_dev == NULL) {
 717                         DRV_LOG(ERR, "can not attach rte ethdev");
 718                         rte_errno = ENOMEM;
 719                         return NULL;
 720                 }
 721                 eth_dev->device = dpdk_dev;
 722                 eth_dev->dev_ops = &mlx5_os_dev_sec_ops;
 723                 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
 724                 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
 725                 err = mlx5_proc_priv_init(eth_dev);
 726                 if (err)
 727                         return NULL;
 728                 mp_id.port_id = eth_dev->data->port_id;
 729                 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 730                 /* Receive command fd from primary process */
 731                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
 732                 if (err < 0)
 733                         goto err_secondary;
 734                 /* Remap UAR for Tx queues. */
 735                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
 736                 if (err)
 737                         goto err_secondary;
 738                 /*
 739                  * Ethdev pointer is still required as input since
 740                  * the primary device is not accessible from the
 741                  * secondary process.
 742                  */
 743                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
 744                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
 745                 return eth_dev;
 746 err_secondary:
 747                 mlx5_dev_close(eth_dev);
 748                 return NULL;
 749         }
 750         /*
 751          * Some parameters ("tx_db_nc" in particularly) are needed in
 752          * advance to create dv/verbs device context. We proceed the
 753          * devargs here to get ones, and later proceed devargs again
 754          * to override some hardware settings.
 755          */
 756         err = mlx5_args(config, dpdk_dev->devargs);
 757         if (err) {
 758                 err = rte_errno;
 759                 DRV_LOG(ERR, "failed to process device arguments: %s",
 760                         strerror(rte_errno));
 761                 goto error;
 762         }
 763         if (config->dv_miss_info) {
 764                 if (switch_info->master || switch_info->representor)
 765                         config->dv_xmeta_en = MLX5_XMETA_MODE_META16;
 766         }
 767         mlx5_malloc_mem_select(config->sys_mem_en);
 768         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
 769         if (!sh)
 770                 return NULL;
 771         config->devx = sh->devx;
 772 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
 773         config->dest_tir = 1;
 774 #endif
 775 #ifdef HAVE_IBV_MLX5_MOD_SWP
 776         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
 777 #endif
 778         /*
 779          * Multi-packet send is supported by ConnectX-4 Lx PF as well
 780          * as all ConnectX-5 devices.
 781          */
 782 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 783         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
 784 #endif
 785 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 786         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
 787 #endif
 788         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
 789         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
 790                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
 791                         DRV_LOG(DEBUG, "enhanced MPW is supported");
 792                         mps = MLX5_MPW_ENHANCED;
 793                 } else {
 794                         DRV_LOG(DEBUG, "MPW is supported");
 795                         mps = MLX5_MPW;
 796                 }
 797         } else {
 798                 DRV_LOG(DEBUG, "MPW isn't supported");
 799                 mps = MLX5_MPW_DISABLED;
 800         }
 801 #ifdef HAVE_IBV_MLX5_MOD_SWP
 802         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
 803                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
 804         DRV_LOG(DEBUG, "SWP support: %u", swp);
 805 #endif
 806         config->swp = !!swp;
 807 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 808         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
 809                 struct mlx5dv_striding_rq_caps mprq_caps =
 810                         dv_attr.striding_rq_caps;
 811
 812                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
 813                         mprq_caps.min_single_stride_log_num_of_bytes);
 814                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
 815                         mprq_caps.max_single_stride_log_num_of_bytes);
 816                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
 817                         mprq_caps.min_single_wqe_log_num_of_strides);
 818                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
 819                         mprq_caps.max_single_wqe_log_num_of_strides);
 820                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
 821                         mprq_caps.supported_qpts);
 822                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
 823                 mprq = 1;
 824                 mprq_min_stride_size_n =
 825                         mprq_caps.min_single_stride_log_num_of_bytes;
 826                 mprq_max_stride_size_n =
 827                         mprq_caps.max_single_stride_log_num_of_bytes;
 828                 mprq_min_stride_num_n =
 829                         mprq_caps.min_single_wqe_log_num_of_strides;
 830                 mprq_max_stride_num_n =
 831                         mprq_caps.max_single_wqe_log_num_of_strides;
 832         }
 833 #endif
 834         if (RTE_CACHE_LINE_SIZE == 128 &&
 835             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
 836                 cqe_comp = 0;
 837         else
 838                 cqe_comp = 1;
 839         config->cqe_comp = cqe_comp;
 840 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
 841         /* Whether device supports 128B Rx CQE padding. */
 842         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
 843                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
 844 #endif
 845 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 846         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
 847                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
 848                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
 849                              (dv_attr.tunnel_offloads_caps &
 850                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
 851                              (dv_attr.tunnel_offloads_caps &
 852                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
 853         }
 854         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
 855                 tunnel_en ? "" : "not ");
 856 #else
 857         DRV_LOG(WARNING,
 858                 "tunnel offloading disabled due to old OFED/rdma-core version");
 859 #endif
 860         config->tunnel_en = tunnel_en;
 861 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
 862         mpls_en = ((dv_attr.tunnel_offloads_caps &
 863                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
 864                    (dv_attr.tunnel_offloads_caps &
 865                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
 866         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
 867                 mpls_en ? "" : "not ");
 868 #else
 869         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
 870                 " old OFED/rdma-core version or firmware configuration");
 871 #endif
 872         config->mpls_en = mpls_en;
 873         /* Check port status. */
 874         err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
 875         if (err) {
 876                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
 877                 goto error;
 878         }
 879         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
 880                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
 881                 err = EINVAL;
 882                 goto error;
 883         }
 884         if (port_attr.state != IBV_PORT_ACTIVE)
 885                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
 886                         mlx5_glue->port_state_str(port_attr.state),
 887                         port_attr.state);
 888         /* Allocate private eth device data. */
 889         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
 890                            sizeof(*priv),
 891                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
 892         if (priv == NULL) {
 893                 DRV_LOG(ERR, "priv allocation failure");
 894                 err = ENOMEM;
 895                 goto error;
 896         }
 897         priv->sh = sh;
 898         priv->dev_port = spawn->phys_port;
 899         priv->pci_dev = spawn->pci_dev;
 900         priv->mtu = RTE_ETHER_MTU;
 901         priv->mp_id.port_id = port_id;
 902         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 903         /* Some internal functions rely on Netlink sockets, open them now. */
 904         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
 905         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
 906         priv->representor = !!switch_info->representor;
 907         priv->master = !!switch_info->master;
 908         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
 909         priv->vport_meta_tag = 0;
 910         priv->vport_meta_mask = 0;
 911         priv->pf_bond = spawn->pf_bond;
 912 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 913         /*
 914          * The DevX port query API is implemented. E-Switch may use
 915          * either vport or reg_c[0] metadata register to match on
 916          * vport index. The engaged part of metadata register is
 917          * defined by mask.
 918          */
 919         if (switch_info->representor || switch_info->master) {
 920                 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
 921                                       MLX5DV_DEVX_PORT_MATCH_REG_C_0;
 922                 err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port,
 923                                                  &devx_port);
 924                 if (err) {
 925                         DRV_LOG(WARNING,
 926                                 "can't query devx port %d on device %s",
 927                                 spawn->phys_port,
 928                                 mlx5_os_get_dev_device_name(spawn->phys_dev));
 929                         devx_port.comp_mask = 0;
 930                 }
 931         }
 932         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
 933                 priv->vport_meta_tag = devx_port.reg_c_0.value;
 934                 priv->vport_meta_mask = devx_port.reg_c_0.mask;
 935                 if (!priv->vport_meta_mask) {
 936                         DRV_LOG(ERR, "vport zero mask for port %d"
 937                                      " on bonding device %s",
 938                                      spawn->phys_port,
 939                                      mlx5_os_get_dev_device_name
 940                                                         (spawn->phys_dev));
 941                         err = ENOTSUP;
 942                         goto error;
 943                 }
 944                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
 945                         DRV_LOG(ERR, "invalid vport tag for port %d"
 946                                      " on bonding device %s",
 947                                      spawn->phys_port,
 948                                      mlx5_os_get_dev_device_name
 949                                                         (spawn->phys_dev));
 950                         err = ENOTSUP;
 951                         goto error;
 952                 }
 953         }
 954         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
 955                 priv->vport_id = devx_port.vport_num;
 956         } else if (spawn->pf_bond >= 0) {
 957                 DRV_LOG(ERR, "can't deduce vport index for port %d"
 958                              " on bonding device %s",
 959                              spawn->phys_port,
 960                              mlx5_os_get_dev_device_name(spawn->phys_dev));
 961                 err = ENOTSUP;
 962                 goto error;
 963         } else {
 964                 /* Suppose vport index in compatible way. */
 965                 priv->vport_id = switch_info->representor ?
 966                                  switch_info->port_name + 1 : -1;
 967         }
 968 #else
 969         /*
 970          * Kernel/rdma_core support single E-Switch per PF configurations
 971          * only and vport_id field contains the vport index for
 972          * associated VF, which is deduced from representor port name.
 973          * For example, let's have the IB device port 10, it has
 974          * attached network device eth0, which has port name attribute
 975          * pf0vf2, we can deduce the VF number as 2, and set vport index
 976          * as 3 (2+1). This assigning schema should be changed if the
 977          * multiple E-Switch instances per PF configurations or/and PCI
 978          * subfunctions are added.
 979          */
 980         priv->vport_id = switch_info->representor ?
 981                          switch_info->port_name + 1 : -1;
 982 #endif
 983         /* representor_id field keeps the unmodified VF index. */
 984         priv->representor_id = switch_info->representor ?
 985                                switch_info->port_name : -1;
 986         /*
 987          * Look for sibling devices in order to reuse their switch domain
 988          * if any, otherwise allocate one.
 989          */
 990         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
 991                 const struct mlx5_priv *opriv =
 992                         rte_eth_devices[port_id].data->dev_private;
 993
 994                 if (!opriv ||
 995                     opriv->sh != priv->sh ||
 996                         opriv->domain_id ==
 997                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
 998                         continue;
 999                 priv->domain_id = opriv->domain_id;
1000                 break;
1001         }
1002         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1003                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1004                 if (err) {
1005                         err = rte_errno;
1006                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1007                                 strerror(rte_errno));
1008                         goto error;
1009                 }
1010                 own_domain_id = 1;
1011         }
1012         /* Override some values set by hardware configuration. */
1013         mlx5_args(config, dpdk_dev->devargs);
1014         err = mlx5_dev_check_sibling_config(priv, config);
1015         if (err)
1016                 goto error;
1017         config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1018                             IBV_DEVICE_RAW_IP_CSUM);
1019         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1020                 (config->hw_csum ? "" : "not "));
1021 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1022         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1023         DRV_LOG(DEBUG, "counters are not supported");
1024 #endif
1025 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
1026         if (config->dv_flow_en) {
1027                 DRV_LOG(WARNING, "DV flow is not supported");
1028                 config->dv_flow_en = 0;
1029         }
1030 #endif
1031         config->ind_table_max_size =
1032                 sh->device_attr.max_rwq_indirection_table_size;
1033         /*
1034          * Remove this check once DPDK supports larger/variable
1035          * indirection tables.
1036          */
1037         if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1038                 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1039         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1040                 config->ind_table_max_size);
1041         config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1042                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1043         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1044                 (config->hw_vlan_strip ? "" : "not "));
1045         config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1046                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1047 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1048         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1049 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1050         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1051                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1052 #endif
1053         if (config->hw_padding && !hw_padding) {
1054                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1055                 config->hw_padding = 0;
1056         } else if (config->hw_padding) {
1057                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1058         }
1059         config->tso = (sh->device_attr.max_tso > 0 &&
1060                       (sh->device_attr.tso_supported_qpts &
1061                        (1 << IBV_QPT_RAW_PACKET)));
1062         if (config->tso)
1063                 config->tso_max_payload_sz = sh->device_attr.max_tso;
1064         /*
1065          * MPW is disabled by default, while the Enhanced MPW is enabled
1066          * by default.
1067          */
1068         if (config->mps == MLX5_ARG_UNSET)
1069                 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1070                                                           MLX5_MPW_DISABLED;
1071         else
1072                 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
1073         DRV_LOG(INFO, "%sMPS is %s",
1074                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1075                 config->mps == MLX5_MPW ? "legacy " : "",
1076                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1077         if (config->cqe_comp && !cqe_comp) {
1078                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1079                 config->cqe_comp = 0;
1080         }
1081         if (config->cqe_pad && !cqe_pad) {
1082                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1083                 config->cqe_pad = 0;
1084         } else if (config->cqe_pad) {
1085                 DRV_LOG(INFO, "Rx CQE padding is enabled");
1086         }
1087         if (config->devx) {
1088                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
1089                 if (err) {
1090                         err = -err;
1091                         goto error;
1092                 }
1093                 /* Check relax ordering support. */
1094                 if (config->hca_attr.relaxed_ordering_write &&
1095                     config->hca_attr.relaxed_ordering_read  &&
1096                     !haswell_broadwell_cpu)
1097                         sh->cmng.relaxed_ordering = 1;
1098                 /* Check for LRO support. */
1099                 if (config->dest_tir && config->hca_attr.lro_cap &&
1100                     config->dv_flow_en) {
1101                         /* TBD check tunnel lro caps. */
1102                         config->lro.supported = config->hca_attr.lro_cap;
1103                         DRV_LOG(DEBUG, "Device supports LRO");
1104                         /*
1105                          * If LRO timeout is not configured by application,
1106                          * use the minimal supported value.
1107                          */
1108                         if (!config->lro.timeout)
1109                                 config->lro.timeout =
1110                                 config->hca_attr.lro_timer_supported_periods[0];
1111                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1112                                 config->lro.timeout);
1113                         DRV_LOG(DEBUG, "LRO minimal size of TCP segment "
1114                                 "required for coalescing is %d bytes",
1115                                 config->hca_attr.lro_min_mss_size);
1116                 }
1117 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
1118                 if (config->hca_attr.qos.sup &&
1119                     config->hca_attr.qos.srtcm_sup &&
1120                     config->dv_flow_en) {
1121                         uint8_t reg_c_mask =
1122                                 config->hca_attr.qos.flow_meter_reg_c_ids;
1123                         /*
1124                          * Meter needs two REG_C's for color match and pre-sfx
1125                          * flow match. Here get the REG_C for color match.
1126                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
1127                          */
1128                         reg_c_mask &= 0xfc;
1129                         if (__builtin_popcount(reg_c_mask) < 1) {
1130                                 priv->mtr_en = 0;
1131                                 DRV_LOG(WARNING, "No available register for"
1132                                         " meter.");
1133                         } else {
1134                                 priv->mtr_color_reg = ffs(reg_c_mask) - 1 +
1135                                                       REG_C_0;
1136                                 priv->mtr_en = 1;
1137                                 priv->mtr_reg_share =
1138                                       config->hca_attr.qos.flow_meter_reg_share;
1139                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1140                                         priv->mtr_color_reg);
1141                         }
1142                 }
1143 #endif
1144 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1145                 if (config->hca_attr.log_max_ft_sampler_num > 0  &&
1146                     config->dv_flow_en) {
1147                         priv->sampler_en = 1;
1148                         DRV_LOG(DEBUG, "The Sampler enabled!\n");
1149                 } else {
1150                         priv->sampler_en = 0;
1151                         if (!config->hca_attr.log_max_ft_sampler_num)
1152                                 DRV_LOG(WARNING, "No available register for"
1153                                                 " Sampler.");
1154                         else
1155                                 DRV_LOG(DEBUG, "DV flow is not supported!\n");
1156                 }
1157 #endif
1158         }
1159         if (config->tx_pp) {
1160                 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1161                         config->hca_attr.dev_freq_khz);
1162                 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1163                         config->hca_attr.qos.packet_pacing ? "" : "not ");
1164                 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1165                         config->hca_attr.cross_channel ? "" : "not ");
1166                 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1167                         config->hca_attr.wqe_index_ignore ? "" : "not ");
1168                 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1169                         config->hca_attr.non_wire_sq ? "" : "not ");
1170                 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1171                         config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1172                         config->hca_attr.log_max_static_sq_wq);
1173                 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1174                         config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1175                 if (!config->devx) {
1176                         DRV_LOG(ERR, "DevX is required for packet pacing");
1177                         err = ENODEV;
1178                         goto error;
1179                 }
1180                 if (!config->hca_attr.qos.packet_pacing) {
1181                         DRV_LOG(ERR, "Packet pacing is not supported");
1182                         err = ENODEV;
1183                         goto error;
1184                 }
1185                 if (!config->hca_attr.cross_channel) {
1186                         DRV_LOG(ERR, "Cross channel operations are"
1187                                      " required for packet pacing");
1188                         err = ENODEV;
1189                         goto error;
1190                 }
1191                 if (!config->hca_attr.wqe_index_ignore) {
1192                         DRV_LOG(ERR, "WQE index ignore feature is"
1193                                      " required for packet pacing");
1194                         err = ENODEV;
1195                         goto error;
1196                 }
1197                 if (!config->hca_attr.non_wire_sq) {
1198                         DRV_LOG(ERR, "Non-wire SQ feature is"
1199                                      " required for packet pacing");
1200                         err = ENODEV;
1201                         goto error;
1202                 }
1203                 if (!config->hca_attr.log_max_static_sq_wq) {
1204                         DRV_LOG(ERR, "Static WQE SQ feature is"
1205                                      " required for packet pacing");
1206                         err = ENODEV;
1207                         goto error;
1208                 }
1209                 if (!config->hca_attr.qos.wqe_rate_pp) {
1210                         DRV_LOG(ERR, "WQE rate mode is required"
1211                                      " for packet pacing");
1212                         err = ENODEV;
1213                         goto error;
1214                 }
1215 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1216                 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1217                              " can't create queues for packet pacing");
1218                 err = ENODEV;
1219                 goto error;
1220 #endif
1221         }
1222         if (config->devx) {
1223                 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1224
1225                 err = config->hca_attr.access_register_user ?
1226                         mlx5_devx_cmd_register_read
1227                                 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1228                                 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1229                 if (!err) {
1230                         uint32_t ts_mode;
1231
1232                         /* MTUTC register is read successfully. */
1233                         ts_mode = MLX5_GET(register_mtutc, reg,
1234                                            time_stamp_mode);
1235                         if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1236                                 config->rt_timestamp = 1;
1237                 } else {
1238                         /* Kernel does not support register reading. */
1239                         if (config->hca_attr.dev_freq_khz ==
1240                                                  (NS_PER_S / MS_PER_S))
1241                                 config->rt_timestamp = 1;
1242                 }
1243         }
1244         /*
1245          * If HW has bug working with tunnel packet decapsulation and
1246          * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1247          * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1248          */
1249         if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1250                 config->hw_fcs_strip = 0;
1251         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1252                 (config->hw_fcs_strip ? "" : "not "));
1253         if (config->mprq.enabled && mprq) {
1254                 if (config->mprq.stride_num_n &&
1255                     (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1256                      config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1257                         config->mprq.stride_num_n =
1258                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1259                                                 mprq_min_stride_num_n),
1260                                         mprq_max_stride_num_n);
1261                         DRV_LOG(WARNING,
1262                                 "the number of strides"
1263                                 " for Multi-Packet RQ is out of range,"
1264                                 " setting default value (%u)",
1265                                 1 << config->mprq.stride_num_n);
1266                 }
1267                 if (config->mprq.stride_size_n &&
1268                     (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1269                      config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1270                         config->mprq.stride_size_n =
1271                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1272                                                 mprq_min_stride_size_n),
1273                                         mprq_max_stride_size_n);
1274                         DRV_LOG(WARNING,
1275                                 "the size of a stride"
1276                                 " for Multi-Packet RQ is out of range,"
1277                                 " setting default value (%u)",
1278                                 1 << config->mprq.stride_size_n);
1279                 }
1280                 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1281                 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1282         } else if (config->mprq.enabled && !mprq) {
1283                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1284                 config->mprq.enabled = 0;
1285         }
1286         if (config->max_dump_files_num == 0)
1287                 config->max_dump_files_num = 128;
1288         eth_dev = rte_eth_dev_allocate(name);
1289         if (eth_dev == NULL) {
1290                 DRV_LOG(ERR, "can not allocate rte ethdev");
1291                 err = ENOMEM;
1292                 goto error;
1293         }
1294         if (priv->representor) {
1295                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1296                 eth_dev->data->representor_id = priv->representor_id;
1297         }
1298         /*
1299          * Store associated network device interface index. This index
1300          * is permanent throughout the lifetime of device. So, we may store
1301          * the ifindex here and use the cached value further.
1302          */
1303         MLX5_ASSERT(spawn->ifindex);
1304         priv->if_index = spawn->ifindex;
1305         if (priv->pf_bond >= 0 && priv->master) {
1306                 /* Get bond interface info */
1307                 err = mlx5_sysfs_bond_info(priv->if_index,
1308                                      &priv->bond_ifindex,
1309                                      priv->bond_name);
1310                 if (err)
1311                         DRV_LOG(ERR, "unable to get bond info: %s",
1312                                 strerror(rte_errno));
1313                 else
1314                         DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
1315                                 priv->if_index, priv->bond_ifindex,
1316                                 priv->bond_name);
1317         }
1318         eth_dev->data->dev_private = priv;
1319         priv->dev_data = eth_dev->data;
1320         eth_dev->data->mac_addrs = priv->mac;
1321         eth_dev->device = dpdk_dev;
1322         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1323         /* Configure the first MAC address by default. */
1324         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1325                 DRV_LOG(ERR,
1326                         "port %u cannot get MAC address, is mlx5_en"
1327                         " loaded? (errno: %s)",
1328                         eth_dev->data->port_id, strerror(rte_errno));
1329                 err = ENODEV;
1330                 goto error;
1331         }
1332         DRV_LOG(INFO,
1333                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1334                 eth_dev->data->port_id,
1335                 mac.addr_bytes[0], mac.addr_bytes[1],
1336                 mac.addr_bytes[2], mac.addr_bytes[3],
1337                 mac.addr_bytes[4], mac.addr_bytes[5]);
1338 #ifdef RTE_LIBRTE_MLX5_DEBUG
1339         {
1340                 char ifname[IF_NAMESIZE];
1341
1342                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1343                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1344                                 eth_dev->data->port_id, ifname);
1345                 else
1346                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1347                                 eth_dev->data->port_id);
1348         }
1349 #endif
1350         /* Get actual MTU if possible. */
1351         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1352         if (err) {
1353                 err = rte_errno;
1354                 goto error;
1355         }
1356         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1357                 priv->mtu);
1358         /* Initialize burst functions to prevent crashes before link-up. */
1359         eth_dev->rx_pkt_burst = removed_rx_burst;
1360         eth_dev->tx_pkt_burst = removed_tx_burst;
1361         eth_dev->dev_ops = &mlx5_os_dev_ops;
1362         eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1363         eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1364         eth_dev->rx_queue_count = mlx5_rx_queue_count;
1365         /* Register MAC address. */
1366         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1367         if (config->vf && config->vf_nl_en)
1368                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1369                                       mlx5_ifindex(eth_dev),
1370                                       eth_dev->data->mac_addrs,
1371                                       MLX5_MAX_MAC_ADDRESSES);
1372         priv->flows = 0;
1373         priv->ctrl_flows = 0;
1374         rte_spinlock_init(&priv->flow_list_lock);
1375         TAILQ_INIT(&priv->flow_meters);
1376         TAILQ_INIT(&priv->flow_meter_profiles);
1377         /* Hint libmlx5 to use PMD allocator for data plane resources */
1378         mlx5_glue->dv_set_context_attr(sh->ctx,
1379                         MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1380                         (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
1381                                 .alloc = &mlx5_alloc_verbs_buf,
1382                                 .free = &mlx5_free_verbs_buf,
1383                                 .data = priv,
1384                         }));
1385         /* Bring Ethernet device up. */
1386         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1387                 eth_dev->data->port_id);
1388         mlx5_set_link_up(eth_dev);
1389         /*
1390          * Even though the interrupt handler is not installed yet,
1391          * interrupts will still trigger on the async_fd from
1392          * Verbs context returned by ibv_open_device().
1393          */
1394         mlx5_link_update(eth_dev, 0);
1395 #ifdef HAVE_MLX5DV_DR_ESWITCH
1396         if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1397               (switch_info->representor || switch_info->master)))
1398                 config->dv_esw_en = 0;
1399 #else
1400         config->dv_esw_en = 0;
1401 #endif
1402         /* Detect minimal data bytes to inline. */
1403         mlx5_set_min_inline(spawn, config);
1404         /* Store device configuration on private structure. */
1405         priv->config = *config;
1406         /* Create context for virtual machine VLAN workaround. */
1407         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1408         if (config->dv_flow_en) {
1409                 err = mlx5_alloc_shared_dr(priv);
1410                 if (err)
1411                         goto error;
1412         }
1413         if (config->devx && config->dv_flow_en && config->dest_tir) {
1414                 priv->obj_ops = devx_obj_ops;
1415                 priv->obj_ops.drop_action_create =
1416                                                 ibv_obj_ops.drop_action_create;
1417                 priv->obj_ops.drop_action_destroy =
1418                                                 ibv_obj_ops.drop_action_destroy;
1419 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1420                 priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify;
1421 #else
1422                 if (config->dv_esw_en)
1423                         priv->obj_ops.txq_obj_modify =
1424                                                 ibv_obj_ops.txq_obj_modify;
1425 #endif
1426                 /* Use specific wrappers for Tx object. */
1427                 priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;
1428                 priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;
1429
1430         } else {
1431                 priv->obj_ops = ibv_obj_ops;
1432         }
1433         priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
1434         if (!priv->drop_queue.hrxq)
1435                 goto error;
1436         /* Supported Verbs flow priority number detection. */
1437         err = mlx5_flow_discover_priorities(eth_dev);
1438         if (err < 0) {
1439                 err = -err;
1440                 goto error;
1441         }
1442         priv->config.flow_prio = err;
1443         if (!priv->config.dv_esw_en &&
1444             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1445                 DRV_LOG(WARNING, "metadata mode %u is not supported "
1446                                  "(no E-Switch)", priv->config.dv_xmeta_en);
1447                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1448         }
1449         mlx5_set_metadata_mask(eth_dev);
1450         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1451             !priv->sh->dv_regc0_mask) {
1452                 DRV_LOG(ERR, "metadata mode %u is not supported "
1453                              "(no metadata reg_c[0] is available)",
1454                              priv->config.dv_xmeta_en);
1455                         err = ENOTSUP;
1456                         goto error;
1457         }
1458         /* Query availability of metadata reg_c's. */
1459         err = mlx5_flow_discover_mreg_c(eth_dev);
1460         if (err < 0) {
1461                 err = -err;
1462                 goto error;
1463         }
1464         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1465                 DRV_LOG(DEBUG,
1466                         "port %u extensive metadata register is not supported",
1467                         eth_dev->data->port_id);
1468                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1469                         DRV_LOG(ERR, "metadata mode %u is not supported "
1470                                      "(no metadata registers available)",
1471                                      priv->config.dv_xmeta_en);
1472                         err = ENOTSUP;
1473                         goto error;
1474                 }
1475         }
1476         if (priv->config.dv_flow_en &&
1477             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1478             mlx5_flow_ext_mreg_supported(eth_dev) &&
1479             priv->sh->dv_regc0_mask) {
1480                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1481                                                       MLX5_FLOW_MREG_HTABLE_SZ,
1482                                                       0, 0,
1483                                                       NULL, NULL, NULL);
1484                 if (!priv->mreg_cp_tbl) {
1485                         err = ENOMEM;
1486                         goto error;
1487                 }
1488         }
1489         mlx5_flow_counter_mode_config(eth_dev);
1490         return eth_dev;
1491 error:
1492         if (priv) {
1493                 if (priv->mreg_cp_tbl)
1494                         mlx5_hlist_destroy(priv->mreg_cp_tbl);
1495                 if (priv->sh)
1496                         mlx5_os_free_shared_dr(priv);
1497                 if (priv->nl_socket_route >= 0)
1498                         close(priv->nl_socket_route);
1499                 if (priv->nl_socket_rdma >= 0)
1500                         close(priv->nl_socket_rdma);
1501                 if (priv->vmwa_context)
1502                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1503                 if (eth_dev && priv->drop_queue.hrxq)
1504                         mlx5_drop_action_destroy(eth_dev);
1505                 if (own_domain_id)
1506                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1507                 mlx5_free(priv);
1508                 if (eth_dev != NULL)
1509                         eth_dev->data->dev_private = NULL;
1510         }
1511         if (eth_dev != NULL) {
1512                 /* mac_addrs must not be freed alone because part of
1513                  * dev_private
1514                  **/
1515                 eth_dev->data->mac_addrs = NULL;
1516                 rte_eth_dev_release_port(eth_dev);
1517         }
1518         if (sh)
1519                 mlx5_free_shared_dev_ctx(sh);
1520         MLX5_ASSERT(err > 0);
1521         rte_errno = err;
1522         return NULL;
1523 }
1524
1525 /**
1526  * Comparison callback to sort device data.
1527  *
1528  * This is meant to be used with qsort().
1529  *
1530  * @param a[in]
1531  *   Pointer to pointer to first data object.
1532  * @param b[in]
1533  *   Pointer to pointer to second data object.
1534  *
1535  * @return
1536  *   0 if both objects are equal, less than 0 if the first argument is less
1537  *   than the second, greater than 0 otherwise.
1538  */
1539 static int
1540 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1541 {
1542         const struct mlx5_switch_info *si_a =
1543                 &((const struct mlx5_dev_spawn_data *)a)->info;
1544         const struct mlx5_switch_info *si_b =
1545                 &((const struct mlx5_dev_spawn_data *)b)->info;
1546         int ret;
1547
1548         /* Master device first. */
1549         ret = si_b->master - si_a->master;
1550         if (ret)
1551                 return ret;
1552         /* Then representor devices. */
1553         ret = si_b->representor - si_a->representor;
1554         if (ret)
1555                 return ret;
1556         /* Unidentified devices come last in no specific order. */
1557         if (!si_a->representor)
1558                 return 0;
1559         /* Order representors by name. */
1560         return si_a->port_name - si_b->port_name;
1561 }
1562
1563 /**
1564  * Match PCI information for possible slaves of bonding device.
1565  *
1566  * @param[in] ibv_dev
1567  *   Pointer to Infiniband device structure.
1568  * @param[in] pci_dev
1569  *   Pointer to PCI device structure to match PCI address.
1570  * @param[in] nl_rdma
1571  *   Netlink RDMA group socket handle.
1572  *
1573  * @return
1574  *   negative value if no bonding device found, otherwise
1575  *   positive index of slave PF in bonding.
1576  */
1577 static int
1578 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1579                            const struct rte_pci_device *pci_dev,
1580                            int nl_rdma)
1581 {
1582         char ifname[IF_NAMESIZE + 1];
1583         unsigned int ifindex;
1584         unsigned int np, i;
1585         FILE *file = NULL;
1586         int pf = -1;
1587
1588         /*
1589          * Try to get master device name. If something goes
1590          * wrong suppose the lack of kernel support and no
1591          * bonding devices.
1592          */
1593         if (nl_rdma < 0)
1594                 return -1;
1595         if (!strstr(ibv_dev->name, "bond"))
1596                 return -1;
1597         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
1598         if (!np)
1599                 return -1;
1600         /*
1601          * The Master device might not be on the predefined
1602          * port (not on port index 1, it is not garanted),
1603          * we have to scan all Infiniband device port and
1604          * find master.
1605          */
1606         for (i = 1; i <= np; ++i) {
1607                 /* Check whether Infiniband port is populated. */
1608                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
1609                 if (!ifindex)
1610                         continue;
1611                 if (!if_indextoname(ifindex, ifname))
1612                         continue;
1613                 /* Try to read bonding slave names from sysfs. */
1614                 MKSTR(slaves,
1615                       "/sys/class/net/%s/master/bonding/slaves", ifname);
1616                 file = fopen(slaves, "r");
1617                 if (file)
1618                         break;
1619         }
1620         if (!file)
1621                 return -1;
1622         /* Use safe format to check maximal buffer length. */
1623         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1624         while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1625                 char tmp_str[IF_NAMESIZE + 32];
1626                 struct rte_pci_addr pci_addr;
1627                 struct mlx5_switch_info info;
1628
1629                 /* Process slave interface names in the loop. */
1630                 snprintf(tmp_str, sizeof(tmp_str),
1631                          "/sys/class/net/%s", ifname);
1632                 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
1633                         DRV_LOG(WARNING, "can not get PCI address"
1634                                          " for netdev \"%s\"", ifname);
1635                         continue;
1636                 }
1637                 if (pci_dev->addr.domain != pci_addr.domain ||
1638                     pci_dev->addr.bus != pci_addr.bus ||
1639                     pci_dev->addr.devid != pci_addr.devid ||
1640                     pci_dev->addr.function != pci_addr.function)
1641                         continue;
1642                 /* Slave interface PCI address match found. */
1643                 fclose(file);
1644                 snprintf(tmp_str, sizeof(tmp_str),
1645                          "/sys/class/net/%s/phys_port_name", ifname);
1646                 file = fopen(tmp_str, "rb");
1647                 if (!file)
1648                         break;
1649                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1650                 if (fscanf(file, "%32s", tmp_str) == 1)
1651                         mlx5_translate_port_name(tmp_str, &info);
1652                 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
1653                     info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1654                         pf = info.port_name;
1655                 break;
1656         }
1657         if (file)
1658                 fclose(file);
1659         return pf;
1660 }
1661
1662 /**
1663  * DPDK callback to register a PCI device.
1664  *
1665  * This function spawns Ethernet devices out of a given PCI device.
1666  *
1667  * @param[in] pci_drv
1668  *   PCI driver structure (mlx5_driver).
1669  * @param[in] pci_dev
1670  *   PCI device information.
1671  *
1672  * @return
1673  *   0 on success, a negative errno value otherwise and rte_errno is set.
1674  */
1675 int
1676 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1677                   struct rte_pci_device *pci_dev)
1678 {
1679         struct ibv_device **ibv_list;
1680         /*
1681          * Number of found IB Devices matching with requested PCI BDF.
1682          * nd != 1 means there are multiple IB devices over the same
1683          * PCI device and we have representors and master.
1684          */
1685         unsigned int nd = 0;
1686         /*
1687          * Number of found IB device Ports. nd = 1 and np = 1..n means
1688          * we have the single multiport IB device, and there may be
1689          * representors attached to some of found ports.
1690          */
1691         unsigned int np = 0;
1692         /*
1693          * Number of DPDK ethernet devices to Spawn - either over
1694          * multiple IB devices or multiple ports of single IB device.
1695          * Actually this is the number of iterations to spawn.
1696          */
1697         unsigned int ns = 0;
1698         /*
1699          * Bonding device
1700          *   < 0 - no bonding device (single one)
1701          *  >= 0 - bonding device (value is slave PF index)
1702          */
1703         int bd = -1;
1704         struct mlx5_dev_spawn_data *list = NULL;
1705         struct mlx5_dev_config dev_config;
1706         unsigned int dev_config_vf;
1707         int ret;
1708
1709         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1710                 mlx5_pmd_socket_init();
1711         ret = mlx5_init_once();
1712         if (ret) {
1713                 DRV_LOG(ERR, "unable to init PMD global data: %s",
1714                         strerror(rte_errno));
1715                 return -rte_errno;
1716         }
1717         errno = 0;
1718         ibv_list = mlx5_glue->get_device_list(&ret);
1719         if (!ibv_list) {
1720                 rte_errno = errno ? errno : ENOSYS;
1721                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1722                 return -rte_errno;
1723         }
1724         /*
1725          * First scan the list of all Infiniband devices to find
1726          * matching ones, gathering into the list.
1727          */
1728         struct ibv_device *ibv_match[ret + 1];
1729         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
1730         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1731         unsigned int i;
1732
1733         while (ret-- > 0) {
1734                 struct rte_pci_addr pci_addr;
1735
1736                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1737                 bd = mlx5_device_bond_pci_match
1738                                 (ibv_list[ret], pci_dev, nl_rdma);
1739                 if (bd >= 0) {
1740                         /*
1741                          * Bonding device detected. Only one match is allowed,
1742                          * the bonding is supported over multi-port IB device,
1743                          * there should be no matches on representor PCI
1744                          * functions or non VF LAG bonding devices with
1745                          * specified address.
1746                          */
1747                         if (nd) {
1748                                 DRV_LOG(ERR,
1749                                         "multiple PCI match on bonding device"
1750                                         "\"%s\" found", ibv_list[ret]->name);
1751                                 rte_errno = ENOENT;
1752                                 ret = -rte_errno;
1753                                 goto exit;
1754                         }
1755                         DRV_LOG(INFO, "PCI information matches for"
1756                                       " slave %d bonding device \"%s\"",
1757                                       bd, ibv_list[ret]->name);
1758                         ibv_match[nd++] = ibv_list[ret];
1759                         break;
1760                 }
1761                 if (mlx5_dev_to_pci_addr
1762                         (ibv_list[ret]->ibdev_path, &pci_addr))
1763                         continue;
1764                 if (pci_dev->addr.domain != pci_addr.domain ||
1765                     pci_dev->addr.bus != pci_addr.bus ||
1766                     pci_dev->addr.devid != pci_addr.devid ||
1767                     pci_dev->addr.function != pci_addr.function)
1768                         continue;
1769                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1770                         ibv_list[ret]->name);
1771                 ibv_match[nd++] = ibv_list[ret];
1772         }
1773         ibv_match[nd] = NULL;
1774         if (!nd) {
1775                 /* No device matches, just complain and bail out. */
1776                 DRV_LOG(WARNING,
1777                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
1778                         " are kernel drivers loaded?",
1779                         pci_dev->addr.domain, pci_dev->addr.bus,
1780                         pci_dev->addr.devid, pci_dev->addr.function);
1781                 rte_errno = ENOENT;
1782                 ret = -rte_errno;
1783                 goto exit;
1784         }
1785         if (nd == 1) {
1786                 /*
1787                  * Found single matching device may have multiple ports.
1788                  * Each port may be representor, we have to check the port
1789                  * number and check the representors existence.
1790                  */
1791                 if (nl_rdma >= 0)
1792                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1793                 if (!np)
1794                         DRV_LOG(WARNING, "can not get IB device \"%s\""
1795                                          " ports number", ibv_match[0]->name);
1796                 if (bd >= 0 && !np) {
1797                         DRV_LOG(ERR, "can not get ports"
1798                                      " for bonding device");
1799                         rte_errno = ENOENT;
1800                         ret = -rte_errno;
1801                         goto exit;
1802                 }
1803         }
1804 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
1805         if (bd >= 0) {
1806                 /*
1807                  * This may happen if there is VF LAG kernel support and
1808                  * application is compiled with older rdma_core library.
1809                  */
1810                 DRV_LOG(ERR,
1811                         "No kernel/verbs support for VF LAG bonding found.");
1812                 rte_errno = ENOTSUP;
1813                 ret = -rte_errno;
1814                 goto exit;
1815         }
1816 #endif
1817         /*
1818          * Now we can determine the maximal
1819          * amount of devices to be spawned.
1820          */
1821         list = mlx5_malloc(MLX5_MEM_ZERO,
1822                            sizeof(struct mlx5_dev_spawn_data) *
1823                            (np ? np : nd),
1824                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1825         if (!list) {
1826                 DRV_LOG(ERR, "spawn data array allocation failure");
1827                 rte_errno = ENOMEM;
1828                 ret = -rte_errno;
1829                 goto exit;
1830         }
1831         if (bd >= 0 || np > 1) {
1832                 /*
1833                  * Single IB device with multiple ports found,
1834                  * it may be E-Switch master device and representors.
1835                  * We have to perform identification through the ports.
1836                  */
1837                 MLX5_ASSERT(nl_rdma >= 0);
1838                 MLX5_ASSERT(ns == 0);
1839                 MLX5_ASSERT(nd == 1);
1840                 MLX5_ASSERT(np);
1841                 for (i = 1; i <= np; ++i) {
1842                         list[ns].max_port = np;
1843                         list[ns].phys_port = i;
1844                         list[ns].phys_dev = ibv_match[0];
1845                         list[ns].eth_dev = NULL;
1846                         list[ns].pci_dev = pci_dev;
1847                         list[ns].pf_bond = bd;
1848                         list[ns].ifindex = mlx5_nl_ifindex
1849                                 (nl_rdma,
1850                                 mlx5_os_get_dev_device_name
1851                                                 (list[ns].phys_dev), i);
1852                         if (!list[ns].ifindex) {
1853                                 /*
1854                                  * No network interface index found for the
1855                                  * specified port, it means there is no
1856                                  * representor on this port. It's OK,
1857                                  * there can be disabled ports, for example
1858                                  * if sriov_numvfs < sriov_totalvfs.
1859                                  */
1860                                 continue;
1861                         }
1862                         ret = -1;
1863                         if (nl_route >= 0)
1864                                 ret = mlx5_nl_switch_info
1865                                                (nl_route,
1866                                                 list[ns].ifindex,
1867                                                 &list[ns].info);
1868                         if (ret || (!list[ns].info.representor &&
1869                                     !list[ns].info.master)) {
1870                                 /*
1871                                  * We failed to recognize representors with
1872                                  * Netlink, let's try to perform the task
1873                                  * with sysfs.
1874                                  */
1875                                 ret =  mlx5_sysfs_switch_info
1876                                                 (list[ns].ifindex,
1877                                                  &list[ns].info);
1878                         }
1879                         if (!ret && bd >= 0) {
1880                                 switch (list[ns].info.name_type) {
1881                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
1882                                         if (list[ns].info.port_name == bd)
1883                                                 ns++;
1884                                         break;
1885                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
1886                                         /* Fallthrough */
1887                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
1888                                         if (list[ns].info.pf_num == bd)
1889                                                 ns++;
1890                                         break;
1891                                 default:
1892                                         break;
1893                                 }
1894                                 continue;
1895                         }
1896                         if (!ret && (list[ns].info.representor ^
1897                                      list[ns].info.master))
1898                                 ns++;
1899                 }
1900                 if (!ns) {
1901                         DRV_LOG(ERR,
1902                                 "unable to recognize master/representors"
1903                                 " on the IB device with multiple ports");
1904                         rte_errno = ENOENT;
1905                         ret = -rte_errno;
1906                         goto exit;
1907                 }
1908         } else {
1909                 /*
1910                  * The existence of several matching entries (nd > 1) means
1911                  * port representors have been instantiated. No existing Verbs
1912                  * call nor sysfs entries can tell them apart, this can only
1913                  * be done through Netlink calls assuming kernel drivers are
1914                  * recent enough to support them.
1915                  *
1916                  * In the event of identification failure through Netlink,
1917                  * try again through sysfs, then:
1918                  *
1919                  * 1. A single IB device matches (nd == 1) with single
1920                  *    port (np=0/1) and is not a representor, assume
1921                  *    no switch support.
1922                  *
1923                  * 2. Otherwise no safe assumptions can be made;
1924                  *    complain louder and bail out.
1925                  */
1926                 for (i = 0; i != nd; ++i) {
1927                         memset(&list[ns].info, 0, sizeof(list[ns].info));
1928                         list[ns].max_port = 1;
1929                         list[ns].phys_port = 1;
1930                         list[ns].phys_dev = ibv_match[i];
1931                         list[ns].eth_dev = NULL;
1932                         list[ns].pci_dev = pci_dev;
1933                         list[ns].pf_bond = -1;
1934                         list[ns].ifindex = 0;
1935                         if (nl_rdma >= 0)
1936                                 list[ns].ifindex = mlx5_nl_ifindex
1937                                 (nl_rdma,
1938                                 mlx5_os_get_dev_device_name
1939                                                 (list[ns].phys_dev), 1);
1940                         if (!list[ns].ifindex) {
1941                                 char ifname[IF_NAMESIZE];
1942
1943                                 /*
1944                                  * Netlink failed, it may happen with old
1945                                  * ib_core kernel driver (before 4.16).
1946                                  * We can assume there is old driver because
1947                                  * here we are processing single ports IB
1948                                  * devices. Let's try sysfs to retrieve
1949                                  * the ifindex. The method works for
1950                                  * master device only.
1951                                  */
1952                                 if (nd > 1) {
1953                                         /*
1954                                          * Multiple devices found, assume
1955                                          * representors, can not distinguish
1956                                          * master/representor and retrieve
1957                                          * ifindex via sysfs.
1958                                          */
1959                                         continue;
1960                                 }
1961                                 ret = mlx5_get_ifname_sysfs
1962                                         (ibv_match[i]->ibdev_path, ifname);
1963                                 if (!ret)
1964                                         list[ns].ifindex =
1965                                                 if_nametoindex(ifname);
1966                                 if (!list[ns].ifindex) {
1967                                         /*
1968                                          * No network interface index found
1969                                          * for the specified device, it means
1970                                          * there it is neither representor
1971                                          * nor master.
1972                                          */
1973                                         continue;
1974                                 }
1975                         }
1976                         ret = -1;
1977                         if (nl_route >= 0)
1978                                 ret = mlx5_nl_switch_info
1979                                                (nl_route,
1980                                                 list[ns].ifindex,
1981                                                 &list[ns].info);
1982                         if (ret || (!list[ns].info.representor &&
1983                                     !list[ns].info.master)) {
1984                                 /*
1985                                  * We failed to recognize representors with
1986                                  * Netlink, let's try to perform the task
1987                                  * with sysfs.
1988                                  */
1989                                 ret =  mlx5_sysfs_switch_info
1990                                                 (list[ns].ifindex,
1991                                                  &list[ns].info);
1992                         }
1993                         if (!ret && (list[ns].info.representor ^
1994                                      list[ns].info.master)) {
1995                                 ns++;
1996                         } else if ((nd == 1) &&
1997                                    !list[ns].info.representor &&
1998                                    !list[ns].info.master) {
1999                                 /*
2000                                  * Single IB device with
2001                                  * one physical port and
2002                                  * attached network device.
2003                                  * May be SRIOV is not enabled
2004                                  * or there is no representors.
2005                                  */
2006                                 DRV_LOG(INFO, "no E-Switch support detected");
2007                                 ns++;
2008                                 break;
2009                         }
2010                 }
2011                 if (!ns) {
2012                         DRV_LOG(ERR,
2013                                 "unable to recognize master/representors"
2014                                 " on the multiple IB devices");
2015                         rte_errno = ENOENT;
2016                         ret = -rte_errno;
2017                         goto exit;
2018                 }
2019         }
2020         MLX5_ASSERT(ns);
2021         /*
2022          * Sort list to probe devices in natural order for users convenience
2023          * (i.e. master first, then representors from lowest to highest ID).
2024          */
2025         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2026         /* Device specific configuration. */
2027         switch (pci_dev->id.device_id) {
2028         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2029         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2030         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2031         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2032         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2033         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2034         case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF:
2035                 dev_config_vf = 1;
2036                 break;
2037         default:
2038                 dev_config_vf = 0;
2039                 break;
2040         }
2041         for (i = 0; i != ns; ++i) {
2042                 uint32_t restore;
2043
2044                 /* Default configuration. */
2045                 memset(&dev_config, 0, sizeof(struct mlx5_dev_config));
2046                 dev_config.vf = dev_config_vf;
2047                 dev_config.mps = MLX5_ARG_UNSET;
2048                 dev_config.dbnc = MLX5_ARG_UNSET;
2049                 dev_config.rx_vec_en = 1;
2050                 dev_config.txq_inline_max = MLX5_ARG_UNSET;
2051                 dev_config.txq_inline_min = MLX5_ARG_UNSET;
2052                 dev_config.txq_inline_mpw = MLX5_ARG_UNSET;
2053                 dev_config.txqs_inline = MLX5_ARG_UNSET;
2054                 dev_config.vf_nl_en = 1;
2055                 dev_config.mr_ext_memseg_en = 1;
2056                 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
2057                 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
2058                 dev_config.dv_esw_en = 1;
2059                 dev_config.dv_flow_en = 1;
2060                 dev_config.decap_en = 1;
2061                 dev_config.log_hp_size = MLX5_ARG_UNSET;
2062                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2063                                                  &list[i],
2064                                                  &dev_config);
2065                 if (!list[i].eth_dev) {
2066                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2067                                 break;
2068                         /* Device is disabled or already spawned. Ignore it. */
2069                         continue;
2070                 }
2071                 restore = list[i].eth_dev->data->dev_flags;
2072                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2073                 /* Restore non-PCI flags cleared by the above call. */
2074                 list[i].eth_dev->data->dev_flags |= restore;
2075                 rte_eth_dev_probing_finish(list[i].eth_dev);
2076         }
2077         if (i != ns) {
2078                 DRV_LOG(ERR,
2079                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2080                         " encountering an error: %s",
2081                         pci_dev->addr.domain, pci_dev->addr.bus,
2082                         pci_dev->addr.devid, pci_dev->addr.function,
2083                         strerror(rte_errno));
2084                 ret = -rte_errno;
2085                 /* Roll back. */
2086                 while (i--) {
2087                         if (!list[i].eth_dev)
2088                                 continue;
2089                         mlx5_dev_close(list[i].eth_dev);
2090                         /* mac_addrs must not be freed because in dev_private */
2091                         list[i].eth_dev->data->mac_addrs = NULL;
2092                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2093                 }
2094                 /* Restore original error. */
2095                 rte_errno = -ret;
2096         } else {
2097                 ret = 0;
2098         }
2099 exit:
2100         /*
2101          * Do the routine cleanup:
2102          * - close opened Netlink sockets
2103          * - free allocated spawn data array
2104          * - free the Infiniband device list
2105          */
2106         if (nl_rdma >= 0)
2107                 close(nl_rdma);
2108         if (nl_route >= 0)
2109                 close(nl_route);
2110         if (list)
2111                 mlx5_free(list);
2112         MLX5_ASSERT(ibv_list);
2113         mlx5_glue->free_device_list(ibv_list);
2114         return ret;
2115 }
2116
2117 static int
2118 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
2119 {
2120         char *env;
2121         int value;
2122
2123         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2124         /* Get environment variable to store. */
2125         env = getenv(MLX5_SHUT_UP_BF);
2126         value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
2127         if (config->dbnc == MLX5_ARG_UNSET)
2128                 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
2129         else
2130                 setenv(MLX5_SHUT_UP_BF,
2131                        config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
2132         return value;
2133 }
2134
2135 static void
2136 mlx5_restore_doorbell_mapping_env(int value)
2137 {
2138         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2139         /* Restore the original environment variable state. */
2140         if (value == MLX5_ARG_UNSET)
2141                 unsetenv(MLX5_SHUT_UP_BF);
2142         else
2143                 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
2144 }
2145
2146 /**
2147  * Extract pdn of PD object using DV API.
2148  *
2149  * @param[in] pd
2150  *   Pointer to the verbs PD object.
2151  * @param[out] pdn
2152  *   Pointer to the PD object number variable.
2153  *
2154  * @return
2155  *   0 on success, error value otherwise.
2156  */
2157 int
2158 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
2159 {
2160 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2161         struct mlx5dv_obj obj;
2162         struct mlx5dv_pd pd_info;
2163         int ret = 0;
2164
2165         obj.pd.in = pd;
2166         obj.pd.out = &pd_info;
2167         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
2168         if (ret) {
2169                 DRV_LOG(DEBUG, "Fail to get PD object info");
2170                 return ret;
2171         }
2172         *pdn = pd_info.pdn;
2173         return 0;
2174 #else
2175         (void)pd;
2176         (void)pdn;
2177         return -ENOTSUP;
2178 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
2179 }
2180
2181 /**
2182  * Function API to open IB device.
2183  *
2184  * This function calls the Linux glue APIs to open a device.
2185  *
2186  * @param[in] spawn
2187  *   Pointer to the IB device attributes (name, port, etc).
2188  * @param[out] config
2189  *   Pointer to device configuration structure.
2190  * @param[out] sh
2191  *   Pointer to shared context structure.
2192  *
2193  * @return
2194  *   0 on success, a positive error value otherwise.
2195  */
2196 int
2197 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
2198                      const struct mlx5_dev_config *config,
2199                      struct mlx5_dev_ctx_shared *sh)
2200 {
2201         int dbmap_env;
2202         int err = 0;
2203
2204         sh->numa_node = spawn->pci_dev->device.numa_node;
2205         pthread_mutex_init(&sh->txpp.mutex, NULL);
2206         /*
2207          * Configure environment variable "MLX5_BF_SHUT_UP"
2208          * before the device creation. The rdma_core library
2209          * checks the variable at device creation and
2210          * stores the result internally.
2211          */
2212         dbmap_env = mlx5_config_doorbell_mapping_env(config);
2213         /* Try to open IB device with DV first, then usual Verbs. */
2214         errno = 0;
2215         sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
2216         if (sh->ctx) {
2217                 sh->devx = 1;
2218                 DRV_LOG(DEBUG, "DevX is supported");
2219                 /* The device is created, no need for environment. */
2220                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2221         } else {
2222                 /* The environment variable is still configured. */
2223                 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
2224                 err = errno ? errno : ENODEV;
2225                 /*
2226                  * The environment variable is not needed anymore,
2227                  * all device creation attempts are completed.
2228                  */
2229                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2230                 if (!sh->ctx)
2231                         return err;
2232                 DRV_LOG(DEBUG, "DevX is NOT supported");
2233                 err = 0;
2234         }
2235         return err;
2236 }
2237
2238 /**
2239  * Install shared asynchronous device events handler.
2240  * This function is implemented to support event sharing
2241  * between multiple ports of single IB device.
2242  *
2243  * @param sh
2244  *   Pointer to mlx5_dev_ctx_shared object.
2245  */
2246 void
2247 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2248 {
2249         int ret;
2250         int flags;
2251
2252         sh->intr_handle.fd = -1;
2253         flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
2254         ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
2255                     F_SETFL, flags | O_NONBLOCK);
2256         if (ret) {
2257                 DRV_LOG(INFO, "failed to change file descriptor async event"
2258                         " queue");
2259         } else {
2260                 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
2261                 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2262                 if (rte_intr_callback_register(&sh->intr_handle,
2263                                         mlx5_dev_interrupt_handler, sh)) {
2264                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2265                         sh->intr_handle.fd = -1;
2266                 }
2267         }
2268         if (sh->devx) {
2269 #ifdef HAVE_IBV_DEVX_ASYNC
2270                 sh->intr_handle_devx.fd = -1;
2271                 sh->devx_comp =
2272                         (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
2273                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2274                 if (!devx_comp) {
2275                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2276                         return;
2277                 }
2278                 flags = fcntl(devx_comp->fd, F_GETFL);
2279                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2280                 if (ret) {
2281                         DRV_LOG(INFO, "failed to change file descriptor"
2282                                 " devx comp");
2283                         return;
2284                 }
2285                 sh->intr_handle_devx.fd = devx_comp->fd;
2286                 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2287                 if (rte_intr_callback_register(&sh->intr_handle_devx,
2288                                         mlx5_dev_interrupt_handler_devx, sh)) {
2289                         DRV_LOG(INFO, "Fail to install the devx shared"
2290                                 " interrupt.");
2291                         sh->intr_handle_devx.fd = -1;
2292                 }
2293 #endif /* HAVE_IBV_DEVX_ASYNC */
2294         }
2295 }
2296
2297 /**
2298  * Uninstall shared asynchronous device events handler.
2299  * This function is implemented to support event sharing
2300  * between multiple ports of single IB device.
2301  *
2302  * @param dev
2303  *   Pointer to mlx5_dev_ctx_shared object.
2304  */
2305 void
2306 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2307 {
2308         if (sh->intr_handle.fd >= 0)
2309                 mlx5_intr_callback_unregister(&sh->intr_handle,
2310                                               mlx5_dev_interrupt_handler, sh);
2311 #ifdef HAVE_IBV_DEVX_ASYNC
2312         if (sh->intr_handle_devx.fd >= 0)
2313                 rte_intr_callback_unregister(&sh->intr_handle_devx,
2314                                   mlx5_dev_interrupt_handler_devx, sh);
2315         if (sh->devx_comp)
2316                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2317 #endif
2318 }
2319
2320 /**
2321  * Read statistics by a named counter.
2322  *
2323  * @param[in] priv
2324  *   Pointer to the private device data structure.
2325  * @param[in] ctr_name
2326  *   Pointer to the name of the statistic counter to read
2327  * @param[out] stat
2328  *   Pointer to read statistic value.
2329  * @return
2330  *   0 on success and stat is valud, 1 if failed to read the value
2331  *   rte_errno is set.
2332  *
2333  */
2334 int
2335 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2336                       uint64_t *stat)
2337 {
2338         int fd;
2339
2340         if (priv->sh) {
2341                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2342                       priv->sh->ibdev_path,
2343                       priv->dev_port,
2344                       ctr_name);
2345                 fd = open(path, O_RDONLY);
2346                 /*
2347                  * in switchdev the file location is not per port
2348                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2349                  */
2350                 if (fd == -1) {
2351                         MKSTR(path1, "%s/hw_counters/%s",
2352                               priv->sh->ibdev_path,
2353                               ctr_name);
2354                         fd = open(path1, O_RDONLY);
2355                 }
2356                 if (fd != -1) {
2357                         char buf[21] = {'\0'};
2358                         ssize_t n = read(fd, buf, sizeof(buf));
2359
2360                         close(fd);
2361                         if (n != -1) {
2362                                 *stat = strtoull(buf, NULL, 10);
2363                                 return 0;
2364                         }
2365                 }
2366         }
2367         *stat = 0;
2368         return 1;
2369 }
2370
2371 /**
2372  * Set the reg_mr and dereg_mr call backs
2373  *
2374  * @param reg_mr_cb[out]
2375  *   Pointer to reg_mr func
2376  * @param dereg_mr_cb[out]
2377  *   Pointer to dereg_mr func
2378  *
2379  */
2380 void
2381 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2382                       mlx5_dereg_mr_t *dereg_mr_cb)
2383 {
2384         *reg_mr_cb = mlx5_verbs_ops.reg_mr;
2385         *dereg_mr_cb = mlx5_verbs_ops.dereg_mr;
2386 }
2387
2388 /**
2389  * Remove a MAC address from device
2390  *
2391  * @param dev
2392  *   Pointer to Ethernet device structure.
2393  * @param index
2394  *   MAC address index.
2395  */
2396 void
2397 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2398 {
2399         struct mlx5_priv *priv = dev->data->dev_private;
2400         const int vf = priv->config.vf;
2401
2402         if (vf)
2403                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2404                                         mlx5_ifindex(dev), priv->mac_own,
2405                                         &dev->data->mac_addrs[index], index);
2406 }
2407
2408 /**
2409  * Adds a MAC address to the device
2410  *
2411  * @param dev
2412  *   Pointer to Ethernet device structure.
2413  * @param mac_addr
2414  *   MAC address to register.
2415  * @param index
2416  *   MAC address index.
2417  *
2418  * @return
2419  *   0 on success, a negative errno value otherwise
2420  */
2421 int
2422 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2423                      uint32_t index)
2424 {
2425         struct mlx5_priv *priv = dev->data->dev_private;
2426         const int vf = priv->config.vf;
2427         int ret = 0;
2428
2429         if (vf)
2430                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2431                                            mlx5_ifindex(dev), priv->mac_own,
2432                                            mac, index);
2433         return ret;
2434 }
2435
2436 /**
2437  * Modify a VF MAC address
2438  *
2439  * @param priv
2440  *   Pointer to device private data.
2441  * @param mac_addr
2442  *   MAC address to modify into.
2443  * @param iface_idx
2444  *   Net device interface index
2445  * @param vf_index
2446  *   VF index
2447  *
2448  * @return
2449  *   0 on success, a negative errno value otherwise
2450  */
2451 int
2452 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2453                            unsigned int iface_idx,
2454                            struct rte_ether_addr *mac_addr,
2455                            int vf_index)
2456 {
2457         return mlx5_nl_vf_mac_addr_modify
2458                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2459 }
2460
2461 /**
2462  * Set device promiscuous mode
2463  *
2464  * @param dev
2465  *   Pointer to Ethernet device structure.
2466  * @param enable
2467  *   0 - promiscuous is disabled, otherwise - enabled
2468  *
2469  * @return
2470  *   0 on success, a negative error value otherwise
2471  */
2472 int
2473 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2474 {
2475         struct mlx5_priv *priv = dev->data->dev_private;
2476
2477         return mlx5_nl_promisc(priv->nl_socket_route,
2478                                mlx5_ifindex(dev), !!enable);
2479 }
2480
2481 /**
2482  * Set device promiscuous mode
2483  *
2484  * @param dev
2485  *   Pointer to Ethernet device structure.
2486  * @param enable
2487  *   0 - all multicase is disabled, otherwise - enabled
2488  *
2489  * @return
2490  *   0 on success, a negative error value otherwise
2491  */
2492 int
2493 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2494 {
2495         struct mlx5_priv *priv = dev->data->dev_private;
2496
2497         return mlx5_nl_allmulti(priv->nl_socket_route,
2498                                 mlx5_ifindex(dev), !!enable);
2499 }
2500
2501 /**
2502  * Flush device MAC addresses
2503  *
2504  * @param dev
2505  *   Pointer to Ethernet device structure.
2506  *
2507  */
2508 void
2509 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2510 {
2511         struct mlx5_priv *priv = dev->data->dev_private;
2512
2513         mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2514                                dev->data->mac_addrs,
2515                                MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2516 }
2517
2518 const struct eth_dev_ops mlx5_os_dev_ops = {
2519         .dev_configure = mlx5_dev_configure,
2520         .dev_start = mlx5_dev_start,
2521         .dev_stop = mlx5_dev_stop,
2522         .dev_set_link_down = mlx5_set_link_down,
2523         .dev_set_link_up = mlx5_set_link_up,
2524         .dev_close = mlx5_dev_close,
2525         .promiscuous_enable = mlx5_promiscuous_enable,
2526         .promiscuous_disable = mlx5_promiscuous_disable,
2527         .allmulticast_enable = mlx5_allmulticast_enable,
2528         .allmulticast_disable = mlx5_allmulticast_disable,
2529         .link_update = mlx5_link_update,
2530         .stats_get = mlx5_stats_get,
2531         .stats_reset = mlx5_stats_reset,
2532         .xstats_get = mlx5_xstats_get,
2533         .xstats_reset = mlx5_xstats_reset,
2534         .xstats_get_names = mlx5_xstats_get_names,
2535         .fw_version_get = mlx5_fw_version_get,
2536         .dev_infos_get = mlx5_dev_infos_get,
2537         .read_clock = mlx5_txpp_read_clock,
2538         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2539         .vlan_filter_set = mlx5_vlan_filter_set,
2540         .rx_queue_setup = mlx5_rx_queue_setup,
2541         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2542         .tx_queue_setup = mlx5_tx_queue_setup,
2543         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2544         .rx_queue_release = mlx5_rx_queue_release,
2545         .tx_queue_release = mlx5_tx_queue_release,
2546         .rx_queue_start = mlx5_rx_queue_start,
2547         .rx_queue_stop = mlx5_rx_queue_stop,
2548         .tx_queue_start = mlx5_tx_queue_start,
2549         .tx_queue_stop = mlx5_tx_queue_stop,
2550         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2551         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2552         .mac_addr_remove = mlx5_mac_addr_remove,
2553         .mac_addr_add = mlx5_mac_addr_add,
2554         .mac_addr_set = mlx5_mac_addr_set,
2555         .set_mc_addr_list = mlx5_set_mc_addr_list,
2556         .mtu_set = mlx5_dev_set_mtu,
2557         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2558         .vlan_offload_set = mlx5_vlan_offload_set,
2559         .reta_update = mlx5_dev_rss_reta_update,
2560         .reta_query = mlx5_dev_rss_reta_query,
2561         .rss_hash_update = mlx5_rss_hash_update,
2562         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
2563         .filter_ctrl = mlx5_dev_filter_ctrl,
2564         .rxq_info_get = mlx5_rxq_info_get,
2565         .txq_info_get = mlx5_txq_info_get,
2566         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2567         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2568         .rx_queue_intr_enable = mlx5_rx_intr_enable,
2569         .rx_queue_intr_disable = mlx5_rx_intr_disable,
2570         .is_removed = mlx5_is_removed,
2571         .udp_tunnel_port_add  = mlx5_udp_tunnel_port_add,
2572         .get_module_info = mlx5_get_module_info,
2573         .get_module_eeprom = mlx5_get_module_eeprom,
2574         .hairpin_cap_get = mlx5_hairpin_cap_get,
2575         .mtr_ops_get = mlx5_flow_meter_ops_get,
2576         .hairpin_bind = mlx5_hairpin_bind,
2577         .hairpin_unbind = mlx5_hairpin_unbind,
2578         .hairpin_get_peer_ports = mlx5_hairpin_get_peer_ports,
2579         .hairpin_queue_peer_update = mlx5_hairpin_queue_peer_update,
2580         .hairpin_queue_peer_bind = mlx5_hairpin_queue_peer_bind,
2581         .hairpin_queue_peer_unbind = mlx5_hairpin_queue_peer_unbind,
2582 };
2583
2584 /* Available operations from secondary process. */
2585 const struct eth_dev_ops mlx5_os_dev_sec_ops = {
2586         .stats_get = mlx5_stats_get,
2587         .stats_reset = mlx5_stats_reset,
2588         .xstats_get = mlx5_xstats_get,
2589         .xstats_reset = mlx5_xstats_reset,
2590         .xstats_get_names = mlx5_xstats_get_names,
2591         .fw_version_get = mlx5_fw_version_get,
2592         .dev_infos_get = mlx5_dev_infos_get,
2593         .read_clock = mlx5_txpp_read_clock,
2594         .rx_queue_start = mlx5_rx_queue_start,
2595         .rx_queue_stop = mlx5_rx_queue_stop,
2596         .tx_queue_start = mlx5_tx_queue_start,
2597         .tx_queue_stop = mlx5_tx_queue_stop,
2598         .rxq_info_get = mlx5_rxq_info_get,
2599         .txq_info_get = mlx5_txq_info_get,
2600         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2601         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2602         .get_module_info = mlx5_get_module_info,
2603         .get_module_eeprom = mlx5_get_module_eeprom,
2604 };
2605
2606 /* Available operations in flow isolated mode. */
2607 const struct eth_dev_ops mlx5_os_dev_ops_isolate = {
2608         .dev_configure = mlx5_dev_configure,
2609         .dev_start = mlx5_dev_start,
2610         .dev_stop = mlx5_dev_stop,
2611         .dev_set_link_down = mlx5_set_link_down,
2612         .dev_set_link_up = mlx5_set_link_up,
2613         .dev_close = mlx5_dev_close,
2614         .promiscuous_enable = mlx5_promiscuous_enable,
2615         .promiscuous_disable = mlx5_promiscuous_disable,
2616         .allmulticast_enable = mlx5_allmulticast_enable,
2617         .allmulticast_disable = mlx5_allmulticast_disable,
2618         .link_update = mlx5_link_update,
2619         .stats_get = mlx5_stats_get,
2620         .stats_reset = mlx5_stats_reset,
2621         .xstats_get = mlx5_xstats_get,
2622         .xstats_reset = mlx5_xstats_reset,
2623         .xstats_get_names = mlx5_xstats_get_names,
2624         .fw_version_get = mlx5_fw_version_get,
2625         .dev_infos_get = mlx5_dev_infos_get,
2626         .read_clock = mlx5_txpp_read_clock,
2627         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2628         .vlan_filter_set = mlx5_vlan_filter_set,
2629         .rx_queue_setup = mlx5_rx_queue_setup,
2630         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2631         .tx_queue_setup = mlx5_tx_queue_setup,
2632         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2633         .rx_queue_release = mlx5_rx_queue_release,
2634         .tx_queue_release = mlx5_tx_queue_release,
2635         .rx_queue_start = mlx5_rx_queue_start,
2636         .rx_queue_stop = mlx5_rx_queue_stop,
2637         .tx_queue_start = mlx5_tx_queue_start,
2638         .tx_queue_stop = mlx5_tx_queue_stop,
2639         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2640         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2641         .mac_addr_remove = mlx5_mac_addr_remove,
2642         .mac_addr_add = mlx5_mac_addr_add,
2643         .mac_addr_set = mlx5_mac_addr_set,
2644         .set_mc_addr_list = mlx5_set_mc_addr_list,
2645         .mtu_set = mlx5_dev_set_mtu,
2646         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2647         .vlan_offload_set = mlx5_vlan_offload_set,
2648         .filter_ctrl = mlx5_dev_filter_ctrl,
2649         .rxq_info_get = mlx5_rxq_info_get,
2650         .txq_info_get = mlx5_txq_info_get,
2651         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2652         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2653         .rx_queue_intr_enable = mlx5_rx_intr_enable,
2654         .rx_queue_intr_disable = mlx5_rx_intr_disable,
2655         .is_removed = mlx5_is_removed,
2656         .get_module_info = mlx5_get_module_info,
2657         .get_module_eeprom = mlx5_get_module_eeprom,
2658         .hairpin_cap_get = mlx5_hairpin_cap_get,
2659         .mtr_ops_get = mlx5_flow_meter_ops_get,
2660         .hairpin_bind = mlx5_hairpin_bind,
2661         .hairpin_unbind = mlx5_hairpin_unbind,
2662         .hairpin_get_peer_ports = mlx5_hairpin_get_peer_ports,
2663         .hairpin_queue_peer_update = mlx5_hairpin_queue_peer_update,
2664         .hairpin_queue_peer_bind = mlx5_hairpin_queue_peer_bind,
2665         .hairpin_queue_peer_unbind = mlx5_hairpin_queue_peer_unbind,
2666 };