drivers/net/mlx5/linux/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2020 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12 #include <net/if.h>
  13 #include <linux/rtnetlink.h>
  14 #include <linux/sockios.h>
  15 #include <linux/ethtool.h>
  16 #include <fcntl.h>
  17
  18 #include <rte_malloc.h>
  19 #include <rte_ethdev_driver.h>
  20 #include <rte_ethdev_pci.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_common.h>
  24 #include <rte_kvargs.h>
  25 #include <rte_rwlock.h>
  26 #include <rte_spinlock.h>
  27 #include <rte_string_fns.h>
  28 #include <rte_alarm.h>
  29 #include <rte_eal_paging.h>
  30
  31 #include <mlx5_glue.h>
  32 #include <mlx5_devx_cmds.h>
  33 #include <mlx5_common.h>
  34 #include <mlx5_common_mp.h>
  35 #include <mlx5_common_mr.h>
  36 #include <mlx5_malloc.h>
  37
  38 #include "mlx5_defs.h"
  39 #include "mlx5.h"
  40 #include "mlx5_common_os.h"
  41 #include "mlx5_utils.h"
  42 #include "mlx5_rxtx.h"
  43 #include "mlx5_autoconf.h"
  44 #include "mlx5_mr.h"
  45 #include "mlx5_flow.h"
  46 #include "rte_pmd_mlx5.h"
  47 #include "mlx5_verbs.h"
  48 #include "mlx5_nl.h"
  49 #include "mlx5_devx.h"
  50
  51 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
  52
  53 #ifndef HAVE_IBV_MLX5_MOD_MPW
  54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
  55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
  56 #endif
  57
  58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
  59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
  60 #endif
  61
  62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  63
  64 /* Spinlock for mlx5_shared_data allocation. */
  65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  66
  67 /* Process local data for secondary processes. */
  68 static struct mlx5_local_data mlx5_local_data;
  69
  70 /**
  71  * Set the completion channel file descriptor interrupt as non-blocking.
  72  *
  73  * @param[in] rxq_obj
  74  *   Pointer to RQ channel object, which includes the channel fd
  75  *
  76  * @param[out] fd
  77  *   The file descriptor (representing the intetrrupt) used in this channel.
  78  *
  79  * @return
  80  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
  81  */
  82 int
  83 mlx5_os_set_nonblock_channel_fd(int fd)
  84 {
  85         int flags;
  86
  87         flags = fcntl(fd, F_GETFL);
  88         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
  89 }
  90
  91 /**
  92  * Get mlx5 device attributes. The glue function query_device_ex() is called
  93  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
  94  * device attributes from the glue out parameter.
  95  *
  96  * @param dev
  97  *   Pointer to ibv context.
  98  *
  99  * @param device_attr
 100  *   Pointer to mlx5 device attributes.
 101  *
 102  * @return
 103  *   0 on success, non zero error number otherwise
 104  */
 105 int
 106 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
 107 {
 108         int err;
 109         struct ibv_device_attr_ex attr_ex;
 110         memset(device_attr, 0, sizeof(*device_attr));
 111         err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
 112         if (err)
 113                 return err;
 114
 115         device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
 116         device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
 117         device_attr->max_sge = attr_ex.orig_attr.max_sge;
 118         device_attr->max_cq = attr_ex.orig_attr.max_cq;
 119         device_attr->max_qp = attr_ex.orig_attr.max_qp;
 120         device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
 121         device_attr->max_rwq_indirection_table_size =
 122                 attr_ex.rss_caps.max_rwq_indirection_table_size;
 123         device_attr->max_tso = attr_ex.tso_caps.max_tso;
 124         device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
 125
 126         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 127         err = mlx5_glue->dv_query_device(ctx, &dv_attr);
 128         if (err)
 129                 return err;
 130
 131         device_attr->flags = dv_attr.flags;
 132         device_attr->comp_mask = dv_attr.comp_mask;
 133 #ifdef HAVE_IBV_MLX5_MOD_SWP
 134         device_attr->sw_parsing_offloads =
 135                 dv_attr.sw_parsing_caps.sw_parsing_offloads;
 136 #endif
 137         device_attr->min_single_stride_log_num_of_bytes =
 138                 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
 139         device_attr->max_single_stride_log_num_of_bytes =
 140                 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
 141         device_attr->min_single_wqe_log_num_of_strides =
 142                 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
 143         device_attr->max_single_wqe_log_num_of_strides =
 144                 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
 145         device_attr->stride_supported_qpts =
 146                 dv_attr.striding_rq_caps.supported_qpts;
 147 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 148         device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
 149 #endif
 150
 151         return err;
 152 }
 153
 154 /**
 155  * Verbs callback to allocate a memory. This function should allocate the space
 156  * according to the size provided residing inside a huge page.
 157  * Please note that all allocation must respect the alignment from libmlx5
 158  * (i.e. currently rte_mem_page_size()).
 159  *
 160  * @param[in] size
 161  *   The size in bytes of the memory to allocate.
 162  * @param[in] data
 163  *   A pointer to the callback data.
 164  *
 165  * @return
 166  *   Allocated buffer, NULL otherwise and rte_errno is set.
 167  */
 168 static void *
 169 mlx5_alloc_verbs_buf(size_t size, void *data)
 170 {
 171         struct mlx5_priv *priv = data;
 172         void *ret;
 173         unsigned int socket = SOCKET_ID_ANY;
 174         size_t alignment = rte_mem_page_size();
 175         if (alignment == (size_t)-1) {
 176                 DRV_LOG(ERR, "Failed to get mem page size");
 177                 rte_errno = ENOMEM;
 178                 return NULL;
 179         }
 180
 181         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
 182                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 183
 184                 socket = ctrl->socket;
 185         } else if (priv->verbs_alloc_ctx.type ==
 186                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
 187                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 188
 189                 socket = ctrl->socket;
 190         }
 191         MLX5_ASSERT(data != NULL);
 192         ret = mlx5_malloc(0, size, alignment, socket);
 193         if (!ret && size)
 194                 rte_errno = ENOMEM;
 195         return ret;
 196 }
 197
 198 /**
 199  * Verbs callback to free a memory.
 200  *
 201  * @param[in] ptr
 202  *   A pointer to the memory to free.
 203  * @param[in] data
 204  *   A pointer to the callback data.
 205  */
 206 static void
 207 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 208 {
 209         MLX5_ASSERT(data != NULL);
 210         mlx5_free(ptr);
 211 }
 212
 213 /**
 214  * Initialize DR related data within private structure.
 215  * Routine checks the reference counter and does actual
 216  * resources creation/initialization only if counter is zero.
 217  *
 218  * @param[in] priv
 219  *   Pointer to the private device data structure.
 220  *
 221  * @return
 222  *   Zero on success, positive error code otherwise.
 223  */
 224 static int
 225 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 226 {
 227         struct mlx5_dev_ctx_shared *sh = priv->sh;
 228         char s[MLX5_HLIST_NAMESIZE];
 229         int err = 0;
 230
 231         if (!sh->flow_tbls)
 232                 err = mlx5_alloc_table_hash_list(priv);
 233         else
 234                 DRV_LOG(DEBUG, "sh->flow_tbls[%p] already created, reuse\n",
 235                         (void *)sh->flow_tbls);
 236         if (err)
 237                 return err;
 238         /* Create tags hash list table. */
 239         snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name);
 240         sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE);
 241         if (!sh->tag_table) {
 242                 DRV_LOG(ERR, "tags with hash creation failed.");
 243                 err = ENOMEM;
 244                 goto error;
 245         }
 246         snprintf(s, sizeof(s), "%s_hdr_modify", sh->ibdev_name);
 247         sh->modify_cmds = mlx5_hlist_create(s, MLX5_FLOW_HDR_MODIFY_HTABLE_SZ);
 248         if (!sh->modify_cmds) {
 249                 DRV_LOG(ERR, "hdr modify hash creation failed");
 250                 err = ENOMEM;
 251                 goto error;
 252         }
 253 #ifdef HAVE_MLX5DV_DR
 254         void *domain;
 255
 256         if (sh->dv_refcnt) {
 257                 /* Shared DV/DR structures is already initialized. */
 258                 sh->dv_refcnt++;
 259                 priv->dr_shared = 1;
 260                 return 0;
 261         }
 262         /* Reference counter is zero, we should initialize structures. */
 263         domain = mlx5_glue->dr_create_domain(sh->ctx,
 264                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 265         if (!domain) {
 266                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 267                 err = errno;
 268                 goto error;
 269         }
 270         sh->rx_domain = domain;
 271         domain = mlx5_glue->dr_create_domain(sh->ctx,
 272                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 273         if (!domain) {
 274                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 275                 err = errno;
 276                 goto error;
 277         }
 278         pthread_mutex_init(&sh->dv_mutex, NULL);
 279         sh->tx_domain = domain;
 280 #ifdef HAVE_MLX5DV_DR_ESWITCH
 281         if (priv->config.dv_esw_en) {
 282                 domain  = mlx5_glue->dr_create_domain
 283                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 284                 if (!domain) {
 285                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 286                         err = errno;
 287                         goto error;
 288                 }
 289                 sh->fdb_domain = domain;
 290                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 291         }
 292 #endif
 293         if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
 294                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
 295                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
 296                 if (sh->fdb_domain)
 297                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
 298         }
 299         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 300 #endif /* HAVE_MLX5DV_DR */
 301         sh->dv_refcnt++;
 302         priv->dr_shared = 1;
 303         return 0;
 304 error:
 305         /* Rollback the created objects. */
 306         if (sh->rx_domain) {
 307                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 308                 sh->rx_domain = NULL;
 309         }
 310         if (sh->tx_domain) {
 311                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 312                 sh->tx_domain = NULL;
 313         }
 314         if (sh->fdb_domain) {
 315                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 316                 sh->fdb_domain = NULL;
 317         }
 318         if (sh->esw_drop_action) {
 319                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 320                 sh->esw_drop_action = NULL;
 321         }
 322         if (sh->pop_vlan_action) {
 323                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 324                 sh->pop_vlan_action = NULL;
 325         }
 326         if (sh->modify_cmds) {
 327                 mlx5_hlist_destroy(sh->modify_cmds, NULL, NULL);
 328                 sh->modify_cmds = NULL;
 329         }
 330         if (sh->tag_table) {
 331                 /* tags should be destroyed with flow before. */
 332                 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
 333                 sh->tag_table = NULL;
 334         }
 335         mlx5_free_table_hash_list(priv);
 336         return err;
 337 }
 338
 339 /**
 340  * Destroy DR related data within private structure.
 341  *
 342  * @param[in] priv
 343  *   Pointer to the private device data structure.
 344  */
 345 void
 346 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 347 {
 348         struct mlx5_dev_ctx_shared *sh;
 349
 350         if (!priv->dr_shared)
 351                 return;
 352         priv->dr_shared = 0;
 353         sh = priv->sh;
 354         MLX5_ASSERT(sh);
 355 #ifdef HAVE_MLX5DV_DR
 356         MLX5_ASSERT(sh->dv_refcnt);
 357         if (sh->dv_refcnt && --sh->dv_refcnt)
 358                 return;
 359         if (sh->rx_domain) {
 360                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 361                 sh->rx_domain = NULL;
 362         }
 363         if (sh->tx_domain) {
 364                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 365                 sh->tx_domain = NULL;
 366         }
 367 #ifdef HAVE_MLX5DV_DR_ESWITCH
 368         if (sh->fdb_domain) {
 369                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 370                 sh->fdb_domain = NULL;
 371         }
 372         if (sh->esw_drop_action) {
 373                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 374                 sh->esw_drop_action = NULL;
 375         }
 376 #endif
 377         if (sh->pop_vlan_action) {
 378                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 379                 sh->pop_vlan_action = NULL;
 380         }
 381         pthread_mutex_destroy(&sh->dv_mutex);
 382 #endif /* HAVE_MLX5DV_DR */
 383         if (sh->modify_cmds) {
 384                 mlx5_hlist_destroy(sh->modify_cmds, NULL, NULL);
 385                 sh->modify_cmds = NULL;
 386         }
 387         if (sh->tag_table) {
 388                 /* tags should be destroyed with flow before. */
 389                 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
 390                 sh->tag_table = NULL;
 391         }
 392         mlx5_free_table_hash_list(priv);
 393 }
 394
 395 /**
 396  * Initialize shared data between primary and secondary process.
 397  *
 398  * A memzone is reserved by primary process and secondary processes attach to
 399  * the memzone.
 400  *
 401  * @return
 402  *   0 on success, a negative errno value otherwise and rte_errno is set.
 403  */
 404 static int
 405 mlx5_init_shared_data(void)
 406 {
 407         const struct rte_memzone *mz;
 408         int ret = 0;
 409
 410         rte_spinlock_lock(&mlx5_shared_data_lock);
 411         if (mlx5_shared_data == NULL) {
 412                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 413                         /* Allocate shared memory. */
 414                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 415                                                  sizeof(*mlx5_shared_data),
 416                                                  SOCKET_ID_ANY, 0);
 417                         if (mz == NULL) {
 418                                 DRV_LOG(ERR,
 419                                         "Cannot allocate mlx5 shared data");
 420                                 ret = -rte_errno;
 421                                 goto error;
 422                         }
 423                         mlx5_shared_data = mz->addr;
 424                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 425                         rte_spinlock_init(&mlx5_shared_data->lock);
 426                 } else {
 427                         /* Lookup allocated shared memory. */
 428                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 429                         if (mz == NULL) {
 430                                 DRV_LOG(ERR,
 431                                         "Cannot attach mlx5 shared data");
 432                                 ret = -rte_errno;
 433                                 goto error;
 434                         }
 435                         mlx5_shared_data = mz->addr;
 436                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 437                 }
 438         }
 439 error:
 440         rte_spinlock_unlock(&mlx5_shared_data_lock);
 441         return ret;
 442 }
 443
 444 /**
 445  * PMD global initialization.
 446  *
 447  * Independent from individual device, this function initializes global
 448  * per-PMD data structures distinguishing primary and secondary processes.
 449  * Hence, each initialization is called once per a process.
 450  *
 451  * @return
 452  *   0 on success, a negative errno value otherwise and rte_errno is set.
 453  */
 454 static int
 455 mlx5_init_once(void)
 456 {
 457         struct mlx5_shared_data *sd;
 458         struct mlx5_local_data *ld = &mlx5_local_data;
 459         int ret = 0;
 460
 461         if (mlx5_init_shared_data())
 462                 return -rte_errno;
 463         sd = mlx5_shared_data;
 464         MLX5_ASSERT(sd);
 465         rte_spinlock_lock(&sd->lock);
 466         switch (rte_eal_process_type()) {
 467         case RTE_PROC_PRIMARY:
 468                 if (sd->init_done)
 469                         break;
 470                 LIST_INIT(&sd->mem_event_cb_list);
 471                 rte_rwlock_init(&sd->mem_event_rwlock);
 472                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
 473                                                 mlx5_mr_mem_event_cb, NULL);
 474                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
 475                                            mlx5_mp_os_primary_handle);
 476                 if (ret)
 477                         goto out;
 478                 sd->init_done = true;
 479                 break;
 480         case RTE_PROC_SECONDARY:
 481                 if (ld->init_done)
 482                         break;
 483                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
 484                                              mlx5_mp_os_secondary_handle);
 485                 if (ret)
 486                         goto out;
 487                 ++sd->secondary_cnt;
 488                 ld->init_done = true;
 489                 break;
 490         default:
 491                 break;
 492         }
 493 out:
 494         rte_spinlock_unlock(&sd->lock);
 495         return ret;
 496 }
 497
 498 /**
 499  * Spawn an Ethernet device from Verbs information.
 500  *
 501  * @param dpdk_dev
 502  *   Backing DPDK device.
 503  * @param spawn
 504  *   Verbs device parameters (name, port, switch_info) to spawn.
 505  * @param config
 506  *   Device configuration parameters.
 507  *
 508  * @return
 509  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 510  *   is set. The following errors are defined:
 511  *
 512  *   EBUSY: device is not supposed to be spawned.
 513  *   EEXIST: device is already spawned
 514  */
 515 static struct rte_eth_dev *
 516 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 517                struct mlx5_dev_spawn_data *spawn,
 518                struct mlx5_dev_config *config)
 519 {
 520         const struct mlx5_switch_info *switch_info = &spawn->info;
 521         struct mlx5_dev_ctx_shared *sh = NULL;
 522         struct ibv_port_attr port_attr;
 523         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 524         struct rte_eth_dev *eth_dev = NULL;
 525         struct mlx5_priv *priv = NULL;
 526         int err = 0;
 527         unsigned int hw_padding = 0;
 528         unsigned int mps;
 529         unsigned int cqe_comp;
 530         unsigned int cqe_pad = 0;
 531         unsigned int tunnel_en = 0;
 532         unsigned int mpls_en = 0;
 533         unsigned int swp = 0;
 534         unsigned int mprq = 0;
 535         unsigned int mprq_min_stride_size_n = 0;
 536         unsigned int mprq_max_stride_size_n = 0;
 537         unsigned int mprq_min_stride_num_n = 0;
 538         unsigned int mprq_max_stride_num_n = 0;
 539         struct rte_ether_addr mac;
 540         char name[RTE_ETH_NAME_MAX_LEN];
 541         int own_domain_id = 0;
 542         uint16_t port_id;
 543         unsigned int i;
 544 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 545         struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
 546 #endif
 547
 548         /* Determine if this port representor is supposed to be spawned. */
 549         if (switch_info->representor && dpdk_dev->devargs) {
 550                 struct rte_eth_devargs eth_da;
 551
 552                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
 553                 if (err) {
 554                         rte_errno = -err;
 555                         DRV_LOG(ERR, "failed to process device arguments: %s",
 556                                 strerror(rte_errno));
 557                         return NULL;
 558                 }
 559                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
 560                         if (eth_da.representor_ports[i] ==
 561                             (uint16_t)switch_info->port_name)
 562                                 break;
 563                 if (i == eth_da.nb_representor_ports) {
 564                         rte_errno = EBUSY;
 565                         return NULL;
 566                 }
 567         }
 568         /* Build device name. */
 569         if (spawn->pf_bond <  0) {
 570                 /* Single device. */
 571                 if (!switch_info->representor)
 572                         strlcpy(name, dpdk_dev->name, sizeof(name));
 573                 else
 574                         snprintf(name, sizeof(name), "%s_representor_%u",
 575                                  dpdk_dev->name, switch_info->port_name);
 576         } else {
 577                 /* Bonding device. */
 578                 if (!switch_info->representor)
 579                         snprintf(name, sizeof(name), "%s_%s",
 580                                  dpdk_dev->name,
 581                                  mlx5_os_get_dev_device_name(spawn->phys_dev));
 582                 else
 583                         snprintf(name, sizeof(name), "%s_%s_representor_%u",
 584                                  dpdk_dev->name,
 585                                  mlx5_os_get_dev_device_name(spawn->phys_dev),
 586                                  switch_info->port_name);
 587         }
 588         /* check if the device is already spawned */
 589         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 590                 rte_errno = EEXIST;
 591                 return NULL;
 592         }
 593         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 594         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 595                 struct mlx5_mp_id mp_id;
 596
 597                 eth_dev = rte_eth_dev_attach_secondary(name);
 598                 if (eth_dev == NULL) {
 599                         DRV_LOG(ERR, "can not attach rte ethdev");
 600                         rte_errno = ENOMEM;
 601                         return NULL;
 602                 }
 603                 eth_dev->device = dpdk_dev;
 604                 eth_dev->dev_ops = &mlx5_os_dev_sec_ops;
 605                 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
 606                 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
 607                 err = mlx5_proc_priv_init(eth_dev);
 608                 if (err)
 609                         return NULL;
 610                 mp_id.port_id = eth_dev->data->port_id;
 611                 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 612                 /* Receive command fd from primary process */
 613                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
 614                 if (err < 0)
 615                         goto err_secondary;
 616                 /* Remap UAR for Tx queues. */
 617                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
 618                 if (err)
 619                         goto err_secondary;
 620                 /*
 621                  * Ethdev pointer is still required as input since
 622                  * the primary device is not accessible from the
 623                  * secondary process.
 624                  */
 625                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
 626                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
 627                 return eth_dev;
 628 err_secondary:
 629                 mlx5_dev_close(eth_dev);
 630                 return NULL;
 631         }
 632         /*
 633          * Some parameters ("tx_db_nc" in particularly) are needed in
 634          * advance to create dv/verbs device context. We proceed the
 635          * devargs here to get ones, and later proceed devargs again
 636          * to override some hardware settings.
 637          */
 638         err = mlx5_args(config, dpdk_dev->devargs);
 639         if (err) {
 640                 err = rte_errno;
 641                 DRV_LOG(ERR, "failed to process device arguments: %s",
 642                         strerror(rte_errno));
 643                 goto error;
 644         }
 645         mlx5_malloc_mem_select(config->sys_mem_en);
 646         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
 647         if (!sh)
 648                 return NULL;
 649         config->devx = sh->devx;
 650 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
 651         config->dest_tir = 1;
 652 #endif
 653 #ifdef HAVE_IBV_MLX5_MOD_SWP
 654         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
 655 #endif
 656         /*
 657          * Multi-packet send is supported by ConnectX-4 Lx PF as well
 658          * as all ConnectX-5 devices.
 659          */
 660 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 661         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
 662 #endif
 663 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 664         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
 665 #endif
 666         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
 667         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
 668                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
 669                         DRV_LOG(DEBUG, "enhanced MPW is supported");
 670                         mps = MLX5_MPW_ENHANCED;
 671                 } else {
 672                         DRV_LOG(DEBUG, "MPW is supported");
 673                         mps = MLX5_MPW;
 674                 }
 675         } else {
 676                 DRV_LOG(DEBUG, "MPW isn't supported");
 677                 mps = MLX5_MPW_DISABLED;
 678         }
 679 #ifdef HAVE_IBV_MLX5_MOD_SWP
 680         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
 681                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
 682         DRV_LOG(DEBUG, "SWP support: %u", swp);
 683 #endif
 684         config->swp = !!swp;
 685 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 686         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
 687                 struct mlx5dv_striding_rq_caps mprq_caps =
 688                         dv_attr.striding_rq_caps;
 689
 690                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
 691                         mprq_caps.min_single_stride_log_num_of_bytes);
 692                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
 693                         mprq_caps.max_single_stride_log_num_of_bytes);
 694                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
 695                         mprq_caps.min_single_wqe_log_num_of_strides);
 696                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
 697                         mprq_caps.max_single_wqe_log_num_of_strides);
 698                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
 699                         mprq_caps.supported_qpts);
 700                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
 701                 mprq = 1;
 702                 mprq_min_stride_size_n =
 703                         mprq_caps.min_single_stride_log_num_of_bytes;
 704                 mprq_max_stride_size_n =
 705                         mprq_caps.max_single_stride_log_num_of_bytes;
 706                 mprq_min_stride_num_n =
 707                         mprq_caps.min_single_wqe_log_num_of_strides;
 708                 mprq_max_stride_num_n =
 709                         mprq_caps.max_single_wqe_log_num_of_strides;
 710         }
 711 #endif
 712         if (RTE_CACHE_LINE_SIZE == 128 &&
 713             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
 714                 cqe_comp = 0;
 715         else
 716                 cqe_comp = 1;
 717         config->cqe_comp = cqe_comp;
 718 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
 719         /* Whether device supports 128B Rx CQE padding. */
 720         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
 721                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
 722 #endif
 723 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 724         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
 725                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
 726                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
 727                              (dv_attr.tunnel_offloads_caps &
 728                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
 729                              (dv_attr.tunnel_offloads_caps &
 730                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
 731         }
 732         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
 733                 tunnel_en ? "" : "not ");
 734 #else
 735         DRV_LOG(WARNING,
 736                 "tunnel offloading disabled due to old OFED/rdma-core version");
 737 #endif
 738         config->tunnel_en = tunnel_en;
 739 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
 740         mpls_en = ((dv_attr.tunnel_offloads_caps &
 741                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
 742                    (dv_attr.tunnel_offloads_caps &
 743                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
 744         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
 745                 mpls_en ? "" : "not ");
 746 #else
 747         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
 748                 " old OFED/rdma-core version or firmware configuration");
 749 #endif
 750         config->mpls_en = mpls_en;
 751         /* Check port status. */
 752         err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
 753         if (err) {
 754                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
 755                 goto error;
 756         }
 757         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
 758                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
 759                 err = EINVAL;
 760                 goto error;
 761         }
 762         if (port_attr.state != IBV_PORT_ACTIVE)
 763                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
 764                         mlx5_glue->port_state_str(port_attr.state),
 765                         port_attr.state);
 766         /* Allocate private eth device data. */
 767         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
 768                            sizeof(*priv),
 769                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
 770         if (priv == NULL) {
 771                 DRV_LOG(ERR, "priv allocation failure");
 772                 err = ENOMEM;
 773                 goto error;
 774         }
 775         priv->sh = sh;
 776         priv->dev_port = spawn->phys_port;
 777         priv->pci_dev = spawn->pci_dev;
 778         priv->mtu = RTE_ETHER_MTU;
 779         priv->mp_id.port_id = port_id;
 780         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 781         /* Some internal functions rely on Netlink sockets, open them now. */
 782         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
 783         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
 784         priv->representor = !!switch_info->representor;
 785         priv->master = !!switch_info->master;
 786         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
 787         priv->vport_meta_tag = 0;
 788         priv->vport_meta_mask = 0;
 789         priv->pf_bond = spawn->pf_bond;
 790 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 791         /*
 792          * The DevX port query API is implemented. E-Switch may use
 793          * either vport or reg_c[0] metadata register to match on
 794          * vport index. The engaged part of metadata register is
 795          * defined by mask.
 796          */
 797         if (switch_info->representor || switch_info->master) {
 798                 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
 799                                       MLX5DV_DEVX_PORT_MATCH_REG_C_0;
 800                 err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port,
 801                                                  &devx_port);
 802                 if (err) {
 803                         DRV_LOG(WARNING,
 804                                 "can't query devx port %d on device %s",
 805                                 spawn->phys_port,
 806                                 mlx5_os_get_dev_device_name(spawn->phys_dev));
 807                         devx_port.comp_mask = 0;
 808                 }
 809         }
 810         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
 811                 priv->vport_meta_tag = devx_port.reg_c_0.value;
 812                 priv->vport_meta_mask = devx_port.reg_c_0.mask;
 813                 if (!priv->vport_meta_mask) {
 814                         DRV_LOG(ERR, "vport zero mask for port %d"
 815                                      " on bonding device %s",
 816                                      spawn->phys_port,
 817                                      mlx5_os_get_dev_device_name
 818                                                         (spawn->phys_dev));
 819                         err = ENOTSUP;
 820                         goto error;
 821                 }
 822                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
 823                         DRV_LOG(ERR, "invalid vport tag for port %d"
 824                                      " on bonding device %s",
 825                                      spawn->phys_port,
 826                                      mlx5_os_get_dev_device_name
 827                                                         (spawn->phys_dev));
 828                         err = ENOTSUP;
 829                         goto error;
 830                 }
 831         }
 832         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
 833                 priv->vport_id = devx_port.vport_num;
 834         } else if (spawn->pf_bond >= 0) {
 835                 DRV_LOG(ERR, "can't deduce vport index for port %d"
 836                              " on bonding device %s",
 837                              spawn->phys_port,
 838                              mlx5_os_get_dev_device_name(spawn->phys_dev));
 839                 err = ENOTSUP;
 840                 goto error;
 841         } else {
 842                 /* Suppose vport index in compatible way. */
 843                 priv->vport_id = switch_info->representor ?
 844                                  switch_info->port_name + 1 : -1;
 845         }
 846 #else
 847         /*
 848          * Kernel/rdma_core support single E-Switch per PF configurations
 849          * only and vport_id field contains the vport index for
 850          * associated VF, which is deduced from representor port name.
 851          * For example, let's have the IB device port 10, it has
 852          * attached network device eth0, which has port name attribute
 853          * pf0vf2, we can deduce the VF number as 2, and set vport index
 854          * as 3 (2+1). This assigning schema should be changed if the
 855          * multiple E-Switch instances per PF configurations or/and PCI
 856          * subfunctions are added.
 857          */
 858         priv->vport_id = switch_info->representor ?
 859                          switch_info->port_name + 1 : -1;
 860 #endif
 861         /* representor_id field keeps the unmodified VF index. */
 862         priv->representor_id = switch_info->representor ?
 863                                switch_info->port_name : -1;
 864         /*
 865          * Look for sibling devices in order to reuse their switch domain
 866          * if any, otherwise allocate one.
 867          */
 868         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
 869                 const struct mlx5_priv *opriv =
 870                         rte_eth_devices[port_id].data->dev_private;
 871
 872                 if (!opriv ||
 873                     opriv->sh != priv->sh ||
 874                         opriv->domain_id ==
 875                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
 876                         continue;
 877                 priv->domain_id = opriv->domain_id;
 878                 break;
 879         }
 880         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
 881                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
 882                 if (err) {
 883                         err = rte_errno;
 884                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
 885                                 strerror(rte_errno));
 886                         goto error;
 887                 }
 888                 own_domain_id = 1;
 889         }
 890         /* Override some values set by hardware configuration. */
 891         mlx5_args(config, dpdk_dev->devargs);
 892         err = mlx5_dev_check_sibling_config(priv, config);
 893         if (err)
 894                 goto error;
 895         config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
 896                             IBV_DEVICE_RAW_IP_CSUM);
 897         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
 898                 (config->hw_csum ? "" : "not "));
 899 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
 900         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
 901         DRV_LOG(DEBUG, "counters are not supported");
 902 #endif
 903 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
 904         if (config->dv_flow_en) {
 905                 DRV_LOG(WARNING, "DV flow is not supported");
 906                 config->dv_flow_en = 0;
 907         }
 908 #endif
 909         config->ind_table_max_size =
 910                 sh->device_attr.max_rwq_indirection_table_size;
 911         /*
 912          * Remove this check once DPDK supports larger/variable
 913          * indirection tables.
 914          */
 915         if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
 916                 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
 917         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
 918                 config->ind_table_max_size);
 919         config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
 920                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
 921         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
 922                 (config->hw_vlan_strip ? "" : "not "));
 923         config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
 924                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
 925 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
 926         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
 927 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
 928         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
 929                         IBV_DEVICE_PCI_WRITE_END_PADDING);
 930 #endif
 931         if (config->hw_padding && !hw_padding) {
 932                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
 933                 config->hw_padding = 0;
 934         } else if (config->hw_padding) {
 935                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
 936         }
 937         config->tso = (sh->device_attr.max_tso > 0 &&
 938                       (sh->device_attr.tso_supported_qpts &
 939                        (1 << IBV_QPT_RAW_PACKET)));
 940         if (config->tso)
 941                 config->tso_max_payload_sz = sh->device_attr.max_tso;
 942         /*
 943          * MPW is disabled by default, while the Enhanced MPW is enabled
 944          * by default.
 945          */
 946         if (config->mps == MLX5_ARG_UNSET)
 947                 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
 948                                                           MLX5_MPW_DISABLED;
 949         else
 950                 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
 951         DRV_LOG(INFO, "%sMPS is %s",
 952                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
 953                 config->mps == MLX5_MPW ? "legacy " : "",
 954                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
 955         if (config->cqe_comp && !cqe_comp) {
 956                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
 957                 config->cqe_comp = 0;
 958         }
 959         if (config->cqe_pad && !cqe_pad) {
 960                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
 961                 config->cqe_pad = 0;
 962         } else if (config->cqe_pad) {
 963                 DRV_LOG(INFO, "Rx CQE padding is enabled");
 964         }
 965         if (config->devx) {
 966                 priv->counter_fallback = 0;
 967                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
 968                 if (err) {
 969                         err = -err;
 970                         goto error;
 971                 }
 972                 if (!config->hca_attr.flow_counters_dump)
 973                         priv->counter_fallback = 1;
 974 #ifndef HAVE_IBV_DEVX_ASYNC
 975                 priv->counter_fallback = 1;
 976 #endif
 977                 if (priv->counter_fallback)
 978                         DRV_LOG(INFO, "Use fall-back DV counter management");
 979                 /* Check for LRO support. */
 980                 if (config->dest_tir && config->hca_attr.lro_cap &&
 981                     config->dv_flow_en) {
 982                         /* TBD check tunnel lro caps. */
 983                         config->lro.supported = config->hca_attr.lro_cap;
 984                         DRV_LOG(DEBUG, "Device supports LRO");
 985                         /*
 986                          * If LRO timeout is not configured by application,
 987                          * use the minimal supported value.
 988                          */
 989                         if (!config->lro.timeout)
 990                                 config->lro.timeout =
 991                                 config->hca_attr.lro_timer_supported_periods[0];
 992                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
 993                                 config->lro.timeout);
 994                 }
 995 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
 996                 if (config->hca_attr.qos.sup &&
 997                     config->hca_attr.qos.srtcm_sup &&
 998                     config->dv_flow_en) {
 999                         uint8_t reg_c_mask =
1000                                 config->hca_attr.qos.flow_meter_reg_c_ids;
1001                         /*
1002                          * Meter needs two REG_C's for color match and pre-sfx
1003                          * flow match. Here get the REG_C for color match.
1004                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
1005                          */
1006                         reg_c_mask &= 0xfc;
1007                         if (__builtin_popcount(reg_c_mask) < 1) {
1008                                 priv->mtr_en = 0;
1009                                 DRV_LOG(WARNING, "No available register for"
1010                                         " meter.");
1011                         } else {
1012                                 priv->mtr_color_reg = ffs(reg_c_mask) - 1 +
1013                                                       REG_C_0;
1014                                 priv->mtr_en = 1;
1015                                 priv->mtr_reg_share =
1016                                       config->hca_attr.qos.flow_meter_reg_share;
1017                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1018                                         priv->mtr_color_reg);
1019                         }
1020                 }
1021 #endif
1022         }
1023         if (config->tx_pp) {
1024                 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1025                         config->hca_attr.dev_freq_khz);
1026                 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1027                         config->hca_attr.qos.packet_pacing ? "" : "not ");
1028                 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1029                         config->hca_attr.cross_channel ? "" : "not ");
1030                 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1031                         config->hca_attr.wqe_index_ignore ? "" : "not ");
1032                 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1033                         config->hca_attr.non_wire_sq ? "" : "not ");
1034                 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1035                         config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1036                         config->hca_attr.log_max_static_sq_wq);
1037                 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1038                         config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1039                 if (!config->devx) {
1040                         DRV_LOG(ERR, "DevX is required for packet pacing");
1041                         err = ENODEV;
1042                         goto error;
1043                 }
1044                 if (!config->hca_attr.qos.packet_pacing) {
1045                         DRV_LOG(ERR, "Packet pacing is not supported");
1046                         err = ENODEV;
1047                         goto error;
1048                 }
1049                 if (!config->hca_attr.cross_channel) {
1050                         DRV_LOG(ERR, "Cross channel operations are"
1051                                      " required for packet pacing");
1052                         err = ENODEV;
1053                         goto error;
1054                 }
1055                 if (!config->hca_attr.wqe_index_ignore) {
1056                         DRV_LOG(ERR, "WQE index ignore feature is"
1057                                      " required for packet pacing");
1058                         err = ENODEV;
1059                         goto error;
1060                 }
1061                 if (!config->hca_attr.non_wire_sq) {
1062                         DRV_LOG(ERR, "Non-wire SQ feature is"
1063                                      " required for packet pacing");
1064                         err = ENODEV;
1065                         goto error;
1066                 }
1067                 if (!config->hca_attr.log_max_static_sq_wq) {
1068                         DRV_LOG(ERR, "Static WQE SQ feature is"
1069                                      " required for packet pacing");
1070                         err = ENODEV;
1071                         goto error;
1072                 }
1073                 if (!config->hca_attr.qos.wqe_rate_pp) {
1074                         DRV_LOG(ERR, "WQE rate mode is required"
1075                                      " for packet pacing");
1076                         err = ENODEV;
1077                         goto error;
1078                 }
1079 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1080                 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1081                              " can't create queues for packet pacing");
1082                 err = ENODEV;
1083                 goto error;
1084 #endif
1085         }
1086         if (config->devx) {
1087                 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1088
1089                 err = config->hca_attr.access_register_user ?
1090                         mlx5_devx_cmd_register_read
1091                                 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1092                                 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1093                 if (!err) {
1094                         uint32_t ts_mode;
1095
1096                         /* MTUTC register is read successfully. */
1097                         ts_mode = MLX5_GET(register_mtutc, reg,
1098                                            time_stamp_mode);
1099                         if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1100                                 config->rt_timestamp = 1;
1101                 } else {
1102                         /* Kernel does not support register reading. */
1103                         if (config->hca_attr.dev_freq_khz ==
1104                                                  (NS_PER_S / MS_PER_S))
1105                                 config->rt_timestamp = 1;
1106                 }
1107         }
1108         /*
1109          * If HW has bug working with tunnel packet decapsulation and
1110          * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1111          * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1112          */
1113         if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1114                 config->hw_fcs_strip = 0;
1115         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1116                 (config->hw_fcs_strip ? "" : "not "));
1117         if (config->mprq.enabled && mprq) {
1118                 if (config->mprq.stride_num_n &&
1119                     (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1120                      config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1121                         config->mprq.stride_num_n =
1122                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1123                                                 mprq_min_stride_num_n),
1124                                         mprq_max_stride_num_n);
1125                         DRV_LOG(WARNING,
1126                                 "the number of strides"
1127                                 " for Multi-Packet RQ is out of range,"
1128                                 " setting default value (%u)",
1129                                 1 << config->mprq.stride_num_n);
1130                 }
1131                 if (config->mprq.stride_size_n &&
1132                     (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1133                      config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1134                         config->mprq.stride_size_n =
1135                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1136                                                 mprq_min_stride_size_n),
1137                                         mprq_max_stride_size_n);
1138                         DRV_LOG(WARNING,
1139                                 "the size of a stride"
1140                                 " for Multi-Packet RQ is out of range,"
1141                                 " setting default value (%u)",
1142                                 1 << config->mprq.stride_size_n);
1143                 }
1144                 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1145                 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1146         } else if (config->mprq.enabled && !mprq) {
1147                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1148                 config->mprq.enabled = 0;
1149         }
1150         if (config->max_dump_files_num == 0)
1151                 config->max_dump_files_num = 128;
1152         eth_dev = rte_eth_dev_allocate(name);
1153         if (eth_dev == NULL) {
1154                 DRV_LOG(ERR, "can not allocate rte ethdev");
1155                 err = ENOMEM;
1156                 goto error;
1157         }
1158         /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1159         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1160         if (priv->representor) {
1161                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1162                 eth_dev->data->representor_id = priv->representor_id;
1163         }
1164         /*
1165          * Store associated network device interface index. This index
1166          * is permanent throughout the lifetime of device. So, we may store
1167          * the ifindex here and use the cached value further.
1168          */
1169         MLX5_ASSERT(spawn->ifindex);
1170         priv->if_index = spawn->ifindex;
1171         eth_dev->data->dev_private = priv;
1172         priv->dev_data = eth_dev->data;
1173         eth_dev->data->mac_addrs = priv->mac;
1174         eth_dev->device = dpdk_dev;
1175         /* Configure the first MAC address by default. */
1176         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1177                 DRV_LOG(ERR,
1178                         "port %u cannot get MAC address, is mlx5_en"
1179                         " loaded? (errno: %s)",
1180                         eth_dev->data->port_id, strerror(rte_errno));
1181                 err = ENODEV;
1182                 goto error;
1183         }
1184         DRV_LOG(INFO,
1185                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1186                 eth_dev->data->port_id,
1187                 mac.addr_bytes[0], mac.addr_bytes[1],
1188                 mac.addr_bytes[2], mac.addr_bytes[3],
1189                 mac.addr_bytes[4], mac.addr_bytes[5]);
1190 #ifdef RTE_LIBRTE_MLX5_DEBUG
1191         {
1192                 char ifname[IF_NAMESIZE];
1193
1194                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1195                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1196                                 eth_dev->data->port_id, ifname);
1197                 else
1198                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1199                                 eth_dev->data->port_id);
1200         }
1201 #endif
1202         /* Get actual MTU if possible. */
1203         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1204         if (err) {
1205                 err = rte_errno;
1206                 goto error;
1207         }
1208         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1209                 priv->mtu);
1210         /* Initialize burst functions to prevent crashes before link-up. */
1211         eth_dev->rx_pkt_burst = removed_rx_burst;
1212         eth_dev->tx_pkt_burst = removed_tx_burst;
1213         eth_dev->dev_ops = &mlx5_os_dev_ops;
1214         eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1215         eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1216         eth_dev->rx_queue_count = mlx5_rx_queue_count;
1217         /* Register MAC address. */
1218         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1219         if (config->vf && config->vf_nl_en)
1220                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1221                                       mlx5_ifindex(eth_dev),
1222                                       eth_dev->data->mac_addrs,
1223                                       MLX5_MAX_MAC_ADDRESSES);
1224         priv->flows = 0;
1225         priv->ctrl_flows = 0;
1226         TAILQ_INIT(&priv->flow_meters);
1227         TAILQ_INIT(&priv->flow_meter_profiles);
1228         /* Hint libmlx5 to use PMD allocator for data plane resources */
1229         mlx5_glue->dv_set_context_attr(sh->ctx,
1230                         MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1231                         (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
1232                                 .alloc = &mlx5_alloc_verbs_buf,
1233                                 .free = &mlx5_free_verbs_buf,
1234                                 .data = priv,
1235                         }));
1236         /* Bring Ethernet device up. */
1237         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1238                 eth_dev->data->port_id);
1239         mlx5_set_link_up(eth_dev);
1240         /*
1241          * Even though the interrupt handler is not installed yet,
1242          * interrupts will still trigger on the async_fd from
1243          * Verbs context returned by ibv_open_device().
1244          */
1245         mlx5_link_update(eth_dev, 0);
1246 #ifdef HAVE_MLX5DV_DR_ESWITCH
1247         if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1248               (switch_info->representor || switch_info->master)))
1249                 config->dv_esw_en = 0;
1250 #else
1251         config->dv_esw_en = 0;
1252 #endif
1253         /* Detect minimal data bytes to inline. */
1254         mlx5_set_min_inline(spawn, config);
1255         /* Store device configuration on private structure. */
1256         priv->config = *config;
1257         /* Create context for virtual machine VLAN workaround. */
1258         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1259         if (config->dv_flow_en) {
1260                 err = mlx5_alloc_shared_dr(priv);
1261                 if (err)
1262                         goto error;
1263                 /*
1264                  * RSS id is shared with meter flow id. Meter flow id can only
1265                  * use the 24 MSB of the register.
1266                  */
1267                 priv->qrss_id_pool = mlx5_flow_id_pool_alloc(UINT32_MAX >>
1268                                      MLX5_MTR_COLOR_BITS);
1269                 if (!priv->qrss_id_pool) {
1270                         DRV_LOG(ERR, "can't create flow id pool");
1271                         err = ENOMEM;
1272                         goto error;
1273                 }
1274         }
1275         if (config->devx && config->dv_flow_en && config->dest_tir) {
1276                 priv->obj_ops = devx_obj_ops;
1277                 priv->obj_ops.drop_action_create =
1278                                                 ibv_obj_ops.drop_action_create;
1279                 priv->obj_ops.drop_action_destroy =
1280                                                 ibv_obj_ops.drop_action_destroy;
1281         } else {
1282                 priv->obj_ops = ibv_obj_ops;
1283         }
1284         /* Supported Verbs flow priority number detection. */
1285         err = mlx5_flow_discover_priorities(eth_dev);
1286         if (err < 0) {
1287                 err = -err;
1288                 goto error;
1289         }
1290         priv->config.flow_prio = err;
1291         if (!priv->config.dv_esw_en &&
1292             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1293                 DRV_LOG(WARNING, "metadata mode %u is not supported "
1294                                  "(no E-Switch)", priv->config.dv_xmeta_en);
1295                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1296         }
1297         mlx5_set_metadata_mask(eth_dev);
1298         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1299             !priv->sh->dv_regc0_mask) {
1300                 DRV_LOG(ERR, "metadata mode %u is not supported "
1301                              "(no metadata reg_c[0] is available)",
1302                              priv->config.dv_xmeta_en);
1303                         err = ENOTSUP;
1304                         goto error;
1305         }
1306         /*
1307          * Allocate the buffer for flow creating, just once.
1308          * The allocation must be done before any flow creating.
1309          */
1310         mlx5_flow_alloc_intermediate(eth_dev);
1311         /* Query availability of metadata reg_c's. */
1312         err = mlx5_flow_discover_mreg_c(eth_dev);
1313         if (err < 0) {
1314                 err = -err;
1315                 goto error;
1316         }
1317         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1318                 DRV_LOG(DEBUG,
1319                         "port %u extensive metadata register is not supported",
1320                         eth_dev->data->port_id);
1321                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1322                         DRV_LOG(ERR, "metadata mode %u is not supported "
1323                                      "(no metadata registers available)",
1324                                      priv->config.dv_xmeta_en);
1325                         err = ENOTSUP;
1326                         goto error;
1327                 }
1328         }
1329         if (priv->config.dv_flow_en &&
1330             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1331             mlx5_flow_ext_mreg_supported(eth_dev) &&
1332             priv->sh->dv_regc0_mask) {
1333                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1334                                                       MLX5_FLOW_MREG_HTABLE_SZ);
1335                 if (!priv->mreg_cp_tbl) {
1336                         err = ENOMEM;
1337                         goto error;
1338                 }
1339         }
1340         return eth_dev;
1341 error:
1342         if (priv) {
1343                 if (priv->mreg_cp_tbl)
1344                         mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
1345                 if (priv->sh)
1346                         mlx5_os_free_shared_dr(priv);
1347                 if (priv->nl_socket_route >= 0)
1348                         close(priv->nl_socket_route);
1349                 if (priv->nl_socket_rdma >= 0)
1350                         close(priv->nl_socket_rdma);
1351                 if (priv->vmwa_context)
1352                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1353                 if (priv->qrss_id_pool)
1354                         mlx5_flow_id_pool_release(priv->qrss_id_pool);
1355                 if (own_domain_id)
1356                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1357                 mlx5_free(priv);
1358                 if (eth_dev != NULL)
1359                         eth_dev->data->dev_private = NULL;
1360         }
1361         if (eth_dev != NULL) {
1362                 /* mac_addrs must not be freed alone because part of
1363                  * dev_private
1364                  **/
1365                 eth_dev->data->mac_addrs = NULL;
1366                 rte_eth_dev_release_port(eth_dev);
1367         }
1368         if (sh)
1369                 mlx5_free_shared_dev_ctx(sh);
1370         MLX5_ASSERT(err > 0);
1371         rte_errno = err;
1372         return NULL;
1373 }
1374
1375 /**
1376  * Comparison callback to sort device data.
1377  *
1378  * This is meant to be used with qsort().
1379  *
1380  * @param a[in]
1381  *   Pointer to pointer to first data object.
1382  * @param b[in]
1383  *   Pointer to pointer to second data object.
1384  *
1385  * @return
1386  *   0 if both objects are equal, less than 0 if the first argument is less
1387  *   than the second, greater than 0 otherwise.
1388  */
1389 static int
1390 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1391 {
1392         const struct mlx5_switch_info *si_a =
1393                 &((const struct mlx5_dev_spawn_data *)a)->info;
1394         const struct mlx5_switch_info *si_b =
1395                 &((const struct mlx5_dev_spawn_data *)b)->info;
1396         int ret;
1397
1398         /* Master device first. */
1399         ret = si_b->master - si_a->master;
1400         if (ret)
1401                 return ret;
1402         /* Then representor devices. */
1403         ret = si_b->representor - si_a->representor;
1404         if (ret)
1405                 return ret;
1406         /* Unidentified devices come last in no specific order. */
1407         if (!si_a->representor)
1408                 return 0;
1409         /* Order representors by name. */
1410         return si_a->port_name - si_b->port_name;
1411 }
1412
1413 /**
1414  * Match PCI information for possible slaves of bonding device.
1415  *
1416  * @param[in] ibv_dev
1417  *   Pointer to Infiniband device structure.
1418  * @param[in] pci_dev
1419  *   Pointer to PCI device structure to match PCI address.
1420  * @param[in] nl_rdma
1421  *   Netlink RDMA group socket handle.
1422  *
1423  * @return
1424  *   negative value if no bonding device found, otherwise
1425  *   positive index of slave PF in bonding.
1426  */
1427 static int
1428 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1429                            const struct rte_pci_device *pci_dev,
1430                            int nl_rdma)
1431 {
1432         char ifname[IF_NAMESIZE + 1];
1433         unsigned int ifindex;
1434         unsigned int np, i;
1435         FILE *file = NULL;
1436         int pf = -1;
1437
1438         /*
1439          * Try to get master device name. If something goes
1440          * wrong suppose the lack of kernel support and no
1441          * bonding devices.
1442          */
1443         if (nl_rdma < 0)
1444                 return -1;
1445         if (!strstr(ibv_dev->name, "bond"))
1446                 return -1;
1447         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
1448         if (!np)
1449                 return -1;
1450         /*
1451          * The Master device might not be on the predefined
1452          * port (not on port index 1, it is not garanted),
1453          * we have to scan all Infiniband device port and
1454          * find master.
1455          */
1456         for (i = 1; i <= np; ++i) {
1457                 /* Check whether Infiniband port is populated. */
1458                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
1459                 if (!ifindex)
1460                         continue;
1461                 if (!if_indextoname(ifindex, ifname))
1462                         continue;
1463                 /* Try to read bonding slave names from sysfs. */
1464                 MKSTR(slaves,
1465                       "/sys/class/net/%s/master/bonding/slaves", ifname);
1466                 file = fopen(slaves, "r");
1467                 if (file)
1468                         break;
1469         }
1470         if (!file)
1471                 return -1;
1472         /* Use safe format to check maximal buffer length. */
1473         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1474         while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1475                 char tmp_str[IF_NAMESIZE + 32];
1476                 struct rte_pci_addr pci_addr;
1477                 struct mlx5_switch_info info;
1478
1479                 /* Process slave interface names in the loop. */
1480                 snprintf(tmp_str, sizeof(tmp_str),
1481                          "/sys/class/net/%s", ifname);
1482                 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
1483                         DRV_LOG(WARNING, "can not get PCI address"
1484                                          " for netdev \"%s\"", ifname);
1485                         continue;
1486                 }
1487                 if (pci_dev->addr.domain != pci_addr.domain ||
1488                     pci_dev->addr.bus != pci_addr.bus ||
1489                     pci_dev->addr.devid != pci_addr.devid ||
1490                     pci_dev->addr.function != pci_addr.function)
1491                         continue;
1492                 /* Slave interface PCI address match found. */
1493                 fclose(file);
1494                 snprintf(tmp_str, sizeof(tmp_str),
1495                          "/sys/class/net/%s/phys_port_name", ifname);
1496                 file = fopen(tmp_str, "rb");
1497                 if (!file)
1498                         break;
1499                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1500                 if (fscanf(file, "%32s", tmp_str) == 1)
1501                         mlx5_translate_port_name(tmp_str, &info);
1502                 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
1503                     info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1504                         pf = info.port_name;
1505                 break;
1506         }
1507         if (file)
1508                 fclose(file);
1509         return pf;
1510 }
1511
1512 /**
1513  * DPDK callback to register a PCI device.
1514  *
1515  * This function spawns Ethernet devices out of a given PCI device.
1516  *
1517  * @param[in] pci_drv
1518  *   PCI driver structure (mlx5_driver).
1519  * @param[in] pci_dev
1520  *   PCI device information.
1521  *
1522  * @return
1523  *   0 on success, a negative errno value otherwise and rte_errno is set.
1524  */
1525 int
1526 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1527                   struct rte_pci_device *pci_dev)
1528 {
1529         struct ibv_device **ibv_list;
1530         /*
1531          * Number of found IB Devices matching with requested PCI BDF.
1532          * nd != 1 means there are multiple IB devices over the same
1533          * PCI device and we have representors and master.
1534          */
1535         unsigned int nd = 0;
1536         /*
1537          * Number of found IB device Ports. nd = 1 and np = 1..n means
1538          * we have the single multiport IB device, and there may be
1539          * representors attached to some of found ports.
1540          */
1541         unsigned int np = 0;
1542         /*
1543          * Number of DPDK ethernet devices to Spawn - either over
1544          * multiple IB devices or multiple ports of single IB device.
1545          * Actually this is the number of iterations to spawn.
1546          */
1547         unsigned int ns = 0;
1548         /*
1549          * Bonding device
1550          *   < 0 - no bonding device (single one)
1551          *  >= 0 - bonding device (value is slave PF index)
1552          */
1553         int bd = -1;
1554         struct mlx5_dev_spawn_data *list = NULL;
1555         struct mlx5_dev_config dev_config;
1556         unsigned int dev_config_vf;
1557         int ret;
1558
1559         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1560                 mlx5_pmd_socket_init();
1561         ret = mlx5_init_once();
1562         if (ret) {
1563                 DRV_LOG(ERR, "unable to init PMD global data: %s",
1564                         strerror(rte_errno));
1565                 return -rte_errno;
1566         }
1567         errno = 0;
1568         ibv_list = mlx5_glue->get_device_list(&ret);
1569         if (!ibv_list) {
1570                 rte_errno = errno ? errno : ENOSYS;
1571                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1572                 return -rte_errno;
1573         }
1574         /*
1575          * First scan the list of all Infiniband devices to find
1576          * matching ones, gathering into the list.
1577          */
1578         struct ibv_device *ibv_match[ret + 1];
1579         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
1580         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1581         unsigned int i;
1582
1583         while (ret-- > 0) {
1584                 struct rte_pci_addr pci_addr;
1585
1586                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1587                 bd = mlx5_device_bond_pci_match
1588                                 (ibv_list[ret], pci_dev, nl_rdma);
1589                 if (bd >= 0) {
1590                         /*
1591                          * Bonding device detected. Only one match is allowed,
1592                          * the bonding is supported over multi-port IB device,
1593                          * there should be no matches on representor PCI
1594                          * functions or non VF LAG bonding devices with
1595                          * specified address.
1596                          */
1597                         if (nd) {
1598                                 DRV_LOG(ERR,
1599                                         "multiple PCI match on bonding device"
1600                                         "\"%s\" found", ibv_list[ret]->name);
1601                                 rte_errno = ENOENT;
1602                                 ret = -rte_errno;
1603                                 goto exit;
1604                         }
1605                         DRV_LOG(INFO, "PCI information matches for"
1606                                       " slave %d bonding device \"%s\"",
1607                                       bd, ibv_list[ret]->name);
1608                         ibv_match[nd++] = ibv_list[ret];
1609                         break;
1610                 }
1611                 if (mlx5_dev_to_pci_addr
1612                         (ibv_list[ret]->ibdev_path, &pci_addr))
1613                         continue;
1614                 if (pci_dev->addr.domain != pci_addr.domain ||
1615                     pci_dev->addr.bus != pci_addr.bus ||
1616                     pci_dev->addr.devid != pci_addr.devid ||
1617                     pci_dev->addr.function != pci_addr.function)
1618                         continue;
1619                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1620                         ibv_list[ret]->name);
1621                 ibv_match[nd++] = ibv_list[ret];
1622         }
1623         ibv_match[nd] = NULL;
1624         if (!nd) {
1625                 /* No device matches, just complain and bail out. */
1626                 DRV_LOG(WARNING,
1627                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
1628                         " are kernel drivers loaded?",
1629                         pci_dev->addr.domain, pci_dev->addr.bus,
1630                         pci_dev->addr.devid, pci_dev->addr.function);
1631                 rte_errno = ENOENT;
1632                 ret = -rte_errno;
1633                 goto exit;
1634         }
1635         if (nd == 1) {
1636                 /*
1637                  * Found single matching device may have multiple ports.
1638                  * Each port may be representor, we have to check the port
1639                  * number and check the representors existence.
1640                  */
1641                 if (nl_rdma >= 0)
1642                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1643                 if (!np)
1644                         DRV_LOG(WARNING, "can not get IB device \"%s\""
1645                                          " ports number", ibv_match[0]->name);
1646                 if (bd >= 0 && !np) {
1647                         DRV_LOG(ERR, "can not get ports"
1648                                      " for bonding device");
1649                         rte_errno = ENOENT;
1650                         ret = -rte_errno;
1651                         goto exit;
1652                 }
1653         }
1654 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
1655         if (bd >= 0) {
1656                 /*
1657                  * This may happen if there is VF LAG kernel support and
1658                  * application is compiled with older rdma_core library.
1659                  */
1660                 DRV_LOG(ERR,
1661                         "No kernel/verbs support for VF LAG bonding found.");
1662                 rte_errno = ENOTSUP;
1663                 ret = -rte_errno;
1664                 goto exit;
1665         }
1666 #endif
1667         /*
1668          * Now we can determine the maximal
1669          * amount of devices to be spawned.
1670          */
1671         list = mlx5_malloc(MLX5_MEM_ZERO,
1672                            sizeof(struct mlx5_dev_spawn_data) *
1673                            (np ? np : nd),
1674                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1675         if (!list) {
1676                 DRV_LOG(ERR, "spawn data array allocation failure");
1677                 rte_errno = ENOMEM;
1678                 ret = -rte_errno;
1679                 goto exit;
1680         }
1681         if (bd >= 0 || np > 1) {
1682                 /*
1683                  * Single IB device with multiple ports found,
1684                  * it may be E-Switch master device and representors.
1685                  * We have to perform identification through the ports.
1686                  */
1687                 MLX5_ASSERT(nl_rdma >= 0);
1688                 MLX5_ASSERT(ns == 0);
1689                 MLX5_ASSERT(nd == 1);
1690                 MLX5_ASSERT(np);
1691                 for (i = 1; i <= np; ++i) {
1692                         list[ns].max_port = np;
1693                         list[ns].phys_port = i;
1694                         list[ns].phys_dev = ibv_match[0];
1695                         list[ns].eth_dev = NULL;
1696                         list[ns].pci_dev = pci_dev;
1697                         list[ns].pf_bond = bd;
1698                         list[ns].ifindex = mlx5_nl_ifindex
1699                                 (nl_rdma,
1700                                 mlx5_os_get_dev_device_name
1701                                                 (list[ns].phys_dev), i);
1702                         if (!list[ns].ifindex) {
1703                                 /*
1704                                  * No network interface index found for the
1705                                  * specified port, it means there is no
1706                                  * representor on this port. It's OK,
1707                                  * there can be disabled ports, for example
1708                                  * if sriov_numvfs < sriov_totalvfs.
1709                                  */
1710                                 continue;
1711                         }
1712                         ret = -1;
1713                         if (nl_route >= 0)
1714                                 ret = mlx5_nl_switch_info
1715                                                (nl_route,
1716                                                 list[ns].ifindex,
1717                                                 &list[ns].info);
1718                         if (ret || (!list[ns].info.representor &&
1719                                     !list[ns].info.master)) {
1720                                 /*
1721                                  * We failed to recognize representors with
1722                                  * Netlink, let's try to perform the task
1723                                  * with sysfs.
1724                                  */
1725                                 ret =  mlx5_sysfs_switch_info
1726                                                 (list[ns].ifindex,
1727                                                  &list[ns].info);
1728                         }
1729                         if (!ret && bd >= 0) {
1730                                 switch (list[ns].info.name_type) {
1731                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
1732                                         if (list[ns].info.port_name == bd)
1733                                                 ns++;
1734                                         break;
1735                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
1736                                         /* Fallthrough */
1737                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
1738                                         if (list[ns].info.pf_num == bd)
1739                                                 ns++;
1740                                         break;
1741                                 default:
1742                                         break;
1743                                 }
1744                                 continue;
1745                         }
1746                         if (!ret && (list[ns].info.representor ^
1747                                      list[ns].info.master))
1748                                 ns++;
1749                 }
1750                 if (!ns) {
1751                         DRV_LOG(ERR,
1752                                 "unable to recognize master/representors"
1753                                 " on the IB device with multiple ports");
1754                         rte_errno = ENOENT;
1755                         ret = -rte_errno;
1756                         goto exit;
1757                 }
1758         } else {
1759                 /*
1760                  * The existence of several matching entries (nd > 1) means
1761                  * port representors have been instantiated. No existing Verbs
1762                  * call nor sysfs entries can tell them apart, this can only
1763                  * be done through Netlink calls assuming kernel drivers are
1764                  * recent enough to support them.
1765                  *
1766                  * In the event of identification failure through Netlink,
1767                  * try again through sysfs, then:
1768                  *
1769                  * 1. A single IB device matches (nd == 1) with single
1770                  *    port (np=0/1) and is not a representor, assume
1771                  *    no switch support.
1772                  *
1773                  * 2. Otherwise no safe assumptions can be made;
1774                  *    complain louder and bail out.
1775                  */
1776                 for (i = 0; i != nd; ++i) {
1777                         memset(&list[ns].info, 0, sizeof(list[ns].info));
1778                         list[ns].max_port = 1;
1779                         list[ns].phys_port = 1;
1780                         list[ns].phys_dev = ibv_match[i];
1781                         list[ns].eth_dev = NULL;
1782                         list[ns].pci_dev = pci_dev;
1783                         list[ns].pf_bond = -1;
1784                         list[ns].ifindex = 0;
1785                         if (nl_rdma >= 0)
1786                                 list[ns].ifindex = mlx5_nl_ifindex
1787                                 (nl_rdma,
1788                                 mlx5_os_get_dev_device_name
1789                                                 (list[ns].phys_dev), 1);
1790                         if (!list[ns].ifindex) {
1791                                 char ifname[IF_NAMESIZE];
1792
1793                                 /*
1794                                  * Netlink failed, it may happen with old
1795                                  * ib_core kernel driver (before 4.16).
1796                                  * We can assume there is old driver because
1797                                  * here we are processing single ports IB
1798                                  * devices. Let's try sysfs to retrieve
1799                                  * the ifindex. The method works for
1800                                  * master device only.
1801                                  */
1802                                 if (nd > 1) {
1803                                         /*
1804                                          * Multiple devices found, assume
1805                                          * representors, can not distinguish
1806                                          * master/representor and retrieve
1807                                          * ifindex via sysfs.
1808                                          */
1809                                         continue;
1810                                 }
1811                                 ret = mlx5_get_ifname_sysfs
1812                                         (ibv_match[i]->ibdev_path, ifname);
1813                                 if (!ret)
1814                                         list[ns].ifindex =
1815                                                 if_nametoindex(ifname);
1816                                 if (!list[ns].ifindex) {
1817                                         /*
1818                                          * No network interface index found
1819                                          * for the specified device, it means
1820                                          * there it is neither representor
1821                                          * nor master.
1822                                          */
1823                                         continue;
1824                                 }
1825                         }
1826                         ret = -1;
1827                         if (nl_route >= 0)
1828                                 ret = mlx5_nl_switch_info
1829                                                (nl_route,
1830                                                 list[ns].ifindex,
1831                                                 &list[ns].info);
1832                         if (ret || (!list[ns].info.representor &&
1833                                     !list[ns].info.master)) {
1834                                 /*
1835                                  * We failed to recognize representors with
1836                                  * Netlink, let's try to perform the task
1837                                  * with sysfs.
1838                                  */
1839                                 ret =  mlx5_sysfs_switch_info
1840                                                 (list[ns].ifindex,
1841                                                  &list[ns].info);
1842                         }
1843                         if (!ret && (list[ns].info.representor ^
1844                                      list[ns].info.master)) {
1845                                 ns++;
1846                         } else if ((nd == 1) &&
1847                                    !list[ns].info.representor &&
1848                                    !list[ns].info.master) {
1849                                 /*
1850                                  * Single IB device with
1851                                  * one physical port and
1852                                  * attached network device.
1853                                  * May be SRIOV is not enabled
1854                                  * or there is no representors.
1855                                  */
1856                                 DRV_LOG(INFO, "no E-Switch support detected");
1857                                 ns++;
1858                                 break;
1859                         }
1860                 }
1861                 if (!ns) {
1862                         DRV_LOG(ERR,
1863                                 "unable to recognize master/representors"
1864                                 " on the multiple IB devices");
1865                         rte_errno = ENOENT;
1866                         ret = -rte_errno;
1867                         goto exit;
1868                 }
1869         }
1870         MLX5_ASSERT(ns);
1871         /*
1872          * Sort list to probe devices in natural order for users convenience
1873          * (i.e. master first, then representors from lowest to highest ID).
1874          */
1875         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
1876         /* Device specific configuration. */
1877         switch (pci_dev->id.device_id) {
1878         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1879         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1880         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1881         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1882         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
1883         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
1884         case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF:
1885                 dev_config_vf = 1;
1886                 break;
1887         default:
1888                 dev_config_vf = 0;
1889                 break;
1890         }
1891         for (i = 0; i != ns; ++i) {
1892                 uint32_t restore;
1893
1894                 /* Default configuration. */
1895                 memset(&dev_config, 0, sizeof(struct mlx5_dev_config));
1896                 dev_config.vf = dev_config_vf;
1897                 dev_config.mps = MLX5_ARG_UNSET;
1898                 dev_config.dbnc = MLX5_ARG_UNSET;
1899                 dev_config.rx_vec_en = 1;
1900                 dev_config.txq_inline_max = MLX5_ARG_UNSET;
1901                 dev_config.txq_inline_min = MLX5_ARG_UNSET;
1902                 dev_config.txq_inline_mpw = MLX5_ARG_UNSET;
1903                 dev_config.txqs_inline = MLX5_ARG_UNSET;
1904                 dev_config.vf_nl_en = 1;
1905                 dev_config.mr_ext_memseg_en = 1;
1906                 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
1907                 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
1908                 dev_config.dv_esw_en = 1;
1909                 dev_config.dv_flow_en = 1;
1910                 dev_config.decap_en = 1;
1911                 dev_config.log_hp_size = MLX5_ARG_UNSET;
1912                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
1913                                                  &list[i],
1914                                                  &dev_config);
1915                 if (!list[i].eth_dev) {
1916                         if (rte_errno != EBUSY && rte_errno != EEXIST)
1917                                 break;
1918                         /* Device is disabled or already spawned. Ignore it. */
1919                         continue;
1920                 }
1921                 restore = list[i].eth_dev->data->dev_flags;
1922                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
1923                 /* Restore non-PCI flags cleared by the above call. */
1924                 list[i].eth_dev->data->dev_flags |= restore;
1925                 rte_eth_dev_probing_finish(list[i].eth_dev);
1926         }
1927         if (i != ns) {
1928                 DRV_LOG(ERR,
1929                         "probe of PCI device " PCI_PRI_FMT " aborted after"
1930                         " encountering an error: %s",
1931                         pci_dev->addr.domain, pci_dev->addr.bus,
1932                         pci_dev->addr.devid, pci_dev->addr.function,
1933                         strerror(rte_errno));
1934                 ret = -rte_errno;
1935                 /* Roll back. */
1936                 while (i--) {
1937                         if (!list[i].eth_dev)
1938                                 continue;
1939                         mlx5_dev_close(list[i].eth_dev);
1940                         /* mac_addrs must not be freed because in dev_private */
1941                         list[i].eth_dev->data->mac_addrs = NULL;
1942                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
1943                 }
1944                 /* Restore original error. */
1945                 rte_errno = -ret;
1946         } else {
1947                 ret = 0;
1948         }
1949 exit:
1950         /*
1951          * Do the routine cleanup:
1952          * - close opened Netlink sockets
1953          * - free allocated spawn data array
1954          * - free the Infiniband device list
1955          */
1956         if (nl_rdma >= 0)
1957                 close(nl_rdma);
1958         if (nl_route >= 0)
1959                 close(nl_route);
1960         if (list)
1961                 mlx5_free(list);
1962         MLX5_ASSERT(ibv_list);
1963         mlx5_glue->free_device_list(ibv_list);
1964         return ret;
1965 }
1966
1967 static int
1968 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
1969 {
1970         char *env;
1971         int value;
1972
1973         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
1974         /* Get environment variable to store. */
1975         env = getenv(MLX5_SHUT_UP_BF);
1976         value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
1977         if (config->dbnc == MLX5_ARG_UNSET)
1978                 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
1979         else
1980                 setenv(MLX5_SHUT_UP_BF,
1981                        config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
1982         return value;
1983 }
1984
1985 static void
1986 mlx5_restore_doorbell_mapping_env(int value)
1987 {
1988         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
1989         /* Restore the original environment variable state. */
1990         if (value == MLX5_ARG_UNSET)
1991                 unsetenv(MLX5_SHUT_UP_BF);
1992         else
1993                 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
1994 }
1995
1996 /**
1997  * Extract pdn of PD object using DV API.
1998  *
1999  * @param[in] pd
2000  *   Pointer to the verbs PD object.
2001  * @param[out] pdn
2002  *   Pointer to the PD object number variable.
2003  *
2004  * @return
2005  *   0 on success, error value otherwise.
2006  */
2007 int
2008 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
2009 {
2010 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2011         struct mlx5dv_obj obj;
2012         struct mlx5dv_pd pd_info;
2013         int ret = 0;
2014
2015         obj.pd.in = pd;
2016         obj.pd.out = &pd_info;
2017         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
2018         if (ret) {
2019                 DRV_LOG(DEBUG, "Fail to get PD object info");
2020                 return ret;
2021         }
2022         *pdn = pd_info.pdn;
2023         return 0;
2024 #else
2025         (void)pd;
2026         (void)pdn;
2027         return -ENOTSUP;
2028 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
2029 }
2030
2031 /**
2032  * Function API to open IB device.
2033  *
2034  * This function calls the Linux glue APIs to open a device.
2035  *
2036  * @param[in] spawn
2037  *   Pointer to the IB device attributes (name, port, etc).
2038  * @param[out] config
2039  *   Pointer to device configuration structure.
2040  * @param[out] sh
2041  *   Pointer to shared context structure.
2042  *
2043  * @return
2044  *   0 on success, a positive error value otherwise.
2045  */
2046 int
2047 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
2048                      const struct mlx5_dev_config *config,
2049                      struct mlx5_dev_ctx_shared *sh)
2050 {
2051         int dbmap_env;
2052         int err = 0;
2053
2054         sh->numa_node = spawn->pci_dev->device.numa_node;
2055         pthread_mutex_init(&sh->txpp.mutex, NULL);
2056         /*
2057          * Configure environment variable "MLX5_BF_SHUT_UP"
2058          * before the device creation. The rdma_core library
2059          * checks the variable at device creation and
2060          * stores the result internally.
2061          */
2062         dbmap_env = mlx5_config_doorbell_mapping_env(config);
2063         /* Try to open IB device with DV first, then usual Verbs. */
2064         errno = 0;
2065         sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
2066         if (sh->ctx) {
2067                 sh->devx = 1;
2068                 DRV_LOG(DEBUG, "DevX is supported");
2069                 /* The device is created, no need for environment. */
2070                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2071         } else {
2072                 /* The environment variable is still configured. */
2073                 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
2074                 err = errno ? errno : ENODEV;
2075                 /*
2076                  * The environment variable is not needed anymore,
2077                  * all device creation attempts are completed.
2078                  */
2079                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2080                 if (!sh->ctx)
2081                         return err;
2082                 DRV_LOG(DEBUG, "DevX is NOT supported");
2083                 err = 0;
2084         }
2085         return err;
2086 }
2087
2088 /**
2089  * Install shared asynchronous device events handler.
2090  * This function is implemented to support event sharing
2091  * between multiple ports of single IB device.
2092  *
2093  * @param sh
2094  *   Pointer to mlx5_dev_ctx_shared object.
2095  */
2096 void
2097 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2098 {
2099         int ret;
2100         int flags;
2101
2102         sh->intr_handle.fd = -1;
2103         flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
2104         ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
2105                     F_SETFL, flags | O_NONBLOCK);
2106         if (ret) {
2107                 DRV_LOG(INFO, "failed to change file descriptor async event"
2108                         " queue");
2109         } else {
2110                 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
2111                 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2112                 if (rte_intr_callback_register(&sh->intr_handle,
2113                                         mlx5_dev_interrupt_handler, sh)) {
2114                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2115                         sh->intr_handle.fd = -1;
2116                 }
2117         }
2118         if (sh->devx) {
2119 #ifdef HAVE_IBV_DEVX_ASYNC
2120                 sh->intr_handle_devx.fd = -1;
2121                 sh->devx_comp =
2122                         (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
2123                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2124                 if (!devx_comp) {
2125                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2126                         return;
2127                 }
2128                 flags = fcntl(devx_comp->fd, F_GETFL);
2129                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2130                 if (ret) {
2131                         DRV_LOG(INFO, "failed to change file descriptor"
2132                                 " devx comp");
2133                         return;
2134                 }
2135                 sh->intr_handle_devx.fd = devx_comp->fd;
2136                 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2137                 if (rte_intr_callback_register(&sh->intr_handle_devx,
2138                                         mlx5_dev_interrupt_handler_devx, sh)) {
2139                         DRV_LOG(INFO, "Fail to install the devx shared"
2140                                 " interrupt.");
2141                         sh->intr_handle_devx.fd = -1;
2142                 }
2143 #endif /* HAVE_IBV_DEVX_ASYNC */
2144         }
2145 }
2146
2147 /**
2148  * Uninstall shared asynchronous device events handler.
2149  * This function is implemented to support event sharing
2150  * between multiple ports of single IB device.
2151  *
2152  * @param dev
2153  *   Pointer to mlx5_dev_ctx_shared object.
2154  */
2155 void
2156 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2157 {
2158         if (sh->intr_handle.fd >= 0)
2159                 mlx5_intr_callback_unregister(&sh->intr_handle,
2160                                               mlx5_dev_interrupt_handler, sh);
2161 #ifdef HAVE_IBV_DEVX_ASYNC
2162         if (sh->intr_handle_devx.fd >= 0)
2163                 rte_intr_callback_unregister(&sh->intr_handle_devx,
2164                                   mlx5_dev_interrupt_handler_devx, sh);
2165         if (sh->devx_comp)
2166                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2167 #endif
2168 }
2169
2170 /**
2171  * Read statistics by a named counter.
2172  *
2173  * @param[in] priv
2174  *   Pointer to the private device data structure.
2175  * @param[in] ctr_name
2176  *   Pointer to the name of the statistic counter to read
2177  * @param[out] stat
2178  *   Pointer to read statistic value.
2179  * @return
2180  *   0 on success and stat is valud, 1 if failed to read the value
2181  *   rte_errno is set.
2182  *
2183  */
2184 int
2185 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2186                       uint64_t *stat)
2187 {
2188         int fd;
2189
2190         if (priv->sh) {
2191                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2192                       priv->sh->ibdev_path,
2193                       priv->dev_port,
2194                       ctr_name);
2195                 fd = open(path, O_RDONLY);
2196                 /*
2197                  * in switchdev the file location is not per port
2198                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2199                  */
2200                 if (fd == -1) {
2201                         MKSTR(path1, "%s/hw_counters/%s",
2202                               priv->sh->ibdev_path,
2203                               ctr_name);
2204                         fd = open(path1, O_RDONLY);
2205                 }
2206                 if (fd != -1) {
2207                         char buf[21] = {'\0'};
2208                         ssize_t n = read(fd, buf, sizeof(buf));
2209
2210                         close(fd);
2211                         if (n != -1) {
2212                                 *stat = strtoull(buf, NULL, 10);
2213                                 return 0;
2214                         }
2215                 }
2216         }
2217         *stat = 0;
2218         return 1;
2219 }
2220
2221 /**
2222  * Set the reg_mr and dereg_mr call backs
2223  *
2224  * @param reg_mr_cb[out]
2225  *   Pointer to reg_mr func
2226  * @param dereg_mr_cb[out]
2227  *   Pointer to dereg_mr func
2228  *
2229  */
2230 void
2231 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2232                       mlx5_dereg_mr_t *dereg_mr_cb)
2233 {
2234         *reg_mr_cb = mlx5_verbs_ops.reg_mr;
2235         *dereg_mr_cb = mlx5_verbs_ops.dereg_mr;
2236 }
2237
2238 /**
2239  * Remove a MAC address from device
2240  *
2241  * @param dev
2242  *   Pointer to Ethernet device structure.
2243  * @param index
2244  *   MAC address index.
2245  */
2246 void
2247 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2248 {
2249         struct mlx5_priv *priv = dev->data->dev_private;
2250         const int vf = priv->config.vf;
2251
2252         if (vf)
2253                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2254                                         mlx5_ifindex(dev), priv->mac_own,
2255                                         &dev->data->mac_addrs[index], index);
2256 }
2257
2258 /**
2259  * Adds a MAC address to the device
2260  *
2261  * @param dev
2262  *   Pointer to Ethernet device structure.
2263  * @param mac_addr
2264  *   MAC address to register.
2265  * @param index
2266  *   MAC address index.
2267  *
2268  * @return
2269  *   0 on success, a negative errno value otherwise
2270  */
2271 int
2272 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2273                      uint32_t index)
2274 {
2275         struct mlx5_priv *priv = dev->data->dev_private;
2276         const int vf = priv->config.vf;
2277         int ret = 0;
2278
2279         if (vf)
2280                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2281                                            mlx5_ifindex(dev), priv->mac_own,
2282                                            mac, index);
2283         return ret;
2284 }
2285
2286 /**
2287  * Modify a VF MAC address
2288  *
2289  * @param priv
2290  *   Pointer to device private data.
2291  * @param mac_addr
2292  *   MAC address to modify into.
2293  * @param iface_idx
2294  *   Net device interface index
2295  * @param vf_index
2296  *   VF index
2297  *
2298  * @return
2299  *   0 on success, a negative errno value otherwise
2300  */
2301 int
2302 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2303                            unsigned int iface_idx,
2304                            struct rte_ether_addr *mac_addr,
2305                            int vf_index)
2306 {
2307         return mlx5_nl_vf_mac_addr_modify
2308                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2309 }
2310
2311 /**
2312  * Set device promiscuous mode
2313  *
2314  * @param dev
2315  *   Pointer to Ethernet device structure.
2316  * @param enable
2317  *   0 - promiscuous is disabled, otherwise - enabled
2318  *
2319  * @return
2320  *   0 on success, a negative error value otherwise
2321  */
2322 int
2323 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2324 {
2325         struct mlx5_priv *priv = dev->data->dev_private;
2326
2327         return mlx5_nl_promisc(priv->nl_socket_route,
2328                                mlx5_ifindex(dev), !!enable);
2329 }
2330
2331 /**
2332  * Set device promiscuous mode
2333  *
2334  * @param dev
2335  *   Pointer to Ethernet device structure.
2336  * @param enable
2337  *   0 - all multicase is disabled, otherwise - enabled
2338  *
2339  * @return
2340  *   0 on success, a negative error value otherwise
2341  */
2342 int
2343 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2344 {
2345         struct mlx5_priv *priv = dev->data->dev_private;
2346
2347         return mlx5_nl_allmulti(priv->nl_socket_route,
2348                                 mlx5_ifindex(dev), !!enable);
2349 }
2350
2351 /**
2352  * Flush device MAC addresses
2353  *
2354  * @param dev
2355  *   Pointer to Ethernet device structure.
2356  *
2357  */
2358 void
2359 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2360 {
2361         struct mlx5_priv *priv = dev->data->dev_private;
2362
2363         mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2364                                dev->data->mac_addrs,
2365                                MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2366 }
2367
2368 const struct eth_dev_ops mlx5_os_dev_ops = {
2369         .dev_configure = mlx5_dev_configure,
2370         .dev_start = mlx5_dev_start,
2371         .dev_stop = mlx5_dev_stop,
2372         .dev_set_link_down = mlx5_set_link_down,
2373         .dev_set_link_up = mlx5_set_link_up,
2374         .dev_close = mlx5_dev_close,
2375         .promiscuous_enable = mlx5_promiscuous_enable,
2376         .promiscuous_disable = mlx5_promiscuous_disable,
2377         .allmulticast_enable = mlx5_allmulticast_enable,
2378         .allmulticast_disable = mlx5_allmulticast_disable,
2379         .link_update = mlx5_link_update,
2380         .stats_get = mlx5_stats_get,
2381         .stats_reset = mlx5_stats_reset,
2382         .xstats_get = mlx5_xstats_get,
2383         .xstats_reset = mlx5_xstats_reset,
2384         .xstats_get_names = mlx5_xstats_get_names,
2385         .fw_version_get = mlx5_fw_version_get,
2386         .dev_infos_get = mlx5_dev_infos_get,
2387         .read_clock = mlx5_txpp_read_clock,
2388         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2389         .vlan_filter_set = mlx5_vlan_filter_set,
2390         .rx_queue_setup = mlx5_rx_queue_setup,
2391         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2392         .tx_queue_setup = mlx5_tx_queue_setup,
2393         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2394         .rx_queue_release = mlx5_rx_queue_release,
2395         .tx_queue_release = mlx5_tx_queue_release,
2396         .rx_queue_start = mlx5_rx_queue_start,
2397         .rx_queue_stop = mlx5_rx_queue_stop,
2398         .tx_queue_start = mlx5_tx_queue_start,
2399         .tx_queue_stop = mlx5_tx_queue_stop,
2400         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2401         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2402         .mac_addr_remove = mlx5_mac_addr_remove,
2403         .mac_addr_add = mlx5_mac_addr_add,
2404         .mac_addr_set = mlx5_mac_addr_set,
2405         .set_mc_addr_list = mlx5_set_mc_addr_list,
2406         .mtu_set = mlx5_dev_set_mtu,
2407         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2408         .vlan_offload_set = mlx5_vlan_offload_set,
2409         .reta_update = mlx5_dev_rss_reta_update,
2410         .reta_query = mlx5_dev_rss_reta_query,
2411         .rss_hash_update = mlx5_rss_hash_update,
2412         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
2413         .filter_ctrl = mlx5_dev_filter_ctrl,
2414         .rxq_info_get = mlx5_rxq_info_get,
2415         .txq_info_get = mlx5_txq_info_get,
2416         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2417         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2418         .rx_queue_intr_enable = mlx5_rx_intr_enable,
2419         .rx_queue_intr_disable = mlx5_rx_intr_disable,
2420         .is_removed = mlx5_is_removed,
2421         .udp_tunnel_port_add  = mlx5_udp_tunnel_port_add,
2422         .get_module_info = mlx5_get_module_info,
2423         .get_module_eeprom = mlx5_get_module_eeprom,
2424         .hairpin_cap_get = mlx5_hairpin_cap_get,
2425         .mtr_ops_get = mlx5_flow_meter_ops_get,
2426 };
2427
2428 /* Available operations from secondary process. */
2429 const struct eth_dev_ops mlx5_os_dev_sec_ops = {
2430         .stats_get = mlx5_stats_get,
2431         .stats_reset = mlx5_stats_reset,
2432         .xstats_get = mlx5_xstats_get,
2433         .xstats_reset = mlx5_xstats_reset,
2434         .xstats_get_names = mlx5_xstats_get_names,
2435         .fw_version_get = mlx5_fw_version_get,
2436         .dev_infos_get = mlx5_dev_infos_get,
2437         .read_clock = mlx5_txpp_read_clock,
2438         .rx_queue_start = mlx5_rx_queue_start,
2439         .rx_queue_stop = mlx5_rx_queue_stop,
2440         .tx_queue_start = mlx5_tx_queue_start,
2441         .tx_queue_stop = mlx5_tx_queue_stop,
2442         .rxq_info_get = mlx5_rxq_info_get,
2443         .txq_info_get = mlx5_txq_info_get,
2444         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2445         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2446         .get_module_info = mlx5_get_module_info,
2447         .get_module_eeprom = mlx5_get_module_eeprom,
2448 };
2449
2450 /* Available operations in flow isolated mode. */
2451 const struct eth_dev_ops mlx5_os_dev_ops_isolate = {
2452         .dev_configure = mlx5_dev_configure,
2453         .dev_start = mlx5_dev_start,
2454         .dev_stop = mlx5_dev_stop,
2455         .dev_set_link_down = mlx5_set_link_down,
2456         .dev_set_link_up = mlx5_set_link_up,
2457         .dev_close = mlx5_dev_close,
2458         .promiscuous_enable = mlx5_promiscuous_enable,
2459         .promiscuous_disable = mlx5_promiscuous_disable,
2460         .allmulticast_enable = mlx5_allmulticast_enable,
2461         .allmulticast_disable = mlx5_allmulticast_disable,
2462         .link_update = mlx5_link_update,
2463         .stats_get = mlx5_stats_get,
2464         .stats_reset = mlx5_stats_reset,
2465         .xstats_get = mlx5_xstats_get,
2466         .xstats_reset = mlx5_xstats_reset,
2467         .xstats_get_names = mlx5_xstats_get_names,
2468         .fw_version_get = mlx5_fw_version_get,
2469         .dev_infos_get = mlx5_dev_infos_get,
2470         .read_clock = mlx5_txpp_read_clock,
2471         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2472         .vlan_filter_set = mlx5_vlan_filter_set,
2473         .rx_queue_setup = mlx5_rx_queue_setup,
2474         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2475         .tx_queue_setup = mlx5_tx_queue_setup,
2476         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2477         .rx_queue_release = mlx5_rx_queue_release,
2478         .tx_queue_release = mlx5_tx_queue_release,
2479         .rx_queue_start = mlx5_rx_queue_start,
2480         .rx_queue_stop = mlx5_rx_queue_stop,
2481         .tx_queue_start = mlx5_tx_queue_start,
2482         .tx_queue_stop = mlx5_tx_queue_stop,
2483         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2484         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2485         .mac_addr_remove = mlx5_mac_addr_remove,
2486         .mac_addr_add = mlx5_mac_addr_add,
2487         .mac_addr_set = mlx5_mac_addr_set,
2488         .set_mc_addr_list = mlx5_set_mc_addr_list,
2489         .mtu_set = mlx5_dev_set_mtu,
2490         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2491         .vlan_offload_set = mlx5_vlan_offload_set,
2492         .filter_ctrl = mlx5_dev_filter_ctrl,
2493         .rxq_info_get = mlx5_rxq_info_get,
2494         .txq_info_get = mlx5_txq_info_get,
2495         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2496         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2497         .rx_queue_intr_enable = mlx5_rx_intr_enable,
2498         .rx_queue_intr_disable = mlx5_rx_intr_disable,
2499         .is_removed = mlx5_is_removed,
2500         .get_module_info = mlx5_get_module_info,
2501         .get_module_eeprom = mlx5_get_module_eeprom,
2502         .hairpin_cap_get = mlx5_hairpin_cap_get,
2503         .mtr_ops_get = mlx5_flow_meter_ops_get,
2504 };