drivers/net/mlx5/linux/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2020 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12 #include <net/if.h>
  13 #include <linux/rtnetlink.h>
  14 #include <linux/sockios.h>
  15 #include <linux/ethtool.h>
  16 #include <fcntl.h>
  17
  18 #include <rte_malloc.h>
  19 #include <ethdev_driver.h>
  20 #include <ethdev_pci.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_bus_auxiliary.h>
  24 #include <rte_common.h>
  25 #include <rte_kvargs.h>
  26 #include <rte_rwlock.h>
  27 #include <rte_spinlock.h>
  28 #include <rte_string_fns.h>
  29 #include <rte_alarm.h>
  30 #include <rte_eal_paging.h>
  31
  32 #include <mlx5_glue.h>
  33 #include <mlx5_devx_cmds.h>
  34 #include <mlx5_common.h>
  35 #include <mlx5_common_mp.h>
  36 #include <mlx5_common_mr.h>
  37 #include <mlx5_malloc.h>
  38
  39 #include "mlx5_defs.h"
  40 #include "mlx5.h"
  41 #include "mlx5_common_os.h"
  42 #include "mlx5_utils.h"
  43 #include "mlx5_rxtx.h"
  44 #include "mlx5_rx.h"
  45 #include "mlx5_tx.h"
  46 #include "mlx5_autoconf.h"
  47 #include "mlx5_mr.h"
  48 #include "mlx5_flow.h"
  49 #include "rte_pmd_mlx5.h"
  50 #include "mlx5_verbs.h"
  51 #include "mlx5_nl.h"
  52 #include "mlx5_devx.h"
  53
  54 #ifndef HAVE_IBV_MLX5_MOD_MPW
  55 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
  56 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
  57 #endif
  58
  59 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
  60 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
  61 #endif
  62
  63 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  64
  65 /* Spinlock for mlx5_shared_data allocation. */
  66 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  67
  68 /* Process local data for secondary processes. */
  69 static struct mlx5_local_data mlx5_local_data;
  70
  71 /* rte flow indexed pool configuration. */
  72 static struct mlx5_indexed_pool_config icfg[] = {
  73         {
  74                 .size = sizeof(struct rte_flow),
  75                 .trunk_size = 64,
  76                 .need_lock = 1,
  77                 .release_mem_en = 0,
  78                 .malloc = mlx5_malloc,
  79                 .free = mlx5_free,
  80                 .per_core_cache = 0,
  81                 .type = "ctl_flow_ipool",
  82         },
  83         {
  84                 .size = sizeof(struct rte_flow),
  85                 .trunk_size = 64,
  86                 .grow_trunk = 3,
  87                 .grow_shift = 2,
  88                 .need_lock = 1,
  89                 .release_mem_en = 0,
  90                 .malloc = mlx5_malloc,
  91                 .free = mlx5_free,
  92                 .per_core_cache = 1 << 14,
  93                 .type = "rte_flow_ipool",
  94         },
  95         {
  96                 .size = sizeof(struct rte_flow),
  97                 .trunk_size = 64,
  98                 .grow_trunk = 3,
  99                 .grow_shift = 2,
 100                 .need_lock = 1,
 101                 .release_mem_en = 0,
 102                 .malloc = mlx5_malloc,
 103                 .free = mlx5_free,
 104                 .per_core_cache = 0,
 105                 .type = "mcp_flow_ipool",
 106         },
 107 };
 108
 109 /**
 110  * Set the completion channel file descriptor interrupt as non-blocking.
 111  *
 112  * @param[in] rxq_obj
 113  *   Pointer to RQ channel object, which includes the channel fd
 114  *
 115  * @param[out] fd
 116  *   The file descriptor (representing the intetrrupt) used in this channel.
 117  *
 118  * @return
 119  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
 120  */
 121 int
 122 mlx5_os_set_nonblock_channel_fd(int fd)
 123 {
 124         int flags;
 125
 126         flags = fcntl(fd, F_GETFL);
 127         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
 128 }
 129
 130 /**
 131  * Get mlx5 device attributes. The glue function query_device_ex() is called
 132  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
 133  * device attributes from the glue out parameter.
 134  *
 135  * @param dev
 136  *   Pointer to ibv context.
 137  *
 138  * @param device_attr
 139  *   Pointer to mlx5 device attributes.
 140  *
 141  * @return
 142  *   0 on success, non zero error number otherwise
 143  */
 144 int
 145 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
 146 {
 147         int err;
 148         struct ibv_device_attr_ex attr_ex;
 149         memset(device_attr, 0, sizeof(*device_attr));
 150         err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
 151         if (err)
 152                 return err;
 153
 154         device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
 155         device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
 156         device_attr->max_sge = attr_ex.orig_attr.max_sge;
 157         device_attr->max_cq = attr_ex.orig_attr.max_cq;
 158         device_attr->max_cqe = attr_ex.orig_attr.max_cqe;
 159         device_attr->max_mr = attr_ex.orig_attr.max_mr;
 160         device_attr->max_pd = attr_ex.orig_attr.max_pd;
 161         device_attr->max_qp = attr_ex.orig_attr.max_qp;
 162         device_attr->max_srq = attr_ex.orig_attr.max_srq;
 163         device_attr->max_srq_wr = attr_ex.orig_attr.max_srq_wr;
 164         device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
 165         device_attr->max_rwq_indirection_table_size =
 166                 attr_ex.rss_caps.max_rwq_indirection_table_size;
 167         device_attr->max_tso = attr_ex.tso_caps.max_tso;
 168         device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
 169
 170         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 171         err = mlx5_glue->dv_query_device(ctx, &dv_attr);
 172         if (err)
 173                 return err;
 174
 175         device_attr->flags = dv_attr.flags;
 176         device_attr->comp_mask = dv_attr.comp_mask;
 177 #ifdef HAVE_IBV_MLX5_MOD_SWP
 178         device_attr->sw_parsing_offloads =
 179                 dv_attr.sw_parsing_caps.sw_parsing_offloads;
 180 #endif
 181         device_attr->min_single_stride_log_num_of_bytes =
 182                 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
 183         device_attr->max_single_stride_log_num_of_bytes =
 184                 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
 185         device_attr->min_single_wqe_log_num_of_strides =
 186                 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
 187         device_attr->max_single_wqe_log_num_of_strides =
 188                 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
 189         device_attr->stride_supported_qpts =
 190                 dv_attr.striding_rq_caps.supported_qpts;
 191 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 192         device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
 193 #endif
 194         strlcpy(device_attr->fw_ver, attr_ex.orig_attr.fw_ver,
 195                 sizeof(device_attr->fw_ver));
 196
 197         return err;
 198 }
 199
 200 /**
 201  * Detect misc5 support or not
 202  *
 203  * @param[in] priv
 204  *   Device private data pointer
 205  */
 206 #ifdef HAVE_MLX5DV_DR
 207 static void
 208 __mlx5_discovery_misc5_cap(struct mlx5_priv *priv)
 209 {
 210 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 211         /* Dummy VxLAN matcher to detect rdma-core misc5 cap
 212          * Case: IPv4--->UDP--->VxLAN--->vni
 213          */
 214         void *tbl;
 215         struct mlx5_flow_dv_match_params matcher_mask;
 216         void *match_m;
 217         void *matcher;
 218         void *headers_m;
 219         void *misc5_m;
 220         uint32_t *tunnel_header_m;
 221         struct mlx5dv_flow_matcher_attr dv_attr;
 222
 223         memset(&matcher_mask, 0, sizeof(matcher_mask));
 224         matcher_mask.size = sizeof(matcher_mask.buf);
 225         match_m = matcher_mask.buf;
 226         headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers);
 227         misc5_m = MLX5_ADDR_OF(fte_match_param,
 228                                match_m, misc_parameters_5);
 229         tunnel_header_m = (uint32_t *)
 230                                 MLX5_ADDR_OF(fte_match_set_misc5,
 231                                 misc5_m, tunnel_header_1);
 232         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
 233         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4);
 234         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
 235         *tunnel_header_m = 0xffffff;
 236
 237         tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1);
 238         if (!tbl) {
 239                 DRV_LOG(INFO, "No SW steering support");
 240                 return;
 241         }
 242         dv_attr.type = IBV_FLOW_ATTR_NORMAL,
 243         dv_attr.match_mask = (void *)&matcher_mask,
 244         dv_attr.match_criteria_enable =
 245                         (1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) |
 246                         (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT);
 247         dv_attr.priority = 3;
 248 #ifdef HAVE_MLX5DV_DR_ESWITCH
 249         void *misc2_m;
 250         if (priv->config.dv_esw_en) {
 251                 /* FDB enabled reg_c_0 */
 252                 dv_attr.match_criteria_enable |=
 253                                 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT);
 254                 misc2_m = MLX5_ADDR_OF(fte_match_param,
 255                                        match_m, misc_parameters_2);
 256                 MLX5_SET(fte_match_set_misc2, misc2_m,
 257                          metadata_reg_c_0, 0xffff);
 258         }
 259 #endif
 260         matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->ctx,
 261                                                     &dv_attr, tbl);
 262         if (matcher) {
 263                 priv->sh->misc5_cap = 1;
 264                 mlx5_glue->dv_destroy_flow_matcher(matcher);
 265         }
 266         mlx5_glue->dr_destroy_flow_tbl(tbl);
 267 #else
 268         RTE_SET_USED(priv);
 269 #endif
 270 }
 271 #endif
 272
 273 /**
 274  * Initialize DR related data within private structure.
 275  * Routine checks the reference counter and does actual
 276  * resources creation/initialization only if counter is zero.
 277  *
 278  * @param[in] priv
 279  *   Pointer to the private device data structure.
 280  *
 281  * @return
 282  *   Zero on success, positive error code otherwise.
 283  */
 284 static int
 285 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 286 {
 287         struct mlx5_dev_ctx_shared *sh = priv->sh;
 288         char s[MLX5_NAME_SIZE] __rte_unused;
 289         int err;
 290
 291         MLX5_ASSERT(sh && sh->refcnt);
 292         if (sh->refcnt > 1)
 293                 return 0;
 294         err = mlx5_alloc_table_hash_list(priv);
 295         if (err)
 296                 goto error;
 297         /* The resources below are only valid with DV support. */
 298 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 299         /* Init port id action list. */
 300         snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name);
 301         sh->port_id_action_list = mlx5_list_create(s, sh, true,
 302                                                    flow_dv_port_id_create_cb,
 303                                                    flow_dv_port_id_match_cb,
 304                                                    flow_dv_port_id_remove_cb,
 305                                                    flow_dv_port_id_clone_cb,
 306                                                  flow_dv_port_id_clone_free_cb);
 307         if (!sh->port_id_action_list)
 308                 goto error;
 309         /* Init push vlan action list. */
 310         snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name);
 311         sh->push_vlan_action_list = mlx5_list_create(s, sh, true,
 312                                                     flow_dv_push_vlan_create_cb,
 313                                                     flow_dv_push_vlan_match_cb,
 314                                                     flow_dv_push_vlan_remove_cb,
 315                                                     flow_dv_push_vlan_clone_cb,
 316                                                flow_dv_push_vlan_clone_free_cb);
 317         if (!sh->push_vlan_action_list)
 318                 goto error;
 319         /* Init sample action list. */
 320         snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name);
 321         sh->sample_action_list = mlx5_list_create(s, sh, true,
 322                                                   flow_dv_sample_create_cb,
 323                                                   flow_dv_sample_match_cb,
 324                                                   flow_dv_sample_remove_cb,
 325                                                   flow_dv_sample_clone_cb,
 326                                                   flow_dv_sample_clone_free_cb);
 327         if (!sh->sample_action_list)
 328                 goto error;
 329         /* Init dest array action list. */
 330         snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name);
 331         sh->dest_array_list = mlx5_list_create(s, sh, true,
 332                                                flow_dv_dest_array_create_cb,
 333                                                flow_dv_dest_array_match_cb,
 334                                                flow_dv_dest_array_remove_cb,
 335                                                flow_dv_dest_array_clone_cb,
 336                                               flow_dv_dest_array_clone_free_cb);
 337         if (!sh->dest_array_list)
 338                 goto error;
 339 #endif
 340 #ifdef HAVE_MLX5DV_DR
 341         void *domain;
 342
 343         /* Reference counter is zero, we should initialize structures. */
 344         domain = mlx5_glue->dr_create_domain(sh->ctx,
 345                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 346         if (!domain) {
 347                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 348                 err = errno;
 349                 goto error;
 350         }
 351         sh->rx_domain = domain;
 352         domain = mlx5_glue->dr_create_domain(sh->ctx,
 353                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 354         if (!domain) {
 355                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 356                 err = errno;
 357                 goto error;
 358         }
 359         sh->tx_domain = domain;
 360 #ifdef HAVE_MLX5DV_DR_ESWITCH
 361         if (priv->config.dv_esw_en) {
 362                 domain  = mlx5_glue->dr_create_domain
 363                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 364                 if (!domain) {
 365                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 366                         err = errno;
 367                         goto error;
 368                 }
 369                 sh->fdb_domain = domain;
 370         }
 371         /*
 372          * The drop action is just some dummy placeholder in rdma-core. It
 373          * does not belong to domains and has no any attributes, and, can be
 374          * shared by the entire device.
 375          */
 376         sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop();
 377         if (!sh->dr_drop_action) {
 378                 DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop");
 379                 err = errno;
 380                 goto error;
 381         }
 382 #endif
 383         if (!sh->tunnel_hub && priv->config.dv_miss_info)
 384                 err = mlx5_alloc_tunnel_hub(sh);
 385         if (err) {
 386                 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
 387                 goto error;
 388         }
 389         if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
 390                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
 391                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
 392                 if (sh->fdb_domain)
 393                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
 394         }
 395         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 396         if (!priv->config.allow_duplicate_pattern) {
 397 #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE
 398                 DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?");
 399 #endif
 400                 mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0);
 401                 mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0);
 402                 if (sh->fdb_domain)
 403                         mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0);
 404         }
 405
 406         __mlx5_discovery_misc5_cap(priv);
 407 #endif /* HAVE_MLX5DV_DR */
 408         sh->default_miss_action =
 409                         mlx5_glue->dr_create_flow_action_default_miss();
 410         if (!sh->default_miss_action)
 411                 DRV_LOG(WARNING, "Default miss action is not supported.");
 412         return 0;
 413 error:
 414         /* Rollback the created objects. */
 415         if (sh->rx_domain) {
 416                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 417                 sh->rx_domain = NULL;
 418         }
 419         if (sh->tx_domain) {
 420                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 421                 sh->tx_domain = NULL;
 422         }
 423         if (sh->fdb_domain) {
 424                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 425                 sh->fdb_domain = NULL;
 426         }
 427         if (sh->dr_drop_action) {
 428                 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
 429                 sh->dr_drop_action = NULL;
 430         }
 431         if (sh->pop_vlan_action) {
 432                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 433                 sh->pop_vlan_action = NULL;
 434         }
 435         if (sh->encaps_decaps) {
 436                 mlx5_hlist_destroy(sh->encaps_decaps);
 437                 sh->encaps_decaps = NULL;
 438         }
 439         if (sh->modify_cmds) {
 440                 mlx5_hlist_destroy(sh->modify_cmds);
 441                 sh->modify_cmds = NULL;
 442         }
 443         if (sh->tag_table) {
 444                 /* tags should be destroyed with flow before. */
 445                 mlx5_hlist_destroy(sh->tag_table);
 446                 sh->tag_table = NULL;
 447         }
 448         if (sh->tunnel_hub) {
 449                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 450                 sh->tunnel_hub = NULL;
 451         }
 452         mlx5_free_table_hash_list(priv);
 453         if (sh->port_id_action_list) {
 454                 mlx5_list_destroy(sh->port_id_action_list);
 455                 sh->port_id_action_list = NULL;
 456         }
 457         if (sh->push_vlan_action_list) {
 458                 mlx5_list_destroy(sh->push_vlan_action_list);
 459                 sh->push_vlan_action_list = NULL;
 460         }
 461         if (sh->sample_action_list) {
 462                 mlx5_list_destroy(sh->sample_action_list);
 463                 sh->sample_action_list = NULL;
 464         }
 465         if (sh->dest_array_list) {
 466                 mlx5_list_destroy(sh->dest_array_list);
 467                 sh->dest_array_list = NULL;
 468         }
 469         return err;
 470 }
 471
 472 /**
 473  * Destroy DR related data within private structure.
 474  *
 475  * @param[in] priv
 476  *   Pointer to the private device data structure.
 477  */
 478 void
 479 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 480 {
 481         struct mlx5_dev_ctx_shared *sh = priv->sh;
 482
 483         MLX5_ASSERT(sh && sh->refcnt);
 484         if (sh->refcnt > 1)
 485                 return;
 486 #ifdef HAVE_MLX5DV_DR
 487         if (sh->rx_domain) {
 488                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 489                 sh->rx_domain = NULL;
 490         }
 491         if (sh->tx_domain) {
 492                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 493                 sh->tx_domain = NULL;
 494         }
 495 #ifdef HAVE_MLX5DV_DR_ESWITCH
 496         if (sh->fdb_domain) {
 497                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 498                 sh->fdb_domain = NULL;
 499         }
 500         if (sh->dr_drop_action) {
 501                 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
 502                 sh->dr_drop_action = NULL;
 503         }
 504 #endif
 505         if (sh->pop_vlan_action) {
 506                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 507                 sh->pop_vlan_action = NULL;
 508         }
 509 #endif /* HAVE_MLX5DV_DR */
 510         if (sh->default_miss_action)
 511                 mlx5_glue->destroy_flow_action
 512                                 (sh->default_miss_action);
 513         if (sh->encaps_decaps) {
 514                 mlx5_hlist_destroy(sh->encaps_decaps);
 515                 sh->encaps_decaps = NULL;
 516         }
 517         if (sh->modify_cmds) {
 518                 mlx5_hlist_destroy(sh->modify_cmds);
 519                 sh->modify_cmds = NULL;
 520         }
 521         if (sh->tag_table) {
 522                 /* tags should be destroyed with flow before. */
 523                 mlx5_hlist_destroy(sh->tag_table);
 524                 sh->tag_table = NULL;
 525         }
 526         if (sh->tunnel_hub) {
 527                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 528                 sh->tunnel_hub = NULL;
 529         }
 530         mlx5_free_table_hash_list(priv);
 531         if (sh->port_id_action_list) {
 532                 mlx5_list_destroy(sh->port_id_action_list);
 533                 sh->port_id_action_list = NULL;
 534         }
 535         if (sh->push_vlan_action_list) {
 536                 mlx5_list_destroy(sh->push_vlan_action_list);
 537                 sh->push_vlan_action_list = NULL;
 538         }
 539         if (sh->sample_action_list) {
 540                 mlx5_list_destroy(sh->sample_action_list);
 541                 sh->sample_action_list = NULL;
 542         }
 543         if (sh->dest_array_list) {
 544                 mlx5_list_destroy(sh->dest_array_list);
 545                 sh->dest_array_list = NULL;
 546         }
 547 }
 548
 549 /**
 550  * Initialize shared data between primary and secondary process.
 551  *
 552  * A memzone is reserved by primary process and secondary processes attach to
 553  * the memzone.
 554  *
 555  * @return
 556  *   0 on success, a negative errno value otherwise and rte_errno is set.
 557  */
 558 static int
 559 mlx5_init_shared_data(void)
 560 {
 561         const struct rte_memzone *mz;
 562         int ret = 0;
 563
 564         rte_spinlock_lock(&mlx5_shared_data_lock);
 565         if (mlx5_shared_data == NULL) {
 566                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 567                         /* Allocate shared memory. */
 568                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 569                                                  sizeof(*mlx5_shared_data),
 570                                                  SOCKET_ID_ANY, 0);
 571                         if (mz == NULL) {
 572                                 DRV_LOG(ERR,
 573                                         "Cannot allocate mlx5 shared data");
 574                                 ret = -rte_errno;
 575                                 goto error;
 576                         }
 577                         mlx5_shared_data = mz->addr;
 578                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 579                         rte_spinlock_init(&mlx5_shared_data->lock);
 580                 } else {
 581                         /* Lookup allocated shared memory. */
 582                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 583                         if (mz == NULL) {
 584                                 DRV_LOG(ERR,
 585                                         "Cannot attach mlx5 shared data");
 586                                 ret = -rte_errno;
 587                                 goto error;
 588                         }
 589                         mlx5_shared_data = mz->addr;
 590                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 591                 }
 592         }
 593 error:
 594         rte_spinlock_unlock(&mlx5_shared_data_lock);
 595         return ret;
 596 }
 597
 598 /**
 599  * PMD global initialization.
 600  *
 601  * Independent from individual device, this function initializes global
 602  * per-PMD data structures distinguishing primary and secondary processes.
 603  * Hence, each initialization is called once per a process.
 604  *
 605  * @return
 606  *   0 on success, a negative errno value otherwise and rte_errno is set.
 607  */
 608 static int
 609 mlx5_init_once(void)
 610 {
 611         struct mlx5_shared_data *sd;
 612         struct mlx5_local_data *ld = &mlx5_local_data;
 613         int ret = 0;
 614
 615         if (mlx5_init_shared_data())
 616                 return -rte_errno;
 617         sd = mlx5_shared_data;
 618         MLX5_ASSERT(sd);
 619         rte_spinlock_lock(&sd->lock);
 620         switch (rte_eal_process_type()) {
 621         case RTE_PROC_PRIMARY:
 622                 if (sd->init_done)
 623                         break;
 624                 LIST_INIT(&sd->mem_event_cb_list);
 625                 rte_rwlock_init(&sd->mem_event_rwlock);
 626                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
 627                                                 mlx5_mr_mem_event_cb, NULL);
 628                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
 629                                            mlx5_mp_os_primary_handle);
 630                 if (ret)
 631                         goto out;
 632                 sd->init_done = true;
 633                 break;
 634         case RTE_PROC_SECONDARY:
 635                 if (ld->init_done)
 636                         break;
 637                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
 638                                              mlx5_mp_os_secondary_handle);
 639                 if (ret)
 640                         goto out;
 641                 ++sd->secondary_cnt;
 642                 ld->init_done = true;
 643                 break;
 644         default:
 645                 break;
 646         }
 647 out:
 648         rte_spinlock_unlock(&sd->lock);
 649         return ret;
 650 }
 651
 652 /**
 653  * Create the Tx queue DevX/Verbs object.
 654  *
 655  * @param dev
 656  *   Pointer to Ethernet device.
 657  * @param idx
 658  *   Queue index in DPDK Tx queue array.
 659  *
 660  * @return
 661  *   0 on success, a negative errno value otherwise and rte_errno is set.
 662  */
 663 static int
 664 mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
 665 {
 666         struct mlx5_priv *priv = dev->data->dev_private;
 667         struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
 668         struct mlx5_txq_ctrl *txq_ctrl =
 669                         container_of(txq_data, struct mlx5_txq_ctrl, txq);
 670
 671         if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
 672                 return mlx5_txq_devx_obj_new(dev, idx);
 673 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 674         if (!priv->config.dv_esw_en)
 675                 return mlx5_txq_devx_obj_new(dev, idx);
 676 #endif
 677         return mlx5_txq_ibv_obj_new(dev, idx);
 678 }
 679
 680 /**
 681  * Release an Tx DevX/verbs queue object.
 682  *
 683  * @param txq_obj
 684  *   DevX/Verbs Tx queue object.
 685  */
 686 static void
 687 mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)
 688 {
 689         if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
 690                 mlx5_txq_devx_obj_release(txq_obj);
 691                 return;
 692         }
 693 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 694         if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) {
 695                 mlx5_txq_devx_obj_release(txq_obj);
 696                 return;
 697         }
 698 #endif
 699         mlx5_txq_ibv_obj_release(txq_obj);
 700 }
 701
 702 /**
 703  * DV flow counter mode detect and config.
 704  *
 705  * @param dev
 706  *   Pointer to rte_eth_dev structure.
 707  *
 708  */
 709 static void
 710 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
 711 {
 712 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 713         struct mlx5_priv *priv = dev->data->dev_private;
 714         struct mlx5_dev_ctx_shared *sh = priv->sh;
 715         bool fallback;
 716
 717 #ifndef HAVE_IBV_DEVX_ASYNC
 718         fallback = true;
 719 #else
 720         fallback = false;
 721         if (!priv->config.devx || !priv->config.dv_flow_en ||
 722             !priv->config.hca_attr.flow_counters_dump ||
 723             !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
 724             (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
 725                 fallback = true;
 726 #endif
 727         if (fallback)
 728                 DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
 729                         "counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
 730                         priv->config.hca_attr.flow_counters_dump,
 731                         priv->config.hca_attr.flow_counter_bulk_alloc_bitmap);
 732         /* Initialize fallback mode only on the port initializes sh. */
 733         if (sh->refcnt == 1)
 734                 sh->cmng.counter_fallback = fallback;
 735         else if (fallback != sh->cmng.counter_fallback)
 736                 DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
 737                         "with others:%d.", PORT_ID(priv), fallback);
 738 #endif
 739 }
 740
 741 /**
 742  * DR flow drop action support detect.
 743  *
 744  * @param dev
 745  *   Pointer to rte_eth_dev structure.
 746  *
 747  */
 748 static void
 749 mlx5_flow_drop_action_config(struct rte_eth_dev *dev __rte_unused)
 750 {
 751 #ifdef HAVE_MLX5DV_DR
 752         struct mlx5_priv *priv = dev->data->dev_private;
 753
 754         if (!priv->config.dv_flow_en || !priv->sh->dr_drop_action)
 755                 return;
 756         /**
 757          * DR supports drop action placeholder when it is supported;
 758          * otherwise, use the queue drop action.
 759          */
 760         if (mlx5_flow_discover_dr_action_support(dev))
 761                 priv->root_drop_action = priv->drop_queue.hrxq->action;
 762         else
 763                 priv->root_drop_action = priv->sh->dr_drop_action;
 764 #endif
 765 }
 766
 767 static void
 768 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
 769 {
 770         struct mlx5_priv *priv = dev->data->dev_private;
 771         void *ctx = priv->sh->ctx;
 772
 773         priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
 774         if (!priv->q_counters) {
 775                 struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
 776                 struct ibv_wq *wq;
 777
 778                 DRV_LOG(DEBUG, "Port %d queue counter object cannot be created "
 779                         "by DevX - fall-back to use the kernel driver global "
 780                         "queue counter.", dev->data->port_id);
 781                 /* Create WQ by kernel and query its queue counter ID. */
 782                 if (cq) {
 783                         wq = mlx5_glue->create_wq(ctx,
 784                                                   &(struct ibv_wq_init_attr){
 785                                                     .wq_type = IBV_WQT_RQ,
 786                                                     .max_wr = 1,
 787                                                     .max_sge = 1,
 788                                                     .pd = priv->sh->pd,
 789                                                     .cq = cq,
 790                                                 });
 791                         if (wq) {
 792                                 /* Counter is assigned only on RDY state. */
 793                                 int ret = mlx5_glue->modify_wq(wq,
 794                                                  &(struct ibv_wq_attr){
 795                                                  .attr_mask = IBV_WQ_ATTR_STATE,
 796                                                  .wq_state = IBV_WQS_RDY,
 797                                                 });
 798
 799                                 if (ret == 0)
 800                                         mlx5_devx_cmd_wq_query(wq,
 801                                                          &priv->counter_set_id);
 802                                 claim_zero(mlx5_glue->destroy_wq(wq));
 803                         }
 804                         claim_zero(mlx5_glue->destroy_cq(cq));
 805                 }
 806         } else {
 807                 priv->counter_set_id = priv->q_counters->id;
 808         }
 809         if (priv->counter_set_id == 0)
 810                 DRV_LOG(INFO, "Part of the port %d statistics will not be "
 811                         "available.", dev->data->port_id);
 812 }
 813
 814 /**
 815  * Check if representor spawn info match devargs.
 816  *
 817  * @param spawn
 818  *   Verbs device parameters (name, port, switch_info) to spawn.
 819  * @param eth_da
 820  *   Device devargs to probe.
 821  *
 822  * @return
 823  *   Match result.
 824  */
 825 static bool
 826 mlx5_representor_match(struct mlx5_dev_spawn_data *spawn,
 827                        struct rte_eth_devargs *eth_da)
 828 {
 829         struct mlx5_switch_info *switch_info = &spawn->info;
 830         unsigned int p, f;
 831         uint16_t id;
 832         uint16_t repr_id = mlx5_representor_id_encode(switch_info,
 833                                                       eth_da->type);
 834
 835         switch (eth_da->type) {
 836         case RTE_ETH_REPRESENTOR_SF:
 837                 if (!(spawn->info.port_name == -1 &&
 838                       switch_info->name_type ==
 839                                 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 840                     switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) {
 841                         rte_errno = EBUSY;
 842                         return false;
 843                 }
 844                 break;
 845         case RTE_ETH_REPRESENTOR_VF:
 846                 /* Allows HPF representor index -1 as exception. */
 847                 if (!(spawn->info.port_name == -1 &&
 848                       switch_info->name_type ==
 849                                 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 850                     switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) {
 851                         rte_errno = EBUSY;
 852                         return false;
 853                 }
 854                 break;
 855         case RTE_ETH_REPRESENTOR_NONE:
 856                 rte_errno = EBUSY;
 857                 return false;
 858         default:
 859                 rte_errno = ENOTSUP;
 860                 DRV_LOG(ERR, "unsupported representor type");
 861                 return false;
 862         }
 863         /* Check representor ID: */
 864         for (p = 0; p < eth_da->nb_ports; ++p) {
 865                 if (spawn->pf_bond < 0) {
 866                         /* For non-LAG mode, allow and ignore pf. */
 867                         switch_info->pf_num = eth_da->ports[p];
 868                         repr_id = mlx5_representor_id_encode(switch_info,
 869                                                              eth_da->type);
 870                 }
 871                 for (f = 0; f < eth_da->nb_representor_ports; ++f) {
 872                         id = MLX5_REPRESENTOR_ID
 873                                 (eth_da->ports[p], eth_da->type,
 874                                  eth_da->representor_ports[f]);
 875                         if (repr_id == id)
 876                                 return true;
 877                 }
 878         }
 879         rte_errno = EBUSY;
 880         return false;
 881 }
 882
 883
 884 /**
 885  * Spawn an Ethernet device from Verbs information.
 886  *
 887  * @param dpdk_dev
 888  *   Backing DPDK device.
 889  * @param spawn
 890  *   Verbs device parameters (name, port, switch_info) to spawn.
 891  * @param config
 892  *   Device configuration parameters.
 893  * @param eth_da
 894  *   Device arguments.
 895  *
 896  * @return
 897  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 898  *   is set. The following errors are defined:
 899  *
 900  *   EBUSY: device is not supposed to be spawned.
 901  *   EEXIST: device is already spawned
 902  */
 903 static struct rte_eth_dev *
 904 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 905                struct mlx5_dev_spawn_data *spawn,
 906                struct mlx5_dev_config *config,
 907                struct rte_eth_devargs *eth_da)
 908 {
 909         const struct mlx5_switch_info *switch_info = &spawn->info;
 910         struct mlx5_dev_ctx_shared *sh = NULL;
 911         struct ibv_port_attr port_attr;
 912         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 913         struct rte_eth_dev *eth_dev = NULL;
 914         struct mlx5_priv *priv = NULL;
 915         int err = 0;
 916         unsigned int hw_padding = 0;
 917         unsigned int mps;
 918         unsigned int mpls_en = 0;
 919         unsigned int swp = 0;
 920         unsigned int mprq = 0;
 921         unsigned int mprq_min_stride_size_n = 0;
 922         unsigned int mprq_max_stride_size_n = 0;
 923         unsigned int mprq_min_stride_num_n = 0;
 924         unsigned int mprq_max_stride_num_n = 0;
 925         struct rte_ether_addr mac;
 926         char name[RTE_ETH_NAME_MAX_LEN];
 927         int own_domain_id = 0;
 928         uint16_t port_id;
 929         struct mlx5_port_info vport_info = { .query_flags = 0 };
 930         int i;
 931
 932         /* Determine if this port representor is supposed to be spawned. */
 933         if (switch_info->representor && dpdk_dev->devargs &&
 934             !mlx5_representor_match(spawn, eth_da))
 935                 return NULL;
 936         /* Build device name. */
 937         if (spawn->pf_bond < 0) {
 938                 /* Single device. */
 939                 if (!switch_info->representor)
 940                         strlcpy(name, dpdk_dev->name, sizeof(name));
 941                 else
 942                         err = snprintf(name, sizeof(name), "%s_representor_%s%u",
 943                                  dpdk_dev->name,
 944                                  switch_info->name_type ==
 945                                  MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
 946                                  switch_info->port_name);
 947         } else {
 948                 /* Bonding device. */
 949                 if (!switch_info->representor) {
 950                         err = snprintf(name, sizeof(name), "%s_%s",
 951                                        dpdk_dev->name, spawn->phys_dev_name);
 952                 } else {
 953                         err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u",
 954                                 dpdk_dev->name, spawn->phys_dev_name,
 955                                 switch_info->ctrl_num,
 956                                 switch_info->pf_num,
 957                                 switch_info->name_type ==
 958                                 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
 959                                 switch_info->port_name);
 960                 }
 961         }
 962         if (err >= (int)sizeof(name))
 963                 DRV_LOG(WARNING, "device name overflow %s", name);
 964         /* check if the device is already spawned */
 965         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 966                 rte_errno = EEXIST;
 967                 return NULL;
 968         }
 969         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 970         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 971                 struct mlx5_mp_id mp_id;
 972
 973                 eth_dev = rte_eth_dev_attach_secondary(name);
 974                 if (eth_dev == NULL) {
 975                         DRV_LOG(ERR, "can not attach rte ethdev");
 976                         rte_errno = ENOMEM;
 977                         return NULL;
 978                 }
 979                 eth_dev->device = dpdk_dev;
 980                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
 981                 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
 982                 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
 983                 err = mlx5_proc_priv_init(eth_dev);
 984                 if (err)
 985                         return NULL;
 986                 mlx5_mp_id_init(&mp_id, eth_dev->data->port_id);
 987                 /* Receive command fd from primary process */
 988                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
 989                 if (err < 0)
 990                         goto err_secondary;
 991                 /* Remap UAR for Tx queues. */
 992                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
 993                 if (err)
 994                         goto err_secondary;
 995                 /*
 996                  * Ethdev pointer is still required as input since
 997                  * the primary device is not accessible from the
 998                  * secondary process.
 999                  */
1000                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1001                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1002                 return eth_dev;
1003 err_secondary:
1004                 mlx5_dev_close(eth_dev);
1005                 return NULL;
1006         }
1007         /*
1008          * Some parameters ("tx_db_nc" in particularly) are needed in
1009          * advance to create dv/verbs device context. We proceed the
1010          * devargs here to get ones, and later proceed devargs again
1011          * to override some hardware settings.
1012          */
1013         err = mlx5_args(config, dpdk_dev->devargs);
1014         if (err) {
1015                 err = rte_errno;
1016                 DRV_LOG(ERR, "failed to process device arguments: %s",
1017                         strerror(rte_errno));
1018                 goto error;
1019         }
1020         if (config->dv_miss_info) {
1021                 if (switch_info->master || switch_info->representor)
1022                         config->dv_xmeta_en = MLX5_XMETA_MODE_META16;
1023         }
1024         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
1025         if (!sh)
1026                 return NULL;
1027         config->devx = sh->devx;
1028 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
1029         config->dest_tir = 1;
1030 #endif
1031 #ifdef HAVE_IBV_MLX5_MOD_SWP
1032         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1033 #endif
1034         /*
1035          * Multi-packet send is supported by ConnectX-4 Lx PF as well
1036          * as all ConnectX-5 devices.
1037          */
1038 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1039         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1040 #endif
1041 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1042         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1043 #endif
1044         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1045         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1046                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1047                         DRV_LOG(DEBUG, "enhanced MPW is supported");
1048                         mps = MLX5_MPW_ENHANCED;
1049                 } else {
1050                         DRV_LOG(DEBUG, "MPW is supported");
1051                         mps = MLX5_MPW;
1052                 }
1053         } else {
1054                 DRV_LOG(DEBUG, "MPW isn't supported");
1055                 mps = MLX5_MPW_DISABLED;
1056         }
1057 #ifdef HAVE_IBV_MLX5_MOD_SWP
1058         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1059                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1060         DRV_LOG(DEBUG, "SWP support: %u", swp);
1061 #endif
1062         config->swp = swp & (MLX5_SW_PARSING_CAP | MLX5_SW_PARSING_CSUM_CAP |
1063                 MLX5_SW_PARSING_TSO_CAP);
1064 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1065         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1066                 struct mlx5dv_striding_rq_caps mprq_caps =
1067                         dv_attr.striding_rq_caps;
1068
1069                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1070                         mprq_caps.min_single_stride_log_num_of_bytes);
1071                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1072                         mprq_caps.max_single_stride_log_num_of_bytes);
1073                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1074                         mprq_caps.min_single_wqe_log_num_of_strides);
1075                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1076                         mprq_caps.max_single_wqe_log_num_of_strides);
1077                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1078                         mprq_caps.supported_qpts);
1079                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1080                 mprq = 1;
1081                 mprq_min_stride_size_n =
1082                         mprq_caps.min_single_stride_log_num_of_bytes;
1083                 mprq_max_stride_size_n =
1084                         mprq_caps.max_single_stride_log_num_of_bytes;
1085                 mprq_min_stride_num_n =
1086                         mprq_caps.min_single_wqe_log_num_of_strides;
1087                 mprq_max_stride_num_n =
1088                         mprq_caps.max_single_wqe_log_num_of_strides;
1089         }
1090 #endif
1091         /* Rx CQE compression is enabled by default. */
1092         config->cqe_comp = 1;
1093 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1094         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1095                 config->tunnel_en = dv_attr.tunnel_offloads_caps &
1096                              (MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN |
1097                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE |
1098                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE);
1099         }
1100         if (config->tunnel_en) {
1101                 DRV_LOG(DEBUG, "tunnel offloading is supported for %s%s%s",
1102                 config->tunnel_en &
1103                 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN ? "[VXLAN]" : "",
1104                 config->tunnel_en &
1105                 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE ? "[GRE]" : "",
1106                 config->tunnel_en &
1107                 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE ? "[GENEVE]" : ""
1108                 );
1109         } else {
1110                 DRV_LOG(DEBUG, "tunnel offloading is not supported");
1111         }
1112 #else
1113         DRV_LOG(WARNING,
1114                 "tunnel offloading disabled due to old OFED/rdma-core version");
1115 #endif
1116 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1117         mpls_en = ((dv_attr.tunnel_offloads_caps &
1118                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1119                    (dv_attr.tunnel_offloads_caps &
1120                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1121         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1122                 mpls_en ? "" : "not ");
1123 #else
1124         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1125                 " old OFED/rdma-core version or firmware configuration");
1126 #endif
1127         config->mpls_en = mpls_en;
1128         /* Check port status. */
1129         err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
1130         if (err) {
1131                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1132                 goto error;
1133         }
1134         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1135                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1136                 err = EINVAL;
1137                 goto error;
1138         }
1139         if (port_attr.state != IBV_PORT_ACTIVE)
1140                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1141                         mlx5_glue->port_state_str(port_attr.state),
1142                         port_attr.state);
1143         /* Allocate private eth device data. */
1144         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
1145                            sizeof(*priv),
1146                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1147         if (priv == NULL) {
1148                 DRV_LOG(ERR, "priv allocation failure");
1149                 err = ENOMEM;
1150                 goto error;
1151         }
1152         priv->sh = sh;
1153         priv->dev_port = spawn->phys_port;
1154         priv->pci_dev = spawn->pci_dev;
1155         priv->mtu = RTE_ETHER_MTU;
1156         /* Some internal functions rely on Netlink sockets, open them now. */
1157         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1158         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1159         priv->representor = !!switch_info->representor;
1160         priv->master = !!switch_info->master;
1161         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1162         priv->vport_meta_tag = 0;
1163         priv->vport_meta_mask = 0;
1164         priv->pf_bond = spawn->pf_bond;
1165
1166         DRV_LOG(DEBUG,
1167                 "dev_port=%u bus=%s pci=%s master=%d representor=%d pf_bond=%d\n",
1168                 priv->dev_port, dpdk_dev->bus->name,
1169                 priv->pci_dev ? priv->pci_dev->name : "NONE",
1170                 priv->master, priv->representor, priv->pf_bond);
1171
1172         /*
1173          * If we have E-Switch we should determine the vport attributes.
1174          * E-Switch may use either source vport field or reg_c[0] metadata
1175          * register to match on vport index. The engaged part of metadata
1176          * register is defined by mask.
1177          */
1178         if (switch_info->representor || switch_info->master) {
1179                 err = mlx5_glue->devx_port_query(sh->ctx,
1180                                                  spawn->phys_port,
1181                                                  &vport_info);
1182                 if (err) {
1183                         DRV_LOG(WARNING,
1184                                 "Cannot query devx port %d on device %s",
1185                                 spawn->phys_port, spawn->phys_dev_name);
1186                         vport_info.query_flags = 0;
1187                 }
1188         }
1189         if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) {
1190                 priv->vport_meta_tag = vport_info.vport_meta_tag;
1191                 priv->vport_meta_mask = vport_info.vport_meta_mask;
1192                 if (!priv->vport_meta_mask) {
1193                         DRV_LOG(ERR,
1194                                 "vport zero mask for port %d on bonding device %s",
1195                                 spawn->phys_port, spawn->phys_dev_name);
1196                         err = ENOTSUP;
1197                         goto error;
1198                 }
1199                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
1200                         DRV_LOG(ERR,
1201                                 "Invalid vport tag for port %d on bonding device %s",
1202                                 spawn->phys_port, spawn->phys_dev_name);
1203                         err = ENOTSUP;
1204                         goto error;
1205                 }
1206         }
1207         if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) {
1208                 priv->vport_id = vport_info.vport_id;
1209         } else if (spawn->pf_bond >= 0 &&
1210                    (switch_info->representor || switch_info->master)) {
1211                 DRV_LOG(ERR,
1212                         "Cannot deduce vport index for port %d on bonding device %s",
1213                         spawn->phys_port, spawn->phys_dev_name);
1214                 err = ENOTSUP;
1215                 goto error;
1216         } else {
1217                 /*
1218                  * Suppose vport index in compatible way. Kernel/rdma_core
1219                  * support single E-Switch per PF configurations only and
1220                  * vport_id field contains the vport index for associated VF,
1221                  * which is deduced from representor port name.
1222                  * For example, let's have the IB device port 10, it has
1223                  * attached network device eth0, which has port name attribute
1224                  * pf0vf2, we can deduce the VF number as 2, and set vport index
1225                  * as 3 (2+1). This assigning schema should be changed if the
1226                  * multiple E-Switch instances per PF configurations or/and PCI
1227                  * subfunctions are added.
1228                  */
1229                 priv->vport_id = switch_info->representor ?
1230                                  switch_info->port_name + 1 : -1;
1231         }
1232         priv->representor_id = mlx5_representor_id_encode(switch_info,
1233                                                           eth_da->type);
1234         /*
1235          * Look for sibling devices in order to reuse their switch domain
1236          * if any, otherwise allocate one.
1237          */
1238         MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1239                 const struct mlx5_priv *opriv =
1240                         rte_eth_devices[port_id].data->dev_private;
1241
1242                 if (!opriv ||
1243                     opriv->sh != priv->sh ||
1244                         opriv->domain_id ==
1245                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1246                         continue;
1247                 priv->domain_id = opriv->domain_id;
1248                 DRV_LOG(DEBUG, "dev_port-%u inherit domain_id=%u\n",
1249                         priv->dev_port, priv->domain_id);
1250                 break;
1251         }
1252         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1253                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1254                 if (err) {
1255                         err = rte_errno;
1256                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1257                                 strerror(rte_errno));
1258                         goto error;
1259                 }
1260                 own_domain_id = 1;
1261                 DRV_LOG(DEBUG, "dev_port-%u new domain_id=%u\n",
1262                         priv->dev_port, priv->domain_id);
1263         }
1264         /* Override some values set by hardware configuration. */
1265         mlx5_args(config, dpdk_dev->devargs);
1266         err = mlx5_dev_check_sibling_config(priv, config, dpdk_dev);
1267         if (err)
1268                 goto error;
1269         config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1270                             IBV_DEVICE_RAW_IP_CSUM);
1271         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1272                 (config->hw_csum ? "" : "not "));
1273 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1274         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1275         DRV_LOG(DEBUG, "counters are not supported");
1276 #endif
1277 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
1278         if (config->dv_flow_en) {
1279                 DRV_LOG(WARNING, "DV flow is not supported");
1280                 config->dv_flow_en = 0;
1281         }
1282 #endif
1283         if (spawn->max_port > UINT8_MAX) {
1284                 /* Verbs can't support ports larger than 255 by design. */
1285                 DRV_LOG(ERR, "can't support IB ports > UINT8_MAX");
1286                 err = EINVAL;
1287                 goto error;
1288         }
1289         config->ind_table_max_size =
1290                 sh->device_attr.max_rwq_indirection_table_size;
1291         /*
1292          * Remove this check once DPDK supports larger/variable
1293          * indirection tables.
1294          */
1295         if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1296                 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1297         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1298                 config->ind_table_max_size);
1299         config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1300                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1301         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1302                 (config->hw_vlan_strip ? "" : "not "));
1303         config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1304                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1305 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1306         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1307 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1308         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1309                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1310 #endif
1311         if (config->hw_padding && !hw_padding) {
1312                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1313                 config->hw_padding = 0;
1314         } else if (config->hw_padding) {
1315                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1316         }
1317         config->tso = (sh->device_attr.max_tso > 0 &&
1318                       (sh->device_attr.tso_supported_qpts &
1319                        (1 << IBV_QPT_RAW_PACKET)));
1320         if (config->tso)
1321                 config->tso_max_payload_sz = sh->device_attr.max_tso;
1322         /*
1323          * MPW is disabled by default, while the Enhanced MPW is enabled
1324          * by default.
1325          */
1326         if (config->mps == MLX5_ARG_UNSET)
1327                 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1328                                                           MLX5_MPW_DISABLED;
1329         else
1330                 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
1331         DRV_LOG(INFO, "%sMPS is %s",
1332                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1333                 config->mps == MLX5_MPW ? "legacy " : "",
1334                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1335         if (config->devx) {
1336                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
1337                 if (err) {
1338                         err = -err;
1339                         goto error;
1340                 }
1341                 /* Check relax ordering support. */
1342                 if (!haswell_broadwell_cpu) {
1343                         sh->cmng.relaxed_ordering_write =
1344                                 config->hca_attr.relaxed_ordering_write;
1345                         sh->cmng.relaxed_ordering_read =
1346                                 config->hca_attr.relaxed_ordering_read;
1347                 } else {
1348                         sh->cmng.relaxed_ordering_read = 0;
1349                         sh->cmng.relaxed_ordering_write = 0;
1350                 }
1351                 sh->rq_ts_format = config->hca_attr.rq_ts_format;
1352                 sh->sq_ts_format = config->hca_attr.sq_ts_format;
1353                 sh->steering_format_version =
1354                         config->hca_attr.steering_format_version;
1355                 sh->qp_ts_format = config->hca_attr.qp_ts_format;
1356                 /* Check for LRO support. */
1357                 if (config->dest_tir && config->hca_attr.lro_cap &&
1358                     config->dv_flow_en) {
1359                         /* TBD check tunnel lro caps. */
1360                         config->lro.supported = config->hca_attr.lro_cap;
1361                         DRV_LOG(DEBUG, "Device supports LRO");
1362                         /*
1363                          * If LRO timeout is not configured by application,
1364                          * use the minimal supported value.
1365                          */
1366                         if (!config->lro.timeout)
1367                                 config->lro.timeout =
1368                                 config->hca_attr.lro_timer_supported_periods[0];
1369                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1370                                 config->lro.timeout);
1371                         DRV_LOG(DEBUG, "LRO minimal size of TCP segment "
1372                                 "required for coalescing is %d bytes",
1373                                 config->hca_attr.lro_min_mss_size);
1374                 }
1375 #if defined(HAVE_MLX5DV_DR) && \
1376         (defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \
1377          defined(HAVE_MLX5_DR_CREATE_ACTION_ASO))
1378                 if (config->hca_attr.qos.sup &&
1379                     config->hca_attr.qos.flow_meter_old &&
1380                     config->dv_flow_en) {
1381                         uint8_t reg_c_mask =
1382                                 config->hca_attr.qos.flow_meter_reg_c_ids;
1383                         /*
1384                          * Meter needs two REG_C's for color match and pre-sfx
1385                          * flow match. Here get the REG_C for color match.
1386                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
1387                          */
1388                         reg_c_mask &= 0xfc;
1389                         if (__builtin_popcount(reg_c_mask) < 1) {
1390                                 priv->mtr_en = 0;
1391                                 DRV_LOG(WARNING, "No available register for"
1392                                         " meter.");
1393                         } else {
1394                                 /*
1395                                  * The meter color register is used by the
1396                                  * flow-hit feature as well.
1397                                  * The flow-hit feature must use REG_C_3
1398                                  * Prefer REG_C_3 if it is available.
1399                                  */
1400                                 if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
1401                                         priv->mtr_color_reg = REG_C_3;
1402                                 else
1403                                         priv->mtr_color_reg = ffs(reg_c_mask)
1404                                                               - 1 + REG_C_0;
1405                                 priv->mtr_en = 1;
1406                                 priv->mtr_reg_share =
1407                                       config->hca_attr.qos.flow_meter;
1408                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1409                                         priv->mtr_color_reg);
1410                         }
1411                 }
1412                 if (config->hca_attr.qos.sup &&
1413                         config->hca_attr.qos.flow_meter_aso_sup) {
1414                         uint32_t log_obj_size =
1415                                 rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
1416                         if (log_obj_size >=
1417                         config->hca_attr.qos.log_meter_aso_granularity &&
1418                         log_obj_size <=
1419                         config->hca_attr.qos.log_meter_aso_max_alloc)
1420                                 sh->meter_aso_en = 1;
1421                 }
1422                 if (priv->mtr_en) {
1423                         err = mlx5_aso_flow_mtrs_mng_init(priv->sh);
1424                         if (err) {
1425                                 err = -err;
1426                                 goto error;
1427                         }
1428                 }
1429                 if (config->hca_attr.flow.tunnel_header_0_1)
1430                         sh->tunnel_header_0_1 = 1;
1431 #endif
1432 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
1433                 if (config->hca_attr.flow_hit_aso &&
1434                     priv->mtr_color_reg == REG_C_3) {
1435                         sh->flow_hit_aso_en = 1;
1436                         err = mlx5_flow_aso_age_mng_init(sh);
1437                         if (err) {
1438                                 err = -err;
1439                                 goto error;
1440                         }
1441                         DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
1442                 }
1443 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
1444 #if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO) && \
1445         defined(HAVE_MLX5_DR_ACTION_ASO_CT)
1446                 if (config->hca_attr.ct_offload &&
1447                     priv->mtr_color_reg == REG_C_3) {
1448                         err = mlx5_flow_aso_ct_mng_init(sh);
1449                         if (err) {
1450                                 err = -err;
1451                                 goto error;
1452                         }
1453                         DRV_LOG(DEBUG, "CT ASO is supported.");
1454                         sh->ct_aso_en = 1;
1455                 }
1456 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */
1457 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1458                 if (config->hca_attr.log_max_ft_sampler_num > 0  &&
1459                     config->dv_flow_en) {
1460                         priv->sampler_en = 1;
1461                         DRV_LOG(DEBUG, "Sampler enabled!");
1462                 } else {
1463                         priv->sampler_en = 0;
1464                         if (!config->hca_attr.log_max_ft_sampler_num)
1465                                 DRV_LOG(WARNING,
1466                                         "No available register for sampler.");
1467                         else
1468                                 DRV_LOG(DEBUG, "DV flow is not supported!");
1469                 }
1470 #endif
1471         }
1472         if (config->cqe_comp && RTE_CACHE_LINE_SIZE == 128 &&
1473             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) {
1474                 DRV_LOG(WARNING, "Rx CQE 128B compression is not supported");
1475                 config->cqe_comp = 0;
1476         }
1477         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_FTAG_STRIDX &&
1478             (!config->devx || !config->hca_attr.mini_cqe_resp_flow_tag)) {
1479                 DRV_LOG(WARNING, "Flow Tag CQE compression"
1480                                  " format isn't supported.");
1481                 config->cqe_comp = 0;
1482         }
1483         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_L34H_STRIDX &&
1484             (!config->devx || !config->hca_attr.mini_cqe_resp_l3_l4_tag)) {
1485                 DRV_LOG(WARNING, "L3/L4 Header CQE compression"
1486                                  " format isn't supported.");
1487                 config->cqe_comp = 0;
1488         }
1489         DRV_LOG(DEBUG, "Rx CQE compression is %ssupported",
1490                         config->cqe_comp ? "" : "not ");
1491         if (config->tx_pp) {
1492                 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1493                         config->hca_attr.dev_freq_khz);
1494                 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1495                         config->hca_attr.qos.packet_pacing ? "" : "not ");
1496                 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1497                         config->hca_attr.cross_channel ? "" : "not ");
1498                 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1499                         config->hca_attr.wqe_index_ignore ? "" : "not ");
1500                 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1501                         config->hca_attr.non_wire_sq ? "" : "not ");
1502                 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1503                         config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1504                         config->hca_attr.log_max_static_sq_wq);
1505                 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1506                         config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1507                 if (!config->devx) {
1508                         DRV_LOG(ERR, "DevX is required for packet pacing");
1509                         err = ENODEV;
1510                         goto error;
1511                 }
1512                 if (!config->hca_attr.qos.packet_pacing) {
1513                         DRV_LOG(ERR, "Packet pacing is not supported");
1514                         err = ENODEV;
1515                         goto error;
1516                 }
1517                 if (!config->hca_attr.cross_channel) {
1518                         DRV_LOG(ERR, "Cross channel operations are"
1519                                      " required for packet pacing");
1520                         err = ENODEV;
1521                         goto error;
1522                 }
1523                 if (!config->hca_attr.wqe_index_ignore) {
1524                         DRV_LOG(ERR, "WQE index ignore feature is"
1525                                      " required for packet pacing");
1526                         err = ENODEV;
1527                         goto error;
1528                 }
1529                 if (!config->hca_attr.non_wire_sq) {
1530                         DRV_LOG(ERR, "Non-wire SQ feature is"
1531                                      " required for packet pacing");
1532                         err = ENODEV;
1533                         goto error;
1534                 }
1535                 if (!config->hca_attr.log_max_static_sq_wq) {
1536                         DRV_LOG(ERR, "Static WQE SQ feature is"
1537                                      " required for packet pacing");
1538                         err = ENODEV;
1539                         goto error;
1540                 }
1541                 if (!config->hca_attr.qos.wqe_rate_pp) {
1542                         DRV_LOG(ERR, "WQE rate mode is required"
1543                                      " for packet pacing");
1544                         err = ENODEV;
1545                         goto error;
1546                 }
1547 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1548                 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1549                              " can't create queues for packet pacing");
1550                 err = ENODEV;
1551                 goto error;
1552 #endif
1553         }
1554         if (config->devx) {
1555                 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1556
1557                 err = config->hca_attr.access_register_user ?
1558                         mlx5_devx_cmd_register_read
1559                                 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1560                                 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1561                 if (!err) {
1562                         uint32_t ts_mode;
1563
1564                         /* MTUTC register is read successfully. */
1565                         ts_mode = MLX5_GET(register_mtutc, reg,
1566                                            time_stamp_mode);
1567                         if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1568                                 config->rt_timestamp = 1;
1569                 } else {
1570                         /* Kernel does not support register reading. */
1571                         if (config->hca_attr.dev_freq_khz ==
1572                                                  (NS_PER_S / MS_PER_S))
1573                                 config->rt_timestamp = 1;
1574                 }
1575         }
1576         /*
1577          * If HW has bug working with tunnel packet decapsulation and
1578          * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1579          * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1580          */
1581         if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1582                 config->hw_fcs_strip = 0;
1583         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1584                 (config->hw_fcs_strip ? "" : "not "));
1585         if (config->mprq.enabled && mprq) {
1586                 if (config->mprq.stride_num_n &&
1587                     (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1588                      config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1589                         config->mprq.stride_num_n =
1590                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1591                                                 mprq_min_stride_num_n),
1592                                         mprq_max_stride_num_n);
1593                         DRV_LOG(WARNING,
1594                                 "the number of strides"
1595                                 " for Multi-Packet RQ is out of range,"
1596                                 " setting default value (%u)",
1597                                 1 << config->mprq.stride_num_n);
1598                 }
1599                 if (config->mprq.stride_size_n &&
1600                     (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1601                      config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1602                         config->mprq.stride_size_n =
1603                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1604                                                 mprq_min_stride_size_n),
1605                                         mprq_max_stride_size_n);
1606                         DRV_LOG(WARNING,
1607                                 "the size of a stride"
1608                                 " for Multi-Packet RQ is out of range,"
1609                                 " setting default value (%u)",
1610                                 1 << config->mprq.stride_size_n);
1611                 }
1612                 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1613                 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1614         } else if (config->mprq.enabled && !mprq) {
1615                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1616                 config->mprq.enabled = 0;
1617         }
1618         if (config->max_dump_files_num == 0)
1619                 config->max_dump_files_num = 128;
1620         eth_dev = rte_eth_dev_allocate(name);
1621         if (eth_dev == NULL) {
1622                 DRV_LOG(ERR, "can not allocate rte ethdev");
1623                 err = ENOMEM;
1624                 goto error;
1625         }
1626         if (priv->representor) {
1627                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1628                 eth_dev->data->representor_id = priv->representor_id;
1629                 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1630                         struct mlx5_priv *opriv =
1631                                 rte_eth_devices[port_id].data->dev_private;
1632                         if (opriv &&
1633                             opriv->master &&
1634                             opriv->domain_id == priv->domain_id &&
1635                             opriv->sh == priv->sh) {
1636                                 eth_dev->data->backer_port_id = port_id;
1637                                 break;
1638                         }
1639                 }
1640                 if (port_id >= RTE_MAX_ETHPORTS)
1641                         eth_dev->data->backer_port_id = eth_dev->data->port_id;
1642         }
1643         priv->mp_id.port_id = eth_dev->data->port_id;
1644         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
1645         /*
1646          * Store associated network device interface index. This index
1647          * is permanent throughout the lifetime of device. So, we may store
1648          * the ifindex here and use the cached value further.
1649          */
1650         MLX5_ASSERT(spawn->ifindex);
1651         priv->if_index = spawn->ifindex;
1652         eth_dev->data->dev_private = priv;
1653         priv->dev_data = eth_dev->data;
1654         eth_dev->data->mac_addrs = priv->mac;
1655         eth_dev->device = dpdk_dev;
1656         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1657         /* Configure the first MAC address by default. */
1658         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1659                 DRV_LOG(ERR,
1660                         "port %u cannot get MAC address, is mlx5_en"
1661                         " loaded? (errno: %s)",
1662                         eth_dev->data->port_id, strerror(rte_errno));
1663                 err = ENODEV;
1664                 goto error;
1665         }
1666         DRV_LOG(INFO,
1667                 "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT,
1668                 eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac));
1669 #ifdef RTE_LIBRTE_MLX5_DEBUG
1670         {
1671                 char ifname[MLX5_NAMESIZE];
1672
1673                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1674                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1675                                 eth_dev->data->port_id, ifname);
1676                 else
1677                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1678                                 eth_dev->data->port_id);
1679         }
1680 #endif
1681         /* Get actual MTU if possible. */
1682         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1683         if (err) {
1684                 err = rte_errno;
1685                 goto error;
1686         }
1687         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1688                 priv->mtu);
1689         /* Initialize burst functions to prevent crashes before link-up. */
1690         eth_dev->rx_pkt_burst = removed_rx_burst;
1691         eth_dev->tx_pkt_burst = removed_tx_burst;
1692         eth_dev->dev_ops = &mlx5_dev_ops;
1693         eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1694         eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1695         eth_dev->rx_queue_count = mlx5_rx_queue_count;
1696         /* Register MAC address. */
1697         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1698         if (config->vf && config->vf_nl_en)
1699                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1700                                       mlx5_ifindex(eth_dev),
1701                                       eth_dev->data->mac_addrs,
1702                                       MLX5_MAX_MAC_ADDRESSES);
1703         priv->ctrl_flows = 0;
1704         rte_spinlock_init(&priv->flow_list_lock);
1705         TAILQ_INIT(&priv->flow_meters);
1706         priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR);
1707         if (!priv->mtr_profile_tbl)
1708                 goto error;
1709         /* Bring Ethernet device up. */
1710         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1711                 eth_dev->data->port_id);
1712         mlx5_set_link_up(eth_dev);
1713         /*
1714          * Even though the interrupt handler is not installed yet,
1715          * interrupts will still trigger on the async_fd from
1716          * Verbs context returned by ibv_open_device().
1717          */
1718         mlx5_link_update(eth_dev, 0);
1719 #ifdef HAVE_MLX5DV_DR_ESWITCH
1720         if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1721               (switch_info->representor || switch_info->master)))
1722                 config->dv_esw_en = 0;
1723 #else
1724         config->dv_esw_en = 0;
1725 #endif
1726         /* Detect minimal data bytes to inline. */
1727         mlx5_set_min_inline(spawn, config);
1728         /* Store device configuration on private structure. */
1729         priv->config = *config;
1730         for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
1731                 icfg[i].release_mem_en = !!config->reclaim_mode;
1732                 if (config->reclaim_mode)
1733                         icfg[i].per_core_cache = 0;
1734                 priv->flows[i] = mlx5_ipool_create(&icfg[i]);
1735                 if (!priv->flows[i])
1736                         goto error;
1737         }
1738         /* Create context for virtual machine VLAN workaround. */
1739         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1740         if (config->dv_flow_en) {
1741                 err = mlx5_alloc_shared_dr(priv);
1742                 if (err)
1743                         goto error;
1744         }
1745         if (config->devx && config->dv_flow_en && config->dest_tir) {
1746                 priv->obj_ops = devx_obj_ops;
1747                 priv->obj_ops.drop_action_create =
1748                                                 ibv_obj_ops.drop_action_create;
1749                 priv->obj_ops.drop_action_destroy =
1750                                                 ibv_obj_ops.drop_action_destroy;
1751 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1752                 priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify;
1753 #else
1754                 if (config->dv_esw_en)
1755                         priv->obj_ops.txq_obj_modify =
1756                                                 ibv_obj_ops.txq_obj_modify;
1757 #endif
1758                 /* Use specific wrappers for Tx object. */
1759                 priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;
1760                 priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;
1761                 mlx5_queue_counter_id_prepare(eth_dev);
1762                 priv->obj_ops.lb_dummy_queue_create =
1763                                         mlx5_rxq_ibv_obj_dummy_lb_create;
1764                 priv->obj_ops.lb_dummy_queue_release =
1765                                         mlx5_rxq_ibv_obj_dummy_lb_release;
1766         } else {
1767                 priv->obj_ops = ibv_obj_ops;
1768         }
1769         if (config->tx_pp &&
1770             (priv->config.dv_esw_en ||
1771              priv->obj_ops.txq_obj_new != mlx5_os_txq_obj_new)) {
1772                 /*
1773                  * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support
1774                  * packet pacing and already checked above.
1775                  * Hence, we should only make sure the SQs will be created
1776                  * with DevX, not with Verbs.
1777                  * Verbs allocates the SQ UAR on its own and it can't be shared
1778                  * with Clock Queue UAR as required for Tx scheduling.
1779                  */
1780                 DRV_LOG(ERR, "Verbs SQs, UAR can't be shared as required for packet pacing");
1781                 err = ENODEV;
1782                 goto error;
1783         }
1784         priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
1785         if (!priv->drop_queue.hrxq)
1786                 goto error;
1787         /* Supported Verbs flow priority number detection. */
1788         err = mlx5_flow_discover_priorities(eth_dev);
1789         if (err < 0) {
1790                 err = -err;
1791                 goto error;
1792         }
1793         priv->config.flow_prio = err;
1794         if (!priv->config.dv_esw_en &&
1795             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1796                 DRV_LOG(WARNING, "metadata mode %u is not supported "
1797                                  "(no E-Switch)", priv->config.dv_xmeta_en);
1798                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1799         }
1800         mlx5_set_metadata_mask(eth_dev);
1801         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1802             !priv->sh->dv_regc0_mask) {
1803                 DRV_LOG(ERR, "metadata mode %u is not supported "
1804                              "(no metadata reg_c[0] is available)",
1805                              priv->config.dv_xmeta_en);
1806                         err = ENOTSUP;
1807                         goto error;
1808         }
1809         priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true,
1810                                        mlx5_hrxq_create_cb,
1811                                        mlx5_hrxq_match_cb,
1812                                        mlx5_hrxq_remove_cb,
1813                                        mlx5_hrxq_clone_cb,
1814                                        mlx5_hrxq_clone_free_cb);
1815         if (!priv->hrxqs)
1816                 goto error;
1817         rte_rwlock_init(&priv->ind_tbls_lock);
1818         /* Query availability of metadata reg_c's. */
1819         err = mlx5_flow_discover_mreg_c(eth_dev);
1820         if (err < 0) {
1821                 err = -err;
1822                 goto error;
1823         }
1824         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1825                 DRV_LOG(DEBUG,
1826                         "port %u extensive metadata register is not supported",
1827                         eth_dev->data->port_id);
1828                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1829                         DRV_LOG(ERR, "metadata mode %u is not supported "
1830                                      "(no metadata registers available)",
1831                                      priv->config.dv_xmeta_en);
1832                         err = ENOTSUP;
1833                         goto error;
1834                 }
1835         }
1836         if (priv->config.dv_flow_en &&
1837             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1838             mlx5_flow_ext_mreg_supported(eth_dev) &&
1839             priv->sh->dv_regc0_mask) {
1840                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1841                                                       MLX5_FLOW_MREG_HTABLE_SZ,
1842                                                       false, true, eth_dev,
1843                                                       flow_dv_mreg_create_cb,
1844                                                       flow_dv_mreg_match_cb,
1845                                                       flow_dv_mreg_remove_cb,
1846                                                       flow_dv_mreg_clone_cb,
1847                                                     flow_dv_mreg_clone_free_cb);
1848                 if (!priv->mreg_cp_tbl) {
1849                         err = ENOMEM;
1850                         goto error;
1851                 }
1852         }
1853         rte_spinlock_init(&priv->shared_act_sl);
1854         mlx5_flow_counter_mode_config(eth_dev);
1855         mlx5_flow_drop_action_config(eth_dev);
1856         if (priv->config.dv_flow_en)
1857                 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
1858         return eth_dev;
1859 error:
1860         if (priv) {
1861                 if (priv->mreg_cp_tbl)
1862                         mlx5_hlist_destroy(priv->mreg_cp_tbl);
1863                 if (priv->sh)
1864                         mlx5_os_free_shared_dr(priv);
1865                 if (priv->nl_socket_route >= 0)
1866                         close(priv->nl_socket_route);
1867                 if (priv->nl_socket_rdma >= 0)
1868                         close(priv->nl_socket_rdma);
1869                 if (priv->vmwa_context)
1870                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1871                 if (eth_dev && priv->drop_queue.hrxq)
1872                         mlx5_drop_action_destroy(eth_dev);
1873                 if (priv->mtr_profile_tbl)
1874                         mlx5_l3t_destroy(priv->mtr_profile_tbl);
1875                 if (own_domain_id)
1876                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1877                 if (priv->hrxqs)
1878                         mlx5_list_destroy(priv->hrxqs);
1879                 mlx5_free(priv);
1880                 if (eth_dev != NULL)
1881                         eth_dev->data->dev_private = NULL;
1882         }
1883         if (eth_dev != NULL) {
1884                 /* mac_addrs must not be freed alone because part of
1885                  * dev_private
1886                  **/
1887                 eth_dev->data->mac_addrs = NULL;
1888                 rte_eth_dev_release_port(eth_dev);
1889         }
1890         if (sh)
1891                 mlx5_free_shared_dev_ctx(sh);
1892         MLX5_ASSERT(err > 0);
1893         rte_errno = err;
1894         return NULL;
1895 }
1896
1897 /**
1898  * Comparison callback to sort device data.
1899  *
1900  * This is meant to be used with qsort().
1901  *
1902  * @param a[in]
1903  *   Pointer to pointer to first data object.
1904  * @param b[in]
1905  *   Pointer to pointer to second data object.
1906  *
1907  * @return
1908  *   0 if both objects are equal, less than 0 if the first argument is less
1909  *   than the second, greater than 0 otherwise.
1910  */
1911 static int
1912 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1913 {
1914         const struct mlx5_switch_info *si_a =
1915                 &((const struct mlx5_dev_spawn_data *)a)->info;
1916         const struct mlx5_switch_info *si_b =
1917                 &((const struct mlx5_dev_spawn_data *)b)->info;
1918         int ret;
1919
1920         /* Master device first. */
1921         ret = si_b->master - si_a->master;
1922         if (ret)
1923                 return ret;
1924         /* Then representor devices. */
1925         ret = si_b->representor - si_a->representor;
1926         if (ret)
1927                 return ret;
1928         /* Unidentified devices come last in no specific order. */
1929         if (!si_a->representor)
1930                 return 0;
1931         /* Order representors by name. */
1932         return si_a->port_name - si_b->port_name;
1933 }
1934
1935 /**
1936  * Match PCI information for possible slaves of bonding device.
1937  *
1938  * @param[in] ibv_dev
1939  *   Pointer to Infiniband device structure.
1940  * @param[in] pci_dev
1941  *   Pointer to primary PCI address structure to match.
1942  * @param[in] nl_rdma
1943  *   Netlink RDMA group socket handle.
1944  * @param[in] owner
1945  *   Rerepsentor owner PF index.
1946  * @param[out] bond_info
1947  *   Pointer to bonding information.
1948  *
1949  * @return
1950  *   negative value if no bonding device found, otherwise
1951  *   positive index of slave PF in bonding.
1952  */
1953 static int
1954 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1955                            const struct rte_pci_addr *pci_dev,
1956                            int nl_rdma, uint16_t owner,
1957                            struct mlx5_bond_info *bond_info)
1958 {
1959         char ifname[IF_NAMESIZE + 1];
1960         unsigned int ifindex;
1961         unsigned int np, i;
1962         FILE *bond_file = NULL, *file;
1963         int pf = -1;
1964         int ret;
1965
1966         /*
1967          * Try to get master device name. If something goes
1968          * wrong suppose the lack of kernel support and no
1969          * bonding devices.
1970          */
1971         memset(bond_info, 0, sizeof(*bond_info));
1972         if (nl_rdma < 0)
1973                 return -1;
1974         if (!strstr(ibv_dev->name, "bond"))
1975                 return -1;
1976         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
1977         if (!np)
1978                 return -1;
1979         /*
1980          * The Master device might not be on the predefined
1981          * port (not on port index 1, it is not garanted),
1982          * we have to scan all Infiniband device port and
1983          * find master.
1984          */
1985         for (i = 1; i <= np; ++i) {
1986                 /* Check whether Infiniband port is populated. */
1987                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
1988                 if (!ifindex)
1989                         continue;
1990                 if (!if_indextoname(ifindex, ifname))
1991                         continue;
1992                 /* Try to read bonding slave names from sysfs. */
1993                 MKSTR(slaves,
1994                       "/sys/class/net/%s/master/bonding/slaves", ifname);
1995                 bond_file = fopen(slaves, "r");
1996                 if (bond_file)
1997                         break;
1998         }
1999         if (!bond_file)
2000                 return -1;
2001         /* Use safe format to check maximal buffer length. */
2002         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
2003         while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
2004                 char tmp_str[IF_NAMESIZE + 32];
2005                 struct rte_pci_addr pci_addr;
2006                 struct mlx5_switch_info info;
2007
2008                 /* Process slave interface names in the loop. */
2009                 snprintf(tmp_str, sizeof(tmp_str),
2010                          "/sys/class/net/%s", ifname);
2011                 if (mlx5_get_pci_addr(tmp_str, &pci_addr)) {
2012                         DRV_LOG(WARNING, "can not get PCI address"
2013                                          " for netdev \"%s\"", ifname);
2014                         continue;
2015                 }
2016                 /* Slave interface PCI address match found. */
2017                 snprintf(tmp_str, sizeof(tmp_str),
2018                          "/sys/class/net/%s/phys_port_name", ifname);
2019                 file = fopen(tmp_str, "rb");
2020                 if (!file)
2021                         break;
2022                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
2023                 if (fscanf(file, "%32s", tmp_str) == 1)
2024                         mlx5_translate_port_name(tmp_str, &info);
2025                 fclose(file);
2026                 /* Only process PF ports. */
2027                 if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY &&
2028                     info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
2029                         continue;
2030                 /* Check max bonding member. */
2031                 if (info.port_name >= MLX5_BOND_MAX_PORTS) {
2032                         DRV_LOG(WARNING, "bonding index out of range, "
2033                                 "please increase MLX5_BOND_MAX_PORTS: %s",
2034                                 tmp_str);
2035                         break;
2036                 }
2037                 /* Match PCI address, allows BDF0+pfx or BDFx+pfx. */
2038                 if (pci_dev->domain == pci_addr.domain &&
2039                     pci_dev->bus == pci_addr.bus &&
2040                     pci_dev->devid == pci_addr.devid &&
2041                     ((pci_dev->function == 0 &&
2042                       pci_dev->function + owner == pci_addr.function) ||
2043                      (pci_dev->function == owner &&
2044                       pci_addr.function == owner)))
2045                         pf = info.port_name;
2046                 /* Get ifindex. */
2047                 snprintf(tmp_str, sizeof(tmp_str),
2048                          "/sys/class/net/%s/ifindex", ifname);
2049                 file = fopen(tmp_str, "rb");
2050                 if (!file)
2051                         break;
2052                 ret = fscanf(file, "%u", &ifindex);
2053                 fclose(file);
2054                 if (ret != 1)
2055                         break;
2056                 /* Save bonding info. */
2057                 strncpy(bond_info->ports[info.port_name].ifname, ifname,
2058                         sizeof(bond_info->ports[0].ifname));
2059                 bond_info->ports[info.port_name].pci_addr = pci_addr;
2060                 bond_info->ports[info.port_name].ifindex = ifindex;
2061                 bond_info->n_port++;
2062         }
2063         if (pf >= 0) {
2064                 /* Get bond interface info */
2065                 ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex,
2066                                            bond_info->ifname);
2067                 if (ret)
2068                         DRV_LOG(ERR, "unable to get bond info: %s",
2069                                 strerror(rte_errno));
2070                 else
2071                         DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
2072                                 ifindex, bond_info->ifindex, bond_info->ifname);
2073         }
2074         return pf;
2075 }
2076
2077 static void
2078 mlx5_os_config_default(struct mlx5_dev_config *config)
2079 {
2080         memset(config, 0, sizeof(*config));
2081         config->mps = MLX5_ARG_UNSET;
2082         config->rx_vec_en = 1;
2083         config->txq_inline_max = MLX5_ARG_UNSET;
2084         config->txq_inline_min = MLX5_ARG_UNSET;
2085         config->txq_inline_mpw = MLX5_ARG_UNSET;
2086         config->txqs_inline = MLX5_ARG_UNSET;
2087         config->vf_nl_en = 1;
2088         config->mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
2089         config->mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
2090         config->dv_esw_en = 1;
2091         config->dv_flow_en = 1;
2092         config->decap_en = 1;
2093         config->log_hp_size = MLX5_ARG_UNSET;
2094         config->allow_duplicate_pattern = 1;
2095 }
2096
2097 /**
2098  * Register a PCI device within bonding.
2099  *
2100  * This function spawns Ethernet devices out of a given PCI device and
2101  * bonding owner PF index.
2102  *
2103  * @param[in] cdev
2104  *   Pointer to common mlx5 device structure.
2105  * @param[in] req_eth_da
2106  *   Requested ethdev device argument.
2107  * @param[in] owner_id
2108  *   Requested owner PF port ID within bonding device, default to 0.
2109  *
2110  * @return
2111  *   0 on success, a negative errno value otherwise and rte_errno is set.
2112  */
2113 static int
2114 mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev, void *ctx,
2115                      struct rte_eth_devargs *req_eth_da,
2116                      uint16_t owner_id)
2117 {
2118         struct ibv_device **ibv_list;
2119         /*
2120          * Number of found IB Devices matching with requested PCI BDF.
2121          * nd != 1 means there are multiple IB devices over the same
2122          * PCI device and we have representors and master.
2123          */
2124         unsigned int nd = 0;
2125         /*
2126          * Number of found IB device Ports. nd = 1 and np = 1..n means
2127          * we have the single multiport IB device, and there may be
2128          * representors attached to some of found ports.
2129          */
2130         unsigned int np = 0;
2131         /*
2132          * Number of DPDK ethernet devices to Spawn - either over
2133          * multiple IB devices or multiple ports of single IB device.
2134          * Actually this is the number of iterations to spawn.
2135          */
2136         unsigned int ns = 0;
2137         /*
2138          * Bonding device
2139          *   < 0 - no bonding device (single one)
2140          *  >= 0 - bonding device (value is slave PF index)
2141          */
2142         int bd = -1;
2143         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
2144         struct mlx5_dev_spawn_data *list = NULL;
2145         struct mlx5_dev_config dev_config;
2146         unsigned int dev_config_vf;
2147         struct rte_eth_devargs eth_da = *req_eth_da;
2148         struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */
2149         struct mlx5_bond_info bond_info;
2150         int ret = -1;
2151
2152         errno = 0;
2153         ibv_list = mlx5_glue->get_device_list(&ret);
2154         if (!ibv_list) {
2155                 rte_errno = errno ? errno : ENOSYS;
2156                 DRV_LOG(ERR, "Cannot list devices, is ib_uverbs loaded?");
2157                 return -rte_errno;
2158         }
2159         /*
2160          * First scan the list of all Infiniband devices to find
2161          * matching ones, gathering into the list.
2162          */
2163         struct ibv_device *ibv_match[ret + 1];
2164         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
2165         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2166         unsigned int i;
2167
2168         while (ret-- > 0) {
2169                 struct rte_pci_addr pci_addr;
2170
2171                 DRV_LOG(DEBUG, "Checking device \"%s\"", ibv_list[ret]->name);
2172                 bd = mlx5_device_bond_pci_match
2173                                 (ibv_list[ret], &owner_pci, nl_rdma, owner_id,
2174                                  &bond_info);
2175                 if (bd >= 0) {
2176                         /*
2177                          * Bonding device detected. Only one match is allowed,
2178                          * the bonding is supported over multi-port IB device,
2179                          * there should be no matches on representor PCI
2180                          * functions or non VF LAG bonding devices with
2181                          * specified address.
2182                          */
2183                         if (nd) {
2184                                 DRV_LOG(ERR,
2185                                         "multiple PCI match on bonding device"
2186                                         "\"%s\" found", ibv_list[ret]->name);
2187                                 rte_errno = ENOENT;
2188                                 ret = -rte_errno;
2189                                 goto exit;
2190                         }
2191                         /* Amend owner pci address if owner PF ID specified. */
2192                         if (eth_da.nb_representor_ports)
2193                                 owner_pci.function += owner_id;
2194                         DRV_LOG(INFO, "PCI information matches for"
2195                                       " slave %d bonding device \"%s\"",
2196                                       bd, ibv_list[ret]->name);
2197                         ibv_match[nd++] = ibv_list[ret];
2198                         break;
2199                 } else {
2200                         /* Bonding device not found. */
2201                         if (mlx5_get_pci_addr(ibv_list[ret]->ibdev_path,
2202                                               &pci_addr))
2203                                 continue;
2204                         if (owner_pci.domain != pci_addr.domain ||
2205                             owner_pci.bus != pci_addr.bus ||
2206                             owner_pci.devid != pci_addr.devid ||
2207                             owner_pci.function != pci_addr.function)
2208                                 continue;
2209                         DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2210                                 ibv_list[ret]->name);
2211                         ibv_match[nd++] = ibv_list[ret];
2212                 }
2213         }
2214         ibv_match[nd] = NULL;
2215         if (!nd) {
2216                 /* No device matches, just complain and bail out. */
2217                 DRV_LOG(WARNING,
2218                         "No Verbs device matches PCI device " PCI_PRI_FMT ","
2219                         " are kernel drivers loaded?",
2220                         owner_pci.domain, owner_pci.bus,
2221                         owner_pci.devid, owner_pci.function);
2222                 rte_errno = ENOENT;
2223                 ret = -rte_errno;
2224                 goto exit;
2225         }
2226         if (nd == 1) {
2227                 /*
2228                  * Found single matching device may have multiple ports.
2229                  * Each port may be representor, we have to check the port
2230                  * number and check the representors existence.
2231                  */
2232                 if (nl_rdma >= 0)
2233                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2234                 if (!np)
2235                         DRV_LOG(WARNING,
2236                                 "Cannot get IB device \"%s\" ports number.",
2237                                 ibv_match[0]->name);
2238                 if (bd >= 0 && !np) {
2239                         DRV_LOG(ERR, "Cannot get ports for bonding device.");
2240                         rte_errno = ENOENT;
2241                         ret = -rte_errno;
2242                         goto exit;
2243                 }
2244         }
2245         /* Now we can determine the maximal amount of devices to be spawned. */
2246         list = mlx5_malloc(MLX5_MEM_ZERO,
2247                            sizeof(struct mlx5_dev_spawn_data) * (np ? np : nd),
2248                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
2249         if (!list) {
2250                 DRV_LOG(ERR, "Spawn data array allocation failure.");
2251                 rte_errno = ENOMEM;
2252                 ret = -rte_errno;
2253                 goto exit;
2254         }
2255         if (bd >= 0 || np > 1) {
2256                 /*
2257                  * Single IB device with multiple ports found,
2258                  * it may be E-Switch master device and representors.
2259                  * We have to perform identification through the ports.
2260                  */
2261                 MLX5_ASSERT(nl_rdma >= 0);
2262                 MLX5_ASSERT(ns == 0);
2263                 MLX5_ASSERT(nd == 1);
2264                 MLX5_ASSERT(np);
2265                 for (i = 1; i <= np; ++i) {
2266                         list[ns].bond_info = &bond_info;
2267                         list[ns].max_port = np;
2268                         list[ns].phys_port = i;
2269                         list[ns].phys_dev_name = ibv_match[0]->name;
2270                         list[ns].ctx = ctx;
2271                         list[ns].eth_dev = NULL;
2272                         list[ns].pci_dev = pci_dev;
2273                         list[ns].cdev = cdev;
2274                         list[ns].pf_bond = bd;
2275                         list[ns].ifindex = mlx5_nl_ifindex(nl_rdma,
2276                                                            ibv_match[0]->name,
2277                                                            i);
2278                         if (!list[ns].ifindex) {
2279                                 /*
2280                                  * No network interface index found for the
2281                                  * specified port, it means there is no
2282                                  * representor on this port. It's OK,
2283                                  * there can be disabled ports, for example
2284                                  * if sriov_numvfs < sriov_totalvfs.
2285                                  */
2286                                 continue;
2287                         }
2288                         ret = -1;
2289                         if (nl_route >= 0)
2290                                 ret = mlx5_nl_switch_info(nl_route,
2291                                                           list[ns].ifindex,
2292                                                           &list[ns].info);
2293                         if (ret || (!list[ns].info.representor &&
2294                                     !list[ns].info.master)) {
2295                                 /*
2296                                  * We failed to recognize representors with
2297                                  * Netlink, let's try to perform the task
2298                                  * with sysfs.
2299                                  */
2300                                 ret = mlx5_sysfs_switch_info(list[ns].ifindex,
2301                                                              &list[ns].info);
2302                         }
2303                         if (!ret && bd >= 0) {
2304                                 switch (list[ns].info.name_type) {
2305                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2306                                         if (np == 1) {
2307                                                 /*
2308                                                  * Force standalone bonding
2309                                                  * device for ROCE LAG
2310                                                  * confgiurations.
2311                                                  */
2312                                                 list[ns].info.master = 0;
2313                                                 list[ns].info.representor = 0;
2314                                         }
2315                                         if (list[ns].info.port_name == bd)
2316                                                 ns++;
2317                                         break;
2318                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2319                                         /* Fallthrough */
2320                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2321                                         /* Fallthrough */
2322                                 case MLX5_PHYS_PORT_NAME_TYPE_PFSF:
2323                                         if (list[ns].info.pf_num == bd)
2324                                                 ns++;
2325                                         break;
2326                                 default:
2327                                         break;
2328                                 }
2329                                 continue;
2330                         }
2331                         if (!ret && (list[ns].info.representor ^
2332                                      list[ns].info.master))
2333                                 ns++;
2334                 }
2335                 if (!ns) {
2336                         DRV_LOG(ERR,
2337                                 "Unable to recognize master/representors on the IB device with multiple ports.");
2338                         rte_errno = ENOENT;
2339                         ret = -rte_errno;
2340                         goto exit;
2341                 }
2342         } else {
2343                 /*
2344                  * The existence of several matching entries (nd > 1) means
2345                  * port representors have been instantiated. No existing Verbs
2346                  * call nor sysfs entries can tell them apart, this can only
2347                  * be done through Netlink calls assuming kernel drivers are
2348                  * recent enough to support them.
2349                  *
2350                  * In the event of identification failure through Netlink,
2351                  * try again through sysfs, then:
2352                  *
2353                  * 1. A single IB device matches (nd == 1) with single
2354                  *    port (np=0/1) and is not a representor, assume
2355                  *    no switch support.
2356                  *
2357                  * 2. Otherwise no safe assumptions can be made;
2358                  *    complain louder and bail out.
2359                  */
2360                 for (i = 0; i != nd; ++i) {
2361                         memset(&list[ns].info, 0, sizeof(list[ns].info));
2362                         list[ns].bond_info = NULL;
2363                         list[ns].max_port = 1;
2364                         list[ns].phys_port = 1;
2365                         list[ns].phys_dev_name = ibv_match[i]->name;
2366                         list[ns].ctx = ctx;
2367                         list[ns].eth_dev = NULL;
2368                         list[ns].pci_dev = pci_dev;
2369                         list[ns].cdev = cdev;
2370                         list[ns].pf_bond = -1;
2371                         list[ns].ifindex = 0;
2372                         if (nl_rdma >= 0)
2373                                 list[ns].ifindex = mlx5_nl_ifindex
2374                                                             (nl_rdma,
2375                                                              ibv_match[i]->name,
2376                                                              1);
2377                         if (!list[ns].ifindex) {
2378                                 char ifname[IF_NAMESIZE];
2379
2380                                 /*
2381                                  * Netlink failed, it may happen with old
2382                                  * ib_core kernel driver (before 4.16).
2383                                  * We can assume there is old driver because
2384                                  * here we are processing single ports IB
2385                                  * devices. Let's try sysfs to retrieve
2386                                  * the ifindex. The method works for
2387                                  * master device only.
2388                                  */
2389                                 if (nd > 1) {
2390                                         /*
2391                                          * Multiple devices found, assume
2392                                          * representors, can not distinguish
2393                                          * master/representor and retrieve
2394                                          * ifindex via sysfs.
2395                                          */
2396                                         continue;
2397                                 }
2398                                 ret = mlx5_get_ifname_sysfs
2399                                         (ibv_match[i]->ibdev_path, ifname);
2400                                 if (!ret)
2401                                         list[ns].ifindex =
2402                                                 if_nametoindex(ifname);
2403                                 if (!list[ns].ifindex) {
2404                                         /*
2405                                          * No network interface index found
2406                                          * for the specified device, it means
2407                                          * there it is neither representor
2408                                          * nor master.
2409                                          */
2410                                         continue;
2411                                 }
2412                         }
2413                         ret = -1;
2414                         if (nl_route >= 0)
2415                                 ret = mlx5_nl_switch_info
2416                                                (nl_route,
2417                                                 list[ns].ifindex,
2418                                                 &list[ns].info);
2419                         if (ret || (!list[ns].info.representor &&
2420                                     !list[ns].info.master)) {
2421                                 /*
2422                                  * We failed to recognize representors with
2423                                  * Netlink, let's try to perform the task
2424                                  * with sysfs.
2425                                  */
2426                                 ret = mlx5_sysfs_switch_info(list[ns].ifindex,
2427                                                              &list[ns].info);
2428                         }
2429                         if (!ret && (list[ns].info.representor ^
2430                                      list[ns].info.master)) {
2431                                 ns++;
2432                         } else if ((nd == 1) &&
2433                                    !list[ns].info.representor &&
2434                                    !list[ns].info.master) {
2435                                 /*
2436                                  * Single IB device with one physical port and
2437                                  * attached network device.
2438                                  * May be SRIOV is not enabled or there is no
2439                                  * representors.
2440                                  */
2441                                 DRV_LOG(INFO, "No E-Switch support detected.");
2442                                 ns++;
2443                                 break;
2444                         }
2445                 }
2446                 if (!ns) {
2447                         DRV_LOG(ERR,
2448                                 "Unable to recognize master/representors on the multiple IB devices.");
2449                         rte_errno = ENOENT;
2450                         ret = -rte_errno;
2451                         goto exit;
2452                 }
2453                 /*
2454                  * New kernels may add the switch_id attribute for the case
2455                  * there is no E-Switch and we wrongly recognized the
2456                  * only device as master. Override this if there is the
2457                  * single device with single port and new device name
2458                  * format present.
2459                  */
2460                 if (nd == 1 &&
2461                     list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
2462                         list[0].info.master = 0;
2463                         list[0].info.representor = 0;
2464                 }
2465         }
2466         MLX5_ASSERT(ns);
2467         /*
2468          * Sort list to probe devices in natural order for users convenience
2469          * (i.e. master first, then representors from lowest to highest ID).
2470          */
2471         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2472         /* Device specific configuration. */
2473         switch (pci_dev->id.device_id) {
2474         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2475         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2476         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2477         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2478         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2479         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2480         case PCI_DEVICE_ID_MELLANOX_CONNECTXVF:
2481                 dev_config_vf = 1;
2482                 break;
2483         default:
2484                 dev_config_vf = 0;
2485                 break;
2486         }
2487         if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) {
2488                 /* Set devargs default values. */
2489                 if (eth_da.nb_mh_controllers == 0) {
2490                         eth_da.nb_mh_controllers = 1;
2491                         eth_da.mh_controllers[0] = 0;
2492                 }
2493                 if (eth_da.nb_ports == 0 && ns > 0) {
2494                         if (list[0].pf_bond >= 0 && list[0].info.representor)
2495                                 DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s",
2496                                         pci_dev->device.devargs->args);
2497                         eth_da.nb_ports = 1;
2498                         eth_da.ports[0] = list[0].info.pf_num;
2499                 }
2500                 if (eth_da.nb_representor_ports == 0) {
2501                         eth_da.nb_representor_ports = 1;
2502                         eth_da.representor_ports[0] = 0;
2503                 }
2504         }
2505         for (i = 0; i != ns; ++i) {
2506                 uint32_t restore;
2507
2508                 /* Default configuration. */
2509                 mlx5_os_config_default(&dev_config);
2510                 dev_config.vf = dev_config_vf;
2511                 list[i].eth_dev = mlx5_dev_spawn(cdev->dev, &list[i],
2512                                                  &dev_config, &eth_da);
2513                 if (!list[i].eth_dev) {
2514                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2515                                 break;
2516                         /* Device is disabled or already spawned. Ignore it. */
2517                         continue;
2518                 }
2519                 restore = list[i].eth_dev->data->dev_flags;
2520                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2521                 /**
2522                  * Each representor has a dedicated interrupts vector.
2523                  * rte_eth_copy_pci_info() assigns PF interrupts handle to
2524                  * representor eth_dev object because representor and PF
2525                  * share the same PCI address.
2526                  * Override representor device with a dedicated
2527                  * interrupts handle here.
2528                  * Representor interrupts handle is released in mlx5_dev_stop().
2529                  */
2530                 if (list[i].info.representor) {
2531                         struct rte_intr_handle *intr_handle;
2532                         intr_handle = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
2533                                                   sizeof(*intr_handle), 0,
2534                                                   SOCKET_ID_ANY);
2535                         if (!intr_handle) {
2536                                 DRV_LOG(ERR,
2537                                         "port %u failed to allocate memory for interrupt handler "
2538                                         "Rx interrupts will not be supported",
2539                                         i);
2540                                 rte_errno = ENOMEM;
2541                                 ret = -rte_errno;
2542                                 goto exit;
2543                         }
2544                         list[i].eth_dev->intr_handle = intr_handle;
2545                 }
2546                 /* Restore non-PCI flags cleared by the above call. */
2547                 list[i].eth_dev->data->dev_flags |= restore;
2548                 rte_eth_dev_probing_finish(list[i].eth_dev);
2549         }
2550         if (i != ns) {
2551                 DRV_LOG(ERR,
2552                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2553                         " encountering an error: %s",
2554                         owner_pci.domain, owner_pci.bus,
2555                         owner_pci.devid, owner_pci.function,
2556                         strerror(rte_errno));
2557                 ret = -rte_errno;
2558                 /* Roll back. */
2559                 while (i--) {
2560                         if (!list[i].eth_dev)
2561                                 continue;
2562                         mlx5_dev_close(list[i].eth_dev);
2563                         /* mac_addrs must not be freed because in dev_private */
2564                         list[i].eth_dev->data->mac_addrs = NULL;
2565                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2566                 }
2567                 /* Restore original error. */
2568                 rte_errno = -ret;
2569         } else {
2570                 ret = 0;
2571         }
2572 exit:
2573         /*
2574          * Do the routine cleanup:
2575          * - close opened Netlink sockets
2576          * - free allocated spawn data array
2577          * - free the Infiniband device list
2578          */
2579         if (nl_rdma >= 0)
2580                 close(nl_rdma);
2581         if (nl_route >= 0)
2582                 close(nl_route);
2583         if (list)
2584                 mlx5_free(list);
2585         MLX5_ASSERT(ibv_list);
2586         mlx5_glue->free_device_list(ibv_list);
2587         return ret;
2588 }
2589
2590 static int
2591 mlx5_os_parse_eth_devargs(struct rte_device *dev,
2592                           struct rte_eth_devargs *eth_da)
2593 {
2594         int ret = 0;
2595
2596         if (dev->devargs == NULL)
2597                 return 0;
2598         memset(eth_da, 0, sizeof(*eth_da));
2599         /* Parse representor information first from class argument. */
2600         if (dev->devargs->cls_str)
2601                 ret = rte_eth_devargs_parse(dev->devargs->cls_str, eth_da);
2602         if (ret != 0) {
2603                 DRV_LOG(ERR, "failed to parse device arguments: %s",
2604                         dev->devargs->cls_str);
2605                 return -rte_errno;
2606         }
2607         if (eth_da->type == RTE_ETH_REPRESENTOR_NONE) {
2608                 /* Parse legacy device argument */
2609                 ret = rte_eth_devargs_parse(dev->devargs->args, eth_da);
2610                 if (ret) {
2611                         DRV_LOG(ERR, "failed to parse device arguments: %s",
2612                                 dev->devargs->args);
2613                         return -rte_errno;
2614                 }
2615         }
2616         return 0;
2617 }
2618
2619 /**
2620  * Callback to register a PCI device.
2621  *
2622  * This function spawns Ethernet devices out of a given PCI device.
2623  *
2624  * @param[in] cdev
2625  *   Pointer to common mlx5 device structure.
2626  *
2627  * @return
2628  *   0 on success, a negative errno value otherwise and rte_errno is set.
2629  */
2630 static int
2631 mlx5_os_pci_probe(struct mlx5_common_device *cdev, void *ctx)
2632 {
2633         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
2634         struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2635         int ret = 0;
2636         uint16_t p;
2637
2638         ret = mlx5_os_parse_eth_devargs(cdev->dev, &eth_da);
2639         if (ret != 0)
2640                 return ret;
2641
2642         if (eth_da.nb_ports > 0) {
2643                 /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */
2644                 for (p = 0; p < eth_da.nb_ports; p++) {
2645                         ret = mlx5_os_pci_probe_pf(cdev, ctx, &eth_da,
2646                                                    eth_da.ports[p]);
2647                         if (ret)
2648                                 break;
2649                 }
2650                 if (ret) {
2651                         DRV_LOG(ERR, "Probe of PCI device " PCI_PRI_FMT " "
2652                                 "aborted due to proding failure of PF %u",
2653                                 pci_dev->addr.domain, pci_dev->addr.bus,
2654                                 pci_dev->addr.devid, pci_dev->addr.function,
2655                                 eth_da.ports[p]);
2656                         mlx5_net_remove(cdev);
2657                 }
2658         } else {
2659                 ret = mlx5_os_pci_probe_pf(cdev, ctx, &eth_da, 0);
2660         }
2661         return ret;
2662 }
2663
2664 /* Probe a single SF device on auxiliary bus, no representor support. */
2665 static int
2666 mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev, void *ctx)
2667 {
2668         struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2669         struct mlx5_dev_config config;
2670         struct mlx5_dev_spawn_data spawn = { .pf_bond = -1 };
2671         struct rte_device *dev = cdev->dev;
2672         struct rte_auxiliary_device *adev = RTE_DEV_TO_AUXILIARY(dev);
2673         struct rte_eth_dev *eth_dev;
2674         int ret = 0;
2675
2676         /* Parse ethdev devargs. */
2677         ret = mlx5_os_parse_eth_devargs(dev, &eth_da);
2678         if (ret != 0)
2679                 return ret;
2680         /* Set default config data. */
2681         mlx5_os_config_default(&config);
2682         config.sf = 1;
2683         /* Init spawn data. */
2684         spawn.max_port = 1;
2685         spawn.phys_port = 1;
2686         spawn.ctx = ctx;
2687         spawn.phys_dev_name = mlx5_os_get_ctx_device_name(ctx);
2688         ret = mlx5_auxiliary_get_ifindex(dev->name);
2689         if (ret < 0) {
2690                 DRV_LOG(ERR, "failed to get ethdev ifindex: %s", dev->name);
2691                 return ret;
2692         }
2693         spawn.ifindex = ret;
2694         spawn.cdev = cdev;
2695         /* Spawn device. */
2696         eth_dev = mlx5_dev_spawn(dev, &spawn, &config, &eth_da);
2697         if (eth_dev == NULL)
2698                 return -rte_errno;
2699         /* Post create. */
2700         eth_dev->intr_handle = &adev->intr_handle;
2701         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2702                 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2703                 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV;
2704                 eth_dev->data->numa_node = dev->numa_node;
2705         }
2706         rte_eth_dev_probing_finish(eth_dev);
2707         return 0;
2708 }
2709
2710 /**
2711  * Net class driver callback to probe a device.
2712  *
2713  * This function probe PCI bus device(s) or a single SF on auxiliary bus.
2714  *
2715  * @param[in] cdev
2716  *   Pointer to the common mlx5 device.
2717  *
2718  * @return
2719  *   0 on success, a negative errno value otherwise and rte_errno is set.
2720  */
2721 int
2722 mlx5_os_net_probe(struct mlx5_common_device *cdev)
2723 {
2724         int ret;
2725         void *ctx = NULL;
2726
2727         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2728                 ret = mlx5_os_open_device(cdev, &ctx);
2729                 if (ret) {
2730                         DRV_LOG(ERR, "Fail to open device %s", cdev->dev->name);
2731                         return -rte_errno;
2732                 }
2733                 mlx5_pmd_socket_init();
2734         }
2735         ret = mlx5_init_once();
2736         if (ret) {
2737                 DRV_LOG(ERR, "Unable to init PMD global data: %s",
2738                         strerror(rte_errno));
2739                 if (ctx != NULL)
2740                         claim_zero(mlx5_glue->close_device(ctx));
2741                 return -rte_errno;
2742         }
2743         if (mlx5_dev_is_pci(cdev->dev))
2744                 return mlx5_os_pci_probe(cdev, ctx);
2745         else
2746                 return mlx5_os_auxiliary_probe(cdev, ctx);
2747 }
2748
2749 /**
2750  * Extract pdn of PD object using DV API.
2751  *
2752  * @param[in] pd
2753  *   Pointer to the verbs PD object.
2754  * @param[out] pdn
2755  *   Pointer to the PD object number variable.
2756  *
2757  * @return
2758  *   0 on success, error value otherwise.
2759  */
2760 int
2761 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
2762 {
2763 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2764         struct mlx5dv_obj obj;
2765         struct mlx5dv_pd pd_info;
2766         int ret = 0;
2767
2768         obj.pd.in = pd;
2769         obj.pd.out = &pd_info;
2770         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
2771         if (ret) {
2772                 DRV_LOG(DEBUG, "Fail to get PD object info");
2773                 return ret;
2774         }
2775         *pdn = pd_info.pdn;
2776         return 0;
2777 #else
2778         (void)pd;
2779         (void)pdn;
2780         return -ENOTSUP;
2781 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
2782 }
2783
2784 /**
2785  * Install shared asynchronous device events handler.
2786  * This function is implemented to support event sharing
2787  * between multiple ports of single IB device.
2788  *
2789  * @param sh
2790  *   Pointer to mlx5_dev_ctx_shared object.
2791  */
2792 void
2793 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2794 {
2795         int ret;
2796         int flags;
2797
2798         sh->intr_handle.fd = -1;
2799         flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
2800         ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
2801                     F_SETFL, flags | O_NONBLOCK);
2802         if (ret) {
2803                 DRV_LOG(INFO, "failed to change file descriptor async event"
2804                         " queue");
2805         } else {
2806                 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
2807                 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2808                 if (rte_intr_callback_register(&sh->intr_handle,
2809                                         mlx5_dev_interrupt_handler, sh)) {
2810                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2811                         sh->intr_handle.fd = -1;
2812                 }
2813         }
2814         if (sh->devx) {
2815 #ifdef HAVE_IBV_DEVX_ASYNC
2816                 sh->intr_handle_devx.fd = -1;
2817                 sh->devx_comp =
2818                         (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
2819                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2820                 if (!devx_comp) {
2821                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2822                         return;
2823                 }
2824                 flags = fcntl(devx_comp->fd, F_GETFL);
2825                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2826                 if (ret) {
2827                         DRV_LOG(INFO, "failed to change file descriptor"
2828                                 " devx comp");
2829                         return;
2830                 }
2831                 sh->intr_handle_devx.fd = devx_comp->fd;
2832                 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2833                 if (rte_intr_callback_register(&sh->intr_handle_devx,
2834                                         mlx5_dev_interrupt_handler_devx, sh)) {
2835                         DRV_LOG(INFO, "Fail to install the devx shared"
2836                                 " interrupt.");
2837                         sh->intr_handle_devx.fd = -1;
2838                 }
2839 #endif /* HAVE_IBV_DEVX_ASYNC */
2840         }
2841 }
2842
2843 /**
2844  * Uninstall shared asynchronous device events handler.
2845  * This function is implemented to support event sharing
2846  * between multiple ports of single IB device.
2847  *
2848  * @param dev
2849  *   Pointer to mlx5_dev_ctx_shared object.
2850  */
2851 void
2852 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2853 {
2854         if (sh->intr_handle.fd >= 0)
2855                 mlx5_intr_callback_unregister(&sh->intr_handle,
2856                                               mlx5_dev_interrupt_handler, sh);
2857 #ifdef HAVE_IBV_DEVX_ASYNC
2858         if (sh->intr_handle_devx.fd >= 0)
2859                 rte_intr_callback_unregister(&sh->intr_handle_devx,
2860                                   mlx5_dev_interrupt_handler_devx, sh);
2861         if (sh->devx_comp)
2862                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2863 #endif
2864 }
2865
2866 /**
2867  * Read statistics by a named counter.
2868  *
2869  * @param[in] priv
2870  *   Pointer to the private device data structure.
2871  * @param[in] ctr_name
2872  *   Pointer to the name of the statistic counter to read
2873  * @param[out] stat
2874  *   Pointer to read statistic value.
2875  * @return
2876  *   0 on success and stat is valud, 1 if failed to read the value
2877  *   rte_errno is set.
2878  *
2879  */
2880 int
2881 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2882                       uint64_t *stat)
2883 {
2884         int fd;
2885
2886         if (priv->sh) {
2887                 if (priv->q_counters != NULL &&
2888                     strcmp(ctr_name, "out_of_buffer") == 0)
2889                         return mlx5_devx_cmd_queue_counter_query
2890                                         (priv->q_counters, 0, (uint32_t *)stat);
2891                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2892                       priv->sh->ibdev_path,
2893                       priv->dev_port,
2894                       ctr_name);
2895                 fd = open(path, O_RDONLY);
2896                 /*
2897                  * in switchdev the file location is not per port
2898                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2899                  */
2900                 if (fd == -1) {
2901                         MKSTR(path1, "%s/hw_counters/%s",
2902                               priv->sh->ibdev_path,
2903                               ctr_name);
2904                         fd = open(path1, O_RDONLY);
2905                 }
2906                 if (fd != -1) {
2907                         char buf[21] = {'\0'};
2908                         ssize_t n = read(fd, buf, sizeof(buf));
2909
2910                         close(fd);
2911                         if (n != -1) {
2912                                 *stat = strtoull(buf, NULL, 10);
2913                                 return 0;
2914                         }
2915                 }
2916         }
2917         *stat = 0;
2918         return 1;
2919 }
2920
2921 /**
2922  * Set the reg_mr and dereg_mr call backs
2923  *
2924  * @param reg_mr_cb[out]
2925  *   Pointer to reg_mr func
2926  * @param dereg_mr_cb[out]
2927  *   Pointer to dereg_mr func
2928  *
2929  */
2930 void
2931 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2932                       mlx5_dereg_mr_t *dereg_mr_cb)
2933 {
2934         *reg_mr_cb = mlx5_mr_verbs_ops.reg_mr;
2935         *dereg_mr_cb = mlx5_mr_verbs_ops.dereg_mr;
2936 }
2937
2938 /**
2939  * Remove a MAC address from device
2940  *
2941  * @param dev
2942  *   Pointer to Ethernet device structure.
2943  * @param index
2944  *   MAC address index.
2945  */
2946 void
2947 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2948 {
2949         struct mlx5_priv *priv = dev->data->dev_private;
2950         const int vf = priv->config.vf;
2951
2952         if (vf)
2953                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2954                                         mlx5_ifindex(dev), priv->mac_own,
2955                                         &dev->data->mac_addrs[index], index);
2956 }
2957
2958 /**
2959  * Adds a MAC address to the device
2960  *
2961  * @param dev
2962  *   Pointer to Ethernet device structure.
2963  * @param mac_addr
2964  *   MAC address to register.
2965  * @param index
2966  *   MAC address index.
2967  *
2968  * @return
2969  *   0 on success, a negative errno value otherwise
2970  */
2971 int
2972 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2973                      uint32_t index)
2974 {
2975         struct mlx5_priv *priv = dev->data->dev_private;
2976         const int vf = priv->config.vf;
2977         int ret = 0;
2978
2979         if (vf)
2980                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2981                                            mlx5_ifindex(dev), priv->mac_own,
2982                                            mac, index);
2983         return ret;
2984 }
2985
2986 /**
2987  * Modify a VF MAC address
2988  *
2989  * @param priv
2990  *   Pointer to device private data.
2991  * @param mac_addr
2992  *   MAC address to modify into.
2993  * @param iface_idx
2994  *   Net device interface index
2995  * @param vf_index
2996  *   VF index
2997  *
2998  * @return
2999  *   0 on success, a negative errno value otherwise
3000  */
3001 int
3002 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
3003                            unsigned int iface_idx,
3004                            struct rte_ether_addr *mac_addr,
3005                            int vf_index)
3006 {
3007         return mlx5_nl_vf_mac_addr_modify
3008                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
3009 }
3010
3011 /**
3012  * Set device promiscuous mode
3013  *
3014  * @param dev
3015  *   Pointer to Ethernet device structure.
3016  * @param enable
3017  *   0 - promiscuous is disabled, otherwise - enabled
3018  *
3019  * @return
3020  *   0 on success, a negative error value otherwise
3021  */
3022 int
3023 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
3024 {
3025         struct mlx5_priv *priv = dev->data->dev_private;
3026
3027         return mlx5_nl_promisc(priv->nl_socket_route,
3028                                mlx5_ifindex(dev), !!enable);
3029 }
3030
3031 /**
3032  * Set device promiscuous mode
3033  *
3034  * @param dev
3035  *   Pointer to Ethernet device structure.
3036  * @param enable
3037  *   0 - all multicase is disabled, otherwise - enabled
3038  *
3039  * @return
3040  *   0 on success, a negative error value otherwise
3041  */
3042 int
3043 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
3044 {
3045         struct mlx5_priv *priv = dev->data->dev_private;
3046
3047         return mlx5_nl_allmulti(priv->nl_socket_route,
3048                                 mlx5_ifindex(dev), !!enable);
3049 }
3050
3051 /**
3052  * Flush device MAC addresses
3053  *
3054  * @param dev
3055  *   Pointer to Ethernet device structure.
3056  *
3057  */
3058 void
3059 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
3060 {
3061         struct mlx5_priv *priv = dev->data->dev_private;
3062
3063         mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
3064                                dev->data->mac_addrs,
3065                                MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
3066 }