drivers/net/mlx5/linux/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2020 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12 #include <net/if.h>
  13 #include <linux/rtnetlink.h>
  14 #include <linux/sockios.h>
  15 #include <linux/ethtool.h>
  16 #include <fcntl.h>
  17
  18 #include <rte_malloc.h>
  19 #include <ethdev_driver.h>
  20 #include <ethdev_pci.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_common.h>
  24 #include <rte_kvargs.h>
  25 #include <rte_rwlock.h>
  26 #include <rte_spinlock.h>
  27 #include <rte_string_fns.h>
  28 #include <rte_alarm.h>
  29 #include <rte_eal_paging.h>
  30
  31 #include <mlx5_glue.h>
  32 #include <mlx5_devx_cmds.h>
  33 #include <mlx5_common.h>
  34 #include <mlx5_common_mp.h>
  35 #include <mlx5_common_mr.h>
  36 #include <mlx5_malloc.h>
  37
  38 #include "mlx5_defs.h"
  39 #include "mlx5.h"
  40 #include "mlx5_common_os.h"
  41 #include "mlx5_utils.h"
  42 #include "mlx5_rxtx.h"
  43 #include "mlx5_rx.h"
  44 #include "mlx5_tx.h"
  45 #include "mlx5_autoconf.h"
  46 #include "mlx5_mr.h"
  47 #include "mlx5_flow.h"
  48 #include "rte_pmd_mlx5.h"
  49 #include "mlx5_verbs.h"
  50 #include "mlx5_nl.h"
  51 #include "mlx5_devx.h"
  52
  53 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
  54
  55 #ifndef HAVE_IBV_MLX5_MOD_MPW
  56 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
  57 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
  58 #endif
  59
  60 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
  61 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
  62 #endif
  63
  64 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  65
  66 /* Spinlock for mlx5_shared_data allocation. */
  67 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  68
  69 /* Process local data for secondary processes. */
  70 static struct mlx5_local_data mlx5_local_data;
  71
  72 /**
  73  * Set the completion channel file descriptor interrupt as non-blocking.
  74  *
  75  * @param[in] rxq_obj
  76  *   Pointer to RQ channel object, which includes the channel fd
  77  *
  78  * @param[out] fd
  79  *   The file descriptor (representing the intetrrupt) used in this channel.
  80  *
  81  * @return
  82  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
  83  */
  84 int
  85 mlx5_os_set_nonblock_channel_fd(int fd)
  86 {
  87         int flags;
  88
  89         flags = fcntl(fd, F_GETFL);
  90         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
  91 }
  92
  93 /**
  94  * Get mlx5 device attributes. The glue function query_device_ex() is called
  95  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
  96  * device attributes from the glue out parameter.
  97  *
  98  * @param dev
  99  *   Pointer to ibv context.
 100  *
 101  * @param device_attr
 102  *   Pointer to mlx5 device attributes.
 103  *
 104  * @return
 105  *   0 on success, non zero error number otherwise
 106  */
 107 int
 108 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
 109 {
 110         int err;
 111         struct ibv_device_attr_ex attr_ex;
 112         memset(device_attr, 0, sizeof(*device_attr));
 113         err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
 114         if (err)
 115                 return err;
 116
 117         device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
 118         device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
 119         device_attr->max_sge = attr_ex.orig_attr.max_sge;
 120         device_attr->max_cq = attr_ex.orig_attr.max_cq;
 121         device_attr->max_cqe = attr_ex.orig_attr.max_cqe;
 122         device_attr->max_mr = attr_ex.orig_attr.max_mr;
 123         device_attr->max_pd = attr_ex.orig_attr.max_pd;
 124         device_attr->max_qp = attr_ex.orig_attr.max_qp;
 125         device_attr->max_srq = attr_ex.orig_attr.max_srq;
 126         device_attr->max_srq_wr = attr_ex.orig_attr.max_srq_wr;
 127         device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
 128         device_attr->max_rwq_indirection_table_size =
 129                 attr_ex.rss_caps.max_rwq_indirection_table_size;
 130         device_attr->max_tso = attr_ex.tso_caps.max_tso;
 131         device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
 132
 133         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 134         err = mlx5_glue->dv_query_device(ctx, &dv_attr);
 135         if (err)
 136                 return err;
 137
 138         device_attr->flags = dv_attr.flags;
 139         device_attr->comp_mask = dv_attr.comp_mask;
 140 #ifdef HAVE_IBV_MLX5_MOD_SWP
 141         device_attr->sw_parsing_offloads =
 142                 dv_attr.sw_parsing_caps.sw_parsing_offloads;
 143 #endif
 144         device_attr->min_single_stride_log_num_of_bytes =
 145                 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
 146         device_attr->max_single_stride_log_num_of_bytes =
 147                 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
 148         device_attr->min_single_wqe_log_num_of_strides =
 149                 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
 150         device_attr->max_single_wqe_log_num_of_strides =
 151                 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
 152         device_attr->stride_supported_qpts =
 153                 dv_attr.striding_rq_caps.supported_qpts;
 154 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 155         device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
 156 #endif
 157         strlcpy(device_attr->fw_ver, attr_ex.orig_attr.fw_ver,
 158                 sizeof(device_attr->fw_ver));
 159
 160         return err;
 161 }
 162
 163 /**
 164  * Verbs callback to allocate a memory. This function should allocate the space
 165  * according to the size provided residing inside a huge page.
 166  * Please note that all allocation must respect the alignment from libmlx5
 167  * (i.e. currently rte_mem_page_size()).
 168  *
 169  * @param[in] size
 170  *   The size in bytes of the memory to allocate.
 171  * @param[in] data
 172  *   A pointer to the callback data.
 173  *
 174  * @return
 175  *   Allocated buffer, NULL otherwise and rte_errno is set.
 176  */
 177 static void *
 178 mlx5_alloc_verbs_buf(size_t size, void *data)
 179 {
 180         struct mlx5_dev_ctx_shared *sh = data;
 181         void *ret;
 182         size_t alignment = rte_mem_page_size();
 183         if (alignment == (size_t)-1) {
 184                 DRV_LOG(ERR, "Failed to get mem page size");
 185                 rte_errno = ENOMEM;
 186                 return NULL;
 187         }
 188
 189         MLX5_ASSERT(data != NULL);
 190         ret = mlx5_malloc(0, size, alignment, sh->numa_node);
 191         if (!ret && size)
 192                 rte_errno = ENOMEM;
 193         return ret;
 194 }
 195
 196 /**
 197  * Verbs callback to free a memory.
 198  *
 199  * @param[in] ptr
 200  *   A pointer to the memory to free.
 201  * @param[in] data
 202  *   A pointer to the callback data.
 203  */
 204 static void
 205 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 206 {
 207         MLX5_ASSERT(data != NULL);
 208         mlx5_free(ptr);
 209 }
 210
 211 /**
 212  * Initialize DR related data within private structure.
 213  * Routine checks the reference counter and does actual
 214  * resources creation/initialization only if counter is zero.
 215  *
 216  * @param[in] priv
 217  *   Pointer to the private device data structure.
 218  *
 219  * @return
 220  *   Zero on success, positive error code otherwise.
 221  */
 222 static int
 223 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 224 {
 225         struct mlx5_dev_ctx_shared *sh = priv->sh;
 226         char s[MLX5_HLIST_NAMESIZE] __rte_unused;
 227         int err;
 228
 229         MLX5_ASSERT(sh && sh->refcnt);
 230         if (sh->refcnt > 1)
 231                 return 0;
 232         err = mlx5_alloc_table_hash_list(priv);
 233         if (err)
 234                 goto error;
 235         /* The resources below are only valid with DV support. */
 236 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 237         /* Init port id action cache list. */
 238         snprintf(s, sizeof(s), "%s_port_id_action_cache", sh->ibdev_name);
 239         mlx5_cache_list_init(&sh->port_id_action_list, s, 0, sh,
 240                              flow_dv_port_id_create_cb,
 241                              flow_dv_port_id_match_cb,
 242                              flow_dv_port_id_remove_cb);
 243         /* Init push vlan action cache list. */
 244         snprintf(s, sizeof(s), "%s_push_vlan_action_cache", sh->ibdev_name);
 245         mlx5_cache_list_init(&sh->push_vlan_action_list, s, 0, sh,
 246                              flow_dv_push_vlan_create_cb,
 247                              flow_dv_push_vlan_match_cb,
 248                              flow_dv_push_vlan_remove_cb);
 249         /* Init sample action cache list. */
 250         snprintf(s, sizeof(s), "%s_sample_action_cache", sh->ibdev_name);
 251         mlx5_cache_list_init(&sh->sample_action_list, s, 0, sh,
 252                              flow_dv_sample_create_cb,
 253                              flow_dv_sample_match_cb,
 254                              flow_dv_sample_remove_cb);
 255         /* Init dest array action cache list. */
 256         snprintf(s, sizeof(s), "%s_dest_array_cache", sh->ibdev_name);
 257         mlx5_cache_list_init(&sh->dest_array_list, s, 0, sh,
 258                              flow_dv_dest_array_create_cb,
 259                              flow_dv_dest_array_match_cb,
 260                              flow_dv_dest_array_remove_cb);
 261         /* Create tags hash list table. */
 262         snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name);
 263         sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE, 0,
 264                                           MLX5_HLIST_WRITE_MOST,
 265                                           flow_dv_tag_create_cb,
 266                                           flow_dv_tag_match_cb,
 267                                           flow_dv_tag_remove_cb);
 268         if (!sh->tag_table) {
 269                 DRV_LOG(ERR, "tags with hash creation failed.");
 270                 err = ENOMEM;
 271                 goto error;
 272         }
 273         sh->tag_table->ctx = sh;
 274         snprintf(s, sizeof(s), "%s_hdr_modify", sh->ibdev_name);
 275         sh->modify_cmds = mlx5_hlist_create(s, MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
 276                                             0, MLX5_HLIST_WRITE_MOST |
 277                                             MLX5_HLIST_DIRECT_KEY,
 278                                             flow_dv_modify_create_cb,
 279                                             flow_dv_modify_match_cb,
 280                                             flow_dv_modify_remove_cb);
 281         if (!sh->modify_cmds) {
 282                 DRV_LOG(ERR, "hdr modify hash creation failed");
 283                 err = ENOMEM;
 284                 goto error;
 285         }
 286         sh->modify_cmds->ctx = sh;
 287         snprintf(s, sizeof(s), "%s_encaps_decaps", sh->ibdev_name);
 288         sh->encaps_decaps = mlx5_hlist_create(s,
 289                                               MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
 290                                               0, MLX5_HLIST_DIRECT_KEY |
 291                                               MLX5_HLIST_WRITE_MOST,
 292                                               flow_dv_encap_decap_create_cb,
 293                                               flow_dv_encap_decap_match_cb,
 294                                               flow_dv_encap_decap_remove_cb);
 295         if (!sh->encaps_decaps) {
 296                 DRV_LOG(ERR, "encap decap hash creation failed");
 297                 err = ENOMEM;
 298                 goto error;
 299         }
 300         sh->encaps_decaps->ctx = sh;
 301 #endif
 302 #ifdef HAVE_MLX5DV_DR
 303         void *domain;
 304
 305         /* Reference counter is zero, we should initialize structures. */
 306         domain = mlx5_glue->dr_create_domain(sh->ctx,
 307                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 308         if (!domain) {
 309                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 310                 err = errno;
 311                 goto error;
 312         }
 313         sh->rx_domain = domain;
 314         domain = mlx5_glue->dr_create_domain(sh->ctx,
 315                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 316         if (!domain) {
 317                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 318                 err = errno;
 319                 goto error;
 320         }
 321         sh->tx_domain = domain;
 322 #ifdef HAVE_MLX5DV_DR_ESWITCH
 323         if (priv->config.dv_esw_en) {
 324                 domain  = mlx5_glue->dr_create_domain
 325                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 326                 if (!domain) {
 327                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 328                         err = errno;
 329                         goto error;
 330                 }
 331                 sh->fdb_domain = domain;
 332         }
 333         /*
 334          * The drop action is just some dummy placeholder in rdma-core. It
 335          * does not belong to domains and has no any attributes, and, can be
 336          * shared by the entire device.
 337          */
 338         sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop();
 339         if (!sh->dr_drop_action) {
 340                 DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop");
 341                 err = errno;
 342                 goto error;
 343         }
 344 #endif
 345         if (!sh->tunnel_hub)
 346                 err = mlx5_alloc_tunnel_hub(sh);
 347         if (err) {
 348                 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
 349                 goto error;
 350         }
 351         if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
 352                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
 353                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
 354                 if (sh->fdb_domain)
 355                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
 356         }
 357         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 358         if (!priv->config.allow_duplicate_pattern) {
 359 #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE
 360                 DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?");
 361 #endif
 362                 mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0);
 363                 mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0);
 364                 if (sh->fdb_domain)
 365                         mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0);
 366         }
 367 #endif /* HAVE_MLX5DV_DR */
 368         sh->default_miss_action =
 369                         mlx5_glue->dr_create_flow_action_default_miss();
 370         if (!sh->default_miss_action)
 371                 DRV_LOG(WARNING, "Default miss action is not supported.");
 372         return 0;
 373 error:
 374         /* Rollback the created objects. */
 375         if (sh->rx_domain) {
 376                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 377                 sh->rx_domain = NULL;
 378         }
 379         if (sh->tx_domain) {
 380                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 381                 sh->tx_domain = NULL;
 382         }
 383         if (sh->fdb_domain) {
 384                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 385                 sh->fdb_domain = NULL;
 386         }
 387         if (sh->dr_drop_action) {
 388                 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
 389                 sh->dr_drop_action = NULL;
 390         }
 391         if (sh->pop_vlan_action) {
 392                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 393                 sh->pop_vlan_action = NULL;
 394         }
 395         if (sh->encaps_decaps) {
 396                 mlx5_hlist_destroy(sh->encaps_decaps);
 397                 sh->encaps_decaps = NULL;
 398         }
 399         if (sh->modify_cmds) {
 400                 mlx5_hlist_destroy(sh->modify_cmds);
 401                 sh->modify_cmds = NULL;
 402         }
 403         if (sh->tag_table) {
 404                 /* tags should be destroyed with flow before. */
 405                 mlx5_hlist_destroy(sh->tag_table);
 406                 sh->tag_table = NULL;
 407         }
 408         if (sh->tunnel_hub) {
 409                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 410                 sh->tunnel_hub = NULL;
 411         }
 412         mlx5_free_table_hash_list(priv);
 413         return err;
 414 }
 415
 416 /**
 417  * Destroy DR related data within private structure.
 418  *
 419  * @param[in] priv
 420  *   Pointer to the private device data structure.
 421  */
 422 void
 423 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 424 {
 425         struct mlx5_dev_ctx_shared *sh = priv->sh;
 426
 427         MLX5_ASSERT(sh && sh->refcnt);
 428         if (sh->refcnt > 1)
 429                 return;
 430 #ifdef HAVE_MLX5DV_DR
 431         if (sh->rx_domain) {
 432                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 433                 sh->rx_domain = NULL;
 434         }
 435         if (sh->tx_domain) {
 436                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 437                 sh->tx_domain = NULL;
 438         }
 439 #ifdef HAVE_MLX5DV_DR_ESWITCH
 440         if (sh->fdb_domain) {
 441                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 442                 sh->fdb_domain = NULL;
 443         }
 444         if (sh->dr_drop_action) {
 445                 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
 446                 sh->dr_drop_action = NULL;
 447         }
 448 #endif
 449         if (sh->pop_vlan_action) {
 450                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 451                 sh->pop_vlan_action = NULL;
 452         }
 453 #endif /* HAVE_MLX5DV_DR */
 454         if (sh->default_miss_action)
 455                 mlx5_glue->destroy_flow_action
 456                                 (sh->default_miss_action);
 457         if (sh->encaps_decaps) {
 458                 mlx5_hlist_destroy(sh->encaps_decaps);
 459                 sh->encaps_decaps = NULL;
 460         }
 461         if (sh->modify_cmds) {
 462                 mlx5_hlist_destroy(sh->modify_cmds);
 463                 sh->modify_cmds = NULL;
 464         }
 465         if (sh->tag_table) {
 466                 /* tags should be destroyed with flow before. */
 467                 mlx5_hlist_destroy(sh->tag_table);
 468                 sh->tag_table = NULL;
 469         }
 470         if (sh->tunnel_hub) {
 471                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 472                 sh->tunnel_hub = NULL;
 473         }
 474         mlx5_cache_list_destroy(&sh->port_id_action_list);
 475         mlx5_cache_list_destroy(&sh->push_vlan_action_list);
 476         mlx5_free_table_hash_list(priv);
 477 }
 478
 479 /**
 480  * Initialize shared data between primary and secondary process.
 481  *
 482  * A memzone is reserved by primary process and secondary processes attach to
 483  * the memzone.
 484  *
 485  * @return
 486  *   0 on success, a negative errno value otherwise and rte_errno is set.
 487  */
 488 static int
 489 mlx5_init_shared_data(void)
 490 {
 491         const struct rte_memzone *mz;
 492         int ret = 0;
 493
 494         rte_spinlock_lock(&mlx5_shared_data_lock);
 495         if (mlx5_shared_data == NULL) {
 496                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 497                         /* Allocate shared memory. */
 498                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 499                                                  sizeof(*mlx5_shared_data),
 500                                                  SOCKET_ID_ANY, 0);
 501                         if (mz == NULL) {
 502                                 DRV_LOG(ERR,
 503                                         "Cannot allocate mlx5 shared data");
 504                                 ret = -rte_errno;
 505                                 goto error;
 506                         }
 507                         mlx5_shared_data = mz->addr;
 508                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 509                         rte_spinlock_init(&mlx5_shared_data->lock);
 510                 } else {
 511                         /* Lookup allocated shared memory. */
 512                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 513                         if (mz == NULL) {
 514                                 DRV_LOG(ERR,
 515                                         "Cannot attach mlx5 shared data");
 516                                 ret = -rte_errno;
 517                                 goto error;
 518                         }
 519                         mlx5_shared_data = mz->addr;
 520                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 521                 }
 522         }
 523 error:
 524         rte_spinlock_unlock(&mlx5_shared_data_lock);
 525         return ret;
 526 }
 527
 528 /**
 529  * PMD global initialization.
 530  *
 531  * Independent from individual device, this function initializes global
 532  * per-PMD data structures distinguishing primary and secondary processes.
 533  * Hence, each initialization is called once per a process.
 534  *
 535  * @return
 536  *   0 on success, a negative errno value otherwise and rte_errno is set.
 537  */
 538 static int
 539 mlx5_init_once(void)
 540 {
 541         struct mlx5_shared_data *sd;
 542         struct mlx5_local_data *ld = &mlx5_local_data;
 543         int ret = 0;
 544
 545         if (mlx5_init_shared_data())
 546                 return -rte_errno;
 547         sd = mlx5_shared_data;
 548         MLX5_ASSERT(sd);
 549         rte_spinlock_lock(&sd->lock);
 550         switch (rte_eal_process_type()) {
 551         case RTE_PROC_PRIMARY:
 552                 if (sd->init_done)
 553                         break;
 554                 LIST_INIT(&sd->mem_event_cb_list);
 555                 rte_rwlock_init(&sd->mem_event_rwlock);
 556                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
 557                                                 mlx5_mr_mem_event_cb, NULL);
 558                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
 559                                            mlx5_mp_os_primary_handle);
 560                 if (ret)
 561                         goto out;
 562                 sd->init_done = true;
 563                 break;
 564         case RTE_PROC_SECONDARY:
 565                 if (ld->init_done)
 566                         break;
 567                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
 568                                              mlx5_mp_os_secondary_handle);
 569                 if (ret)
 570                         goto out;
 571                 ++sd->secondary_cnt;
 572                 ld->init_done = true;
 573                 break;
 574         default:
 575                 break;
 576         }
 577 out:
 578         rte_spinlock_unlock(&sd->lock);
 579         return ret;
 580 }
 581
 582 /**
 583  * Create the Tx queue DevX/Verbs object.
 584  *
 585  * @param dev
 586  *   Pointer to Ethernet device.
 587  * @param idx
 588  *   Queue index in DPDK Tx queue array.
 589  *
 590  * @return
 591  *   0 on success, a negative errno value otherwise and rte_errno is set.
 592  */
 593 static int
 594 mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
 595 {
 596         struct mlx5_priv *priv = dev->data->dev_private;
 597         struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
 598         struct mlx5_txq_ctrl *txq_ctrl =
 599                         container_of(txq_data, struct mlx5_txq_ctrl, txq);
 600
 601         if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
 602                 return mlx5_txq_devx_obj_new(dev, idx);
 603 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 604         if (!priv->config.dv_esw_en)
 605                 return mlx5_txq_devx_obj_new(dev, idx);
 606 #endif
 607         return mlx5_txq_ibv_obj_new(dev, idx);
 608 }
 609
 610 /**
 611  * Release an Tx DevX/verbs queue object.
 612  *
 613  * @param txq_obj
 614  *   DevX/Verbs Tx queue object.
 615  */
 616 static void
 617 mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)
 618 {
 619         if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
 620                 mlx5_txq_devx_obj_release(txq_obj);
 621                 return;
 622         }
 623 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 624         if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) {
 625                 mlx5_txq_devx_obj_release(txq_obj);
 626                 return;
 627         }
 628 #endif
 629         mlx5_txq_ibv_obj_release(txq_obj);
 630 }
 631
 632 /**
 633  * DV flow counter mode detect and config.
 634  *
 635  * @param dev
 636  *   Pointer to rte_eth_dev structure.
 637  *
 638  */
 639 static void
 640 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
 641 {
 642 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 643         struct mlx5_priv *priv = dev->data->dev_private;
 644         struct mlx5_dev_ctx_shared *sh = priv->sh;
 645         bool fallback;
 646
 647 #ifndef HAVE_IBV_DEVX_ASYNC
 648         fallback = true;
 649 #else
 650         fallback = false;
 651         if (!priv->config.devx || !priv->config.dv_flow_en ||
 652             !priv->config.hca_attr.flow_counters_dump ||
 653             !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
 654             (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
 655                 fallback = true;
 656 #endif
 657         if (fallback)
 658                 DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
 659                         "counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
 660                         priv->config.hca_attr.flow_counters_dump,
 661                         priv->config.hca_attr.flow_counter_bulk_alloc_bitmap);
 662         /* Initialize fallback mode only on the port initializes sh. */
 663         if (sh->refcnt == 1)
 664                 sh->cmng.counter_fallback = fallback;
 665         else if (fallback != sh->cmng.counter_fallback)
 666                 DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
 667                         "with others:%d.", PORT_ID(priv), fallback);
 668 #endif
 669 }
 670
 671 static void
 672 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
 673 {
 674         struct mlx5_priv *priv = dev->data->dev_private;
 675         void *ctx = priv->sh->ctx;
 676
 677         priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
 678         if (!priv->q_counters) {
 679                 struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
 680                 struct ibv_wq *wq;
 681
 682                 DRV_LOG(DEBUG, "Port %d queue counter object cannot be created "
 683                         "by DevX - fall-back to use the kernel driver global "
 684                         "queue counter.", dev->data->port_id);
 685                 /* Create WQ by kernel and query its queue counter ID. */
 686                 if (cq) {
 687                         wq = mlx5_glue->create_wq(ctx,
 688                                                   &(struct ibv_wq_init_attr){
 689                                                     .wq_type = IBV_WQT_RQ,
 690                                                     .max_wr = 1,
 691                                                     .max_sge = 1,
 692                                                     .pd = priv->sh->pd,
 693                                                     .cq = cq,
 694                                                 });
 695                         if (wq) {
 696                                 /* Counter is assigned only on RDY state. */
 697                                 int ret = mlx5_glue->modify_wq(wq,
 698                                                  &(struct ibv_wq_attr){
 699                                                  .attr_mask = IBV_WQ_ATTR_STATE,
 700                                                  .wq_state = IBV_WQS_RDY,
 701                                                 });
 702
 703                                 if (ret == 0)
 704                                         mlx5_devx_cmd_wq_query(wq,
 705                                                          &priv->counter_set_id);
 706                                 claim_zero(mlx5_glue->destroy_wq(wq));
 707                         }
 708                         claim_zero(mlx5_glue->destroy_cq(cq));
 709                 }
 710         } else {
 711                 priv->counter_set_id = priv->q_counters->id;
 712         }
 713         if (priv->counter_set_id == 0)
 714                 DRV_LOG(INFO, "Part of the port %d statistics will not be "
 715                         "available.", dev->data->port_id);
 716 }
 717
 718 /**
 719  * Check if representor spawn info match devargs.
 720  *
 721  * @param spawn
 722  *   Verbs device parameters (name, port, switch_info) to spawn.
 723  * @param eth_da
 724  *   Device devargs to probe.
 725  *
 726  * @return
 727  *   Match result.
 728  */
 729 static bool
 730 mlx5_representor_match(struct mlx5_dev_spawn_data *spawn,
 731                        struct rte_eth_devargs *eth_da)
 732 {
 733         struct mlx5_switch_info *switch_info = &spawn->info;
 734         unsigned int p, f;
 735         uint16_t id;
 736         uint16_t repr_id = mlx5_representor_id_encode(switch_info,
 737                                                       eth_da->type);
 738
 739         switch (eth_da->type) {
 740         case RTE_ETH_REPRESENTOR_SF:
 741                 if (!(spawn->info.port_name == -1 &&
 742                       switch_info->name_type ==
 743                                 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 744                     switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) {
 745                         rte_errno = EBUSY;
 746                         return false;
 747                 }
 748                 break;
 749         case RTE_ETH_REPRESENTOR_VF:
 750                 /* Allows HPF representor index -1 as exception. */
 751                 if (!(spawn->info.port_name == -1 &&
 752                       switch_info->name_type ==
 753                                 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 754                     switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) {
 755                         rte_errno = EBUSY;
 756                         return false;
 757                 }
 758                 break;
 759         case RTE_ETH_REPRESENTOR_NONE:
 760                 rte_errno = EBUSY;
 761                 return false;
 762         default:
 763                 rte_errno = ENOTSUP;
 764                 DRV_LOG(ERR, "unsupported representor type");
 765                 return false;
 766         }
 767         /* Check representor ID: */
 768         for (p = 0; p < eth_da->nb_ports; ++p) {
 769                 if (spawn->pf_bond < 0) {
 770                         /* For non-LAG mode, allow and ignore pf. */
 771                         switch_info->pf_num = eth_da->ports[p];
 772                         repr_id = mlx5_representor_id_encode(switch_info,
 773                                                              eth_da->type);
 774                 }
 775                 for (f = 0; f < eth_da->nb_representor_ports; ++f) {
 776                         id = MLX5_REPRESENTOR_ID
 777                                 (eth_da->ports[p], eth_da->type,
 778                                  eth_da->representor_ports[f]);
 779                         if (repr_id == id)
 780                                 return true;
 781                 }
 782         }
 783         rte_errno = EBUSY;
 784         return false;
 785 }
 786
 787
 788 /**
 789  * Spawn an Ethernet device from Verbs information.
 790  *
 791  * @param dpdk_dev
 792  *   Backing DPDK device.
 793  * @param spawn
 794  *   Verbs device parameters (name, port, switch_info) to spawn.
 795  * @param config
 796  *   Device configuration parameters.
 797  * @param config
 798  *   Device arguments.
 799  *
 800  * @return
 801  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 802  *   is set. The following errors are defined:
 803  *
 804  *   EBUSY: device is not supposed to be spawned.
 805  *   EEXIST: device is already spawned
 806  */
 807 static struct rte_eth_dev *
 808 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 809                struct mlx5_dev_spawn_data *spawn,
 810                struct mlx5_dev_config *config,
 811                struct rte_eth_devargs *eth_da)
 812 {
 813         const struct mlx5_switch_info *switch_info = &spawn->info;
 814         struct mlx5_dev_ctx_shared *sh = NULL;
 815         struct ibv_port_attr port_attr;
 816         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 817         struct rte_eth_dev *eth_dev = NULL;
 818         struct mlx5_priv *priv = NULL;
 819         int err = 0;
 820         unsigned int hw_padding = 0;
 821         unsigned int mps;
 822         unsigned int tunnel_en = 0;
 823         unsigned int mpls_en = 0;
 824         unsigned int swp = 0;
 825         unsigned int mprq = 0;
 826         unsigned int mprq_min_stride_size_n = 0;
 827         unsigned int mprq_max_stride_size_n = 0;
 828         unsigned int mprq_min_stride_num_n = 0;
 829         unsigned int mprq_max_stride_num_n = 0;
 830         struct rte_ether_addr mac;
 831         char name[RTE_ETH_NAME_MAX_LEN];
 832         int own_domain_id = 0;
 833         uint16_t port_id;
 834 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 835         struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
 836 #endif
 837
 838         /* Determine if this port representor is supposed to be spawned. */
 839         if (switch_info->representor && dpdk_dev->devargs &&
 840             !mlx5_representor_match(spawn, eth_da))
 841                 return NULL;
 842         /* Build device name. */
 843         if (spawn->pf_bond < 0) {
 844                 /* Single device. */
 845                 if (!switch_info->representor)
 846                         strlcpy(name, dpdk_dev->name, sizeof(name));
 847                 else
 848                         err = snprintf(name, sizeof(name), "%s_representor_%s%u",
 849                                  dpdk_dev->name,
 850                                  switch_info->name_type ==
 851                                  MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
 852                                  switch_info->port_name);
 853         } else {
 854                 /* Bonding device. */
 855                 if (!switch_info->representor) {
 856                         err = snprintf(name, sizeof(name), "%s_%s",
 857                                  dpdk_dev->name,
 858                                  mlx5_os_get_dev_device_name(spawn->phys_dev));
 859                 } else {
 860                         err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u",
 861                                 dpdk_dev->name,
 862                                 mlx5_os_get_dev_device_name(spawn->phys_dev),
 863                                 switch_info->ctrl_num,
 864                                 switch_info->pf_num,
 865                                 switch_info->name_type ==
 866                                 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
 867                                 switch_info->port_name);
 868                 }
 869         }
 870         if (err >= (int)sizeof(name))
 871                 DRV_LOG(WARNING, "device name overflow %s", name);
 872         /* check if the device is already spawned */
 873         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 874                 rte_errno = EEXIST;
 875                 return NULL;
 876         }
 877         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 878         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 879                 struct mlx5_mp_id mp_id;
 880
 881                 eth_dev = rte_eth_dev_attach_secondary(name);
 882                 if (eth_dev == NULL) {
 883                         DRV_LOG(ERR, "can not attach rte ethdev");
 884                         rte_errno = ENOMEM;
 885                         return NULL;
 886                 }
 887                 eth_dev->device = dpdk_dev;
 888                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
 889                 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
 890                 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
 891                 err = mlx5_proc_priv_init(eth_dev);
 892                 if (err)
 893                         return NULL;
 894                 mp_id.port_id = eth_dev->data->port_id;
 895                 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 896                 /* Receive command fd from primary process */
 897                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
 898                 if (err < 0)
 899                         goto err_secondary;
 900                 /* Remap UAR for Tx queues. */
 901                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
 902                 if (err)
 903                         goto err_secondary;
 904                 /*
 905                  * Ethdev pointer is still required as input since
 906                  * the primary device is not accessible from the
 907                  * secondary process.
 908                  */
 909                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
 910                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
 911                 return eth_dev;
 912 err_secondary:
 913                 mlx5_dev_close(eth_dev);
 914                 return NULL;
 915         }
 916         /*
 917          * Some parameters ("tx_db_nc" in particularly) are needed in
 918          * advance to create dv/verbs device context. We proceed the
 919          * devargs here to get ones, and later proceed devargs again
 920          * to override some hardware settings.
 921          */
 922         err = mlx5_args(config, dpdk_dev->devargs);
 923         if (err) {
 924                 err = rte_errno;
 925                 DRV_LOG(ERR, "failed to process device arguments: %s",
 926                         strerror(rte_errno));
 927                 goto error;
 928         }
 929         if (config->dv_miss_info) {
 930                 if (switch_info->master || switch_info->representor)
 931                         config->dv_xmeta_en = MLX5_XMETA_MODE_META16;
 932         }
 933         mlx5_malloc_mem_select(config->sys_mem_en);
 934         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
 935         if (!sh)
 936                 return NULL;
 937         config->devx = sh->devx;
 938 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
 939         config->dest_tir = 1;
 940 #endif
 941 #ifdef HAVE_IBV_MLX5_MOD_SWP
 942         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
 943 #endif
 944         /*
 945          * Multi-packet send is supported by ConnectX-4 Lx PF as well
 946          * as all ConnectX-5 devices.
 947          */
 948 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 949         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
 950 #endif
 951 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 952         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
 953 #endif
 954         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
 955         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
 956                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
 957                         DRV_LOG(DEBUG, "enhanced MPW is supported");
 958                         mps = MLX5_MPW_ENHANCED;
 959                 } else {
 960                         DRV_LOG(DEBUG, "MPW is supported");
 961                         mps = MLX5_MPW;
 962                 }
 963         } else {
 964                 DRV_LOG(DEBUG, "MPW isn't supported");
 965                 mps = MLX5_MPW_DISABLED;
 966         }
 967 #ifdef HAVE_IBV_MLX5_MOD_SWP
 968         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
 969                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
 970         DRV_LOG(DEBUG, "SWP support: %u", swp);
 971 #endif
 972         config->swp = !!swp;
 973 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 974         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
 975                 struct mlx5dv_striding_rq_caps mprq_caps =
 976                         dv_attr.striding_rq_caps;
 977
 978                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
 979                         mprq_caps.min_single_stride_log_num_of_bytes);
 980                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
 981                         mprq_caps.max_single_stride_log_num_of_bytes);
 982                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
 983                         mprq_caps.min_single_wqe_log_num_of_strides);
 984                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
 985                         mprq_caps.max_single_wqe_log_num_of_strides);
 986                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
 987                         mprq_caps.supported_qpts);
 988                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
 989                 mprq = 1;
 990                 mprq_min_stride_size_n =
 991                         mprq_caps.min_single_stride_log_num_of_bytes;
 992                 mprq_max_stride_size_n =
 993                         mprq_caps.max_single_stride_log_num_of_bytes;
 994                 mprq_min_stride_num_n =
 995                         mprq_caps.min_single_wqe_log_num_of_strides;
 996                 mprq_max_stride_num_n =
 997                         mprq_caps.max_single_wqe_log_num_of_strides;
 998         }
 999 #endif
1000         /* Rx CQE compression is enabled by default. */
1001         config->cqe_comp = 1;
1002 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1003         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1004                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1005                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1006                              (dv_attr.tunnel_offloads_caps &
1007                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
1008                              (dv_attr.tunnel_offloads_caps &
1009                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
1010         }
1011         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1012                 tunnel_en ? "" : "not ");
1013 #else
1014         DRV_LOG(WARNING,
1015                 "tunnel offloading disabled due to old OFED/rdma-core version");
1016 #endif
1017         config->tunnel_en = tunnel_en;
1018 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1019         mpls_en = ((dv_attr.tunnel_offloads_caps &
1020                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1021                    (dv_attr.tunnel_offloads_caps &
1022                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1023         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1024                 mpls_en ? "" : "not ");
1025 #else
1026         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1027                 " old OFED/rdma-core version or firmware configuration");
1028 #endif
1029         config->mpls_en = mpls_en;
1030         /* Check port status. */
1031         err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
1032         if (err) {
1033                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1034                 goto error;
1035         }
1036         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1037                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1038                 err = EINVAL;
1039                 goto error;
1040         }
1041         if (port_attr.state != IBV_PORT_ACTIVE)
1042                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1043                         mlx5_glue->port_state_str(port_attr.state),
1044                         port_attr.state);
1045         /* Allocate private eth device data. */
1046         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
1047                            sizeof(*priv),
1048                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1049         if (priv == NULL) {
1050                 DRV_LOG(ERR, "priv allocation failure");
1051                 err = ENOMEM;
1052                 goto error;
1053         }
1054         priv->sh = sh;
1055         priv->dev_port = spawn->phys_port;
1056         priv->pci_dev = spawn->pci_dev;
1057         priv->mtu = RTE_ETHER_MTU;
1058         /* Some internal functions rely on Netlink sockets, open them now. */
1059         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1060         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1061         priv->representor = !!switch_info->representor;
1062         priv->master = !!switch_info->master;
1063         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1064         priv->vport_meta_tag = 0;
1065         priv->vport_meta_mask = 0;
1066         priv->pf_bond = spawn->pf_bond;
1067 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
1068         /*
1069          * The DevX port query API is implemented. E-Switch may use
1070          * either vport or reg_c[0] metadata register to match on
1071          * vport index. The engaged part of metadata register is
1072          * defined by mask.
1073          */
1074         if (switch_info->representor || switch_info->master) {
1075                 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
1076                                       MLX5DV_DEVX_PORT_MATCH_REG_C_0;
1077                 err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port,
1078                                                  &devx_port);
1079                 if (err) {
1080                         DRV_LOG(WARNING,
1081                                 "can't query devx port %d on device %s",
1082                                 spawn->phys_port,
1083                                 mlx5_os_get_dev_device_name(spawn->phys_dev));
1084                         devx_port.comp_mask = 0;
1085                 }
1086         }
1087         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
1088                 priv->vport_meta_tag = devx_port.reg_c_0.value;
1089                 priv->vport_meta_mask = devx_port.reg_c_0.mask;
1090                 if (!priv->vport_meta_mask) {
1091                         DRV_LOG(ERR, "vport zero mask for port %d"
1092                                      " on bonding device %s",
1093                                      spawn->phys_port,
1094                                      mlx5_os_get_dev_device_name
1095                                                         (spawn->phys_dev));
1096                         err = ENOTSUP;
1097                         goto error;
1098                 }
1099                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
1100                         DRV_LOG(ERR, "invalid vport tag for port %d"
1101                                      " on bonding device %s",
1102                                      spawn->phys_port,
1103                                      mlx5_os_get_dev_device_name
1104                                                         (spawn->phys_dev));
1105                         err = ENOTSUP;
1106                         goto error;
1107                 }
1108         }
1109         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
1110                 priv->vport_id = devx_port.vport_num;
1111         } else if (spawn->pf_bond >= 0 &&
1112                    (switch_info->representor || switch_info->master)) {
1113                 DRV_LOG(ERR, "can't deduce vport index for port %d"
1114                              " on bonding device %s",
1115                              spawn->phys_port,
1116                              mlx5_os_get_dev_device_name(spawn->phys_dev));
1117                 err = ENOTSUP;
1118                 goto error;
1119         } else {
1120                 /* Suppose vport index in compatible way. */
1121                 priv->vport_id = switch_info->representor ?
1122                                  switch_info->port_name + 1 : -1;
1123         }
1124 #else
1125         /*
1126          * Kernel/rdma_core support single E-Switch per PF configurations
1127          * only and vport_id field contains the vport index for
1128          * associated VF, which is deduced from representor port name.
1129          * For example, let's have the IB device port 10, it has
1130          * attached network device eth0, which has port name attribute
1131          * pf0vf2, we can deduce the VF number as 2, and set vport index
1132          * as 3 (2+1). This assigning schema should be changed if the
1133          * multiple E-Switch instances per PF configurations or/and PCI
1134          * subfunctions are added.
1135          */
1136         priv->vport_id = switch_info->representor ?
1137                          switch_info->port_name + 1 : -1;
1138 #endif
1139         priv->representor_id = mlx5_representor_id_encode(switch_info,
1140                                                           eth_da->type);
1141         /*
1142          * Look for sibling devices in order to reuse their switch domain
1143          * if any, otherwise allocate one.
1144          */
1145         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1146                 const struct mlx5_priv *opriv =
1147                         rte_eth_devices[port_id].data->dev_private;
1148
1149                 if (!opriv ||
1150                     opriv->sh != priv->sh ||
1151                         opriv->domain_id ==
1152                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1153                         continue;
1154                 priv->domain_id = opriv->domain_id;
1155                 break;
1156         }
1157         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1158                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1159                 if (err) {
1160                         err = rte_errno;
1161                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1162                                 strerror(rte_errno));
1163                         goto error;
1164                 }
1165                 own_domain_id = 1;
1166         }
1167         /* Override some values set by hardware configuration. */
1168         mlx5_args(config, dpdk_dev->devargs);
1169         err = mlx5_dev_check_sibling_config(priv, config);
1170         if (err)
1171                 goto error;
1172         config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1173                             IBV_DEVICE_RAW_IP_CSUM);
1174         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1175                 (config->hw_csum ? "" : "not "));
1176 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1177         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1178         DRV_LOG(DEBUG, "counters are not supported");
1179 #endif
1180 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
1181         if (config->dv_flow_en) {
1182                 DRV_LOG(WARNING, "DV flow is not supported");
1183                 config->dv_flow_en = 0;
1184         }
1185 #endif
1186         config->ind_table_max_size =
1187                 sh->device_attr.max_rwq_indirection_table_size;
1188         /*
1189          * Remove this check once DPDK supports larger/variable
1190          * indirection tables.
1191          */
1192         if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1193                 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1194         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1195                 config->ind_table_max_size);
1196         config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1197                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1198         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1199                 (config->hw_vlan_strip ? "" : "not "));
1200         config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1201                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1202 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1203         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1204 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1205         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1206                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1207 #endif
1208         if (config->hw_padding && !hw_padding) {
1209                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1210                 config->hw_padding = 0;
1211         } else if (config->hw_padding) {
1212                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1213         }
1214         config->tso = (sh->device_attr.max_tso > 0 &&
1215                       (sh->device_attr.tso_supported_qpts &
1216                        (1 << IBV_QPT_RAW_PACKET)));
1217         if (config->tso)
1218                 config->tso_max_payload_sz = sh->device_attr.max_tso;
1219         /*
1220          * MPW is disabled by default, while the Enhanced MPW is enabled
1221          * by default.
1222          */
1223         if (config->mps == MLX5_ARG_UNSET)
1224                 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1225                                                           MLX5_MPW_DISABLED;
1226         else
1227                 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
1228         DRV_LOG(INFO, "%sMPS is %s",
1229                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1230                 config->mps == MLX5_MPW ? "legacy " : "",
1231                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1232         if (config->devx) {
1233                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
1234                 if (err) {
1235                         err = -err;
1236                         goto error;
1237                 }
1238                 /* Check relax ordering support. */
1239                 if (!haswell_broadwell_cpu) {
1240                         sh->cmng.relaxed_ordering_write =
1241                                 config->hca_attr.relaxed_ordering_write;
1242                         sh->cmng.relaxed_ordering_read =
1243                                 config->hca_attr.relaxed_ordering_read;
1244                 } else {
1245                         sh->cmng.relaxed_ordering_read = 0;
1246                         sh->cmng.relaxed_ordering_write = 0;
1247                 }
1248                 sh->rq_ts_format = config->hca_attr.rq_ts_format;
1249                 sh->sq_ts_format = config->hca_attr.sq_ts_format;
1250                 sh->qp_ts_format = config->hca_attr.qp_ts_format;
1251                 /* Check for LRO support. */
1252                 if (config->dest_tir && config->hca_attr.lro_cap &&
1253                     config->dv_flow_en) {
1254                         /* TBD check tunnel lro caps. */
1255                         config->lro.supported = config->hca_attr.lro_cap;
1256                         DRV_LOG(DEBUG, "Device supports LRO");
1257                         /*
1258                          * If LRO timeout is not configured by application,
1259                          * use the minimal supported value.
1260                          */
1261                         if (!config->lro.timeout)
1262                                 config->lro.timeout =
1263                                 config->hca_attr.lro_timer_supported_periods[0];
1264                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1265                                 config->lro.timeout);
1266                         DRV_LOG(DEBUG, "LRO minimal size of TCP segment "
1267                                 "required for coalescing is %d bytes",
1268                                 config->hca_attr.lro_min_mss_size);
1269                 }
1270 #if defined(HAVE_MLX5DV_DR) && \
1271         (defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \
1272          defined(HAVE_MLX5_DR_CREATE_ACTION_ASO))
1273                 if (config->hca_attr.qos.sup &&
1274                     config->hca_attr.qos.flow_meter_old &&
1275                     config->dv_flow_en) {
1276                         uint8_t reg_c_mask =
1277                                 config->hca_attr.qos.flow_meter_reg_c_ids;
1278                         /*
1279                          * Meter needs two REG_C's for color match and pre-sfx
1280                          * flow match. Here get the REG_C for color match.
1281                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
1282                          */
1283                         reg_c_mask &= 0xfc;
1284                         if (__builtin_popcount(reg_c_mask) < 1) {
1285                                 priv->mtr_en = 0;
1286                                 DRV_LOG(WARNING, "No available register for"
1287                                         " meter.");
1288                         } else {
1289                                 /*
1290                                  * The meter color register is used by the
1291                                  * flow-hit feature as well.
1292                                  * The flow-hit feature must use REG_C_3
1293                                  * Prefer REG_C_3 if it is available.
1294                                  */
1295                                 if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
1296                                         priv->mtr_color_reg = REG_C_3;
1297                                 else
1298                                         priv->mtr_color_reg = ffs(reg_c_mask)
1299                                                               - 1 + REG_C_0;
1300                                 priv->mtr_en = 1;
1301                                 priv->mtr_reg_share =
1302                                       config->hca_attr.qos.flow_meter;
1303                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1304                                         priv->mtr_color_reg);
1305                         }
1306                 }
1307                 if (config->hca_attr.qos.sup &&
1308                         config->hca_attr.qos.flow_meter_aso_sup) {
1309                         uint32_t log_obj_size =
1310                                 rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
1311                         if (log_obj_size >=
1312                         config->hca_attr.qos.log_meter_aso_granularity &&
1313                         log_obj_size <=
1314                         config->hca_attr.qos.log_meter_aso_max_alloc)
1315                                 sh->meter_aso_en = 1;
1316                 }
1317                 if (priv->mtr_en) {
1318                         err = mlx5_aso_flow_mtrs_mng_init(priv->sh);
1319                         if (err) {
1320                                 err = -err;
1321                                 goto error;
1322                         }
1323                 }
1324 #endif
1325 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
1326                 if (config->hca_attr.flow_hit_aso &&
1327                     priv->mtr_color_reg == REG_C_3) {
1328                         sh->flow_hit_aso_en = 1;
1329                         err = mlx5_flow_aso_age_mng_init(sh);
1330                         if (err) {
1331                                 err = -err;
1332                                 goto error;
1333                         }
1334                         DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
1335                 }
1336 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
1337 #if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO) && \
1338         defined(HAVE_MLX5_DR_ACTION_ASO_CT)
1339                 if (config->hca_attr.ct_offload &&
1340                     priv->mtr_color_reg == REG_C_3) {
1341                         err = mlx5_flow_aso_ct_mng_init(sh);
1342                         if (err) {
1343                                 err = -err;
1344                                 goto error;
1345                         }
1346                         DRV_LOG(DEBUG, "CT ASO is supported.");
1347                         sh->ct_aso_en = 1;
1348                 }
1349 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */
1350 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1351                 if (config->hca_attr.log_max_ft_sampler_num > 0  &&
1352                     config->dv_flow_en) {
1353                         priv->sampler_en = 1;
1354                         DRV_LOG(DEBUG, "Sampler enabled!");
1355                 } else {
1356                         priv->sampler_en = 0;
1357                         if (!config->hca_attr.log_max_ft_sampler_num)
1358                                 DRV_LOG(WARNING,
1359                                         "No available register for sampler.");
1360                         else
1361                                 DRV_LOG(DEBUG, "DV flow is not supported!");
1362                 }
1363 #endif
1364         }
1365         if (config->cqe_comp && RTE_CACHE_LINE_SIZE == 128 &&
1366             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) {
1367                 DRV_LOG(WARNING, "Rx CQE 128B compression is not supported");
1368                 config->cqe_comp = 0;
1369         }
1370         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_FTAG_STRIDX &&
1371             (!config->devx || !config->hca_attr.mini_cqe_resp_flow_tag)) {
1372                 DRV_LOG(WARNING, "Flow Tag CQE compression"
1373                                  " format isn't supported.");
1374                 config->cqe_comp = 0;
1375         }
1376         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_L34H_STRIDX &&
1377             (!config->devx || !config->hca_attr.mini_cqe_resp_l3_l4_tag)) {
1378                 DRV_LOG(WARNING, "L3/L4 Header CQE compression"
1379                                  " format isn't supported.");
1380                 config->cqe_comp = 0;
1381         }
1382         DRV_LOG(DEBUG, "Rx CQE compression is %ssupported",
1383                         config->cqe_comp ? "" : "not ");
1384         if (config->tx_pp) {
1385                 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1386                         config->hca_attr.dev_freq_khz);
1387                 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1388                         config->hca_attr.qos.packet_pacing ? "" : "not ");
1389                 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1390                         config->hca_attr.cross_channel ? "" : "not ");
1391                 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1392                         config->hca_attr.wqe_index_ignore ? "" : "not ");
1393                 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1394                         config->hca_attr.non_wire_sq ? "" : "not ");
1395                 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1396                         config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1397                         config->hca_attr.log_max_static_sq_wq);
1398                 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1399                         config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1400                 if (!config->devx) {
1401                         DRV_LOG(ERR, "DevX is required for packet pacing");
1402                         err = ENODEV;
1403                         goto error;
1404                 }
1405                 if (!config->hca_attr.qos.packet_pacing) {
1406                         DRV_LOG(ERR, "Packet pacing is not supported");
1407                         err = ENODEV;
1408                         goto error;
1409                 }
1410                 if (!config->hca_attr.cross_channel) {
1411                         DRV_LOG(ERR, "Cross channel operations are"
1412                                      " required for packet pacing");
1413                         err = ENODEV;
1414                         goto error;
1415                 }
1416                 if (!config->hca_attr.wqe_index_ignore) {
1417                         DRV_LOG(ERR, "WQE index ignore feature is"
1418                                      " required for packet pacing");
1419                         err = ENODEV;
1420                         goto error;
1421                 }
1422                 if (!config->hca_attr.non_wire_sq) {
1423                         DRV_LOG(ERR, "Non-wire SQ feature is"
1424                                      " required for packet pacing");
1425                         err = ENODEV;
1426                         goto error;
1427                 }
1428                 if (!config->hca_attr.log_max_static_sq_wq) {
1429                         DRV_LOG(ERR, "Static WQE SQ feature is"
1430                                      " required for packet pacing");
1431                         err = ENODEV;
1432                         goto error;
1433                 }
1434                 if (!config->hca_attr.qos.wqe_rate_pp) {
1435                         DRV_LOG(ERR, "WQE rate mode is required"
1436                                      " for packet pacing");
1437                         err = ENODEV;
1438                         goto error;
1439                 }
1440 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1441                 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1442                              " can't create queues for packet pacing");
1443                 err = ENODEV;
1444                 goto error;
1445 #endif
1446         }
1447         if (config->devx) {
1448                 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1449
1450                 err = config->hca_attr.access_register_user ?
1451                         mlx5_devx_cmd_register_read
1452                                 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1453                                 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1454                 if (!err) {
1455                         uint32_t ts_mode;
1456
1457                         /* MTUTC register is read successfully. */
1458                         ts_mode = MLX5_GET(register_mtutc, reg,
1459                                            time_stamp_mode);
1460                         if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1461                                 config->rt_timestamp = 1;
1462                 } else {
1463                         /* Kernel does not support register reading. */
1464                         if (config->hca_attr.dev_freq_khz ==
1465                                                  (NS_PER_S / MS_PER_S))
1466                                 config->rt_timestamp = 1;
1467                 }
1468         }
1469         /*
1470          * If HW has bug working with tunnel packet decapsulation and
1471          * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1472          * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1473          */
1474         if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1475                 config->hw_fcs_strip = 0;
1476         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1477                 (config->hw_fcs_strip ? "" : "not "));
1478         if (config->mprq.enabled && mprq) {
1479                 if (config->mprq.stride_num_n &&
1480                     (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1481                      config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1482                         config->mprq.stride_num_n =
1483                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1484                                                 mprq_min_stride_num_n),
1485                                         mprq_max_stride_num_n);
1486                         DRV_LOG(WARNING,
1487                                 "the number of strides"
1488                                 " for Multi-Packet RQ is out of range,"
1489                                 " setting default value (%u)",
1490                                 1 << config->mprq.stride_num_n);
1491                 }
1492                 if (config->mprq.stride_size_n &&
1493                     (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1494                      config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1495                         config->mprq.stride_size_n =
1496                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1497                                                 mprq_min_stride_size_n),
1498                                         mprq_max_stride_size_n);
1499                         DRV_LOG(WARNING,
1500                                 "the size of a stride"
1501                                 " for Multi-Packet RQ is out of range,"
1502                                 " setting default value (%u)",
1503                                 1 << config->mprq.stride_size_n);
1504                 }
1505                 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1506                 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1507         } else if (config->mprq.enabled && !mprq) {
1508                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1509                 config->mprq.enabled = 0;
1510         }
1511         if (config->max_dump_files_num == 0)
1512                 config->max_dump_files_num = 128;
1513         eth_dev = rte_eth_dev_allocate(name);
1514         if (eth_dev == NULL) {
1515                 DRV_LOG(ERR, "can not allocate rte ethdev");
1516                 err = ENOMEM;
1517                 goto error;
1518         }
1519         if (priv->representor) {
1520                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1521                 eth_dev->data->representor_id = priv->representor_id;
1522         }
1523         priv->mp_id.port_id = eth_dev->data->port_id;
1524         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
1525         /*
1526          * Store associated network device interface index. This index
1527          * is permanent throughout the lifetime of device. So, we may store
1528          * the ifindex here and use the cached value further.
1529          */
1530         MLX5_ASSERT(spawn->ifindex);
1531         priv->if_index = spawn->ifindex;
1532         eth_dev->data->dev_private = priv;
1533         priv->dev_data = eth_dev->data;
1534         eth_dev->data->mac_addrs = priv->mac;
1535         eth_dev->device = dpdk_dev;
1536         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1537         /* Configure the first MAC address by default. */
1538         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1539                 DRV_LOG(ERR,
1540                         "port %u cannot get MAC address, is mlx5_en"
1541                         " loaded? (errno: %s)",
1542                         eth_dev->data->port_id, strerror(rte_errno));
1543                 err = ENODEV;
1544                 goto error;
1545         }
1546         DRV_LOG(INFO,
1547                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1548                 eth_dev->data->port_id,
1549                 mac.addr_bytes[0], mac.addr_bytes[1],
1550                 mac.addr_bytes[2], mac.addr_bytes[3],
1551                 mac.addr_bytes[4], mac.addr_bytes[5]);
1552 #ifdef RTE_LIBRTE_MLX5_DEBUG
1553         {
1554                 char ifname[MLX5_NAMESIZE];
1555
1556                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1557                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1558                                 eth_dev->data->port_id, ifname);
1559                 else
1560                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1561                                 eth_dev->data->port_id);
1562         }
1563 #endif
1564         /* Get actual MTU if possible. */
1565         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1566         if (err) {
1567                 err = rte_errno;
1568                 goto error;
1569         }
1570         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1571                 priv->mtu);
1572         /* Initialize burst functions to prevent crashes before link-up. */
1573         eth_dev->rx_pkt_burst = removed_rx_burst;
1574         eth_dev->tx_pkt_burst = removed_tx_burst;
1575         eth_dev->dev_ops = &mlx5_dev_ops;
1576         eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1577         eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1578         eth_dev->rx_queue_count = mlx5_rx_queue_count;
1579         /* Register MAC address. */
1580         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1581         if (config->vf && config->vf_nl_en)
1582                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1583                                       mlx5_ifindex(eth_dev),
1584                                       eth_dev->data->mac_addrs,
1585                                       MLX5_MAX_MAC_ADDRESSES);
1586         priv->flows = 0;
1587         priv->ctrl_flows = 0;
1588         rte_spinlock_init(&priv->flow_list_lock);
1589         TAILQ_INIT(&priv->flow_meters);
1590         priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR);
1591         if (!priv->mtr_profile_tbl)
1592                 goto error;
1593         /* Hint libmlx5 to use PMD allocator for data plane resources */
1594         mlx5_glue->dv_set_context_attr(sh->ctx,
1595                         MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1596                         (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
1597                                 .alloc = &mlx5_alloc_verbs_buf,
1598                                 .free = &mlx5_free_verbs_buf,
1599                                 .data = sh,
1600                         }));
1601         /* Bring Ethernet device up. */
1602         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1603                 eth_dev->data->port_id);
1604         mlx5_set_link_up(eth_dev);
1605         /*
1606          * Even though the interrupt handler is not installed yet,
1607          * interrupts will still trigger on the async_fd from
1608          * Verbs context returned by ibv_open_device().
1609          */
1610         mlx5_link_update(eth_dev, 0);
1611 #ifdef HAVE_MLX5DV_DR_ESWITCH
1612         if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1613               (switch_info->representor || switch_info->master)))
1614                 config->dv_esw_en = 0;
1615 #else
1616         config->dv_esw_en = 0;
1617 #endif
1618         /* Detect minimal data bytes to inline. */
1619         mlx5_set_min_inline(spawn, config);
1620         /* Store device configuration on private structure. */
1621         priv->config = *config;
1622         /* Create context for virtual machine VLAN workaround. */
1623         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1624         if (config->dv_flow_en) {
1625                 err = mlx5_alloc_shared_dr(priv);
1626                 if (err)
1627                         goto error;
1628         }
1629         if (config->devx && config->dv_flow_en && config->dest_tir) {
1630                 priv->obj_ops = devx_obj_ops;
1631                 priv->obj_ops.drop_action_create =
1632                                                 ibv_obj_ops.drop_action_create;
1633                 priv->obj_ops.drop_action_destroy =
1634                                                 ibv_obj_ops.drop_action_destroy;
1635 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1636                 priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify;
1637 #else
1638                 if (config->dv_esw_en)
1639                         priv->obj_ops.txq_obj_modify =
1640                                                 ibv_obj_ops.txq_obj_modify;
1641 #endif
1642                 /* Use specific wrappers for Tx object. */
1643                 priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;
1644                 priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;
1645                 mlx5_queue_counter_id_prepare(eth_dev);
1646                 priv->obj_ops.lb_dummy_queue_create =
1647                                         mlx5_rxq_ibv_obj_dummy_lb_create;
1648                 priv->obj_ops.lb_dummy_queue_release =
1649                                         mlx5_rxq_ibv_obj_dummy_lb_release;
1650         } else {
1651                 priv->obj_ops = ibv_obj_ops;
1652         }
1653         priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
1654         if (!priv->drop_queue.hrxq)
1655                 goto error;
1656         /* Supported Verbs flow priority number detection. */
1657         err = mlx5_flow_discover_priorities(eth_dev);
1658         if (err < 0) {
1659                 err = -err;
1660                 goto error;
1661         }
1662         priv->config.flow_prio = err;
1663         if (!priv->config.dv_esw_en &&
1664             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1665                 DRV_LOG(WARNING, "metadata mode %u is not supported "
1666                                  "(no E-Switch)", priv->config.dv_xmeta_en);
1667                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1668         }
1669         mlx5_set_metadata_mask(eth_dev);
1670         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1671             !priv->sh->dv_regc0_mask) {
1672                 DRV_LOG(ERR, "metadata mode %u is not supported "
1673                              "(no metadata reg_c[0] is available)",
1674                              priv->config.dv_xmeta_en);
1675                         err = ENOTSUP;
1676                         goto error;
1677         }
1678         mlx5_cache_list_init(&priv->hrxqs, "hrxq", 0, eth_dev,
1679                              mlx5_hrxq_create_cb,
1680                              mlx5_hrxq_match_cb,
1681                              mlx5_hrxq_remove_cb);
1682         /* Query availability of metadata reg_c's. */
1683         err = mlx5_flow_discover_mreg_c(eth_dev);
1684         if (err < 0) {
1685                 err = -err;
1686                 goto error;
1687         }
1688         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1689                 DRV_LOG(DEBUG,
1690                         "port %u extensive metadata register is not supported",
1691                         eth_dev->data->port_id);
1692                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1693                         DRV_LOG(ERR, "metadata mode %u is not supported "
1694                                      "(no metadata registers available)",
1695                                      priv->config.dv_xmeta_en);
1696                         err = ENOTSUP;
1697                         goto error;
1698                 }
1699         }
1700         if (priv->config.dv_flow_en &&
1701             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1702             mlx5_flow_ext_mreg_supported(eth_dev) &&
1703             priv->sh->dv_regc0_mask) {
1704                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1705                                                       MLX5_FLOW_MREG_HTABLE_SZ,
1706                                                       0, 0,
1707                                                       flow_dv_mreg_create_cb,
1708                                                       flow_dv_mreg_match_cb,
1709                                                       flow_dv_mreg_remove_cb);
1710                 if (!priv->mreg_cp_tbl) {
1711                         err = ENOMEM;
1712                         goto error;
1713                 }
1714                 priv->mreg_cp_tbl->ctx = eth_dev;
1715         }
1716         rte_spinlock_init(&priv->shared_act_sl);
1717         mlx5_flow_counter_mode_config(eth_dev);
1718         if (priv->config.dv_flow_en)
1719                 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
1720         return eth_dev;
1721 error:
1722         if (priv) {
1723                 if (priv->mreg_cp_tbl)
1724                         mlx5_hlist_destroy(priv->mreg_cp_tbl);
1725                 if (priv->sh)
1726                         mlx5_os_free_shared_dr(priv);
1727                 if (priv->nl_socket_route >= 0)
1728                         close(priv->nl_socket_route);
1729                 if (priv->nl_socket_rdma >= 0)
1730                         close(priv->nl_socket_rdma);
1731                 if (priv->vmwa_context)
1732                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1733                 if (eth_dev && priv->drop_queue.hrxq)
1734                         mlx5_drop_action_destroy(eth_dev);
1735                 if (priv->mtr_profile_tbl)
1736                         mlx5_l3t_destroy(priv->mtr_profile_tbl);
1737                 if (own_domain_id)
1738                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1739                 mlx5_cache_list_destroy(&priv->hrxqs);
1740                 mlx5_free(priv);
1741                 if (eth_dev != NULL)
1742                         eth_dev->data->dev_private = NULL;
1743         }
1744         if (eth_dev != NULL) {
1745                 /* mac_addrs must not be freed alone because part of
1746                  * dev_private
1747                  **/
1748                 eth_dev->data->mac_addrs = NULL;
1749                 rte_eth_dev_release_port(eth_dev);
1750         }
1751         if (sh)
1752                 mlx5_free_shared_dev_ctx(sh);
1753         MLX5_ASSERT(err > 0);
1754         rte_errno = err;
1755         return NULL;
1756 }
1757
1758 /**
1759  * Comparison callback to sort device data.
1760  *
1761  * This is meant to be used with qsort().
1762  *
1763  * @param a[in]
1764  *   Pointer to pointer to first data object.
1765  * @param b[in]
1766  *   Pointer to pointer to second data object.
1767  *
1768  * @return
1769  *   0 if both objects are equal, less than 0 if the first argument is less
1770  *   than the second, greater than 0 otherwise.
1771  */
1772 static int
1773 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1774 {
1775         const struct mlx5_switch_info *si_a =
1776                 &((const struct mlx5_dev_spawn_data *)a)->info;
1777         const struct mlx5_switch_info *si_b =
1778                 &((const struct mlx5_dev_spawn_data *)b)->info;
1779         int ret;
1780
1781         /* Master device first. */
1782         ret = si_b->master - si_a->master;
1783         if (ret)
1784                 return ret;
1785         /* Then representor devices. */
1786         ret = si_b->representor - si_a->representor;
1787         if (ret)
1788                 return ret;
1789         /* Unidentified devices come last in no specific order. */
1790         if (!si_a->representor)
1791                 return 0;
1792         /* Order representors by name. */
1793         return si_a->port_name - si_b->port_name;
1794 }
1795
1796 /**
1797  * Match PCI information for possible slaves of bonding device.
1798  *
1799  * @param[in] ibv_dev
1800  *   Pointer to Infiniband device structure.
1801  * @param[in] pci_dev
1802  *   Pointer to primary PCI address structure to match.
1803  * @param[in] nl_rdma
1804  *   Netlink RDMA group socket handle.
1805  * @param[in] owner
1806  *   Rerepsentor owner PF index.
1807  * @param[out] bond_info
1808  *   Pointer to bonding information.
1809  *
1810  * @return
1811  *   negative value if no bonding device found, otherwise
1812  *   positive index of slave PF in bonding.
1813  */
1814 static int
1815 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1816                            const struct rte_pci_addr *pci_dev,
1817                            int nl_rdma, uint16_t owner,
1818                            struct mlx5_bond_info *bond_info)
1819 {
1820         char ifname[IF_NAMESIZE + 1];
1821         unsigned int ifindex;
1822         unsigned int np, i;
1823         FILE *bond_file = NULL, *file;
1824         int pf = -1;
1825         int ret;
1826
1827         /*
1828          * Try to get master device name. If something goes
1829          * wrong suppose the lack of kernel support and no
1830          * bonding devices.
1831          */
1832         memset(bond_info, 0, sizeof(*bond_info));
1833         if (nl_rdma < 0)
1834                 return -1;
1835         if (!strstr(ibv_dev->name, "bond"))
1836                 return -1;
1837         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
1838         if (!np)
1839                 return -1;
1840         /*
1841          * The Master device might not be on the predefined
1842          * port (not on port index 1, it is not garanted),
1843          * we have to scan all Infiniband device port and
1844          * find master.
1845          */
1846         for (i = 1; i <= np; ++i) {
1847                 /* Check whether Infiniband port is populated. */
1848                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
1849                 if (!ifindex)
1850                         continue;
1851                 if (!if_indextoname(ifindex, ifname))
1852                         continue;
1853                 /* Try to read bonding slave names from sysfs. */
1854                 MKSTR(slaves,
1855                       "/sys/class/net/%s/master/bonding/slaves", ifname);
1856                 bond_file = fopen(slaves, "r");
1857                 if (bond_file)
1858                         break;
1859         }
1860         if (!bond_file)
1861                 return -1;
1862         /* Use safe format to check maximal buffer length. */
1863         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1864         while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1865                 char tmp_str[IF_NAMESIZE + 32];
1866                 struct rte_pci_addr pci_addr;
1867                 struct mlx5_switch_info info;
1868
1869                 /* Process slave interface names in the loop. */
1870                 snprintf(tmp_str, sizeof(tmp_str),
1871                          "/sys/class/net/%s", ifname);
1872                 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
1873                         DRV_LOG(WARNING, "can not get PCI address"
1874                                          " for netdev \"%s\"", ifname);
1875                         continue;
1876                 }
1877                 /* Slave interface PCI address match found. */
1878                 snprintf(tmp_str, sizeof(tmp_str),
1879                          "/sys/class/net/%s/phys_port_name", ifname);
1880                 file = fopen(tmp_str, "rb");
1881                 if (!file)
1882                         break;
1883                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1884                 if (fscanf(file, "%32s", tmp_str) == 1)
1885                         mlx5_translate_port_name(tmp_str, &info);
1886                 fclose(file);
1887                 /* Only process PF ports. */
1888                 if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY &&
1889                     info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1890                         continue;
1891                 /* Check max bonding member. */
1892                 if (info.port_name >= MLX5_BOND_MAX_PORTS) {
1893                         DRV_LOG(WARNING, "bonding index out of range, "
1894                                 "please increase MLX5_BOND_MAX_PORTS: %s",
1895                                 tmp_str);
1896                         break;
1897                 }
1898                 /* Match PCI address, allows BDF0+pfx or BDFx+pfx. */
1899                 if (pci_dev->domain == pci_addr.domain &&
1900                     pci_dev->bus == pci_addr.bus &&
1901                     pci_dev->devid == pci_addr.devid &&
1902                     ((pci_dev->function == 0 &&
1903                       pci_dev->function + owner == pci_addr.function) ||
1904                      (pci_dev->function == owner &&
1905                       pci_addr.function == owner)))
1906                         pf = info.port_name;
1907                 /* Get ifindex. */
1908                 snprintf(tmp_str, sizeof(tmp_str),
1909                          "/sys/class/net/%s/ifindex", ifname);
1910                 file = fopen(tmp_str, "rb");
1911                 if (!file)
1912                         break;
1913                 ret = fscanf(file, "%u", &ifindex);
1914                 fclose(file);
1915                 if (ret != 1)
1916                         break;
1917                 /* Save bonding info. */
1918                 strncpy(bond_info->ports[info.port_name].ifname, ifname,
1919                         sizeof(bond_info->ports[0].ifname));
1920                 bond_info->ports[info.port_name].pci_addr = pci_addr;
1921                 bond_info->ports[info.port_name].ifindex = ifindex;
1922                 bond_info->n_port++;
1923         }
1924         if (pf >= 0) {
1925                 /* Get bond interface info */
1926                 ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex,
1927                                            bond_info->ifname);
1928                 if (ret)
1929                         DRV_LOG(ERR, "unable to get bond info: %s",
1930                                 strerror(rte_errno));
1931                 else
1932                         DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
1933                                 ifindex, bond_info->ifindex, bond_info->ifname);
1934         }
1935         return pf;
1936 }
1937
1938 /**
1939  * Register a PCI device within bonding.
1940  *
1941  * This function spawns Ethernet devices out of a given PCI device and
1942  * bonding owner PF index.
1943  *
1944  * @param[in] pci_dev
1945  *   PCI device information.
1946  * @param[in] req_eth_da
1947  *   Requested ethdev device argument.
1948  * @param[in] owner_id
1949  *   Requested owner PF port ID within bonding device, default to 0.
1950  *
1951  * @return
1952  *   0 on success, a negative errno value otherwise and rte_errno is set.
1953  */
1954 static int
1955 mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev,
1956                      struct rte_eth_devargs *req_eth_da,
1957                      uint16_t owner_id)
1958 {
1959         struct ibv_device **ibv_list;
1960         /*
1961          * Number of found IB Devices matching with requested PCI BDF.
1962          * nd != 1 means there are multiple IB devices over the same
1963          * PCI device and we have representors and master.
1964          */
1965         unsigned int nd = 0;
1966         /*
1967          * Number of found IB device Ports. nd = 1 and np = 1..n means
1968          * we have the single multiport IB device, and there may be
1969          * representors attached to some of found ports.
1970          */
1971         unsigned int np = 0;
1972         /*
1973          * Number of DPDK ethernet devices to Spawn - either over
1974          * multiple IB devices or multiple ports of single IB device.
1975          * Actually this is the number of iterations to spawn.
1976          */
1977         unsigned int ns = 0;
1978         /*
1979          * Bonding device
1980          *   < 0 - no bonding device (single one)
1981          *  >= 0 - bonding device (value is slave PF index)
1982          */
1983         int bd = -1;
1984         struct mlx5_dev_spawn_data *list = NULL;
1985         struct mlx5_dev_config dev_config;
1986         unsigned int dev_config_vf;
1987         struct rte_eth_devargs eth_da = *req_eth_da;
1988         struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */
1989         struct mlx5_bond_info bond_info;
1990         int ret = -1;
1991
1992         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1993                 mlx5_pmd_socket_init();
1994         ret = mlx5_init_once();
1995         if (ret) {
1996                 DRV_LOG(ERR, "unable to init PMD global data: %s",
1997                         strerror(rte_errno));
1998                 return -rte_errno;
1999         }
2000         errno = 0;
2001         ibv_list = mlx5_glue->get_device_list(&ret);
2002         if (!ibv_list) {
2003                 rte_errno = errno ? errno : ENOSYS;
2004                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
2005                 return -rte_errno;
2006         }
2007         /*
2008          * First scan the list of all Infiniband devices to find
2009          * matching ones, gathering into the list.
2010          */
2011         struct ibv_device *ibv_match[ret + 1];
2012         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
2013         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2014         unsigned int i;
2015
2016         while (ret-- > 0) {
2017                 struct rte_pci_addr pci_addr;
2018
2019                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
2020                 bd = mlx5_device_bond_pci_match
2021                                 (ibv_list[ret], &owner_pci, nl_rdma, owner_id,
2022                                  &bond_info);
2023                 if (bd >= 0) {
2024                         /*
2025                          * Bonding device detected. Only one match is allowed,
2026                          * the bonding is supported over multi-port IB device,
2027                          * there should be no matches on representor PCI
2028                          * functions or non VF LAG bonding devices with
2029                          * specified address.
2030                          */
2031                         if (nd) {
2032                                 DRV_LOG(ERR,
2033                                         "multiple PCI match on bonding device"
2034                                         "\"%s\" found", ibv_list[ret]->name);
2035                                 rte_errno = ENOENT;
2036                                 ret = -rte_errno;
2037                                 goto exit;
2038                         }
2039                         /* Amend owner pci address if owner PF ID specified. */
2040                         if (eth_da.nb_representor_ports)
2041                                 owner_pci.function += owner_id;
2042                         DRV_LOG(INFO, "PCI information matches for"
2043                                       " slave %d bonding device \"%s\"",
2044                                       bd, ibv_list[ret]->name);
2045                         ibv_match[nd++] = ibv_list[ret];
2046                         break;
2047                 } else {
2048                         /* Bonding device not found. */
2049                         if (mlx5_dev_to_pci_addr
2050                                 (ibv_list[ret]->ibdev_path, &pci_addr))
2051                                 continue;
2052                         if (owner_pci.domain != pci_addr.domain ||
2053                             owner_pci.bus != pci_addr.bus ||
2054                             owner_pci.devid != pci_addr.devid ||
2055                             owner_pci.function != pci_addr.function)
2056                                 continue;
2057                         DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2058                                 ibv_list[ret]->name);
2059                         ibv_match[nd++] = ibv_list[ret];
2060                 }
2061         }
2062         ibv_match[nd] = NULL;
2063         if (!nd) {
2064                 /* No device matches, just complain and bail out. */
2065                 DRV_LOG(WARNING,
2066                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
2067                         " are kernel drivers loaded?",
2068                         owner_pci.domain, owner_pci.bus,
2069                         owner_pci.devid, owner_pci.function);
2070                 rte_errno = ENOENT;
2071                 ret = -rte_errno;
2072                 goto exit;
2073         }
2074         if (nd == 1) {
2075                 /*
2076                  * Found single matching device may have multiple ports.
2077                  * Each port may be representor, we have to check the port
2078                  * number and check the representors existence.
2079                  */
2080                 if (nl_rdma >= 0)
2081                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2082                 if (!np)
2083                         DRV_LOG(WARNING, "can not get IB device \"%s\""
2084                                          " ports number", ibv_match[0]->name);
2085                 if (bd >= 0 && !np) {
2086                         DRV_LOG(ERR, "can not get ports"
2087                                      " for bonding device");
2088                         rte_errno = ENOENT;
2089                         ret = -rte_errno;
2090                         goto exit;
2091                 }
2092         }
2093 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
2094         if (bd >= 0) {
2095                 /*
2096                  * This may happen if there is VF LAG kernel support and
2097                  * application is compiled with older rdma_core library.
2098                  */
2099                 DRV_LOG(ERR,
2100                         "No kernel/verbs support for VF LAG bonding found.");
2101                 rte_errno = ENOTSUP;
2102                 ret = -rte_errno;
2103                 goto exit;
2104         }
2105 #endif
2106         /*
2107          * Now we can determine the maximal
2108          * amount of devices to be spawned.
2109          */
2110         list = mlx5_malloc(MLX5_MEM_ZERO,
2111                            sizeof(struct mlx5_dev_spawn_data) *
2112                            (np ? np : nd),
2113                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
2114         if (!list) {
2115                 DRV_LOG(ERR, "spawn data array allocation failure");
2116                 rte_errno = ENOMEM;
2117                 ret = -rte_errno;
2118                 goto exit;
2119         }
2120         if (bd >= 0 || np > 1) {
2121                 /*
2122                  * Single IB device with multiple ports found,
2123                  * it may be E-Switch master device and representors.
2124                  * We have to perform identification through the ports.
2125                  */
2126                 MLX5_ASSERT(nl_rdma >= 0);
2127                 MLX5_ASSERT(ns == 0);
2128                 MLX5_ASSERT(nd == 1);
2129                 MLX5_ASSERT(np);
2130                 for (i = 1; i <= np; ++i) {
2131                         list[ns].bond_info = &bond_info;
2132                         list[ns].max_port = np;
2133                         list[ns].phys_port = i;
2134                         list[ns].phys_dev = ibv_match[0];
2135                         list[ns].eth_dev = NULL;
2136                         list[ns].pci_dev = pci_dev;
2137                         list[ns].pf_bond = bd;
2138                         list[ns].ifindex = mlx5_nl_ifindex
2139                                 (nl_rdma,
2140                                 mlx5_os_get_dev_device_name
2141                                                 (list[ns].phys_dev), i);
2142                         if (!list[ns].ifindex) {
2143                                 /*
2144                                  * No network interface index found for the
2145                                  * specified port, it means there is no
2146                                  * representor on this port. It's OK,
2147                                  * there can be disabled ports, for example
2148                                  * if sriov_numvfs < sriov_totalvfs.
2149                                  */
2150                                 continue;
2151                         }
2152                         ret = -1;
2153                         if (nl_route >= 0)
2154                                 ret = mlx5_nl_switch_info
2155                                                (nl_route,
2156                                                 list[ns].ifindex,
2157                                                 &list[ns].info);
2158                         if (ret || (!list[ns].info.representor &&
2159                                     !list[ns].info.master)) {
2160                                 /*
2161                                  * We failed to recognize representors with
2162                                  * Netlink, let's try to perform the task
2163                                  * with sysfs.
2164                                  */
2165                                 ret =  mlx5_sysfs_switch_info
2166                                                 (list[ns].ifindex,
2167                                                  &list[ns].info);
2168                         }
2169 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
2170                         if (!ret && bd >= 0) {
2171                                 switch (list[ns].info.name_type) {
2172                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2173                                         if (list[ns].info.port_name == bd)
2174                                                 ns++;
2175                                         break;
2176                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2177                                         /* Fallthrough */
2178                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2179                                         /* Fallthrough */
2180                                 case MLX5_PHYS_PORT_NAME_TYPE_PFSF:
2181                                         if (list[ns].info.pf_num == bd)
2182                                                 ns++;
2183                                         break;
2184                                 default:
2185                                         break;
2186                                 }
2187                                 continue;
2188                         }
2189 #endif
2190                         if (!ret && (list[ns].info.representor ^
2191                                      list[ns].info.master))
2192                                 ns++;
2193                 }
2194                 if (!ns) {
2195                         DRV_LOG(ERR,
2196                                 "unable to recognize master/representors"
2197                                 " on the IB device with multiple ports");
2198                         rte_errno = ENOENT;
2199                         ret = -rte_errno;
2200                         goto exit;
2201                 }
2202         } else {
2203                 /*
2204                  * The existence of several matching entries (nd > 1) means
2205                  * port representors have been instantiated. No existing Verbs
2206                  * call nor sysfs entries can tell them apart, this can only
2207                  * be done through Netlink calls assuming kernel drivers are
2208                  * recent enough to support them.
2209                  *
2210                  * In the event of identification failure through Netlink,
2211                  * try again through sysfs, then:
2212                  *
2213                  * 1. A single IB device matches (nd == 1) with single
2214                  *    port (np=0/1) and is not a representor, assume
2215                  *    no switch support.
2216                  *
2217                  * 2. Otherwise no safe assumptions can be made;
2218                  *    complain louder and bail out.
2219                  */
2220                 for (i = 0; i != nd; ++i) {
2221                         memset(&list[ns].info, 0, sizeof(list[ns].info));
2222                         list[ns].bond_info = NULL;
2223                         list[ns].max_port = 1;
2224                         list[ns].phys_port = 1;
2225                         list[ns].phys_dev = ibv_match[i];
2226                         list[ns].eth_dev = NULL;
2227                         list[ns].pci_dev = pci_dev;
2228                         list[ns].pf_bond = -1;
2229                         list[ns].ifindex = 0;
2230                         if (nl_rdma >= 0)
2231                                 list[ns].ifindex = mlx5_nl_ifindex
2232                                 (nl_rdma,
2233                                 mlx5_os_get_dev_device_name
2234                                                 (list[ns].phys_dev), 1);
2235                         if (!list[ns].ifindex) {
2236                                 char ifname[IF_NAMESIZE];
2237
2238                                 /*
2239                                  * Netlink failed, it may happen with old
2240                                  * ib_core kernel driver (before 4.16).
2241                                  * We can assume there is old driver because
2242                                  * here we are processing single ports IB
2243                                  * devices. Let's try sysfs to retrieve
2244                                  * the ifindex. The method works for
2245                                  * master device only.
2246                                  */
2247                                 if (nd > 1) {
2248                                         /*
2249                                          * Multiple devices found, assume
2250                                          * representors, can not distinguish
2251                                          * master/representor and retrieve
2252                                          * ifindex via sysfs.
2253                                          */
2254                                         continue;
2255                                 }
2256                                 ret = mlx5_get_ifname_sysfs
2257                                         (ibv_match[i]->ibdev_path, ifname);
2258                                 if (!ret)
2259                                         list[ns].ifindex =
2260                                                 if_nametoindex(ifname);
2261                                 if (!list[ns].ifindex) {
2262                                         /*
2263                                          * No network interface index found
2264                                          * for the specified device, it means
2265                                          * there it is neither representor
2266                                          * nor master.
2267                                          */
2268                                         continue;
2269                                 }
2270                         }
2271                         ret = -1;
2272                         if (nl_route >= 0)
2273                                 ret = mlx5_nl_switch_info
2274                                                (nl_route,
2275                                                 list[ns].ifindex,
2276                                                 &list[ns].info);
2277                         if (ret || (!list[ns].info.representor &&
2278                                     !list[ns].info.master)) {
2279                                 /*
2280                                  * We failed to recognize representors with
2281                                  * Netlink, let's try to perform the task
2282                                  * with sysfs.
2283                                  */
2284                                 ret =  mlx5_sysfs_switch_info
2285                                                 (list[ns].ifindex,
2286                                                  &list[ns].info);
2287                         }
2288                         if (!ret && (list[ns].info.representor ^
2289                                      list[ns].info.master)) {
2290                                 ns++;
2291                         } else if ((nd == 1) &&
2292                                    !list[ns].info.representor &&
2293                                    !list[ns].info.master) {
2294                                 /*
2295                                  * Single IB device with
2296                                  * one physical port and
2297                                  * attached network device.
2298                                  * May be SRIOV is not enabled
2299                                  * or there is no representors.
2300                                  */
2301                                 DRV_LOG(INFO, "no E-Switch support detected");
2302                                 ns++;
2303                                 break;
2304                         }
2305                 }
2306                 if (!ns) {
2307                         DRV_LOG(ERR,
2308                                 "unable to recognize master/representors"
2309                                 " on the multiple IB devices");
2310                         rte_errno = ENOENT;
2311                         ret = -rte_errno;
2312                         goto exit;
2313                 }
2314                 /*
2315                  * New kernels may add the switch_id attribute for the case
2316                  * there is no E-Switch and we wrongly recognized the
2317                  * only device as master. Override this if there is the
2318                  * single device with single port and new device name
2319                  * format present.
2320                  */
2321                 if (nd == 1 &&
2322                     list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
2323                         list[0].info.master = 0;
2324                         list[0].info.representor = 0;
2325                 }
2326         }
2327         MLX5_ASSERT(ns);
2328         /*
2329          * Sort list to probe devices in natural order for users convenience
2330          * (i.e. master first, then representors from lowest to highest ID).
2331          */
2332         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2333         /* Device specific configuration. */
2334         switch (pci_dev->id.device_id) {
2335         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2336         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2337         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2338         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2339         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2340         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2341         case PCI_DEVICE_ID_MELLANOX_CONNECTXVF:
2342                 dev_config_vf = 1;
2343                 break;
2344         default:
2345                 dev_config_vf = 0;
2346                 break;
2347         }
2348         if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) {
2349                 /* Set devargs default values. */
2350                 if (eth_da.nb_mh_controllers == 0) {
2351                         eth_da.nb_mh_controllers = 1;
2352                         eth_da.mh_controllers[0] = 0;
2353                 }
2354                 if (eth_da.nb_ports == 0 && ns > 0) {
2355                         if (list[0].pf_bond >= 0 && list[0].info.representor)
2356                                 DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s",
2357                                         pci_dev->device.devargs->args);
2358                         eth_da.nb_ports = 1;
2359                         eth_da.ports[0] = list[0].info.pf_num;
2360                 }
2361                 if (eth_da.nb_representor_ports == 0) {
2362                         eth_da.nb_representor_ports = 1;
2363                         eth_da.representor_ports[0] = 0;
2364                 }
2365         }
2366         for (i = 0; i != ns; ++i) {
2367                 uint32_t restore;
2368
2369                 /* Default configuration. */
2370                 memset(&dev_config, 0, sizeof(struct mlx5_dev_config));
2371                 dev_config.vf = dev_config_vf;
2372                 dev_config.mps = MLX5_ARG_UNSET;
2373                 dev_config.dbnc = MLX5_ARG_UNSET;
2374                 dev_config.rx_vec_en = 1;
2375                 dev_config.txq_inline_max = MLX5_ARG_UNSET;
2376                 dev_config.txq_inline_min = MLX5_ARG_UNSET;
2377                 dev_config.txq_inline_mpw = MLX5_ARG_UNSET;
2378                 dev_config.txqs_inline = MLX5_ARG_UNSET;
2379                 dev_config.vf_nl_en = 1;
2380                 dev_config.mr_ext_memseg_en = 1;
2381                 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
2382                 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
2383                 dev_config.dv_esw_en = 1;
2384                 dev_config.dv_flow_en = 1;
2385                 dev_config.decap_en = 1;
2386                 dev_config.log_hp_size = MLX5_ARG_UNSET;
2387                 dev_config.allow_duplicate_pattern = 1;
2388                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2389                                                  &list[i],
2390                                                  &dev_config,
2391                                                  &eth_da);
2392                 if (!list[i].eth_dev) {
2393                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2394                                 break;
2395                         /* Device is disabled or already spawned. Ignore it. */
2396                         continue;
2397                 }
2398                 restore = list[i].eth_dev->data->dev_flags;
2399                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2400                 /* Restore non-PCI flags cleared by the above call. */
2401                 list[i].eth_dev->data->dev_flags |= restore;
2402                 rte_eth_dev_probing_finish(list[i].eth_dev);
2403         }
2404         if (i != ns) {
2405                 DRV_LOG(ERR,
2406                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2407                         " encountering an error: %s",
2408                         owner_pci.domain, owner_pci.bus,
2409                         owner_pci.devid, owner_pci.function,
2410                         strerror(rte_errno));
2411                 ret = -rte_errno;
2412                 /* Roll back. */
2413                 while (i--) {
2414                         if (!list[i].eth_dev)
2415                                 continue;
2416                         mlx5_dev_close(list[i].eth_dev);
2417                         /* mac_addrs must not be freed because in dev_private */
2418                         list[i].eth_dev->data->mac_addrs = NULL;
2419                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2420                 }
2421                 /* Restore original error. */
2422                 rte_errno = -ret;
2423         } else {
2424                 ret = 0;
2425         }
2426 exit:
2427         /*
2428          * Do the routine cleanup:
2429          * - close opened Netlink sockets
2430          * - free allocated spawn data array
2431          * - free the Infiniband device list
2432          */
2433         if (nl_rdma >= 0)
2434                 close(nl_rdma);
2435         if (nl_route >= 0)
2436                 close(nl_route);
2437         if (list)
2438                 mlx5_free(list);
2439         MLX5_ASSERT(ibv_list);
2440         mlx5_glue->free_device_list(ibv_list);
2441         return ret;
2442 }
2443
2444 /**
2445  * DPDK callback to register a PCI device.
2446  *
2447  * This function spawns Ethernet devices out of a given PCI device.
2448  *
2449  * @param[in] pci_drv
2450  *   PCI driver structure (mlx5_driver).
2451  * @param[in] pci_dev
2452  *   PCI device information.
2453  *
2454  * @return
2455  *   0 on success, a negative errno value otherwise and rte_errno is set.
2456  */
2457 int
2458 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2459                   struct rte_pci_device *pci_dev)
2460 {
2461         struct rte_eth_devargs eth_da = { .type = RTE_ETH_REPRESENTOR_NONE };
2462         int ret = 0;
2463         uint16_t p;
2464
2465         if (pci_dev->device.devargs) {
2466                 /* Parse representor information from device argument. */
2467                 if (pci_dev->device.devargs->cls_str)
2468                         ret = rte_eth_devargs_parse
2469                                 (pci_dev->device.devargs->cls_str, &eth_da);
2470                 if (ret) {
2471                         DRV_LOG(ERR, "failed to parse device arguments: %s",
2472                                 pci_dev->device.devargs->cls_str);
2473                         return -rte_errno;
2474                 }
2475                 if (eth_da.type == RTE_ETH_REPRESENTOR_NONE) {
2476                         /* Support legacy device argument */
2477                         ret = rte_eth_devargs_parse
2478                                 (pci_dev->device.devargs->args, &eth_da);
2479                         if (ret) {
2480                                 DRV_LOG(ERR, "failed to parse device arguments: %s",
2481                                         pci_dev->device.devargs->args);
2482                                 return -rte_errno;
2483                         }
2484                 }
2485         }
2486
2487         if (eth_da.nb_ports > 0) {
2488                 /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */
2489                 for (p = 0; p < eth_da.nb_ports; p++)
2490                         ret = mlx5_os_pci_probe_pf(pci_dev, &eth_da,
2491                                                    eth_da.ports[p]);
2492         } else {
2493                 ret = mlx5_os_pci_probe_pf(pci_dev, &eth_da, 0);
2494         }
2495         return ret;
2496 }
2497
2498 static int
2499 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
2500 {
2501         char *env;
2502         int value;
2503
2504         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2505         /* Get environment variable to store. */
2506         env = getenv(MLX5_SHUT_UP_BF);
2507         value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
2508         if (config->dbnc == MLX5_ARG_UNSET)
2509                 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
2510         else
2511                 setenv(MLX5_SHUT_UP_BF,
2512                        config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
2513         return value;
2514 }
2515
2516 static void
2517 mlx5_restore_doorbell_mapping_env(int value)
2518 {
2519         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2520         /* Restore the original environment variable state. */
2521         if (value == MLX5_ARG_UNSET)
2522                 unsetenv(MLX5_SHUT_UP_BF);
2523         else
2524                 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
2525 }
2526
2527 /**
2528  * Extract pdn of PD object using DV API.
2529  *
2530  * @param[in] pd
2531  *   Pointer to the verbs PD object.
2532  * @param[out] pdn
2533  *   Pointer to the PD object number variable.
2534  *
2535  * @return
2536  *   0 on success, error value otherwise.
2537  */
2538 int
2539 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
2540 {
2541 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2542         struct mlx5dv_obj obj;
2543         struct mlx5dv_pd pd_info;
2544         int ret = 0;
2545
2546         obj.pd.in = pd;
2547         obj.pd.out = &pd_info;
2548         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
2549         if (ret) {
2550                 DRV_LOG(DEBUG, "Fail to get PD object info");
2551                 return ret;
2552         }
2553         *pdn = pd_info.pdn;
2554         return 0;
2555 #else
2556         (void)pd;
2557         (void)pdn;
2558         return -ENOTSUP;
2559 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
2560 }
2561
2562 /**
2563  * Function API to open IB device.
2564  *
2565  * This function calls the Linux glue APIs to open a device.
2566  *
2567  * @param[in] spawn
2568  *   Pointer to the IB device attributes (name, port, etc).
2569  * @param[out] config
2570  *   Pointer to device configuration structure.
2571  * @param[out] sh
2572  *   Pointer to shared context structure.
2573  *
2574  * @return
2575  *   0 on success, a positive error value otherwise.
2576  */
2577 int
2578 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
2579                      const struct mlx5_dev_config *config,
2580                      struct mlx5_dev_ctx_shared *sh)
2581 {
2582         int dbmap_env;
2583         int err = 0;
2584
2585         sh->numa_node = spawn->pci_dev->device.numa_node;
2586         pthread_mutex_init(&sh->txpp.mutex, NULL);
2587         /*
2588          * Configure environment variable "MLX5_BF_SHUT_UP"
2589          * before the device creation. The rdma_core library
2590          * checks the variable at device creation and
2591          * stores the result internally.
2592          */
2593         dbmap_env = mlx5_config_doorbell_mapping_env(config);
2594         /* Try to open IB device with DV first, then usual Verbs. */
2595         errno = 0;
2596         sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
2597         if (sh->ctx) {
2598                 sh->devx = 1;
2599                 DRV_LOG(DEBUG, "DevX is supported");
2600                 /* The device is created, no need for environment. */
2601                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2602         } else {
2603                 /* The environment variable is still configured. */
2604                 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
2605                 err = errno ? errno : ENODEV;
2606                 /*
2607                  * The environment variable is not needed anymore,
2608                  * all device creation attempts are completed.
2609                  */
2610                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2611                 if (!sh->ctx)
2612                         return err;
2613                 DRV_LOG(DEBUG, "DevX is NOT supported");
2614                 err = 0;
2615         }
2616         if (!err && sh->ctx) {
2617                 /* Hint libmlx5 to use PMD allocator for data plane resources */
2618                 mlx5_glue->dv_set_context_attr(sh->ctx,
2619                         MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
2620                         (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
2621                                 .alloc = &mlx5_alloc_verbs_buf,
2622                                 .free = &mlx5_free_verbs_buf,
2623                                 .data = sh,
2624                         }));
2625         }
2626         return err;
2627 }
2628
2629 /**
2630  * Install shared asynchronous device events handler.
2631  * This function is implemented to support event sharing
2632  * between multiple ports of single IB device.
2633  *
2634  * @param sh
2635  *   Pointer to mlx5_dev_ctx_shared object.
2636  */
2637 void
2638 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2639 {
2640         int ret;
2641         int flags;
2642
2643         sh->intr_handle.fd = -1;
2644         flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
2645         ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
2646                     F_SETFL, flags | O_NONBLOCK);
2647         if (ret) {
2648                 DRV_LOG(INFO, "failed to change file descriptor async event"
2649                         " queue");
2650         } else {
2651                 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
2652                 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2653                 if (rte_intr_callback_register(&sh->intr_handle,
2654                                         mlx5_dev_interrupt_handler, sh)) {
2655                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2656                         sh->intr_handle.fd = -1;
2657                 }
2658         }
2659         if (sh->devx) {
2660 #ifdef HAVE_IBV_DEVX_ASYNC
2661                 sh->intr_handle_devx.fd = -1;
2662                 sh->devx_comp =
2663                         (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
2664                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2665                 if (!devx_comp) {
2666                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2667                         return;
2668                 }
2669                 flags = fcntl(devx_comp->fd, F_GETFL);
2670                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2671                 if (ret) {
2672                         DRV_LOG(INFO, "failed to change file descriptor"
2673                                 " devx comp");
2674                         return;
2675                 }
2676                 sh->intr_handle_devx.fd = devx_comp->fd;
2677                 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2678                 if (rte_intr_callback_register(&sh->intr_handle_devx,
2679                                         mlx5_dev_interrupt_handler_devx, sh)) {
2680                         DRV_LOG(INFO, "Fail to install the devx shared"
2681                                 " interrupt.");
2682                         sh->intr_handle_devx.fd = -1;
2683                 }
2684 #endif /* HAVE_IBV_DEVX_ASYNC */
2685         }
2686 }
2687
2688 /**
2689  * Uninstall shared asynchronous device events handler.
2690  * This function is implemented to support event sharing
2691  * between multiple ports of single IB device.
2692  *
2693  * @param dev
2694  *   Pointer to mlx5_dev_ctx_shared object.
2695  */
2696 void
2697 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2698 {
2699         if (sh->intr_handle.fd >= 0)
2700                 mlx5_intr_callback_unregister(&sh->intr_handle,
2701                                               mlx5_dev_interrupt_handler, sh);
2702 #ifdef HAVE_IBV_DEVX_ASYNC
2703         if (sh->intr_handle_devx.fd >= 0)
2704                 rte_intr_callback_unregister(&sh->intr_handle_devx,
2705                                   mlx5_dev_interrupt_handler_devx, sh);
2706         if (sh->devx_comp)
2707                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2708 #endif
2709 }
2710
2711 /**
2712  * Read statistics by a named counter.
2713  *
2714  * @param[in] priv
2715  *   Pointer to the private device data structure.
2716  * @param[in] ctr_name
2717  *   Pointer to the name of the statistic counter to read
2718  * @param[out] stat
2719  *   Pointer to read statistic value.
2720  * @return
2721  *   0 on success and stat is valud, 1 if failed to read the value
2722  *   rte_errno is set.
2723  *
2724  */
2725 int
2726 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2727                       uint64_t *stat)
2728 {
2729         int fd;
2730
2731         if (priv->sh) {
2732                 if (priv->q_counters != NULL &&
2733                     strcmp(ctr_name, "out_of_buffer") == 0)
2734                         return mlx5_devx_cmd_queue_counter_query
2735                                         (priv->q_counters, 0, (uint32_t *)stat);
2736                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2737                       priv->sh->ibdev_path,
2738                       priv->dev_port,
2739                       ctr_name);
2740                 fd = open(path, O_RDONLY);
2741                 /*
2742                  * in switchdev the file location is not per port
2743                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2744                  */
2745                 if (fd == -1) {
2746                         MKSTR(path1, "%s/hw_counters/%s",
2747                               priv->sh->ibdev_path,
2748                               ctr_name);
2749                         fd = open(path1, O_RDONLY);
2750                 }
2751                 if (fd != -1) {
2752                         char buf[21] = {'\0'};
2753                         ssize_t n = read(fd, buf, sizeof(buf));
2754
2755                         close(fd);
2756                         if (n != -1) {
2757                                 *stat = strtoull(buf, NULL, 10);
2758                                 return 0;
2759                         }
2760                 }
2761         }
2762         *stat = 0;
2763         return 1;
2764 }
2765
2766 /**
2767  * Set the reg_mr and dereg_mr call backs
2768  *
2769  * @param reg_mr_cb[out]
2770  *   Pointer to reg_mr func
2771  * @param dereg_mr_cb[out]
2772  *   Pointer to dereg_mr func
2773  *
2774  */
2775 void
2776 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2777                       mlx5_dereg_mr_t *dereg_mr_cb)
2778 {
2779         *reg_mr_cb = mlx5_mr_verbs_ops.reg_mr;
2780         *dereg_mr_cb = mlx5_mr_verbs_ops.dereg_mr;
2781 }
2782
2783 /**
2784  * Remove a MAC address from device
2785  *
2786  * @param dev
2787  *   Pointer to Ethernet device structure.
2788  * @param index
2789  *   MAC address index.
2790  */
2791 void
2792 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2793 {
2794         struct mlx5_priv *priv = dev->data->dev_private;
2795         const int vf = priv->config.vf;
2796
2797         if (vf)
2798                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2799                                         mlx5_ifindex(dev), priv->mac_own,
2800                                         &dev->data->mac_addrs[index], index);
2801 }
2802
2803 /**
2804  * Adds a MAC address to the device
2805  *
2806  * @param dev
2807  *   Pointer to Ethernet device structure.
2808  * @param mac_addr
2809  *   MAC address to register.
2810  * @param index
2811  *   MAC address index.
2812  *
2813  * @return
2814  *   0 on success, a negative errno value otherwise
2815  */
2816 int
2817 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2818                      uint32_t index)
2819 {
2820         struct mlx5_priv *priv = dev->data->dev_private;
2821         const int vf = priv->config.vf;
2822         int ret = 0;
2823
2824         if (vf)
2825                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2826                                            mlx5_ifindex(dev), priv->mac_own,
2827                                            mac, index);
2828         return ret;
2829 }
2830
2831 /**
2832  * Modify a VF MAC address
2833  *
2834  * @param priv
2835  *   Pointer to device private data.
2836  * @param mac_addr
2837  *   MAC address to modify into.
2838  * @param iface_idx
2839  *   Net device interface index
2840  * @param vf_index
2841  *   VF index
2842  *
2843  * @return
2844  *   0 on success, a negative errno value otherwise
2845  */
2846 int
2847 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2848                            unsigned int iface_idx,
2849                            struct rte_ether_addr *mac_addr,
2850                            int vf_index)
2851 {
2852         return mlx5_nl_vf_mac_addr_modify
2853                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2854 }
2855
2856 /**
2857  * Set device promiscuous mode
2858  *
2859  * @param dev
2860  *   Pointer to Ethernet device structure.
2861  * @param enable
2862  *   0 - promiscuous is disabled, otherwise - enabled
2863  *
2864  * @return
2865  *   0 on success, a negative error value otherwise
2866  */
2867 int
2868 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2869 {
2870         struct mlx5_priv *priv = dev->data->dev_private;
2871
2872         return mlx5_nl_promisc(priv->nl_socket_route,
2873                                mlx5_ifindex(dev), !!enable);
2874 }
2875
2876 /**
2877  * Set device promiscuous mode
2878  *
2879  * @param dev
2880  *   Pointer to Ethernet device structure.
2881  * @param enable
2882  *   0 - all multicase is disabled, otherwise - enabled
2883  *
2884  * @return
2885  *   0 on success, a negative error value otherwise
2886  */
2887 int
2888 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2889 {
2890         struct mlx5_priv *priv = dev->data->dev_private;
2891
2892         return mlx5_nl_allmulti(priv->nl_socket_route,
2893                                 mlx5_ifindex(dev), !!enable);
2894 }
2895
2896 /**
2897  * Flush device MAC addresses
2898  *
2899  * @param dev
2900  *   Pointer to Ethernet device structure.
2901  *
2902  */
2903 void
2904 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2905 {
2906         struct mlx5_priv *priv = dev->data->dev_private;
2907
2908         mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2909                                dev->data->mac_addrs,
2910                                MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2911 }