drivers/net/mlx5/linux/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2020 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12 #include <net/if.h>
  13 #include <linux/rtnetlink.h>
  14 #include <linux/sockios.h>
  15 #include <linux/ethtool.h>
  16 #include <fcntl.h>
  17
  18 #include <rte_malloc.h>
  19 #include <rte_ethdev_driver.h>
  20 #include <rte_ethdev_pci.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_common.h>
  24 #include <rte_kvargs.h>
  25 #include <rte_rwlock.h>
  26 #include <rte_spinlock.h>
  27 #include <rte_string_fns.h>
  28 #include <rte_alarm.h>
  29 #include <rte_eal_paging.h>
  30
  31 #include <mlx5_glue.h>
  32 #include <mlx5_devx_cmds.h>
  33 #include <mlx5_common.h>
  34 #include <mlx5_common_mp.h>
  35 #include <mlx5_common_mr.h>
  36 #include <mlx5_malloc.h>
  37
  38 #include "mlx5_defs.h"
  39 #include "mlx5.h"
  40 #include "mlx5_common_os.h"
  41 #include "mlx5_utils.h"
  42 #include "mlx5_rxtx.h"
  43 #include "mlx5_autoconf.h"
  44 #include "mlx5_mr.h"
  45 #include "mlx5_flow.h"
  46 #include "rte_pmd_mlx5.h"
  47 #include "mlx5_verbs.h"
  48 #include "mlx5_nl.h"
  49 #include "mlx5_devx.h"
  50
  51 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
  52
  53 #ifndef HAVE_IBV_MLX5_MOD_MPW
  54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
  55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
  56 #endif
  57
  58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
  59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
  60 #endif
  61
  62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  63
  64 /* Spinlock for mlx5_shared_data allocation. */
  65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  66
  67 /* Process local data for secondary processes. */
  68 static struct mlx5_local_data mlx5_local_data;
  69
  70 /**
  71  * Set the completion channel file descriptor interrupt as non-blocking.
  72  *
  73  * @param[in] rxq_obj
  74  *   Pointer to RQ channel object, which includes the channel fd
  75  *
  76  * @param[out] fd
  77  *   The file descriptor (representing the intetrrupt) used in this channel.
  78  *
  79  * @return
  80  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
  81  */
  82 int
  83 mlx5_os_set_nonblock_channel_fd(int fd)
  84 {
  85         int flags;
  86
  87         flags = fcntl(fd, F_GETFL);
  88         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
  89 }
  90
  91 /**
  92  * Get mlx5 device attributes. The glue function query_device_ex() is called
  93  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
  94  * device attributes from the glue out parameter.
  95  *
  96  * @param dev
  97  *   Pointer to ibv context.
  98  *
  99  * @param device_attr
 100  *   Pointer to mlx5 device attributes.
 101  *
 102  * @return
 103  *   0 on success, non zero error number otherwise
 104  */
 105 int
 106 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
 107 {
 108         int err;
 109         struct ibv_device_attr_ex attr_ex;
 110         memset(device_attr, 0, sizeof(*device_attr));
 111         err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
 112         if (err)
 113                 return err;
 114
 115         device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
 116         device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
 117         device_attr->max_sge = attr_ex.orig_attr.max_sge;
 118         device_attr->max_cq = attr_ex.orig_attr.max_cq;
 119         device_attr->max_qp = attr_ex.orig_attr.max_qp;
 120         device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
 121         device_attr->max_rwq_indirection_table_size =
 122                 attr_ex.rss_caps.max_rwq_indirection_table_size;
 123         device_attr->max_tso = attr_ex.tso_caps.max_tso;
 124         device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
 125
 126         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 127         err = mlx5_glue->dv_query_device(ctx, &dv_attr);
 128         if (err)
 129                 return err;
 130
 131         device_attr->flags = dv_attr.flags;
 132         device_attr->comp_mask = dv_attr.comp_mask;
 133 #ifdef HAVE_IBV_MLX5_MOD_SWP
 134         device_attr->sw_parsing_offloads =
 135                 dv_attr.sw_parsing_caps.sw_parsing_offloads;
 136 #endif
 137         device_attr->min_single_stride_log_num_of_bytes =
 138                 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
 139         device_attr->max_single_stride_log_num_of_bytes =
 140                 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
 141         device_attr->min_single_wqe_log_num_of_strides =
 142                 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
 143         device_attr->max_single_wqe_log_num_of_strides =
 144                 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
 145         device_attr->stride_supported_qpts =
 146                 dv_attr.striding_rq_caps.supported_qpts;
 147 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 148         device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
 149 #endif
 150
 151         return err;
 152 }
 153
 154 /**
 155  * Verbs callback to allocate a memory. This function should allocate the space
 156  * according to the size provided residing inside a huge page.
 157  * Please note that all allocation must respect the alignment from libmlx5
 158  * (i.e. currently rte_mem_page_size()).
 159  *
 160  * @param[in] size
 161  *   The size in bytes of the memory to allocate.
 162  * @param[in] data
 163  *   A pointer to the callback data.
 164  *
 165  * @return
 166  *   Allocated buffer, NULL otherwise and rte_errno is set.
 167  */
 168 static void *
 169 mlx5_alloc_verbs_buf(size_t size, void *data)
 170 {
 171         struct mlx5_priv *priv = data;
 172         void *ret;
 173         unsigned int socket = SOCKET_ID_ANY;
 174         size_t alignment = rte_mem_page_size();
 175         if (alignment == (size_t)-1) {
 176                 DRV_LOG(ERR, "Failed to get mem page size");
 177                 rte_errno = ENOMEM;
 178                 return NULL;
 179         }
 180
 181         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
 182                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 183
 184                 socket = ctrl->socket;
 185         } else if (priv->verbs_alloc_ctx.type ==
 186                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
 187                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 188
 189                 socket = ctrl->socket;
 190         }
 191         MLX5_ASSERT(data != NULL);
 192         ret = mlx5_malloc(0, size, alignment, socket);
 193         if (!ret && size)
 194                 rte_errno = ENOMEM;
 195         return ret;
 196 }
 197
 198 /**
 199  * Verbs callback to free a memory.
 200  *
 201  * @param[in] ptr
 202  *   A pointer to the memory to free.
 203  * @param[in] data
 204  *   A pointer to the callback data.
 205  */
 206 static void
 207 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 208 {
 209         MLX5_ASSERT(data != NULL);
 210         mlx5_free(ptr);
 211 }
 212
 213 /**
 214  * Initialize DR related data within private structure.
 215  * Routine checks the reference counter and does actual
 216  * resources creation/initialization only if counter is zero.
 217  *
 218  * @param[in] priv
 219  *   Pointer to the private device data structure.
 220  *
 221  * @return
 222  *   Zero on success, positive error code otherwise.
 223  */
 224 static int
 225 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 226 {
 227         struct mlx5_dev_ctx_shared *sh = priv->sh;
 228         char s[MLX5_HLIST_NAMESIZE];
 229         int err;
 230
 231         MLX5_ASSERT(sh && sh->refcnt);
 232         if (sh->refcnt > 1)
 233                 return 0;
 234         err = mlx5_alloc_table_hash_list(priv);
 235         if (err)
 236                 return err;
 237         /* Create tags hash list table. */
 238         snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name);
 239         sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE, 0,
 240                                           0, NULL, NULL, NULL);
 241         if (!sh->tag_table) {
 242                 DRV_LOG(ERR, "tags with hash creation failed.");
 243                 err = ENOMEM;
 244                 goto error;
 245         }
 246         snprintf(s, sizeof(s), "%s_hdr_modify", sh->ibdev_name);
 247         sh->modify_cmds = mlx5_hlist_create(s, MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
 248                                             0, 0, NULL, NULL, NULL);
 249         if (!sh->modify_cmds) {
 250                 DRV_LOG(ERR, "hdr modify hash creation failed");
 251                 err = ENOMEM;
 252                 goto error;
 253         }
 254         snprintf(s, sizeof(s), "%s_encaps_decaps", sh->ibdev_name);
 255         sh->encaps_decaps = mlx5_hlist_create(s,
 256                                               MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
 257                                               0, 0, NULL, NULL, NULL);
 258         if (!sh->encaps_decaps) {
 259                 DRV_LOG(ERR, "encap decap hash creation failed");
 260                 err = ENOMEM;
 261                 goto error;
 262         }
 263 #ifdef HAVE_MLX5DV_DR
 264         void *domain;
 265
 266         /* Reference counter is zero, we should initialize structures. */
 267         domain = mlx5_glue->dr_create_domain(sh->ctx,
 268                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 269         if (!domain) {
 270                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 271                 err = errno;
 272                 goto error;
 273         }
 274         sh->rx_domain = domain;
 275         domain = mlx5_glue->dr_create_domain(sh->ctx,
 276                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 277         if (!domain) {
 278                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 279                 err = errno;
 280                 goto error;
 281         }
 282         pthread_mutex_init(&sh->dv_mutex, NULL);
 283         sh->tx_domain = domain;
 284 #ifdef HAVE_MLX5DV_DR_ESWITCH
 285         if (priv->config.dv_esw_en) {
 286                 domain  = mlx5_glue->dr_create_domain
 287                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 288                 if (!domain) {
 289                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 290                         err = errno;
 291                         goto error;
 292                 }
 293                 sh->fdb_domain = domain;
 294                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 295         }
 296 #endif
 297         if (!sh->tunnel_hub)
 298                 err = mlx5_alloc_tunnel_hub(sh);
 299         if (err) {
 300                 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
 301                 goto error;
 302         }
 303         if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
 304                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
 305                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
 306                 if (sh->fdb_domain)
 307                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
 308         }
 309         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 310 #endif /* HAVE_MLX5DV_DR */
 311         sh->default_miss_action =
 312                         mlx5_glue->dr_create_flow_action_default_miss();
 313         if (!sh->default_miss_action)
 314                 DRV_LOG(WARNING, "Default miss action is not supported.");
 315         return 0;
 316 error:
 317         /* Rollback the created objects. */
 318         if (sh->rx_domain) {
 319                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 320                 sh->rx_domain = NULL;
 321         }
 322         if (sh->tx_domain) {
 323                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 324                 sh->tx_domain = NULL;
 325         }
 326         if (sh->fdb_domain) {
 327                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 328                 sh->fdb_domain = NULL;
 329         }
 330         if (sh->esw_drop_action) {
 331                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 332                 sh->esw_drop_action = NULL;
 333         }
 334         if (sh->pop_vlan_action) {
 335                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 336                 sh->pop_vlan_action = NULL;
 337         }
 338         if (sh->encaps_decaps) {
 339                 mlx5_hlist_destroy(sh->encaps_decaps);
 340                 sh->encaps_decaps = NULL;
 341         }
 342         if (sh->modify_cmds) {
 343                 mlx5_hlist_destroy(sh->modify_cmds);
 344                 sh->modify_cmds = NULL;
 345         }
 346         if (sh->tag_table) {
 347                 /* tags should be destroyed with flow before. */
 348                 mlx5_hlist_destroy(sh->tag_table);
 349                 sh->tag_table = NULL;
 350         }
 351         if (sh->tunnel_hub) {
 352                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 353                 sh->tunnel_hub = NULL;
 354         }
 355         mlx5_free_table_hash_list(priv);
 356         return err;
 357 }
 358
 359 /**
 360  * Destroy DR related data within private structure.
 361  *
 362  * @param[in] priv
 363  *   Pointer to the private device data structure.
 364  */
 365 void
 366 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 367 {
 368         struct mlx5_dev_ctx_shared *sh = priv->sh;
 369
 370         MLX5_ASSERT(sh && sh->refcnt);
 371         if (sh->refcnt > 1)
 372                 return;
 373 #ifdef HAVE_MLX5DV_DR
 374         if (sh->rx_domain) {
 375                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 376                 sh->rx_domain = NULL;
 377         }
 378         if (sh->tx_domain) {
 379                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 380                 sh->tx_domain = NULL;
 381         }
 382 #ifdef HAVE_MLX5DV_DR_ESWITCH
 383         if (sh->fdb_domain) {
 384                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 385                 sh->fdb_domain = NULL;
 386         }
 387         if (sh->esw_drop_action) {
 388                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 389                 sh->esw_drop_action = NULL;
 390         }
 391 #endif
 392         if (sh->pop_vlan_action) {
 393                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 394                 sh->pop_vlan_action = NULL;
 395         }
 396         pthread_mutex_destroy(&sh->dv_mutex);
 397 #endif /* HAVE_MLX5DV_DR */
 398         if (sh->default_miss_action)
 399                 mlx5_glue->destroy_flow_action
 400                                 (sh->default_miss_action);
 401         if (sh->encaps_decaps) {
 402                 mlx5_hlist_destroy(sh->encaps_decaps);
 403                 sh->encaps_decaps = NULL;
 404         }
 405         if (sh->modify_cmds) {
 406                 mlx5_hlist_destroy(sh->modify_cmds);
 407                 sh->modify_cmds = NULL;
 408         }
 409         if (sh->tag_table) {
 410                 /* tags should be destroyed with flow before. */
 411                 mlx5_hlist_destroy(sh->tag_table);
 412                 sh->tag_table = NULL;
 413         }
 414         if (sh->tunnel_hub) {
 415                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 416                 sh->tunnel_hub = NULL;
 417         }
 418         mlx5_free_table_hash_list(priv);
 419 }
 420
 421 /**
 422  * Initialize shared data between primary and secondary process.
 423  *
 424  * A memzone is reserved by primary process and secondary processes attach to
 425  * the memzone.
 426  *
 427  * @return
 428  *   0 on success, a negative errno value otherwise and rte_errno is set.
 429  */
 430 static int
 431 mlx5_init_shared_data(void)
 432 {
 433         const struct rte_memzone *mz;
 434         int ret = 0;
 435
 436         rte_spinlock_lock(&mlx5_shared_data_lock);
 437         if (mlx5_shared_data == NULL) {
 438                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 439                         /* Allocate shared memory. */
 440                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 441                                                  sizeof(*mlx5_shared_data),
 442                                                  SOCKET_ID_ANY, 0);
 443                         if (mz == NULL) {
 444                                 DRV_LOG(ERR,
 445                                         "Cannot allocate mlx5 shared data");
 446                                 ret = -rte_errno;
 447                                 goto error;
 448                         }
 449                         mlx5_shared_data = mz->addr;
 450                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 451                         rte_spinlock_init(&mlx5_shared_data->lock);
 452                 } else {
 453                         /* Lookup allocated shared memory. */
 454                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 455                         if (mz == NULL) {
 456                                 DRV_LOG(ERR,
 457                                         "Cannot attach mlx5 shared data");
 458                                 ret = -rte_errno;
 459                                 goto error;
 460                         }
 461                         mlx5_shared_data = mz->addr;
 462                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 463                 }
 464         }
 465 error:
 466         rte_spinlock_unlock(&mlx5_shared_data_lock);
 467         return ret;
 468 }
 469
 470 /**
 471  * PMD global initialization.
 472  *
 473  * Independent from individual device, this function initializes global
 474  * per-PMD data structures distinguishing primary and secondary processes.
 475  * Hence, each initialization is called once per a process.
 476  *
 477  * @return
 478  *   0 on success, a negative errno value otherwise and rte_errno is set.
 479  */
 480 static int
 481 mlx5_init_once(void)
 482 {
 483         struct mlx5_shared_data *sd;
 484         struct mlx5_local_data *ld = &mlx5_local_data;
 485         int ret = 0;
 486
 487         if (mlx5_init_shared_data())
 488                 return -rte_errno;
 489         sd = mlx5_shared_data;
 490         MLX5_ASSERT(sd);
 491         rte_spinlock_lock(&sd->lock);
 492         switch (rte_eal_process_type()) {
 493         case RTE_PROC_PRIMARY:
 494                 if (sd->init_done)
 495                         break;
 496                 LIST_INIT(&sd->mem_event_cb_list);
 497                 rte_rwlock_init(&sd->mem_event_rwlock);
 498                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
 499                                                 mlx5_mr_mem_event_cb, NULL);
 500                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
 501                                            mlx5_mp_os_primary_handle);
 502                 if (ret)
 503                         goto out;
 504                 sd->init_done = true;
 505                 break;
 506         case RTE_PROC_SECONDARY:
 507                 if (ld->init_done)
 508                         break;
 509                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
 510                                              mlx5_mp_os_secondary_handle);
 511                 if (ret)
 512                         goto out;
 513                 ++sd->secondary_cnt;
 514                 ld->init_done = true;
 515                 break;
 516         default:
 517                 break;
 518         }
 519 out:
 520         rte_spinlock_unlock(&sd->lock);
 521         return ret;
 522 }
 523
 524 /**
 525  * Create the Tx queue DevX/Verbs object.
 526  *
 527  * @param dev
 528  *   Pointer to Ethernet device.
 529  * @param idx
 530  *   Queue index in DPDK Tx queue array.
 531  *
 532  * @return
 533  *   0 on success, a negative errno value otherwise and rte_errno is set.
 534  */
 535 static int
 536 mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
 537 {
 538         struct mlx5_priv *priv = dev->data->dev_private;
 539         struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
 540         struct mlx5_txq_ctrl *txq_ctrl =
 541                         container_of(txq_data, struct mlx5_txq_ctrl, txq);
 542
 543         if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
 544                 return mlx5_txq_devx_obj_new(dev, idx);
 545 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 546         if (!priv->config.dv_esw_en)
 547                 return mlx5_txq_devx_obj_new(dev, idx);
 548 #endif
 549         return mlx5_txq_ibv_obj_new(dev, idx);
 550 }
 551
 552 /**
 553  * Release an Tx DevX/verbs queue object.
 554  *
 555  * @param txq_obj
 556  *   DevX/Verbs Tx queue object.
 557  */
 558 static void
 559 mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)
 560 {
 561         if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
 562                 mlx5_txq_devx_obj_release(txq_obj);
 563                 return;
 564         }
 565 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 566         if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) {
 567                 mlx5_txq_devx_obj_release(txq_obj);
 568                 return;
 569         }
 570 #endif
 571         mlx5_txq_ibv_obj_release(txq_obj);
 572 }
 573
 574 /**
 575  * DV flow counter mode detect and config.
 576  *
 577  * @param dev
 578  *   Pointer to rte_eth_dev structure.
 579  *
 580  */
 581 static void
 582 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
 583 {
 584 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 585         struct mlx5_priv *priv = dev->data->dev_private;
 586         struct mlx5_dev_ctx_shared *sh = priv->sh;
 587         bool fallback;
 588
 589 #ifndef HAVE_IBV_DEVX_ASYNC
 590         fallback = true;
 591 #else
 592         fallback = false;
 593         if (!priv->config.devx || !priv->config.dv_flow_en ||
 594             !priv->config.hca_attr.flow_counters_dump ||
 595             !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
 596             (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
 597                 fallback = true;
 598 #endif
 599         if (fallback)
 600                 DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
 601                         "counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
 602                         priv->config.hca_attr.flow_counters_dump,
 603                         priv->config.hca_attr.flow_counter_bulk_alloc_bitmap);
 604         /* Initialize fallback mode only on the port initializes sh. */
 605         if (sh->refcnt == 1)
 606                 sh->cmng.counter_fallback = fallback;
 607         else if (fallback != sh->cmng.counter_fallback)
 608                 DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
 609                         "with others:%d.", PORT_ID(priv), fallback);
 610 #endif
 611 }
 612
 613 /**
 614  * Spawn an Ethernet device from Verbs information.
 615  *
 616  * @param dpdk_dev
 617  *   Backing DPDK device.
 618  * @param spawn
 619  *   Verbs device parameters (name, port, switch_info) to spawn.
 620  * @param config
 621  *   Device configuration parameters.
 622  *
 623  * @return
 624  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 625  *   is set. The following errors are defined:
 626  *
 627  *   EBUSY: device is not supposed to be spawned.
 628  *   EEXIST: device is already spawned
 629  */
 630 static struct rte_eth_dev *
 631 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 632                struct mlx5_dev_spawn_data *spawn,
 633                struct mlx5_dev_config *config)
 634 {
 635         const struct mlx5_switch_info *switch_info = &spawn->info;
 636         struct mlx5_dev_ctx_shared *sh = NULL;
 637         struct ibv_port_attr port_attr;
 638         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 639         struct rte_eth_dev *eth_dev = NULL;
 640         struct mlx5_priv *priv = NULL;
 641         int err = 0;
 642         unsigned int hw_padding = 0;
 643         unsigned int mps;
 644         unsigned int cqe_comp;
 645         unsigned int cqe_pad = 0;
 646         unsigned int tunnel_en = 0;
 647         unsigned int mpls_en = 0;
 648         unsigned int swp = 0;
 649         unsigned int mprq = 0;
 650         unsigned int mprq_min_stride_size_n = 0;
 651         unsigned int mprq_max_stride_size_n = 0;
 652         unsigned int mprq_min_stride_num_n = 0;
 653         unsigned int mprq_max_stride_num_n = 0;
 654         struct rte_ether_addr mac;
 655         char name[RTE_ETH_NAME_MAX_LEN];
 656         int own_domain_id = 0;
 657         uint16_t port_id;
 658         unsigned int i;
 659 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 660         struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
 661 #endif
 662
 663         /* Determine if this port representor is supposed to be spawned. */
 664         if (switch_info->representor && dpdk_dev->devargs) {
 665                 struct rte_eth_devargs eth_da;
 666
 667                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
 668                 if (err) {
 669                         rte_errno = -err;
 670                         DRV_LOG(ERR, "failed to process device arguments: %s",
 671                                 strerror(rte_errno));
 672                         return NULL;
 673                 }
 674                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
 675                         if (eth_da.representor_ports[i] ==
 676                             (uint16_t)switch_info->port_name)
 677                                 break;
 678                 if (i == eth_da.nb_representor_ports) {
 679                         rte_errno = EBUSY;
 680                         return NULL;
 681                 }
 682         }
 683         /* Build device name. */
 684         if (spawn->pf_bond <  0) {
 685                 /* Single device. */
 686                 if (!switch_info->representor)
 687                         strlcpy(name, dpdk_dev->name, sizeof(name));
 688                 else
 689                         snprintf(name, sizeof(name), "%s_representor_%u",
 690                                  dpdk_dev->name, switch_info->port_name);
 691         } else {
 692                 /* Bonding device. */
 693                 if (!switch_info->representor)
 694                         snprintf(name, sizeof(name), "%s_%s",
 695                                  dpdk_dev->name,
 696                                  mlx5_os_get_dev_device_name(spawn->phys_dev));
 697                 else
 698                         snprintf(name, sizeof(name), "%s_%s_representor_%u",
 699                                  dpdk_dev->name,
 700                                  mlx5_os_get_dev_device_name(spawn->phys_dev),
 701                                  switch_info->port_name);
 702         }
 703         /* check if the device is already spawned */
 704         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 705                 rte_errno = EEXIST;
 706                 return NULL;
 707         }
 708         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 709         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 710                 struct mlx5_mp_id mp_id;
 711
 712                 eth_dev = rte_eth_dev_attach_secondary(name);
 713                 if (eth_dev == NULL) {
 714                         DRV_LOG(ERR, "can not attach rte ethdev");
 715                         rte_errno = ENOMEM;
 716                         return NULL;
 717                 }
 718                 eth_dev->device = dpdk_dev;
 719                 eth_dev->dev_ops = &mlx5_os_dev_sec_ops;
 720                 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
 721                 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
 722                 err = mlx5_proc_priv_init(eth_dev);
 723                 if (err)
 724                         return NULL;
 725                 mp_id.port_id = eth_dev->data->port_id;
 726                 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 727                 /* Receive command fd from primary process */
 728                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
 729                 if (err < 0)
 730                         goto err_secondary;
 731                 /* Remap UAR for Tx queues. */
 732                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
 733                 if (err)
 734                         goto err_secondary;
 735                 /*
 736                  * Ethdev pointer is still required as input since
 737                  * the primary device is not accessible from the
 738                  * secondary process.
 739                  */
 740                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
 741                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
 742                 return eth_dev;
 743 err_secondary:
 744                 mlx5_dev_close(eth_dev);
 745                 return NULL;
 746         }
 747         /*
 748          * Some parameters ("tx_db_nc" in particularly) are needed in
 749          * advance to create dv/verbs device context. We proceed the
 750          * devargs here to get ones, and later proceed devargs again
 751          * to override some hardware settings.
 752          */
 753         err = mlx5_args(config, dpdk_dev->devargs);
 754         if (err) {
 755                 err = rte_errno;
 756                 DRV_LOG(ERR, "failed to process device arguments: %s",
 757                         strerror(rte_errno));
 758                 goto error;
 759         }
 760         if (config->dv_miss_info) {
 761                 if (switch_info->master || switch_info->representor)
 762                         config->dv_xmeta_en = MLX5_XMETA_MODE_META16;
 763         }
 764         mlx5_malloc_mem_select(config->sys_mem_en);
 765         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
 766         if (!sh)
 767                 return NULL;
 768         config->devx = sh->devx;
 769 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
 770         config->dest_tir = 1;
 771 #endif
 772 #ifdef HAVE_IBV_MLX5_MOD_SWP
 773         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
 774 #endif
 775         /*
 776          * Multi-packet send is supported by ConnectX-4 Lx PF as well
 777          * as all ConnectX-5 devices.
 778          */
 779 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 780         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
 781 #endif
 782 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 783         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
 784 #endif
 785         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
 786         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
 787                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
 788                         DRV_LOG(DEBUG, "enhanced MPW is supported");
 789                         mps = MLX5_MPW_ENHANCED;
 790                 } else {
 791                         DRV_LOG(DEBUG, "MPW is supported");
 792                         mps = MLX5_MPW;
 793                 }
 794         } else {
 795                 DRV_LOG(DEBUG, "MPW isn't supported");
 796                 mps = MLX5_MPW_DISABLED;
 797         }
 798 #ifdef HAVE_IBV_MLX5_MOD_SWP
 799         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
 800                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
 801         DRV_LOG(DEBUG, "SWP support: %u", swp);
 802 #endif
 803         config->swp = !!swp;
 804 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 805         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
 806                 struct mlx5dv_striding_rq_caps mprq_caps =
 807                         dv_attr.striding_rq_caps;
 808
 809                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
 810                         mprq_caps.min_single_stride_log_num_of_bytes);
 811                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
 812                         mprq_caps.max_single_stride_log_num_of_bytes);
 813                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
 814                         mprq_caps.min_single_wqe_log_num_of_strides);
 815                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
 816                         mprq_caps.max_single_wqe_log_num_of_strides);
 817                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
 818                         mprq_caps.supported_qpts);
 819                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
 820                 mprq = 1;
 821                 mprq_min_stride_size_n =
 822                         mprq_caps.min_single_stride_log_num_of_bytes;
 823                 mprq_max_stride_size_n =
 824                         mprq_caps.max_single_stride_log_num_of_bytes;
 825                 mprq_min_stride_num_n =
 826                         mprq_caps.min_single_wqe_log_num_of_strides;
 827                 mprq_max_stride_num_n =
 828                         mprq_caps.max_single_wqe_log_num_of_strides;
 829         }
 830 #endif
 831         if (RTE_CACHE_LINE_SIZE == 128 &&
 832             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
 833                 cqe_comp = 0;
 834         else
 835                 cqe_comp = 1;
 836         config->cqe_comp = cqe_comp;
 837 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
 838         /* Whether device supports 128B Rx CQE padding. */
 839         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
 840                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
 841 #endif
 842 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 843         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
 844                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
 845                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
 846                              (dv_attr.tunnel_offloads_caps &
 847                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
 848                              (dv_attr.tunnel_offloads_caps &
 849                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
 850         }
 851         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
 852                 tunnel_en ? "" : "not ");
 853 #else
 854         DRV_LOG(WARNING,
 855                 "tunnel offloading disabled due to old OFED/rdma-core version");
 856 #endif
 857         config->tunnel_en = tunnel_en;
 858 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
 859         mpls_en = ((dv_attr.tunnel_offloads_caps &
 860                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
 861                    (dv_attr.tunnel_offloads_caps &
 862                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
 863         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
 864                 mpls_en ? "" : "not ");
 865 #else
 866         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
 867                 " old OFED/rdma-core version or firmware configuration");
 868 #endif
 869         config->mpls_en = mpls_en;
 870         /* Check port status. */
 871         err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
 872         if (err) {
 873                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
 874                 goto error;
 875         }
 876         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
 877                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
 878                 err = EINVAL;
 879                 goto error;
 880         }
 881         if (port_attr.state != IBV_PORT_ACTIVE)
 882                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
 883                         mlx5_glue->port_state_str(port_attr.state),
 884                         port_attr.state);
 885         /* Allocate private eth device data. */
 886         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
 887                            sizeof(*priv),
 888                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
 889         if (priv == NULL) {
 890                 DRV_LOG(ERR, "priv allocation failure");
 891                 err = ENOMEM;
 892                 goto error;
 893         }
 894         priv->sh = sh;
 895         priv->dev_port = spawn->phys_port;
 896         priv->pci_dev = spawn->pci_dev;
 897         priv->mtu = RTE_ETHER_MTU;
 898         priv->mp_id.port_id = port_id;
 899         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 900         /* Some internal functions rely on Netlink sockets, open them now. */
 901         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
 902         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
 903         priv->representor = !!switch_info->representor;
 904         priv->master = !!switch_info->master;
 905         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
 906         priv->vport_meta_tag = 0;
 907         priv->vport_meta_mask = 0;
 908         priv->pf_bond = spawn->pf_bond;
 909 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 910         /*
 911          * The DevX port query API is implemented. E-Switch may use
 912          * either vport or reg_c[0] metadata register to match on
 913          * vport index. The engaged part of metadata register is
 914          * defined by mask.
 915          */
 916         if (switch_info->representor || switch_info->master) {
 917                 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
 918                                       MLX5DV_DEVX_PORT_MATCH_REG_C_0;
 919                 err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port,
 920                                                  &devx_port);
 921                 if (err) {
 922                         DRV_LOG(WARNING,
 923                                 "can't query devx port %d on device %s",
 924                                 spawn->phys_port,
 925                                 mlx5_os_get_dev_device_name(spawn->phys_dev));
 926                         devx_port.comp_mask = 0;
 927                 }
 928         }
 929         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
 930                 priv->vport_meta_tag = devx_port.reg_c_0.value;
 931                 priv->vport_meta_mask = devx_port.reg_c_0.mask;
 932                 if (!priv->vport_meta_mask) {
 933                         DRV_LOG(ERR, "vport zero mask for port %d"
 934                                      " on bonding device %s",
 935                                      spawn->phys_port,
 936                                      mlx5_os_get_dev_device_name
 937                                                         (spawn->phys_dev));
 938                         err = ENOTSUP;
 939                         goto error;
 940                 }
 941                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
 942                         DRV_LOG(ERR, "invalid vport tag for port %d"
 943                                      " on bonding device %s",
 944                                      spawn->phys_port,
 945                                      mlx5_os_get_dev_device_name
 946                                                         (spawn->phys_dev));
 947                         err = ENOTSUP;
 948                         goto error;
 949                 }
 950         }
 951         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
 952                 priv->vport_id = devx_port.vport_num;
 953         } else if (spawn->pf_bond >= 0) {
 954                 DRV_LOG(ERR, "can't deduce vport index for port %d"
 955                              " on bonding device %s",
 956                              spawn->phys_port,
 957                              mlx5_os_get_dev_device_name(spawn->phys_dev));
 958                 err = ENOTSUP;
 959                 goto error;
 960         } else {
 961                 /* Suppose vport index in compatible way. */
 962                 priv->vport_id = switch_info->representor ?
 963                                  switch_info->port_name + 1 : -1;
 964         }
 965 #else
 966         /*
 967          * Kernel/rdma_core support single E-Switch per PF configurations
 968          * only and vport_id field contains the vport index for
 969          * associated VF, which is deduced from representor port name.
 970          * For example, let's have the IB device port 10, it has
 971          * attached network device eth0, which has port name attribute
 972          * pf0vf2, we can deduce the VF number as 2, and set vport index
 973          * as 3 (2+1). This assigning schema should be changed if the
 974          * multiple E-Switch instances per PF configurations or/and PCI
 975          * subfunctions are added.
 976          */
 977         priv->vport_id = switch_info->representor ?
 978                          switch_info->port_name + 1 : -1;
 979 #endif
 980         /* representor_id field keeps the unmodified VF index. */
 981         priv->representor_id = switch_info->representor ?
 982                                switch_info->port_name : -1;
 983         /*
 984          * Look for sibling devices in order to reuse their switch domain
 985          * if any, otherwise allocate one.
 986          */
 987         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
 988                 const struct mlx5_priv *opriv =
 989                         rte_eth_devices[port_id].data->dev_private;
 990
 991                 if (!opriv ||
 992                     opriv->sh != priv->sh ||
 993                         opriv->domain_id ==
 994                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
 995                         continue;
 996                 priv->domain_id = opriv->domain_id;
 997                 break;
 998         }
 999         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1000                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1001                 if (err) {
1002                         err = rte_errno;
1003                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1004                                 strerror(rte_errno));
1005                         goto error;
1006                 }
1007                 own_domain_id = 1;
1008         }
1009         /* Override some values set by hardware configuration. */
1010         mlx5_args(config, dpdk_dev->devargs);
1011         err = mlx5_dev_check_sibling_config(priv, config);
1012         if (err)
1013                 goto error;
1014         config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1015                             IBV_DEVICE_RAW_IP_CSUM);
1016         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1017                 (config->hw_csum ? "" : "not "));
1018 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1019         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1020         DRV_LOG(DEBUG, "counters are not supported");
1021 #endif
1022 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
1023         if (config->dv_flow_en) {
1024                 DRV_LOG(WARNING, "DV flow is not supported");
1025                 config->dv_flow_en = 0;
1026         }
1027 #endif
1028         config->ind_table_max_size =
1029                 sh->device_attr.max_rwq_indirection_table_size;
1030         /*
1031          * Remove this check once DPDK supports larger/variable
1032          * indirection tables.
1033          */
1034         if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1035                 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1036         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1037                 config->ind_table_max_size);
1038         config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1039                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1040         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1041                 (config->hw_vlan_strip ? "" : "not "));
1042         config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1043                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1044 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1045         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1046 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1047         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1048                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1049 #endif
1050         if (config->hw_padding && !hw_padding) {
1051                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1052                 config->hw_padding = 0;
1053         } else if (config->hw_padding) {
1054                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1055         }
1056         config->tso = (sh->device_attr.max_tso > 0 &&
1057                       (sh->device_attr.tso_supported_qpts &
1058                        (1 << IBV_QPT_RAW_PACKET)));
1059         if (config->tso)
1060                 config->tso_max_payload_sz = sh->device_attr.max_tso;
1061         /*
1062          * MPW is disabled by default, while the Enhanced MPW is enabled
1063          * by default.
1064          */
1065         if (config->mps == MLX5_ARG_UNSET)
1066                 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1067                                                           MLX5_MPW_DISABLED;
1068         else
1069                 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
1070         DRV_LOG(INFO, "%sMPS is %s",
1071                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1072                 config->mps == MLX5_MPW ? "legacy " : "",
1073                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1074         if (config->cqe_comp && !cqe_comp) {
1075                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1076                 config->cqe_comp = 0;
1077         }
1078         if (config->cqe_pad && !cqe_pad) {
1079                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1080                 config->cqe_pad = 0;
1081         } else if (config->cqe_pad) {
1082                 DRV_LOG(INFO, "Rx CQE padding is enabled");
1083         }
1084         if (config->devx) {
1085                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
1086                 if (err) {
1087                         err = -err;
1088                         goto error;
1089                 }
1090                 /* Check relax ordering support. */
1091                 if (config->hca_attr.relaxed_ordering_write &&
1092                     config->hca_attr.relaxed_ordering_read  &&
1093                     !haswell_broadwell_cpu)
1094                         sh->cmng.relaxed_ordering = 1;
1095                 /* Check for LRO support. */
1096                 if (config->dest_tir && config->hca_attr.lro_cap &&
1097                     config->dv_flow_en) {
1098                         /* TBD check tunnel lro caps. */
1099                         config->lro.supported = config->hca_attr.lro_cap;
1100                         DRV_LOG(DEBUG, "Device supports LRO");
1101                         /*
1102                          * If LRO timeout is not configured by application,
1103                          * use the minimal supported value.
1104                          */
1105                         if (!config->lro.timeout)
1106                                 config->lro.timeout =
1107                                 config->hca_attr.lro_timer_supported_periods[0];
1108                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1109                                 config->lro.timeout);
1110                         DRV_LOG(DEBUG, "LRO minimal size of TCP segment "
1111                                 "required for coalescing is %d bytes",
1112                                 config->hca_attr.lro_min_mss_size);
1113                 }
1114 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
1115                 if (config->hca_attr.qos.sup &&
1116                     config->hca_attr.qos.srtcm_sup &&
1117                     config->dv_flow_en) {
1118                         uint8_t reg_c_mask =
1119                                 config->hca_attr.qos.flow_meter_reg_c_ids;
1120                         /*
1121                          * Meter needs two REG_C's for color match and pre-sfx
1122                          * flow match. Here get the REG_C for color match.
1123                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
1124                          */
1125                         reg_c_mask &= 0xfc;
1126                         if (__builtin_popcount(reg_c_mask) < 1) {
1127                                 priv->mtr_en = 0;
1128                                 DRV_LOG(WARNING, "No available register for"
1129                                         " meter.");
1130                         } else {
1131                                 priv->mtr_color_reg = ffs(reg_c_mask) - 1 +
1132                                                       REG_C_0;
1133                                 priv->mtr_en = 1;
1134                                 priv->mtr_reg_share =
1135                                       config->hca_attr.qos.flow_meter_reg_share;
1136                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1137                                         priv->mtr_color_reg);
1138                         }
1139                 }
1140 #endif
1141 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1142                 if (config->hca_attr.log_max_ft_sampler_num > 0  &&
1143                     config->dv_flow_en) {
1144                         priv->sampler_en = 1;
1145                         DRV_LOG(DEBUG, "The Sampler enabled!\n");
1146                 } else {
1147                         priv->sampler_en = 0;
1148                         if (!config->hca_attr.log_max_ft_sampler_num)
1149                                 DRV_LOG(WARNING, "No available register for"
1150                                                 " Sampler.");
1151                         else
1152                                 DRV_LOG(DEBUG, "DV flow is not supported!\n");
1153                 }
1154 #endif
1155         }
1156         if (config->tx_pp) {
1157                 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1158                         config->hca_attr.dev_freq_khz);
1159                 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1160                         config->hca_attr.qos.packet_pacing ? "" : "not ");
1161                 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1162                         config->hca_attr.cross_channel ? "" : "not ");
1163                 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1164                         config->hca_attr.wqe_index_ignore ? "" : "not ");
1165                 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1166                         config->hca_attr.non_wire_sq ? "" : "not ");
1167                 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1168                         config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1169                         config->hca_attr.log_max_static_sq_wq);
1170                 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1171                         config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1172                 if (!config->devx) {
1173                         DRV_LOG(ERR, "DevX is required for packet pacing");
1174                         err = ENODEV;
1175                         goto error;
1176                 }
1177                 if (!config->hca_attr.qos.packet_pacing) {
1178                         DRV_LOG(ERR, "Packet pacing is not supported");
1179                         err = ENODEV;
1180                         goto error;
1181                 }
1182                 if (!config->hca_attr.cross_channel) {
1183                         DRV_LOG(ERR, "Cross channel operations are"
1184                                      " required for packet pacing");
1185                         err = ENODEV;
1186                         goto error;
1187                 }
1188                 if (!config->hca_attr.wqe_index_ignore) {
1189                         DRV_LOG(ERR, "WQE index ignore feature is"
1190                                      " required for packet pacing");
1191                         err = ENODEV;
1192                         goto error;
1193                 }
1194                 if (!config->hca_attr.non_wire_sq) {
1195                         DRV_LOG(ERR, "Non-wire SQ feature is"
1196                                      " required for packet pacing");
1197                         err = ENODEV;
1198                         goto error;
1199                 }
1200                 if (!config->hca_attr.log_max_static_sq_wq) {
1201                         DRV_LOG(ERR, "Static WQE SQ feature is"
1202                                      " required for packet pacing");
1203                         err = ENODEV;
1204                         goto error;
1205                 }
1206                 if (!config->hca_attr.qos.wqe_rate_pp) {
1207                         DRV_LOG(ERR, "WQE rate mode is required"
1208                                      " for packet pacing");
1209                         err = ENODEV;
1210                         goto error;
1211                 }
1212 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1213                 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1214                              " can't create queues for packet pacing");
1215                 err = ENODEV;
1216                 goto error;
1217 #endif
1218         }
1219         if (config->devx) {
1220                 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1221
1222                 err = config->hca_attr.access_register_user ?
1223                         mlx5_devx_cmd_register_read
1224                                 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1225                                 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1226                 if (!err) {
1227                         uint32_t ts_mode;
1228
1229                         /* MTUTC register is read successfully. */
1230                         ts_mode = MLX5_GET(register_mtutc, reg,
1231                                            time_stamp_mode);
1232                         if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1233                                 config->rt_timestamp = 1;
1234                 } else {
1235                         /* Kernel does not support register reading. */
1236                         if (config->hca_attr.dev_freq_khz ==
1237                                                  (NS_PER_S / MS_PER_S))
1238                                 config->rt_timestamp = 1;
1239                 }
1240         }
1241         /*
1242          * If HW has bug working with tunnel packet decapsulation and
1243          * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1244          * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1245          */
1246         if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1247                 config->hw_fcs_strip = 0;
1248         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1249                 (config->hw_fcs_strip ? "" : "not "));
1250         if (config->mprq.enabled && mprq) {
1251                 if (config->mprq.stride_num_n &&
1252                     (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1253                      config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1254                         config->mprq.stride_num_n =
1255                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1256                                                 mprq_min_stride_num_n),
1257                                         mprq_max_stride_num_n);
1258                         DRV_LOG(WARNING,
1259                                 "the number of strides"
1260                                 " for Multi-Packet RQ is out of range,"
1261                                 " setting default value (%u)",
1262                                 1 << config->mprq.stride_num_n);
1263                 }
1264                 if (config->mprq.stride_size_n &&
1265                     (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1266                      config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1267                         config->mprq.stride_size_n =
1268                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1269                                                 mprq_min_stride_size_n),
1270                                         mprq_max_stride_size_n);
1271                         DRV_LOG(WARNING,
1272                                 "the size of a stride"
1273                                 " for Multi-Packet RQ is out of range,"
1274                                 " setting default value (%u)",
1275                                 1 << config->mprq.stride_size_n);
1276                 }
1277                 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1278                 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1279         } else if (config->mprq.enabled && !mprq) {
1280                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1281                 config->mprq.enabled = 0;
1282         }
1283         if (config->max_dump_files_num == 0)
1284                 config->max_dump_files_num = 128;
1285         eth_dev = rte_eth_dev_allocate(name);
1286         if (eth_dev == NULL) {
1287                 DRV_LOG(ERR, "can not allocate rte ethdev");
1288                 err = ENOMEM;
1289                 goto error;
1290         }
1291         if (priv->representor) {
1292                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1293                 eth_dev->data->representor_id = priv->representor_id;
1294         }
1295         /*
1296          * Store associated network device interface index. This index
1297          * is permanent throughout the lifetime of device. So, we may store
1298          * the ifindex here and use the cached value further.
1299          */
1300         MLX5_ASSERT(spawn->ifindex);
1301         priv->if_index = spawn->ifindex;
1302         if (priv->pf_bond >= 0 && priv->master) {
1303                 /* Get bond interface info */
1304                 err = mlx5_sysfs_bond_info(priv->if_index,
1305                                      &priv->bond_ifindex,
1306                                      priv->bond_name);
1307                 if (err)
1308                         DRV_LOG(ERR, "unable to get bond info: %s",
1309                                 strerror(rte_errno));
1310                 else
1311                         DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
1312                                 priv->if_index, priv->bond_ifindex,
1313                                 priv->bond_name);
1314         }
1315         eth_dev->data->dev_private = priv;
1316         priv->dev_data = eth_dev->data;
1317         eth_dev->data->mac_addrs = priv->mac;
1318         eth_dev->device = dpdk_dev;
1319         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1320         /* Configure the first MAC address by default. */
1321         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1322                 DRV_LOG(ERR,
1323                         "port %u cannot get MAC address, is mlx5_en"
1324                         " loaded? (errno: %s)",
1325                         eth_dev->data->port_id, strerror(rte_errno));
1326                 err = ENODEV;
1327                 goto error;
1328         }
1329         DRV_LOG(INFO,
1330                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1331                 eth_dev->data->port_id,
1332                 mac.addr_bytes[0], mac.addr_bytes[1],
1333                 mac.addr_bytes[2], mac.addr_bytes[3],
1334                 mac.addr_bytes[4], mac.addr_bytes[5]);
1335 #ifdef RTE_LIBRTE_MLX5_DEBUG
1336         {
1337                 char ifname[IF_NAMESIZE];
1338
1339                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1340                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1341                                 eth_dev->data->port_id, ifname);
1342                 else
1343                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1344                                 eth_dev->data->port_id);
1345         }
1346 #endif
1347         /* Get actual MTU if possible. */
1348         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1349         if (err) {
1350                 err = rte_errno;
1351                 goto error;
1352         }
1353         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1354                 priv->mtu);
1355         /* Initialize burst functions to prevent crashes before link-up. */
1356         eth_dev->rx_pkt_burst = removed_rx_burst;
1357         eth_dev->tx_pkt_burst = removed_tx_burst;
1358         eth_dev->dev_ops = &mlx5_os_dev_ops;
1359         eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1360         eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1361         eth_dev->rx_queue_count = mlx5_rx_queue_count;
1362         /* Register MAC address. */
1363         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1364         if (config->vf && config->vf_nl_en)
1365                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1366                                       mlx5_ifindex(eth_dev),
1367                                       eth_dev->data->mac_addrs,
1368                                       MLX5_MAX_MAC_ADDRESSES);
1369         priv->flows = 0;
1370         priv->ctrl_flows = 0;
1371         rte_spinlock_init(&priv->flow_list_lock);
1372         TAILQ_INIT(&priv->flow_meters);
1373         TAILQ_INIT(&priv->flow_meter_profiles);
1374         /* Hint libmlx5 to use PMD allocator for data plane resources */
1375         mlx5_glue->dv_set_context_attr(sh->ctx,
1376                         MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1377                         (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
1378                                 .alloc = &mlx5_alloc_verbs_buf,
1379                                 .free = &mlx5_free_verbs_buf,
1380                                 .data = priv,
1381                         }));
1382         /* Bring Ethernet device up. */
1383         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1384                 eth_dev->data->port_id);
1385         mlx5_set_link_up(eth_dev);
1386         /*
1387          * Even though the interrupt handler is not installed yet,
1388          * interrupts will still trigger on the async_fd from
1389          * Verbs context returned by ibv_open_device().
1390          */
1391         mlx5_link_update(eth_dev, 0);
1392 #ifdef HAVE_MLX5DV_DR_ESWITCH
1393         if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1394               (switch_info->representor || switch_info->master)))
1395                 config->dv_esw_en = 0;
1396 #else
1397         config->dv_esw_en = 0;
1398 #endif
1399         /* Detect minimal data bytes to inline. */
1400         mlx5_set_min_inline(spawn, config);
1401         /* Store device configuration on private structure. */
1402         priv->config = *config;
1403         /* Create context for virtual machine VLAN workaround. */
1404         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1405         if (config->dv_flow_en) {
1406                 err = mlx5_alloc_shared_dr(priv);
1407                 if (err)
1408                         goto error;
1409         }
1410         if (config->devx && config->dv_flow_en && config->dest_tir) {
1411                 priv->obj_ops = devx_obj_ops;
1412                 priv->obj_ops.drop_action_create =
1413                                                 ibv_obj_ops.drop_action_create;
1414                 priv->obj_ops.drop_action_destroy =
1415                                                 ibv_obj_ops.drop_action_destroy;
1416 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1417                 priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify;
1418 #else
1419                 if (config->dv_esw_en)
1420                         priv->obj_ops.txq_obj_modify =
1421                                                 ibv_obj_ops.txq_obj_modify;
1422 #endif
1423                 /* Use specific wrappers for Tx object. */
1424                 priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;
1425                 priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;
1426
1427         } else {
1428                 priv->obj_ops = ibv_obj_ops;
1429         }
1430         priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
1431         if (!priv->drop_queue.hrxq)
1432                 goto error;
1433         /* Supported Verbs flow priority number detection. */
1434         err = mlx5_flow_discover_priorities(eth_dev);
1435         if (err < 0) {
1436                 err = -err;
1437                 goto error;
1438         }
1439         priv->config.flow_prio = err;
1440         if (!priv->config.dv_esw_en &&
1441             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1442                 DRV_LOG(WARNING, "metadata mode %u is not supported "
1443                                  "(no E-Switch)", priv->config.dv_xmeta_en);
1444                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1445         }
1446         mlx5_set_metadata_mask(eth_dev);
1447         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1448             !priv->sh->dv_regc0_mask) {
1449                 DRV_LOG(ERR, "metadata mode %u is not supported "
1450                              "(no metadata reg_c[0] is available)",
1451                              priv->config.dv_xmeta_en);
1452                         err = ENOTSUP;
1453                         goto error;
1454         }
1455         /* Query availability of metadata reg_c's. */
1456         err = mlx5_flow_discover_mreg_c(eth_dev);
1457         if (err < 0) {
1458                 err = -err;
1459                 goto error;
1460         }
1461         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1462                 DRV_LOG(DEBUG,
1463                         "port %u extensive metadata register is not supported",
1464                         eth_dev->data->port_id);
1465                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1466                         DRV_LOG(ERR, "metadata mode %u is not supported "
1467                                      "(no metadata registers available)",
1468                                      priv->config.dv_xmeta_en);
1469                         err = ENOTSUP;
1470                         goto error;
1471                 }
1472         }
1473         if (priv->config.dv_flow_en &&
1474             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1475             mlx5_flow_ext_mreg_supported(eth_dev) &&
1476             priv->sh->dv_regc0_mask) {
1477                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1478                                                       MLX5_FLOW_MREG_HTABLE_SZ,
1479                                                       0, 0,
1480                                                       NULL, NULL, NULL);
1481                 if (!priv->mreg_cp_tbl) {
1482                         err = ENOMEM;
1483                         goto error;
1484                 }
1485         }
1486         mlx5_flow_counter_mode_config(eth_dev);
1487         return eth_dev;
1488 error:
1489         if (priv) {
1490                 if (priv->mreg_cp_tbl)
1491                         mlx5_hlist_destroy(priv->mreg_cp_tbl);
1492                 if (priv->sh)
1493                         mlx5_os_free_shared_dr(priv);
1494                 if (priv->nl_socket_route >= 0)
1495                         close(priv->nl_socket_route);
1496                 if (priv->nl_socket_rdma >= 0)
1497                         close(priv->nl_socket_rdma);
1498                 if (priv->vmwa_context)
1499                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1500                 if (eth_dev && priv->drop_queue.hrxq)
1501                         mlx5_drop_action_destroy(eth_dev);
1502                 if (own_domain_id)
1503                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1504                 mlx5_free(priv);
1505                 if (eth_dev != NULL)
1506                         eth_dev->data->dev_private = NULL;
1507         }
1508         if (eth_dev != NULL) {
1509                 /* mac_addrs must not be freed alone because part of
1510                  * dev_private
1511                  **/
1512                 eth_dev->data->mac_addrs = NULL;
1513                 rte_eth_dev_release_port(eth_dev);
1514         }
1515         if (sh)
1516                 mlx5_free_shared_dev_ctx(sh);
1517         MLX5_ASSERT(err > 0);
1518         rte_errno = err;
1519         return NULL;
1520 }
1521
1522 /**
1523  * Comparison callback to sort device data.
1524  *
1525  * This is meant to be used with qsort().
1526  *
1527  * @param a[in]
1528  *   Pointer to pointer to first data object.
1529  * @param b[in]
1530  *   Pointer to pointer to second data object.
1531  *
1532  * @return
1533  *   0 if both objects are equal, less than 0 if the first argument is less
1534  *   than the second, greater than 0 otherwise.
1535  */
1536 static int
1537 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1538 {
1539         const struct mlx5_switch_info *si_a =
1540                 &((const struct mlx5_dev_spawn_data *)a)->info;
1541         const struct mlx5_switch_info *si_b =
1542                 &((const struct mlx5_dev_spawn_data *)b)->info;
1543         int ret;
1544
1545         /* Master device first. */
1546         ret = si_b->master - si_a->master;
1547         if (ret)
1548                 return ret;
1549         /* Then representor devices. */
1550         ret = si_b->representor - si_a->representor;
1551         if (ret)
1552                 return ret;
1553         /* Unidentified devices come last in no specific order. */
1554         if (!si_a->representor)
1555                 return 0;
1556         /* Order representors by name. */
1557         return si_a->port_name - si_b->port_name;
1558 }
1559
1560 /**
1561  * Match PCI information for possible slaves of bonding device.
1562  *
1563  * @param[in] ibv_dev
1564  *   Pointer to Infiniband device structure.
1565  * @param[in] pci_dev
1566  *   Pointer to PCI device structure to match PCI address.
1567  * @param[in] nl_rdma
1568  *   Netlink RDMA group socket handle.
1569  *
1570  * @return
1571  *   negative value if no bonding device found, otherwise
1572  *   positive index of slave PF in bonding.
1573  */
1574 static int
1575 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1576                            const struct rte_pci_device *pci_dev,
1577                            int nl_rdma)
1578 {
1579         char ifname[IF_NAMESIZE + 1];
1580         unsigned int ifindex;
1581         unsigned int np, i;
1582         FILE *file = NULL;
1583         int pf = -1;
1584
1585         /*
1586          * Try to get master device name. If something goes
1587          * wrong suppose the lack of kernel support and no
1588          * bonding devices.
1589          */
1590         if (nl_rdma < 0)
1591                 return -1;
1592         if (!strstr(ibv_dev->name, "bond"))
1593                 return -1;
1594         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
1595         if (!np)
1596                 return -1;
1597         /*
1598          * The Master device might not be on the predefined
1599          * port (not on port index 1, it is not garanted),
1600          * we have to scan all Infiniband device port and
1601          * find master.
1602          */
1603         for (i = 1; i <= np; ++i) {
1604                 /* Check whether Infiniband port is populated. */
1605                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
1606                 if (!ifindex)
1607                         continue;
1608                 if (!if_indextoname(ifindex, ifname))
1609                         continue;
1610                 /* Try to read bonding slave names from sysfs. */
1611                 MKSTR(slaves,
1612                       "/sys/class/net/%s/master/bonding/slaves", ifname);
1613                 file = fopen(slaves, "r");
1614                 if (file)
1615                         break;
1616         }
1617         if (!file)
1618                 return -1;
1619         /* Use safe format to check maximal buffer length. */
1620         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1621         while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1622                 char tmp_str[IF_NAMESIZE + 32];
1623                 struct rte_pci_addr pci_addr;
1624                 struct mlx5_switch_info info;
1625
1626                 /* Process slave interface names in the loop. */
1627                 snprintf(tmp_str, sizeof(tmp_str),
1628                          "/sys/class/net/%s", ifname);
1629                 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
1630                         DRV_LOG(WARNING, "can not get PCI address"
1631                                          " for netdev \"%s\"", ifname);
1632                         continue;
1633                 }
1634                 if (pci_dev->addr.domain != pci_addr.domain ||
1635                     pci_dev->addr.bus != pci_addr.bus ||
1636                     pci_dev->addr.devid != pci_addr.devid ||
1637                     pci_dev->addr.function != pci_addr.function)
1638                         continue;
1639                 /* Slave interface PCI address match found. */
1640                 fclose(file);
1641                 snprintf(tmp_str, sizeof(tmp_str),
1642                          "/sys/class/net/%s/phys_port_name", ifname);
1643                 file = fopen(tmp_str, "rb");
1644                 if (!file)
1645                         break;
1646                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1647                 if (fscanf(file, "%32s", tmp_str) == 1)
1648                         mlx5_translate_port_name(tmp_str, &info);
1649                 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
1650                     info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1651                         pf = info.port_name;
1652                 break;
1653         }
1654         if (file)
1655                 fclose(file);
1656         return pf;
1657 }
1658
1659 /**
1660  * DPDK callback to register a PCI device.
1661  *
1662  * This function spawns Ethernet devices out of a given PCI device.
1663  *
1664  * @param[in] pci_drv
1665  *   PCI driver structure (mlx5_driver).
1666  * @param[in] pci_dev
1667  *   PCI device information.
1668  *
1669  * @return
1670  *   0 on success, a negative errno value otherwise and rte_errno is set.
1671  */
1672 int
1673 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1674                   struct rte_pci_device *pci_dev)
1675 {
1676         struct ibv_device **ibv_list;
1677         /*
1678          * Number of found IB Devices matching with requested PCI BDF.
1679          * nd != 1 means there are multiple IB devices over the same
1680          * PCI device and we have representors and master.
1681          */
1682         unsigned int nd = 0;
1683         /*
1684          * Number of found IB device Ports. nd = 1 and np = 1..n means
1685          * we have the single multiport IB device, and there may be
1686          * representors attached to some of found ports.
1687          */
1688         unsigned int np = 0;
1689         /*
1690          * Number of DPDK ethernet devices to Spawn - either over
1691          * multiple IB devices or multiple ports of single IB device.
1692          * Actually this is the number of iterations to spawn.
1693          */
1694         unsigned int ns = 0;
1695         /*
1696          * Bonding device
1697          *   < 0 - no bonding device (single one)
1698          *  >= 0 - bonding device (value is slave PF index)
1699          */
1700         int bd = -1;
1701         struct mlx5_dev_spawn_data *list = NULL;
1702         struct mlx5_dev_config dev_config;
1703         unsigned int dev_config_vf;
1704         int ret;
1705
1706         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1707                 mlx5_pmd_socket_init();
1708         ret = mlx5_init_once();
1709         if (ret) {
1710                 DRV_LOG(ERR, "unable to init PMD global data: %s",
1711                         strerror(rte_errno));
1712                 return -rte_errno;
1713         }
1714         errno = 0;
1715         ibv_list = mlx5_glue->get_device_list(&ret);
1716         if (!ibv_list) {
1717                 rte_errno = errno ? errno : ENOSYS;
1718                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1719                 return -rte_errno;
1720         }
1721         /*
1722          * First scan the list of all Infiniband devices to find
1723          * matching ones, gathering into the list.
1724          */
1725         struct ibv_device *ibv_match[ret + 1];
1726         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
1727         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1728         unsigned int i;
1729
1730         while (ret-- > 0) {
1731                 struct rte_pci_addr pci_addr;
1732
1733                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1734                 bd = mlx5_device_bond_pci_match
1735                                 (ibv_list[ret], pci_dev, nl_rdma);
1736                 if (bd >= 0) {
1737                         /*
1738                          * Bonding device detected. Only one match is allowed,
1739                          * the bonding is supported over multi-port IB device,
1740                          * there should be no matches on representor PCI
1741                          * functions or non VF LAG bonding devices with
1742                          * specified address.
1743                          */
1744                         if (nd) {
1745                                 DRV_LOG(ERR,
1746                                         "multiple PCI match on bonding device"
1747                                         "\"%s\" found", ibv_list[ret]->name);
1748                                 rte_errno = ENOENT;
1749                                 ret = -rte_errno;
1750                                 goto exit;
1751                         }
1752                         DRV_LOG(INFO, "PCI information matches for"
1753                                       " slave %d bonding device \"%s\"",
1754                                       bd, ibv_list[ret]->name);
1755                         ibv_match[nd++] = ibv_list[ret];
1756                         break;
1757                 }
1758                 if (mlx5_dev_to_pci_addr
1759                         (ibv_list[ret]->ibdev_path, &pci_addr))
1760                         continue;
1761                 if (pci_dev->addr.domain != pci_addr.domain ||
1762                     pci_dev->addr.bus != pci_addr.bus ||
1763                     pci_dev->addr.devid != pci_addr.devid ||
1764                     pci_dev->addr.function != pci_addr.function)
1765                         continue;
1766                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1767                         ibv_list[ret]->name);
1768                 ibv_match[nd++] = ibv_list[ret];
1769         }
1770         ibv_match[nd] = NULL;
1771         if (!nd) {
1772                 /* No device matches, just complain and bail out. */
1773                 DRV_LOG(WARNING,
1774                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
1775                         " are kernel drivers loaded?",
1776                         pci_dev->addr.domain, pci_dev->addr.bus,
1777                         pci_dev->addr.devid, pci_dev->addr.function);
1778                 rte_errno = ENOENT;
1779                 ret = -rte_errno;
1780                 goto exit;
1781         }
1782         if (nd == 1) {
1783                 /*
1784                  * Found single matching device may have multiple ports.
1785                  * Each port may be representor, we have to check the port
1786                  * number and check the representors existence.
1787                  */
1788                 if (nl_rdma >= 0)
1789                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1790                 if (!np)
1791                         DRV_LOG(WARNING, "can not get IB device \"%s\""
1792                                          " ports number", ibv_match[0]->name);
1793                 if (bd >= 0 && !np) {
1794                         DRV_LOG(ERR, "can not get ports"
1795                                      " for bonding device");
1796                         rte_errno = ENOENT;
1797                         ret = -rte_errno;
1798                         goto exit;
1799                 }
1800         }
1801 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
1802         if (bd >= 0) {
1803                 /*
1804                  * This may happen if there is VF LAG kernel support and
1805                  * application is compiled with older rdma_core library.
1806                  */
1807                 DRV_LOG(ERR,
1808                         "No kernel/verbs support for VF LAG bonding found.");
1809                 rte_errno = ENOTSUP;
1810                 ret = -rte_errno;
1811                 goto exit;
1812         }
1813 #endif
1814         /*
1815          * Now we can determine the maximal
1816          * amount of devices to be spawned.
1817          */
1818         list = mlx5_malloc(MLX5_MEM_ZERO,
1819                            sizeof(struct mlx5_dev_spawn_data) *
1820                            (np ? np : nd),
1821                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1822         if (!list) {
1823                 DRV_LOG(ERR, "spawn data array allocation failure");
1824                 rte_errno = ENOMEM;
1825                 ret = -rte_errno;
1826                 goto exit;
1827         }
1828         if (bd >= 0 || np > 1) {
1829                 /*
1830                  * Single IB device with multiple ports found,
1831                  * it may be E-Switch master device and representors.
1832                  * We have to perform identification through the ports.
1833                  */
1834                 MLX5_ASSERT(nl_rdma >= 0);
1835                 MLX5_ASSERT(ns == 0);
1836                 MLX5_ASSERT(nd == 1);
1837                 MLX5_ASSERT(np);
1838                 for (i = 1; i <= np; ++i) {
1839                         list[ns].max_port = np;
1840                         list[ns].phys_port = i;
1841                         list[ns].phys_dev = ibv_match[0];
1842                         list[ns].eth_dev = NULL;
1843                         list[ns].pci_dev = pci_dev;
1844                         list[ns].pf_bond = bd;
1845                         list[ns].ifindex = mlx5_nl_ifindex
1846                                 (nl_rdma,
1847                                 mlx5_os_get_dev_device_name
1848                                                 (list[ns].phys_dev), i);
1849                         if (!list[ns].ifindex) {
1850                                 /*
1851                                  * No network interface index found for the
1852                                  * specified port, it means there is no
1853                                  * representor on this port. It's OK,
1854                                  * there can be disabled ports, for example
1855                                  * if sriov_numvfs < sriov_totalvfs.
1856                                  */
1857                                 continue;
1858                         }
1859                         ret = -1;
1860                         if (nl_route >= 0)
1861                                 ret = mlx5_nl_switch_info
1862                                                (nl_route,
1863                                                 list[ns].ifindex,
1864                                                 &list[ns].info);
1865                         if (ret || (!list[ns].info.representor &&
1866                                     !list[ns].info.master)) {
1867                                 /*
1868                                  * We failed to recognize representors with
1869                                  * Netlink, let's try to perform the task
1870                                  * with sysfs.
1871                                  */
1872                                 ret =  mlx5_sysfs_switch_info
1873                                                 (list[ns].ifindex,
1874                                                  &list[ns].info);
1875                         }
1876                         if (!ret && bd >= 0) {
1877                                 switch (list[ns].info.name_type) {
1878                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
1879                                         if (list[ns].info.port_name == bd)
1880                                                 ns++;
1881                                         break;
1882                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
1883                                         /* Fallthrough */
1884                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
1885                                         if (list[ns].info.pf_num == bd)
1886                                                 ns++;
1887                                         break;
1888                                 default:
1889                                         break;
1890                                 }
1891                                 continue;
1892                         }
1893                         if (!ret && (list[ns].info.representor ^
1894                                      list[ns].info.master))
1895                                 ns++;
1896                 }
1897                 if (!ns) {
1898                         DRV_LOG(ERR,
1899                                 "unable to recognize master/representors"
1900                                 " on the IB device with multiple ports");
1901                         rte_errno = ENOENT;
1902                         ret = -rte_errno;
1903                         goto exit;
1904                 }
1905         } else {
1906                 /*
1907                  * The existence of several matching entries (nd > 1) means
1908                  * port representors have been instantiated. No existing Verbs
1909                  * call nor sysfs entries can tell them apart, this can only
1910                  * be done through Netlink calls assuming kernel drivers are
1911                  * recent enough to support them.
1912                  *
1913                  * In the event of identification failure through Netlink,
1914                  * try again through sysfs, then:
1915                  *
1916                  * 1. A single IB device matches (nd == 1) with single
1917                  *    port (np=0/1) and is not a representor, assume
1918                  *    no switch support.
1919                  *
1920                  * 2. Otherwise no safe assumptions can be made;
1921                  *    complain louder and bail out.
1922                  */
1923                 for (i = 0; i != nd; ++i) {
1924                         memset(&list[ns].info, 0, sizeof(list[ns].info));
1925                         list[ns].max_port = 1;
1926                         list[ns].phys_port = 1;
1927                         list[ns].phys_dev = ibv_match[i];
1928                         list[ns].eth_dev = NULL;
1929                         list[ns].pci_dev = pci_dev;
1930                         list[ns].pf_bond = -1;
1931                         list[ns].ifindex = 0;
1932                         if (nl_rdma >= 0)
1933                                 list[ns].ifindex = mlx5_nl_ifindex
1934                                 (nl_rdma,
1935                                 mlx5_os_get_dev_device_name
1936                                                 (list[ns].phys_dev), 1);
1937                         if (!list[ns].ifindex) {
1938                                 char ifname[IF_NAMESIZE];
1939
1940                                 /*
1941                                  * Netlink failed, it may happen with old
1942                                  * ib_core kernel driver (before 4.16).
1943                                  * We can assume there is old driver because
1944                                  * here we are processing single ports IB
1945                                  * devices. Let's try sysfs to retrieve
1946                                  * the ifindex. The method works for
1947                                  * master device only.
1948                                  */
1949                                 if (nd > 1) {
1950                                         /*
1951                                          * Multiple devices found, assume
1952                                          * representors, can not distinguish
1953                                          * master/representor and retrieve
1954                                          * ifindex via sysfs.
1955                                          */
1956                                         continue;
1957                                 }
1958                                 ret = mlx5_get_ifname_sysfs
1959                                         (ibv_match[i]->ibdev_path, ifname);
1960                                 if (!ret)
1961                                         list[ns].ifindex =
1962                                                 if_nametoindex(ifname);
1963                                 if (!list[ns].ifindex) {
1964                                         /*
1965                                          * No network interface index found
1966                                          * for the specified device, it means
1967                                          * there it is neither representor
1968                                          * nor master.
1969                                          */
1970                                         continue;
1971                                 }
1972                         }
1973                         ret = -1;
1974                         if (nl_route >= 0)
1975                                 ret = mlx5_nl_switch_info
1976                                                (nl_route,
1977                                                 list[ns].ifindex,
1978                                                 &list[ns].info);
1979                         if (ret || (!list[ns].info.representor &&
1980                                     !list[ns].info.master)) {
1981                                 /*
1982                                  * We failed to recognize representors with
1983                                  * Netlink, let's try to perform the task
1984                                  * with sysfs.
1985                                  */
1986                                 ret =  mlx5_sysfs_switch_info
1987                                                 (list[ns].ifindex,
1988                                                  &list[ns].info);
1989                         }
1990                         if (!ret && (list[ns].info.representor ^
1991                                      list[ns].info.master)) {
1992                                 ns++;
1993                         } else if ((nd == 1) &&
1994                                    !list[ns].info.representor &&
1995                                    !list[ns].info.master) {
1996                                 /*
1997                                  * Single IB device with
1998                                  * one physical port and
1999                                  * attached network device.
2000                                  * May be SRIOV is not enabled
2001                                  * or there is no representors.
2002                                  */
2003                                 DRV_LOG(INFO, "no E-Switch support detected");
2004                                 ns++;
2005                                 break;
2006                         }
2007                 }
2008                 if (!ns) {
2009                         DRV_LOG(ERR,
2010                                 "unable to recognize master/representors"
2011                                 " on the multiple IB devices");
2012                         rte_errno = ENOENT;
2013                         ret = -rte_errno;
2014                         goto exit;
2015                 }
2016         }
2017         MLX5_ASSERT(ns);
2018         /*
2019          * Sort list to probe devices in natural order for users convenience
2020          * (i.e. master first, then representors from lowest to highest ID).
2021          */
2022         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2023         /* Device specific configuration. */
2024         switch (pci_dev->id.device_id) {
2025         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2026         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2027         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2028         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2029         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2030         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2031         case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF:
2032                 dev_config_vf = 1;
2033                 break;
2034         default:
2035                 dev_config_vf = 0;
2036                 break;
2037         }
2038         for (i = 0; i != ns; ++i) {
2039                 uint32_t restore;
2040
2041                 /* Default configuration. */
2042                 memset(&dev_config, 0, sizeof(struct mlx5_dev_config));
2043                 dev_config.vf = dev_config_vf;
2044                 dev_config.mps = MLX5_ARG_UNSET;
2045                 dev_config.dbnc = MLX5_ARG_UNSET;
2046                 dev_config.rx_vec_en = 1;
2047                 dev_config.txq_inline_max = MLX5_ARG_UNSET;
2048                 dev_config.txq_inline_min = MLX5_ARG_UNSET;
2049                 dev_config.txq_inline_mpw = MLX5_ARG_UNSET;
2050                 dev_config.txqs_inline = MLX5_ARG_UNSET;
2051                 dev_config.vf_nl_en = 1;
2052                 dev_config.mr_ext_memseg_en = 1;
2053                 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
2054                 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
2055                 dev_config.dv_esw_en = 1;
2056                 dev_config.dv_flow_en = 1;
2057                 dev_config.decap_en = 1;
2058                 dev_config.log_hp_size = MLX5_ARG_UNSET;
2059                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2060                                                  &list[i],
2061                                                  &dev_config);
2062                 if (!list[i].eth_dev) {
2063                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2064                                 break;
2065                         /* Device is disabled or already spawned. Ignore it. */
2066                         continue;
2067                 }
2068                 restore = list[i].eth_dev->data->dev_flags;
2069                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2070                 /* Restore non-PCI flags cleared by the above call. */
2071                 list[i].eth_dev->data->dev_flags |= restore;
2072                 rte_eth_dev_probing_finish(list[i].eth_dev);
2073         }
2074         if (i != ns) {
2075                 DRV_LOG(ERR,
2076                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2077                         " encountering an error: %s",
2078                         pci_dev->addr.domain, pci_dev->addr.bus,
2079                         pci_dev->addr.devid, pci_dev->addr.function,
2080                         strerror(rte_errno));
2081                 ret = -rte_errno;
2082                 /* Roll back. */
2083                 while (i--) {
2084                         if (!list[i].eth_dev)
2085                                 continue;
2086                         mlx5_dev_close(list[i].eth_dev);
2087                         /* mac_addrs must not be freed because in dev_private */
2088                         list[i].eth_dev->data->mac_addrs = NULL;
2089                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2090                 }
2091                 /* Restore original error. */
2092                 rte_errno = -ret;
2093         } else {
2094                 ret = 0;
2095         }
2096 exit:
2097         /*
2098          * Do the routine cleanup:
2099          * - close opened Netlink sockets
2100          * - free allocated spawn data array
2101          * - free the Infiniband device list
2102          */
2103         if (nl_rdma >= 0)
2104                 close(nl_rdma);
2105         if (nl_route >= 0)
2106                 close(nl_route);
2107         if (list)
2108                 mlx5_free(list);
2109         MLX5_ASSERT(ibv_list);
2110         mlx5_glue->free_device_list(ibv_list);
2111         return ret;
2112 }
2113
2114 static int
2115 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
2116 {
2117         char *env;
2118         int value;
2119
2120         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2121         /* Get environment variable to store. */
2122         env = getenv(MLX5_SHUT_UP_BF);
2123         value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
2124         if (config->dbnc == MLX5_ARG_UNSET)
2125                 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
2126         else
2127                 setenv(MLX5_SHUT_UP_BF,
2128                        config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
2129         return value;
2130 }
2131
2132 static void
2133 mlx5_restore_doorbell_mapping_env(int value)
2134 {
2135         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2136         /* Restore the original environment variable state. */
2137         if (value == MLX5_ARG_UNSET)
2138                 unsetenv(MLX5_SHUT_UP_BF);
2139         else
2140                 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
2141 }
2142
2143 /**
2144  * Extract pdn of PD object using DV API.
2145  *
2146  * @param[in] pd
2147  *   Pointer to the verbs PD object.
2148  * @param[out] pdn
2149  *   Pointer to the PD object number variable.
2150  *
2151  * @return
2152  *   0 on success, error value otherwise.
2153  */
2154 int
2155 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
2156 {
2157 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2158         struct mlx5dv_obj obj;
2159         struct mlx5dv_pd pd_info;
2160         int ret = 0;
2161
2162         obj.pd.in = pd;
2163         obj.pd.out = &pd_info;
2164         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
2165         if (ret) {
2166                 DRV_LOG(DEBUG, "Fail to get PD object info");
2167                 return ret;
2168         }
2169         *pdn = pd_info.pdn;
2170         return 0;
2171 #else
2172         (void)pd;
2173         (void)pdn;
2174         return -ENOTSUP;
2175 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
2176 }
2177
2178 /**
2179  * Function API to open IB device.
2180  *
2181  * This function calls the Linux glue APIs to open a device.
2182  *
2183  * @param[in] spawn
2184  *   Pointer to the IB device attributes (name, port, etc).
2185  * @param[out] config
2186  *   Pointer to device configuration structure.
2187  * @param[out] sh
2188  *   Pointer to shared context structure.
2189  *
2190  * @return
2191  *   0 on success, a positive error value otherwise.
2192  */
2193 int
2194 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
2195                      const struct mlx5_dev_config *config,
2196                      struct mlx5_dev_ctx_shared *sh)
2197 {
2198         int dbmap_env;
2199         int err = 0;
2200
2201         sh->numa_node = spawn->pci_dev->device.numa_node;
2202         pthread_mutex_init(&sh->txpp.mutex, NULL);
2203         /*
2204          * Configure environment variable "MLX5_BF_SHUT_UP"
2205          * before the device creation. The rdma_core library
2206          * checks the variable at device creation and
2207          * stores the result internally.
2208          */
2209         dbmap_env = mlx5_config_doorbell_mapping_env(config);
2210         /* Try to open IB device with DV first, then usual Verbs. */
2211         errno = 0;
2212         sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
2213         if (sh->ctx) {
2214                 sh->devx = 1;
2215                 DRV_LOG(DEBUG, "DevX is supported");
2216                 /* The device is created, no need for environment. */
2217                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2218         } else {
2219                 /* The environment variable is still configured. */
2220                 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
2221                 err = errno ? errno : ENODEV;
2222                 /*
2223                  * The environment variable is not needed anymore,
2224                  * all device creation attempts are completed.
2225                  */
2226                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2227                 if (!sh->ctx)
2228                         return err;
2229                 DRV_LOG(DEBUG, "DevX is NOT supported");
2230                 err = 0;
2231         }
2232         return err;
2233 }
2234
2235 /**
2236  * Install shared asynchronous device events handler.
2237  * This function is implemented to support event sharing
2238  * between multiple ports of single IB device.
2239  *
2240  * @param sh
2241  *   Pointer to mlx5_dev_ctx_shared object.
2242  */
2243 void
2244 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2245 {
2246         int ret;
2247         int flags;
2248
2249         sh->intr_handle.fd = -1;
2250         flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
2251         ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
2252                     F_SETFL, flags | O_NONBLOCK);
2253         if (ret) {
2254                 DRV_LOG(INFO, "failed to change file descriptor async event"
2255                         " queue");
2256         } else {
2257                 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
2258                 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2259                 if (rte_intr_callback_register(&sh->intr_handle,
2260                                         mlx5_dev_interrupt_handler, sh)) {
2261                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2262                         sh->intr_handle.fd = -1;
2263                 }
2264         }
2265         if (sh->devx) {
2266 #ifdef HAVE_IBV_DEVX_ASYNC
2267                 sh->intr_handle_devx.fd = -1;
2268                 sh->devx_comp =
2269                         (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
2270                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2271                 if (!devx_comp) {
2272                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2273                         return;
2274                 }
2275                 flags = fcntl(devx_comp->fd, F_GETFL);
2276                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2277                 if (ret) {
2278                         DRV_LOG(INFO, "failed to change file descriptor"
2279                                 " devx comp");
2280                         return;
2281                 }
2282                 sh->intr_handle_devx.fd = devx_comp->fd;
2283                 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2284                 if (rte_intr_callback_register(&sh->intr_handle_devx,
2285                                         mlx5_dev_interrupt_handler_devx, sh)) {
2286                         DRV_LOG(INFO, "Fail to install the devx shared"
2287                                 " interrupt.");
2288                         sh->intr_handle_devx.fd = -1;
2289                 }
2290 #endif /* HAVE_IBV_DEVX_ASYNC */
2291         }
2292 }
2293
2294 /**
2295  * Uninstall shared asynchronous device events handler.
2296  * This function is implemented to support event sharing
2297  * between multiple ports of single IB device.
2298  *
2299  * @param dev
2300  *   Pointer to mlx5_dev_ctx_shared object.
2301  */
2302 void
2303 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2304 {
2305         if (sh->intr_handle.fd >= 0)
2306                 mlx5_intr_callback_unregister(&sh->intr_handle,
2307                                               mlx5_dev_interrupt_handler, sh);
2308 #ifdef HAVE_IBV_DEVX_ASYNC
2309         if (sh->intr_handle_devx.fd >= 0)
2310                 rte_intr_callback_unregister(&sh->intr_handle_devx,
2311                                   mlx5_dev_interrupt_handler_devx, sh);
2312         if (sh->devx_comp)
2313                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2314 #endif
2315 }
2316
2317 /**
2318  * Read statistics by a named counter.
2319  *
2320  * @param[in] priv
2321  *   Pointer to the private device data structure.
2322  * @param[in] ctr_name
2323  *   Pointer to the name of the statistic counter to read
2324  * @param[out] stat
2325  *   Pointer to read statistic value.
2326  * @return
2327  *   0 on success and stat is valud, 1 if failed to read the value
2328  *   rte_errno is set.
2329  *
2330  */
2331 int
2332 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2333                       uint64_t *stat)
2334 {
2335         int fd;
2336
2337         if (priv->sh) {
2338                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2339                       priv->sh->ibdev_path,
2340                       priv->dev_port,
2341                       ctr_name);
2342                 fd = open(path, O_RDONLY);
2343                 /*
2344                  * in switchdev the file location is not per port
2345                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2346                  */
2347                 if (fd == -1) {
2348                         MKSTR(path1, "%s/hw_counters/%s",
2349                               priv->sh->ibdev_path,
2350                               ctr_name);
2351                         fd = open(path1, O_RDONLY);
2352                 }
2353                 if (fd != -1) {
2354                         char buf[21] = {'\0'};
2355                         ssize_t n = read(fd, buf, sizeof(buf));
2356
2357                         close(fd);
2358                         if (n != -1) {
2359                                 *stat = strtoull(buf, NULL, 10);
2360                                 return 0;
2361                         }
2362                 }
2363         }
2364         *stat = 0;
2365         return 1;
2366 }
2367
2368 /**
2369  * Set the reg_mr and dereg_mr call backs
2370  *
2371  * @param reg_mr_cb[out]
2372  *   Pointer to reg_mr func
2373  * @param dereg_mr_cb[out]
2374  *   Pointer to dereg_mr func
2375  *
2376  */
2377 void
2378 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2379                       mlx5_dereg_mr_t *dereg_mr_cb)
2380 {
2381         *reg_mr_cb = mlx5_verbs_ops.reg_mr;
2382         *dereg_mr_cb = mlx5_verbs_ops.dereg_mr;
2383 }
2384
2385 /**
2386  * Remove a MAC address from device
2387  *
2388  * @param dev
2389  *   Pointer to Ethernet device structure.
2390  * @param index
2391  *   MAC address index.
2392  */
2393 void
2394 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2395 {
2396         struct mlx5_priv *priv = dev->data->dev_private;
2397         const int vf = priv->config.vf;
2398
2399         if (vf)
2400                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2401                                         mlx5_ifindex(dev), priv->mac_own,
2402                                         &dev->data->mac_addrs[index], index);
2403 }
2404
2405 /**
2406  * Adds a MAC address to the device
2407  *
2408  * @param dev
2409  *   Pointer to Ethernet device structure.
2410  * @param mac_addr
2411  *   MAC address to register.
2412  * @param index
2413  *   MAC address index.
2414  *
2415  * @return
2416  *   0 on success, a negative errno value otherwise
2417  */
2418 int
2419 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2420                      uint32_t index)
2421 {
2422         struct mlx5_priv *priv = dev->data->dev_private;
2423         const int vf = priv->config.vf;
2424         int ret = 0;
2425
2426         if (vf)
2427                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2428                                            mlx5_ifindex(dev), priv->mac_own,
2429                                            mac, index);
2430         return ret;
2431 }
2432
2433 /**
2434  * Modify a VF MAC address
2435  *
2436  * @param priv
2437  *   Pointer to device private data.
2438  * @param mac_addr
2439  *   MAC address to modify into.
2440  * @param iface_idx
2441  *   Net device interface index
2442  * @param vf_index
2443  *   VF index
2444  *
2445  * @return
2446  *   0 on success, a negative errno value otherwise
2447  */
2448 int
2449 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2450                            unsigned int iface_idx,
2451                            struct rte_ether_addr *mac_addr,
2452                            int vf_index)
2453 {
2454         return mlx5_nl_vf_mac_addr_modify
2455                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2456 }
2457
2458 /**
2459  * Set device promiscuous mode
2460  *
2461  * @param dev
2462  *   Pointer to Ethernet device structure.
2463  * @param enable
2464  *   0 - promiscuous is disabled, otherwise - enabled
2465  *
2466  * @return
2467  *   0 on success, a negative error value otherwise
2468  */
2469 int
2470 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2471 {
2472         struct mlx5_priv *priv = dev->data->dev_private;
2473
2474         return mlx5_nl_promisc(priv->nl_socket_route,
2475                                mlx5_ifindex(dev), !!enable);
2476 }
2477
2478 /**
2479  * Set device promiscuous mode
2480  *
2481  * @param dev
2482  *   Pointer to Ethernet device structure.
2483  * @param enable
2484  *   0 - all multicase is disabled, otherwise - enabled
2485  *
2486  * @return
2487  *   0 on success, a negative error value otherwise
2488  */
2489 int
2490 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2491 {
2492         struct mlx5_priv *priv = dev->data->dev_private;
2493
2494         return mlx5_nl_allmulti(priv->nl_socket_route,
2495                                 mlx5_ifindex(dev), !!enable);
2496 }
2497
2498 /**
2499  * Flush device MAC addresses
2500  *
2501  * @param dev
2502  *   Pointer to Ethernet device structure.
2503  *
2504  */
2505 void
2506 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2507 {
2508         struct mlx5_priv *priv = dev->data->dev_private;
2509
2510         mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2511                                dev->data->mac_addrs,
2512                                MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2513 }
2514
2515 const struct eth_dev_ops mlx5_os_dev_ops = {
2516         .dev_configure = mlx5_dev_configure,
2517         .dev_start = mlx5_dev_start,
2518         .dev_stop = mlx5_dev_stop,
2519         .dev_set_link_down = mlx5_set_link_down,
2520         .dev_set_link_up = mlx5_set_link_up,
2521         .dev_close = mlx5_dev_close,
2522         .promiscuous_enable = mlx5_promiscuous_enable,
2523         .promiscuous_disable = mlx5_promiscuous_disable,
2524         .allmulticast_enable = mlx5_allmulticast_enable,
2525         .allmulticast_disable = mlx5_allmulticast_disable,
2526         .link_update = mlx5_link_update,
2527         .stats_get = mlx5_stats_get,
2528         .stats_reset = mlx5_stats_reset,
2529         .xstats_get = mlx5_xstats_get,
2530         .xstats_reset = mlx5_xstats_reset,
2531         .xstats_get_names = mlx5_xstats_get_names,
2532         .fw_version_get = mlx5_fw_version_get,
2533         .dev_infos_get = mlx5_dev_infos_get,
2534         .read_clock = mlx5_txpp_read_clock,
2535         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2536         .vlan_filter_set = mlx5_vlan_filter_set,
2537         .rx_queue_setup = mlx5_rx_queue_setup,
2538         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2539         .tx_queue_setup = mlx5_tx_queue_setup,
2540         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2541         .rx_queue_release = mlx5_rx_queue_release,
2542         .tx_queue_release = mlx5_tx_queue_release,
2543         .rx_queue_start = mlx5_rx_queue_start,
2544         .rx_queue_stop = mlx5_rx_queue_stop,
2545         .tx_queue_start = mlx5_tx_queue_start,
2546         .tx_queue_stop = mlx5_tx_queue_stop,
2547         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2548         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2549         .mac_addr_remove = mlx5_mac_addr_remove,
2550         .mac_addr_add = mlx5_mac_addr_add,
2551         .mac_addr_set = mlx5_mac_addr_set,
2552         .set_mc_addr_list = mlx5_set_mc_addr_list,
2553         .mtu_set = mlx5_dev_set_mtu,
2554         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2555         .vlan_offload_set = mlx5_vlan_offload_set,
2556         .reta_update = mlx5_dev_rss_reta_update,
2557         .reta_query = mlx5_dev_rss_reta_query,
2558         .rss_hash_update = mlx5_rss_hash_update,
2559         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
2560         .filter_ctrl = mlx5_dev_filter_ctrl,
2561         .rxq_info_get = mlx5_rxq_info_get,
2562         .txq_info_get = mlx5_txq_info_get,
2563         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2564         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2565         .rx_queue_intr_enable = mlx5_rx_intr_enable,
2566         .rx_queue_intr_disable = mlx5_rx_intr_disable,
2567         .is_removed = mlx5_is_removed,
2568         .udp_tunnel_port_add  = mlx5_udp_tunnel_port_add,
2569         .get_module_info = mlx5_get_module_info,
2570         .get_module_eeprom = mlx5_get_module_eeprom,
2571         .hairpin_cap_get = mlx5_hairpin_cap_get,
2572         .mtr_ops_get = mlx5_flow_meter_ops_get,
2573         .hairpin_bind = mlx5_hairpin_bind,
2574         .hairpin_unbind = mlx5_hairpin_unbind,
2575         .hairpin_get_peer_ports = mlx5_hairpin_get_peer_ports,
2576         .hairpin_queue_peer_update = mlx5_hairpin_queue_peer_update,
2577         .hairpin_queue_peer_bind = mlx5_hairpin_queue_peer_bind,
2578         .hairpin_queue_peer_unbind = mlx5_hairpin_queue_peer_unbind,
2579 };
2580
2581 /* Available operations from secondary process. */
2582 const struct eth_dev_ops mlx5_os_dev_sec_ops = {
2583         .stats_get = mlx5_stats_get,
2584         .stats_reset = mlx5_stats_reset,
2585         .xstats_get = mlx5_xstats_get,
2586         .xstats_reset = mlx5_xstats_reset,
2587         .xstats_get_names = mlx5_xstats_get_names,
2588         .fw_version_get = mlx5_fw_version_get,
2589         .dev_infos_get = mlx5_dev_infos_get,
2590         .read_clock = mlx5_txpp_read_clock,
2591         .rx_queue_start = mlx5_rx_queue_start,
2592         .rx_queue_stop = mlx5_rx_queue_stop,
2593         .tx_queue_start = mlx5_tx_queue_start,
2594         .tx_queue_stop = mlx5_tx_queue_stop,
2595         .rxq_info_get = mlx5_rxq_info_get,
2596         .txq_info_get = mlx5_txq_info_get,
2597         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2598         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2599         .get_module_info = mlx5_get_module_info,
2600         .get_module_eeprom = mlx5_get_module_eeprom,
2601 };
2602
2603 /* Available operations in flow isolated mode. */
2604 const struct eth_dev_ops mlx5_os_dev_ops_isolate = {
2605         .dev_configure = mlx5_dev_configure,
2606         .dev_start = mlx5_dev_start,
2607         .dev_stop = mlx5_dev_stop,
2608         .dev_set_link_down = mlx5_set_link_down,
2609         .dev_set_link_up = mlx5_set_link_up,
2610         .dev_close = mlx5_dev_close,
2611         .promiscuous_enable = mlx5_promiscuous_enable,
2612         .promiscuous_disable = mlx5_promiscuous_disable,
2613         .allmulticast_enable = mlx5_allmulticast_enable,
2614         .allmulticast_disable = mlx5_allmulticast_disable,
2615         .link_update = mlx5_link_update,
2616         .stats_get = mlx5_stats_get,
2617         .stats_reset = mlx5_stats_reset,
2618         .xstats_get = mlx5_xstats_get,
2619         .xstats_reset = mlx5_xstats_reset,
2620         .xstats_get_names = mlx5_xstats_get_names,
2621         .fw_version_get = mlx5_fw_version_get,
2622         .dev_infos_get = mlx5_dev_infos_get,
2623         .read_clock = mlx5_txpp_read_clock,
2624         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2625         .vlan_filter_set = mlx5_vlan_filter_set,
2626         .rx_queue_setup = mlx5_rx_queue_setup,
2627         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2628         .tx_queue_setup = mlx5_tx_queue_setup,
2629         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2630         .rx_queue_release = mlx5_rx_queue_release,
2631         .tx_queue_release = mlx5_tx_queue_release,
2632         .rx_queue_start = mlx5_rx_queue_start,
2633         .rx_queue_stop = mlx5_rx_queue_stop,
2634         .tx_queue_start = mlx5_tx_queue_start,
2635         .tx_queue_stop = mlx5_tx_queue_stop,
2636         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2637         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2638         .mac_addr_remove = mlx5_mac_addr_remove,
2639         .mac_addr_add = mlx5_mac_addr_add,
2640         .mac_addr_set = mlx5_mac_addr_set,
2641         .set_mc_addr_list = mlx5_set_mc_addr_list,
2642         .mtu_set = mlx5_dev_set_mtu,
2643         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2644         .vlan_offload_set = mlx5_vlan_offload_set,
2645         .filter_ctrl = mlx5_dev_filter_ctrl,
2646         .rxq_info_get = mlx5_rxq_info_get,
2647         .txq_info_get = mlx5_txq_info_get,
2648         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2649         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2650         .rx_queue_intr_enable = mlx5_rx_intr_enable,
2651         .rx_queue_intr_disable = mlx5_rx_intr_disable,
2652         .is_removed = mlx5_is_removed,
2653         .get_module_info = mlx5_get_module_info,
2654         .get_module_eeprom = mlx5_get_module_eeprom,
2655         .hairpin_cap_get = mlx5_hairpin_cap_get,
2656         .mtr_ops_get = mlx5_flow_meter_ops_get,
2657         .hairpin_bind = mlx5_hairpin_bind,
2658         .hairpin_unbind = mlx5_hairpin_unbind,
2659         .hairpin_get_peer_ports = mlx5_hairpin_get_peer_ports,
2660         .hairpin_queue_peer_update = mlx5_hairpin_queue_peer_update,
2661         .hairpin_queue_peer_bind = mlx5_hairpin_queue_peer_bind,
2662         .hairpin_queue_peer_unbind = mlx5_hairpin_queue_peer_unbind,
2663 };