drivers/net/mlx5/linux/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2020 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12 #include <net/if.h>
  13 #include <linux/rtnetlink.h>
  14 #include <linux/sockios.h>
  15 #include <linux/ethtool.h>
  16 #include <fcntl.h>
  17
  18 #include <rte_malloc.h>
  19 #include <ethdev_driver.h>
  20 #include <ethdev_pci.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_bus_auxiliary.h>
  24 #include <rte_common.h>
  25 #include <rte_kvargs.h>
  26 #include <rte_rwlock.h>
  27 #include <rte_spinlock.h>
  28 #include <rte_string_fns.h>
  29 #include <rte_alarm.h>
  30 #include <rte_eal_paging.h>
  31
  32 #include <mlx5_glue.h>
  33 #include <mlx5_devx_cmds.h>
  34 #include <mlx5_common.h>
  35 #include <mlx5_common_mp.h>
  36 #include <mlx5_common_mr.h>
  37 #include <mlx5_malloc.h>
  38
  39 #include "mlx5_defs.h"
  40 #include "mlx5.h"
  41 #include "mlx5_common_os.h"
  42 #include "mlx5_utils.h"
  43 #include "mlx5_rxtx.h"
  44 #include "mlx5_rx.h"
  45 #include "mlx5_tx.h"
  46 #include "mlx5_autoconf.h"
  47 #include "mlx5_mr.h"
  48 #include "mlx5_flow.h"
  49 #include "rte_pmd_mlx5.h"
  50 #include "mlx5_verbs.h"
  51 #include "mlx5_nl.h"
  52 #include "mlx5_devx.h"
  53
  54 #ifndef HAVE_IBV_MLX5_MOD_MPW
  55 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
  56 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
  57 #endif
  58
  59 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
  60 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
  61 #endif
  62
  63 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  64
  65 /* Spinlock for mlx5_shared_data allocation. */
  66 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  67
  68 /* Process local data for secondary processes. */
  69 static struct mlx5_local_data mlx5_local_data;
  70
  71 /* rte flow indexed pool configuration. */
  72 static struct mlx5_indexed_pool_config icfg[] = {
  73         {
  74                 .size = sizeof(struct rte_flow),
  75                 .trunk_size = 64,
  76                 .need_lock = 1,
  77                 .release_mem_en = 0,
  78                 .malloc = mlx5_malloc,
  79                 .free = mlx5_free,
  80                 .per_core_cache = 0,
  81                 .type = "ctl_flow_ipool",
  82         },
  83         {
  84                 .size = sizeof(struct rte_flow),
  85                 .trunk_size = 64,
  86                 .grow_trunk = 3,
  87                 .grow_shift = 2,
  88                 .need_lock = 1,
  89                 .release_mem_en = 0,
  90                 .malloc = mlx5_malloc,
  91                 .free = mlx5_free,
  92                 .per_core_cache = 1 << 14,
  93                 .type = "rte_flow_ipool",
  94         },
  95         {
  96                 .size = sizeof(struct rte_flow),
  97                 .trunk_size = 64,
  98                 .grow_trunk = 3,
  99                 .grow_shift = 2,
 100                 .need_lock = 1,
 101                 .release_mem_en = 0,
 102                 .malloc = mlx5_malloc,
 103                 .free = mlx5_free,
 104                 .per_core_cache = 0,
 105                 .type = "mcp_flow_ipool",
 106         },
 107 };
 108
 109 /**
 110  * Set the completion channel file descriptor interrupt as non-blocking.
 111  *
 112  * @param[in] rxq_obj
 113  *   Pointer to RQ channel object, which includes the channel fd
 114  *
 115  * @param[out] fd
 116  *   The file descriptor (representing the intetrrupt) used in this channel.
 117  *
 118  * @return
 119  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
 120  */
 121 int
 122 mlx5_os_set_nonblock_channel_fd(int fd)
 123 {
 124         int flags;
 125
 126         flags = fcntl(fd, F_GETFL);
 127         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
 128 }
 129
 130 /**
 131  * Get mlx5 device attributes. The glue function query_device_ex() is called
 132  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
 133  * device attributes from the glue out parameter.
 134  *
 135  * @param dev
 136  *   Pointer to ibv context.
 137  *
 138  * @param device_attr
 139  *   Pointer to mlx5 device attributes.
 140  *
 141  * @return
 142  *   0 on success, non zero error number otherwise
 143  */
 144 int
 145 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
 146 {
 147         int err;
 148         struct ibv_device_attr_ex attr_ex;
 149         memset(device_attr, 0, sizeof(*device_attr));
 150         err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
 151         if (err)
 152                 return err;
 153
 154         device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
 155         device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
 156         device_attr->max_sge = attr_ex.orig_attr.max_sge;
 157         device_attr->max_cq = attr_ex.orig_attr.max_cq;
 158         device_attr->max_cqe = attr_ex.orig_attr.max_cqe;
 159         device_attr->max_mr = attr_ex.orig_attr.max_mr;
 160         device_attr->max_pd = attr_ex.orig_attr.max_pd;
 161         device_attr->max_qp = attr_ex.orig_attr.max_qp;
 162         device_attr->max_srq = attr_ex.orig_attr.max_srq;
 163         device_attr->max_srq_wr = attr_ex.orig_attr.max_srq_wr;
 164         device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
 165         device_attr->max_rwq_indirection_table_size =
 166                 attr_ex.rss_caps.max_rwq_indirection_table_size;
 167         device_attr->max_tso = attr_ex.tso_caps.max_tso;
 168         device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
 169
 170         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 171         err = mlx5_glue->dv_query_device(ctx, &dv_attr);
 172         if (err)
 173                 return err;
 174
 175         device_attr->flags = dv_attr.flags;
 176         device_attr->comp_mask = dv_attr.comp_mask;
 177 #ifdef HAVE_IBV_MLX5_MOD_SWP
 178         device_attr->sw_parsing_offloads =
 179                 dv_attr.sw_parsing_caps.sw_parsing_offloads;
 180 #endif
 181         device_attr->min_single_stride_log_num_of_bytes =
 182                 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
 183         device_attr->max_single_stride_log_num_of_bytes =
 184                 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
 185         device_attr->min_single_wqe_log_num_of_strides =
 186                 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
 187         device_attr->max_single_wqe_log_num_of_strides =
 188                 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
 189         device_attr->stride_supported_qpts =
 190                 dv_attr.striding_rq_caps.supported_qpts;
 191 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 192         device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
 193 #endif
 194         strlcpy(device_attr->fw_ver, attr_ex.orig_attr.fw_ver,
 195                 sizeof(device_attr->fw_ver));
 196
 197         return err;
 198 }
 199
 200 /**
 201  * Verbs callback to allocate a memory. This function should allocate the space
 202  * according to the size provided residing inside a huge page.
 203  * Please note that all allocation must respect the alignment from libmlx5
 204  * (i.e. currently rte_mem_page_size()).
 205  *
 206  * @param[in] size
 207  *   The size in bytes of the memory to allocate.
 208  * @param[in] data
 209  *   A pointer to the callback data.
 210  *
 211  * @return
 212  *   Allocated buffer, NULL otherwise and rte_errno is set.
 213  */
 214 static void *
 215 mlx5_alloc_verbs_buf(size_t size, void *data)
 216 {
 217         struct mlx5_dev_ctx_shared *sh = data;
 218         void *ret;
 219         size_t alignment = rte_mem_page_size();
 220         if (alignment == (size_t)-1) {
 221                 DRV_LOG(ERR, "Failed to get mem page size");
 222                 rte_errno = ENOMEM;
 223                 return NULL;
 224         }
 225
 226         MLX5_ASSERT(data != NULL);
 227         ret = mlx5_malloc(0, size, alignment, sh->numa_node);
 228         if (!ret && size)
 229                 rte_errno = ENOMEM;
 230         return ret;
 231 }
 232
 233 /**
 234  * Detect misc5 support or not
 235  *
 236  * @param[in] priv
 237  *   Device private data pointer
 238  */
 239 #ifdef HAVE_MLX5DV_DR
 240 static void
 241 __mlx5_discovery_misc5_cap(struct mlx5_priv *priv)
 242 {
 243 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 244         /* Dummy VxLAN matcher to detect rdma-core misc5 cap
 245          * Case: IPv4--->UDP--->VxLAN--->vni
 246          */
 247         void *tbl;
 248         struct mlx5_flow_dv_match_params matcher_mask;
 249         void *match_m;
 250         void *matcher;
 251         void *headers_m;
 252         void *misc5_m;
 253         uint32_t *tunnel_header_m;
 254         struct mlx5dv_flow_matcher_attr dv_attr;
 255
 256         memset(&matcher_mask, 0, sizeof(matcher_mask));
 257         matcher_mask.size = sizeof(matcher_mask.buf);
 258         match_m = matcher_mask.buf;
 259         headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers);
 260         misc5_m = MLX5_ADDR_OF(fte_match_param,
 261                                match_m, misc_parameters_5);
 262         tunnel_header_m = (uint32_t *)
 263                                 MLX5_ADDR_OF(fte_match_set_misc5,
 264                                 misc5_m, tunnel_header_1);
 265         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
 266         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4);
 267         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
 268         *tunnel_header_m = 0xffffff;
 269
 270         tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1);
 271         if (!tbl) {
 272                 DRV_LOG(INFO, "No SW steering support");
 273                 return;
 274         }
 275         dv_attr.type = IBV_FLOW_ATTR_NORMAL,
 276         dv_attr.match_mask = (void *)&matcher_mask,
 277         dv_attr.match_criteria_enable =
 278                         (1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) |
 279                         (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT);
 280         dv_attr.priority = 3;
 281 #ifdef HAVE_MLX5DV_DR_ESWITCH
 282         void *misc2_m;
 283         if (priv->config.dv_esw_en) {
 284                 /* FDB enabled reg_c_0 */
 285                 dv_attr.match_criteria_enable |=
 286                                 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT);
 287                 misc2_m = MLX5_ADDR_OF(fte_match_param,
 288                                        match_m, misc_parameters_2);
 289                 MLX5_SET(fte_match_set_misc2, misc2_m,
 290                          metadata_reg_c_0, 0xffff);
 291         }
 292 #endif
 293         matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->ctx,
 294                                                     &dv_attr, tbl);
 295         if (matcher) {
 296                 priv->sh->misc5_cap = 1;
 297                 mlx5_glue->dv_destroy_flow_matcher(matcher);
 298         }
 299         mlx5_glue->dr_destroy_flow_tbl(tbl);
 300 #else
 301         RTE_SET_USED(priv);
 302 #endif
 303 }
 304 #endif
 305
 306 /**
 307  * Verbs callback to free a memory.
 308  *
 309  * @param[in] ptr
 310  *   A pointer to the memory to free.
 311  * @param[in] data
 312  *   A pointer to the callback data.
 313  */
 314 static void
 315 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 316 {
 317         MLX5_ASSERT(data != NULL);
 318         mlx5_free(ptr);
 319 }
 320
 321 /**
 322  * Initialize DR related data within private structure.
 323  * Routine checks the reference counter and does actual
 324  * resources creation/initialization only if counter is zero.
 325  *
 326  * @param[in] priv
 327  *   Pointer to the private device data structure.
 328  *
 329  * @return
 330  *   Zero on success, positive error code otherwise.
 331  */
 332 static int
 333 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 334 {
 335         struct mlx5_dev_ctx_shared *sh = priv->sh;
 336         char s[MLX5_NAME_SIZE] __rte_unused;
 337         int err;
 338
 339         MLX5_ASSERT(sh && sh->refcnt);
 340         if (sh->refcnt > 1)
 341                 return 0;
 342         err = mlx5_alloc_table_hash_list(priv);
 343         if (err)
 344                 goto error;
 345         /* The resources below are only valid with DV support. */
 346 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 347         /* Init port id action list. */
 348         snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name);
 349         sh->port_id_action_list = mlx5_list_create(s, sh, true,
 350                                                    flow_dv_port_id_create_cb,
 351                                                    flow_dv_port_id_match_cb,
 352                                                    flow_dv_port_id_remove_cb,
 353                                                    flow_dv_port_id_clone_cb,
 354                                                  flow_dv_port_id_clone_free_cb);
 355         if (!sh->port_id_action_list)
 356                 goto error;
 357         /* Init push vlan action list. */
 358         snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name);
 359         sh->push_vlan_action_list = mlx5_list_create(s, sh, true,
 360                                                     flow_dv_push_vlan_create_cb,
 361                                                     flow_dv_push_vlan_match_cb,
 362                                                     flow_dv_push_vlan_remove_cb,
 363                                                     flow_dv_push_vlan_clone_cb,
 364                                                flow_dv_push_vlan_clone_free_cb);
 365         if (!sh->push_vlan_action_list)
 366                 goto error;
 367         /* Init sample action list. */
 368         snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name);
 369         sh->sample_action_list = mlx5_list_create(s, sh, true,
 370                                                   flow_dv_sample_create_cb,
 371                                                   flow_dv_sample_match_cb,
 372                                                   flow_dv_sample_remove_cb,
 373                                                   flow_dv_sample_clone_cb,
 374                                                   flow_dv_sample_clone_free_cb);
 375         if (!sh->sample_action_list)
 376                 goto error;
 377         /* Init dest array action list. */
 378         snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name);
 379         sh->dest_array_list = mlx5_list_create(s, sh, true,
 380                                                flow_dv_dest_array_create_cb,
 381                                                flow_dv_dest_array_match_cb,
 382                                                flow_dv_dest_array_remove_cb,
 383                                                flow_dv_dest_array_clone_cb,
 384                                               flow_dv_dest_array_clone_free_cb);
 385         if (!sh->dest_array_list)
 386                 goto error;
 387 #endif
 388 #ifdef HAVE_MLX5DV_DR
 389         void *domain;
 390
 391         /* Reference counter is zero, we should initialize structures. */
 392         domain = mlx5_glue->dr_create_domain(sh->ctx,
 393                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 394         if (!domain) {
 395                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 396                 err = errno;
 397                 goto error;
 398         }
 399         sh->rx_domain = domain;
 400         domain = mlx5_glue->dr_create_domain(sh->ctx,
 401                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 402         if (!domain) {
 403                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 404                 err = errno;
 405                 goto error;
 406         }
 407         sh->tx_domain = domain;
 408 #ifdef HAVE_MLX5DV_DR_ESWITCH
 409         if (priv->config.dv_esw_en) {
 410                 domain  = mlx5_glue->dr_create_domain
 411                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 412                 if (!domain) {
 413                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 414                         err = errno;
 415                         goto error;
 416                 }
 417                 sh->fdb_domain = domain;
 418         }
 419         /*
 420          * The drop action is just some dummy placeholder in rdma-core. It
 421          * does not belong to domains and has no any attributes, and, can be
 422          * shared by the entire device.
 423          */
 424         sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop();
 425         if (!sh->dr_drop_action) {
 426                 DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop");
 427                 err = errno;
 428                 goto error;
 429         }
 430 #endif
 431         if (!sh->tunnel_hub && priv->config.dv_miss_info)
 432                 err = mlx5_alloc_tunnel_hub(sh);
 433         if (err) {
 434                 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
 435                 goto error;
 436         }
 437         if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
 438                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
 439                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
 440                 if (sh->fdb_domain)
 441                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
 442         }
 443         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 444         if (!priv->config.allow_duplicate_pattern) {
 445 #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE
 446                 DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?");
 447 #endif
 448                 mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0);
 449                 mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0);
 450                 if (sh->fdb_domain)
 451                         mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0);
 452         }
 453
 454         __mlx5_discovery_misc5_cap(priv);
 455 #endif /* HAVE_MLX5DV_DR */
 456         sh->default_miss_action =
 457                         mlx5_glue->dr_create_flow_action_default_miss();
 458         if (!sh->default_miss_action)
 459                 DRV_LOG(WARNING, "Default miss action is not supported.");
 460         return 0;
 461 error:
 462         /* Rollback the created objects. */
 463         if (sh->rx_domain) {
 464                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 465                 sh->rx_domain = NULL;
 466         }
 467         if (sh->tx_domain) {
 468                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 469                 sh->tx_domain = NULL;
 470         }
 471         if (sh->fdb_domain) {
 472                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 473                 sh->fdb_domain = NULL;
 474         }
 475         if (sh->dr_drop_action) {
 476                 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
 477                 sh->dr_drop_action = NULL;
 478         }
 479         if (sh->pop_vlan_action) {
 480                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 481                 sh->pop_vlan_action = NULL;
 482         }
 483         if (sh->encaps_decaps) {
 484                 mlx5_hlist_destroy(sh->encaps_decaps);
 485                 sh->encaps_decaps = NULL;
 486         }
 487         if (sh->modify_cmds) {
 488                 mlx5_hlist_destroy(sh->modify_cmds);
 489                 sh->modify_cmds = NULL;
 490         }
 491         if (sh->tag_table) {
 492                 /* tags should be destroyed with flow before. */
 493                 mlx5_hlist_destroy(sh->tag_table);
 494                 sh->tag_table = NULL;
 495         }
 496         if (sh->tunnel_hub) {
 497                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 498                 sh->tunnel_hub = NULL;
 499         }
 500         mlx5_free_table_hash_list(priv);
 501         if (sh->port_id_action_list) {
 502                 mlx5_list_destroy(sh->port_id_action_list);
 503                 sh->port_id_action_list = NULL;
 504         }
 505         if (sh->push_vlan_action_list) {
 506                 mlx5_list_destroy(sh->push_vlan_action_list);
 507                 sh->push_vlan_action_list = NULL;
 508         }
 509         if (sh->sample_action_list) {
 510                 mlx5_list_destroy(sh->sample_action_list);
 511                 sh->sample_action_list = NULL;
 512         }
 513         if (sh->dest_array_list) {
 514                 mlx5_list_destroy(sh->dest_array_list);
 515                 sh->dest_array_list = NULL;
 516         }
 517         return err;
 518 }
 519
 520 /**
 521  * Destroy DR related data within private structure.
 522  *
 523  * @param[in] priv
 524  *   Pointer to the private device data structure.
 525  */
 526 void
 527 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 528 {
 529         struct mlx5_dev_ctx_shared *sh = priv->sh;
 530
 531         MLX5_ASSERT(sh && sh->refcnt);
 532         if (sh->refcnt > 1)
 533                 return;
 534 #ifdef HAVE_MLX5DV_DR
 535         if (sh->rx_domain) {
 536                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 537                 sh->rx_domain = NULL;
 538         }
 539         if (sh->tx_domain) {
 540                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 541                 sh->tx_domain = NULL;
 542         }
 543 #ifdef HAVE_MLX5DV_DR_ESWITCH
 544         if (sh->fdb_domain) {
 545                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 546                 sh->fdb_domain = NULL;
 547         }
 548         if (sh->dr_drop_action) {
 549                 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
 550                 sh->dr_drop_action = NULL;
 551         }
 552 #endif
 553         if (sh->pop_vlan_action) {
 554                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 555                 sh->pop_vlan_action = NULL;
 556         }
 557 #endif /* HAVE_MLX5DV_DR */
 558         if (sh->default_miss_action)
 559                 mlx5_glue->destroy_flow_action
 560                                 (sh->default_miss_action);
 561         if (sh->encaps_decaps) {
 562                 mlx5_hlist_destroy(sh->encaps_decaps);
 563                 sh->encaps_decaps = NULL;
 564         }
 565         if (sh->modify_cmds) {
 566                 mlx5_hlist_destroy(sh->modify_cmds);
 567                 sh->modify_cmds = NULL;
 568         }
 569         if (sh->tag_table) {
 570                 /* tags should be destroyed with flow before. */
 571                 mlx5_hlist_destroy(sh->tag_table);
 572                 sh->tag_table = NULL;
 573         }
 574         if (sh->tunnel_hub) {
 575                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 576                 sh->tunnel_hub = NULL;
 577         }
 578         mlx5_free_table_hash_list(priv);
 579         if (sh->port_id_action_list) {
 580                 mlx5_list_destroy(sh->port_id_action_list);
 581                 sh->port_id_action_list = NULL;
 582         }
 583         if (sh->push_vlan_action_list) {
 584                 mlx5_list_destroy(sh->push_vlan_action_list);
 585                 sh->push_vlan_action_list = NULL;
 586         }
 587         if (sh->sample_action_list) {
 588                 mlx5_list_destroy(sh->sample_action_list);
 589                 sh->sample_action_list = NULL;
 590         }
 591         if (sh->dest_array_list) {
 592                 mlx5_list_destroy(sh->dest_array_list);
 593                 sh->dest_array_list = NULL;
 594         }
 595 }
 596
 597 /**
 598  * Initialize shared data between primary and secondary process.
 599  *
 600  * A memzone is reserved by primary process and secondary processes attach to
 601  * the memzone.
 602  *
 603  * @return
 604  *   0 on success, a negative errno value otherwise and rte_errno is set.
 605  */
 606 static int
 607 mlx5_init_shared_data(void)
 608 {
 609         const struct rte_memzone *mz;
 610         int ret = 0;
 611
 612         rte_spinlock_lock(&mlx5_shared_data_lock);
 613         if (mlx5_shared_data == NULL) {
 614                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 615                         /* Allocate shared memory. */
 616                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 617                                                  sizeof(*mlx5_shared_data),
 618                                                  SOCKET_ID_ANY, 0);
 619                         if (mz == NULL) {
 620                                 DRV_LOG(ERR,
 621                                         "Cannot allocate mlx5 shared data");
 622                                 ret = -rte_errno;
 623                                 goto error;
 624                         }
 625                         mlx5_shared_data = mz->addr;
 626                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 627                         rte_spinlock_init(&mlx5_shared_data->lock);
 628                 } else {
 629                         /* Lookup allocated shared memory. */
 630                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 631                         if (mz == NULL) {
 632                                 DRV_LOG(ERR,
 633                                         "Cannot attach mlx5 shared data");
 634                                 ret = -rte_errno;
 635                                 goto error;
 636                         }
 637                         mlx5_shared_data = mz->addr;
 638                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 639                 }
 640         }
 641 error:
 642         rte_spinlock_unlock(&mlx5_shared_data_lock);
 643         return ret;
 644 }
 645
 646 /**
 647  * PMD global initialization.
 648  *
 649  * Independent from individual device, this function initializes global
 650  * per-PMD data structures distinguishing primary and secondary processes.
 651  * Hence, each initialization is called once per a process.
 652  *
 653  * @return
 654  *   0 on success, a negative errno value otherwise and rte_errno is set.
 655  */
 656 static int
 657 mlx5_init_once(void)
 658 {
 659         struct mlx5_shared_data *sd;
 660         struct mlx5_local_data *ld = &mlx5_local_data;
 661         int ret = 0;
 662
 663         if (mlx5_init_shared_data())
 664                 return -rte_errno;
 665         sd = mlx5_shared_data;
 666         MLX5_ASSERT(sd);
 667         rte_spinlock_lock(&sd->lock);
 668         switch (rte_eal_process_type()) {
 669         case RTE_PROC_PRIMARY:
 670                 if (sd->init_done)
 671                         break;
 672                 LIST_INIT(&sd->mem_event_cb_list);
 673                 rte_rwlock_init(&sd->mem_event_rwlock);
 674                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
 675                                                 mlx5_mr_mem_event_cb, NULL);
 676                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
 677                                            mlx5_mp_os_primary_handle);
 678                 if (ret)
 679                         goto out;
 680                 sd->init_done = true;
 681                 break;
 682         case RTE_PROC_SECONDARY:
 683                 if (ld->init_done)
 684                         break;
 685                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
 686                                              mlx5_mp_os_secondary_handle);
 687                 if (ret)
 688                         goto out;
 689                 ++sd->secondary_cnt;
 690                 ld->init_done = true;
 691                 break;
 692         default:
 693                 break;
 694         }
 695 out:
 696         rte_spinlock_unlock(&sd->lock);
 697         return ret;
 698 }
 699
 700 /**
 701  * Create the Tx queue DevX/Verbs object.
 702  *
 703  * @param dev
 704  *   Pointer to Ethernet device.
 705  * @param idx
 706  *   Queue index in DPDK Tx queue array.
 707  *
 708  * @return
 709  *   0 on success, a negative errno value otherwise and rte_errno is set.
 710  */
 711 static int
 712 mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
 713 {
 714         struct mlx5_priv *priv = dev->data->dev_private;
 715         struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
 716         struct mlx5_txq_ctrl *txq_ctrl =
 717                         container_of(txq_data, struct mlx5_txq_ctrl, txq);
 718
 719         if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
 720                 return mlx5_txq_devx_obj_new(dev, idx);
 721 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 722         if (!priv->config.dv_esw_en)
 723                 return mlx5_txq_devx_obj_new(dev, idx);
 724 #endif
 725         return mlx5_txq_ibv_obj_new(dev, idx);
 726 }
 727
 728 /**
 729  * Release an Tx DevX/verbs queue object.
 730  *
 731  * @param txq_obj
 732  *   DevX/Verbs Tx queue object.
 733  */
 734 static void
 735 mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)
 736 {
 737         if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
 738                 mlx5_txq_devx_obj_release(txq_obj);
 739                 return;
 740         }
 741 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 742         if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) {
 743                 mlx5_txq_devx_obj_release(txq_obj);
 744                 return;
 745         }
 746 #endif
 747         mlx5_txq_ibv_obj_release(txq_obj);
 748 }
 749
 750 /**
 751  * DV flow counter mode detect and config.
 752  *
 753  * @param dev
 754  *   Pointer to rte_eth_dev structure.
 755  *
 756  */
 757 static void
 758 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
 759 {
 760 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 761         struct mlx5_priv *priv = dev->data->dev_private;
 762         struct mlx5_dev_ctx_shared *sh = priv->sh;
 763         bool fallback;
 764
 765 #ifndef HAVE_IBV_DEVX_ASYNC
 766         fallback = true;
 767 #else
 768         fallback = false;
 769         if (!priv->config.devx || !priv->config.dv_flow_en ||
 770             !priv->config.hca_attr.flow_counters_dump ||
 771             !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
 772             (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
 773                 fallback = true;
 774 #endif
 775         if (fallback)
 776                 DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
 777                         "counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
 778                         priv->config.hca_attr.flow_counters_dump,
 779                         priv->config.hca_attr.flow_counter_bulk_alloc_bitmap);
 780         /* Initialize fallback mode only on the port initializes sh. */
 781         if (sh->refcnt == 1)
 782                 sh->cmng.counter_fallback = fallback;
 783         else if (fallback != sh->cmng.counter_fallback)
 784                 DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
 785                         "with others:%d.", PORT_ID(priv), fallback);
 786 #endif
 787 }
 788
 789 static void
 790 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
 791 {
 792         struct mlx5_priv *priv = dev->data->dev_private;
 793         void *ctx = priv->sh->ctx;
 794
 795         priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
 796         if (!priv->q_counters) {
 797                 struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
 798                 struct ibv_wq *wq;
 799
 800                 DRV_LOG(DEBUG, "Port %d queue counter object cannot be created "
 801                         "by DevX - fall-back to use the kernel driver global "
 802                         "queue counter.", dev->data->port_id);
 803                 /* Create WQ by kernel and query its queue counter ID. */
 804                 if (cq) {
 805                         wq = mlx5_glue->create_wq(ctx,
 806                                                   &(struct ibv_wq_init_attr){
 807                                                     .wq_type = IBV_WQT_RQ,
 808                                                     .max_wr = 1,
 809                                                     .max_sge = 1,
 810                                                     .pd = priv->sh->pd,
 811                                                     .cq = cq,
 812                                                 });
 813                         if (wq) {
 814                                 /* Counter is assigned only on RDY state. */
 815                                 int ret = mlx5_glue->modify_wq(wq,
 816                                                  &(struct ibv_wq_attr){
 817                                                  .attr_mask = IBV_WQ_ATTR_STATE,
 818                                                  .wq_state = IBV_WQS_RDY,
 819                                                 });
 820
 821                                 if (ret == 0)
 822                                         mlx5_devx_cmd_wq_query(wq,
 823                                                          &priv->counter_set_id);
 824                                 claim_zero(mlx5_glue->destroy_wq(wq));
 825                         }
 826                         claim_zero(mlx5_glue->destroy_cq(cq));
 827                 }
 828         } else {
 829                 priv->counter_set_id = priv->q_counters->id;
 830         }
 831         if (priv->counter_set_id == 0)
 832                 DRV_LOG(INFO, "Part of the port %d statistics will not be "
 833                         "available.", dev->data->port_id);
 834 }
 835
 836 /**
 837  * Check if representor spawn info match devargs.
 838  *
 839  * @param spawn
 840  *   Verbs device parameters (name, port, switch_info) to spawn.
 841  * @param eth_da
 842  *   Device devargs to probe.
 843  *
 844  * @return
 845  *   Match result.
 846  */
 847 static bool
 848 mlx5_representor_match(struct mlx5_dev_spawn_data *spawn,
 849                        struct rte_eth_devargs *eth_da)
 850 {
 851         struct mlx5_switch_info *switch_info = &spawn->info;
 852         unsigned int p, f;
 853         uint16_t id;
 854         uint16_t repr_id = mlx5_representor_id_encode(switch_info,
 855                                                       eth_da->type);
 856
 857         switch (eth_da->type) {
 858         case RTE_ETH_REPRESENTOR_SF:
 859                 if (!(spawn->info.port_name == -1 &&
 860                       switch_info->name_type ==
 861                                 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 862                     switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) {
 863                         rte_errno = EBUSY;
 864                         return false;
 865                 }
 866                 break;
 867         case RTE_ETH_REPRESENTOR_VF:
 868                 /* Allows HPF representor index -1 as exception. */
 869                 if (!(spawn->info.port_name == -1 &&
 870                       switch_info->name_type ==
 871                                 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 872                     switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) {
 873                         rte_errno = EBUSY;
 874                         return false;
 875                 }
 876                 break;
 877         case RTE_ETH_REPRESENTOR_NONE:
 878                 rte_errno = EBUSY;
 879                 return false;
 880         default:
 881                 rte_errno = ENOTSUP;
 882                 DRV_LOG(ERR, "unsupported representor type");
 883                 return false;
 884         }
 885         /* Check representor ID: */
 886         for (p = 0; p < eth_da->nb_ports; ++p) {
 887                 if (spawn->pf_bond < 0) {
 888                         /* For non-LAG mode, allow and ignore pf. */
 889                         switch_info->pf_num = eth_da->ports[p];
 890                         repr_id = mlx5_representor_id_encode(switch_info,
 891                                                              eth_da->type);
 892                 }
 893                 for (f = 0; f < eth_da->nb_representor_ports; ++f) {
 894                         id = MLX5_REPRESENTOR_ID
 895                                 (eth_da->ports[p], eth_da->type,
 896                                  eth_da->representor_ports[f]);
 897                         if (repr_id == id)
 898                                 return true;
 899                 }
 900         }
 901         rte_errno = EBUSY;
 902         return false;
 903 }
 904
 905
 906 /**
 907  * Spawn an Ethernet device from Verbs information.
 908  *
 909  * @param dpdk_dev
 910  *   Backing DPDK device.
 911  * @param spawn
 912  *   Verbs device parameters (name, port, switch_info) to spawn.
 913  * @param config
 914  *   Device configuration parameters.
 915  * @param config
 916  *   Device arguments.
 917  *
 918  * @return
 919  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 920  *   is set. The following errors are defined:
 921  *
 922  *   EBUSY: device is not supposed to be spawned.
 923  *   EEXIST: device is already spawned
 924  */
 925 static struct rte_eth_dev *
 926 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 927                struct mlx5_dev_spawn_data *spawn,
 928                struct mlx5_dev_config *config,
 929                struct rte_eth_devargs *eth_da)
 930 {
 931         const struct mlx5_switch_info *switch_info = &spawn->info;
 932         struct mlx5_dev_ctx_shared *sh = NULL;
 933         struct ibv_port_attr port_attr;
 934         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 935         struct rte_eth_dev *eth_dev = NULL;
 936         struct mlx5_priv *priv = NULL;
 937         int err = 0;
 938         unsigned int hw_padding = 0;
 939         unsigned int mps;
 940         unsigned int tunnel_en = 0;
 941         unsigned int mpls_en = 0;
 942         unsigned int swp = 0;
 943         unsigned int mprq = 0;
 944         unsigned int mprq_min_stride_size_n = 0;
 945         unsigned int mprq_max_stride_size_n = 0;
 946         unsigned int mprq_min_stride_num_n = 0;
 947         unsigned int mprq_max_stride_num_n = 0;
 948         struct rte_ether_addr mac;
 949         char name[RTE_ETH_NAME_MAX_LEN];
 950         int own_domain_id = 0;
 951         uint16_t port_id;
 952         struct mlx5_port_info vport_info = { .query_flags = 0 };
 953         int i;
 954
 955         /* Determine if this port representor is supposed to be spawned. */
 956         if (switch_info->representor && dpdk_dev->devargs &&
 957             !mlx5_representor_match(spawn, eth_da))
 958                 return NULL;
 959         /* Build device name. */
 960         if (spawn->pf_bond < 0) {
 961                 /* Single device. */
 962                 if (!switch_info->representor)
 963                         strlcpy(name, dpdk_dev->name, sizeof(name));
 964                 else
 965                         err = snprintf(name, sizeof(name), "%s_representor_%s%u",
 966                                  dpdk_dev->name,
 967                                  switch_info->name_type ==
 968                                  MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
 969                                  switch_info->port_name);
 970         } else {
 971                 /* Bonding device. */
 972                 if (!switch_info->representor) {
 973                         err = snprintf(name, sizeof(name), "%s_%s",
 974                                  dpdk_dev->name,
 975                                  mlx5_os_get_dev_device_name(spawn->phys_dev));
 976                 } else {
 977                         err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u",
 978                                 dpdk_dev->name,
 979                                 mlx5_os_get_dev_device_name(spawn->phys_dev),
 980                                 switch_info->ctrl_num,
 981                                 switch_info->pf_num,
 982                                 switch_info->name_type ==
 983                                 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
 984                                 switch_info->port_name);
 985                 }
 986         }
 987         if (err >= (int)sizeof(name))
 988                 DRV_LOG(WARNING, "device name overflow %s", name);
 989         /* check if the device is already spawned */
 990         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 991                 rte_errno = EEXIST;
 992                 return NULL;
 993         }
 994         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 995         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 996                 struct mlx5_mp_id mp_id;
 997
 998                 eth_dev = rte_eth_dev_attach_secondary(name);
 999                 if (eth_dev == NULL) {
1000                         DRV_LOG(ERR, "can not attach rte ethdev");
1001                         rte_errno = ENOMEM;
1002                         return NULL;
1003                 }
1004                 eth_dev->device = dpdk_dev;
1005                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1006                 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1007                 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1008                 err = mlx5_proc_priv_init(eth_dev);
1009                 if (err)
1010                         return NULL;
1011                 mp_id.port_id = eth_dev->data->port_id;
1012                 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
1013                 /* Receive command fd from primary process */
1014                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
1015                 if (err < 0)
1016                         goto err_secondary;
1017                 /* Remap UAR for Tx queues. */
1018                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
1019                 if (err)
1020                         goto err_secondary;
1021                 /*
1022                  * Ethdev pointer is still required as input since
1023                  * the primary device is not accessible from the
1024                  * secondary process.
1025                  */
1026                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1027                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1028                 return eth_dev;
1029 err_secondary:
1030                 mlx5_dev_close(eth_dev);
1031                 return NULL;
1032         }
1033         /*
1034          * Some parameters ("tx_db_nc" in particularly) are needed in
1035          * advance to create dv/verbs device context. We proceed the
1036          * devargs here to get ones, and later proceed devargs again
1037          * to override some hardware settings.
1038          */
1039         err = mlx5_args(config, dpdk_dev->devargs);
1040         if (err) {
1041                 err = rte_errno;
1042                 DRV_LOG(ERR, "failed to process device arguments: %s",
1043                         strerror(rte_errno));
1044                 goto error;
1045         }
1046         if (config->dv_miss_info) {
1047                 if (switch_info->master || switch_info->representor)
1048                         config->dv_xmeta_en = MLX5_XMETA_MODE_META16;
1049         }
1050         mlx5_malloc_mem_select(config->sys_mem_en);
1051         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
1052         if (!sh)
1053                 return NULL;
1054         config->devx = sh->devx;
1055 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
1056         config->dest_tir = 1;
1057 #endif
1058 #ifdef HAVE_IBV_MLX5_MOD_SWP
1059         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1060 #endif
1061         /*
1062          * Multi-packet send is supported by ConnectX-4 Lx PF as well
1063          * as all ConnectX-5 devices.
1064          */
1065 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1066         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1067 #endif
1068 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1069         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1070 #endif
1071         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1072         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1073                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1074                         DRV_LOG(DEBUG, "enhanced MPW is supported");
1075                         mps = MLX5_MPW_ENHANCED;
1076                 } else {
1077                         DRV_LOG(DEBUG, "MPW is supported");
1078                         mps = MLX5_MPW;
1079                 }
1080         } else {
1081                 DRV_LOG(DEBUG, "MPW isn't supported");
1082                 mps = MLX5_MPW_DISABLED;
1083         }
1084 #ifdef HAVE_IBV_MLX5_MOD_SWP
1085         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1086                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1087         DRV_LOG(DEBUG, "SWP support: %u", swp);
1088 #endif
1089         config->swp = !!swp;
1090 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1091         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1092                 struct mlx5dv_striding_rq_caps mprq_caps =
1093                         dv_attr.striding_rq_caps;
1094
1095                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1096                         mprq_caps.min_single_stride_log_num_of_bytes);
1097                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1098                         mprq_caps.max_single_stride_log_num_of_bytes);
1099                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1100                         mprq_caps.min_single_wqe_log_num_of_strides);
1101                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1102                         mprq_caps.max_single_wqe_log_num_of_strides);
1103                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1104                         mprq_caps.supported_qpts);
1105                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1106                 mprq = 1;
1107                 mprq_min_stride_size_n =
1108                         mprq_caps.min_single_stride_log_num_of_bytes;
1109                 mprq_max_stride_size_n =
1110                         mprq_caps.max_single_stride_log_num_of_bytes;
1111                 mprq_min_stride_num_n =
1112                         mprq_caps.min_single_wqe_log_num_of_strides;
1113                 mprq_max_stride_num_n =
1114                         mprq_caps.max_single_wqe_log_num_of_strides;
1115         }
1116 #endif
1117         /* Rx CQE compression is enabled by default. */
1118         config->cqe_comp = 1;
1119 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1120         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1121                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1122                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1123                              (dv_attr.tunnel_offloads_caps &
1124                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
1125                              (dv_attr.tunnel_offloads_caps &
1126                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
1127         }
1128         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1129                 tunnel_en ? "" : "not ");
1130 #else
1131         DRV_LOG(WARNING,
1132                 "tunnel offloading disabled due to old OFED/rdma-core version");
1133 #endif
1134         config->tunnel_en = tunnel_en;
1135 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1136         mpls_en = ((dv_attr.tunnel_offloads_caps &
1137                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1138                    (dv_attr.tunnel_offloads_caps &
1139                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1140         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1141                 mpls_en ? "" : "not ");
1142 #else
1143         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1144                 " old OFED/rdma-core version or firmware configuration");
1145 #endif
1146         config->mpls_en = mpls_en;
1147         /* Check port status. */
1148         err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
1149         if (err) {
1150                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1151                 goto error;
1152         }
1153         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1154                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1155                 err = EINVAL;
1156                 goto error;
1157         }
1158         if (port_attr.state != IBV_PORT_ACTIVE)
1159                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1160                         mlx5_glue->port_state_str(port_attr.state),
1161                         port_attr.state);
1162         /* Allocate private eth device data. */
1163         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
1164                            sizeof(*priv),
1165                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1166         if (priv == NULL) {
1167                 DRV_LOG(ERR, "priv allocation failure");
1168                 err = ENOMEM;
1169                 goto error;
1170         }
1171         priv->sh = sh;
1172         priv->dev_port = spawn->phys_port;
1173         priv->pci_dev = spawn->pci_dev;
1174         priv->mtu = RTE_ETHER_MTU;
1175         /* Some internal functions rely on Netlink sockets, open them now. */
1176         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1177         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1178         priv->representor = !!switch_info->representor;
1179         priv->master = !!switch_info->master;
1180         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1181         priv->vport_meta_tag = 0;
1182         priv->vport_meta_mask = 0;
1183         priv->pf_bond = spawn->pf_bond;
1184         /*
1185          * If we have E-Switch we should determine the vport attributes.
1186          * E-Switch may use either source vport field or reg_c[0] metadata
1187          * register to match on vport index. The engaged part of metadata
1188          * register is defined by mask.
1189          */
1190         if (switch_info->representor || switch_info->master) {
1191                 err = mlx5_glue->devx_port_query(sh->ctx,
1192                                                  spawn->phys_port,
1193                                                  &vport_info);
1194                 if (err) {
1195                         DRV_LOG(WARNING,
1196                                 "can't query devx port %d on device %s",
1197                                 spawn->phys_port,
1198                                 mlx5_os_get_dev_device_name(spawn->phys_dev));
1199                         vport_info.query_flags = 0;
1200                 }
1201         }
1202         if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) {
1203                 priv->vport_meta_tag = vport_info.vport_meta_tag;
1204                 priv->vport_meta_mask = vport_info.vport_meta_mask;
1205                 if (!priv->vport_meta_mask) {
1206                         DRV_LOG(ERR, "vport zero mask for port %d"
1207                                      " on bonding device %s",
1208                                      spawn->phys_port,
1209                                      mlx5_os_get_dev_device_name
1210                                                         (spawn->phys_dev));
1211                         err = ENOTSUP;
1212                         goto error;
1213                 }
1214                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
1215                         DRV_LOG(ERR, "invalid vport tag for port %d"
1216                                      " on bonding device %s",
1217                                      spawn->phys_port,
1218                                      mlx5_os_get_dev_device_name
1219                                                         (spawn->phys_dev));
1220                         err = ENOTSUP;
1221                         goto error;
1222                 }
1223         }
1224         if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) {
1225                 priv->vport_id = vport_info.vport_id;
1226         } else if (spawn->pf_bond >= 0 &&
1227                    (switch_info->representor || switch_info->master)) {
1228                 DRV_LOG(ERR, "can't deduce vport index for port %d"
1229                              " on bonding device %s",
1230                              spawn->phys_port,
1231                              mlx5_os_get_dev_device_name(spawn->phys_dev));
1232                 err = ENOTSUP;
1233                 goto error;
1234         } else {
1235                 /*
1236                  * Suppose vport index in compatible way. Kernel/rdma_core
1237                  * support single E-Switch per PF configurations only and
1238                  * vport_id field contains the vport index for associated VF,
1239                  * which is deduced from representor port name.
1240                  * For example, let's have the IB device port 10, it has
1241                  * attached network device eth0, which has port name attribute
1242                  * pf0vf2, we can deduce the VF number as 2, and set vport index
1243                  * as 3 (2+1). This assigning schema should be changed if the
1244                  * multiple E-Switch instances per PF configurations or/and PCI
1245                  * subfunctions are added.
1246                  */
1247                 priv->vport_id = switch_info->representor ?
1248                                  switch_info->port_name + 1 : -1;
1249         }
1250         priv->representor_id = mlx5_representor_id_encode(switch_info,
1251                                                           eth_da->type);
1252         /*
1253          * Look for sibling devices in order to reuse their switch domain
1254          * if any, otherwise allocate one.
1255          */
1256         MLX5_ETH_FOREACH_DEV(port_id, NULL) {
1257                 const struct mlx5_priv *opriv =
1258                         rte_eth_devices[port_id].data->dev_private;
1259
1260                 if (!opriv ||
1261                     opriv->sh != priv->sh ||
1262                         opriv->domain_id ==
1263                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1264                         continue;
1265                 priv->domain_id = opriv->domain_id;
1266                 break;
1267         }
1268         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1269                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1270                 if (err) {
1271                         err = rte_errno;
1272                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1273                                 strerror(rte_errno));
1274                         goto error;
1275                 }
1276                 own_domain_id = 1;
1277         }
1278         /* Override some values set by hardware configuration. */
1279         mlx5_args(config, dpdk_dev->devargs);
1280         err = mlx5_dev_check_sibling_config(priv, config);
1281         if (err)
1282                 goto error;
1283         config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1284                             IBV_DEVICE_RAW_IP_CSUM);
1285         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1286                 (config->hw_csum ? "" : "not "));
1287 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1288         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1289         DRV_LOG(DEBUG, "counters are not supported");
1290 #endif
1291 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
1292         if (config->dv_flow_en) {
1293                 DRV_LOG(WARNING, "DV flow is not supported");
1294                 config->dv_flow_en = 0;
1295         }
1296 #endif
1297         if (spawn->max_port > UINT8_MAX) {
1298                 /* Verbs can't support ports larger than 255 by design. */
1299                 DRV_LOG(ERR, "can't support IB ports > UINT8_MAX");
1300                 err = EINVAL;
1301                 goto error;
1302         }
1303         config->ind_table_max_size =
1304                 sh->device_attr.max_rwq_indirection_table_size;
1305         /*
1306          * Remove this check once DPDK supports larger/variable
1307          * indirection tables.
1308          */
1309         if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1310                 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1311         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1312                 config->ind_table_max_size);
1313         config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1314                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1315         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1316                 (config->hw_vlan_strip ? "" : "not "));
1317         config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1318                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1319 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1320         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1321 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1322         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1323                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1324 #endif
1325         if (config->hw_padding && !hw_padding) {
1326                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1327                 config->hw_padding = 0;
1328         } else if (config->hw_padding) {
1329                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1330         }
1331         config->tso = (sh->device_attr.max_tso > 0 &&
1332                       (sh->device_attr.tso_supported_qpts &
1333                        (1 << IBV_QPT_RAW_PACKET)));
1334         if (config->tso)
1335                 config->tso_max_payload_sz = sh->device_attr.max_tso;
1336         /*
1337          * MPW is disabled by default, while the Enhanced MPW is enabled
1338          * by default.
1339          */
1340         if (config->mps == MLX5_ARG_UNSET)
1341                 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1342                                                           MLX5_MPW_DISABLED;
1343         else
1344                 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
1345         DRV_LOG(INFO, "%sMPS is %s",
1346                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1347                 config->mps == MLX5_MPW ? "legacy " : "",
1348                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1349         if (config->devx) {
1350                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
1351                 if (err) {
1352                         err = -err;
1353                         goto error;
1354                 }
1355                 /* Check relax ordering support. */
1356                 if (!haswell_broadwell_cpu) {
1357                         sh->cmng.relaxed_ordering_write =
1358                                 config->hca_attr.relaxed_ordering_write;
1359                         sh->cmng.relaxed_ordering_read =
1360                                 config->hca_attr.relaxed_ordering_read;
1361                 } else {
1362                         sh->cmng.relaxed_ordering_read = 0;
1363                         sh->cmng.relaxed_ordering_write = 0;
1364                 }
1365                 sh->rq_ts_format = config->hca_attr.rq_ts_format;
1366                 sh->sq_ts_format = config->hca_attr.sq_ts_format;
1367                 sh->steering_format_version =
1368                         config->hca_attr.steering_format_version;
1369                 sh->qp_ts_format = config->hca_attr.qp_ts_format;
1370                 /* Check for LRO support. */
1371                 if (config->dest_tir && config->hca_attr.lro_cap &&
1372                     config->dv_flow_en) {
1373                         /* TBD check tunnel lro caps. */
1374                         config->lro.supported = config->hca_attr.lro_cap;
1375                         DRV_LOG(DEBUG, "Device supports LRO");
1376                         /*
1377                          * If LRO timeout is not configured by application,
1378                          * use the minimal supported value.
1379                          */
1380                         if (!config->lro.timeout)
1381                                 config->lro.timeout =
1382                                 config->hca_attr.lro_timer_supported_periods[0];
1383                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1384                                 config->lro.timeout);
1385                         DRV_LOG(DEBUG, "LRO minimal size of TCP segment "
1386                                 "required for coalescing is %d bytes",
1387                                 config->hca_attr.lro_min_mss_size);
1388                 }
1389 #if defined(HAVE_MLX5DV_DR) && \
1390         (defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \
1391          defined(HAVE_MLX5_DR_CREATE_ACTION_ASO))
1392                 if (config->hca_attr.qos.sup &&
1393                     config->hca_attr.qos.flow_meter_old &&
1394                     config->dv_flow_en) {
1395                         uint8_t reg_c_mask =
1396                                 config->hca_attr.qos.flow_meter_reg_c_ids;
1397                         /*
1398                          * Meter needs two REG_C's for color match and pre-sfx
1399                          * flow match. Here get the REG_C for color match.
1400                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
1401                          */
1402                         reg_c_mask &= 0xfc;
1403                         if (__builtin_popcount(reg_c_mask) < 1) {
1404                                 priv->mtr_en = 0;
1405                                 DRV_LOG(WARNING, "No available register for"
1406                                         " meter.");
1407                         } else {
1408                                 /*
1409                                  * The meter color register is used by the
1410                                  * flow-hit feature as well.
1411                                  * The flow-hit feature must use REG_C_3
1412                                  * Prefer REG_C_3 if it is available.
1413                                  */
1414                                 if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
1415                                         priv->mtr_color_reg = REG_C_3;
1416                                 else
1417                                         priv->mtr_color_reg = ffs(reg_c_mask)
1418                                                               - 1 + REG_C_0;
1419                                 priv->mtr_en = 1;
1420                                 priv->mtr_reg_share =
1421                                       config->hca_attr.qos.flow_meter;
1422                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1423                                         priv->mtr_color_reg);
1424                         }
1425                 }
1426                 if (config->hca_attr.qos.sup &&
1427                         config->hca_attr.qos.flow_meter_aso_sup) {
1428                         uint32_t log_obj_size =
1429                                 rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
1430                         if (log_obj_size >=
1431                         config->hca_attr.qos.log_meter_aso_granularity &&
1432                         log_obj_size <=
1433                         config->hca_attr.qos.log_meter_aso_max_alloc)
1434                                 sh->meter_aso_en = 1;
1435                 }
1436                 if (priv->mtr_en) {
1437                         err = mlx5_aso_flow_mtrs_mng_init(priv->sh);
1438                         if (err) {
1439                                 err = -err;
1440                                 goto error;
1441                         }
1442                 }
1443                 if (config->hca_attr.flow.tunnel_header_0_1)
1444                         sh->tunnel_header_0_1 = 1;
1445 #endif
1446 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
1447                 if (config->hca_attr.flow_hit_aso &&
1448                     priv->mtr_color_reg == REG_C_3) {
1449                         sh->flow_hit_aso_en = 1;
1450                         err = mlx5_flow_aso_age_mng_init(sh);
1451                         if (err) {
1452                                 err = -err;
1453                                 goto error;
1454                         }
1455                         DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
1456                 }
1457 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
1458 #if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO) && \
1459         defined(HAVE_MLX5_DR_ACTION_ASO_CT)
1460                 if (config->hca_attr.ct_offload &&
1461                     priv->mtr_color_reg == REG_C_3) {
1462                         err = mlx5_flow_aso_ct_mng_init(sh);
1463                         if (err) {
1464                                 err = -err;
1465                                 goto error;
1466                         }
1467                         DRV_LOG(DEBUG, "CT ASO is supported.");
1468                         sh->ct_aso_en = 1;
1469                 }
1470 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */
1471 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1472                 if (config->hca_attr.log_max_ft_sampler_num > 0  &&
1473                     config->dv_flow_en) {
1474                         priv->sampler_en = 1;
1475                         DRV_LOG(DEBUG, "Sampler enabled!");
1476                 } else {
1477                         priv->sampler_en = 0;
1478                         if (!config->hca_attr.log_max_ft_sampler_num)
1479                                 DRV_LOG(WARNING,
1480                                         "No available register for sampler.");
1481                         else
1482                                 DRV_LOG(DEBUG, "DV flow is not supported!");
1483                 }
1484 #endif
1485         }
1486         if (config->cqe_comp && RTE_CACHE_LINE_SIZE == 128 &&
1487             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) {
1488                 DRV_LOG(WARNING, "Rx CQE 128B compression is not supported");
1489                 config->cqe_comp = 0;
1490         }
1491         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_FTAG_STRIDX &&
1492             (!config->devx || !config->hca_attr.mini_cqe_resp_flow_tag)) {
1493                 DRV_LOG(WARNING, "Flow Tag CQE compression"
1494                                  " format isn't supported.");
1495                 config->cqe_comp = 0;
1496         }
1497         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_L34H_STRIDX &&
1498             (!config->devx || !config->hca_attr.mini_cqe_resp_l3_l4_tag)) {
1499                 DRV_LOG(WARNING, "L3/L4 Header CQE compression"
1500                                  " format isn't supported.");
1501                 config->cqe_comp = 0;
1502         }
1503         DRV_LOG(DEBUG, "Rx CQE compression is %ssupported",
1504                         config->cqe_comp ? "" : "not ");
1505         if (config->tx_pp) {
1506                 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1507                         config->hca_attr.dev_freq_khz);
1508                 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1509                         config->hca_attr.qos.packet_pacing ? "" : "not ");
1510                 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1511                         config->hca_attr.cross_channel ? "" : "not ");
1512                 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1513                         config->hca_attr.wqe_index_ignore ? "" : "not ");
1514                 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1515                         config->hca_attr.non_wire_sq ? "" : "not ");
1516                 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1517                         config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1518                         config->hca_attr.log_max_static_sq_wq);
1519                 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1520                         config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1521                 if (!config->devx) {
1522                         DRV_LOG(ERR, "DevX is required for packet pacing");
1523                         err = ENODEV;
1524                         goto error;
1525                 }
1526                 if (!config->hca_attr.qos.packet_pacing) {
1527                         DRV_LOG(ERR, "Packet pacing is not supported");
1528                         err = ENODEV;
1529                         goto error;
1530                 }
1531                 if (!config->hca_attr.cross_channel) {
1532                         DRV_LOG(ERR, "Cross channel operations are"
1533                                      " required for packet pacing");
1534                         err = ENODEV;
1535                         goto error;
1536                 }
1537                 if (!config->hca_attr.wqe_index_ignore) {
1538                         DRV_LOG(ERR, "WQE index ignore feature is"
1539                                      " required for packet pacing");
1540                         err = ENODEV;
1541                         goto error;
1542                 }
1543                 if (!config->hca_attr.non_wire_sq) {
1544                         DRV_LOG(ERR, "Non-wire SQ feature is"
1545                                      " required for packet pacing");
1546                         err = ENODEV;
1547                         goto error;
1548                 }
1549                 if (!config->hca_attr.log_max_static_sq_wq) {
1550                         DRV_LOG(ERR, "Static WQE SQ feature is"
1551                                      " required for packet pacing");
1552                         err = ENODEV;
1553                         goto error;
1554                 }
1555                 if (!config->hca_attr.qos.wqe_rate_pp) {
1556                         DRV_LOG(ERR, "WQE rate mode is required"
1557                                      " for packet pacing");
1558                         err = ENODEV;
1559                         goto error;
1560                 }
1561 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1562                 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1563                              " can't create queues for packet pacing");
1564                 err = ENODEV;
1565                 goto error;
1566 #endif
1567         }
1568         if (config->devx) {
1569                 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1570
1571                 err = config->hca_attr.access_register_user ?
1572                         mlx5_devx_cmd_register_read
1573                                 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1574                                 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1575                 if (!err) {
1576                         uint32_t ts_mode;
1577
1578                         /* MTUTC register is read successfully. */
1579                         ts_mode = MLX5_GET(register_mtutc, reg,
1580                                            time_stamp_mode);
1581                         if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1582                                 config->rt_timestamp = 1;
1583                 } else {
1584                         /* Kernel does not support register reading. */
1585                         if (config->hca_attr.dev_freq_khz ==
1586                                                  (NS_PER_S / MS_PER_S))
1587                                 config->rt_timestamp = 1;
1588                 }
1589         }
1590         /*
1591          * If HW has bug working with tunnel packet decapsulation and
1592          * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1593          * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1594          */
1595         if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1596                 config->hw_fcs_strip = 0;
1597         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1598                 (config->hw_fcs_strip ? "" : "not "));
1599         if (config->mprq.enabled && mprq) {
1600                 if (config->mprq.stride_num_n &&
1601                     (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1602                      config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1603                         config->mprq.stride_num_n =
1604                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1605                                                 mprq_min_stride_num_n),
1606                                         mprq_max_stride_num_n);
1607                         DRV_LOG(WARNING,
1608                                 "the number of strides"
1609                                 " for Multi-Packet RQ is out of range,"
1610                                 " setting default value (%u)",
1611                                 1 << config->mprq.stride_num_n);
1612                 }
1613                 if (config->mprq.stride_size_n &&
1614                     (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1615                      config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1616                         config->mprq.stride_size_n =
1617                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1618                                                 mprq_min_stride_size_n),
1619                                         mprq_max_stride_size_n);
1620                         DRV_LOG(WARNING,
1621                                 "the size of a stride"
1622                                 " for Multi-Packet RQ is out of range,"
1623                                 " setting default value (%u)",
1624                                 1 << config->mprq.stride_size_n);
1625                 }
1626                 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1627                 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1628         } else if (config->mprq.enabled && !mprq) {
1629                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1630                 config->mprq.enabled = 0;
1631         }
1632         if (config->max_dump_files_num == 0)
1633                 config->max_dump_files_num = 128;
1634         eth_dev = rte_eth_dev_allocate(name);
1635         if (eth_dev == NULL) {
1636                 DRV_LOG(ERR, "can not allocate rte ethdev");
1637                 err = ENOMEM;
1638                 goto error;
1639         }
1640         if (priv->representor) {
1641                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1642                 eth_dev->data->representor_id = priv->representor_id;
1643         }
1644         priv->mp_id.port_id = eth_dev->data->port_id;
1645         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
1646         /*
1647          * Store associated network device interface index. This index
1648          * is permanent throughout the lifetime of device. So, we may store
1649          * the ifindex here and use the cached value further.
1650          */
1651         MLX5_ASSERT(spawn->ifindex);
1652         priv->if_index = spawn->ifindex;
1653         eth_dev->data->dev_private = priv;
1654         priv->dev_data = eth_dev->data;
1655         eth_dev->data->mac_addrs = priv->mac;
1656         eth_dev->device = dpdk_dev;
1657         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1658         /* Configure the first MAC address by default. */
1659         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1660                 DRV_LOG(ERR,
1661                         "port %u cannot get MAC address, is mlx5_en"
1662                         " loaded? (errno: %s)",
1663                         eth_dev->data->port_id, strerror(rte_errno));
1664                 err = ENODEV;
1665                 goto error;
1666         }
1667         DRV_LOG(INFO,
1668                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1669                 eth_dev->data->port_id,
1670                 mac.addr_bytes[0], mac.addr_bytes[1],
1671                 mac.addr_bytes[2], mac.addr_bytes[3],
1672                 mac.addr_bytes[4], mac.addr_bytes[5]);
1673 #ifdef RTE_LIBRTE_MLX5_DEBUG
1674         {
1675                 char ifname[MLX5_NAMESIZE];
1676
1677                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1678                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1679                                 eth_dev->data->port_id, ifname);
1680                 else
1681                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1682                                 eth_dev->data->port_id);
1683         }
1684 #endif
1685         /* Get actual MTU if possible. */
1686         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1687         if (err) {
1688                 err = rte_errno;
1689                 goto error;
1690         }
1691         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1692                 priv->mtu);
1693         /* Initialize burst functions to prevent crashes before link-up. */
1694         eth_dev->rx_pkt_burst = removed_rx_burst;
1695         eth_dev->tx_pkt_burst = removed_tx_burst;
1696         eth_dev->dev_ops = &mlx5_dev_ops;
1697         eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1698         eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1699         eth_dev->rx_queue_count = mlx5_rx_queue_count;
1700         /* Register MAC address. */
1701         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1702         if (config->vf && config->vf_nl_en)
1703                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1704                                       mlx5_ifindex(eth_dev),
1705                                       eth_dev->data->mac_addrs,
1706                                       MLX5_MAX_MAC_ADDRESSES);
1707         priv->ctrl_flows = 0;
1708         rte_spinlock_init(&priv->flow_list_lock);
1709         TAILQ_INIT(&priv->flow_meters);
1710         priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR);
1711         if (!priv->mtr_profile_tbl)
1712                 goto error;
1713         /* Hint libmlx5 to use PMD allocator for data plane resources */
1714         mlx5_glue->dv_set_context_attr(sh->ctx,
1715                         MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1716                         (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
1717                                 .alloc = &mlx5_alloc_verbs_buf,
1718                                 .free = &mlx5_free_verbs_buf,
1719                                 .data = sh,
1720                         }));
1721         /* Bring Ethernet device up. */
1722         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1723                 eth_dev->data->port_id);
1724         mlx5_set_link_up(eth_dev);
1725         /*
1726          * Even though the interrupt handler is not installed yet,
1727          * interrupts will still trigger on the async_fd from
1728          * Verbs context returned by ibv_open_device().
1729          */
1730         mlx5_link_update(eth_dev, 0);
1731 #ifdef HAVE_MLX5DV_DR_ESWITCH
1732         if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1733               (switch_info->representor || switch_info->master)))
1734                 config->dv_esw_en = 0;
1735 #else
1736         config->dv_esw_en = 0;
1737 #endif
1738         /* Detect minimal data bytes to inline. */
1739         mlx5_set_min_inline(spawn, config);
1740         /* Store device configuration on private structure. */
1741         priv->config = *config;
1742         for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
1743                 icfg[i].release_mem_en = !!config->reclaim_mode;
1744                 if (config->reclaim_mode)
1745                         icfg[i].per_core_cache = 0;
1746                 priv->flows[i] = mlx5_ipool_create(&icfg[i]);
1747                 if (!priv->flows[i])
1748                         goto error;
1749         }
1750         /* Create context for virtual machine VLAN workaround. */
1751         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1752         if (config->dv_flow_en) {
1753                 err = mlx5_alloc_shared_dr(priv);
1754                 if (err)
1755                         goto error;
1756         }
1757         if (config->devx && config->dv_flow_en && config->dest_tir) {
1758                 priv->obj_ops = devx_obj_ops;
1759                 priv->obj_ops.drop_action_create =
1760                                                 ibv_obj_ops.drop_action_create;
1761                 priv->obj_ops.drop_action_destroy =
1762                                                 ibv_obj_ops.drop_action_destroy;
1763 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1764                 priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify;
1765 #else
1766                 if (config->dv_esw_en)
1767                         priv->obj_ops.txq_obj_modify =
1768                                                 ibv_obj_ops.txq_obj_modify;
1769 #endif
1770                 /* Use specific wrappers for Tx object. */
1771                 priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;
1772                 priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;
1773                 mlx5_queue_counter_id_prepare(eth_dev);
1774                 priv->obj_ops.lb_dummy_queue_create =
1775                                         mlx5_rxq_ibv_obj_dummy_lb_create;
1776                 priv->obj_ops.lb_dummy_queue_release =
1777                                         mlx5_rxq_ibv_obj_dummy_lb_release;
1778         } else {
1779                 priv->obj_ops = ibv_obj_ops;
1780         }
1781         if (config->tx_pp &&
1782             (priv->config.dv_esw_en ||
1783              priv->obj_ops.txq_obj_new != mlx5_os_txq_obj_new)) {
1784                 /*
1785                  * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support
1786                  * packet pacing and already checked above.
1787                  * Hence, we should only make sure the SQs will be created
1788                  * with DevX, not with Verbs.
1789                  * Verbs allocates the SQ UAR on its own and it can't be shared
1790                  * with Clock Queue UAR as required for Tx scheduling.
1791                  */
1792                 DRV_LOG(ERR, "Verbs SQs, UAR can't be shared as required for packet pacing");
1793                 err = ENODEV;
1794                 goto error;
1795         }
1796         priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
1797         if (!priv->drop_queue.hrxq)
1798                 goto error;
1799         /* Supported Verbs flow priority number detection. */
1800         err = mlx5_flow_discover_priorities(eth_dev);
1801         if (err < 0) {
1802                 err = -err;
1803                 goto error;
1804         }
1805         priv->config.flow_prio = err;
1806         if (!priv->config.dv_esw_en &&
1807             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1808                 DRV_LOG(WARNING, "metadata mode %u is not supported "
1809                                  "(no E-Switch)", priv->config.dv_xmeta_en);
1810                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1811         }
1812         mlx5_set_metadata_mask(eth_dev);
1813         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1814             !priv->sh->dv_regc0_mask) {
1815                 DRV_LOG(ERR, "metadata mode %u is not supported "
1816                              "(no metadata reg_c[0] is available)",
1817                              priv->config.dv_xmeta_en);
1818                         err = ENOTSUP;
1819                         goto error;
1820         }
1821         priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true,
1822                                        mlx5_hrxq_create_cb,
1823                                        mlx5_hrxq_match_cb,
1824                                        mlx5_hrxq_remove_cb,
1825                                        mlx5_hrxq_clone_cb,
1826                                        mlx5_hrxq_clone_free_cb);
1827         if (!priv->hrxqs)
1828                 goto error;
1829         rte_rwlock_init(&priv->ind_tbls_lock);
1830         /* Query availability of metadata reg_c's. */
1831         err = mlx5_flow_discover_mreg_c(eth_dev);
1832         if (err < 0) {
1833                 err = -err;
1834                 goto error;
1835         }
1836         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1837                 DRV_LOG(DEBUG,
1838                         "port %u extensive metadata register is not supported",
1839                         eth_dev->data->port_id);
1840                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1841                         DRV_LOG(ERR, "metadata mode %u is not supported "
1842                                      "(no metadata registers available)",
1843                                      priv->config.dv_xmeta_en);
1844                         err = ENOTSUP;
1845                         goto error;
1846                 }
1847         }
1848         if (priv->config.dv_flow_en &&
1849             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1850             mlx5_flow_ext_mreg_supported(eth_dev) &&
1851             priv->sh->dv_regc0_mask) {
1852                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1853                                                       MLX5_FLOW_MREG_HTABLE_SZ,
1854                                                       false, true, eth_dev,
1855                                                       flow_dv_mreg_create_cb,
1856                                                       flow_dv_mreg_match_cb,
1857                                                       flow_dv_mreg_remove_cb,
1858                                                       flow_dv_mreg_clone_cb,
1859                                                     flow_dv_mreg_clone_free_cb);
1860                 if (!priv->mreg_cp_tbl) {
1861                         err = ENOMEM;
1862                         goto error;
1863                 }
1864         }
1865         rte_spinlock_init(&priv->shared_act_sl);
1866         mlx5_flow_counter_mode_config(eth_dev);
1867         if (priv->config.dv_flow_en)
1868                 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
1869         return eth_dev;
1870 error:
1871         if (priv) {
1872                 if (priv->mreg_cp_tbl)
1873                         mlx5_hlist_destroy(priv->mreg_cp_tbl);
1874                 if (priv->sh)
1875                         mlx5_os_free_shared_dr(priv);
1876                 if (priv->nl_socket_route >= 0)
1877                         close(priv->nl_socket_route);
1878                 if (priv->nl_socket_rdma >= 0)
1879                         close(priv->nl_socket_rdma);
1880                 if (priv->vmwa_context)
1881                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1882                 if (eth_dev && priv->drop_queue.hrxq)
1883                         mlx5_drop_action_destroy(eth_dev);
1884                 if (priv->mtr_profile_tbl)
1885                         mlx5_l3t_destroy(priv->mtr_profile_tbl);
1886                 if (own_domain_id)
1887                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1888                 if (priv->hrxqs)
1889                         mlx5_list_destroy(priv->hrxqs);
1890                 mlx5_free(priv);
1891                 if (eth_dev != NULL)
1892                         eth_dev->data->dev_private = NULL;
1893         }
1894         if (eth_dev != NULL) {
1895                 /* mac_addrs must not be freed alone because part of
1896                  * dev_private
1897                  **/
1898                 eth_dev->data->mac_addrs = NULL;
1899                 rte_eth_dev_release_port(eth_dev);
1900         }
1901         if (sh)
1902                 mlx5_free_shared_dev_ctx(sh);
1903         MLX5_ASSERT(err > 0);
1904         rte_errno = err;
1905         return NULL;
1906 }
1907
1908 /**
1909  * Comparison callback to sort device data.
1910  *
1911  * This is meant to be used with qsort().
1912  *
1913  * @param a[in]
1914  *   Pointer to pointer to first data object.
1915  * @param b[in]
1916  *   Pointer to pointer to second data object.
1917  *
1918  * @return
1919  *   0 if both objects are equal, less than 0 if the first argument is less
1920  *   than the second, greater than 0 otherwise.
1921  */
1922 static int
1923 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1924 {
1925         const struct mlx5_switch_info *si_a =
1926                 &((const struct mlx5_dev_spawn_data *)a)->info;
1927         const struct mlx5_switch_info *si_b =
1928                 &((const struct mlx5_dev_spawn_data *)b)->info;
1929         int ret;
1930
1931         /* Master device first. */
1932         ret = si_b->master - si_a->master;
1933         if (ret)
1934                 return ret;
1935         /* Then representor devices. */
1936         ret = si_b->representor - si_a->representor;
1937         if (ret)
1938                 return ret;
1939         /* Unidentified devices come last in no specific order. */
1940         if (!si_a->representor)
1941                 return 0;
1942         /* Order representors by name. */
1943         return si_a->port_name - si_b->port_name;
1944 }
1945
1946 /**
1947  * Match PCI information for possible slaves of bonding device.
1948  *
1949  * @param[in] ibv_dev
1950  *   Pointer to Infiniband device structure.
1951  * @param[in] pci_dev
1952  *   Pointer to primary PCI address structure to match.
1953  * @param[in] nl_rdma
1954  *   Netlink RDMA group socket handle.
1955  * @param[in] owner
1956  *   Rerepsentor owner PF index.
1957  * @param[out] bond_info
1958  *   Pointer to bonding information.
1959  *
1960  * @return
1961  *   negative value if no bonding device found, otherwise
1962  *   positive index of slave PF in bonding.
1963  */
1964 static int
1965 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1966                            const struct rte_pci_addr *pci_dev,
1967                            int nl_rdma, uint16_t owner,
1968                            struct mlx5_bond_info *bond_info)
1969 {
1970         char ifname[IF_NAMESIZE + 1];
1971         unsigned int ifindex;
1972         unsigned int np, i;
1973         FILE *bond_file = NULL, *file;
1974         int pf = -1;
1975         int ret;
1976
1977         /*
1978          * Try to get master device name. If something goes
1979          * wrong suppose the lack of kernel support and no
1980          * bonding devices.
1981          */
1982         memset(bond_info, 0, sizeof(*bond_info));
1983         if (nl_rdma < 0)
1984                 return -1;
1985         if (!strstr(ibv_dev->name, "bond"))
1986                 return -1;
1987         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
1988         if (!np)
1989                 return -1;
1990         /*
1991          * The Master device might not be on the predefined
1992          * port (not on port index 1, it is not garanted),
1993          * we have to scan all Infiniband device port and
1994          * find master.
1995          */
1996         for (i = 1; i <= np; ++i) {
1997                 /* Check whether Infiniband port is populated. */
1998                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
1999                 if (!ifindex)
2000                         continue;
2001                 if (!if_indextoname(ifindex, ifname))
2002                         continue;
2003                 /* Try to read bonding slave names from sysfs. */
2004                 MKSTR(slaves,
2005                       "/sys/class/net/%s/master/bonding/slaves", ifname);
2006                 bond_file = fopen(slaves, "r");
2007                 if (bond_file)
2008                         break;
2009         }
2010         if (!bond_file)
2011                 return -1;
2012         /* Use safe format to check maximal buffer length. */
2013         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
2014         while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
2015                 char tmp_str[IF_NAMESIZE + 32];
2016                 struct rte_pci_addr pci_addr;
2017                 struct mlx5_switch_info info;
2018
2019                 /* Process slave interface names in the loop. */
2020                 snprintf(tmp_str, sizeof(tmp_str),
2021                          "/sys/class/net/%s", ifname);
2022                 if (mlx5_get_pci_addr(tmp_str, &pci_addr)) {
2023                         DRV_LOG(WARNING, "can not get PCI address"
2024                                          " for netdev \"%s\"", ifname);
2025                         continue;
2026                 }
2027                 /* Slave interface PCI address match found. */
2028                 snprintf(tmp_str, sizeof(tmp_str),
2029                          "/sys/class/net/%s/phys_port_name", ifname);
2030                 file = fopen(tmp_str, "rb");
2031                 if (!file)
2032                         break;
2033                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
2034                 if (fscanf(file, "%32s", tmp_str) == 1)
2035                         mlx5_translate_port_name(tmp_str, &info);
2036                 fclose(file);
2037                 /* Only process PF ports. */
2038                 if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY &&
2039                     info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
2040                         continue;
2041                 /* Check max bonding member. */
2042                 if (info.port_name >= MLX5_BOND_MAX_PORTS) {
2043                         DRV_LOG(WARNING, "bonding index out of range, "
2044                                 "please increase MLX5_BOND_MAX_PORTS: %s",
2045                                 tmp_str);
2046                         break;
2047                 }
2048                 /* Match PCI address, allows BDF0+pfx or BDFx+pfx. */
2049                 if (pci_dev->domain == pci_addr.domain &&
2050                     pci_dev->bus == pci_addr.bus &&
2051                     pci_dev->devid == pci_addr.devid &&
2052                     ((pci_dev->function == 0 &&
2053                       pci_dev->function + owner == pci_addr.function) ||
2054                      (pci_dev->function == owner &&
2055                       pci_addr.function == owner)))
2056                         pf = info.port_name;
2057                 /* Get ifindex. */
2058                 snprintf(tmp_str, sizeof(tmp_str),
2059                          "/sys/class/net/%s/ifindex", ifname);
2060                 file = fopen(tmp_str, "rb");
2061                 if (!file)
2062                         break;
2063                 ret = fscanf(file, "%u", &ifindex);
2064                 fclose(file);
2065                 if (ret != 1)
2066                         break;
2067                 /* Save bonding info. */
2068                 strncpy(bond_info->ports[info.port_name].ifname, ifname,
2069                         sizeof(bond_info->ports[0].ifname));
2070                 bond_info->ports[info.port_name].pci_addr = pci_addr;
2071                 bond_info->ports[info.port_name].ifindex = ifindex;
2072                 bond_info->n_port++;
2073         }
2074         if (pf >= 0) {
2075                 /* Get bond interface info */
2076                 ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex,
2077                                            bond_info->ifname);
2078                 if (ret)
2079                         DRV_LOG(ERR, "unable to get bond info: %s",
2080                                 strerror(rte_errno));
2081                 else
2082                         DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
2083                                 ifindex, bond_info->ifindex, bond_info->ifname);
2084         }
2085         return pf;
2086 }
2087
2088 static void
2089 mlx5_os_config_default(struct mlx5_dev_config *config)
2090 {
2091         memset(config, 0, sizeof(*config));
2092         config->mps = MLX5_ARG_UNSET;
2093         config->dbnc = MLX5_ARG_UNSET;
2094         config->rx_vec_en = 1;
2095         config->txq_inline_max = MLX5_ARG_UNSET;
2096         config->txq_inline_min = MLX5_ARG_UNSET;
2097         config->txq_inline_mpw = MLX5_ARG_UNSET;
2098         config->txqs_inline = MLX5_ARG_UNSET;
2099         config->vf_nl_en = 1;
2100         config->mr_ext_memseg_en = 1;
2101         config->mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
2102         config->mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
2103         config->dv_esw_en = 1;
2104         config->dv_flow_en = 1;
2105         config->decap_en = 1;
2106         config->log_hp_size = MLX5_ARG_UNSET;
2107 }
2108
2109 /**
2110  * Register a PCI device within bonding.
2111  *
2112  * This function spawns Ethernet devices out of a given PCI device and
2113  * bonding owner PF index.
2114  *
2115  * @param[in] pci_dev
2116  *   PCI device information.
2117  * @param[in] req_eth_da
2118  *   Requested ethdev device argument.
2119  * @param[in] owner_id
2120  *   Requested owner PF port ID within bonding device, default to 0.
2121  *
2122  * @return
2123  *   0 on success, a negative errno value otherwise and rte_errno is set.
2124  */
2125 static int
2126 mlx5_os_pci_probe_pf(struct rte_pci_device *pci_dev,
2127                      struct rte_eth_devargs *req_eth_da,
2128                      uint16_t owner_id)
2129 {
2130         struct ibv_device **ibv_list;
2131         /*
2132          * Number of found IB Devices matching with requested PCI BDF.
2133          * nd != 1 means there are multiple IB devices over the same
2134          * PCI device and we have representors and master.
2135          */
2136         unsigned int nd = 0;
2137         /*
2138          * Number of found IB device Ports. nd = 1 and np = 1..n means
2139          * we have the single multiport IB device, and there may be
2140          * representors attached to some of found ports.
2141          */
2142         unsigned int np = 0;
2143         /*
2144          * Number of DPDK ethernet devices to Spawn - either over
2145          * multiple IB devices or multiple ports of single IB device.
2146          * Actually this is the number of iterations to spawn.
2147          */
2148         unsigned int ns = 0;
2149         /*
2150          * Bonding device
2151          *   < 0 - no bonding device (single one)
2152          *  >= 0 - bonding device (value is slave PF index)
2153          */
2154         int bd = -1;
2155         struct mlx5_dev_spawn_data *list = NULL;
2156         struct mlx5_dev_config dev_config;
2157         unsigned int dev_config_vf;
2158         struct rte_eth_devargs eth_da = *req_eth_da;
2159         struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */
2160         struct mlx5_bond_info bond_info;
2161         int ret = -1;
2162
2163         errno = 0;
2164         ibv_list = mlx5_glue->get_device_list(&ret);
2165         if (!ibv_list) {
2166                 rte_errno = errno ? errno : ENOSYS;
2167                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
2168                 return -rte_errno;
2169         }
2170         /*
2171          * First scan the list of all Infiniband devices to find
2172          * matching ones, gathering into the list.
2173          */
2174         struct ibv_device *ibv_match[ret + 1];
2175         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
2176         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2177         unsigned int i;
2178
2179         while (ret-- > 0) {
2180                 struct rte_pci_addr pci_addr;
2181
2182                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
2183                 bd = mlx5_device_bond_pci_match
2184                                 (ibv_list[ret], &owner_pci, nl_rdma, owner_id,
2185                                  &bond_info);
2186                 if (bd >= 0) {
2187                         /*
2188                          * Bonding device detected. Only one match is allowed,
2189                          * the bonding is supported over multi-port IB device,
2190                          * there should be no matches on representor PCI
2191                          * functions or non VF LAG bonding devices with
2192                          * specified address.
2193                          */
2194                         if (nd) {
2195                                 DRV_LOG(ERR,
2196                                         "multiple PCI match on bonding device"
2197                                         "\"%s\" found", ibv_list[ret]->name);
2198                                 rte_errno = ENOENT;
2199                                 ret = -rte_errno;
2200                                 goto exit;
2201                         }
2202                         /* Amend owner pci address if owner PF ID specified. */
2203                         if (eth_da.nb_representor_ports)
2204                                 owner_pci.function += owner_id;
2205                         DRV_LOG(INFO, "PCI information matches for"
2206                                       " slave %d bonding device \"%s\"",
2207                                       bd, ibv_list[ret]->name);
2208                         ibv_match[nd++] = ibv_list[ret];
2209                         break;
2210                 } else {
2211                         /* Bonding device not found. */
2212                         if (mlx5_get_pci_addr(ibv_list[ret]->ibdev_path,
2213                                               &pci_addr))
2214                                 continue;
2215                         if (owner_pci.domain != pci_addr.domain ||
2216                             owner_pci.bus != pci_addr.bus ||
2217                             owner_pci.devid != pci_addr.devid ||
2218                             owner_pci.function != pci_addr.function)
2219                                 continue;
2220                         DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2221                                 ibv_list[ret]->name);
2222                         ibv_match[nd++] = ibv_list[ret];
2223                 }
2224         }
2225         ibv_match[nd] = NULL;
2226         if (!nd) {
2227                 /* No device matches, just complain and bail out. */
2228                 DRV_LOG(WARNING,
2229                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
2230                         " are kernel drivers loaded?",
2231                         owner_pci.domain, owner_pci.bus,
2232                         owner_pci.devid, owner_pci.function);
2233                 rte_errno = ENOENT;
2234                 ret = -rte_errno;
2235                 goto exit;
2236         }
2237         if (nd == 1) {
2238                 /*
2239                  * Found single matching device may have multiple ports.
2240                  * Each port may be representor, we have to check the port
2241                  * number and check the representors existence.
2242                  */
2243                 if (nl_rdma >= 0)
2244                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2245                 if (!np)
2246                         DRV_LOG(WARNING, "can not get IB device \"%s\""
2247                                          " ports number", ibv_match[0]->name);
2248                 if (bd >= 0 && !np) {
2249                         DRV_LOG(ERR, "can not get ports"
2250                                      " for bonding device");
2251                         rte_errno = ENOENT;
2252                         ret = -rte_errno;
2253                         goto exit;
2254                 }
2255         }
2256         /*
2257          * Now we can determine the maximal
2258          * amount of devices to be spawned.
2259          */
2260         list = mlx5_malloc(MLX5_MEM_ZERO,
2261                            sizeof(struct mlx5_dev_spawn_data) *
2262                            (np ? np : nd),
2263                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
2264         if (!list) {
2265                 DRV_LOG(ERR, "spawn data array allocation failure");
2266                 rte_errno = ENOMEM;
2267                 ret = -rte_errno;
2268                 goto exit;
2269         }
2270         if (bd >= 0 || np > 1) {
2271                 /*
2272                  * Single IB device with multiple ports found,
2273                  * it may be E-Switch master device and representors.
2274                  * We have to perform identification through the ports.
2275                  */
2276                 MLX5_ASSERT(nl_rdma >= 0);
2277                 MLX5_ASSERT(ns == 0);
2278                 MLX5_ASSERT(nd == 1);
2279                 MLX5_ASSERT(np);
2280                 for (i = 1; i <= np; ++i) {
2281                         list[ns].bond_info = &bond_info;
2282                         list[ns].max_port = np;
2283                         list[ns].phys_port = i;
2284                         list[ns].phys_dev = ibv_match[0];
2285                         list[ns].eth_dev = NULL;
2286                         list[ns].pci_dev = pci_dev;
2287                         list[ns].pf_bond = bd;
2288                         list[ns].ifindex = mlx5_nl_ifindex
2289                                 (nl_rdma,
2290                                 mlx5_os_get_dev_device_name
2291                                                 (list[ns].phys_dev), i);
2292                         if (!list[ns].ifindex) {
2293                                 /*
2294                                  * No network interface index found for the
2295                                  * specified port, it means there is no
2296                                  * representor on this port. It's OK,
2297                                  * there can be disabled ports, for example
2298                                  * if sriov_numvfs < sriov_totalvfs.
2299                                  */
2300                                 continue;
2301                         }
2302                         ret = -1;
2303                         if (nl_route >= 0)
2304                                 ret = mlx5_nl_switch_info
2305                                                (nl_route,
2306                                                 list[ns].ifindex,
2307                                                 &list[ns].info);
2308                         if (ret || (!list[ns].info.representor &&
2309                                     !list[ns].info.master)) {
2310                                 /*
2311                                  * We failed to recognize representors with
2312                                  * Netlink, let's try to perform the task
2313                                  * with sysfs.
2314                                  */
2315                                 ret =  mlx5_sysfs_switch_info
2316                                                 (list[ns].ifindex,
2317                                                  &list[ns].info);
2318                         }
2319                         if (!ret && bd >= 0) {
2320                                 switch (list[ns].info.name_type) {
2321                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2322                                         if (np == 1) {
2323                                                 /*
2324                                                  * Force standalone bonding
2325                                                  * device for ROCE LAG
2326                                                  * confgiurations.
2327                                                  */
2328                                                 list[ns].info.master = 0;
2329                                                 list[ns].info.representor = 0;
2330                                         }
2331                                         if (list[ns].info.port_name == bd)
2332                                                 ns++;
2333                                         break;
2334                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2335                                         /* Fallthrough */
2336                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2337                                         /* Fallthrough */
2338                                 case MLX5_PHYS_PORT_NAME_TYPE_PFSF:
2339                                         if (list[ns].info.pf_num == bd)
2340                                                 ns++;
2341                                         break;
2342                                 default:
2343                                         break;
2344                                 }
2345                                 continue;
2346                         }
2347                         if (!ret && (list[ns].info.representor ^
2348                                      list[ns].info.master))
2349                                 ns++;
2350                 }
2351                 if (!ns) {
2352                         DRV_LOG(ERR,
2353                                 "unable to recognize master/representors"
2354                                 " on the IB device with multiple ports");
2355                         rte_errno = ENOENT;
2356                         ret = -rte_errno;
2357                         goto exit;
2358                 }
2359         } else {
2360                 /*
2361                  * The existence of several matching entries (nd > 1) means
2362                  * port representors have been instantiated. No existing Verbs
2363                  * call nor sysfs entries can tell them apart, this can only
2364                  * be done through Netlink calls assuming kernel drivers are
2365                  * recent enough to support them.
2366                  *
2367                  * In the event of identification failure through Netlink,
2368                  * try again through sysfs, then:
2369                  *
2370                  * 1. A single IB device matches (nd == 1) with single
2371                  *    port (np=0/1) and is not a representor, assume
2372                  *    no switch support.
2373                  *
2374                  * 2. Otherwise no safe assumptions can be made;
2375                  *    complain louder and bail out.
2376                  */
2377                 for (i = 0; i != nd; ++i) {
2378                         memset(&list[ns].info, 0, sizeof(list[ns].info));
2379                         list[ns].bond_info = NULL;
2380                         list[ns].max_port = 1;
2381                         list[ns].phys_port = 1;
2382                         list[ns].phys_dev = ibv_match[i];
2383                         list[ns].eth_dev = NULL;
2384                         list[ns].pci_dev = pci_dev;
2385                         list[ns].pf_bond = -1;
2386                         list[ns].ifindex = 0;
2387                         if (nl_rdma >= 0)
2388                                 list[ns].ifindex = mlx5_nl_ifindex
2389                                 (nl_rdma,
2390                                 mlx5_os_get_dev_device_name
2391                                                 (list[ns].phys_dev), 1);
2392                         if (!list[ns].ifindex) {
2393                                 char ifname[IF_NAMESIZE];
2394
2395                                 /*
2396                                  * Netlink failed, it may happen with old
2397                                  * ib_core kernel driver (before 4.16).
2398                                  * We can assume there is old driver because
2399                                  * here we are processing single ports IB
2400                                  * devices. Let's try sysfs to retrieve
2401                                  * the ifindex. The method works for
2402                                  * master device only.
2403                                  */
2404                                 if (nd > 1) {
2405                                         /*
2406                                          * Multiple devices found, assume
2407                                          * representors, can not distinguish
2408                                          * master/representor and retrieve
2409                                          * ifindex via sysfs.
2410                                          */
2411                                         continue;
2412                                 }
2413                                 ret = mlx5_get_ifname_sysfs
2414                                         (ibv_match[i]->ibdev_path, ifname);
2415                                 if (!ret)
2416                                         list[ns].ifindex =
2417                                                 if_nametoindex(ifname);
2418                                 if (!list[ns].ifindex) {
2419                                         /*
2420                                          * No network interface index found
2421                                          * for the specified device, it means
2422                                          * there it is neither representor
2423                                          * nor master.
2424                                          */
2425                                         continue;
2426                                 }
2427                         }
2428                         ret = -1;
2429                         if (nl_route >= 0)
2430                                 ret = mlx5_nl_switch_info
2431                                                (nl_route,
2432                                                 list[ns].ifindex,
2433                                                 &list[ns].info);
2434                         if (ret || (!list[ns].info.representor &&
2435                                     !list[ns].info.master)) {
2436                                 /*
2437                                  * We failed to recognize representors with
2438                                  * Netlink, let's try to perform the task
2439                                  * with sysfs.
2440                                  */
2441                                 ret =  mlx5_sysfs_switch_info
2442                                                 (list[ns].ifindex,
2443                                                  &list[ns].info);
2444                         }
2445                         if (!ret && (list[ns].info.representor ^
2446                                      list[ns].info.master)) {
2447                                 ns++;
2448                         } else if ((nd == 1) &&
2449                                    !list[ns].info.representor &&
2450                                    !list[ns].info.master) {
2451                                 /*
2452                                  * Single IB device with
2453                                  * one physical port and
2454                                  * attached network device.
2455                                  * May be SRIOV is not enabled
2456                                  * or there is no representors.
2457                                  */
2458                                 DRV_LOG(INFO, "no E-Switch support detected");
2459                                 ns++;
2460                                 break;
2461                         }
2462                 }
2463                 if (!ns) {
2464                         DRV_LOG(ERR,
2465                                 "unable to recognize master/representors"
2466                                 " on the multiple IB devices");
2467                         rte_errno = ENOENT;
2468                         ret = -rte_errno;
2469                         goto exit;
2470                 }
2471                 /*
2472                  * New kernels may add the switch_id attribute for the case
2473                  * there is no E-Switch and we wrongly recognized the
2474                  * only device as master. Override this if there is the
2475                  * single device with single port and new device name
2476                  * format present.
2477                  */
2478                 if (nd == 1 &&
2479                     list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
2480                         list[0].info.master = 0;
2481                         list[0].info.representor = 0;
2482                 }
2483         }
2484         MLX5_ASSERT(ns);
2485         /*
2486          * Sort list to probe devices in natural order for users convenience
2487          * (i.e. master first, then representors from lowest to highest ID).
2488          */
2489         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2490         /* Device specific configuration. */
2491         switch (pci_dev->id.device_id) {
2492         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2493         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2494         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2495         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2496         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2497         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2498         case PCI_DEVICE_ID_MELLANOX_CONNECTXVF:
2499                 dev_config_vf = 1;
2500                 break;
2501         default:
2502                 dev_config_vf = 0;
2503                 break;
2504         }
2505         if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) {
2506                 /* Set devargs default values. */
2507                 if (eth_da.nb_mh_controllers == 0) {
2508                         eth_da.nb_mh_controllers = 1;
2509                         eth_da.mh_controllers[0] = 0;
2510                 }
2511                 if (eth_da.nb_ports == 0 && ns > 0) {
2512                         if (list[0].pf_bond >= 0 && list[0].info.representor)
2513                                 DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s",
2514                                         pci_dev->device.devargs->args);
2515                         eth_da.nb_ports = 1;
2516                         eth_da.ports[0] = list[0].info.pf_num;
2517                 }
2518                 if (eth_da.nb_representor_ports == 0) {
2519                         eth_da.nb_representor_ports = 1;
2520                         eth_da.representor_ports[0] = 0;
2521                 }
2522         }
2523         for (i = 0; i != ns; ++i) {
2524                 uint32_t restore;
2525
2526                 /* Default configuration. */
2527                 mlx5_os_config_default(&dev_config);
2528                 dev_config.vf = dev_config_vf;
2529                 dev_config.allow_duplicate_pattern = 1;
2530                 list[i].numa_node = pci_dev->device.numa_node;
2531                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2532                                                  &list[i],
2533                                                  &dev_config,
2534                                                  &eth_da);
2535                 if (!list[i].eth_dev) {
2536                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2537                                 break;
2538                         /* Device is disabled or already spawned. Ignore it. */
2539                         continue;
2540                 }
2541                 restore = list[i].eth_dev->data->dev_flags;
2542                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2543                 /**
2544                  * Each representor has a dedicated interrupts vector.
2545                  * rte_eth_copy_pci_info() assigns PF interrupts handle to
2546                  * representor eth_dev object because representor and PF
2547                  * share the same PCI address.
2548                  * Override representor device with a dedicated
2549                  * interrupts handle here.
2550                  * Representor interrupts handle is released in mlx5_dev_stop().
2551                  */
2552                 if (list[i].info.representor) {
2553                         struct rte_intr_handle *intr_handle;
2554                         intr_handle = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
2555                                                   sizeof(*intr_handle), 0,
2556                                                   SOCKET_ID_ANY);
2557                         if (!intr_handle) {
2558                                 DRV_LOG(ERR,
2559                                         "port %u failed to allocate memory for interrupt handler "
2560                                         "Rx interrupts will not be supported",
2561                                         i);
2562                                 rte_errno = ENOMEM;
2563                                 ret = -rte_errno;
2564                                 goto exit;
2565                         }
2566                         list[i].eth_dev->intr_handle = intr_handle;
2567                 }
2568                 /* Restore non-PCI flags cleared by the above call. */
2569                 list[i].eth_dev->data->dev_flags |= restore;
2570                 rte_eth_dev_probing_finish(list[i].eth_dev);
2571         }
2572         if (i != ns) {
2573                 DRV_LOG(ERR,
2574                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2575                         " encountering an error: %s",
2576                         owner_pci.domain, owner_pci.bus,
2577                         owner_pci.devid, owner_pci.function,
2578                         strerror(rte_errno));
2579                 ret = -rte_errno;
2580                 /* Roll back. */
2581                 while (i--) {
2582                         if (!list[i].eth_dev)
2583                                 continue;
2584                         mlx5_dev_close(list[i].eth_dev);
2585                         /* mac_addrs must not be freed because in dev_private */
2586                         list[i].eth_dev->data->mac_addrs = NULL;
2587                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2588                 }
2589                 /* Restore original error. */
2590                 rte_errno = -ret;
2591         } else {
2592                 ret = 0;
2593         }
2594 exit:
2595         /*
2596          * Do the routine cleanup:
2597          * - close opened Netlink sockets
2598          * - free allocated spawn data array
2599          * - free the Infiniband device list
2600          */
2601         if (nl_rdma >= 0)
2602                 close(nl_rdma);
2603         if (nl_route >= 0)
2604                 close(nl_route);
2605         if (list)
2606                 mlx5_free(list);
2607         MLX5_ASSERT(ibv_list);
2608         mlx5_glue->free_device_list(ibv_list);
2609         return ret;
2610 }
2611
2612 static int
2613 mlx5_os_parse_eth_devargs(struct rte_device *dev,
2614                           struct rte_eth_devargs *eth_da)
2615 {
2616         int ret = 0;
2617
2618         if (dev->devargs == NULL)
2619                 return 0;
2620         memset(eth_da, 0, sizeof(*eth_da));
2621         /* Parse representor information first from class argument. */
2622         if (dev->devargs->cls_str)
2623                 ret = rte_eth_devargs_parse(dev->devargs->cls_str, eth_da);
2624         if (ret != 0) {
2625                 DRV_LOG(ERR, "failed to parse device arguments: %s",
2626                         dev->devargs->cls_str);
2627                 return -rte_errno;
2628         }
2629         if (eth_da->type == RTE_ETH_REPRESENTOR_NONE) {
2630                 /* Parse legacy device argument */
2631                 ret = rte_eth_devargs_parse(dev->devargs->args, eth_da);
2632                 if (ret) {
2633                         DRV_LOG(ERR, "failed to parse device arguments: %s",
2634                                 dev->devargs->args);
2635                         return -rte_errno;
2636                 }
2637         }
2638         return 0;
2639 }
2640
2641 /**
2642  * Callback to register a PCI device.
2643  *
2644  * This function spawns Ethernet devices out of a given PCI device.
2645  *
2646  * @param[in] pci_dev
2647  *   PCI device information.
2648  *
2649  * @return
2650  *   0 on success, a negative errno value otherwise and rte_errno is set.
2651  */
2652 static int
2653 mlx5_os_pci_probe(struct rte_pci_device *pci_dev)
2654 {
2655         struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2656         int ret = 0;
2657         uint16_t p;
2658
2659         ret = mlx5_os_parse_eth_devargs(&pci_dev->device, &eth_da);
2660         if (ret != 0)
2661                 return ret;
2662
2663         if (eth_da.nb_ports > 0) {
2664                 /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */
2665                 for (p = 0; p < eth_da.nb_ports; p++)
2666                         ret = mlx5_os_pci_probe_pf(pci_dev, &eth_da,
2667                                                    eth_da.ports[p]);
2668         } else {
2669                 ret = mlx5_os_pci_probe_pf(pci_dev, &eth_da, 0);
2670         }
2671         return ret;
2672 }
2673
2674 /* Probe a single SF device on auxiliary bus, no representor support. */
2675 static int
2676 mlx5_os_auxiliary_probe(struct rte_device *dev)
2677 {
2678         struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2679         struct mlx5_dev_config config;
2680         struct mlx5_dev_spawn_data spawn = { .pf_bond = -1 };
2681         struct rte_auxiliary_device *adev = RTE_DEV_TO_AUXILIARY(dev);
2682         struct rte_eth_dev *eth_dev;
2683         int ret = 0;
2684
2685         /* Parse ethdev devargs. */
2686         ret = mlx5_os_parse_eth_devargs(dev, &eth_da);
2687         if (ret != 0)
2688                 return ret;
2689         /* Set default config data. */
2690         mlx5_os_config_default(&config);
2691         config.sf = 1;
2692         /* Init spawn data. */
2693         spawn.max_port = 1;
2694         spawn.phys_port = 1;
2695         spawn.phys_dev = mlx5_os_get_ibv_dev(dev);
2696         if (spawn.phys_dev == NULL)
2697                 return -rte_errno;
2698         ret = mlx5_auxiliary_get_ifindex(dev->name);
2699         if (ret < 0) {
2700                 DRV_LOG(ERR, "failed to get ethdev ifindex: %s", dev->name);
2701                 return ret;
2702         }
2703         spawn.ifindex = ret;
2704         spawn.numa_node = dev->numa_node;
2705         /* Spawn device. */
2706         eth_dev = mlx5_dev_spawn(dev, &spawn, &config, &eth_da);
2707         if (eth_dev == NULL)
2708                 return -rte_errno;
2709         /* Post create. */
2710         eth_dev->intr_handle = &adev->intr_handle;
2711         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2712                 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2713                 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV;
2714                 eth_dev->data->numa_node = dev->numa_node;
2715         }
2716         rte_eth_dev_probing_finish(eth_dev);
2717         return 0;
2718 }
2719
2720 /**
2721  * Net class driver callback to probe a device.
2722  *
2723  * This function probe PCI bus device(s) or a single SF on auxiliary bus.
2724  *
2725  * @param[in] dev
2726  *   Pointer to the generic device.
2727  *
2728  * @return
2729  *   0 on success, the function cannot fail.
2730  */
2731 int
2732 mlx5_os_net_probe(struct rte_device *dev)
2733 {
2734         int ret;
2735
2736         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
2737                 mlx5_pmd_socket_init();
2738         ret = mlx5_init_once();
2739         if (ret) {
2740                 DRV_LOG(ERR, "unable to init PMD global data: %s",
2741                         strerror(rte_errno));
2742                 return -rte_errno;
2743         }
2744         if (mlx5_dev_is_pci(dev))
2745                 return mlx5_os_pci_probe(RTE_DEV_TO_PCI(dev));
2746         else
2747                 return mlx5_os_auxiliary_probe(dev);
2748 }
2749
2750 static int
2751 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
2752 {
2753         char *env;
2754         int value;
2755
2756         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2757         /* Get environment variable to store. */
2758         env = getenv(MLX5_SHUT_UP_BF);
2759         value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
2760         if (config->dbnc == MLX5_ARG_UNSET)
2761                 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
2762         else
2763                 setenv(MLX5_SHUT_UP_BF,
2764                        config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
2765         return value;
2766 }
2767
2768 static void
2769 mlx5_restore_doorbell_mapping_env(int value)
2770 {
2771         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2772         /* Restore the original environment variable state. */
2773         if (value == MLX5_ARG_UNSET)
2774                 unsetenv(MLX5_SHUT_UP_BF);
2775         else
2776                 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
2777 }
2778
2779 /**
2780  * Extract pdn of PD object using DV API.
2781  *
2782  * @param[in] pd
2783  *   Pointer to the verbs PD object.
2784  * @param[out] pdn
2785  *   Pointer to the PD object number variable.
2786  *
2787  * @return
2788  *   0 on success, error value otherwise.
2789  */
2790 int
2791 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
2792 {
2793 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2794         struct mlx5dv_obj obj;
2795         struct mlx5dv_pd pd_info;
2796         int ret = 0;
2797
2798         obj.pd.in = pd;
2799         obj.pd.out = &pd_info;
2800         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
2801         if (ret) {
2802                 DRV_LOG(DEBUG, "Fail to get PD object info");
2803                 return ret;
2804         }
2805         *pdn = pd_info.pdn;
2806         return 0;
2807 #else
2808         (void)pd;
2809         (void)pdn;
2810         return -ENOTSUP;
2811 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
2812 }
2813
2814 /**
2815  * Function API to open IB device.
2816  *
2817  * This function calls the Linux glue APIs to open a device.
2818  *
2819  * @param[in] spawn
2820  *   Pointer to the IB device attributes (name, port, etc).
2821  * @param[out] config
2822  *   Pointer to device configuration structure.
2823  * @param[out] sh
2824  *   Pointer to shared context structure.
2825  *
2826  * @return
2827  *   0 on success, a positive error value otherwise.
2828  */
2829 int
2830 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
2831                      const struct mlx5_dev_config *config,
2832                      struct mlx5_dev_ctx_shared *sh)
2833 {
2834         int dbmap_env;
2835         int err = 0;
2836
2837         pthread_mutex_init(&sh->txpp.mutex, NULL);
2838         /*
2839          * Configure environment variable "MLX5_BF_SHUT_UP"
2840          * before the device creation. The rdma_core library
2841          * checks the variable at device creation and
2842          * stores the result internally.
2843          */
2844         dbmap_env = mlx5_config_doorbell_mapping_env(config);
2845         /* Try to open IB device with DV first, then usual Verbs. */
2846         errno = 0;
2847         sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
2848         if (sh->ctx) {
2849                 sh->devx = 1;
2850                 DRV_LOG(DEBUG, "DevX is supported");
2851                 /* The device is created, no need for environment. */
2852                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2853         } else {
2854                 /* The environment variable is still configured. */
2855                 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
2856                 err = errno ? errno : ENODEV;
2857                 /*
2858                  * The environment variable is not needed anymore,
2859                  * all device creation attempts are completed.
2860                  */
2861                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2862                 if (!sh->ctx)
2863                         return err;
2864                 DRV_LOG(DEBUG, "DevX is NOT supported");
2865                 err = 0;
2866         }
2867         if (!err && sh->ctx) {
2868                 /* Hint libmlx5 to use PMD allocator for data plane resources */
2869                 mlx5_glue->dv_set_context_attr(sh->ctx,
2870                         MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
2871                         (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
2872                                 .alloc = &mlx5_alloc_verbs_buf,
2873                                 .free = &mlx5_free_verbs_buf,
2874                                 .data = sh,
2875                         }));
2876         }
2877         return err;
2878 }
2879
2880 /**
2881  * Install shared asynchronous device events handler.
2882  * This function is implemented to support event sharing
2883  * between multiple ports of single IB device.
2884  *
2885  * @param sh
2886  *   Pointer to mlx5_dev_ctx_shared object.
2887  */
2888 void
2889 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2890 {
2891         int ret;
2892         int flags;
2893
2894         sh->intr_handle.fd = -1;
2895         flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
2896         ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
2897                     F_SETFL, flags | O_NONBLOCK);
2898         if (ret) {
2899                 DRV_LOG(INFO, "failed to change file descriptor async event"
2900                         " queue");
2901         } else {
2902                 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
2903                 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2904                 if (rte_intr_callback_register(&sh->intr_handle,
2905                                         mlx5_dev_interrupt_handler, sh)) {
2906                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2907                         sh->intr_handle.fd = -1;
2908                 }
2909         }
2910         if (sh->devx) {
2911 #ifdef HAVE_IBV_DEVX_ASYNC
2912                 sh->intr_handle_devx.fd = -1;
2913                 sh->devx_comp =
2914                         (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
2915                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2916                 if (!devx_comp) {
2917                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2918                         return;
2919                 }
2920                 flags = fcntl(devx_comp->fd, F_GETFL);
2921                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2922                 if (ret) {
2923                         DRV_LOG(INFO, "failed to change file descriptor"
2924                                 " devx comp");
2925                         return;
2926                 }
2927                 sh->intr_handle_devx.fd = devx_comp->fd;
2928                 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2929                 if (rte_intr_callback_register(&sh->intr_handle_devx,
2930                                         mlx5_dev_interrupt_handler_devx, sh)) {
2931                         DRV_LOG(INFO, "Fail to install the devx shared"
2932                                 " interrupt.");
2933                         sh->intr_handle_devx.fd = -1;
2934                 }
2935 #endif /* HAVE_IBV_DEVX_ASYNC */
2936         }
2937 }
2938
2939 /**
2940  * Uninstall shared asynchronous device events handler.
2941  * This function is implemented to support event sharing
2942  * between multiple ports of single IB device.
2943  *
2944  * @param dev
2945  *   Pointer to mlx5_dev_ctx_shared object.
2946  */
2947 void
2948 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2949 {
2950         if (sh->intr_handle.fd >= 0)
2951                 mlx5_intr_callback_unregister(&sh->intr_handle,
2952                                               mlx5_dev_interrupt_handler, sh);
2953 #ifdef HAVE_IBV_DEVX_ASYNC
2954         if (sh->intr_handle_devx.fd >= 0)
2955                 rte_intr_callback_unregister(&sh->intr_handle_devx,
2956                                   mlx5_dev_interrupt_handler_devx, sh);
2957         if (sh->devx_comp)
2958                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2959 #endif
2960 }
2961
2962 /**
2963  * Read statistics by a named counter.
2964  *
2965  * @param[in] priv
2966  *   Pointer to the private device data structure.
2967  * @param[in] ctr_name
2968  *   Pointer to the name of the statistic counter to read
2969  * @param[out] stat
2970  *   Pointer to read statistic value.
2971  * @return
2972  *   0 on success and stat is valud, 1 if failed to read the value
2973  *   rte_errno is set.
2974  *
2975  */
2976 int
2977 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2978                       uint64_t *stat)
2979 {
2980         int fd;
2981
2982         if (priv->sh) {
2983                 if (priv->q_counters != NULL &&
2984                     strcmp(ctr_name, "out_of_buffer") == 0)
2985                         return mlx5_devx_cmd_queue_counter_query
2986                                         (priv->q_counters, 0, (uint32_t *)stat);
2987                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2988                       priv->sh->ibdev_path,
2989                       priv->dev_port,
2990                       ctr_name);
2991                 fd = open(path, O_RDONLY);
2992                 /*
2993                  * in switchdev the file location is not per port
2994                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2995                  */
2996                 if (fd == -1) {
2997                         MKSTR(path1, "%s/hw_counters/%s",
2998                               priv->sh->ibdev_path,
2999                               ctr_name);
3000                         fd = open(path1, O_RDONLY);
3001                 }
3002                 if (fd != -1) {
3003                         char buf[21] = {'\0'};
3004                         ssize_t n = read(fd, buf, sizeof(buf));
3005
3006                         close(fd);
3007                         if (n != -1) {
3008                                 *stat = strtoull(buf, NULL, 10);
3009                                 return 0;
3010                         }
3011                 }
3012         }
3013         *stat = 0;
3014         return 1;
3015 }
3016
3017 /**
3018  * Set the reg_mr and dereg_mr call backs
3019  *
3020  * @param reg_mr_cb[out]
3021  *   Pointer to reg_mr func
3022  * @param dereg_mr_cb[out]
3023  *   Pointer to dereg_mr func
3024  *
3025  */
3026 void
3027 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
3028                       mlx5_dereg_mr_t *dereg_mr_cb)
3029 {
3030         *reg_mr_cb = mlx5_mr_verbs_ops.reg_mr;
3031         *dereg_mr_cb = mlx5_mr_verbs_ops.dereg_mr;
3032 }
3033
3034 /**
3035  * Remove a MAC address from device
3036  *
3037  * @param dev
3038  *   Pointer to Ethernet device structure.
3039  * @param index
3040  *   MAC address index.
3041  */
3042 void
3043 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
3044 {
3045         struct mlx5_priv *priv = dev->data->dev_private;
3046         const int vf = priv->config.vf;
3047
3048         if (vf)
3049                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
3050                                         mlx5_ifindex(dev), priv->mac_own,
3051                                         &dev->data->mac_addrs[index], index);
3052 }
3053
3054 /**
3055  * Adds a MAC address to the device
3056  *
3057  * @param dev
3058  *   Pointer to Ethernet device structure.
3059  * @param mac_addr
3060  *   MAC address to register.
3061  * @param index
3062  *   MAC address index.
3063  *
3064  * @return
3065  *   0 on success, a negative errno value otherwise
3066  */
3067 int
3068 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
3069                      uint32_t index)
3070 {
3071         struct mlx5_priv *priv = dev->data->dev_private;
3072         const int vf = priv->config.vf;
3073         int ret = 0;
3074
3075         if (vf)
3076                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
3077                                            mlx5_ifindex(dev), priv->mac_own,
3078                                            mac, index);
3079         return ret;
3080 }
3081
3082 /**
3083  * Modify a VF MAC address
3084  *
3085  * @param priv
3086  *   Pointer to device private data.
3087  * @param mac_addr
3088  *   MAC address to modify into.
3089  * @param iface_idx
3090  *   Net device interface index
3091  * @param vf_index
3092  *   VF index
3093  *
3094  * @return
3095  *   0 on success, a negative errno value otherwise
3096  */
3097 int
3098 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
3099                            unsigned int iface_idx,
3100                            struct rte_ether_addr *mac_addr,
3101                            int vf_index)
3102 {
3103         return mlx5_nl_vf_mac_addr_modify
3104                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
3105 }
3106
3107 /**
3108  * Set device promiscuous mode
3109  *
3110  * @param dev
3111  *   Pointer to Ethernet device structure.
3112  * @param enable
3113  *   0 - promiscuous is disabled, otherwise - enabled
3114  *
3115  * @return
3116  *   0 on success, a negative error value otherwise
3117  */
3118 int
3119 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
3120 {
3121         struct mlx5_priv *priv = dev->data->dev_private;
3122
3123         return mlx5_nl_promisc(priv->nl_socket_route,
3124                                mlx5_ifindex(dev), !!enable);
3125 }
3126
3127 /**
3128  * Set device promiscuous mode
3129  *
3130  * @param dev
3131  *   Pointer to Ethernet device structure.
3132  * @param enable
3133  *   0 - all multicase is disabled, otherwise - enabled
3134  *
3135  * @return
3136  *   0 on success, a negative error value otherwise
3137  */
3138 int
3139 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
3140 {
3141         struct mlx5_priv *priv = dev->data->dev_private;
3142
3143         return mlx5_nl_allmulti(priv->nl_socket_route,
3144                                 mlx5_ifindex(dev), !!enable);
3145 }
3146
3147 /**
3148  * Flush device MAC addresses
3149  *
3150  * @param dev
3151  *   Pointer to Ethernet device structure.
3152  *
3153  */
3154 void
3155 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
3156 {
3157         struct mlx5_priv *priv = dev->data->dev_private;
3158
3159         mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
3160                                dev->data->mac_addrs,
3161                                MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
3162 }