drivers/net/mlx5/linux/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2020 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12 #include <net/if.h>
  13 #include <linux/rtnetlink.h>
  14 #include <linux/sockios.h>
  15 #include <linux/ethtool.h>
  16 #include <fcntl.h>
  17
  18 #include <rte_malloc.h>
  19 #include <rte_ethdev_driver.h>
  20 #include <rte_ethdev_pci.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_common.h>
  24 #include <rte_kvargs.h>
  25 #include <rte_rwlock.h>
  26 #include <rte_spinlock.h>
  27 #include <rte_string_fns.h>
  28 #include <rte_alarm.h>
  29 #include <rte_eal_paging.h>
  30
  31 #include <mlx5_glue.h>
  32 #include <mlx5_devx_cmds.h>
  33 #include <mlx5_common.h>
  34 #include <mlx5_common_mp.h>
  35 #include <mlx5_common_mr.h>
  36 #include <mlx5_malloc.h>
  37
  38 #include "mlx5_defs.h"
  39 #include "mlx5.h"
  40 #include "mlx5_common_os.h"
  41 #include "mlx5_utils.h"
  42 #include "mlx5_rxtx.h"
  43 #include "mlx5_autoconf.h"
  44 #include "mlx5_mr.h"
  45 #include "mlx5_flow.h"
  46 #include "rte_pmd_mlx5.h"
  47 #include "mlx5_verbs.h"
  48 #include "mlx5_nl.h"
  49 #include "mlx5_devx.h"
  50
  51 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
  52
  53 #ifndef HAVE_IBV_MLX5_MOD_MPW
  54 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
  55 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
  56 #endif
  57
  58 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
  59 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
  60 #endif
  61
  62 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  63
  64 /* Spinlock for mlx5_shared_data allocation. */
  65 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  66
  67 /* Process local data for secondary processes. */
  68 static struct mlx5_local_data mlx5_local_data;
  69
  70 /**
  71  * Set the completion channel file descriptor interrupt as non-blocking.
  72  *
  73  * @param[in] rxq_obj
  74  *   Pointer to RQ channel object, which includes the channel fd
  75  *
  76  * @param[out] fd
  77  *   The file descriptor (representing the intetrrupt) used in this channel.
  78  *
  79  * @return
  80  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
  81  */
  82 int
  83 mlx5_os_set_nonblock_channel_fd(int fd)
  84 {
  85         int flags;
  86
  87         flags = fcntl(fd, F_GETFL);
  88         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
  89 }
  90
  91 /**
  92  * Get mlx5 device attributes. The glue function query_device_ex() is called
  93  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
  94  * device attributes from the glue out parameter.
  95  *
  96  * @param dev
  97  *   Pointer to ibv context.
  98  *
  99  * @param device_attr
 100  *   Pointer to mlx5 device attributes.
 101  *
 102  * @return
 103  *   0 on success, non zero error number otherwise
 104  */
 105 int
 106 mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr)
 107 {
 108         int err;
 109         struct ibv_device_attr_ex attr_ex;
 110         memset(device_attr, 0, sizeof(*device_attr));
 111         err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
 112         if (err)
 113                 return err;
 114
 115         device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
 116         device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
 117         device_attr->max_sge = attr_ex.orig_attr.max_sge;
 118         device_attr->max_cq = attr_ex.orig_attr.max_cq;
 119         device_attr->max_qp = attr_ex.orig_attr.max_qp;
 120         device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
 121         device_attr->max_rwq_indirection_table_size =
 122                 attr_ex.rss_caps.max_rwq_indirection_table_size;
 123         device_attr->max_tso = attr_ex.tso_caps.max_tso;
 124         device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
 125
 126         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 127         err = mlx5_glue->dv_query_device(ctx, &dv_attr);
 128         if (err)
 129                 return err;
 130
 131         device_attr->flags = dv_attr.flags;
 132         device_attr->comp_mask = dv_attr.comp_mask;
 133 #ifdef HAVE_IBV_MLX5_MOD_SWP
 134         device_attr->sw_parsing_offloads =
 135                 dv_attr.sw_parsing_caps.sw_parsing_offloads;
 136 #endif
 137         device_attr->min_single_stride_log_num_of_bytes =
 138                 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
 139         device_attr->max_single_stride_log_num_of_bytes =
 140                 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
 141         device_attr->min_single_wqe_log_num_of_strides =
 142                 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
 143         device_attr->max_single_wqe_log_num_of_strides =
 144                 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
 145         device_attr->stride_supported_qpts =
 146                 dv_attr.striding_rq_caps.supported_qpts;
 147 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 148         device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
 149 #endif
 150
 151         return err;
 152 }
 153
 154 /**
 155  * Verbs callback to allocate a memory. This function should allocate the space
 156  * according to the size provided residing inside a huge page.
 157  * Please note that all allocation must respect the alignment from libmlx5
 158  * (i.e. currently rte_mem_page_size()).
 159  *
 160  * @param[in] size
 161  *   The size in bytes of the memory to allocate.
 162  * @param[in] data
 163  *   A pointer to the callback data.
 164  *
 165  * @return
 166  *   Allocated buffer, NULL otherwise and rte_errno is set.
 167  */
 168 static void *
 169 mlx5_alloc_verbs_buf(size_t size, void *data)
 170 {
 171         struct mlx5_priv *priv = data;
 172         void *ret;
 173         unsigned int socket = SOCKET_ID_ANY;
 174         size_t alignment = rte_mem_page_size();
 175         if (alignment == (size_t)-1) {
 176                 DRV_LOG(ERR, "Failed to get mem page size");
 177                 rte_errno = ENOMEM;
 178                 return NULL;
 179         }
 180
 181         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
 182                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 183
 184                 socket = ctrl->socket;
 185         } else if (priv->verbs_alloc_ctx.type ==
 186                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
 187                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 188
 189                 socket = ctrl->socket;
 190         }
 191         MLX5_ASSERT(data != NULL);
 192         ret = mlx5_malloc(0, size, alignment, socket);
 193         if (!ret && size)
 194                 rte_errno = ENOMEM;
 195         return ret;
 196 }
 197
 198 /**
 199  * Verbs callback to free a memory.
 200  *
 201  * @param[in] ptr
 202  *   A pointer to the memory to free.
 203  * @param[in] data
 204  *   A pointer to the callback data.
 205  */
 206 static void
 207 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 208 {
 209         MLX5_ASSERT(data != NULL);
 210         mlx5_free(ptr);
 211 }
 212
 213 /**
 214  * Initialize DR related data within private structure.
 215  * Routine checks the reference counter and does actual
 216  * resources creation/initialization only if counter is zero.
 217  *
 218  * @param[in] priv
 219  *   Pointer to the private device data structure.
 220  *
 221  * @return
 222  *   Zero on success, positive error code otherwise.
 223  */
 224 static int
 225 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 226 {
 227         struct mlx5_dev_ctx_shared *sh = priv->sh;
 228         char s[MLX5_HLIST_NAMESIZE];
 229         int err = 0;
 230
 231         if (!sh->flow_tbls)
 232                 err = mlx5_alloc_table_hash_list(priv);
 233         else
 234                 DRV_LOG(DEBUG, "sh->flow_tbls[%p] already created, reuse\n",
 235                         (void *)sh->flow_tbls);
 236         if (err)
 237                 return err;
 238         /* Create tags hash list table. */
 239         snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name);
 240         sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE);
 241         if (!sh->tag_table) {
 242                 DRV_LOG(ERR, "tags with hash creation failed.");
 243                 err = ENOMEM;
 244                 goto error;
 245         }
 246         snprintf(s, sizeof(s), "%s_hdr_modify", sh->ibdev_name);
 247         sh->modify_cmds = mlx5_hlist_create(s, MLX5_FLOW_HDR_MODIFY_HTABLE_SZ);
 248         if (!sh->modify_cmds) {
 249                 DRV_LOG(ERR, "hdr modify hash creation failed");
 250                 err = ENOMEM;
 251                 goto error;
 252         }
 253         snprintf(s, sizeof(s), "%s_encaps_decaps", sh->ibdev_name);
 254         sh->encaps_decaps = mlx5_hlist_create(s,
 255                                               MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ);
 256         if (!sh->encaps_decaps) {
 257                 DRV_LOG(ERR, "encap decap hash creation failed");
 258                 err = ENOMEM;
 259                 goto error;
 260         }
 261 #ifdef HAVE_MLX5DV_DR
 262         void *domain;
 263
 264         if (sh->dv_refcnt) {
 265                 /* Shared DV/DR structures is already initialized. */
 266                 sh->dv_refcnt++;
 267                 priv->dr_shared = 1;
 268                 return 0;
 269         }
 270         /* Reference counter is zero, we should initialize structures. */
 271         domain = mlx5_glue->dr_create_domain(sh->ctx,
 272                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 273         if (!domain) {
 274                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 275                 err = errno;
 276                 goto error;
 277         }
 278         sh->rx_domain = domain;
 279         domain = mlx5_glue->dr_create_domain(sh->ctx,
 280                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 281         if (!domain) {
 282                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 283                 err = errno;
 284                 goto error;
 285         }
 286         pthread_mutex_init(&sh->dv_mutex, NULL);
 287         sh->tx_domain = domain;
 288 #ifdef HAVE_MLX5DV_DR_ESWITCH
 289         if (priv->config.dv_esw_en) {
 290                 domain  = mlx5_glue->dr_create_domain
 291                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 292                 if (!domain) {
 293                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 294                         err = errno;
 295                         goto error;
 296                 }
 297                 sh->fdb_domain = domain;
 298                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 299         }
 300 #endif
 301         if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
 302                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
 303                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
 304                 if (sh->fdb_domain)
 305                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
 306         }
 307         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 308 #endif /* HAVE_MLX5DV_DR */
 309         sh->dv_refcnt++;
 310         priv->dr_shared = 1;
 311         return 0;
 312 error:
 313         /* Rollback the created objects. */
 314         if (sh->rx_domain) {
 315                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 316                 sh->rx_domain = NULL;
 317         }
 318         if (sh->tx_domain) {
 319                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 320                 sh->tx_domain = NULL;
 321         }
 322         if (sh->fdb_domain) {
 323                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 324                 sh->fdb_domain = NULL;
 325         }
 326         if (sh->esw_drop_action) {
 327                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 328                 sh->esw_drop_action = NULL;
 329         }
 330         if (sh->pop_vlan_action) {
 331                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 332                 sh->pop_vlan_action = NULL;
 333         }
 334         if (sh->encaps_decaps) {
 335                 mlx5_hlist_destroy(sh->encaps_decaps, NULL, NULL);
 336                 sh->encaps_decaps = NULL;
 337         }
 338         if (sh->modify_cmds) {
 339                 mlx5_hlist_destroy(sh->modify_cmds, NULL, NULL);
 340                 sh->modify_cmds = NULL;
 341         }
 342         if (sh->tag_table) {
 343                 /* tags should be destroyed with flow before. */
 344                 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
 345                 sh->tag_table = NULL;
 346         }
 347         mlx5_free_table_hash_list(priv);
 348         return err;
 349 }
 350
 351 /**
 352  * Destroy DR related data within private structure.
 353  *
 354  * @param[in] priv
 355  *   Pointer to the private device data structure.
 356  */
 357 void
 358 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 359 {
 360         struct mlx5_dev_ctx_shared *sh;
 361
 362         if (!priv->dr_shared)
 363                 return;
 364         priv->dr_shared = 0;
 365         sh = priv->sh;
 366         MLX5_ASSERT(sh);
 367 #ifdef HAVE_MLX5DV_DR
 368         MLX5_ASSERT(sh->dv_refcnt);
 369         if (sh->dv_refcnt && --sh->dv_refcnt)
 370                 return;
 371         if (sh->rx_domain) {
 372                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 373                 sh->rx_domain = NULL;
 374         }
 375         if (sh->tx_domain) {
 376                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 377                 sh->tx_domain = NULL;
 378         }
 379 #ifdef HAVE_MLX5DV_DR_ESWITCH
 380         if (sh->fdb_domain) {
 381                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 382                 sh->fdb_domain = NULL;
 383         }
 384         if (sh->esw_drop_action) {
 385                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 386                 sh->esw_drop_action = NULL;
 387         }
 388 #endif
 389         if (sh->pop_vlan_action) {
 390                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 391                 sh->pop_vlan_action = NULL;
 392         }
 393         pthread_mutex_destroy(&sh->dv_mutex);
 394 #endif /* HAVE_MLX5DV_DR */
 395         if (sh->encaps_decaps) {
 396                 mlx5_hlist_destroy(sh->encaps_decaps, NULL, NULL);
 397                 sh->encaps_decaps = NULL;
 398         }
 399         if (sh->modify_cmds) {
 400                 mlx5_hlist_destroy(sh->modify_cmds, NULL, NULL);
 401                 sh->modify_cmds = NULL;
 402         }
 403         if (sh->tag_table) {
 404                 /* tags should be destroyed with flow before. */
 405                 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
 406                 sh->tag_table = NULL;
 407         }
 408         mlx5_free_table_hash_list(priv);
 409 }
 410
 411 /**
 412  * Initialize shared data between primary and secondary process.
 413  *
 414  * A memzone is reserved by primary process and secondary processes attach to
 415  * the memzone.
 416  *
 417  * @return
 418  *   0 on success, a negative errno value otherwise and rte_errno is set.
 419  */
 420 static int
 421 mlx5_init_shared_data(void)
 422 {
 423         const struct rte_memzone *mz;
 424         int ret = 0;
 425
 426         rte_spinlock_lock(&mlx5_shared_data_lock);
 427         if (mlx5_shared_data == NULL) {
 428                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 429                         /* Allocate shared memory. */
 430                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 431                                                  sizeof(*mlx5_shared_data),
 432                                                  SOCKET_ID_ANY, 0);
 433                         if (mz == NULL) {
 434                                 DRV_LOG(ERR,
 435                                         "Cannot allocate mlx5 shared data");
 436                                 ret = -rte_errno;
 437                                 goto error;
 438                         }
 439                         mlx5_shared_data = mz->addr;
 440                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 441                         rte_spinlock_init(&mlx5_shared_data->lock);
 442                 } else {
 443                         /* Lookup allocated shared memory. */
 444                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 445                         if (mz == NULL) {
 446                                 DRV_LOG(ERR,
 447                                         "Cannot attach mlx5 shared data");
 448                                 ret = -rte_errno;
 449                                 goto error;
 450                         }
 451                         mlx5_shared_data = mz->addr;
 452                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 453                 }
 454         }
 455 error:
 456         rte_spinlock_unlock(&mlx5_shared_data_lock);
 457         return ret;
 458 }
 459
 460 /**
 461  * PMD global initialization.
 462  *
 463  * Independent from individual device, this function initializes global
 464  * per-PMD data structures distinguishing primary and secondary processes.
 465  * Hence, each initialization is called once per a process.
 466  *
 467  * @return
 468  *   0 on success, a negative errno value otherwise and rte_errno is set.
 469  */
 470 static int
 471 mlx5_init_once(void)
 472 {
 473         struct mlx5_shared_data *sd;
 474         struct mlx5_local_data *ld = &mlx5_local_data;
 475         int ret = 0;
 476
 477         if (mlx5_init_shared_data())
 478                 return -rte_errno;
 479         sd = mlx5_shared_data;
 480         MLX5_ASSERT(sd);
 481         rte_spinlock_lock(&sd->lock);
 482         switch (rte_eal_process_type()) {
 483         case RTE_PROC_PRIMARY:
 484                 if (sd->init_done)
 485                         break;
 486                 LIST_INIT(&sd->mem_event_cb_list);
 487                 rte_rwlock_init(&sd->mem_event_rwlock);
 488                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
 489                                                 mlx5_mr_mem_event_cb, NULL);
 490                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
 491                                            mlx5_mp_os_primary_handle);
 492                 if (ret)
 493                         goto out;
 494                 sd->init_done = true;
 495                 break;
 496         case RTE_PROC_SECONDARY:
 497                 if (ld->init_done)
 498                         break;
 499                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
 500                                              mlx5_mp_os_secondary_handle);
 501                 if (ret)
 502                         goto out;
 503                 ++sd->secondary_cnt;
 504                 ld->init_done = true;
 505                 break;
 506         default:
 507                 break;
 508         }
 509 out:
 510         rte_spinlock_unlock(&sd->lock);
 511         return ret;
 512 }
 513
 514 /**
 515  * Create the Tx queue DevX/Verbs object.
 516  *
 517  * @param dev
 518  *   Pointer to Ethernet device.
 519  * @param idx
 520  *   Queue index in DPDK Tx queue array.
 521  *
 522  * @return
 523  *   0 on success, a negative errno value otherwise and rte_errno is set.
 524  */
 525 static int
 526 mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
 527 {
 528         struct mlx5_priv *priv = dev->data->dev_private;
 529         struct mlx5_dev_config *config = &priv->config;
 530         struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
 531         struct mlx5_txq_ctrl *txq_ctrl =
 532                         container_of(txq_data, struct mlx5_txq_ctrl, txq);
 533
 534         /*
 535          * When DevX is supported and DV flow is enable, and dest tir is enable,
 536          * hairpin functions use DevX API.
 537          * When, in addition, DV E-Switch is enable and DevX uar offset is
 538          * supported, all Tx functions also use DevX API.
 539          * Otherwise, all Tx functions use Verbs API.
 540          */
 541         if (config->devx && config->dv_flow_en && config->dest_tir) {
 542                 if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
 543                         return mlx5_txq_devx_obj_new(dev, idx);
 544 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 545                 if (config->dv_esw_en)
 546                         return mlx5_txq_devx_obj_new(dev, idx);
 547 #endif
 548         }
 549         return mlx5_txq_ibv_obj_new(dev, idx);
 550 }
 551
 552 /**
 553  * Release an Tx DevX/verbs queue object.
 554  *
 555  * @param txq_obj
 556  *   DevX/Verbs Tx queue object.
 557  */
 558 static void
 559 mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)
 560 {
 561         struct mlx5_dev_config *config = &txq_obj->txq_ctrl->priv->config;
 562
 563         if (config->devx && config->dv_flow_en && config->dest_tir) {
 564 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 565                 if (config->dv_esw_en) {
 566                         mlx5_txq_devx_obj_release(txq_obj);
 567                         return;
 568                 }
 569 #endif
 570                 if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
 571                         mlx5_txq_devx_obj_release(txq_obj);
 572                         return;
 573                 }
 574         }
 575         mlx5_txq_ibv_obj_release(txq_obj);
 576 }
 577
 578 /**
 579  * Spawn an Ethernet device from Verbs information.
 580  *
 581  * @param dpdk_dev
 582  *   Backing DPDK device.
 583  * @param spawn
 584  *   Verbs device parameters (name, port, switch_info) to spawn.
 585  * @param config
 586  *   Device configuration parameters.
 587  *
 588  * @return
 589  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 590  *   is set. The following errors are defined:
 591  *
 592  *   EBUSY: device is not supposed to be spawned.
 593  *   EEXIST: device is already spawned
 594  */
 595 static struct rte_eth_dev *
 596 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 597                struct mlx5_dev_spawn_data *spawn,
 598                struct mlx5_dev_config *config)
 599 {
 600         const struct mlx5_switch_info *switch_info = &spawn->info;
 601         struct mlx5_dev_ctx_shared *sh = NULL;
 602         struct ibv_port_attr port_attr;
 603         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 604         struct rte_eth_dev *eth_dev = NULL;
 605         struct mlx5_priv *priv = NULL;
 606         int err = 0;
 607         unsigned int hw_padding = 0;
 608         unsigned int mps;
 609         unsigned int cqe_comp;
 610         unsigned int cqe_pad = 0;
 611         unsigned int tunnel_en = 0;
 612         unsigned int mpls_en = 0;
 613         unsigned int swp = 0;
 614         unsigned int mprq = 0;
 615         unsigned int mprq_min_stride_size_n = 0;
 616         unsigned int mprq_max_stride_size_n = 0;
 617         unsigned int mprq_min_stride_num_n = 0;
 618         unsigned int mprq_max_stride_num_n = 0;
 619         struct rte_ether_addr mac;
 620         char name[RTE_ETH_NAME_MAX_LEN];
 621         int own_domain_id = 0;
 622         uint16_t port_id;
 623         unsigned int i;
 624 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 625         struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
 626 #endif
 627
 628         /* Determine if this port representor is supposed to be spawned. */
 629         if (switch_info->representor && dpdk_dev->devargs) {
 630                 struct rte_eth_devargs eth_da;
 631
 632                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
 633                 if (err) {
 634                         rte_errno = -err;
 635                         DRV_LOG(ERR, "failed to process device arguments: %s",
 636                                 strerror(rte_errno));
 637                         return NULL;
 638                 }
 639                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
 640                         if (eth_da.representor_ports[i] ==
 641                             (uint16_t)switch_info->port_name)
 642                                 break;
 643                 if (i == eth_da.nb_representor_ports) {
 644                         rte_errno = EBUSY;
 645                         return NULL;
 646                 }
 647         }
 648         /* Build device name. */
 649         if (spawn->pf_bond <  0) {
 650                 /* Single device. */
 651                 if (!switch_info->representor)
 652                         strlcpy(name, dpdk_dev->name, sizeof(name));
 653                 else
 654                         snprintf(name, sizeof(name), "%s_representor_%u",
 655                                  dpdk_dev->name, switch_info->port_name);
 656         } else {
 657                 /* Bonding device. */
 658                 if (!switch_info->representor)
 659                         snprintf(name, sizeof(name), "%s_%s",
 660                                  dpdk_dev->name,
 661                                  mlx5_os_get_dev_device_name(spawn->phys_dev));
 662                 else
 663                         snprintf(name, sizeof(name), "%s_%s_representor_%u",
 664                                  dpdk_dev->name,
 665                                  mlx5_os_get_dev_device_name(spawn->phys_dev),
 666                                  switch_info->port_name);
 667         }
 668         /* check if the device is already spawned */
 669         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 670                 rte_errno = EEXIST;
 671                 return NULL;
 672         }
 673         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 674         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 675                 struct mlx5_mp_id mp_id;
 676
 677                 eth_dev = rte_eth_dev_attach_secondary(name);
 678                 if (eth_dev == NULL) {
 679                         DRV_LOG(ERR, "can not attach rte ethdev");
 680                         rte_errno = ENOMEM;
 681                         return NULL;
 682                 }
 683                 eth_dev->device = dpdk_dev;
 684                 eth_dev->dev_ops = &mlx5_os_dev_sec_ops;
 685                 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
 686                 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
 687                 err = mlx5_proc_priv_init(eth_dev);
 688                 if (err)
 689                         return NULL;
 690                 mp_id.port_id = eth_dev->data->port_id;
 691                 strlcpy(mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 692                 /* Receive command fd from primary process */
 693                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
 694                 if (err < 0)
 695                         goto err_secondary;
 696                 /* Remap UAR for Tx queues. */
 697                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
 698                 if (err)
 699                         goto err_secondary;
 700                 /*
 701                  * Ethdev pointer is still required as input since
 702                  * the primary device is not accessible from the
 703                  * secondary process.
 704                  */
 705                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
 706                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
 707                 return eth_dev;
 708 err_secondary:
 709                 mlx5_dev_close(eth_dev);
 710                 return NULL;
 711         }
 712         /*
 713          * Some parameters ("tx_db_nc" in particularly) are needed in
 714          * advance to create dv/verbs device context. We proceed the
 715          * devargs here to get ones, and later proceed devargs again
 716          * to override some hardware settings.
 717          */
 718         err = mlx5_args(config, dpdk_dev->devargs);
 719         if (err) {
 720                 err = rte_errno;
 721                 DRV_LOG(ERR, "failed to process device arguments: %s",
 722                         strerror(rte_errno));
 723                 goto error;
 724         }
 725         mlx5_malloc_mem_select(config->sys_mem_en);
 726         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
 727         if (!sh)
 728                 return NULL;
 729         config->devx = sh->devx;
 730 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
 731         config->dest_tir = 1;
 732 #endif
 733 #ifdef HAVE_IBV_MLX5_MOD_SWP
 734         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
 735 #endif
 736         /*
 737          * Multi-packet send is supported by ConnectX-4 Lx PF as well
 738          * as all ConnectX-5 devices.
 739          */
 740 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 741         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
 742 #endif
 743 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 744         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
 745 #endif
 746         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
 747         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
 748                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
 749                         DRV_LOG(DEBUG, "enhanced MPW is supported");
 750                         mps = MLX5_MPW_ENHANCED;
 751                 } else {
 752                         DRV_LOG(DEBUG, "MPW is supported");
 753                         mps = MLX5_MPW;
 754                 }
 755         } else {
 756                 DRV_LOG(DEBUG, "MPW isn't supported");
 757                 mps = MLX5_MPW_DISABLED;
 758         }
 759 #ifdef HAVE_IBV_MLX5_MOD_SWP
 760         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
 761                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
 762         DRV_LOG(DEBUG, "SWP support: %u", swp);
 763 #endif
 764         config->swp = !!swp;
 765 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 766         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
 767                 struct mlx5dv_striding_rq_caps mprq_caps =
 768                         dv_attr.striding_rq_caps;
 769
 770                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
 771                         mprq_caps.min_single_stride_log_num_of_bytes);
 772                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
 773                         mprq_caps.max_single_stride_log_num_of_bytes);
 774                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
 775                         mprq_caps.min_single_wqe_log_num_of_strides);
 776                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
 777                         mprq_caps.max_single_wqe_log_num_of_strides);
 778                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
 779                         mprq_caps.supported_qpts);
 780                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
 781                 mprq = 1;
 782                 mprq_min_stride_size_n =
 783                         mprq_caps.min_single_stride_log_num_of_bytes;
 784                 mprq_max_stride_size_n =
 785                         mprq_caps.max_single_stride_log_num_of_bytes;
 786                 mprq_min_stride_num_n =
 787                         mprq_caps.min_single_wqe_log_num_of_strides;
 788                 mprq_max_stride_num_n =
 789                         mprq_caps.max_single_wqe_log_num_of_strides;
 790         }
 791 #endif
 792         if (RTE_CACHE_LINE_SIZE == 128 &&
 793             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
 794                 cqe_comp = 0;
 795         else
 796                 cqe_comp = 1;
 797         config->cqe_comp = cqe_comp;
 798 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
 799         /* Whether device supports 128B Rx CQE padding. */
 800         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
 801                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
 802 #endif
 803 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 804         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
 805                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
 806                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
 807                              (dv_attr.tunnel_offloads_caps &
 808                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
 809                              (dv_attr.tunnel_offloads_caps &
 810                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
 811         }
 812         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
 813                 tunnel_en ? "" : "not ");
 814 #else
 815         DRV_LOG(WARNING,
 816                 "tunnel offloading disabled due to old OFED/rdma-core version");
 817 #endif
 818         config->tunnel_en = tunnel_en;
 819 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
 820         mpls_en = ((dv_attr.tunnel_offloads_caps &
 821                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
 822                    (dv_attr.tunnel_offloads_caps &
 823                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
 824         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
 825                 mpls_en ? "" : "not ");
 826 #else
 827         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
 828                 " old OFED/rdma-core version or firmware configuration");
 829 #endif
 830         config->mpls_en = mpls_en;
 831         /* Check port status. */
 832         err = mlx5_glue->query_port(sh->ctx, spawn->phys_port, &port_attr);
 833         if (err) {
 834                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
 835                 goto error;
 836         }
 837         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
 838                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
 839                 err = EINVAL;
 840                 goto error;
 841         }
 842         if (port_attr.state != IBV_PORT_ACTIVE)
 843                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
 844                         mlx5_glue->port_state_str(port_attr.state),
 845                         port_attr.state);
 846         /* Allocate private eth device data. */
 847         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
 848                            sizeof(*priv),
 849                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
 850         if (priv == NULL) {
 851                 DRV_LOG(ERR, "priv allocation failure");
 852                 err = ENOMEM;
 853                 goto error;
 854         }
 855         priv->sh = sh;
 856         priv->dev_port = spawn->phys_port;
 857         priv->pci_dev = spawn->pci_dev;
 858         priv->mtu = RTE_ETHER_MTU;
 859         priv->mp_id.port_id = port_id;
 860         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
 861         /* Some internal functions rely on Netlink sockets, open them now. */
 862         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
 863         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
 864         priv->representor = !!switch_info->representor;
 865         priv->master = !!switch_info->master;
 866         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
 867         priv->vport_meta_tag = 0;
 868         priv->vport_meta_mask = 0;
 869         priv->pf_bond = spawn->pf_bond;
 870 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
 871         /*
 872          * The DevX port query API is implemented. E-Switch may use
 873          * either vport or reg_c[0] metadata register to match on
 874          * vport index. The engaged part of metadata register is
 875          * defined by mask.
 876          */
 877         if (switch_info->representor || switch_info->master) {
 878                 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
 879                                       MLX5DV_DEVX_PORT_MATCH_REG_C_0;
 880                 err = mlx5_glue->devx_port_query(sh->ctx, spawn->phys_port,
 881                                                  &devx_port);
 882                 if (err) {
 883                         DRV_LOG(WARNING,
 884                                 "can't query devx port %d on device %s",
 885                                 spawn->phys_port,
 886                                 mlx5_os_get_dev_device_name(spawn->phys_dev));
 887                         devx_port.comp_mask = 0;
 888                 }
 889         }
 890         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
 891                 priv->vport_meta_tag = devx_port.reg_c_0.value;
 892                 priv->vport_meta_mask = devx_port.reg_c_0.mask;
 893                 if (!priv->vport_meta_mask) {
 894                         DRV_LOG(ERR, "vport zero mask for port %d"
 895                                      " on bonding device %s",
 896                                      spawn->phys_port,
 897                                      mlx5_os_get_dev_device_name
 898                                                         (spawn->phys_dev));
 899                         err = ENOTSUP;
 900                         goto error;
 901                 }
 902                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
 903                         DRV_LOG(ERR, "invalid vport tag for port %d"
 904                                      " on bonding device %s",
 905                                      spawn->phys_port,
 906                                      mlx5_os_get_dev_device_name
 907                                                         (spawn->phys_dev));
 908                         err = ENOTSUP;
 909                         goto error;
 910                 }
 911         }
 912         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
 913                 priv->vport_id = devx_port.vport_num;
 914         } else if (spawn->pf_bond >= 0) {
 915                 DRV_LOG(ERR, "can't deduce vport index for port %d"
 916                              " on bonding device %s",
 917                              spawn->phys_port,
 918                              mlx5_os_get_dev_device_name(spawn->phys_dev));
 919                 err = ENOTSUP;
 920                 goto error;
 921         } else {
 922                 /* Suppose vport index in compatible way. */
 923                 priv->vport_id = switch_info->representor ?
 924                                  switch_info->port_name + 1 : -1;
 925         }
 926 #else
 927         /*
 928          * Kernel/rdma_core support single E-Switch per PF configurations
 929          * only and vport_id field contains the vport index for
 930          * associated VF, which is deduced from representor port name.
 931          * For example, let's have the IB device port 10, it has
 932          * attached network device eth0, which has port name attribute
 933          * pf0vf2, we can deduce the VF number as 2, and set vport index
 934          * as 3 (2+1). This assigning schema should be changed if the
 935          * multiple E-Switch instances per PF configurations or/and PCI
 936          * subfunctions are added.
 937          */
 938         priv->vport_id = switch_info->representor ?
 939                          switch_info->port_name + 1 : -1;
 940 #endif
 941         /* representor_id field keeps the unmodified VF index. */
 942         priv->representor_id = switch_info->representor ?
 943                                switch_info->port_name : -1;
 944         /*
 945          * Look for sibling devices in order to reuse their switch domain
 946          * if any, otherwise allocate one.
 947          */
 948         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
 949                 const struct mlx5_priv *opriv =
 950                         rte_eth_devices[port_id].data->dev_private;
 951
 952                 if (!opriv ||
 953                     opriv->sh != priv->sh ||
 954                         opriv->domain_id ==
 955                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
 956                         continue;
 957                 priv->domain_id = opriv->domain_id;
 958                 break;
 959         }
 960         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
 961                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
 962                 if (err) {
 963                         err = rte_errno;
 964                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
 965                                 strerror(rte_errno));
 966                         goto error;
 967                 }
 968                 own_domain_id = 1;
 969         }
 970         /* Override some values set by hardware configuration. */
 971         mlx5_args(config, dpdk_dev->devargs);
 972         err = mlx5_dev_check_sibling_config(priv, config);
 973         if (err)
 974                 goto error;
 975         config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
 976                             IBV_DEVICE_RAW_IP_CSUM);
 977         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
 978                 (config->hw_csum ? "" : "not "));
 979 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
 980         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
 981         DRV_LOG(DEBUG, "counters are not supported");
 982 #endif
 983 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
 984         if (config->dv_flow_en) {
 985                 DRV_LOG(WARNING, "DV flow is not supported");
 986                 config->dv_flow_en = 0;
 987         }
 988 #endif
 989         config->ind_table_max_size =
 990                 sh->device_attr.max_rwq_indirection_table_size;
 991         /*
 992          * Remove this check once DPDK supports larger/variable
 993          * indirection tables.
 994          */
 995         if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
 996                 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
 997         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
 998                 config->ind_table_max_size);
 999         config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1000                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1001         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1002                 (config->hw_vlan_strip ? "" : "not "));
1003         config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1004                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1005 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1006         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1007 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1008         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1009                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1010 #endif
1011         if (config->hw_padding && !hw_padding) {
1012                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1013                 config->hw_padding = 0;
1014         } else if (config->hw_padding) {
1015                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1016         }
1017         config->tso = (sh->device_attr.max_tso > 0 &&
1018                       (sh->device_attr.tso_supported_qpts &
1019                        (1 << IBV_QPT_RAW_PACKET)));
1020         if (config->tso)
1021                 config->tso_max_payload_sz = sh->device_attr.max_tso;
1022         /*
1023          * MPW is disabled by default, while the Enhanced MPW is enabled
1024          * by default.
1025          */
1026         if (config->mps == MLX5_ARG_UNSET)
1027                 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1028                                                           MLX5_MPW_DISABLED;
1029         else
1030                 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
1031         DRV_LOG(INFO, "%sMPS is %s",
1032                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1033                 config->mps == MLX5_MPW ? "legacy " : "",
1034                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1035         if (config->cqe_comp && !cqe_comp) {
1036                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1037                 config->cqe_comp = 0;
1038         }
1039         if (config->cqe_pad && !cqe_pad) {
1040                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1041                 config->cqe_pad = 0;
1042         } else if (config->cqe_pad) {
1043                 DRV_LOG(INFO, "Rx CQE padding is enabled");
1044         }
1045         if (config->devx) {
1046                 priv->counter_fallback = 0;
1047                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config->hca_attr);
1048                 if (err) {
1049                         err = -err;
1050                         goto error;
1051                 }
1052                 if (!config->hca_attr.flow_counters_dump)
1053                         priv->counter_fallback = 1;
1054 #ifndef HAVE_IBV_DEVX_ASYNC
1055                 priv->counter_fallback = 1;
1056 #endif
1057                 if (priv->counter_fallback)
1058                         DRV_LOG(INFO, "Use fall-back DV counter management");
1059                 /* Check for LRO support. */
1060                 if (config->dest_tir && config->hca_attr.lro_cap &&
1061                     config->dv_flow_en) {
1062                         /* TBD check tunnel lro caps. */
1063                         config->lro.supported = config->hca_attr.lro_cap;
1064                         DRV_LOG(DEBUG, "Device supports LRO");
1065                         /*
1066                          * If LRO timeout is not configured by application,
1067                          * use the minimal supported value.
1068                          */
1069                         if (!config->lro.timeout)
1070                                 config->lro.timeout =
1071                                 config->hca_attr.lro_timer_supported_periods[0];
1072                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1073                                 config->lro.timeout);
1074                 }
1075 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
1076                 if (config->hca_attr.qos.sup &&
1077                     config->hca_attr.qos.srtcm_sup &&
1078                     config->dv_flow_en) {
1079                         uint8_t reg_c_mask =
1080                                 config->hca_attr.qos.flow_meter_reg_c_ids;
1081                         /*
1082                          * Meter needs two REG_C's for color match and pre-sfx
1083                          * flow match. Here get the REG_C for color match.
1084                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
1085                          */
1086                         reg_c_mask &= 0xfc;
1087                         if (__builtin_popcount(reg_c_mask) < 1) {
1088                                 priv->mtr_en = 0;
1089                                 DRV_LOG(WARNING, "No available register for"
1090                                         " meter.");
1091                         } else {
1092                                 priv->mtr_color_reg = ffs(reg_c_mask) - 1 +
1093                                                       REG_C_0;
1094                                 priv->mtr_en = 1;
1095                                 priv->mtr_reg_share =
1096                                       config->hca_attr.qos.flow_meter_reg_share;
1097                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1098                                         priv->mtr_color_reg);
1099                         }
1100                 }
1101 #endif
1102         }
1103         if (config->tx_pp) {
1104                 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1105                         config->hca_attr.dev_freq_khz);
1106                 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1107                         config->hca_attr.qos.packet_pacing ? "" : "not ");
1108                 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1109                         config->hca_attr.cross_channel ? "" : "not ");
1110                 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1111                         config->hca_attr.wqe_index_ignore ? "" : "not ");
1112                 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1113                         config->hca_attr.non_wire_sq ? "" : "not ");
1114                 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1115                         config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1116                         config->hca_attr.log_max_static_sq_wq);
1117                 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1118                         config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1119                 if (!config->devx) {
1120                         DRV_LOG(ERR, "DevX is required for packet pacing");
1121                         err = ENODEV;
1122                         goto error;
1123                 }
1124                 if (!config->hca_attr.qos.packet_pacing) {
1125                         DRV_LOG(ERR, "Packet pacing is not supported");
1126                         err = ENODEV;
1127                         goto error;
1128                 }
1129                 if (!config->hca_attr.cross_channel) {
1130                         DRV_LOG(ERR, "Cross channel operations are"
1131                                      " required for packet pacing");
1132                         err = ENODEV;
1133                         goto error;
1134                 }
1135                 if (!config->hca_attr.wqe_index_ignore) {
1136                         DRV_LOG(ERR, "WQE index ignore feature is"
1137                                      " required for packet pacing");
1138                         err = ENODEV;
1139                         goto error;
1140                 }
1141                 if (!config->hca_attr.non_wire_sq) {
1142                         DRV_LOG(ERR, "Non-wire SQ feature is"
1143                                      " required for packet pacing");
1144                         err = ENODEV;
1145                         goto error;
1146                 }
1147                 if (!config->hca_attr.log_max_static_sq_wq) {
1148                         DRV_LOG(ERR, "Static WQE SQ feature is"
1149                                      " required for packet pacing");
1150                         err = ENODEV;
1151                         goto error;
1152                 }
1153                 if (!config->hca_attr.qos.wqe_rate_pp) {
1154                         DRV_LOG(ERR, "WQE rate mode is required"
1155                                      " for packet pacing");
1156                         err = ENODEV;
1157                         goto error;
1158                 }
1159 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1160                 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1161                              " can't create queues for packet pacing");
1162                 err = ENODEV;
1163                 goto error;
1164 #endif
1165         }
1166         if (config->devx) {
1167                 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1168
1169                 err = config->hca_attr.access_register_user ?
1170                         mlx5_devx_cmd_register_read
1171                                 (sh->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1172                                 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1173                 if (!err) {
1174                         uint32_t ts_mode;
1175
1176                         /* MTUTC register is read successfully. */
1177                         ts_mode = MLX5_GET(register_mtutc, reg,
1178                                            time_stamp_mode);
1179                         if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1180                                 config->rt_timestamp = 1;
1181                 } else {
1182                         /* Kernel does not support register reading. */
1183                         if (config->hca_attr.dev_freq_khz ==
1184                                                  (NS_PER_S / MS_PER_S))
1185                                 config->rt_timestamp = 1;
1186                 }
1187         }
1188         /*
1189          * If HW has bug working with tunnel packet decapsulation and
1190          * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1191          * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1192          */
1193         if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1194                 config->hw_fcs_strip = 0;
1195         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1196                 (config->hw_fcs_strip ? "" : "not "));
1197         if (config->mprq.enabled && mprq) {
1198                 if (config->mprq.stride_num_n &&
1199                     (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1200                      config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1201                         config->mprq.stride_num_n =
1202                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1203                                                 mprq_min_stride_num_n),
1204                                         mprq_max_stride_num_n);
1205                         DRV_LOG(WARNING,
1206                                 "the number of strides"
1207                                 " for Multi-Packet RQ is out of range,"
1208                                 " setting default value (%u)",
1209                                 1 << config->mprq.stride_num_n);
1210                 }
1211                 if (config->mprq.stride_size_n &&
1212                     (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1213                      config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1214                         config->mprq.stride_size_n =
1215                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1216                                                 mprq_min_stride_size_n),
1217                                         mprq_max_stride_size_n);
1218                         DRV_LOG(WARNING,
1219                                 "the size of a stride"
1220                                 " for Multi-Packet RQ is out of range,"
1221                                 " setting default value (%u)",
1222                                 1 << config->mprq.stride_size_n);
1223                 }
1224                 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1225                 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1226         } else if (config->mprq.enabled && !mprq) {
1227                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1228                 config->mprq.enabled = 0;
1229         }
1230         if (config->max_dump_files_num == 0)
1231                 config->max_dump_files_num = 128;
1232         eth_dev = rte_eth_dev_allocate(name);
1233         if (eth_dev == NULL) {
1234                 DRV_LOG(ERR, "can not allocate rte ethdev");
1235                 err = ENOMEM;
1236                 goto error;
1237         }
1238         if (priv->representor) {
1239                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1240                 eth_dev->data->representor_id = priv->representor_id;
1241         }
1242         /*
1243          * Store associated network device interface index. This index
1244          * is permanent throughout the lifetime of device. So, we may store
1245          * the ifindex here and use the cached value further.
1246          */
1247         MLX5_ASSERT(spawn->ifindex);
1248         priv->if_index = spawn->ifindex;
1249         if (priv->pf_bond >= 0 && priv->master) {
1250                 /* Get bond interface info */
1251                 err = mlx5_sysfs_bond_info(priv->if_index,
1252                                      &priv->bond_ifindex,
1253                                      priv->bond_name);
1254                 if (err)
1255                         DRV_LOG(ERR, "unable to get bond info: %s",
1256                                 strerror(rte_errno));
1257                 else
1258                         DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
1259                                 priv->if_index, priv->bond_ifindex,
1260                                 priv->bond_name);
1261         }
1262         eth_dev->data->dev_private = priv;
1263         priv->dev_data = eth_dev->data;
1264         eth_dev->data->mac_addrs = priv->mac;
1265         eth_dev->device = dpdk_dev;
1266         /* Configure the first MAC address by default. */
1267         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1268                 DRV_LOG(ERR,
1269                         "port %u cannot get MAC address, is mlx5_en"
1270                         " loaded? (errno: %s)",
1271                         eth_dev->data->port_id, strerror(rte_errno));
1272                 err = ENODEV;
1273                 goto error;
1274         }
1275         DRV_LOG(INFO,
1276                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1277                 eth_dev->data->port_id,
1278                 mac.addr_bytes[0], mac.addr_bytes[1],
1279                 mac.addr_bytes[2], mac.addr_bytes[3],
1280                 mac.addr_bytes[4], mac.addr_bytes[5]);
1281 #ifdef RTE_LIBRTE_MLX5_DEBUG
1282         {
1283                 char ifname[IF_NAMESIZE];
1284
1285                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1286                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1287                                 eth_dev->data->port_id, ifname);
1288                 else
1289                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1290                                 eth_dev->data->port_id);
1291         }
1292 #endif
1293         /* Get actual MTU if possible. */
1294         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1295         if (err) {
1296                 err = rte_errno;
1297                 goto error;
1298         }
1299         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1300                 priv->mtu);
1301         /* Initialize burst functions to prevent crashes before link-up. */
1302         eth_dev->rx_pkt_burst = removed_rx_burst;
1303         eth_dev->tx_pkt_burst = removed_tx_burst;
1304         eth_dev->dev_ops = &mlx5_os_dev_ops;
1305         eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1306         eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1307         eth_dev->rx_queue_count = mlx5_rx_queue_count;
1308         /* Register MAC address. */
1309         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1310         if (config->vf && config->vf_nl_en)
1311                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1312                                       mlx5_ifindex(eth_dev),
1313                                       eth_dev->data->mac_addrs,
1314                                       MLX5_MAX_MAC_ADDRESSES);
1315         priv->flows = 0;
1316         priv->ctrl_flows = 0;
1317         TAILQ_INIT(&priv->flow_meters);
1318         TAILQ_INIT(&priv->flow_meter_profiles);
1319         /* Hint libmlx5 to use PMD allocator for data plane resources */
1320         mlx5_glue->dv_set_context_attr(sh->ctx,
1321                         MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1322                         (void *)((uintptr_t)&(struct mlx5dv_ctx_allocators){
1323                                 .alloc = &mlx5_alloc_verbs_buf,
1324                                 .free = &mlx5_free_verbs_buf,
1325                                 .data = priv,
1326                         }));
1327         /* Bring Ethernet device up. */
1328         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1329                 eth_dev->data->port_id);
1330         mlx5_set_link_up(eth_dev);
1331         /*
1332          * Even though the interrupt handler is not installed yet,
1333          * interrupts will still trigger on the async_fd from
1334          * Verbs context returned by ibv_open_device().
1335          */
1336         mlx5_link_update(eth_dev, 0);
1337 #ifdef HAVE_MLX5DV_DR_ESWITCH
1338         if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1339               (switch_info->representor || switch_info->master)))
1340                 config->dv_esw_en = 0;
1341 #else
1342         config->dv_esw_en = 0;
1343 #endif
1344         /* Detect minimal data bytes to inline. */
1345         mlx5_set_min_inline(spawn, config);
1346         /* Store device configuration on private structure. */
1347         priv->config = *config;
1348         /* Create context for virtual machine VLAN workaround. */
1349         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1350         if (config->dv_flow_en) {
1351                 err = mlx5_alloc_shared_dr(priv);
1352                 if (err)
1353                         goto error;
1354                 /*
1355                  * RSS id is shared with meter flow id. Meter flow id can only
1356                  * use the 24 MSB of the register.
1357                  */
1358                 priv->qrss_id_pool = mlx5_flow_id_pool_alloc(UINT32_MAX >>
1359                                      MLX5_MTR_COLOR_BITS);
1360                 if (!priv->qrss_id_pool) {
1361                         DRV_LOG(ERR, "can't create flow id pool");
1362                         err = ENOMEM;
1363                         goto error;
1364                 }
1365         }
1366         /*
1367          * Initialize the dev_ops structure with DevX/Verbs function pointers.
1368          * When DevX is supported and both DV flow and dest tir are enabled, all
1369          * Rx functions use DevX API (except for drop that has not yet been
1370          * implemented in DevX).
1371          */
1372         if (config->devx && config->dv_flow_en && config->dest_tir) {
1373                 priv->obj_ops = devx_obj_ops;
1374                 priv->obj_ops.drop_action_create =
1375                                                 ibv_obj_ops.drop_action_create;
1376                 priv->obj_ops.drop_action_destroy =
1377                                                 ibv_obj_ops.drop_action_destroy;
1378         } else {
1379                 priv->obj_ops = ibv_obj_ops;
1380         }
1381         /* The Tx objects are managed by a specific linux wrapper functions. */
1382         priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;
1383         priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;
1384         /* Supported Verbs flow priority number detection. */
1385         err = mlx5_flow_discover_priorities(eth_dev);
1386         if (err < 0) {
1387                 err = -err;
1388                 goto error;
1389         }
1390         priv->config.flow_prio = err;
1391         if (!priv->config.dv_esw_en &&
1392             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1393                 DRV_LOG(WARNING, "metadata mode %u is not supported "
1394                                  "(no E-Switch)", priv->config.dv_xmeta_en);
1395                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1396         }
1397         mlx5_set_metadata_mask(eth_dev);
1398         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1399             !priv->sh->dv_regc0_mask) {
1400                 DRV_LOG(ERR, "metadata mode %u is not supported "
1401                              "(no metadata reg_c[0] is available)",
1402                              priv->config.dv_xmeta_en);
1403                         err = ENOTSUP;
1404                         goto error;
1405         }
1406         /*
1407          * Allocate the buffer for flow creating, just once.
1408          * The allocation must be done before any flow creating.
1409          */
1410         mlx5_flow_alloc_intermediate(eth_dev);
1411         /* Query availability of metadata reg_c's. */
1412         err = mlx5_flow_discover_mreg_c(eth_dev);
1413         if (err < 0) {
1414                 err = -err;
1415                 goto error;
1416         }
1417         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1418                 DRV_LOG(DEBUG,
1419                         "port %u extensive metadata register is not supported",
1420                         eth_dev->data->port_id);
1421                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1422                         DRV_LOG(ERR, "metadata mode %u is not supported "
1423                                      "(no metadata registers available)",
1424                                      priv->config.dv_xmeta_en);
1425                         err = ENOTSUP;
1426                         goto error;
1427                 }
1428         }
1429         if (priv->config.dv_flow_en &&
1430             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1431             mlx5_flow_ext_mreg_supported(eth_dev) &&
1432             priv->sh->dv_regc0_mask) {
1433                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1434                                                       MLX5_FLOW_MREG_HTABLE_SZ);
1435                 if (!priv->mreg_cp_tbl) {
1436                         err = ENOMEM;
1437                         goto error;
1438                 }
1439         }
1440         return eth_dev;
1441 error:
1442         if (priv) {
1443                 if (priv->mreg_cp_tbl)
1444                         mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
1445                 if (priv->sh)
1446                         mlx5_os_free_shared_dr(priv);
1447                 if (priv->nl_socket_route >= 0)
1448                         close(priv->nl_socket_route);
1449                 if (priv->nl_socket_rdma >= 0)
1450                         close(priv->nl_socket_rdma);
1451                 if (priv->vmwa_context)
1452                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1453                 if (priv->qrss_id_pool)
1454                         mlx5_flow_id_pool_release(priv->qrss_id_pool);
1455                 if (own_domain_id)
1456                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1457                 mlx5_free(priv);
1458                 if (eth_dev != NULL)
1459                         eth_dev->data->dev_private = NULL;
1460         }
1461         if (eth_dev != NULL) {
1462                 /* mac_addrs must not be freed alone because part of
1463                  * dev_private
1464                  **/
1465                 eth_dev->data->mac_addrs = NULL;
1466                 rte_eth_dev_release_port(eth_dev);
1467         }
1468         if (sh)
1469                 mlx5_free_shared_dev_ctx(sh);
1470         MLX5_ASSERT(err > 0);
1471         rte_errno = err;
1472         return NULL;
1473 }
1474
1475 /**
1476  * Comparison callback to sort device data.
1477  *
1478  * This is meant to be used with qsort().
1479  *
1480  * @param a[in]
1481  *   Pointer to pointer to first data object.
1482  * @param b[in]
1483  *   Pointer to pointer to second data object.
1484  *
1485  * @return
1486  *   0 if both objects are equal, less than 0 if the first argument is less
1487  *   than the second, greater than 0 otherwise.
1488  */
1489 static int
1490 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1491 {
1492         const struct mlx5_switch_info *si_a =
1493                 &((const struct mlx5_dev_spawn_data *)a)->info;
1494         const struct mlx5_switch_info *si_b =
1495                 &((const struct mlx5_dev_spawn_data *)b)->info;
1496         int ret;
1497
1498         /* Master device first. */
1499         ret = si_b->master - si_a->master;
1500         if (ret)
1501                 return ret;
1502         /* Then representor devices. */
1503         ret = si_b->representor - si_a->representor;
1504         if (ret)
1505                 return ret;
1506         /* Unidentified devices come last in no specific order. */
1507         if (!si_a->representor)
1508                 return 0;
1509         /* Order representors by name. */
1510         return si_a->port_name - si_b->port_name;
1511 }
1512
1513 /**
1514  * Match PCI information for possible slaves of bonding device.
1515  *
1516  * @param[in] ibv_dev
1517  *   Pointer to Infiniband device structure.
1518  * @param[in] pci_dev
1519  *   Pointer to PCI device structure to match PCI address.
1520  * @param[in] nl_rdma
1521  *   Netlink RDMA group socket handle.
1522  *
1523  * @return
1524  *   negative value if no bonding device found, otherwise
1525  *   positive index of slave PF in bonding.
1526  */
1527 static int
1528 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
1529                            const struct rte_pci_device *pci_dev,
1530                            int nl_rdma)
1531 {
1532         char ifname[IF_NAMESIZE + 1];
1533         unsigned int ifindex;
1534         unsigned int np, i;
1535         FILE *file = NULL;
1536         int pf = -1;
1537
1538         /*
1539          * Try to get master device name. If something goes
1540          * wrong suppose the lack of kernel support and no
1541          * bonding devices.
1542          */
1543         if (nl_rdma < 0)
1544                 return -1;
1545         if (!strstr(ibv_dev->name, "bond"))
1546                 return -1;
1547         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
1548         if (!np)
1549                 return -1;
1550         /*
1551          * The Master device might not be on the predefined
1552          * port (not on port index 1, it is not garanted),
1553          * we have to scan all Infiniband device port and
1554          * find master.
1555          */
1556         for (i = 1; i <= np; ++i) {
1557                 /* Check whether Infiniband port is populated. */
1558                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
1559                 if (!ifindex)
1560                         continue;
1561                 if (!if_indextoname(ifindex, ifname))
1562                         continue;
1563                 /* Try to read bonding slave names from sysfs. */
1564                 MKSTR(slaves,
1565                       "/sys/class/net/%s/master/bonding/slaves", ifname);
1566                 file = fopen(slaves, "r");
1567                 if (file)
1568                         break;
1569         }
1570         if (!file)
1571                 return -1;
1572         /* Use safe format to check maximal buffer length. */
1573         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1574         while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1575                 char tmp_str[IF_NAMESIZE + 32];
1576                 struct rte_pci_addr pci_addr;
1577                 struct mlx5_switch_info info;
1578
1579                 /* Process slave interface names in the loop. */
1580                 snprintf(tmp_str, sizeof(tmp_str),
1581                          "/sys/class/net/%s", ifname);
1582                 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
1583                         DRV_LOG(WARNING, "can not get PCI address"
1584                                          " for netdev \"%s\"", ifname);
1585                         continue;
1586                 }
1587                 if (pci_dev->addr.domain != pci_addr.domain ||
1588                     pci_dev->addr.bus != pci_addr.bus ||
1589                     pci_dev->addr.devid != pci_addr.devid ||
1590                     pci_dev->addr.function != pci_addr.function)
1591                         continue;
1592                 /* Slave interface PCI address match found. */
1593                 fclose(file);
1594                 snprintf(tmp_str, sizeof(tmp_str),
1595                          "/sys/class/net/%s/phys_port_name", ifname);
1596                 file = fopen(tmp_str, "rb");
1597                 if (!file)
1598                         break;
1599                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
1600                 if (fscanf(file, "%32s", tmp_str) == 1)
1601                         mlx5_translate_port_name(tmp_str, &info);
1602                 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
1603                     info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
1604                         pf = info.port_name;
1605                 break;
1606         }
1607         if (file)
1608                 fclose(file);
1609         return pf;
1610 }
1611
1612 /**
1613  * DPDK callback to register a PCI device.
1614  *
1615  * This function spawns Ethernet devices out of a given PCI device.
1616  *
1617  * @param[in] pci_drv
1618  *   PCI driver structure (mlx5_driver).
1619  * @param[in] pci_dev
1620  *   PCI device information.
1621  *
1622  * @return
1623  *   0 on success, a negative errno value otherwise and rte_errno is set.
1624  */
1625 int
1626 mlx5_os_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1627                   struct rte_pci_device *pci_dev)
1628 {
1629         struct ibv_device **ibv_list;
1630         /*
1631          * Number of found IB Devices matching with requested PCI BDF.
1632          * nd != 1 means there are multiple IB devices over the same
1633          * PCI device and we have representors and master.
1634          */
1635         unsigned int nd = 0;
1636         /*
1637          * Number of found IB device Ports. nd = 1 and np = 1..n means
1638          * we have the single multiport IB device, and there may be
1639          * representors attached to some of found ports.
1640          */
1641         unsigned int np = 0;
1642         /*
1643          * Number of DPDK ethernet devices to Spawn - either over
1644          * multiple IB devices or multiple ports of single IB device.
1645          * Actually this is the number of iterations to spawn.
1646          */
1647         unsigned int ns = 0;
1648         /*
1649          * Bonding device
1650          *   < 0 - no bonding device (single one)
1651          *  >= 0 - bonding device (value is slave PF index)
1652          */
1653         int bd = -1;
1654         struct mlx5_dev_spawn_data *list = NULL;
1655         struct mlx5_dev_config dev_config;
1656         unsigned int dev_config_vf;
1657         int ret;
1658
1659         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1660                 mlx5_pmd_socket_init();
1661         ret = mlx5_init_once();
1662         if (ret) {
1663                 DRV_LOG(ERR, "unable to init PMD global data: %s",
1664                         strerror(rte_errno));
1665                 return -rte_errno;
1666         }
1667         errno = 0;
1668         ibv_list = mlx5_glue->get_device_list(&ret);
1669         if (!ibv_list) {
1670                 rte_errno = errno ? errno : ENOSYS;
1671                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1672                 return -rte_errno;
1673         }
1674         /*
1675          * First scan the list of all Infiniband devices to find
1676          * matching ones, gathering into the list.
1677          */
1678         struct ibv_device *ibv_match[ret + 1];
1679         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
1680         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1681         unsigned int i;
1682
1683         while (ret-- > 0) {
1684                 struct rte_pci_addr pci_addr;
1685
1686                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1687                 bd = mlx5_device_bond_pci_match
1688                                 (ibv_list[ret], pci_dev, nl_rdma);
1689                 if (bd >= 0) {
1690                         /*
1691                          * Bonding device detected. Only one match is allowed,
1692                          * the bonding is supported over multi-port IB device,
1693                          * there should be no matches on representor PCI
1694                          * functions or non VF LAG bonding devices with
1695                          * specified address.
1696                          */
1697                         if (nd) {
1698                                 DRV_LOG(ERR,
1699                                         "multiple PCI match on bonding device"
1700                                         "\"%s\" found", ibv_list[ret]->name);
1701                                 rte_errno = ENOENT;
1702                                 ret = -rte_errno;
1703                                 goto exit;
1704                         }
1705                         DRV_LOG(INFO, "PCI information matches for"
1706                                       " slave %d bonding device \"%s\"",
1707                                       bd, ibv_list[ret]->name);
1708                         ibv_match[nd++] = ibv_list[ret];
1709                         break;
1710                 }
1711                 if (mlx5_dev_to_pci_addr
1712                         (ibv_list[ret]->ibdev_path, &pci_addr))
1713                         continue;
1714                 if (pci_dev->addr.domain != pci_addr.domain ||
1715                     pci_dev->addr.bus != pci_addr.bus ||
1716                     pci_dev->addr.devid != pci_addr.devid ||
1717                     pci_dev->addr.function != pci_addr.function)
1718                         continue;
1719                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1720                         ibv_list[ret]->name);
1721                 ibv_match[nd++] = ibv_list[ret];
1722         }
1723         ibv_match[nd] = NULL;
1724         if (!nd) {
1725                 /* No device matches, just complain and bail out. */
1726                 DRV_LOG(WARNING,
1727                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
1728                         " are kernel drivers loaded?",
1729                         pci_dev->addr.domain, pci_dev->addr.bus,
1730                         pci_dev->addr.devid, pci_dev->addr.function);
1731                 rte_errno = ENOENT;
1732                 ret = -rte_errno;
1733                 goto exit;
1734         }
1735         if (nd == 1) {
1736                 /*
1737                  * Found single matching device may have multiple ports.
1738                  * Each port may be representor, we have to check the port
1739                  * number and check the representors existence.
1740                  */
1741                 if (nl_rdma >= 0)
1742                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1743                 if (!np)
1744                         DRV_LOG(WARNING, "can not get IB device \"%s\""
1745                                          " ports number", ibv_match[0]->name);
1746                 if (bd >= 0 && !np) {
1747                         DRV_LOG(ERR, "can not get ports"
1748                                      " for bonding device");
1749                         rte_errno = ENOENT;
1750                         ret = -rte_errno;
1751                         goto exit;
1752                 }
1753         }
1754 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
1755         if (bd >= 0) {
1756                 /*
1757                  * This may happen if there is VF LAG kernel support and
1758                  * application is compiled with older rdma_core library.
1759                  */
1760                 DRV_LOG(ERR,
1761                         "No kernel/verbs support for VF LAG bonding found.");
1762                 rte_errno = ENOTSUP;
1763                 ret = -rte_errno;
1764                 goto exit;
1765         }
1766 #endif
1767         /*
1768          * Now we can determine the maximal
1769          * amount of devices to be spawned.
1770          */
1771         list = mlx5_malloc(MLX5_MEM_ZERO,
1772                            sizeof(struct mlx5_dev_spawn_data) *
1773                            (np ? np : nd),
1774                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1775         if (!list) {
1776                 DRV_LOG(ERR, "spawn data array allocation failure");
1777                 rte_errno = ENOMEM;
1778                 ret = -rte_errno;
1779                 goto exit;
1780         }
1781         if (bd >= 0 || np > 1) {
1782                 /*
1783                  * Single IB device with multiple ports found,
1784                  * it may be E-Switch master device and representors.
1785                  * We have to perform identification through the ports.
1786                  */
1787                 MLX5_ASSERT(nl_rdma >= 0);
1788                 MLX5_ASSERT(ns == 0);
1789                 MLX5_ASSERT(nd == 1);
1790                 MLX5_ASSERT(np);
1791                 for (i = 1; i <= np; ++i) {
1792                         list[ns].max_port = np;
1793                         list[ns].phys_port = i;
1794                         list[ns].phys_dev = ibv_match[0];
1795                         list[ns].eth_dev = NULL;
1796                         list[ns].pci_dev = pci_dev;
1797                         list[ns].pf_bond = bd;
1798                         list[ns].ifindex = mlx5_nl_ifindex
1799                                 (nl_rdma,
1800                                 mlx5_os_get_dev_device_name
1801                                                 (list[ns].phys_dev), i);
1802                         if (!list[ns].ifindex) {
1803                                 /*
1804                                  * No network interface index found for the
1805                                  * specified port, it means there is no
1806                                  * representor on this port. It's OK,
1807                                  * there can be disabled ports, for example
1808                                  * if sriov_numvfs < sriov_totalvfs.
1809                                  */
1810                                 continue;
1811                         }
1812                         ret = -1;
1813                         if (nl_route >= 0)
1814                                 ret = mlx5_nl_switch_info
1815                                                (nl_route,
1816                                                 list[ns].ifindex,
1817                                                 &list[ns].info);
1818                         if (ret || (!list[ns].info.representor &&
1819                                     !list[ns].info.master)) {
1820                                 /*
1821                                  * We failed to recognize representors with
1822                                  * Netlink, let's try to perform the task
1823                                  * with sysfs.
1824                                  */
1825                                 ret =  mlx5_sysfs_switch_info
1826                                                 (list[ns].ifindex,
1827                                                  &list[ns].info);
1828                         }
1829                         if (!ret && bd >= 0) {
1830                                 switch (list[ns].info.name_type) {
1831                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
1832                                         if (list[ns].info.port_name == bd)
1833                                                 ns++;
1834                                         break;
1835                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
1836                                         /* Fallthrough */
1837                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
1838                                         if (list[ns].info.pf_num == bd)
1839                                                 ns++;
1840                                         break;
1841                                 default:
1842                                         break;
1843                                 }
1844                                 continue;
1845                         }
1846                         if (!ret && (list[ns].info.representor ^
1847                                      list[ns].info.master))
1848                                 ns++;
1849                 }
1850                 if (!ns) {
1851                         DRV_LOG(ERR,
1852                                 "unable to recognize master/representors"
1853                                 " on the IB device with multiple ports");
1854                         rte_errno = ENOENT;
1855                         ret = -rte_errno;
1856                         goto exit;
1857                 }
1858         } else {
1859                 /*
1860                  * The existence of several matching entries (nd > 1) means
1861                  * port representors have been instantiated. No existing Verbs
1862                  * call nor sysfs entries can tell them apart, this can only
1863                  * be done through Netlink calls assuming kernel drivers are
1864                  * recent enough to support them.
1865                  *
1866                  * In the event of identification failure through Netlink,
1867                  * try again through sysfs, then:
1868                  *
1869                  * 1. A single IB device matches (nd == 1) with single
1870                  *    port (np=0/1) and is not a representor, assume
1871                  *    no switch support.
1872                  *
1873                  * 2. Otherwise no safe assumptions can be made;
1874                  *    complain louder and bail out.
1875                  */
1876                 for (i = 0; i != nd; ++i) {
1877                         memset(&list[ns].info, 0, sizeof(list[ns].info));
1878                         list[ns].max_port = 1;
1879                         list[ns].phys_port = 1;
1880                         list[ns].phys_dev = ibv_match[i];
1881                         list[ns].eth_dev = NULL;
1882                         list[ns].pci_dev = pci_dev;
1883                         list[ns].pf_bond = -1;
1884                         list[ns].ifindex = 0;
1885                         if (nl_rdma >= 0)
1886                                 list[ns].ifindex = mlx5_nl_ifindex
1887                                 (nl_rdma,
1888                                 mlx5_os_get_dev_device_name
1889                                                 (list[ns].phys_dev), 1);
1890                         if (!list[ns].ifindex) {
1891                                 char ifname[IF_NAMESIZE];
1892
1893                                 /*
1894                                  * Netlink failed, it may happen with old
1895                                  * ib_core kernel driver (before 4.16).
1896                                  * We can assume there is old driver because
1897                                  * here we are processing single ports IB
1898                                  * devices. Let's try sysfs to retrieve
1899                                  * the ifindex. The method works for
1900                                  * master device only.
1901                                  */
1902                                 if (nd > 1) {
1903                                         /*
1904                                          * Multiple devices found, assume
1905                                          * representors, can not distinguish
1906                                          * master/representor and retrieve
1907                                          * ifindex via sysfs.
1908                                          */
1909                                         continue;
1910                                 }
1911                                 ret = mlx5_get_ifname_sysfs
1912                                         (ibv_match[i]->ibdev_path, ifname);
1913                                 if (!ret)
1914                                         list[ns].ifindex =
1915                                                 if_nametoindex(ifname);
1916                                 if (!list[ns].ifindex) {
1917                                         /*
1918                                          * No network interface index found
1919                                          * for the specified device, it means
1920                                          * there it is neither representor
1921                                          * nor master.
1922                                          */
1923                                         continue;
1924                                 }
1925                         }
1926                         ret = -1;
1927                         if (nl_route >= 0)
1928                                 ret = mlx5_nl_switch_info
1929                                                (nl_route,
1930                                                 list[ns].ifindex,
1931                                                 &list[ns].info);
1932                         if (ret || (!list[ns].info.representor &&
1933                                     !list[ns].info.master)) {
1934                                 /*
1935                                  * We failed to recognize representors with
1936                                  * Netlink, let's try to perform the task
1937                                  * with sysfs.
1938                                  */
1939                                 ret =  mlx5_sysfs_switch_info
1940                                                 (list[ns].ifindex,
1941                                                  &list[ns].info);
1942                         }
1943                         if (!ret && (list[ns].info.representor ^
1944                                      list[ns].info.master)) {
1945                                 ns++;
1946                         } else if ((nd == 1) &&
1947                                    !list[ns].info.representor &&
1948                                    !list[ns].info.master) {
1949                                 /*
1950                                  * Single IB device with
1951                                  * one physical port and
1952                                  * attached network device.
1953                                  * May be SRIOV is not enabled
1954                                  * or there is no representors.
1955                                  */
1956                                 DRV_LOG(INFO, "no E-Switch support detected");
1957                                 ns++;
1958                                 break;
1959                         }
1960                 }
1961                 if (!ns) {
1962                         DRV_LOG(ERR,
1963                                 "unable to recognize master/representors"
1964                                 " on the multiple IB devices");
1965                         rte_errno = ENOENT;
1966                         ret = -rte_errno;
1967                         goto exit;
1968                 }
1969         }
1970         MLX5_ASSERT(ns);
1971         /*
1972          * Sort list to probe devices in natural order for users convenience
1973          * (i.e. master first, then representors from lowest to highest ID).
1974          */
1975         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
1976         /* Device specific configuration. */
1977         switch (pci_dev->id.device_id) {
1978         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1979         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1980         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1981         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1982         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
1983         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
1984         case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF:
1985                 dev_config_vf = 1;
1986                 break;
1987         default:
1988                 dev_config_vf = 0;
1989                 break;
1990         }
1991         for (i = 0; i != ns; ++i) {
1992                 uint32_t restore;
1993
1994                 /* Default configuration. */
1995                 memset(&dev_config, 0, sizeof(struct mlx5_dev_config));
1996                 dev_config.vf = dev_config_vf;
1997                 dev_config.mps = MLX5_ARG_UNSET;
1998                 dev_config.dbnc = MLX5_ARG_UNSET;
1999                 dev_config.rx_vec_en = 1;
2000                 dev_config.txq_inline_max = MLX5_ARG_UNSET;
2001                 dev_config.txq_inline_min = MLX5_ARG_UNSET;
2002                 dev_config.txq_inline_mpw = MLX5_ARG_UNSET;
2003                 dev_config.txqs_inline = MLX5_ARG_UNSET;
2004                 dev_config.vf_nl_en = 1;
2005                 dev_config.mr_ext_memseg_en = 1;
2006                 dev_config.mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
2007                 dev_config.mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
2008                 dev_config.dv_esw_en = 1;
2009                 dev_config.dv_flow_en = 1;
2010                 dev_config.decap_en = 1;
2011                 dev_config.log_hp_size = MLX5_ARG_UNSET;
2012                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2013                                                  &list[i],
2014                                                  &dev_config);
2015                 if (!list[i].eth_dev) {
2016                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2017                                 break;
2018                         /* Device is disabled or already spawned. Ignore it. */
2019                         continue;
2020                 }
2021                 restore = list[i].eth_dev->data->dev_flags;
2022                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2023                 /* Restore non-PCI flags cleared by the above call. */
2024                 list[i].eth_dev->data->dev_flags |= restore;
2025                 rte_eth_dev_probing_finish(list[i].eth_dev);
2026         }
2027         if (i != ns) {
2028                 DRV_LOG(ERR,
2029                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2030                         " encountering an error: %s",
2031                         pci_dev->addr.domain, pci_dev->addr.bus,
2032                         pci_dev->addr.devid, pci_dev->addr.function,
2033                         strerror(rte_errno));
2034                 ret = -rte_errno;
2035                 /* Roll back. */
2036                 while (i--) {
2037                         if (!list[i].eth_dev)
2038                                 continue;
2039                         mlx5_dev_close(list[i].eth_dev);
2040                         /* mac_addrs must not be freed because in dev_private */
2041                         list[i].eth_dev->data->mac_addrs = NULL;
2042                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2043                 }
2044                 /* Restore original error. */
2045                 rte_errno = -ret;
2046         } else {
2047                 ret = 0;
2048         }
2049 exit:
2050         /*
2051          * Do the routine cleanup:
2052          * - close opened Netlink sockets
2053          * - free allocated spawn data array
2054          * - free the Infiniband device list
2055          */
2056         if (nl_rdma >= 0)
2057                 close(nl_rdma);
2058         if (nl_route >= 0)
2059                 close(nl_route);
2060         if (list)
2061                 mlx5_free(list);
2062         MLX5_ASSERT(ibv_list);
2063         mlx5_glue->free_device_list(ibv_list);
2064         return ret;
2065 }
2066
2067 static int
2068 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
2069 {
2070         char *env;
2071         int value;
2072
2073         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2074         /* Get environment variable to store. */
2075         env = getenv(MLX5_SHUT_UP_BF);
2076         value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
2077         if (config->dbnc == MLX5_ARG_UNSET)
2078                 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
2079         else
2080                 setenv(MLX5_SHUT_UP_BF,
2081                        config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
2082         return value;
2083 }
2084
2085 static void
2086 mlx5_restore_doorbell_mapping_env(int value)
2087 {
2088         MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
2089         /* Restore the original environment variable state. */
2090         if (value == MLX5_ARG_UNSET)
2091                 unsetenv(MLX5_SHUT_UP_BF);
2092         else
2093                 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
2094 }
2095
2096 /**
2097  * Extract pdn of PD object using DV API.
2098  *
2099  * @param[in] pd
2100  *   Pointer to the verbs PD object.
2101  * @param[out] pdn
2102  *   Pointer to the PD object number variable.
2103  *
2104  * @return
2105  *   0 on success, error value otherwise.
2106  */
2107 int
2108 mlx5_os_get_pdn(void *pd, uint32_t *pdn)
2109 {
2110 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
2111         struct mlx5dv_obj obj;
2112         struct mlx5dv_pd pd_info;
2113         int ret = 0;
2114
2115         obj.pd.in = pd;
2116         obj.pd.out = &pd_info;
2117         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
2118         if (ret) {
2119                 DRV_LOG(DEBUG, "Fail to get PD object info");
2120                 return ret;
2121         }
2122         *pdn = pd_info.pdn;
2123         return 0;
2124 #else
2125         (void)pd;
2126         (void)pdn;
2127         return -ENOTSUP;
2128 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
2129 }
2130
2131 /**
2132  * Function API to open IB device.
2133  *
2134  * This function calls the Linux glue APIs to open a device.
2135  *
2136  * @param[in] spawn
2137  *   Pointer to the IB device attributes (name, port, etc).
2138  * @param[out] config
2139  *   Pointer to device configuration structure.
2140  * @param[out] sh
2141  *   Pointer to shared context structure.
2142  *
2143  * @return
2144  *   0 on success, a positive error value otherwise.
2145  */
2146 int
2147 mlx5_os_open_device(const struct mlx5_dev_spawn_data *spawn,
2148                      const struct mlx5_dev_config *config,
2149                      struct mlx5_dev_ctx_shared *sh)
2150 {
2151         int dbmap_env;
2152         int err = 0;
2153
2154         sh->numa_node = spawn->pci_dev->device.numa_node;
2155         pthread_mutex_init(&sh->txpp.mutex, NULL);
2156         /*
2157          * Configure environment variable "MLX5_BF_SHUT_UP"
2158          * before the device creation. The rdma_core library
2159          * checks the variable at device creation and
2160          * stores the result internally.
2161          */
2162         dbmap_env = mlx5_config_doorbell_mapping_env(config);
2163         /* Try to open IB device with DV first, then usual Verbs. */
2164         errno = 0;
2165         sh->ctx = mlx5_glue->dv_open_device(spawn->phys_dev);
2166         if (sh->ctx) {
2167                 sh->devx = 1;
2168                 DRV_LOG(DEBUG, "DevX is supported");
2169                 /* The device is created, no need for environment. */
2170                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2171         } else {
2172                 /* The environment variable is still configured. */
2173                 sh->ctx = mlx5_glue->open_device(spawn->phys_dev);
2174                 err = errno ? errno : ENODEV;
2175                 /*
2176                  * The environment variable is not needed anymore,
2177                  * all device creation attempts are completed.
2178                  */
2179                 mlx5_restore_doorbell_mapping_env(dbmap_env);
2180                 if (!sh->ctx)
2181                         return err;
2182                 DRV_LOG(DEBUG, "DevX is NOT supported");
2183                 err = 0;
2184         }
2185         return err;
2186 }
2187
2188 /**
2189  * Install shared asynchronous device events handler.
2190  * This function is implemented to support event sharing
2191  * between multiple ports of single IB device.
2192  *
2193  * @param sh
2194  *   Pointer to mlx5_dev_ctx_shared object.
2195  */
2196 void
2197 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2198 {
2199         int ret;
2200         int flags;
2201
2202         sh->intr_handle.fd = -1;
2203         flags = fcntl(((struct ibv_context *)sh->ctx)->async_fd, F_GETFL);
2204         ret = fcntl(((struct ibv_context *)sh->ctx)->async_fd,
2205                     F_SETFL, flags | O_NONBLOCK);
2206         if (ret) {
2207                 DRV_LOG(INFO, "failed to change file descriptor async event"
2208                         " queue");
2209         } else {
2210                 sh->intr_handle.fd = ((struct ibv_context *)sh->ctx)->async_fd;
2211                 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2212                 if (rte_intr_callback_register(&sh->intr_handle,
2213                                         mlx5_dev_interrupt_handler, sh)) {
2214                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2215                         sh->intr_handle.fd = -1;
2216                 }
2217         }
2218         if (sh->devx) {
2219 #ifdef HAVE_IBV_DEVX_ASYNC
2220                 sh->intr_handle_devx.fd = -1;
2221                 sh->devx_comp =
2222                         (void *)mlx5_glue->devx_create_cmd_comp(sh->ctx);
2223                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2224                 if (!devx_comp) {
2225                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2226                         return;
2227                 }
2228                 flags = fcntl(devx_comp->fd, F_GETFL);
2229                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2230                 if (ret) {
2231                         DRV_LOG(INFO, "failed to change file descriptor"
2232                                 " devx comp");
2233                         return;
2234                 }
2235                 sh->intr_handle_devx.fd = devx_comp->fd;
2236                 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2237                 if (rte_intr_callback_register(&sh->intr_handle_devx,
2238                                         mlx5_dev_interrupt_handler_devx, sh)) {
2239                         DRV_LOG(INFO, "Fail to install the devx shared"
2240                                 " interrupt.");
2241                         sh->intr_handle_devx.fd = -1;
2242                 }
2243 #endif /* HAVE_IBV_DEVX_ASYNC */
2244         }
2245 }
2246
2247 /**
2248  * Uninstall shared asynchronous device events handler.
2249  * This function is implemented to support event sharing
2250  * between multiple ports of single IB device.
2251  *
2252  * @param dev
2253  *   Pointer to mlx5_dev_ctx_shared object.
2254  */
2255 void
2256 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2257 {
2258         if (sh->intr_handle.fd >= 0)
2259                 mlx5_intr_callback_unregister(&sh->intr_handle,
2260                                               mlx5_dev_interrupt_handler, sh);
2261 #ifdef HAVE_IBV_DEVX_ASYNC
2262         if (sh->intr_handle_devx.fd >= 0)
2263                 rte_intr_callback_unregister(&sh->intr_handle_devx,
2264                                   mlx5_dev_interrupt_handler_devx, sh);
2265         if (sh->devx_comp)
2266                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2267 #endif
2268 }
2269
2270 /**
2271  * Read statistics by a named counter.
2272  *
2273  * @param[in] priv
2274  *   Pointer to the private device data structure.
2275  * @param[in] ctr_name
2276  *   Pointer to the name of the statistic counter to read
2277  * @param[out] stat
2278  *   Pointer to read statistic value.
2279  * @return
2280  *   0 on success and stat is valud, 1 if failed to read the value
2281  *   rte_errno is set.
2282  *
2283  */
2284 int
2285 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2286                       uint64_t *stat)
2287 {
2288         int fd;
2289
2290         if (priv->sh) {
2291                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2292                       priv->sh->ibdev_path,
2293                       priv->dev_port,
2294                       ctr_name);
2295                 fd = open(path, O_RDONLY);
2296                 /*
2297                  * in switchdev the file location is not per port
2298                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2299                  */
2300                 if (fd == -1) {
2301                         MKSTR(path1, "%s/hw_counters/%s",
2302                               priv->sh->ibdev_path,
2303                               ctr_name);
2304                         fd = open(path1, O_RDONLY);
2305                 }
2306                 if (fd != -1) {
2307                         char buf[21] = {'\0'};
2308                         ssize_t n = read(fd, buf, sizeof(buf));
2309
2310                         close(fd);
2311                         if (n != -1) {
2312                                 *stat = strtoull(buf, NULL, 10);
2313                                 return 0;
2314                         }
2315                 }
2316         }
2317         *stat = 0;
2318         return 1;
2319 }
2320
2321 /**
2322  * Set the reg_mr and dereg_mr call backs
2323  *
2324  * @param reg_mr_cb[out]
2325  *   Pointer to reg_mr func
2326  * @param dereg_mr_cb[out]
2327  *   Pointer to dereg_mr func
2328  *
2329  */
2330 void
2331 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2332                       mlx5_dereg_mr_t *dereg_mr_cb)
2333 {
2334         *reg_mr_cb = mlx5_verbs_ops.reg_mr;
2335         *dereg_mr_cb = mlx5_verbs_ops.dereg_mr;
2336 }
2337
2338 /**
2339  * Remove a MAC address from device
2340  *
2341  * @param dev
2342  *   Pointer to Ethernet device structure.
2343  * @param index
2344  *   MAC address index.
2345  */
2346 void
2347 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2348 {
2349         struct mlx5_priv *priv = dev->data->dev_private;
2350         const int vf = priv->config.vf;
2351
2352         if (vf)
2353                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2354                                         mlx5_ifindex(dev), priv->mac_own,
2355                                         &dev->data->mac_addrs[index], index);
2356 }
2357
2358 /**
2359  * Adds a MAC address to the device
2360  *
2361  * @param dev
2362  *   Pointer to Ethernet device structure.
2363  * @param mac_addr
2364  *   MAC address to register.
2365  * @param index
2366  *   MAC address index.
2367  *
2368  * @return
2369  *   0 on success, a negative errno value otherwise
2370  */
2371 int
2372 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2373                      uint32_t index)
2374 {
2375         struct mlx5_priv *priv = dev->data->dev_private;
2376         const int vf = priv->config.vf;
2377         int ret = 0;
2378
2379         if (vf)
2380                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2381                                            mlx5_ifindex(dev), priv->mac_own,
2382                                            mac, index);
2383         return ret;
2384 }
2385
2386 /**
2387  * Modify a VF MAC address
2388  *
2389  * @param priv
2390  *   Pointer to device private data.
2391  * @param mac_addr
2392  *   MAC address to modify into.
2393  * @param iface_idx
2394  *   Net device interface index
2395  * @param vf_index
2396  *   VF index
2397  *
2398  * @return
2399  *   0 on success, a negative errno value otherwise
2400  */
2401 int
2402 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2403                            unsigned int iface_idx,
2404                            struct rte_ether_addr *mac_addr,
2405                            int vf_index)
2406 {
2407         return mlx5_nl_vf_mac_addr_modify
2408                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2409 }
2410
2411 /**
2412  * Set device promiscuous mode
2413  *
2414  * @param dev
2415  *   Pointer to Ethernet device structure.
2416  * @param enable
2417  *   0 - promiscuous is disabled, otherwise - enabled
2418  *
2419  * @return
2420  *   0 on success, a negative error value otherwise
2421  */
2422 int
2423 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2424 {
2425         struct mlx5_priv *priv = dev->data->dev_private;
2426
2427         return mlx5_nl_promisc(priv->nl_socket_route,
2428                                mlx5_ifindex(dev), !!enable);
2429 }
2430
2431 /**
2432  * Set device promiscuous mode
2433  *
2434  * @param dev
2435  *   Pointer to Ethernet device structure.
2436  * @param enable
2437  *   0 - all multicase is disabled, otherwise - enabled
2438  *
2439  * @return
2440  *   0 on success, a negative error value otherwise
2441  */
2442 int
2443 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2444 {
2445         struct mlx5_priv *priv = dev->data->dev_private;
2446
2447         return mlx5_nl_allmulti(priv->nl_socket_route,
2448                                 mlx5_ifindex(dev), !!enable);
2449 }
2450
2451 /**
2452  * Flush device MAC addresses
2453  *
2454  * @param dev
2455  *   Pointer to Ethernet device structure.
2456  *
2457  */
2458 void
2459 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2460 {
2461         struct mlx5_priv *priv = dev->data->dev_private;
2462
2463         mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2464                                dev->data->mac_addrs,
2465                                MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2466 }
2467
2468 const struct eth_dev_ops mlx5_os_dev_ops = {
2469         .dev_configure = mlx5_dev_configure,
2470         .dev_start = mlx5_dev_start,
2471         .dev_stop = mlx5_dev_stop,
2472         .dev_set_link_down = mlx5_set_link_down,
2473         .dev_set_link_up = mlx5_set_link_up,
2474         .dev_close = mlx5_dev_close,
2475         .promiscuous_enable = mlx5_promiscuous_enable,
2476         .promiscuous_disable = mlx5_promiscuous_disable,
2477         .allmulticast_enable = mlx5_allmulticast_enable,
2478         .allmulticast_disable = mlx5_allmulticast_disable,
2479         .link_update = mlx5_link_update,
2480         .stats_get = mlx5_stats_get,
2481         .stats_reset = mlx5_stats_reset,
2482         .xstats_get = mlx5_xstats_get,
2483         .xstats_reset = mlx5_xstats_reset,
2484         .xstats_get_names = mlx5_xstats_get_names,
2485         .fw_version_get = mlx5_fw_version_get,
2486         .dev_infos_get = mlx5_dev_infos_get,
2487         .read_clock = mlx5_txpp_read_clock,
2488         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2489         .vlan_filter_set = mlx5_vlan_filter_set,
2490         .rx_queue_setup = mlx5_rx_queue_setup,
2491         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2492         .tx_queue_setup = mlx5_tx_queue_setup,
2493         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2494         .rx_queue_release = mlx5_rx_queue_release,
2495         .tx_queue_release = mlx5_tx_queue_release,
2496         .rx_queue_start = mlx5_rx_queue_start,
2497         .rx_queue_stop = mlx5_rx_queue_stop,
2498         .tx_queue_start = mlx5_tx_queue_start,
2499         .tx_queue_stop = mlx5_tx_queue_stop,
2500         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2501         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2502         .mac_addr_remove = mlx5_mac_addr_remove,
2503         .mac_addr_add = mlx5_mac_addr_add,
2504         .mac_addr_set = mlx5_mac_addr_set,
2505         .set_mc_addr_list = mlx5_set_mc_addr_list,
2506         .mtu_set = mlx5_dev_set_mtu,
2507         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2508         .vlan_offload_set = mlx5_vlan_offload_set,
2509         .reta_update = mlx5_dev_rss_reta_update,
2510         .reta_query = mlx5_dev_rss_reta_query,
2511         .rss_hash_update = mlx5_rss_hash_update,
2512         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
2513         .filter_ctrl = mlx5_dev_filter_ctrl,
2514         .rxq_info_get = mlx5_rxq_info_get,
2515         .txq_info_get = mlx5_txq_info_get,
2516         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2517         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2518         .rx_queue_intr_enable = mlx5_rx_intr_enable,
2519         .rx_queue_intr_disable = mlx5_rx_intr_disable,
2520         .is_removed = mlx5_is_removed,
2521         .udp_tunnel_port_add  = mlx5_udp_tunnel_port_add,
2522         .get_module_info = mlx5_get_module_info,
2523         .get_module_eeprom = mlx5_get_module_eeprom,
2524         .hairpin_cap_get = mlx5_hairpin_cap_get,
2525         .mtr_ops_get = mlx5_flow_meter_ops_get,
2526 };
2527
2528 /* Available operations from secondary process. */
2529 const struct eth_dev_ops mlx5_os_dev_sec_ops = {
2530         .stats_get = mlx5_stats_get,
2531         .stats_reset = mlx5_stats_reset,
2532         .xstats_get = mlx5_xstats_get,
2533         .xstats_reset = mlx5_xstats_reset,
2534         .xstats_get_names = mlx5_xstats_get_names,
2535         .fw_version_get = mlx5_fw_version_get,
2536         .dev_infos_get = mlx5_dev_infos_get,
2537         .read_clock = mlx5_txpp_read_clock,
2538         .rx_queue_start = mlx5_rx_queue_start,
2539         .rx_queue_stop = mlx5_rx_queue_stop,
2540         .tx_queue_start = mlx5_tx_queue_start,
2541         .tx_queue_stop = mlx5_tx_queue_stop,
2542         .rxq_info_get = mlx5_rxq_info_get,
2543         .txq_info_get = mlx5_txq_info_get,
2544         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2545         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2546         .get_module_info = mlx5_get_module_info,
2547         .get_module_eeprom = mlx5_get_module_eeprom,
2548 };
2549
2550 /* Available operations in flow isolated mode. */
2551 const struct eth_dev_ops mlx5_os_dev_ops_isolate = {
2552         .dev_configure = mlx5_dev_configure,
2553         .dev_start = mlx5_dev_start,
2554         .dev_stop = mlx5_dev_stop,
2555         .dev_set_link_down = mlx5_set_link_down,
2556         .dev_set_link_up = mlx5_set_link_up,
2557         .dev_close = mlx5_dev_close,
2558         .promiscuous_enable = mlx5_promiscuous_enable,
2559         .promiscuous_disable = mlx5_promiscuous_disable,
2560         .allmulticast_enable = mlx5_allmulticast_enable,
2561         .allmulticast_disable = mlx5_allmulticast_disable,
2562         .link_update = mlx5_link_update,
2563         .stats_get = mlx5_stats_get,
2564         .stats_reset = mlx5_stats_reset,
2565         .xstats_get = mlx5_xstats_get,
2566         .xstats_reset = mlx5_xstats_reset,
2567         .xstats_get_names = mlx5_xstats_get_names,
2568         .fw_version_get = mlx5_fw_version_get,
2569         .dev_infos_get = mlx5_dev_infos_get,
2570         .read_clock = mlx5_txpp_read_clock,
2571         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
2572         .vlan_filter_set = mlx5_vlan_filter_set,
2573         .rx_queue_setup = mlx5_rx_queue_setup,
2574         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
2575         .tx_queue_setup = mlx5_tx_queue_setup,
2576         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
2577         .rx_queue_release = mlx5_rx_queue_release,
2578         .tx_queue_release = mlx5_tx_queue_release,
2579         .rx_queue_start = mlx5_rx_queue_start,
2580         .rx_queue_stop = mlx5_rx_queue_stop,
2581         .tx_queue_start = mlx5_tx_queue_start,
2582         .tx_queue_stop = mlx5_tx_queue_stop,
2583         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
2584         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
2585         .mac_addr_remove = mlx5_mac_addr_remove,
2586         .mac_addr_add = mlx5_mac_addr_add,
2587         .mac_addr_set = mlx5_mac_addr_set,
2588         .set_mc_addr_list = mlx5_set_mc_addr_list,
2589         .mtu_set = mlx5_dev_set_mtu,
2590         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
2591         .vlan_offload_set = mlx5_vlan_offload_set,
2592         .filter_ctrl = mlx5_dev_filter_ctrl,
2593         .rxq_info_get = mlx5_rxq_info_get,
2594         .txq_info_get = mlx5_txq_info_get,
2595         .rx_burst_mode_get = mlx5_rx_burst_mode_get,
2596         .tx_burst_mode_get = mlx5_tx_burst_mode_get,
2597         .rx_queue_intr_enable = mlx5_rx_intr_enable,
2598         .rx_queue_intr_disable = mlx5_rx_intr_disable,
2599         .is_removed = mlx5_is_removed,
2600         .get_module_info = mlx5_get_module_info,
2601         .get_module_eeprom = mlx5_get_module_eeprom,
2602         .hairpin_cap_get = mlx5_hairpin_cap_get,
2603         .mtr_ops_get = mlx5_flow_meter_ops_get,
2604 };