drivers/net/mlx5/linux/mlx5_os.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2020 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <stdlib.h>
  11 #include <errno.h>
  12 #include <net/if.h>
  13 #include <linux/rtnetlink.h>
  14 #include <linux/sockios.h>
  15 #include <linux/ethtool.h>
  16 #include <fcntl.h>
  17
  18 #include <rte_malloc.h>
  19 #include <ethdev_driver.h>
  20 #include <ethdev_pci.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_bus_auxiliary.h>
  24 #include <rte_common.h>
  25 #include <rte_kvargs.h>
  26 #include <rte_rwlock.h>
  27 #include <rte_spinlock.h>
  28 #include <rte_string_fns.h>
  29 #include <rte_alarm.h>
  30 #include <rte_eal_paging.h>
  31
  32 #include <mlx5_glue.h>
  33 #include <mlx5_devx_cmds.h>
  34 #include <mlx5_common.h>
  35 #include <mlx5_common_mp.h>
  36 #include <mlx5_common_mr.h>
  37 #include <mlx5_malloc.h>
  38
  39 #include "mlx5_defs.h"
  40 #include "mlx5.h"
  41 #include "mlx5_common_os.h"
  42 #include "mlx5_utils.h"
  43 #include "mlx5_rxtx.h"
  44 #include "mlx5_rx.h"
  45 #include "mlx5_tx.h"
  46 #include "mlx5_autoconf.h"
  47 #include "mlx5_mr.h"
  48 #include "mlx5_flow.h"
  49 #include "rte_pmd_mlx5.h"
  50 #include "mlx5_verbs.h"
  51 #include "mlx5_nl.h"
  52 #include "mlx5_devx.h"
  53
  54 #ifndef HAVE_IBV_MLX5_MOD_MPW
  55 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
  56 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
  57 #endif
  58
  59 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
  60 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
  61 #endif
  62
  63 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
  64
  65 /* Spinlock for mlx5_shared_data allocation. */
  66 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  67
  68 /* Process local data for secondary processes. */
  69 static struct mlx5_local_data mlx5_local_data;
  70
  71 /* rte flow indexed pool configuration. */
  72 static struct mlx5_indexed_pool_config icfg[] = {
  73         {
  74                 .size = sizeof(struct rte_flow),
  75                 .trunk_size = 64,
  76                 .need_lock = 1,
  77                 .release_mem_en = 0,
  78                 .malloc = mlx5_malloc,
  79                 .free = mlx5_free,
  80                 .per_core_cache = 0,
  81                 .type = "ctl_flow_ipool",
  82         },
  83         {
  84                 .size = sizeof(struct rte_flow),
  85                 .trunk_size = 64,
  86                 .grow_trunk = 3,
  87                 .grow_shift = 2,
  88                 .need_lock = 1,
  89                 .release_mem_en = 0,
  90                 .malloc = mlx5_malloc,
  91                 .free = mlx5_free,
  92                 .per_core_cache = 1 << 14,
  93                 .type = "rte_flow_ipool",
  94         },
  95         {
  96                 .size = sizeof(struct rte_flow),
  97                 .trunk_size = 64,
  98                 .grow_trunk = 3,
  99                 .grow_shift = 2,
 100                 .need_lock = 1,
 101                 .release_mem_en = 0,
 102                 .malloc = mlx5_malloc,
 103                 .free = mlx5_free,
 104                 .per_core_cache = 0,
 105                 .type = "mcp_flow_ipool",
 106         },
 107 };
 108
 109 /**
 110  * Set the completion channel file descriptor interrupt as non-blocking.
 111  *
 112  * @param[in] rxq_obj
 113  *   Pointer to RQ channel object, which includes the channel fd
 114  *
 115  * @param[out] fd
 116  *   The file descriptor (representing the intetrrupt) used in this channel.
 117  *
 118  * @return
 119  *   0 on successfully setting the fd to non-blocking, non-zero otherwise.
 120  */
 121 int
 122 mlx5_os_set_nonblock_channel_fd(int fd)
 123 {
 124         int flags;
 125
 126         flags = fcntl(fd, F_GETFL);
 127         return fcntl(fd, F_SETFL, flags | O_NONBLOCK);
 128 }
 129
 130 /**
 131  * Get mlx5 device attributes. The glue function query_device_ex() is called
 132  * with out parameter of type 'struct ibv_device_attr_ex *'. Then fill in mlx5
 133  * device attributes from the glue out parameter.
 134  *
 135  * @param cdev
 136  *   Pointer to mlx5 device.
 137  *
 138  * @param device_attr
 139  *   Pointer to mlx5 device attributes.
 140  *
 141  * @return
 142  *   0 on success, non zero error number otherwise
 143  */
 144 int
 145 mlx5_os_get_dev_attr(struct mlx5_common_device *cdev,
 146                      struct mlx5_dev_attr *device_attr)
 147 {
 148         int err;
 149         struct ibv_context *ctx = cdev->ctx;
 150         struct ibv_device_attr_ex attr_ex;
 151
 152         memset(device_attr, 0, sizeof(*device_attr));
 153         err = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);
 154         if (err)
 155                 return err;
 156         device_attr->device_cap_flags_ex = attr_ex.device_cap_flags_ex;
 157         device_attr->max_qp_wr = attr_ex.orig_attr.max_qp_wr;
 158         device_attr->max_sge = attr_ex.orig_attr.max_sge;
 159         device_attr->max_cq = attr_ex.orig_attr.max_cq;
 160         device_attr->max_cqe = attr_ex.orig_attr.max_cqe;
 161         device_attr->max_mr = attr_ex.orig_attr.max_mr;
 162         device_attr->max_pd = attr_ex.orig_attr.max_pd;
 163         device_attr->max_qp = attr_ex.orig_attr.max_qp;
 164         device_attr->max_srq = attr_ex.orig_attr.max_srq;
 165         device_attr->max_srq_wr = attr_ex.orig_attr.max_srq_wr;
 166         device_attr->raw_packet_caps = attr_ex.raw_packet_caps;
 167         device_attr->max_rwq_indirection_table_size =
 168                 attr_ex.rss_caps.max_rwq_indirection_table_size;
 169         device_attr->max_tso = attr_ex.tso_caps.max_tso;
 170         device_attr->tso_supported_qpts = attr_ex.tso_caps.supported_qpts;
 171
 172         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 173         err = mlx5_glue->dv_query_device(ctx, &dv_attr);
 174         if (err)
 175                 return err;
 176
 177         device_attr->flags = dv_attr.flags;
 178         device_attr->comp_mask = dv_attr.comp_mask;
 179 #ifdef HAVE_IBV_MLX5_MOD_SWP
 180         device_attr->sw_parsing_offloads =
 181                 dv_attr.sw_parsing_caps.sw_parsing_offloads;
 182 #endif
 183         device_attr->min_single_stride_log_num_of_bytes =
 184                 dv_attr.striding_rq_caps.min_single_stride_log_num_of_bytes;
 185         device_attr->max_single_stride_log_num_of_bytes =
 186                 dv_attr.striding_rq_caps.max_single_stride_log_num_of_bytes;
 187         device_attr->min_single_wqe_log_num_of_strides =
 188                 dv_attr.striding_rq_caps.min_single_wqe_log_num_of_strides;
 189         device_attr->max_single_wqe_log_num_of_strides =
 190                 dv_attr.striding_rq_caps.max_single_wqe_log_num_of_strides;
 191         device_attr->stride_supported_qpts =
 192                 dv_attr.striding_rq_caps.supported_qpts;
 193 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 194         device_attr->tunnel_offloads_caps = dv_attr.tunnel_offloads_caps;
 195 #endif
 196         strlcpy(device_attr->fw_ver, attr_ex.orig_attr.fw_ver,
 197                 sizeof(device_attr->fw_ver));
 198
 199         return err;
 200 }
 201
 202 /**
 203  * Detect misc5 support or not
 204  *
 205  * @param[in] priv
 206  *   Device private data pointer
 207  */
 208 #ifdef HAVE_MLX5DV_DR
 209 static void
 210 __mlx5_discovery_misc5_cap(struct mlx5_priv *priv)
 211 {
 212 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 213         /* Dummy VxLAN matcher to detect rdma-core misc5 cap
 214          * Case: IPv4--->UDP--->VxLAN--->vni
 215          */
 216         void *tbl;
 217         struct mlx5_flow_dv_match_params matcher_mask;
 218         void *match_m;
 219         void *matcher;
 220         void *headers_m;
 221         void *misc5_m;
 222         uint32_t *tunnel_header_m;
 223         struct mlx5dv_flow_matcher_attr dv_attr;
 224
 225         memset(&matcher_mask, 0, sizeof(matcher_mask));
 226         matcher_mask.size = sizeof(matcher_mask.buf);
 227         match_m = matcher_mask.buf;
 228         headers_m = MLX5_ADDR_OF(fte_match_param, match_m, outer_headers);
 229         misc5_m = MLX5_ADDR_OF(fte_match_param,
 230                                match_m, misc_parameters_5);
 231         tunnel_header_m = (uint32_t *)
 232                                 MLX5_ADDR_OF(fte_match_set_misc5,
 233                                 misc5_m, tunnel_header_1);
 234         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
 235         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 4);
 236         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
 237         *tunnel_header_m = 0xffffff;
 238
 239         tbl = mlx5_glue->dr_create_flow_tbl(priv->sh->rx_domain, 1);
 240         if (!tbl) {
 241                 DRV_LOG(INFO, "No SW steering support");
 242                 return;
 243         }
 244         dv_attr.type = IBV_FLOW_ATTR_NORMAL,
 245         dv_attr.match_mask = (void *)&matcher_mask,
 246         dv_attr.match_criteria_enable =
 247                         (1 << MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT) |
 248                         (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT);
 249         dv_attr.priority = 3;
 250 #ifdef HAVE_MLX5DV_DR_ESWITCH
 251         void *misc2_m;
 252         if (priv->config.dv_esw_en) {
 253                 /* FDB enabled reg_c_0 */
 254                 dv_attr.match_criteria_enable |=
 255                                 (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT);
 256                 misc2_m = MLX5_ADDR_OF(fte_match_param,
 257                                        match_m, misc_parameters_2);
 258                 MLX5_SET(fte_match_set_misc2, misc2_m,
 259                          metadata_reg_c_0, 0xffff);
 260         }
 261 #endif
 262         matcher = mlx5_glue->dv_create_flow_matcher(priv->sh->cdev->ctx,
 263                                                     &dv_attr, tbl);
 264         if (matcher) {
 265                 priv->sh->misc5_cap = 1;
 266                 mlx5_glue->dv_destroy_flow_matcher(matcher);
 267         }
 268         mlx5_glue->dr_destroy_flow_tbl(tbl);
 269 #else
 270         RTE_SET_USED(priv);
 271 #endif
 272 }
 273 #endif
 274
 275 /**
 276  * Initialize DR related data within private structure.
 277  * Routine checks the reference counter and does actual
 278  * resources creation/initialization only if counter is zero.
 279  *
 280  * @param[in] priv
 281  *   Pointer to the private device data structure.
 282  *
 283  * @return
 284  *   Zero on success, positive error code otherwise.
 285  */
 286 static int
 287 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 288 {
 289         struct mlx5_dev_ctx_shared *sh = priv->sh;
 290         char s[MLX5_NAME_SIZE] __rte_unused;
 291         int err;
 292
 293         MLX5_ASSERT(sh && sh->refcnt);
 294         if (sh->refcnt > 1)
 295                 return 0;
 296         err = mlx5_alloc_table_hash_list(priv);
 297         if (err)
 298                 goto error;
 299         /* The resources below are only valid with DV support. */
 300 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 301         /* Init port id action list. */
 302         snprintf(s, sizeof(s), "%s_port_id_action_list", sh->ibdev_name);
 303         sh->port_id_action_list = mlx5_list_create(s, sh, true,
 304                                                    flow_dv_port_id_create_cb,
 305                                                    flow_dv_port_id_match_cb,
 306                                                    flow_dv_port_id_remove_cb,
 307                                                    flow_dv_port_id_clone_cb,
 308                                                  flow_dv_port_id_clone_free_cb);
 309         if (!sh->port_id_action_list)
 310                 goto error;
 311         /* Init push vlan action list. */
 312         snprintf(s, sizeof(s), "%s_push_vlan_action_list", sh->ibdev_name);
 313         sh->push_vlan_action_list = mlx5_list_create(s, sh, true,
 314                                                     flow_dv_push_vlan_create_cb,
 315                                                     flow_dv_push_vlan_match_cb,
 316                                                     flow_dv_push_vlan_remove_cb,
 317                                                     flow_dv_push_vlan_clone_cb,
 318                                                flow_dv_push_vlan_clone_free_cb);
 319         if (!sh->push_vlan_action_list)
 320                 goto error;
 321         /* Init sample action list. */
 322         snprintf(s, sizeof(s), "%s_sample_action_list", sh->ibdev_name);
 323         sh->sample_action_list = mlx5_list_create(s, sh, true,
 324                                                   flow_dv_sample_create_cb,
 325                                                   flow_dv_sample_match_cb,
 326                                                   flow_dv_sample_remove_cb,
 327                                                   flow_dv_sample_clone_cb,
 328                                                   flow_dv_sample_clone_free_cb);
 329         if (!sh->sample_action_list)
 330                 goto error;
 331         /* Init dest array action list. */
 332         snprintf(s, sizeof(s), "%s_dest_array_list", sh->ibdev_name);
 333         sh->dest_array_list = mlx5_list_create(s, sh, true,
 334                                                flow_dv_dest_array_create_cb,
 335                                                flow_dv_dest_array_match_cb,
 336                                                flow_dv_dest_array_remove_cb,
 337                                                flow_dv_dest_array_clone_cb,
 338                                               flow_dv_dest_array_clone_free_cb);
 339         if (!sh->dest_array_list)
 340                 goto error;
 341 #endif
 342 #ifdef HAVE_MLX5DV_DR
 343         void *domain;
 344
 345         /* Reference counter is zero, we should initialize structures. */
 346         domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
 347                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 348         if (!domain) {
 349                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 350                 err = errno;
 351                 goto error;
 352         }
 353         sh->rx_domain = domain;
 354         domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
 355                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 356         if (!domain) {
 357                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 358                 err = errno;
 359                 goto error;
 360         }
 361         sh->tx_domain = domain;
 362 #ifdef HAVE_MLX5DV_DR_ESWITCH
 363         if (priv->config.dv_esw_en) {
 364                 domain = mlx5_glue->dr_create_domain(sh->cdev->ctx,
 365                                                      MLX5DV_DR_DOMAIN_TYPE_FDB);
 366                 if (!domain) {
 367                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 368                         err = errno;
 369                         goto error;
 370                 }
 371                 sh->fdb_domain = domain;
 372         }
 373         /*
 374          * The drop action is just some dummy placeholder in rdma-core. It
 375          * does not belong to domains and has no any attributes, and, can be
 376          * shared by the entire device.
 377          */
 378         sh->dr_drop_action = mlx5_glue->dr_create_flow_action_drop();
 379         if (!sh->dr_drop_action) {
 380                 DRV_LOG(ERR, "FDB mlx5dv_dr_create_flow_action_drop");
 381                 err = errno;
 382                 goto error;
 383         }
 384 #endif
 385         if (!sh->tunnel_hub && priv->config.dv_miss_info)
 386                 err = mlx5_alloc_tunnel_hub(sh);
 387         if (err) {
 388                 DRV_LOG(ERR, "mlx5_alloc_tunnel_hub failed err=%d", err);
 389                 goto error;
 390         }
 391         if (priv->config.reclaim_mode == MLX5_RCM_AGGR) {
 392                 mlx5_glue->dr_reclaim_domain_memory(sh->rx_domain, 1);
 393                 mlx5_glue->dr_reclaim_domain_memory(sh->tx_domain, 1);
 394                 if (sh->fdb_domain)
 395                         mlx5_glue->dr_reclaim_domain_memory(sh->fdb_domain, 1);
 396         }
 397         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 398         if (!priv->config.allow_duplicate_pattern) {
 399 #ifndef HAVE_MLX5_DR_ALLOW_DUPLICATE
 400                 DRV_LOG(WARNING, "Disallow duplicate pattern is not supported - maybe old rdma-core version?");
 401 #endif
 402                 mlx5_glue->dr_allow_duplicate_rules(sh->rx_domain, 0);
 403                 mlx5_glue->dr_allow_duplicate_rules(sh->tx_domain, 0);
 404                 if (sh->fdb_domain)
 405                         mlx5_glue->dr_allow_duplicate_rules(sh->fdb_domain, 0);
 406         }
 407
 408         __mlx5_discovery_misc5_cap(priv);
 409 #endif /* HAVE_MLX5DV_DR */
 410         sh->default_miss_action =
 411                         mlx5_glue->dr_create_flow_action_default_miss();
 412         if (!sh->default_miss_action)
 413                 DRV_LOG(WARNING, "Default miss action is not supported.");
 414         return 0;
 415 error:
 416         /* Rollback the created objects. */
 417         if (sh->rx_domain) {
 418                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 419                 sh->rx_domain = NULL;
 420         }
 421         if (sh->tx_domain) {
 422                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 423                 sh->tx_domain = NULL;
 424         }
 425         if (sh->fdb_domain) {
 426                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 427                 sh->fdb_domain = NULL;
 428         }
 429         if (sh->dr_drop_action) {
 430                 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
 431                 sh->dr_drop_action = NULL;
 432         }
 433         if (sh->pop_vlan_action) {
 434                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 435                 sh->pop_vlan_action = NULL;
 436         }
 437         if (sh->encaps_decaps) {
 438                 mlx5_hlist_destroy(sh->encaps_decaps);
 439                 sh->encaps_decaps = NULL;
 440         }
 441         if (sh->modify_cmds) {
 442                 mlx5_hlist_destroy(sh->modify_cmds);
 443                 sh->modify_cmds = NULL;
 444         }
 445         if (sh->tag_table) {
 446                 /* tags should be destroyed with flow before. */
 447                 mlx5_hlist_destroy(sh->tag_table);
 448                 sh->tag_table = NULL;
 449         }
 450         if (sh->tunnel_hub) {
 451                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 452                 sh->tunnel_hub = NULL;
 453         }
 454         mlx5_free_table_hash_list(priv);
 455         if (sh->port_id_action_list) {
 456                 mlx5_list_destroy(sh->port_id_action_list);
 457                 sh->port_id_action_list = NULL;
 458         }
 459         if (sh->push_vlan_action_list) {
 460                 mlx5_list_destroy(sh->push_vlan_action_list);
 461                 sh->push_vlan_action_list = NULL;
 462         }
 463         if (sh->sample_action_list) {
 464                 mlx5_list_destroy(sh->sample_action_list);
 465                 sh->sample_action_list = NULL;
 466         }
 467         if (sh->dest_array_list) {
 468                 mlx5_list_destroy(sh->dest_array_list);
 469                 sh->dest_array_list = NULL;
 470         }
 471         return err;
 472 }
 473
 474 /**
 475  * Destroy DR related data within private structure.
 476  *
 477  * @param[in] priv
 478  *   Pointer to the private device data structure.
 479  */
 480 void
 481 mlx5_os_free_shared_dr(struct mlx5_priv *priv)
 482 {
 483         struct mlx5_dev_ctx_shared *sh = priv->sh;
 484
 485         MLX5_ASSERT(sh && sh->refcnt);
 486         if (sh->refcnt > 1)
 487                 return;
 488 #ifdef HAVE_MLX5DV_DR
 489         if (sh->rx_domain) {
 490                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 491                 sh->rx_domain = NULL;
 492         }
 493         if (sh->tx_domain) {
 494                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 495                 sh->tx_domain = NULL;
 496         }
 497 #ifdef HAVE_MLX5DV_DR_ESWITCH
 498         if (sh->fdb_domain) {
 499                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 500                 sh->fdb_domain = NULL;
 501         }
 502         if (sh->dr_drop_action) {
 503                 mlx5_glue->destroy_flow_action(sh->dr_drop_action);
 504                 sh->dr_drop_action = NULL;
 505         }
 506 #endif
 507         if (sh->pop_vlan_action) {
 508                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 509                 sh->pop_vlan_action = NULL;
 510         }
 511 #endif /* HAVE_MLX5DV_DR */
 512         if (sh->default_miss_action)
 513                 mlx5_glue->destroy_flow_action
 514                                 (sh->default_miss_action);
 515         if (sh->encaps_decaps) {
 516                 mlx5_hlist_destroy(sh->encaps_decaps);
 517                 sh->encaps_decaps = NULL;
 518         }
 519         if (sh->modify_cmds) {
 520                 mlx5_hlist_destroy(sh->modify_cmds);
 521                 sh->modify_cmds = NULL;
 522         }
 523         if (sh->tag_table) {
 524                 /* tags should be destroyed with flow before. */
 525                 mlx5_hlist_destroy(sh->tag_table);
 526                 sh->tag_table = NULL;
 527         }
 528         if (sh->tunnel_hub) {
 529                 mlx5_release_tunnel_hub(sh, priv->dev_port);
 530                 sh->tunnel_hub = NULL;
 531         }
 532         mlx5_free_table_hash_list(priv);
 533         if (sh->port_id_action_list) {
 534                 mlx5_list_destroy(sh->port_id_action_list);
 535                 sh->port_id_action_list = NULL;
 536         }
 537         if (sh->push_vlan_action_list) {
 538                 mlx5_list_destroy(sh->push_vlan_action_list);
 539                 sh->push_vlan_action_list = NULL;
 540         }
 541         if (sh->sample_action_list) {
 542                 mlx5_list_destroy(sh->sample_action_list);
 543                 sh->sample_action_list = NULL;
 544         }
 545         if (sh->dest_array_list) {
 546                 mlx5_list_destroy(sh->dest_array_list);
 547                 sh->dest_array_list = NULL;
 548         }
 549 }
 550
 551 /**
 552  * Initialize shared data between primary and secondary process.
 553  *
 554  * A memzone is reserved by primary process and secondary processes attach to
 555  * the memzone.
 556  *
 557  * @return
 558  *   0 on success, a negative errno value otherwise and rte_errno is set.
 559  */
 560 static int
 561 mlx5_init_shared_data(void)
 562 {
 563         const struct rte_memzone *mz;
 564         int ret = 0;
 565
 566         rte_spinlock_lock(&mlx5_shared_data_lock);
 567         if (mlx5_shared_data == NULL) {
 568                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 569                         /* Allocate shared memory. */
 570                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 571                                                  sizeof(*mlx5_shared_data),
 572                                                  SOCKET_ID_ANY, 0);
 573                         if (mz == NULL) {
 574                                 DRV_LOG(ERR,
 575                                         "Cannot allocate mlx5 shared data");
 576                                 ret = -rte_errno;
 577                                 goto error;
 578                         }
 579                         mlx5_shared_data = mz->addr;
 580                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 581                         rte_spinlock_init(&mlx5_shared_data->lock);
 582                 } else {
 583                         /* Lookup allocated shared memory. */
 584                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 585                         if (mz == NULL) {
 586                                 DRV_LOG(ERR,
 587                                         "Cannot attach mlx5 shared data");
 588                                 ret = -rte_errno;
 589                                 goto error;
 590                         }
 591                         mlx5_shared_data = mz->addr;
 592                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 593                 }
 594         }
 595 error:
 596         rte_spinlock_unlock(&mlx5_shared_data_lock);
 597         return ret;
 598 }
 599
 600 /**
 601  * PMD global initialization.
 602  *
 603  * Independent from individual device, this function initializes global
 604  * per-PMD data structures distinguishing primary and secondary processes.
 605  * Hence, each initialization is called once per a process.
 606  *
 607  * @return
 608  *   0 on success, a negative errno value otherwise and rte_errno is set.
 609  */
 610 static int
 611 mlx5_init_once(void)
 612 {
 613         struct mlx5_shared_data *sd;
 614         struct mlx5_local_data *ld = &mlx5_local_data;
 615         int ret = 0;
 616
 617         if (mlx5_init_shared_data())
 618                 return -rte_errno;
 619         sd = mlx5_shared_data;
 620         MLX5_ASSERT(sd);
 621         rte_spinlock_lock(&sd->lock);
 622         switch (rte_eal_process_type()) {
 623         case RTE_PROC_PRIMARY:
 624                 if (sd->init_done)
 625                         break;
 626                 LIST_INIT(&sd->mem_event_cb_list);
 627                 rte_rwlock_init(&sd->mem_event_rwlock);
 628                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
 629                                                 mlx5_mr_mem_event_cb, NULL);
 630                 ret = mlx5_mp_init_primary(MLX5_MP_NAME,
 631                                            mlx5_mp_os_primary_handle);
 632                 if (ret)
 633                         goto out;
 634                 sd->init_done = true;
 635                 break;
 636         case RTE_PROC_SECONDARY:
 637                 if (ld->init_done)
 638                         break;
 639                 ret = mlx5_mp_init_secondary(MLX5_MP_NAME,
 640                                              mlx5_mp_os_secondary_handle);
 641                 if (ret)
 642                         goto out;
 643                 ++sd->secondary_cnt;
 644                 ld->init_done = true;
 645                 break;
 646         default:
 647                 break;
 648         }
 649 out:
 650         rte_spinlock_unlock(&sd->lock);
 651         return ret;
 652 }
 653
 654 /**
 655  * Create the Tx queue DevX/Verbs object.
 656  *
 657  * @param dev
 658  *   Pointer to Ethernet device.
 659  * @param idx
 660  *   Queue index in DPDK Tx queue array.
 661  *
 662  * @return
 663  *   0 on success, a negative errno value otherwise and rte_errno is set.
 664  */
 665 static int
 666 mlx5_os_txq_obj_new(struct rte_eth_dev *dev, uint16_t idx)
 667 {
 668         struct mlx5_priv *priv = dev->data->dev_private;
 669         struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
 670         struct mlx5_txq_ctrl *txq_ctrl =
 671                         container_of(txq_data, struct mlx5_txq_ctrl, txq);
 672
 673         if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
 674                 return mlx5_txq_devx_obj_new(dev, idx);
 675 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 676         if (!priv->config.dv_esw_en)
 677                 return mlx5_txq_devx_obj_new(dev, idx);
 678 #endif
 679         return mlx5_txq_ibv_obj_new(dev, idx);
 680 }
 681
 682 /**
 683  * Release an Tx DevX/verbs queue object.
 684  *
 685  * @param txq_obj
 686  *   DevX/Verbs Tx queue object.
 687  */
 688 static void
 689 mlx5_os_txq_obj_release(struct mlx5_txq_obj *txq_obj)
 690 {
 691         if (txq_obj->txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN) {
 692                 mlx5_txq_devx_obj_release(txq_obj);
 693                 return;
 694         }
 695 #ifdef HAVE_MLX5DV_DEVX_UAR_OFFSET
 696         if (!txq_obj->txq_ctrl->priv->config.dv_esw_en) {
 697                 mlx5_txq_devx_obj_release(txq_obj);
 698                 return;
 699         }
 700 #endif
 701         mlx5_txq_ibv_obj_release(txq_obj);
 702 }
 703
 704 /**
 705  * DV flow counter mode detect and config.
 706  *
 707  * @param dev
 708  *   Pointer to rte_eth_dev structure.
 709  *
 710  */
 711 static void
 712 mlx5_flow_counter_mode_config(struct rte_eth_dev *dev __rte_unused)
 713 {
 714 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 715         struct mlx5_priv *priv = dev->data->dev_private;
 716         struct mlx5_dev_ctx_shared *sh = priv->sh;
 717         bool fallback;
 718
 719 #ifndef HAVE_IBV_DEVX_ASYNC
 720         fallback = true;
 721 #else
 722         fallback = false;
 723         if (!sh->devx || !priv->config.dv_flow_en ||
 724             !priv->config.hca_attr.flow_counters_dump ||
 725             !(priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4) ||
 726             (mlx5_flow_dv_discover_counter_offset_support(dev) == -ENOTSUP))
 727                 fallback = true;
 728 #endif
 729         if (fallback)
 730                 DRV_LOG(INFO, "Use fall-back DV counter management. Flow "
 731                         "counter dump:%d, bulk_alloc_bitmap:0x%hhx.",
 732                         priv->config.hca_attr.flow_counters_dump,
 733                         priv->config.hca_attr.flow_counter_bulk_alloc_bitmap);
 734         /* Initialize fallback mode only on the port initializes sh. */
 735         if (sh->refcnt == 1)
 736                 sh->cmng.counter_fallback = fallback;
 737         else if (fallback != sh->cmng.counter_fallback)
 738                 DRV_LOG(WARNING, "Port %d in sh has different fallback mode "
 739                         "with others:%d.", PORT_ID(priv), fallback);
 740 #endif
 741 }
 742
 743 /**
 744  * DR flow drop action support detect.
 745  *
 746  * @param dev
 747  *   Pointer to rte_eth_dev structure.
 748  *
 749  */
 750 static void
 751 mlx5_flow_drop_action_config(struct rte_eth_dev *dev __rte_unused)
 752 {
 753 #ifdef HAVE_MLX5DV_DR
 754         struct mlx5_priv *priv = dev->data->dev_private;
 755
 756         if (!priv->config.dv_flow_en || !priv->sh->dr_drop_action)
 757                 return;
 758         /**
 759          * DR supports drop action placeholder when it is supported;
 760          * otherwise, use the queue drop action.
 761          */
 762         if (mlx5_flow_discover_dr_action_support(dev))
 763                 priv->root_drop_action = priv->drop_queue.hrxq->action;
 764         else
 765                 priv->root_drop_action = priv->sh->dr_drop_action;
 766 #endif
 767 }
 768
 769 static void
 770 mlx5_queue_counter_id_prepare(struct rte_eth_dev *dev)
 771 {
 772         struct mlx5_priv *priv = dev->data->dev_private;
 773         void *ctx = priv->sh->cdev->ctx;
 774
 775         priv->q_counters = mlx5_devx_cmd_queue_counter_alloc(ctx);
 776         if (!priv->q_counters) {
 777                 struct ibv_cq *cq = mlx5_glue->create_cq(ctx, 1, NULL, NULL, 0);
 778                 struct ibv_wq *wq;
 779
 780                 DRV_LOG(DEBUG, "Port %d queue counter object cannot be created "
 781                         "by DevX - fall-back to use the kernel driver global "
 782                         "queue counter.", dev->data->port_id);
 783                 /* Create WQ by kernel and query its queue counter ID. */
 784                 if (cq) {
 785                         wq = mlx5_glue->create_wq(ctx,
 786                                                   &(struct ibv_wq_init_attr){
 787                                                     .wq_type = IBV_WQT_RQ,
 788                                                     .max_wr = 1,
 789                                                     .max_sge = 1,
 790                                                     .pd = priv->sh->cdev->pd,
 791                                                     .cq = cq,
 792                                                 });
 793                         if (wq) {
 794                                 /* Counter is assigned only on RDY state. */
 795                                 int ret = mlx5_glue->modify_wq(wq,
 796                                                  &(struct ibv_wq_attr){
 797                                                  .attr_mask = IBV_WQ_ATTR_STATE,
 798                                                  .wq_state = IBV_WQS_RDY,
 799                                                 });
 800
 801                                 if (ret == 0)
 802                                         mlx5_devx_cmd_wq_query(wq,
 803                                                          &priv->counter_set_id);
 804                                 claim_zero(mlx5_glue->destroy_wq(wq));
 805                         }
 806                         claim_zero(mlx5_glue->destroy_cq(cq));
 807                 }
 808         } else {
 809                 priv->counter_set_id = priv->q_counters->id;
 810         }
 811         if (priv->counter_set_id == 0)
 812                 DRV_LOG(INFO, "Part of the port %d statistics will not be "
 813                         "available.", dev->data->port_id);
 814 }
 815
 816 /**
 817  * Check if representor spawn info match devargs.
 818  *
 819  * @param spawn
 820  *   Verbs device parameters (name, port, switch_info) to spawn.
 821  * @param eth_da
 822  *   Device devargs to probe.
 823  *
 824  * @return
 825  *   Match result.
 826  */
 827 static bool
 828 mlx5_representor_match(struct mlx5_dev_spawn_data *spawn,
 829                        struct rte_eth_devargs *eth_da)
 830 {
 831         struct mlx5_switch_info *switch_info = &spawn->info;
 832         unsigned int p, f;
 833         uint16_t id;
 834         uint16_t repr_id = mlx5_representor_id_encode(switch_info,
 835                                                       eth_da->type);
 836
 837         switch (eth_da->type) {
 838         case RTE_ETH_REPRESENTOR_SF:
 839                 if (!(spawn->info.port_name == -1 &&
 840                       switch_info->name_type ==
 841                                 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 842                     switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFSF) {
 843                         rte_errno = EBUSY;
 844                         return false;
 845                 }
 846                 break;
 847         case RTE_ETH_REPRESENTOR_VF:
 848                 /* Allows HPF representor index -1 as exception. */
 849                 if (!(spawn->info.port_name == -1 &&
 850                       switch_info->name_type ==
 851                                 MLX5_PHYS_PORT_NAME_TYPE_PFHPF) &&
 852                     switch_info->name_type != MLX5_PHYS_PORT_NAME_TYPE_PFVF) {
 853                         rte_errno = EBUSY;
 854                         return false;
 855                 }
 856                 break;
 857         case RTE_ETH_REPRESENTOR_NONE:
 858                 rte_errno = EBUSY;
 859                 return false;
 860         default:
 861                 rte_errno = ENOTSUP;
 862                 DRV_LOG(ERR, "unsupported representor type");
 863                 return false;
 864         }
 865         /* Check representor ID: */
 866         for (p = 0; p < eth_da->nb_ports; ++p) {
 867                 if (spawn->pf_bond < 0) {
 868                         /* For non-LAG mode, allow and ignore pf. */
 869                         switch_info->pf_num = eth_da->ports[p];
 870                         repr_id = mlx5_representor_id_encode(switch_info,
 871                                                              eth_da->type);
 872                 }
 873                 for (f = 0; f < eth_da->nb_representor_ports; ++f) {
 874                         id = MLX5_REPRESENTOR_ID
 875                                 (eth_da->ports[p], eth_da->type,
 876                                  eth_da->representor_ports[f]);
 877                         if (repr_id == id)
 878                                 return true;
 879                 }
 880         }
 881         rte_errno = EBUSY;
 882         return false;
 883 }
 884
 885
 886 /**
 887  * Spawn an Ethernet device from Verbs information.
 888  *
 889  * @param dpdk_dev
 890  *   Backing DPDK device.
 891  * @param spawn
 892  *   Verbs device parameters (name, port, switch_info) to spawn.
 893  * @param config
 894  *   Device configuration parameters.
 895  * @param eth_da
 896  *   Device arguments.
 897  *
 898  * @return
 899  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 900  *   is set. The following errors are defined:
 901  *
 902  *   EBUSY: device is not supposed to be spawned.
 903  *   EEXIST: device is already spawned
 904  */
 905 static struct rte_eth_dev *
 906 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 907                struct mlx5_dev_spawn_data *spawn,
 908                struct mlx5_dev_config *config,
 909                struct rte_eth_devargs *eth_da)
 910 {
 911         const struct mlx5_switch_info *switch_info = &spawn->info;
 912         struct mlx5_dev_ctx_shared *sh = NULL;
 913         struct ibv_port_attr port_attr;
 914         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 915         struct rte_eth_dev *eth_dev = NULL;
 916         struct mlx5_priv *priv = NULL;
 917         int err = 0;
 918         unsigned int hw_padding = 0;
 919         unsigned int mps;
 920         unsigned int mpls_en = 0;
 921         unsigned int swp = 0;
 922         unsigned int mprq = 0;
 923         unsigned int mprq_min_stride_size_n = 0;
 924         unsigned int mprq_max_stride_size_n = 0;
 925         unsigned int mprq_min_stride_num_n = 0;
 926         unsigned int mprq_max_stride_num_n = 0;
 927         struct rte_ether_addr mac;
 928         char name[RTE_ETH_NAME_MAX_LEN];
 929         int own_domain_id = 0;
 930         uint16_t port_id;
 931         struct mlx5_port_info vport_info = { .query_flags = 0 };
 932         int i;
 933
 934         /* Determine if this port representor is supposed to be spawned. */
 935         if (switch_info->representor && dpdk_dev->devargs &&
 936             !mlx5_representor_match(spawn, eth_da))
 937                 return NULL;
 938         /* Build device name. */
 939         if (spawn->pf_bond < 0) {
 940                 /* Single device. */
 941                 if (!switch_info->representor)
 942                         strlcpy(name, dpdk_dev->name, sizeof(name));
 943                 else
 944                         err = snprintf(name, sizeof(name), "%s_representor_%s%u",
 945                                  dpdk_dev->name,
 946                                  switch_info->name_type ==
 947                                  MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
 948                                  switch_info->port_name);
 949         } else {
 950                 /* Bonding device. */
 951                 if (!switch_info->representor) {
 952                         err = snprintf(name, sizeof(name), "%s_%s",
 953                                        dpdk_dev->name, spawn->phys_dev_name);
 954                 } else {
 955                         err = snprintf(name, sizeof(name), "%s_%s_representor_c%dpf%d%s%u",
 956                                 dpdk_dev->name, spawn->phys_dev_name,
 957                                 switch_info->ctrl_num,
 958                                 switch_info->pf_num,
 959                                 switch_info->name_type ==
 960                                 MLX5_PHYS_PORT_NAME_TYPE_PFSF ? "sf" : "vf",
 961                                 switch_info->port_name);
 962                 }
 963         }
 964         if (err >= (int)sizeof(name))
 965                 DRV_LOG(WARNING, "device name overflow %s", name);
 966         /* check if the device is already spawned */
 967         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 968                 rte_errno = EEXIST;
 969                 return NULL;
 970         }
 971         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 972         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 973                 struct mlx5_mp_id mp_id;
 974
 975                 eth_dev = rte_eth_dev_attach_secondary(name);
 976                 if (eth_dev == NULL) {
 977                         DRV_LOG(ERR, "can not attach rte ethdev");
 978                         rte_errno = ENOMEM;
 979                         return NULL;
 980                 }
 981                 eth_dev->device = dpdk_dev;
 982                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
 983                 eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
 984                 eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
 985                 err = mlx5_proc_priv_init(eth_dev);
 986                 if (err)
 987                         return NULL;
 988                 mlx5_mp_id_init(&mp_id, eth_dev->data->port_id);
 989                 /* Receive command fd from primary process */
 990                 err = mlx5_mp_req_verbs_cmd_fd(&mp_id);
 991                 if (err < 0)
 992                         goto err_secondary;
 993                 /* Remap UAR for Tx queues. */
 994                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
 995                 if (err)
 996                         goto err_secondary;
 997                 /*
 998                  * Ethdev pointer is still required as input since
 999                  * the primary device is not accessible from the
1000                  * secondary process.
1001                  */
1002                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1003                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1004                 return eth_dev;
1005 err_secondary:
1006                 mlx5_dev_close(eth_dev);
1007                 return NULL;
1008         }
1009         /*
1010          * Some parameters ("tx_db_nc" in particularly) are needed in
1011          * advance to create dv/verbs device context. We proceed the
1012          * devargs here to get ones, and later proceed devargs again
1013          * to override some hardware settings.
1014          */
1015         err = mlx5_args(config, dpdk_dev->devargs);
1016         if (err) {
1017                 err = rte_errno;
1018                 DRV_LOG(ERR, "failed to process device arguments: %s",
1019                         strerror(rte_errno));
1020                 goto error;
1021         }
1022         if (config->dv_miss_info) {
1023                 if (switch_info->master || switch_info->representor)
1024                         config->dv_xmeta_en = MLX5_XMETA_MODE_META16;
1025         }
1026         sh = mlx5_alloc_shared_dev_ctx(spawn, config);
1027         if (!sh)
1028                 return NULL;
1029 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
1030         config->dest_tir = 1;
1031 #endif
1032 #ifdef HAVE_IBV_MLX5_MOD_SWP
1033         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1034 #endif
1035         /*
1036          * Multi-packet send is supported by ConnectX-4 Lx PF as well
1037          * as all ConnectX-5 devices.
1038          */
1039 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1040         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1041 #endif
1042 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1043         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1044 #endif
1045         mlx5_glue->dv_query_device(sh->cdev->ctx, &dv_attr);
1046         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1047                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1048                         DRV_LOG(DEBUG, "enhanced MPW is supported");
1049                         mps = MLX5_MPW_ENHANCED;
1050                 } else {
1051                         DRV_LOG(DEBUG, "MPW is supported");
1052                         mps = MLX5_MPW;
1053                 }
1054         } else {
1055                 DRV_LOG(DEBUG, "MPW isn't supported");
1056                 mps = MLX5_MPW_DISABLED;
1057         }
1058 #ifdef HAVE_IBV_MLX5_MOD_SWP
1059         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1060                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1061         DRV_LOG(DEBUG, "SWP support: %u", swp);
1062 #endif
1063         config->swp = swp & (MLX5_SW_PARSING_CAP | MLX5_SW_PARSING_CSUM_CAP |
1064                 MLX5_SW_PARSING_TSO_CAP);
1065 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1066         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1067                 struct mlx5dv_striding_rq_caps mprq_caps =
1068                         dv_attr.striding_rq_caps;
1069
1070                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1071                         mprq_caps.min_single_stride_log_num_of_bytes);
1072                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1073                         mprq_caps.max_single_stride_log_num_of_bytes);
1074                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1075                         mprq_caps.min_single_wqe_log_num_of_strides);
1076                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1077                         mprq_caps.max_single_wqe_log_num_of_strides);
1078                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1079                         mprq_caps.supported_qpts);
1080                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1081                 mprq = 1;
1082                 mprq_min_stride_size_n =
1083                         mprq_caps.min_single_stride_log_num_of_bytes;
1084                 mprq_max_stride_size_n =
1085                         mprq_caps.max_single_stride_log_num_of_bytes;
1086                 mprq_min_stride_num_n =
1087                         mprq_caps.min_single_wqe_log_num_of_strides;
1088                 mprq_max_stride_num_n =
1089                         mprq_caps.max_single_wqe_log_num_of_strides;
1090         }
1091 #endif
1092         /* Rx CQE compression is enabled by default. */
1093         config->cqe_comp = 1;
1094 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1095         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1096                 config->tunnel_en = dv_attr.tunnel_offloads_caps &
1097                              (MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN |
1098                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE |
1099                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE);
1100         }
1101         if (config->tunnel_en) {
1102                 DRV_LOG(DEBUG, "tunnel offloading is supported for %s%s%s",
1103                 config->tunnel_en &
1104                 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN ? "[VXLAN]" : "",
1105                 config->tunnel_en &
1106                 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE ? "[GRE]" : "",
1107                 config->tunnel_en &
1108                 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE ? "[GENEVE]" : ""
1109                 );
1110         } else {
1111                 DRV_LOG(DEBUG, "tunnel offloading is not supported");
1112         }
1113 #else
1114         DRV_LOG(WARNING,
1115                 "tunnel offloading disabled due to old OFED/rdma-core version");
1116 #endif
1117 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1118         mpls_en = ((dv_attr.tunnel_offloads_caps &
1119                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1120                    (dv_attr.tunnel_offloads_caps &
1121                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1122         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1123                 mpls_en ? "" : "not ");
1124 #else
1125         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1126                 " old OFED/rdma-core version or firmware configuration");
1127 #endif
1128         config->mpls_en = mpls_en;
1129         /* Check port status. */
1130         err = mlx5_glue->query_port(sh->cdev->ctx, spawn->phys_port,
1131                                     &port_attr);
1132         if (err) {
1133                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1134                 goto error;
1135         }
1136         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1137                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1138                 err = EINVAL;
1139                 goto error;
1140         }
1141         if (port_attr.state != IBV_PORT_ACTIVE)
1142                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1143                         mlx5_glue->port_state_str(port_attr.state),
1144                         port_attr.state);
1145         /* Allocate private eth device data. */
1146         priv = mlx5_malloc(MLX5_MEM_ZERO | MLX5_MEM_RTE,
1147                            sizeof(*priv),
1148                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
1149         if (priv == NULL) {
1150                 DRV_LOG(ERR, "priv allocation failure");
1151                 err = ENOMEM;
1152                 goto error;
1153         }
1154         priv->sh = sh;
1155         priv->dev_port = spawn->phys_port;
1156         priv->pci_dev = spawn->pci_dev;
1157         priv->mtu = RTE_ETHER_MTU;
1158         /* Some internal functions rely on Netlink sockets, open them now. */
1159         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1160         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1161         priv->representor = !!switch_info->representor;
1162         priv->master = !!switch_info->master;
1163         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1164         priv->vport_meta_tag = 0;
1165         priv->vport_meta_mask = 0;
1166         priv->pf_bond = spawn->pf_bond;
1167
1168         DRV_LOG(DEBUG,
1169                 "dev_port=%u bus=%s pci=%s master=%d representor=%d pf_bond=%d\n",
1170                 priv->dev_port, dpdk_dev->bus->name,
1171                 priv->pci_dev ? priv->pci_dev->name : "NONE",
1172                 priv->master, priv->representor, priv->pf_bond);
1173
1174         /*
1175          * If we have E-Switch we should determine the vport attributes.
1176          * E-Switch may use either source vport field or reg_c[0] metadata
1177          * register to match on vport index. The engaged part of metadata
1178          * register is defined by mask.
1179          */
1180         if (switch_info->representor || switch_info->master) {
1181                 err = mlx5_glue->devx_port_query(sh->cdev->ctx,
1182                                                  spawn->phys_port,
1183                                                  &vport_info);
1184                 if (err) {
1185                         DRV_LOG(WARNING,
1186                                 "Cannot query devx port %d on device %s",
1187                                 spawn->phys_port, spawn->phys_dev_name);
1188                         vport_info.query_flags = 0;
1189                 }
1190         }
1191         if (vport_info.query_flags & MLX5_PORT_QUERY_REG_C0) {
1192                 priv->vport_meta_tag = vport_info.vport_meta_tag;
1193                 priv->vport_meta_mask = vport_info.vport_meta_mask;
1194                 if (!priv->vport_meta_mask) {
1195                         DRV_LOG(ERR,
1196                                 "vport zero mask for port %d on bonding device %s",
1197                                 spawn->phys_port, spawn->phys_dev_name);
1198                         err = ENOTSUP;
1199                         goto error;
1200                 }
1201                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
1202                         DRV_LOG(ERR,
1203                                 "Invalid vport tag for port %d on bonding device %s",
1204                                 spawn->phys_port, spawn->phys_dev_name);
1205                         err = ENOTSUP;
1206                         goto error;
1207                 }
1208         }
1209         if (vport_info.query_flags & MLX5_PORT_QUERY_VPORT) {
1210                 priv->vport_id = vport_info.vport_id;
1211         } else if (spawn->pf_bond >= 0 &&
1212                    (switch_info->representor || switch_info->master)) {
1213                 DRV_LOG(ERR,
1214                         "Cannot deduce vport index for port %d on bonding device %s",
1215                         spawn->phys_port, spawn->phys_dev_name);
1216                 err = ENOTSUP;
1217                 goto error;
1218         } else {
1219                 /*
1220                  * Suppose vport index in compatible way. Kernel/rdma_core
1221                  * support single E-Switch per PF configurations only and
1222                  * vport_id field contains the vport index for associated VF,
1223                  * which is deduced from representor port name.
1224                  * For example, let's have the IB device port 10, it has
1225                  * attached network device eth0, which has port name attribute
1226                  * pf0vf2, we can deduce the VF number as 2, and set vport index
1227                  * as 3 (2+1). This assigning schema should be changed if the
1228                  * multiple E-Switch instances per PF configurations or/and PCI
1229                  * subfunctions are added.
1230                  */
1231                 priv->vport_id = switch_info->representor ?
1232                                  switch_info->port_name + 1 : -1;
1233         }
1234         priv->representor_id = mlx5_representor_id_encode(switch_info,
1235                                                           eth_da->type);
1236         /*
1237          * Look for sibling devices in order to reuse their switch domain
1238          * if any, otherwise allocate one.
1239          */
1240         MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1241                 const struct mlx5_priv *opriv =
1242                         rte_eth_devices[port_id].data->dev_private;
1243
1244                 if (!opriv ||
1245                     opriv->sh != priv->sh ||
1246                         opriv->domain_id ==
1247                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1248                         continue;
1249                 priv->domain_id = opriv->domain_id;
1250                 DRV_LOG(DEBUG, "dev_port-%u inherit domain_id=%u\n",
1251                         priv->dev_port, priv->domain_id);
1252                 break;
1253         }
1254         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1255                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1256                 if (err) {
1257                         err = rte_errno;
1258                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1259                                 strerror(rte_errno));
1260                         goto error;
1261                 }
1262                 own_domain_id = 1;
1263                 DRV_LOG(DEBUG, "dev_port-%u new domain_id=%u\n",
1264                         priv->dev_port, priv->domain_id);
1265         }
1266         /* Override some values set by hardware configuration. */
1267         mlx5_args(config, dpdk_dev->devargs);
1268         err = mlx5_dev_check_sibling_config(priv, config, dpdk_dev);
1269         if (err)
1270                 goto error;
1271         config->hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1272                             IBV_DEVICE_RAW_IP_CSUM);
1273         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1274                 (config->hw_csum ? "" : "not "));
1275 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1276         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1277         DRV_LOG(DEBUG, "counters are not supported");
1278 #endif
1279 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
1280         if (config->dv_flow_en) {
1281                 DRV_LOG(WARNING, "DV flow is not supported");
1282                 config->dv_flow_en = 0;
1283         }
1284 #endif
1285         if (spawn->max_port > UINT8_MAX) {
1286                 /* Verbs can't support ports larger than 255 by design. */
1287                 DRV_LOG(ERR, "can't support IB ports > UINT8_MAX");
1288                 err = EINVAL;
1289                 goto error;
1290         }
1291         config->ind_table_max_size =
1292                 sh->device_attr.max_rwq_indirection_table_size;
1293         /*
1294          * Remove this check once DPDK supports larger/variable
1295          * indirection tables.
1296          */
1297         if (config->ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1298                 config->ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1299         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1300                 config->ind_table_max_size);
1301         config->hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1302                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1303         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1304                 (config->hw_vlan_strip ? "" : "not "));
1305         config->hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1306                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1307 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1308         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1309 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1310         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1311                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1312 #endif
1313         if (config->hw_padding && !hw_padding) {
1314                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1315                 config->hw_padding = 0;
1316         } else if (config->hw_padding) {
1317                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1318         }
1319         config->tso = (sh->device_attr.max_tso > 0 &&
1320                       (sh->device_attr.tso_supported_qpts &
1321                        (1 << IBV_QPT_RAW_PACKET)));
1322         if (config->tso)
1323                 config->tso_max_payload_sz = sh->device_attr.max_tso;
1324         /*
1325          * MPW is disabled by default, while the Enhanced MPW is enabled
1326          * by default.
1327          */
1328         if (config->mps == MLX5_ARG_UNSET)
1329                 config->mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1330                                                           MLX5_MPW_DISABLED;
1331         else
1332                 config->mps = config->mps ? mps : MLX5_MPW_DISABLED;
1333         DRV_LOG(INFO, "%sMPS is %s",
1334                 config->mps == MLX5_MPW_ENHANCED ? "enhanced " :
1335                 config->mps == MLX5_MPW ? "legacy " : "",
1336                 config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1337         if (sh->devx) {
1338                 config->hca_attr = sh->cdev->config.hca_attr;
1339                 sh->steering_format_version =
1340                         config->hca_attr.steering_format_version;
1341                 /* Check for LRO support. */
1342                 if (config->dest_tir && config->hca_attr.lro_cap &&
1343                     config->dv_flow_en) {
1344                         /* TBD check tunnel lro caps. */
1345                         config->lro.supported = config->hca_attr.lro_cap;
1346                         DRV_LOG(DEBUG, "Device supports LRO");
1347                         /*
1348                          * If LRO timeout is not configured by application,
1349                          * use the minimal supported value.
1350                          */
1351                         if (!config->lro.timeout)
1352                                 config->lro.timeout =
1353                                 config->hca_attr.lro_timer_supported_periods[0];
1354                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1355                                 config->lro.timeout);
1356                         DRV_LOG(DEBUG, "LRO minimal size of TCP segment "
1357                                 "required for coalescing is %d bytes",
1358                                 config->hca_attr.lro_min_mss_size);
1359                 }
1360 #if defined(HAVE_MLX5DV_DR) && \
1361         (defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER) || \
1362          defined(HAVE_MLX5_DR_CREATE_ACTION_ASO))
1363                 if (config->hca_attr.qos.sup &&
1364                     config->hca_attr.qos.flow_meter_old &&
1365                     config->dv_flow_en) {
1366                         uint8_t reg_c_mask =
1367                                 config->hca_attr.qos.flow_meter_reg_c_ids;
1368                         /*
1369                          * Meter needs two REG_C's for color match and pre-sfx
1370                          * flow match. Here get the REG_C for color match.
1371                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
1372                          */
1373                         reg_c_mask &= 0xfc;
1374                         if (__builtin_popcount(reg_c_mask) < 1) {
1375                                 priv->mtr_en = 0;
1376                                 DRV_LOG(WARNING, "No available register for"
1377                                         " meter.");
1378                         } else {
1379                                 /*
1380                                  * The meter color register is used by the
1381                                  * flow-hit feature as well.
1382                                  * The flow-hit feature must use REG_C_3
1383                                  * Prefer REG_C_3 if it is available.
1384                                  */
1385                                 if (reg_c_mask & (1 << (REG_C_3 - REG_C_0)))
1386                                         priv->mtr_color_reg = REG_C_3;
1387                                 else
1388                                         priv->mtr_color_reg = ffs(reg_c_mask)
1389                                                               - 1 + REG_C_0;
1390                                 priv->mtr_en = 1;
1391                                 priv->mtr_reg_share =
1392                                       config->hca_attr.qos.flow_meter;
1393                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
1394                                         priv->mtr_color_reg);
1395                         }
1396                 }
1397                 if (config->hca_attr.qos.sup &&
1398                         config->hca_attr.qos.flow_meter_aso_sup) {
1399                         uint32_t log_obj_size =
1400                                 rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
1401                         if (log_obj_size >=
1402                         config->hca_attr.qos.log_meter_aso_granularity &&
1403                         log_obj_size <=
1404                         config->hca_attr.qos.log_meter_aso_max_alloc)
1405                                 sh->meter_aso_en = 1;
1406                 }
1407                 if (priv->mtr_en) {
1408                         err = mlx5_aso_flow_mtrs_mng_init(priv->sh);
1409                         if (err) {
1410                                 err = -err;
1411                                 goto error;
1412                         }
1413                 }
1414                 if (config->hca_attr.flow.tunnel_header_0_1)
1415                         sh->tunnel_header_0_1 = 1;
1416 #endif
1417 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
1418                 if (config->hca_attr.flow_hit_aso &&
1419                     priv->mtr_color_reg == REG_C_3) {
1420                         sh->flow_hit_aso_en = 1;
1421                         err = mlx5_flow_aso_age_mng_init(sh);
1422                         if (err) {
1423                                 err = -err;
1424                                 goto error;
1425                         }
1426                         DRV_LOG(DEBUG, "Flow Hit ASO is supported.");
1427                 }
1428 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
1429 #if defined(HAVE_MLX5_DR_CREATE_ACTION_ASO) && \
1430         defined(HAVE_MLX5_DR_ACTION_ASO_CT)
1431                 if (config->hca_attr.ct_offload &&
1432                     priv->mtr_color_reg == REG_C_3) {
1433                         err = mlx5_flow_aso_ct_mng_init(sh);
1434                         if (err) {
1435                                 err = -err;
1436                                 goto error;
1437                         }
1438                         DRV_LOG(DEBUG, "CT ASO is supported.");
1439                         sh->ct_aso_en = 1;
1440                 }
1441 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO && HAVE_MLX5_DR_ACTION_ASO_CT */
1442 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)
1443                 if (config->hca_attr.log_max_ft_sampler_num > 0  &&
1444                     config->dv_flow_en) {
1445                         priv->sampler_en = 1;
1446                         DRV_LOG(DEBUG, "Sampler enabled!");
1447                 } else {
1448                         priv->sampler_en = 0;
1449                         if (!config->hca_attr.log_max_ft_sampler_num)
1450                                 DRV_LOG(WARNING,
1451                                         "No available register for sampler.");
1452                         else
1453                                 DRV_LOG(DEBUG, "DV flow is not supported!");
1454                 }
1455 #endif
1456         }
1457         if (config->cqe_comp && RTE_CACHE_LINE_SIZE == 128 &&
1458             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP)) {
1459                 DRV_LOG(WARNING, "Rx CQE 128B compression is not supported");
1460                 config->cqe_comp = 0;
1461         }
1462         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_FTAG_STRIDX &&
1463             (!sh->devx || !config->hca_attr.mini_cqe_resp_flow_tag)) {
1464                 DRV_LOG(WARNING, "Flow Tag CQE compression"
1465                                  " format isn't supported.");
1466                 config->cqe_comp = 0;
1467         }
1468         if (config->cqe_comp_fmt == MLX5_CQE_RESP_FORMAT_L34H_STRIDX &&
1469             (!sh->devx || !config->hca_attr.mini_cqe_resp_l3_l4_tag)) {
1470                 DRV_LOG(WARNING, "L3/L4 Header CQE compression"
1471                                  " format isn't supported.");
1472                 config->cqe_comp = 0;
1473         }
1474         DRV_LOG(DEBUG, "Rx CQE compression is %ssupported",
1475                         config->cqe_comp ? "" : "not ");
1476         if (config->tx_pp) {
1477                 DRV_LOG(DEBUG, "Timestamp counter frequency %u kHz",
1478                         config->hca_attr.dev_freq_khz);
1479                 DRV_LOG(DEBUG, "Packet pacing is %ssupported",
1480                         config->hca_attr.qos.packet_pacing ? "" : "not ");
1481                 DRV_LOG(DEBUG, "Cross channel ops are %ssupported",
1482                         config->hca_attr.cross_channel ? "" : "not ");
1483                 DRV_LOG(DEBUG, "WQE index ignore is %ssupported",
1484                         config->hca_attr.wqe_index_ignore ? "" : "not ");
1485                 DRV_LOG(DEBUG, "Non-wire SQ feature is %ssupported",
1486                         config->hca_attr.non_wire_sq ? "" : "not ");
1487                 DRV_LOG(DEBUG, "Static WQE SQ feature is %ssupported (%d)",
1488                         config->hca_attr.log_max_static_sq_wq ? "" : "not ",
1489                         config->hca_attr.log_max_static_sq_wq);
1490                 DRV_LOG(DEBUG, "WQE rate PP mode is %ssupported",
1491                         config->hca_attr.qos.wqe_rate_pp ? "" : "not ");
1492                 if (!sh->devx) {
1493                         DRV_LOG(ERR, "DevX is required for packet pacing");
1494                         err = ENODEV;
1495                         goto error;
1496                 }
1497                 if (!config->hca_attr.qos.packet_pacing) {
1498                         DRV_LOG(ERR, "Packet pacing is not supported");
1499                         err = ENODEV;
1500                         goto error;
1501                 }
1502                 if (!config->hca_attr.cross_channel) {
1503                         DRV_LOG(ERR, "Cross channel operations are"
1504                                      " required for packet pacing");
1505                         err = ENODEV;
1506                         goto error;
1507                 }
1508                 if (!config->hca_attr.wqe_index_ignore) {
1509                         DRV_LOG(ERR, "WQE index ignore feature is"
1510                                      " required for packet pacing");
1511                         err = ENODEV;
1512                         goto error;
1513                 }
1514                 if (!config->hca_attr.non_wire_sq) {
1515                         DRV_LOG(ERR, "Non-wire SQ feature is"
1516                                      " required for packet pacing");
1517                         err = ENODEV;
1518                         goto error;
1519                 }
1520                 if (!config->hca_attr.log_max_static_sq_wq) {
1521                         DRV_LOG(ERR, "Static WQE SQ feature is"
1522                                      " required for packet pacing");
1523                         err = ENODEV;
1524                         goto error;
1525                 }
1526                 if (!config->hca_attr.qos.wqe_rate_pp) {
1527                         DRV_LOG(ERR, "WQE rate mode is required"
1528                                      " for packet pacing");
1529                         err = ENODEV;
1530                         goto error;
1531                 }
1532 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1533                 DRV_LOG(ERR, "DevX does not provide UAR offset,"
1534                              " can't create queues for packet pacing");
1535                 err = ENODEV;
1536                 goto error;
1537 #endif
1538         }
1539         if (sh->devx) {
1540                 uint32_t reg[MLX5_ST_SZ_DW(register_mtutc)];
1541
1542                 err = config->hca_attr.access_register_user ?
1543                         mlx5_devx_cmd_register_read
1544                                 (sh->cdev->ctx, MLX5_REGISTER_ID_MTUTC, 0,
1545                                 reg, MLX5_ST_SZ_DW(register_mtutc)) : ENOTSUP;
1546                 if (!err) {
1547                         uint32_t ts_mode;
1548
1549                         /* MTUTC register is read successfully. */
1550                         ts_mode = MLX5_GET(register_mtutc, reg,
1551                                            time_stamp_mode);
1552                         if (ts_mode == MLX5_MTUTC_TIMESTAMP_MODE_REAL_TIME)
1553                                 config->rt_timestamp = 1;
1554                 } else {
1555                         /* Kernel does not support register reading. */
1556                         if (config->hca_attr.dev_freq_khz ==
1557                                                  (NS_PER_S / MS_PER_S))
1558                                 config->rt_timestamp = 1;
1559                 }
1560         }
1561         /*
1562          * If HW has bug working with tunnel packet decapsulation and
1563          * scatter FCS, and decapsulation is needed, clear the hw_fcs_strip
1564          * bit. Then DEV_RX_OFFLOAD_KEEP_CRC bit will not be set anymore.
1565          */
1566         if (config->hca_attr.scatter_fcs_w_decap_disable && config->decap_en)
1567                 config->hw_fcs_strip = 0;
1568         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1569                 (config->hw_fcs_strip ? "" : "not "));
1570         if (config->mprq.enabled && mprq) {
1571                 if (config->mprq.stride_num_n &&
1572                     (config->mprq.stride_num_n > mprq_max_stride_num_n ||
1573                      config->mprq.stride_num_n < mprq_min_stride_num_n)) {
1574                         config->mprq.stride_num_n =
1575                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1576                                                 mprq_min_stride_num_n),
1577                                         mprq_max_stride_num_n);
1578                         DRV_LOG(WARNING,
1579                                 "the number of strides"
1580                                 " for Multi-Packet RQ is out of range,"
1581                                 " setting default value (%u)",
1582                                 1 << config->mprq.stride_num_n);
1583                 }
1584                 if (config->mprq.stride_size_n &&
1585                     (config->mprq.stride_size_n > mprq_max_stride_size_n ||
1586                      config->mprq.stride_size_n < mprq_min_stride_size_n)) {
1587                         config->mprq.stride_size_n =
1588                                 RTE_MIN(RTE_MAX(MLX5_MPRQ_STRIDE_SIZE_N,
1589                                                 mprq_min_stride_size_n),
1590                                         mprq_max_stride_size_n);
1591                         DRV_LOG(WARNING,
1592                                 "the size of a stride"
1593                                 " for Multi-Packet RQ is out of range,"
1594                                 " setting default value (%u)",
1595                                 1 << config->mprq.stride_size_n);
1596                 }
1597                 config->mprq.min_stride_size_n = mprq_min_stride_size_n;
1598                 config->mprq.max_stride_size_n = mprq_max_stride_size_n;
1599         } else if (config->mprq.enabled && !mprq) {
1600                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1601                 config->mprq.enabled = 0;
1602         }
1603         if (config->max_dump_files_num == 0)
1604                 config->max_dump_files_num = 128;
1605         eth_dev = rte_eth_dev_allocate(name);
1606         if (eth_dev == NULL) {
1607                 DRV_LOG(ERR, "can not allocate rte ethdev");
1608                 err = ENOMEM;
1609                 goto error;
1610         }
1611         if (priv->representor) {
1612                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1613                 eth_dev->data->representor_id = priv->representor_id;
1614                 MLX5_ETH_FOREACH_DEV(port_id, dpdk_dev) {
1615                         struct mlx5_priv *opriv =
1616                                 rte_eth_devices[port_id].data->dev_private;
1617                         if (opriv &&
1618                             opriv->master &&
1619                             opriv->domain_id == priv->domain_id &&
1620                             opriv->sh == priv->sh) {
1621                                 eth_dev->data->backer_port_id = port_id;
1622                                 break;
1623                         }
1624                 }
1625                 if (port_id >= RTE_MAX_ETHPORTS)
1626                         eth_dev->data->backer_port_id = eth_dev->data->port_id;
1627         }
1628         priv->mp_id.port_id = eth_dev->data->port_id;
1629         strlcpy(priv->mp_id.name, MLX5_MP_NAME, RTE_MP_MAX_NAME_LEN);
1630         /*
1631          * Store associated network device interface index. This index
1632          * is permanent throughout the lifetime of device. So, we may store
1633          * the ifindex here and use the cached value further.
1634          */
1635         MLX5_ASSERT(spawn->ifindex);
1636         priv->if_index = spawn->ifindex;
1637         eth_dev->data->dev_private = priv;
1638         priv->dev_data = eth_dev->data;
1639         eth_dev->data->mac_addrs = priv->mac;
1640         eth_dev->device = dpdk_dev;
1641         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1642         /* Configure the first MAC address by default. */
1643         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1644                 DRV_LOG(ERR,
1645                         "port %u cannot get MAC address, is mlx5_en"
1646                         " loaded? (errno: %s)",
1647                         eth_dev->data->port_id, strerror(rte_errno));
1648                 err = ENODEV;
1649                 goto error;
1650         }
1651         DRV_LOG(INFO,
1652                 "port %u MAC address is " RTE_ETHER_ADDR_PRT_FMT,
1653                 eth_dev->data->port_id, RTE_ETHER_ADDR_BYTES(&mac));
1654 #ifdef RTE_LIBRTE_MLX5_DEBUG
1655         {
1656                 char ifname[MLX5_NAMESIZE];
1657
1658                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1659                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1660                                 eth_dev->data->port_id, ifname);
1661                 else
1662                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1663                                 eth_dev->data->port_id);
1664         }
1665 #endif
1666         /* Get actual MTU if possible. */
1667         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1668         if (err) {
1669                 err = rte_errno;
1670                 goto error;
1671         }
1672         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1673                 priv->mtu);
1674         /* Initialize burst functions to prevent crashes before link-up. */
1675         eth_dev->rx_pkt_burst = removed_rx_burst;
1676         eth_dev->tx_pkt_burst = removed_tx_burst;
1677         eth_dev->dev_ops = &mlx5_dev_ops;
1678         eth_dev->rx_descriptor_status = mlx5_rx_descriptor_status;
1679         eth_dev->tx_descriptor_status = mlx5_tx_descriptor_status;
1680         eth_dev->rx_queue_count = mlx5_rx_queue_count;
1681         /* Register MAC address. */
1682         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1683         if (config->vf && config->vf_nl_en)
1684                 mlx5_nl_mac_addr_sync(priv->nl_socket_route,
1685                                       mlx5_ifindex(eth_dev),
1686                                       eth_dev->data->mac_addrs,
1687                                       MLX5_MAX_MAC_ADDRESSES);
1688         priv->ctrl_flows = 0;
1689         rte_spinlock_init(&priv->flow_list_lock);
1690         TAILQ_INIT(&priv->flow_meters);
1691         priv->mtr_profile_tbl = mlx5_l3t_create(MLX5_L3T_TYPE_PTR);
1692         if (!priv->mtr_profile_tbl)
1693                 goto error;
1694         /* Bring Ethernet device up. */
1695         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1696                 eth_dev->data->port_id);
1697         mlx5_set_link_up(eth_dev);
1698         /*
1699          * Even though the interrupt handler is not installed yet,
1700          * interrupts will still trigger on the async_fd from
1701          * Verbs context returned by ibv_open_device().
1702          */
1703         mlx5_link_update(eth_dev, 0);
1704 #ifdef HAVE_MLX5DV_DR_ESWITCH
1705         if (!(config->hca_attr.eswitch_manager && config->dv_flow_en &&
1706               (switch_info->representor || switch_info->master)))
1707                 config->dv_esw_en = 0;
1708 #else
1709         config->dv_esw_en = 0;
1710 #endif
1711         /* Detect minimal data bytes to inline. */
1712         mlx5_set_min_inline(spawn, config);
1713         /* Store device configuration on private structure. */
1714         priv->config = *config;
1715         for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
1716                 icfg[i].release_mem_en = !!config->reclaim_mode;
1717                 if (config->reclaim_mode)
1718                         icfg[i].per_core_cache = 0;
1719                 priv->flows[i] = mlx5_ipool_create(&icfg[i]);
1720                 if (!priv->flows[i])
1721                         goto error;
1722         }
1723         /* Create context for virtual machine VLAN workaround. */
1724         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
1725         if (config->dv_flow_en) {
1726                 err = mlx5_alloc_shared_dr(priv);
1727                 if (err)
1728                         goto error;
1729         }
1730         if (sh->devx && config->dv_flow_en && config->dest_tir) {
1731                 priv->obj_ops = devx_obj_ops;
1732                 priv->obj_ops.drop_action_create =
1733                                                 ibv_obj_ops.drop_action_create;
1734                 priv->obj_ops.drop_action_destroy =
1735                                                 ibv_obj_ops.drop_action_destroy;
1736 #ifndef HAVE_MLX5DV_DEVX_UAR_OFFSET
1737                 priv->obj_ops.txq_obj_modify = ibv_obj_ops.txq_obj_modify;
1738 #else
1739                 if (config->dv_esw_en)
1740                         priv->obj_ops.txq_obj_modify =
1741                                                 ibv_obj_ops.txq_obj_modify;
1742 #endif
1743                 /* Use specific wrappers for Tx object. */
1744                 priv->obj_ops.txq_obj_new = mlx5_os_txq_obj_new;
1745                 priv->obj_ops.txq_obj_release = mlx5_os_txq_obj_release;
1746                 mlx5_queue_counter_id_prepare(eth_dev);
1747                 priv->obj_ops.lb_dummy_queue_create =
1748                                         mlx5_rxq_ibv_obj_dummy_lb_create;
1749                 priv->obj_ops.lb_dummy_queue_release =
1750                                         mlx5_rxq_ibv_obj_dummy_lb_release;
1751         } else {
1752                 priv->obj_ops = ibv_obj_ops;
1753         }
1754         if (config->tx_pp &&
1755             (priv->config.dv_esw_en ||
1756              priv->obj_ops.txq_obj_new != mlx5_os_txq_obj_new)) {
1757                 /*
1758                  * HAVE_MLX5DV_DEVX_UAR_OFFSET is required to support
1759                  * packet pacing and already checked above.
1760                  * Hence, we should only make sure the SQs will be created
1761                  * with DevX, not with Verbs.
1762                  * Verbs allocates the SQ UAR on its own and it can't be shared
1763                  * with Clock Queue UAR as required for Tx scheduling.
1764                  */
1765                 DRV_LOG(ERR, "Verbs SQs, UAR can't be shared as required for packet pacing");
1766                 err = ENODEV;
1767                 goto error;
1768         }
1769         priv->drop_queue.hrxq = mlx5_drop_action_create(eth_dev);
1770         if (!priv->drop_queue.hrxq)
1771                 goto error;
1772         /* Supported Verbs flow priority number detection. */
1773         err = mlx5_flow_discover_priorities(eth_dev);
1774         if (err < 0) {
1775                 err = -err;
1776                 goto error;
1777         }
1778         priv->config.flow_prio = err;
1779         if (!priv->config.dv_esw_en &&
1780             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1781                 DRV_LOG(WARNING, "metadata mode %u is not supported "
1782                                  "(no E-Switch)", priv->config.dv_xmeta_en);
1783                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
1784         }
1785         mlx5_set_metadata_mask(eth_dev);
1786         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1787             !priv->sh->dv_regc0_mask) {
1788                 DRV_LOG(ERR, "metadata mode %u is not supported "
1789                              "(no metadata reg_c[0] is available)",
1790                              priv->config.dv_xmeta_en);
1791                         err = ENOTSUP;
1792                         goto error;
1793         }
1794         priv->hrxqs = mlx5_list_create("hrxq", eth_dev, true,
1795                                        mlx5_hrxq_create_cb,
1796                                        mlx5_hrxq_match_cb,
1797                                        mlx5_hrxq_remove_cb,
1798                                        mlx5_hrxq_clone_cb,
1799                                        mlx5_hrxq_clone_free_cb);
1800         if (!priv->hrxqs)
1801                 goto error;
1802         rte_rwlock_init(&priv->ind_tbls_lock);
1803         /* Query availability of metadata reg_c's. */
1804         err = mlx5_flow_discover_mreg_c(eth_dev);
1805         if (err < 0) {
1806                 err = -err;
1807                 goto error;
1808         }
1809         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
1810                 DRV_LOG(DEBUG,
1811                         "port %u extensive metadata register is not supported",
1812                         eth_dev->data->port_id);
1813                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1814                         DRV_LOG(ERR, "metadata mode %u is not supported "
1815                                      "(no metadata registers available)",
1816                                      priv->config.dv_xmeta_en);
1817                         err = ENOTSUP;
1818                         goto error;
1819                 }
1820         }
1821         if (priv->config.dv_flow_en &&
1822             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1823             mlx5_flow_ext_mreg_supported(eth_dev) &&
1824             priv->sh->dv_regc0_mask) {
1825                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
1826                                                       MLX5_FLOW_MREG_HTABLE_SZ,
1827                                                       false, true, eth_dev,
1828                                                       flow_dv_mreg_create_cb,
1829                                                       flow_dv_mreg_match_cb,
1830                                                       flow_dv_mreg_remove_cb,
1831                                                       flow_dv_mreg_clone_cb,
1832                                                     flow_dv_mreg_clone_free_cb);
1833                 if (!priv->mreg_cp_tbl) {
1834                         err = ENOMEM;
1835                         goto error;
1836                 }
1837         }
1838         rte_spinlock_init(&priv->shared_act_sl);
1839         mlx5_flow_counter_mode_config(eth_dev);
1840         mlx5_flow_drop_action_config(eth_dev);
1841         if (priv->config.dv_flow_en)
1842                 eth_dev->data->dev_flags |= RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE;
1843         return eth_dev;
1844 error:
1845         if (priv) {
1846                 if (priv->mreg_cp_tbl)
1847                         mlx5_hlist_destroy(priv->mreg_cp_tbl);
1848                 if (priv->sh)
1849                         mlx5_os_free_shared_dr(priv);
1850                 if (priv->nl_socket_route >= 0)
1851                         close(priv->nl_socket_route);
1852                 if (priv->nl_socket_rdma >= 0)
1853                         close(priv->nl_socket_rdma);
1854                 if (priv->vmwa_context)
1855                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
1856                 if (eth_dev && priv->drop_queue.hrxq)
1857                         mlx5_drop_action_destroy(eth_dev);
1858                 if (priv->mtr_profile_tbl)
1859                         mlx5_l3t_destroy(priv->mtr_profile_tbl);
1860                 if (own_domain_id)
1861                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1862                 if (priv->hrxqs)
1863                         mlx5_list_destroy(priv->hrxqs);
1864                 mlx5_free(priv);
1865                 if (eth_dev != NULL)
1866                         eth_dev->data->dev_private = NULL;
1867         }
1868         if (eth_dev != NULL) {
1869                 /* mac_addrs must not be freed alone because part of
1870                  * dev_private
1871                  **/
1872                 eth_dev->data->mac_addrs = NULL;
1873                 rte_eth_dev_release_port(eth_dev);
1874         }
1875         if (sh)
1876                 mlx5_free_shared_dev_ctx(sh);
1877         MLX5_ASSERT(err > 0);
1878         rte_errno = err;
1879         return NULL;
1880 }
1881
1882 /**
1883  * Comparison callback to sort device data.
1884  *
1885  * This is meant to be used with qsort().
1886  *
1887  * @param a[in]
1888  *   Pointer to pointer to first data object.
1889  * @param b[in]
1890  *   Pointer to pointer to second data object.
1891  *
1892  * @return
1893  *   0 if both objects are equal, less than 0 if the first argument is less
1894  *   than the second, greater than 0 otherwise.
1895  */
1896 static int
1897 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1898 {
1899         const struct mlx5_switch_info *si_a =
1900                 &((const struct mlx5_dev_spawn_data *)a)->info;
1901         const struct mlx5_switch_info *si_b =
1902                 &((const struct mlx5_dev_spawn_data *)b)->info;
1903         int ret;
1904
1905         /* Master device first. */
1906         ret = si_b->master - si_a->master;
1907         if (ret)
1908                 return ret;
1909         /* Then representor devices. */
1910         ret = si_b->representor - si_a->representor;
1911         if (ret)
1912                 return ret;
1913         /* Unidentified devices come last in no specific order. */
1914         if (!si_a->representor)
1915                 return 0;
1916         /* Order representors by name. */
1917         return si_a->port_name - si_b->port_name;
1918 }
1919
1920 /**
1921  * Match PCI information for possible slaves of bonding device.
1922  *
1923  * @param[in] ibdev_name
1924  *   Name of Infiniband device.
1925  * @param[in] pci_dev
1926  *   Pointer to primary PCI address structure to match.
1927  * @param[in] nl_rdma
1928  *   Netlink RDMA group socket handle.
1929  * @param[in] owner
1930  *   Representor owner PF index.
1931  * @param[out] bond_info
1932  *   Pointer to bonding information.
1933  *
1934  * @return
1935  *   negative value if no bonding device found, otherwise
1936  *   positive index of slave PF in bonding.
1937  */
1938 static int
1939 mlx5_device_bond_pci_match(const char *ibdev_name,
1940                            const struct rte_pci_addr *pci_dev,
1941                            int nl_rdma, uint16_t owner,
1942                            struct mlx5_bond_info *bond_info)
1943 {
1944         char ifname[IF_NAMESIZE + 1];
1945         unsigned int ifindex;
1946         unsigned int np, i;
1947         FILE *bond_file = NULL, *file;
1948         int pf = -1;
1949         int ret;
1950
1951         /*
1952          * Try to get master device name. If something goes wrong suppose
1953          * the lack of kernel support and no bonding devices.
1954          */
1955         memset(bond_info, 0, sizeof(*bond_info));
1956         if (nl_rdma < 0)
1957                 return -1;
1958         if (!strstr(ibdev_name, "bond"))
1959                 return -1;
1960         np = mlx5_nl_portnum(nl_rdma, ibdev_name);
1961         if (!np)
1962                 return -1;
1963         /*
1964          * The master device might not be on the predefined port(not on port
1965          * index 1, it is not guaranteed), we have to scan all Infiniband
1966          * device ports and find master.
1967          */
1968         for (i = 1; i <= np; ++i) {
1969                 /* Check whether Infiniband port is populated. */
1970                 ifindex = mlx5_nl_ifindex(nl_rdma, ibdev_name, i);
1971                 if (!ifindex)
1972                         continue;
1973                 if (!if_indextoname(ifindex, ifname))
1974                         continue;
1975                 /* Try to read bonding slave names from sysfs. */
1976                 MKSTR(slaves,
1977                       "/sys/class/net/%s/master/bonding/slaves", ifname);
1978                 bond_file = fopen(slaves, "r");
1979                 if (bond_file)
1980                         break;
1981         }
1982         if (!bond_file)
1983                 return -1;
1984         /* Use safe format to check maximal buffer length. */
1985         MLX5_ASSERT(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
1986         while (fscanf(bond_file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
1987                 char tmp_str[IF_NAMESIZE + 32];
1988                 struct rte_pci_addr pci_addr;
1989                 struct mlx5_switch_info info;
1990
1991                 /* Process slave interface names in the loop. */
1992                 snprintf(tmp_str, sizeof(tmp_str),
1993                          "/sys/class/net/%s", ifname);
1994                 if (mlx5_get_pci_addr(tmp_str, &pci_addr)) {
1995                         DRV_LOG(WARNING,
1996                                 "Cannot get PCI address for netdev \"%s\".",
1997                                 ifname);
1998                         continue;
1999                 }
2000                 /* Slave interface PCI address match found. */
2001                 snprintf(tmp_str, sizeof(tmp_str),
2002                          "/sys/class/net/%s/phys_port_name", ifname);
2003                 file = fopen(tmp_str, "rb");
2004                 if (!file)
2005                         break;
2006                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
2007                 if (fscanf(file, "%32s", tmp_str) == 1)
2008                         mlx5_translate_port_name(tmp_str, &info);
2009                 fclose(file);
2010                 /* Only process PF ports. */
2011                 if (info.name_type != MLX5_PHYS_PORT_NAME_TYPE_LEGACY &&
2012                     info.name_type != MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
2013                         continue;
2014                 /* Check max bonding member. */
2015                 if (info.port_name >= MLX5_BOND_MAX_PORTS) {
2016                         DRV_LOG(WARNING, "bonding index out of range, "
2017                                 "please increase MLX5_BOND_MAX_PORTS: %s",
2018                                 tmp_str);
2019                         break;
2020                 }
2021                 /* Match PCI address, allows BDF0+pfx or BDFx+pfx. */
2022                 if (pci_dev->domain == pci_addr.domain &&
2023                     pci_dev->bus == pci_addr.bus &&
2024                     pci_dev->devid == pci_addr.devid &&
2025                     ((pci_dev->function == 0 &&
2026                       pci_dev->function + owner == pci_addr.function) ||
2027                      (pci_dev->function == owner &&
2028                       pci_addr.function == owner)))
2029                         pf = info.port_name;
2030                 /* Get ifindex. */
2031                 snprintf(tmp_str, sizeof(tmp_str),
2032                          "/sys/class/net/%s/ifindex", ifname);
2033                 file = fopen(tmp_str, "rb");
2034                 if (!file)
2035                         break;
2036                 ret = fscanf(file, "%u", &ifindex);
2037                 fclose(file);
2038                 if (ret != 1)
2039                         break;
2040                 /* Save bonding info. */
2041                 strncpy(bond_info->ports[info.port_name].ifname, ifname,
2042                         sizeof(bond_info->ports[0].ifname));
2043                 bond_info->ports[info.port_name].pci_addr = pci_addr;
2044                 bond_info->ports[info.port_name].ifindex = ifindex;
2045                 bond_info->n_port++;
2046         }
2047         if (pf >= 0) {
2048                 /* Get bond interface info */
2049                 ret = mlx5_sysfs_bond_info(ifindex, &bond_info->ifindex,
2050                                            bond_info->ifname);
2051                 if (ret)
2052                         DRV_LOG(ERR, "unable to get bond info: %s",
2053                                 strerror(rte_errno));
2054                 else
2055                         DRV_LOG(INFO, "PF device %u, bond device %u(%s)",
2056                                 ifindex, bond_info->ifindex, bond_info->ifname);
2057         }
2058         return pf;
2059 }
2060
2061 static void
2062 mlx5_os_config_default(struct mlx5_dev_config *config)
2063 {
2064         memset(config, 0, sizeof(*config));
2065         config->mps = MLX5_ARG_UNSET;
2066         config->rx_vec_en = 1;
2067         config->txq_inline_max = MLX5_ARG_UNSET;
2068         config->txq_inline_min = MLX5_ARG_UNSET;
2069         config->txq_inline_mpw = MLX5_ARG_UNSET;
2070         config->txqs_inline = MLX5_ARG_UNSET;
2071         config->vf_nl_en = 1;
2072         config->mprq.max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN;
2073         config->mprq.min_rxqs_num = MLX5_MPRQ_MIN_RXQS;
2074         config->dv_esw_en = 1;
2075         config->dv_flow_en = 1;
2076         config->decap_en = 1;
2077         config->log_hp_size = MLX5_ARG_UNSET;
2078         config->allow_duplicate_pattern = 1;
2079 }
2080
2081 /**
2082  * Register a PCI device within bonding.
2083  *
2084  * This function spawns Ethernet devices out of a given PCI device and
2085  * bonding owner PF index.
2086  *
2087  * @param[in] cdev
2088  *   Pointer to common mlx5 device structure.
2089  * @param[in] req_eth_da
2090  *   Requested ethdev device argument.
2091  * @param[in] owner_id
2092  *   Requested owner PF port ID within bonding device, default to 0.
2093  *
2094  * @return
2095  *   0 on success, a negative errno value otherwise and rte_errno is set.
2096  */
2097 static int
2098 mlx5_os_pci_probe_pf(struct mlx5_common_device *cdev,
2099                      struct rte_eth_devargs *req_eth_da,
2100                      uint16_t owner_id)
2101 {
2102         struct ibv_device **ibv_list;
2103         /*
2104          * Number of found IB Devices matching with requested PCI BDF.
2105          * nd != 1 means there are multiple IB devices over the same
2106          * PCI device and we have representors and master.
2107          */
2108         unsigned int nd = 0;
2109         /*
2110          * Number of found IB device Ports. nd = 1 and np = 1..n means
2111          * we have the single multiport IB device, and there may be
2112          * representors attached to some of found ports.
2113          */
2114         unsigned int np = 0;
2115         /*
2116          * Number of DPDK ethernet devices to Spawn - either over
2117          * multiple IB devices or multiple ports of single IB device.
2118          * Actually this is the number of iterations to spawn.
2119          */
2120         unsigned int ns = 0;
2121         /*
2122          * Bonding device
2123          *   < 0 - no bonding device (single one)
2124          *  >= 0 - bonding device (value is slave PF index)
2125          */
2126         int bd = -1;
2127         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
2128         struct mlx5_dev_spawn_data *list = NULL;
2129         struct mlx5_dev_config dev_config;
2130         unsigned int dev_config_vf;
2131         struct rte_eth_devargs eth_da = *req_eth_da;
2132         struct rte_pci_addr owner_pci = pci_dev->addr; /* Owner PF. */
2133         struct mlx5_bond_info bond_info;
2134         int ret = -1;
2135
2136         errno = 0;
2137         ibv_list = mlx5_glue->get_device_list(&ret);
2138         if (!ibv_list) {
2139                 rte_errno = errno ? errno : ENOSYS;
2140                 DRV_LOG(ERR, "Cannot list devices, is ib_uverbs loaded?");
2141                 return -rte_errno;
2142         }
2143         /*
2144          * First scan the list of all Infiniband devices to find
2145          * matching ones, gathering into the list.
2146          */
2147         struct ibv_device *ibv_match[ret + 1];
2148         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
2149         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2150         unsigned int i;
2151
2152         while (ret-- > 0) {
2153                 struct rte_pci_addr pci_addr;
2154
2155                 DRV_LOG(DEBUG, "Checking device \"%s\"", ibv_list[ret]->name);
2156                 bd = mlx5_device_bond_pci_match(ibv_list[ret]->name, &owner_pci,
2157                                                 nl_rdma, owner_id, &bond_info);
2158                 if (bd >= 0) {
2159                         /*
2160                          * Bonding device detected. Only one match is allowed,
2161                          * the bonding is supported over multi-port IB device,
2162                          * there should be no matches on representor PCI
2163                          * functions or non VF LAG bonding devices with
2164                          * specified address.
2165                          */
2166                         if (nd) {
2167                                 DRV_LOG(ERR,
2168                                         "multiple PCI match on bonding device"
2169                                         "\"%s\" found", ibv_list[ret]->name);
2170                                 rte_errno = ENOENT;
2171                                 ret = -rte_errno;
2172                                 goto exit;
2173                         }
2174                         /* Amend owner pci address if owner PF ID specified. */
2175                         if (eth_da.nb_representor_ports)
2176                                 owner_pci.function += owner_id;
2177                         DRV_LOG(INFO,
2178                                 "PCI information matches for slave %d bonding device \"%s\"",
2179                                 bd, ibv_list[ret]->name);
2180                         ibv_match[nd++] = ibv_list[ret];
2181                         break;
2182                 } else {
2183                         /* Bonding device not found. */
2184                         if (mlx5_get_pci_addr(ibv_list[ret]->ibdev_path,
2185                                               &pci_addr))
2186                                 continue;
2187                         if (owner_pci.domain != pci_addr.domain ||
2188                             owner_pci.bus != pci_addr.bus ||
2189                             owner_pci.devid != pci_addr.devid ||
2190                             owner_pci.function != pci_addr.function)
2191                                 continue;
2192                         DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2193                                 ibv_list[ret]->name);
2194                         ibv_match[nd++] = ibv_list[ret];
2195                 }
2196         }
2197         ibv_match[nd] = NULL;
2198         if (!nd) {
2199                 /* No device matches, just complain and bail out. */
2200                 DRV_LOG(WARNING,
2201                         "No Verbs device matches PCI device " PCI_PRI_FMT ","
2202                         " are kernel drivers loaded?",
2203                         owner_pci.domain, owner_pci.bus,
2204                         owner_pci.devid, owner_pci.function);
2205                 rte_errno = ENOENT;
2206                 ret = -rte_errno;
2207                 goto exit;
2208         }
2209         if (nd == 1) {
2210                 /*
2211                  * Found single matching device may have multiple ports.
2212                  * Each port may be representor, we have to check the port
2213                  * number and check the representors existence.
2214                  */
2215                 if (nl_rdma >= 0)
2216                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2217                 if (!np)
2218                         DRV_LOG(WARNING,
2219                                 "Cannot get IB device \"%s\" ports number.",
2220                                 ibv_match[0]->name);
2221                 if (bd >= 0 && !np) {
2222                         DRV_LOG(ERR, "Cannot get ports for bonding device.");
2223                         rte_errno = ENOENT;
2224                         ret = -rte_errno;
2225                         goto exit;
2226                 }
2227         }
2228         /* Now we can determine the maximal amount of devices to be spawned. */
2229         list = mlx5_malloc(MLX5_MEM_ZERO,
2230                            sizeof(struct mlx5_dev_spawn_data) * (np ? np : nd),
2231                            RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
2232         if (!list) {
2233                 DRV_LOG(ERR, "Spawn data array allocation failure.");
2234                 rte_errno = ENOMEM;
2235                 ret = -rte_errno;
2236                 goto exit;
2237         }
2238         if (bd >= 0 || np > 1) {
2239                 /*
2240                  * Single IB device with multiple ports found,
2241                  * it may be E-Switch master device and representors.
2242                  * We have to perform identification through the ports.
2243                  */
2244                 MLX5_ASSERT(nl_rdma >= 0);
2245                 MLX5_ASSERT(ns == 0);
2246                 MLX5_ASSERT(nd == 1);
2247                 MLX5_ASSERT(np);
2248                 for (i = 1; i <= np; ++i) {
2249                         list[ns].bond_info = &bond_info;
2250                         list[ns].max_port = np;
2251                         list[ns].phys_port = i;
2252                         list[ns].phys_dev_name = ibv_match[0]->name;
2253                         list[ns].eth_dev = NULL;
2254                         list[ns].pci_dev = pci_dev;
2255                         list[ns].cdev = cdev;
2256                         list[ns].pf_bond = bd;
2257                         list[ns].ifindex = mlx5_nl_ifindex(nl_rdma,
2258                                                            ibv_match[0]->name,
2259                                                            i);
2260                         if (!list[ns].ifindex) {
2261                                 /*
2262                                  * No network interface index found for the
2263                                  * specified port, it means there is no
2264                                  * representor on this port. It's OK,
2265                                  * there can be disabled ports, for example
2266                                  * if sriov_numvfs < sriov_totalvfs.
2267                                  */
2268                                 continue;
2269                         }
2270                         ret = -1;
2271                         if (nl_route >= 0)
2272                                 ret = mlx5_nl_switch_info(nl_route,
2273                                                           list[ns].ifindex,
2274                                                           &list[ns].info);
2275                         if (ret || (!list[ns].info.representor &&
2276                                     !list[ns].info.master)) {
2277                                 /*
2278                                  * We failed to recognize representors with
2279                                  * Netlink, let's try to perform the task
2280                                  * with sysfs.
2281                                  */
2282                                 ret = mlx5_sysfs_switch_info(list[ns].ifindex,
2283                                                              &list[ns].info);
2284                         }
2285                         if (!ret && bd >= 0) {
2286                                 switch (list[ns].info.name_type) {
2287                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
2288                                         if (np == 1) {
2289                                                 /*
2290                                                  * Force standalone bonding
2291                                                  * device for ROCE LAG
2292                                                  * confgiurations.
2293                                                  */
2294                                                 list[ns].info.master = 0;
2295                                                 list[ns].info.representor = 0;
2296                                         }
2297                                         if (list[ns].info.port_name == bd)
2298                                                 ns++;
2299                                         break;
2300                                 case MLX5_PHYS_PORT_NAME_TYPE_PFHPF:
2301                                         /* Fallthrough */
2302                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
2303                                         /* Fallthrough */
2304                                 case MLX5_PHYS_PORT_NAME_TYPE_PFSF:
2305                                         if (list[ns].info.pf_num == bd)
2306                                                 ns++;
2307                                         break;
2308                                 default:
2309                                         break;
2310                                 }
2311                                 continue;
2312                         }
2313                         if (!ret && (list[ns].info.representor ^
2314                                      list[ns].info.master))
2315                                 ns++;
2316                 }
2317                 if (!ns) {
2318                         DRV_LOG(ERR,
2319                                 "Unable to recognize master/representors on the IB device with multiple ports.");
2320                         rte_errno = ENOENT;
2321                         ret = -rte_errno;
2322                         goto exit;
2323                 }
2324         } else {
2325                 /*
2326                  * The existence of several matching entries (nd > 1) means
2327                  * port representors have been instantiated. No existing Verbs
2328                  * call nor sysfs entries can tell them apart, this can only
2329                  * be done through Netlink calls assuming kernel drivers are
2330                  * recent enough to support them.
2331                  *
2332                  * In the event of identification failure through Netlink,
2333                  * try again through sysfs, then:
2334                  *
2335                  * 1. A single IB device matches (nd == 1) with single
2336                  *    port (np=0/1) and is not a representor, assume
2337                  *    no switch support.
2338                  *
2339                  * 2. Otherwise no safe assumptions can be made;
2340                  *    complain louder and bail out.
2341                  */
2342                 for (i = 0; i != nd; ++i) {
2343                         memset(&list[ns].info, 0, sizeof(list[ns].info));
2344                         list[ns].bond_info = NULL;
2345                         list[ns].max_port = 1;
2346                         list[ns].phys_port = 1;
2347                         list[ns].phys_dev_name = ibv_match[i]->name;
2348                         list[ns].eth_dev = NULL;
2349                         list[ns].pci_dev = pci_dev;
2350                         list[ns].cdev = cdev;
2351                         list[ns].pf_bond = -1;
2352                         list[ns].ifindex = 0;
2353                         if (nl_rdma >= 0)
2354                                 list[ns].ifindex = mlx5_nl_ifindex
2355                                                             (nl_rdma,
2356                                                              ibv_match[i]->name,
2357                                                              1);
2358                         if (!list[ns].ifindex) {
2359                                 char ifname[IF_NAMESIZE];
2360
2361                                 /*
2362                                  * Netlink failed, it may happen with old
2363                                  * ib_core kernel driver (before 4.16).
2364                                  * We can assume there is old driver because
2365                                  * here we are processing single ports IB
2366                                  * devices. Let's try sysfs to retrieve
2367                                  * the ifindex. The method works for
2368                                  * master device only.
2369                                  */
2370                                 if (nd > 1) {
2371                                         /*
2372                                          * Multiple devices found, assume
2373                                          * representors, can not distinguish
2374                                          * master/representor and retrieve
2375                                          * ifindex via sysfs.
2376                                          */
2377                                         continue;
2378                                 }
2379                                 ret = mlx5_get_ifname_sysfs
2380                                         (ibv_match[i]->ibdev_path, ifname);
2381                                 if (!ret)
2382                                         list[ns].ifindex =
2383                                                 if_nametoindex(ifname);
2384                                 if (!list[ns].ifindex) {
2385                                         /*
2386                                          * No network interface index found
2387                                          * for the specified device, it means
2388                                          * there it is neither representor
2389                                          * nor master.
2390                                          */
2391                                         continue;
2392                                 }
2393                         }
2394                         ret = -1;
2395                         if (nl_route >= 0)
2396                                 ret = mlx5_nl_switch_info(nl_route,
2397                                                           list[ns].ifindex,
2398                                                           &list[ns].info);
2399                         if (ret || (!list[ns].info.representor &&
2400                                     !list[ns].info.master)) {
2401                                 /*
2402                                  * We failed to recognize representors with
2403                                  * Netlink, let's try to perform the task
2404                                  * with sysfs.
2405                                  */
2406                                 ret = mlx5_sysfs_switch_info(list[ns].ifindex,
2407                                                              &list[ns].info);
2408                         }
2409                         if (!ret && (list[ns].info.representor ^
2410                                      list[ns].info.master)) {
2411                                 ns++;
2412                         } else if ((nd == 1) &&
2413                                    !list[ns].info.representor &&
2414                                    !list[ns].info.master) {
2415                                 /*
2416                                  * Single IB device with one physical port and
2417                                  * attached network device.
2418                                  * May be SRIOV is not enabled or there is no
2419                                  * representors.
2420                                  */
2421                                 DRV_LOG(INFO, "No E-Switch support detected.");
2422                                 ns++;
2423                                 break;
2424                         }
2425                 }
2426                 if (!ns) {
2427                         DRV_LOG(ERR,
2428                                 "Unable to recognize master/representors on the multiple IB devices.");
2429                         rte_errno = ENOENT;
2430                         ret = -rte_errno;
2431                         goto exit;
2432                 }
2433                 /*
2434                  * New kernels may add the switch_id attribute for the case
2435                  * there is no E-Switch and we wrongly recognized the only
2436                  * device as master. Override this if there is the single
2437                  * device with single port and new device name format present.
2438                  */
2439                 if (nd == 1 &&
2440                     list[0].info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK) {
2441                         list[0].info.master = 0;
2442                         list[0].info.representor = 0;
2443                 }
2444         }
2445         MLX5_ASSERT(ns);
2446         /*
2447          * Sort list to probe devices in natural order for users convenience
2448          * (i.e. master first, then representors from lowest to highest ID).
2449          */
2450         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2451         /* Device specific configuration. */
2452         switch (pci_dev->id.device_id) {
2453         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2454         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2455         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2456         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2457         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2458         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2459         case PCI_DEVICE_ID_MELLANOX_CONNECTXVF:
2460                 dev_config_vf = 1;
2461                 break;
2462         default:
2463                 dev_config_vf = 0;
2464                 break;
2465         }
2466         if (eth_da.type != RTE_ETH_REPRESENTOR_NONE) {
2467                 /* Set devargs default values. */
2468                 if (eth_da.nb_mh_controllers == 0) {
2469                         eth_da.nb_mh_controllers = 1;
2470                         eth_da.mh_controllers[0] = 0;
2471                 }
2472                 if (eth_da.nb_ports == 0 && ns > 0) {
2473                         if (list[0].pf_bond >= 0 && list[0].info.representor)
2474                                 DRV_LOG(WARNING, "Representor on Bonding device should use pf#vf# syntax: %s",
2475                                         pci_dev->device.devargs->args);
2476                         eth_da.nb_ports = 1;
2477                         eth_da.ports[0] = list[0].info.pf_num;
2478                 }
2479                 if (eth_da.nb_representor_ports == 0) {
2480                         eth_da.nb_representor_ports = 1;
2481                         eth_da.representor_ports[0] = 0;
2482                 }
2483         }
2484         for (i = 0; i != ns; ++i) {
2485                 uint32_t restore;
2486
2487                 /* Default configuration. */
2488                 mlx5_os_config_default(&dev_config);
2489                 dev_config.vf = dev_config_vf;
2490                 list[i].eth_dev = mlx5_dev_spawn(cdev->dev, &list[i],
2491                                                  &dev_config, &eth_da);
2492                 if (!list[i].eth_dev) {
2493                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2494                                 break;
2495                         /* Device is disabled or already spawned. Ignore it. */
2496                         continue;
2497                 }
2498                 restore = list[i].eth_dev->data->dev_flags;
2499                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2500                 /**
2501                  * Each representor has a dedicated interrupts vector.
2502                  * rte_eth_copy_pci_info() assigns PF interrupts handle to
2503                  * representor eth_dev object because representor and PF
2504                  * share the same PCI address.
2505                  * Override representor device with a dedicated
2506                  * interrupts handle here.
2507                  * Representor interrupts handle is released in mlx5_dev_stop().
2508                  */
2509                 if (list[i].info.representor) {
2510                         struct rte_intr_handle *intr_handle;
2511                         intr_handle = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
2512                                                   sizeof(*intr_handle), 0,
2513                                                   SOCKET_ID_ANY);
2514                         if (!intr_handle) {
2515                                 DRV_LOG(ERR,
2516                                         "port %u failed to allocate memory for interrupt handler "
2517                                         "Rx interrupts will not be supported",
2518                                         i);
2519                                 rte_errno = ENOMEM;
2520                                 ret = -rte_errno;
2521                                 goto exit;
2522                         }
2523                         list[i].eth_dev->intr_handle = intr_handle;
2524                 }
2525                 /* Restore non-PCI flags cleared by the above call. */
2526                 list[i].eth_dev->data->dev_flags |= restore;
2527                 rte_eth_dev_probing_finish(list[i].eth_dev);
2528         }
2529         if (i != ns) {
2530                 DRV_LOG(ERR,
2531                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2532                         " encountering an error: %s",
2533                         owner_pci.domain, owner_pci.bus,
2534                         owner_pci.devid, owner_pci.function,
2535                         strerror(rte_errno));
2536                 ret = -rte_errno;
2537                 /* Roll back. */
2538                 while (i--) {
2539                         if (!list[i].eth_dev)
2540                                 continue;
2541                         mlx5_dev_close(list[i].eth_dev);
2542                         /* mac_addrs must not be freed because in dev_private */
2543                         list[i].eth_dev->data->mac_addrs = NULL;
2544                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2545                 }
2546                 /* Restore original error. */
2547                 rte_errno = -ret;
2548         } else {
2549                 ret = 0;
2550         }
2551 exit:
2552         /*
2553          * Do the routine cleanup:
2554          * - close opened Netlink sockets
2555          * - free allocated spawn data array
2556          * - free the Infiniband device list
2557          */
2558         if (nl_rdma >= 0)
2559                 close(nl_rdma);
2560         if (nl_route >= 0)
2561                 close(nl_route);
2562         if (list)
2563                 mlx5_free(list);
2564         MLX5_ASSERT(ibv_list);
2565         mlx5_glue->free_device_list(ibv_list);
2566         return ret;
2567 }
2568
2569 static int
2570 mlx5_os_parse_eth_devargs(struct rte_device *dev,
2571                           struct rte_eth_devargs *eth_da)
2572 {
2573         int ret = 0;
2574
2575         if (dev->devargs == NULL)
2576                 return 0;
2577         memset(eth_da, 0, sizeof(*eth_da));
2578         /* Parse representor information first from class argument. */
2579         if (dev->devargs->cls_str)
2580                 ret = rte_eth_devargs_parse(dev->devargs->cls_str, eth_da);
2581         if (ret != 0) {
2582                 DRV_LOG(ERR, "failed to parse device arguments: %s",
2583                         dev->devargs->cls_str);
2584                 return -rte_errno;
2585         }
2586         if (eth_da->type == RTE_ETH_REPRESENTOR_NONE) {
2587                 /* Parse legacy device argument */
2588                 ret = rte_eth_devargs_parse(dev->devargs->args, eth_da);
2589                 if (ret) {
2590                         DRV_LOG(ERR, "failed to parse device arguments: %s",
2591                                 dev->devargs->args);
2592                         return -rte_errno;
2593                 }
2594         }
2595         return 0;
2596 }
2597
2598 /**
2599  * Callback to register a PCI device.
2600  *
2601  * This function spawns Ethernet devices out of a given PCI device.
2602  *
2603  * @param[in] cdev
2604  *   Pointer to common mlx5 device structure.
2605  *
2606  * @return
2607  *   0 on success, a negative errno value otherwise and rte_errno is set.
2608  */
2609 static int
2610 mlx5_os_pci_probe(struct mlx5_common_device *cdev)
2611 {
2612         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(cdev->dev);
2613         struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2614         int ret = 0;
2615         uint16_t p;
2616
2617         ret = mlx5_os_parse_eth_devargs(cdev->dev, &eth_da);
2618         if (ret != 0)
2619                 return ret;
2620
2621         if (eth_da.nb_ports > 0) {
2622                 /* Iterate all port if devargs pf is range: "pf[0-1]vf[...]". */
2623                 for (p = 0; p < eth_da.nb_ports; p++) {
2624                         ret = mlx5_os_pci_probe_pf(cdev, &eth_da,
2625                                                    eth_da.ports[p]);
2626                         if (ret)
2627                                 break;
2628                 }
2629                 if (ret) {
2630                         DRV_LOG(ERR, "Probe of PCI device " PCI_PRI_FMT " "
2631                                 "aborted due to proding failure of PF %u",
2632                                 pci_dev->addr.domain, pci_dev->addr.bus,
2633                                 pci_dev->addr.devid, pci_dev->addr.function,
2634                                 eth_da.ports[p]);
2635                         mlx5_net_remove(cdev);
2636                 }
2637         } else {
2638                 ret = mlx5_os_pci_probe_pf(cdev, &eth_da, 0);
2639         }
2640         return ret;
2641 }
2642
2643 /* Probe a single SF device on auxiliary bus, no representor support. */
2644 static int
2645 mlx5_os_auxiliary_probe(struct mlx5_common_device *cdev)
2646 {
2647         struct rte_eth_devargs eth_da = { .nb_ports = 0 };
2648         struct mlx5_dev_config config;
2649         struct mlx5_dev_spawn_data spawn = { .pf_bond = -1 };
2650         struct rte_device *dev = cdev->dev;
2651         struct rte_auxiliary_device *adev = RTE_DEV_TO_AUXILIARY(dev);
2652         struct rte_eth_dev *eth_dev;
2653         int ret = 0;
2654
2655         /* Parse ethdev devargs. */
2656         ret = mlx5_os_parse_eth_devargs(dev, &eth_da);
2657         if (ret != 0)
2658                 return ret;
2659         /* Set default config data. */
2660         mlx5_os_config_default(&config);
2661         config.sf = 1;
2662         /* Init spawn data. */
2663         spawn.max_port = 1;
2664         spawn.phys_port = 1;
2665         spawn.phys_dev_name = mlx5_os_get_ctx_device_name(cdev->ctx);
2666         ret = mlx5_auxiliary_get_ifindex(dev->name);
2667         if (ret < 0) {
2668                 DRV_LOG(ERR, "failed to get ethdev ifindex: %s", dev->name);
2669                 return ret;
2670         }
2671         spawn.ifindex = ret;
2672         spawn.cdev = cdev;
2673         /* Spawn device. */
2674         eth_dev = mlx5_dev_spawn(dev, &spawn, &config, &eth_da);
2675         if (eth_dev == NULL)
2676                 return -rte_errno;
2677         /* Post create. */
2678         eth_dev->intr_handle = &adev->intr_handle;
2679         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2680                 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2681                 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_RMV;
2682                 eth_dev->data->numa_node = dev->numa_node;
2683         }
2684         rte_eth_dev_probing_finish(eth_dev);
2685         return 0;
2686 }
2687
2688 /**
2689  * Net class driver callback to probe a device.
2690  *
2691  * This function probe PCI bus device(s) or a single SF on auxiliary bus.
2692  *
2693  * @param[in] cdev
2694  *   Pointer to the common mlx5 device.
2695  *
2696  * @return
2697  *   0 on success, a negative errno value otherwise and rte_errno is set.
2698  */
2699 int
2700 mlx5_os_net_probe(struct mlx5_common_device *cdev)
2701 {
2702         int ret;
2703
2704         if (rte_eal_process_type() == RTE_PROC_PRIMARY)
2705                 mlx5_pmd_socket_init();
2706         ret = mlx5_init_once();
2707         if (ret) {
2708                 DRV_LOG(ERR, "Unable to init PMD global data: %s",
2709                         strerror(rte_errno));
2710                 return -rte_errno;
2711         }
2712         if (mlx5_dev_is_pci(cdev->dev))
2713                 return mlx5_os_pci_probe(cdev);
2714         else
2715                 return mlx5_os_auxiliary_probe(cdev);
2716 }
2717
2718 /**
2719  * Install shared asynchronous device events handler.
2720  * This function is implemented to support event sharing
2721  * between multiple ports of single IB device.
2722  *
2723  * @param sh
2724  *   Pointer to mlx5_dev_ctx_shared object.
2725  */
2726 void
2727 mlx5_os_dev_shared_handler_install(struct mlx5_dev_ctx_shared *sh)
2728 {
2729         int ret;
2730         int flags;
2731         struct ibv_context *ctx = sh->cdev->ctx;
2732
2733         sh->intr_handle.fd = -1;
2734         flags = fcntl(ctx->async_fd, F_GETFL);
2735         ret = fcntl(ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
2736         if (ret) {
2737                 DRV_LOG(INFO, "failed to change file descriptor async event"
2738                         " queue");
2739         } else {
2740                 sh->intr_handle.fd = ctx->async_fd;
2741                 sh->intr_handle.type = RTE_INTR_HANDLE_EXT;
2742                 if (rte_intr_callback_register(&sh->intr_handle,
2743                                         mlx5_dev_interrupt_handler, sh)) {
2744                         DRV_LOG(INFO, "Fail to install the shared interrupt.");
2745                         sh->intr_handle.fd = -1;
2746                 }
2747         }
2748         if (sh->devx) {
2749 #ifdef HAVE_IBV_DEVX_ASYNC
2750                 sh->intr_handle_devx.fd = -1;
2751                 sh->devx_comp = (void *)mlx5_glue->devx_create_cmd_comp(ctx);
2752                 struct mlx5dv_devx_cmd_comp *devx_comp = sh->devx_comp;
2753                 if (!devx_comp) {
2754                         DRV_LOG(INFO, "failed to allocate devx_comp.");
2755                         return;
2756                 }
2757                 flags = fcntl(devx_comp->fd, F_GETFL);
2758                 ret = fcntl(devx_comp->fd, F_SETFL, flags | O_NONBLOCK);
2759                 if (ret) {
2760                         DRV_LOG(INFO, "failed to change file descriptor"
2761                                 " devx comp");
2762                         return;
2763                 }
2764                 sh->intr_handle_devx.fd = devx_comp->fd;
2765                 sh->intr_handle_devx.type = RTE_INTR_HANDLE_EXT;
2766                 if (rte_intr_callback_register(&sh->intr_handle_devx,
2767                                         mlx5_dev_interrupt_handler_devx, sh)) {
2768                         DRV_LOG(INFO, "Fail to install the devx shared"
2769                                 " interrupt.");
2770                         sh->intr_handle_devx.fd = -1;
2771                 }
2772 #endif /* HAVE_IBV_DEVX_ASYNC */
2773         }
2774 }
2775
2776 /**
2777  * Uninstall shared asynchronous device events handler.
2778  * This function is implemented to support event sharing
2779  * between multiple ports of single IB device.
2780  *
2781  * @param dev
2782  *   Pointer to mlx5_dev_ctx_shared object.
2783  */
2784 void
2785 mlx5_os_dev_shared_handler_uninstall(struct mlx5_dev_ctx_shared *sh)
2786 {
2787         if (sh->intr_handle.fd >= 0)
2788                 mlx5_intr_callback_unregister(&sh->intr_handle,
2789                                               mlx5_dev_interrupt_handler, sh);
2790 #ifdef HAVE_IBV_DEVX_ASYNC
2791         if (sh->intr_handle_devx.fd >= 0)
2792                 rte_intr_callback_unregister(&sh->intr_handle_devx,
2793                                   mlx5_dev_interrupt_handler_devx, sh);
2794         if (sh->devx_comp)
2795                 mlx5_glue->devx_destroy_cmd_comp(sh->devx_comp);
2796 #endif
2797 }
2798
2799 /**
2800  * Read statistics by a named counter.
2801  *
2802  * @param[in] priv
2803  *   Pointer to the private device data structure.
2804  * @param[in] ctr_name
2805  *   Pointer to the name of the statistic counter to read
2806  * @param[out] stat
2807  *   Pointer to read statistic value.
2808  * @return
2809  *   0 on success and stat is valud, 1 if failed to read the value
2810  *   rte_errno is set.
2811  *
2812  */
2813 int
2814 mlx5_os_read_dev_stat(struct mlx5_priv *priv, const char *ctr_name,
2815                       uint64_t *stat)
2816 {
2817         int fd;
2818
2819         if (priv->sh) {
2820                 if (priv->q_counters != NULL &&
2821                     strcmp(ctr_name, "out_of_buffer") == 0)
2822                         return mlx5_devx_cmd_queue_counter_query
2823                                         (priv->q_counters, 0, (uint32_t *)stat);
2824                 MKSTR(path, "%s/ports/%d/hw_counters/%s",
2825                       priv->sh->ibdev_path,
2826                       priv->dev_port,
2827                       ctr_name);
2828                 fd = open(path, O_RDONLY);
2829                 /*
2830                  * in switchdev the file location is not per port
2831                  * but rather in <ibdev_path>/hw_counters/<file_name>.
2832                  */
2833                 if (fd == -1) {
2834                         MKSTR(path1, "%s/hw_counters/%s",
2835                               priv->sh->ibdev_path,
2836                               ctr_name);
2837                         fd = open(path1, O_RDONLY);
2838                 }
2839                 if (fd != -1) {
2840                         char buf[21] = {'\0'};
2841                         ssize_t n = read(fd, buf, sizeof(buf));
2842
2843                         close(fd);
2844                         if (n != -1) {
2845                                 *stat = strtoull(buf, NULL, 10);
2846                                 return 0;
2847                         }
2848                 }
2849         }
2850         *stat = 0;
2851         return 1;
2852 }
2853
2854 /**
2855  * Set the reg_mr and dereg_mr call backs
2856  *
2857  * @param reg_mr_cb[out]
2858  *   Pointer to reg_mr func
2859  * @param dereg_mr_cb[out]
2860  *   Pointer to dereg_mr func
2861  *
2862  */
2863 void
2864 mlx5_os_set_reg_mr_cb(mlx5_reg_mr_t *reg_mr_cb,
2865                       mlx5_dereg_mr_t *dereg_mr_cb)
2866 {
2867         *reg_mr_cb = mlx5_mr_verbs_ops.reg_mr;
2868         *dereg_mr_cb = mlx5_mr_verbs_ops.dereg_mr;
2869 }
2870
2871 /**
2872  * Remove a MAC address from device
2873  *
2874  * @param dev
2875  *   Pointer to Ethernet device structure.
2876  * @param index
2877  *   MAC address index.
2878  */
2879 void
2880 mlx5_os_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
2881 {
2882         struct mlx5_priv *priv = dev->data->dev_private;
2883         const int vf = priv->config.vf;
2884
2885         if (vf)
2886                 mlx5_nl_mac_addr_remove(priv->nl_socket_route,
2887                                         mlx5_ifindex(dev), priv->mac_own,
2888                                         &dev->data->mac_addrs[index], index);
2889 }
2890
2891 /**
2892  * Adds a MAC address to the device
2893  *
2894  * @param dev
2895  *   Pointer to Ethernet device structure.
2896  * @param mac_addr
2897  *   MAC address to register.
2898  * @param index
2899  *   MAC address index.
2900  *
2901  * @return
2902  *   0 on success, a negative errno value otherwise
2903  */
2904 int
2905 mlx5_os_mac_addr_add(struct rte_eth_dev *dev, struct rte_ether_addr *mac,
2906                      uint32_t index)
2907 {
2908         struct mlx5_priv *priv = dev->data->dev_private;
2909         const int vf = priv->config.vf;
2910         int ret = 0;
2911
2912         if (vf)
2913                 ret = mlx5_nl_mac_addr_add(priv->nl_socket_route,
2914                                            mlx5_ifindex(dev), priv->mac_own,
2915                                            mac, index);
2916         return ret;
2917 }
2918
2919 /**
2920  * Modify a VF MAC address
2921  *
2922  * @param priv
2923  *   Pointer to device private data.
2924  * @param mac_addr
2925  *   MAC address to modify into.
2926  * @param iface_idx
2927  *   Net device interface index
2928  * @param vf_index
2929  *   VF index
2930  *
2931  * @return
2932  *   0 on success, a negative errno value otherwise
2933  */
2934 int
2935 mlx5_os_vf_mac_addr_modify(struct mlx5_priv *priv,
2936                            unsigned int iface_idx,
2937                            struct rte_ether_addr *mac_addr,
2938                            int vf_index)
2939 {
2940         return mlx5_nl_vf_mac_addr_modify
2941                 (priv->nl_socket_route, iface_idx, mac_addr, vf_index);
2942 }
2943
2944 /**
2945  * Set device promiscuous mode
2946  *
2947  * @param dev
2948  *   Pointer to Ethernet device structure.
2949  * @param enable
2950  *   0 - promiscuous is disabled, otherwise - enabled
2951  *
2952  * @return
2953  *   0 on success, a negative error value otherwise
2954  */
2955 int
2956 mlx5_os_set_promisc(struct rte_eth_dev *dev, int enable)
2957 {
2958         struct mlx5_priv *priv = dev->data->dev_private;
2959
2960         return mlx5_nl_promisc(priv->nl_socket_route,
2961                                mlx5_ifindex(dev), !!enable);
2962 }
2963
2964 /**
2965  * Set device promiscuous mode
2966  *
2967  * @param dev
2968  *   Pointer to Ethernet device structure.
2969  * @param enable
2970  *   0 - all multicase is disabled, otherwise - enabled
2971  *
2972  * @return
2973  *   0 on success, a negative error value otherwise
2974  */
2975 int
2976 mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)
2977 {
2978         struct mlx5_priv *priv = dev->data->dev_private;
2979
2980         return mlx5_nl_allmulti(priv->nl_socket_route,
2981                                 mlx5_ifindex(dev), !!enable);
2982 }
2983
2984 /**
2985  * Flush device MAC addresses
2986  *
2987  * @param dev
2988  *   Pointer to Ethernet device structure.
2989  *
2990  */
2991 void
2992 mlx5_os_mac_addr_flush(struct rte_eth_dev *dev)
2993 {
2994         struct mlx5_priv *priv = dev->data->dev_private;
2995
2996         mlx5_nl_mac_addr_flush(priv->nl_socket_route, mlx5_ifindex(dev),
2997                                dev->data->mac_addrs,
2998                                MLX5_MAX_MAC_ADDRESSES, priv->mac_own);
2999 }