drivers/net/mlx5/linux/mlx5_verbs.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2020 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <stddef.h>
   6 #include <errno.h>
   7 #include <stdbool.h>
   8 #include <string.h>
   9 #include <stdint.h>
  10 #include <unistd.h>
  11 #include <inttypes.h>
  12 #include <sys/queue.h>
  13
  14 #include "mlx5_autoconf.h"
  15
  16 #include <rte_mbuf.h>
  17 #include <rte_malloc.h>
  18 #include <rte_ethdev_driver.h>
  19 #include <rte_common.h>
  20
  21 #include <mlx5_glue.h>
  22 #include <mlx5_common.h>
  23 #include <mlx5_common_mr.h>
  24 #include <mlx5_rxtx.h>
  25 #include <mlx5_verbs.h>
  26 #include <mlx5_utils.h>
  27 #include <mlx5_malloc.h>
  28
  29 /**
  30  * Register mr. Given protection domain pointer, pointer to addr and length
  31  * register the memory region.
  32  *
  33  * @param[in] pd
  34  *   Pointer to protection domain context.
  35  * @param[in] addr
  36  *   Pointer to memory start address.
  37  * @param[in] length
  38  *   Length of the memory to register.
  39  * @param[out] pmd_mr
  40  *   pmd_mr struct set with lkey, address, length and pointer to mr object
  41  *
  42  * @return
  43  *   0 on successful registration, -1 otherwise
  44  */
  45 static int
  46 mlx5_reg_mr(void *pd, void *addr, size_t length,
  47                  struct mlx5_pmd_mr *pmd_mr)
  48 {
  49         return mlx5_common_verbs_reg_mr(pd, addr, length, pmd_mr);
  50 }
  51
  52 /**
  53  * Deregister mr. Given the mlx5 pmd MR - deregister the MR
  54  *
  55  * @param[in] pmd_mr
  56  *   pmd_mr struct set with lkey, address, length and pointer to mr object
  57  *
  58  */
  59 static void
  60 mlx5_dereg_mr(struct mlx5_pmd_mr *pmd_mr)
  61 {
  62         mlx5_common_verbs_dereg_mr(pmd_mr);
  63 }
  64
  65 /* verbs operations. */
  66 const struct mlx5_verbs_ops mlx5_verbs_ops = {
  67         .reg_mr = mlx5_reg_mr,
  68         .dereg_mr = mlx5_dereg_mr,
  69 };
  70
  71 /**
  72  * Modify Rx WQ vlan stripping offload
  73  *
  74  * @param rxq_obj
  75  *   Rx queue object.
  76  *
  77  * @return 0 on success, non-0 otherwise
  78  */
  79 static int
  80 mlx5_rxq_obj_modify_wq_vlan_strip(struct mlx5_rxq_obj *rxq_obj, int on)
  81 {
  82         uint16_t vlan_offloads =
  83                 (on ? IBV_WQ_FLAGS_CVLAN_STRIPPING : 0) |
  84                 0;
  85         struct ibv_wq_attr mod;
  86         mod = (struct ibv_wq_attr){
  87                 .attr_mask = IBV_WQ_ATTR_FLAGS,
  88                 .flags_mask = IBV_WQ_FLAGS_CVLAN_STRIPPING,
  89                 .flags = vlan_offloads,
  90         };
  91
  92         return mlx5_glue->modify_wq(rxq_obj->wq, &mod);
  93 }
  94
  95 /**
  96  * Modifies the attributes for the specified WQ.
  97  *
  98  * @param rxq_obj
  99  *   Verbs Rx queue object.
 100  *
 101  * @return
 102  *   0 on success, a negative errno value otherwise and rte_errno is set.
 103  */
 104 static int
 105 mlx5_ibv_modify_wq(struct mlx5_rxq_obj *rxq_obj, bool is_start)
 106 {
 107         struct ibv_wq_attr mod = {
 108                 .attr_mask = IBV_WQ_ATTR_STATE,
 109                 .wq_state = is_start ? IBV_WQS_RDY : IBV_WQS_RESET,
 110         };
 111
 112         return mlx5_glue->modify_wq(rxq_obj->wq, &mod);
 113 }
 114
 115 /**
 116  * Create a CQ Verbs object.
 117  *
 118  * @param dev
 119  *   Pointer to Ethernet device.
 120  * @param idx
 121  *   Queue index in DPDK Rx queue array.
 122  *
 123  * @return
 124  *   The Verbs CQ object initialized, NULL otherwise and rte_errno is set.
 125  */
 126 static struct ibv_cq *
 127 mlx5_rxq_ibv_cq_create(struct rte_eth_dev *dev, uint16_t idx)
 128 {
 129         struct mlx5_priv *priv = dev->data->dev_private;
 130         struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx];
 131         struct mlx5_rxq_ctrl *rxq_ctrl =
 132                 container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
 133         struct mlx5_rxq_obj *rxq_obj = rxq_ctrl->obj;
 134         unsigned int cqe_n = mlx5_rxq_cqe_num(rxq_data);
 135         struct {
 136                 struct ibv_cq_init_attr_ex ibv;
 137                 struct mlx5dv_cq_init_attr mlx5;
 138         } cq_attr;
 139
 140         cq_attr.ibv = (struct ibv_cq_init_attr_ex){
 141                 .cqe = cqe_n,
 142                 .channel = rxq_obj->ibv_channel,
 143                 .comp_mask = 0,
 144         };
 145         cq_attr.mlx5 = (struct mlx5dv_cq_init_attr){
 146                 .comp_mask = 0,
 147         };
 148         if (priv->config.cqe_comp && !rxq_data->hw_timestamp) {
 149                 cq_attr.mlx5.comp_mask |=
 150                                 MLX5DV_CQ_INIT_ATTR_MASK_COMPRESSED_CQE;
 151 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 152                 cq_attr.mlx5.cqe_comp_res_format =
 153                                 mlx5_rxq_mprq_enabled(rxq_data) ?
 154                                 MLX5DV_CQE_RES_FORMAT_CSUM_STRIDX :
 155                                 MLX5DV_CQE_RES_FORMAT_HASH;
 156 #else
 157                 cq_attr.mlx5.cqe_comp_res_format = MLX5DV_CQE_RES_FORMAT_HASH;
 158 #endif
 159                 /*
 160                  * For vectorized Rx, it must not be doubled in order to
 161                  * make cq_ci and rq_ci aligned.
 162                  */
 163                 if (mlx5_rxq_check_vec_support(rxq_data) < 0)
 164                         cq_attr.ibv.cqe *= 2;
 165         } else if (priv->config.cqe_comp && rxq_data->hw_timestamp) {
 166                 DRV_LOG(DEBUG,
 167                         "Port %u Rx CQE compression is disabled for HW"
 168                         " timestamp.",
 169                         dev->data->port_id);
 170         }
 171 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
 172         if (priv->config.cqe_pad) {
 173                 cq_attr.mlx5.comp_mask |= MLX5DV_CQ_INIT_ATTR_MASK_FLAGS;
 174                 cq_attr.mlx5.flags |= MLX5DV_CQ_INIT_ATTR_FLAGS_CQE_PAD;
 175         }
 176 #endif
 177         return mlx5_glue->cq_ex_to_cq(mlx5_glue->dv_create_cq(priv->sh->ctx,
 178                                                               &cq_attr.ibv,
 179                                                               &cq_attr.mlx5));
 180 }
 181
 182 /**
 183  * Create a WQ Verbs object.
 184  *
 185  * @param dev
 186  *   Pointer to Ethernet device.
 187  * @param idx
 188  *   Queue index in DPDK Rx queue array.
 189  *
 190  * @return
 191  *   The Verbs WQ object initialized, NULL otherwise and rte_errno is set.
 192  */
 193 static struct ibv_wq *
 194 mlx5_rxq_ibv_wq_create(struct rte_eth_dev *dev, uint16_t idx)
 195 {
 196         struct mlx5_priv *priv = dev->data->dev_private;
 197         struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx];
 198         struct mlx5_rxq_ctrl *rxq_ctrl =
 199                 container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
 200         struct mlx5_rxq_obj *rxq_obj = rxq_ctrl->obj;
 201         unsigned int wqe_n = 1 << rxq_data->elts_n;
 202         struct {
 203                 struct ibv_wq_init_attr ibv;
 204 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 205                 struct mlx5dv_wq_init_attr mlx5;
 206 #endif
 207         } wq_attr;
 208
 209         wq_attr.ibv = (struct ibv_wq_init_attr){
 210                 .wq_context = NULL, /* Could be useful in the future. */
 211                 .wq_type = IBV_WQT_RQ,
 212                 /* Max number of outstanding WRs. */
 213                 .max_wr = wqe_n >> rxq_data->sges_n,
 214                 /* Max number of scatter/gather elements in a WR. */
 215                 .max_sge = 1 << rxq_data->sges_n,
 216                 .pd = priv->sh->pd,
 217                 .cq = rxq_obj->ibv_cq,
 218                 .comp_mask = IBV_WQ_FLAGS_CVLAN_STRIPPING | 0,
 219                 .create_flags = (rxq_data->vlan_strip ?
 220                                  IBV_WQ_FLAGS_CVLAN_STRIPPING : 0),
 221         };
 222         /* By default, FCS (CRC) is stripped by hardware. */
 223         if (rxq_data->crc_present) {
 224                 wq_attr.ibv.create_flags |= IBV_WQ_FLAGS_SCATTER_FCS;
 225                 wq_attr.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS;
 226         }
 227         if (priv->config.hw_padding) {
 228 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
 229                 wq_attr.ibv.create_flags |= IBV_WQ_FLAG_RX_END_PADDING;
 230                 wq_attr.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS;
 231 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
 232                 wq_attr.ibv.create_flags |= IBV_WQ_FLAGS_PCI_WRITE_END_PADDING;
 233                 wq_attr.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS;
 234 #endif
 235         }
 236 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 237         wq_attr.mlx5 = (struct mlx5dv_wq_init_attr){
 238                 .comp_mask = 0,
 239         };
 240         if (mlx5_rxq_mprq_enabled(rxq_data)) {
 241                 struct mlx5dv_striding_rq_init_attr *mprq_attr =
 242                                                 &wq_attr.mlx5.striding_rq_attrs;
 243
 244                 wq_attr.mlx5.comp_mask |= MLX5DV_WQ_INIT_ATTR_MASK_STRIDING_RQ;
 245                 *mprq_attr = (struct mlx5dv_striding_rq_init_attr){
 246                         .single_stride_log_num_of_bytes = rxq_data->strd_sz_n,
 247                         .single_wqe_log_num_of_strides = rxq_data->strd_num_n,
 248                         .two_byte_shift_en = MLX5_MPRQ_TWO_BYTE_SHIFT,
 249                 };
 250         }
 251         rxq_obj->wq = mlx5_glue->dv_create_wq(priv->sh->ctx, &wq_attr.ibv,
 252                                               &wq_attr.mlx5);
 253 #else
 254         rxq_obj->wq = mlx5_glue->create_wq(priv->sh->ctx, &wq_attr.ibv);
 255 #endif
 256         if (rxq_obj->wq) {
 257                 /*
 258                  * Make sure number of WRs*SGEs match expectations since a queue
 259                  * cannot allocate more than "desc" buffers.
 260                  */
 261                 if (wq_attr.ibv.max_wr != (wqe_n >> rxq_data->sges_n) ||
 262                     wq_attr.ibv.max_sge != (1u << rxq_data->sges_n)) {
 263                         DRV_LOG(ERR,
 264                                 "Port %u Rx queue %u requested %u*%u but got"
 265                                 " %u*%u WRs*SGEs.",
 266                                 dev->data->port_id, idx,
 267                                 wqe_n >> rxq_data->sges_n,
 268                                 (1 << rxq_data->sges_n),
 269                                 wq_attr.ibv.max_wr, wq_attr.ibv.max_sge);
 270                         claim_zero(mlx5_glue->destroy_wq(rxq_obj->wq));
 271                         rxq_obj->wq = NULL;
 272                         rte_errno = EINVAL;
 273                 }
 274         }
 275         return rxq_obj->wq;
 276 }
 277
 278 /**
 279  * Create the Rx queue Verbs object.
 280  *
 281  * @param dev
 282  *   Pointer to Ethernet device.
 283  * @param idx
 284  *   Queue index in DPDK Rx queue array.
 285  *
 286  * @return
 287  *   0 on success, a negative errno value otherwise and rte_errno is set.
 288  */
 289 static int
 290 mlx5_rxq_ibv_obj_new(struct rte_eth_dev *dev, uint16_t idx)
 291 {
 292         struct mlx5_priv *priv = dev->data->dev_private;
 293         struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx];
 294         struct mlx5_rxq_ctrl *rxq_ctrl =
 295                 container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
 296         struct mlx5_rxq_obj *tmpl = rxq_ctrl->obj;
 297         struct mlx5dv_cq cq_info;
 298         struct mlx5dv_rwq rwq;
 299         int ret = 0;
 300         struct mlx5dv_obj obj;
 301
 302         MLX5_ASSERT(rxq_data);
 303         MLX5_ASSERT(tmpl);
 304         priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_RX_QUEUE;
 305         priv->verbs_alloc_ctx.obj = rxq_ctrl;
 306         tmpl->type = MLX5_RXQ_OBJ_TYPE_IBV;
 307         tmpl->rxq_ctrl = rxq_ctrl;
 308         if (rxq_ctrl->irq) {
 309                 tmpl->ibv_channel =
 310                                 mlx5_glue->create_comp_channel(priv->sh->ctx);
 311                 if (!tmpl->ibv_channel) {
 312                         DRV_LOG(ERR, "Port %u: comp channel creation failure.",
 313                                 dev->data->port_id);
 314                         rte_errno = ENOMEM;
 315                         goto error;
 316                 }
 317                 tmpl->fd = ((struct ibv_comp_channel *)(tmpl->ibv_channel))->fd;
 318         }
 319         /* Create CQ using Verbs API. */
 320         tmpl->ibv_cq = mlx5_rxq_ibv_cq_create(dev, idx);
 321         if (!tmpl->ibv_cq) {
 322                 DRV_LOG(ERR, "Port %u Rx queue %u CQ creation failure.",
 323                         dev->data->port_id, idx);
 324                 rte_errno = ENOMEM;
 325                 goto error;
 326         }
 327         obj.cq.in = tmpl->ibv_cq;
 328         obj.cq.out = &cq_info;
 329         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_CQ);
 330         if (ret) {
 331                 rte_errno = ret;
 332                 goto error;
 333         }
 334         if (cq_info.cqe_size != RTE_CACHE_LINE_SIZE) {
 335                 DRV_LOG(ERR,
 336                         "Port %u wrong MLX5_CQE_SIZE environment "
 337                         "variable value: it should be set to %u.",
 338                         dev->data->port_id, RTE_CACHE_LINE_SIZE);
 339                 rte_errno = EINVAL;
 340                 goto error;
 341         }
 342         /* Fill the rings. */
 343         rxq_data->cqe_n = log2above(cq_info.cqe_cnt);
 344         rxq_data->cq_db = cq_info.dbrec;
 345         rxq_data->cqes = (volatile struct mlx5_cqe (*)[])(uintptr_t)cq_info.buf;
 346         rxq_data->cq_uar = cq_info.cq_uar;
 347         rxq_data->cqn = cq_info.cqn;
 348         /* Create WQ (RQ) using Verbs API. */
 349         tmpl->wq = mlx5_rxq_ibv_wq_create(dev, idx);
 350         if (!tmpl->wq) {
 351                 DRV_LOG(ERR, "Port %u Rx queue %u WQ creation failure.",
 352                         dev->data->port_id, idx);
 353                 rte_errno = ENOMEM;
 354                 goto error;
 355         }
 356         /* Change queue state to ready. */
 357         ret = mlx5_ibv_modify_wq(tmpl, true);
 358         if (ret) {
 359                 DRV_LOG(ERR,
 360                         "Port %u Rx queue %u WQ state to IBV_WQS_RDY failed.",
 361                         dev->data->port_id, idx);
 362                 rte_errno = ret;
 363                 goto error;
 364         }
 365         obj.rwq.in = tmpl->wq;
 366         obj.rwq.out = &rwq;
 367         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_RWQ);
 368         if (ret) {
 369                 rte_errno = ret;
 370                 goto error;
 371         }
 372         rxq_data->wqes = rwq.buf;
 373         rxq_data->rq_db = rwq.dbrec;
 374         rxq_data->cq_arm_sn = 0;
 375         mlx5_rxq_initialize(rxq_data);
 376         rxq_data->cq_ci = 0;
 377         priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_NONE;
 378         dev->data->rx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STARTED;
 379         rxq_ctrl->wqn = ((struct ibv_wq *)(tmpl->wq))->wq_num;
 380         return 0;
 381 error:
 382         ret = rte_errno; /* Save rte_errno before cleanup. */
 383         if (tmpl->wq)
 384                 claim_zero(mlx5_glue->destroy_wq(tmpl->wq));
 385         if (tmpl->ibv_cq)
 386                 claim_zero(mlx5_glue->destroy_cq(tmpl->ibv_cq));
 387         if (tmpl->ibv_channel)
 388                 claim_zero(mlx5_glue->destroy_comp_channel(tmpl->ibv_channel));
 389         rte_errno = ret; /* Restore rte_errno. */
 390         priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_NONE;
 391         return -rte_errno;
 392 }
 393
 394 /**
 395  * Release an Rx verbs queue object.
 396  *
 397  * @param rxq_obj
 398  *   Verbs Rx queue object.
 399  */
 400 static void
 401 mlx5_rxq_ibv_obj_release(struct mlx5_rxq_obj *rxq_obj)
 402 {
 403         MLX5_ASSERT(rxq_obj);
 404         MLX5_ASSERT(rxq_obj->wq);
 405         MLX5_ASSERT(rxq_obj->ibv_cq);
 406         claim_zero(mlx5_glue->destroy_wq(rxq_obj->wq));
 407         claim_zero(mlx5_glue->destroy_cq(rxq_obj->ibv_cq));
 408         if (rxq_obj->ibv_channel)
 409                 claim_zero(mlx5_glue->destroy_comp_channel
 410                                                         (rxq_obj->ibv_channel));
 411 }
 412
 413 /**
 414  * Get event for an Rx verbs queue object.
 415  *
 416  * @param rxq_obj
 417  *   Verbs Rx queue object.
 418  *
 419  * @return
 420  *   0 on success, a negative errno value otherwise and rte_errno is set.
 421  */
 422 static int
 423 mlx5_rx_ibv_get_event(struct mlx5_rxq_obj *rxq_obj)
 424 {
 425         struct ibv_cq *ev_cq;
 426         void *ev_ctx;
 427         int ret = mlx5_glue->get_cq_event(rxq_obj->ibv_channel,
 428                                           &ev_cq, &ev_ctx);
 429
 430         if (ret < 0 || ev_cq != rxq_obj->ibv_cq)
 431                 goto exit;
 432         mlx5_glue->ack_cq_events(rxq_obj->ibv_cq, 1);
 433         return 0;
 434 exit:
 435         if (ret < 0)
 436                 rte_errno = errno;
 437         else
 438                 rte_errno = EINVAL;
 439         return -rte_errno;
 440 }
 441
 442 /**
 443  * Create an indirection table.
 444  *
 445  * @param dev
 446  *   Pointer to Ethernet device.
 447  * @param queues
 448  *   Queues entering in the indirection table.
 449  * @param queues_n
 450  *   Number of queues in the array.
 451  *
 452  * @return
 453  *   The Verbs object initialized, NULL otherwise and rte_errno is set.
 454  */
 455 static struct mlx5_ind_table_obj *
 456 mlx5_ibv_ind_table_obj_new(struct rte_eth_dev *dev, const uint16_t *queues,
 457                            uint32_t queues_n)
 458 {
 459         struct mlx5_priv *priv = dev->data->dev_private;
 460         struct mlx5_ind_table_obj *ind_tbl;
 461         const unsigned int wq_n = rte_is_power_of_2(queues_n) ?
 462                                   log2above(queues_n) :
 463                                   log2above(priv->config.ind_table_max_size);
 464         struct ibv_wq *wq[1 << wq_n];
 465         unsigned int i = 0, j = 0, k = 0;
 466
 467         ind_tbl = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*ind_tbl) +
 468                               queues_n * sizeof(uint16_t), 0, SOCKET_ID_ANY);
 469         if (!ind_tbl) {
 470                 rte_errno = ENOMEM;
 471                 return NULL;
 472         }
 473         for (i = 0; i != queues_n; ++i) {
 474                 struct mlx5_rxq_ctrl *rxq = mlx5_rxq_get(dev, queues[i]);
 475                 if (!rxq)
 476                         goto error;
 477                 wq[i] = rxq->obj->wq;
 478                 ind_tbl->queues[i] = queues[i];
 479         }
 480         ind_tbl->queues_n = queues_n;
 481         /* Finalise indirection table. */
 482         k = i; /* Retain value of i for use in error case. */
 483         for (j = 0; k != (unsigned int)(1 << wq_n); ++k, ++j)
 484                 wq[k] = wq[j];
 485         ind_tbl->ind_table = mlx5_glue->create_rwq_ind_table(priv->sh->ctx,
 486                                         &(struct ibv_rwq_ind_table_init_attr){
 487                                                 .log_ind_tbl_size = wq_n,
 488                                                 .ind_tbl = wq,
 489                                                 .comp_mask = 0,
 490                                         });
 491         if (!ind_tbl->ind_table) {
 492                 rte_errno = errno;
 493                 goto error;
 494         }
 495         rte_atomic32_inc(&ind_tbl->refcnt);
 496         LIST_INSERT_HEAD(&priv->ind_tbls, ind_tbl, next);
 497         return ind_tbl;
 498 error:
 499         for (j = 0; j < i; j++)
 500                 mlx5_rxq_release(dev, ind_tbl->queues[j]);
 501         mlx5_free(ind_tbl);
 502         DEBUG("Port %u cannot create indirection table.", dev->data->port_id);
 503         return NULL;
 504 }
 505
 506 /**
 507  * Destroys the specified Indirection Table.
 508  *
 509  * @param ind_table
 510  *   Indirection table to release.
 511  */
 512 static void
 513 mlx5_ibv_ind_table_obj_destroy(struct mlx5_ind_table_obj *ind_tbl)
 514 {
 515         claim_zero(mlx5_glue->destroy_rwq_ind_table(ind_tbl->ind_table));
 516 }
 517
 518 /**
 519  * Create an Rx Hash queue.
 520  *
 521  * @param dev
 522  *   Pointer to Ethernet device.
 523  * @param rss_key
 524  *   RSS key for the Rx hash queue.
 525  * @param rss_key_len
 526  *   RSS key length.
 527  * @param hash_fields
 528  *   Verbs protocol hash field to make the RSS on.
 529  * @param queues
 530  *   Queues entering in hash queue. In case of empty hash_fields only the
 531  *   first queue index will be taken for the indirection table.
 532  * @param queues_n
 533  *   Number of queues.
 534  * @param tunnel
 535  *   Tunnel type.
 536  *
 537  * @return
 538  *   The Verbs object initialized index, 0 otherwise and rte_errno is set.
 539  */
 540 static uint32_t
 541 mlx5_ibv_hrxq_new(struct rte_eth_dev *dev,
 542                   const uint8_t *rss_key, uint32_t rss_key_len,
 543                   uint64_t hash_fields,
 544                   const uint16_t *queues, uint32_t queues_n,
 545                   int tunnel __rte_unused)
 546 {
 547         struct mlx5_priv *priv = dev->data->dev_private;
 548         struct mlx5_hrxq *hrxq = NULL;
 549         uint32_t hrxq_idx = 0;
 550         struct ibv_qp *qp = NULL;
 551         struct mlx5_ind_table_obj *ind_tbl;
 552         int err;
 553
 554         queues_n = hash_fields ? queues_n : 1;
 555         ind_tbl = mlx5_ind_table_obj_get(dev, queues, queues_n);
 556         if (!ind_tbl)
 557                 ind_tbl = priv->obj_ops->ind_table_obj_new(dev, queues,
 558                                                            queues_n);
 559         if (!ind_tbl) {
 560                 rte_errno = ENOMEM;
 561                 return 0;
 562         }
 563 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 564         struct mlx5dv_qp_init_attr qp_init_attr;
 565
 566         memset(&qp_init_attr, 0, sizeof(qp_init_attr));
 567         if (tunnel) {
 568                 qp_init_attr.comp_mask =
 569                                        MLX5DV_QP_INIT_ATTR_MASK_QP_CREATE_FLAGS;
 570                 qp_init_attr.create_flags = MLX5DV_QP_CREATE_TUNNEL_OFFLOADS;
 571         }
 572 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 573         if (dev->data->dev_conf.lpbk_mode) {
 574                 /* Allow packet sent from NIC loop back w/o source MAC check. */
 575                 qp_init_attr.comp_mask |=
 576                                 MLX5DV_QP_INIT_ATTR_MASK_QP_CREATE_FLAGS;
 577                 qp_init_attr.create_flags |=
 578                                 MLX5DV_QP_CREATE_TIR_ALLOW_SELF_LOOPBACK_UC;
 579         }
 580 #endif
 581         qp = mlx5_glue->dv_create_qp
 582                         (priv->sh->ctx,
 583                          &(struct ibv_qp_init_attr_ex){
 584                                 .qp_type = IBV_QPT_RAW_PACKET,
 585                                 .comp_mask =
 586                                         IBV_QP_INIT_ATTR_PD |
 587                                         IBV_QP_INIT_ATTR_IND_TABLE |
 588                                         IBV_QP_INIT_ATTR_RX_HASH,
 589                                 .rx_hash_conf = (struct ibv_rx_hash_conf){
 590                                         .rx_hash_function =
 591                                                 IBV_RX_HASH_FUNC_TOEPLITZ,
 592                                         .rx_hash_key_len = rss_key_len,
 593                                         .rx_hash_key =
 594                                                 (void *)(uintptr_t)rss_key,
 595                                         .rx_hash_fields_mask = hash_fields,
 596                                 },
 597                                 .rwq_ind_tbl = ind_tbl->ind_table,
 598                                 .pd = priv->sh->pd,
 599                           },
 600                           &qp_init_attr);
 601 #else
 602         qp = mlx5_glue->create_qp_ex
 603                         (priv->sh->ctx,
 604                          &(struct ibv_qp_init_attr_ex){
 605                                 .qp_type = IBV_QPT_RAW_PACKET,
 606                                 .comp_mask =
 607                                         IBV_QP_INIT_ATTR_PD |
 608                                         IBV_QP_INIT_ATTR_IND_TABLE |
 609                                         IBV_QP_INIT_ATTR_RX_HASH,
 610                                 .rx_hash_conf = (struct ibv_rx_hash_conf){
 611                                         .rx_hash_function =
 612                                                 IBV_RX_HASH_FUNC_TOEPLITZ,
 613                                         .rx_hash_key_len = rss_key_len,
 614                                         .rx_hash_key =
 615                                                 (void *)(uintptr_t)rss_key,
 616                                         .rx_hash_fields_mask = hash_fields,
 617                                 },
 618                                 .rwq_ind_tbl = ind_tbl->ind_table,
 619                                 .pd = priv->sh->pd,
 620                          });
 621 #endif
 622         if (!qp) {
 623                 rte_errno = errno;
 624                 goto error;
 625         }
 626         hrxq = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_HRXQ], &hrxq_idx);
 627         if (!hrxq)
 628                 goto error;
 629         hrxq->ind_table = ind_tbl;
 630         hrxq->qp = qp;
 631 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 632         hrxq->action = mlx5_glue->dv_create_flow_action_dest_ibv_qp(hrxq->qp);
 633         if (!hrxq->action) {
 634                 rte_errno = errno;
 635                 goto error;
 636         }
 637 #endif
 638         hrxq->rss_key_len = rss_key_len;
 639         hrxq->hash_fields = hash_fields;
 640         memcpy(hrxq->rss_key, rss_key, rss_key_len);
 641         rte_atomic32_inc(&hrxq->refcnt);
 642         ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_HRXQ], &priv->hrxqs, hrxq_idx,
 643                      hrxq, next);
 644         return hrxq_idx;
 645 error:
 646         err = rte_errno; /* Save rte_errno before cleanup. */
 647         mlx5_ind_table_obj_release(dev, ind_tbl);
 648         if (qp)
 649                 claim_zero(mlx5_glue->destroy_qp(qp));
 650         if (hrxq)
 651                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_HRXQ], hrxq_idx);
 652         rte_errno = err; /* Restore rte_errno. */
 653         return 0;
 654 }
 655
 656 /**
 657  * Destroy a Verbs queue pair.
 658  *
 659  * @param hrxq
 660  *   Hash Rx queue to release its qp.
 661  */
 662 static void
 663 mlx5_ibv_qp_destroy(struct mlx5_hrxq *hrxq)
 664 {
 665         claim_zero(mlx5_glue->destroy_qp(hrxq->qp));
 666 }
 667
 668 struct mlx5_obj_ops ibv_obj_ops = {
 669         .rxq_obj_modify_vlan_strip = mlx5_rxq_obj_modify_wq_vlan_strip,
 670         .rxq_obj_new = mlx5_rxq_ibv_obj_new,
 671         .rxq_event_get = mlx5_rx_ibv_get_event,
 672         .rxq_obj_modify = mlx5_ibv_modify_wq,
 673         .rxq_obj_release = mlx5_rxq_ibv_obj_release,
 674         .ind_table_obj_new = mlx5_ibv_ind_table_obj_new,
 675         .ind_table_obj_destroy = mlx5_ibv_ind_table_obj_destroy,
 676         .hrxq_new = mlx5_ibv_hrxq_new,
 677         .hrxq_destroy = mlx5_ibv_qp_destroy,
 678 };