1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
16 #include <linux/rtnetlink.h>
19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
21 #pragma GCC diagnostic ignored "-Wpedantic"
23 #include <infiniband/verbs.h>
25 #pragma GCC diagnostic error "-Wpedantic"
28 #include <rte_malloc.h>
29 #include <rte_ethdev_driver.h>
30 #include <rte_ethdev_pci.h>
32 #include <rte_bus_pci.h>
33 #include <rte_common.h>
34 #include <rte_config.h>
35 #include <rte_kvargs.h>
36 #include <rte_rwlock.h>
37 #include <rte_spinlock.h>
38 #include <rte_string_fns.h>
39 #include <rte_alarm.h>
42 #include "mlx5_utils.h"
43 #include "mlx5_rxtx.h"
44 #include "mlx5_autoconf.h"
45 #include "mlx5_defs.h"
46 #include "mlx5_glue.h"
48 #include "mlx5_flow.h"
50 /* Device parameter to enable RX completion queue compression. */
51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
53 /* Device parameter to enable RX completion entry padding to 128B. */
54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
56 /* Device parameter to enable padding Rx packet to cacheline size. */
57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
59 /* Device parameter to enable Multi-Packet Rx queue. */
60 #define MLX5_RX_MPRQ_EN "mprq_en"
62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
71 /* Device parameter to configure inline send. Deprecated, ignored.*/
72 #define MLX5_TXQ_INLINE "txq_inline"
74 /* Device parameter to limit packet size to inline with ordinary SEND. */
75 #define MLX5_TXQ_INLINE_MAX "txq_inline_max"
77 /* Device parameter to configure minimal data size to inline. */
78 #define MLX5_TXQ_INLINE_MIN "txq_inline_min"
80 /* Device parameter to limit packet size to inline with Enhanced MPW. */
81 #define MLX5_TXQ_INLINE_MPW "txq_inline_mpw"
84 * Device parameter to configure the number of TX queues threshold for
85 * enabling inline send.
87 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
90 * Device parameter to configure the number of TX queues threshold for
91 * enabling vectorized Tx, deprecated, ignored (no vectorized Tx routines).
93 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
95 /* Device parameter to enable multi-packet send WQEs. */
96 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
99 * Device parameter to include 2 dsegs in the title WQEBB.
100 * Deprecated, ignored.
102 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
105 * Device parameter to limit the size of inlining packet.
106 * Deprecated, ignored.
108 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
111 * Device parameter to enable hardware Tx vector.
112 * Deprecated, ignored (no vectorized Tx routines anymore).
114 #define MLX5_TX_VEC_EN "tx_vec_en"
116 /* Device parameter to enable hardware Rx vector. */
117 #define MLX5_RX_VEC_EN "rx_vec_en"
119 /* Allow L3 VXLAN flow creation. */
120 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
122 /* Activate DV E-Switch flow steering. */
123 #define MLX5_DV_ESW_EN "dv_esw_en"
125 /* Activate DV flow steering. */
126 #define MLX5_DV_FLOW_EN "dv_flow_en"
128 /* Activate Netlink support in VF mode. */
129 #define MLX5_VF_NL_EN "vf_nl_en"
131 /* Enable extending memsegs when creating a MR. */
132 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
134 /* Select port representors to instantiate. */
135 #define MLX5_REPRESENTOR "representor"
137 /* Device parameter to configure the maximum number of dump files per queue. */
138 #define MLX5_MAX_DUMP_FILES_NUM "max_dump_files_num"
140 /* Configure timeout of LRO session (in microseconds). */
141 #define MLX5_LRO_TIMEOUT_USEC "lro_timeout_usec"
143 #ifndef HAVE_IBV_MLX5_MOD_MPW
144 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
145 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
148 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
149 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
152 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
154 /* Shared memory between primary and secondary processes. */
155 struct mlx5_shared_data *mlx5_shared_data;
157 /* Spinlock for mlx5_shared_data allocation. */
158 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
160 /* Process local data for secondary processes. */
161 static struct mlx5_local_data mlx5_local_data;
163 /** Driver-specific log messages type. */
166 /** Data associated with devices to spawn. */
167 struct mlx5_dev_spawn_data {
168 uint32_t ifindex; /**< Network interface index. */
169 uint32_t max_port; /**< IB device maximal port index. */
170 uint32_t ibv_port; /**< IB device physical port index. */
171 struct mlx5_switch_info info; /**< Switch information. */
172 struct ibv_device *ibv_dev; /**< Associated IB device. */
173 struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
174 struct rte_pci_device *pci_dev; /**< Backend PCI device. */
177 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
178 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
181 * Initialize the counters management structure.
184 * Pointer to mlx5_ibv_shared object to free
187 mlx5_flow_counters_mng_init(struct mlx5_ibv_shared *sh)
191 TAILQ_INIT(&sh->cmng.flow_counters);
192 for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i)
193 TAILQ_INIT(&sh->cmng.ccont[i].pool_list);
197 * Destroy all the resources allocated for a counter memory management.
200 * Pointer to the memory management structure.
203 mlx5_flow_destroy_counter_stat_mem_mng(struct mlx5_counter_stats_mem_mng *mng)
205 uint8_t *mem = (uint8_t *)(uintptr_t)mng->raws[0].data;
207 LIST_REMOVE(mng, next);
208 claim_zero(mlx5_devx_cmd_destroy(mng->dm));
209 claim_zero(mlx5_glue->devx_umem_dereg(mng->umem));
214 * Close and release all the resources of the counters management.
217 * Pointer to mlx5_ibv_shared object to free.
220 mlx5_flow_counters_mng_close(struct mlx5_ibv_shared *sh)
222 struct mlx5_counter_stats_mem_mng *mng;
229 rte_eal_alarm_cancel(mlx5_flow_query_alarm, sh);
230 if (rte_errno != EINPROGRESS)
234 for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i) {
235 struct mlx5_flow_counter_pool *pool;
236 uint32_t batch = !!(i % 2);
238 if (!sh->cmng.ccont[i].pools)
240 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
245 (mlx5_devx_cmd_destroy(pool->min_dcs));
247 for (j = 0; j < MLX5_COUNTERS_PER_POOL; ++j) {
248 if (pool->counters_raw[j].action)
250 (mlx5_glue->destroy_flow_action
251 (pool->counters_raw[j].action));
252 if (!batch && pool->counters_raw[j].dcs)
253 claim_zero(mlx5_devx_cmd_destroy
254 (pool->counters_raw[j].dcs));
256 TAILQ_REMOVE(&sh->cmng.ccont[i].pool_list, pool,
259 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
261 rte_free(sh->cmng.ccont[i].pools);
263 mng = LIST_FIRST(&sh->cmng.mem_mngs);
265 mlx5_flow_destroy_counter_stat_mem_mng(mng);
266 mng = LIST_FIRST(&sh->cmng.mem_mngs);
268 memset(&sh->cmng, 0, sizeof(sh->cmng));
272 * Extract pdn of PD object using DV API.
275 * Pointer to the verbs PD object.
277 * Pointer to the PD object number variable.
280 * 0 on success, error value otherwise.
282 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
284 mlx5_get_pdn(struct ibv_pd *pd __rte_unused, uint32_t *pdn __rte_unused)
286 struct mlx5dv_obj obj;
287 struct mlx5dv_pd pd_info;
291 obj.pd.out = &pd_info;
292 ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
294 DRV_LOG(DEBUG, "Fail to get PD object info");
300 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
303 * Allocate shared IB device context. If there is multiport device the
304 * master and representors will share this context, if there is single
305 * port dedicated IB device, the context will be used by only given
306 * port due to unification.
308 * Routine first searches the context for the specified IB device name,
309 * if found the shared context assumed and reference counter is incremented.
310 * If no context found the new one is created and initialized with specified
311 * IB device context and parameters.
314 * Pointer to the IB device attributes (name, port, etc).
317 * Pointer to mlx5_ibv_shared object on success,
318 * otherwise NULL and rte_errno is set.
320 static struct mlx5_ibv_shared *
321 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
323 struct mlx5_ibv_shared *sh;
328 /* Secondary process should not create the shared context. */
329 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
330 pthread_mutex_lock(&mlx5_ibv_list_mutex);
331 /* Search for IB context by device name. */
332 LIST_FOREACH(sh, &mlx5_ibv_list, next) {
333 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
338 /* No device found, we have to create new shared context. */
339 assert(spawn->max_port);
340 sh = rte_zmalloc("ethdev shared ib context",
341 sizeof(struct mlx5_ibv_shared) +
343 sizeof(struct mlx5_ibv_shared_port),
344 RTE_CACHE_LINE_SIZE);
346 DRV_LOG(ERR, "shared context allocation failure");
350 /* Try to open IB device with DV first, then usual Verbs. */
352 sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
355 DRV_LOG(DEBUG, "DevX is supported");
357 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
359 err = errno ? errno : ENODEV;
362 DRV_LOG(DEBUG, "DevX is NOT supported");
364 err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
366 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
370 sh->max_port = spawn->max_port;
371 strncpy(sh->ibdev_name, sh->ctx->device->name,
372 sizeof(sh->ibdev_name));
373 strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
374 sizeof(sh->ibdev_path));
375 sh->pci_dev = spawn->pci_dev;
376 pthread_mutex_init(&sh->intr_mutex, NULL);
378 * Setting port_id to max unallowed value means
379 * there is no interrupt subhandler installed for
380 * the given port index i.
382 for (i = 0; i < sh->max_port; i++)
383 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
384 sh->pd = mlx5_glue->alloc_pd(sh->ctx);
385 if (sh->pd == NULL) {
386 DRV_LOG(ERR, "PD allocation failure");
390 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
391 err = mlx5_get_pdn(sh->pd, &sh->pdn);
393 DRV_LOG(ERR, "Fail to extract pdn from PD");
396 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
398 * Once the device is added to the list of memory event
399 * callback, its global MR cache table cannot be expanded
400 * on the fly because of deadlock. If it overflows, lookup
401 * should be done by searching MR list linearly, which is slow.
403 * At this point the device is not added to the memory
404 * event list yet, context is just being created.
406 err = mlx5_mr_btree_init(&sh->mr.cache,
407 MLX5_MR_BTREE_CACHE_N * 2,
408 sh->pci_dev->device.numa_node);
413 mlx5_flow_counters_mng_init(sh);
414 /* Add device to memory callback list. */
415 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
416 LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
418 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
419 /* Add context to the global device list. */
420 LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
422 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
425 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
428 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
430 claim_zero(mlx5_glue->close_device(sh->ctx));
438 * Free shared IB device context. Decrement counter and if zero free
439 * all allocated resources and close handles.
442 * Pointer to mlx5_ibv_shared object to free
445 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
447 pthread_mutex_lock(&mlx5_ibv_list_mutex);
449 /* Check the object presence in the list. */
450 struct mlx5_ibv_shared *lctx;
452 LIST_FOREACH(lctx, &mlx5_ibv_list, next)
457 DRV_LOG(ERR, "Freeing non-existing shared IB context");
463 /* Secondary process should not free the shared context. */
464 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
467 /* Release created Memory Regions. */
469 /* Remove from memory callback device list. */
470 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
471 LIST_REMOVE(sh, mem_event_cb);
472 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
473 /* Remove context from the global device list. */
474 LIST_REMOVE(sh, next);
476 * Ensure there is no async event handler installed.
477 * Only primary process handles async device events.
479 mlx5_flow_counters_mng_close(sh);
480 assert(!sh->intr_cnt);
482 mlx5_intr_callback_unregister
483 (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
484 pthread_mutex_destroy(&sh->intr_mutex);
486 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
488 claim_zero(mlx5_glue->close_device(sh->ctx));
491 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
495 * Initialize DR related data within private structure.
496 * Routine checks the reference counter and does actual
497 * resources creation/initialization only if counter is zero.
500 * Pointer to the private device data structure.
503 * Zero on success, positive error code otherwise.
506 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
508 #ifdef HAVE_MLX5DV_DR
509 struct mlx5_ibv_shared *sh = priv->sh;
515 /* Shared DV/DR structures is already initialized. */
520 /* Reference counter is zero, we should initialize structures. */
521 domain = mlx5_glue->dr_create_domain(sh->ctx,
522 MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
524 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
528 sh->rx_domain = domain;
529 domain = mlx5_glue->dr_create_domain(sh->ctx,
530 MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
532 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
536 pthread_mutex_init(&sh->dv_mutex, NULL);
537 sh->tx_domain = domain;
538 #ifdef HAVE_MLX5DV_DR_ESWITCH
539 if (priv->config.dv_esw_en) {
540 domain = mlx5_glue->dr_create_domain
541 (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
543 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
547 sh->fdb_domain = domain;
548 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
551 sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
557 /* Rollback the created objects. */
559 mlx5_glue->dr_destroy_domain(sh->rx_domain);
560 sh->rx_domain = NULL;
563 mlx5_glue->dr_destroy_domain(sh->tx_domain);
564 sh->tx_domain = NULL;
566 if (sh->fdb_domain) {
567 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
568 sh->fdb_domain = NULL;
570 if (sh->esw_drop_action) {
571 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
572 sh->esw_drop_action = NULL;
574 if (sh->pop_vlan_action) {
575 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
576 sh->pop_vlan_action = NULL;
586 * Destroy DR related data within private structure.
589 * Pointer to the private device data structure.
592 mlx5_free_shared_dr(struct mlx5_priv *priv)
594 #ifdef HAVE_MLX5DV_DR
595 struct mlx5_ibv_shared *sh;
597 if (!priv->dr_shared)
602 assert(sh->dv_refcnt);
603 if (sh->dv_refcnt && --sh->dv_refcnt)
606 mlx5_glue->dr_destroy_domain(sh->rx_domain);
607 sh->rx_domain = NULL;
610 mlx5_glue->dr_destroy_domain(sh->tx_domain);
611 sh->tx_domain = NULL;
613 #ifdef HAVE_MLX5DV_DR_ESWITCH
614 if (sh->fdb_domain) {
615 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
616 sh->fdb_domain = NULL;
618 if (sh->esw_drop_action) {
619 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
620 sh->esw_drop_action = NULL;
623 if (sh->pop_vlan_action) {
624 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
625 sh->pop_vlan_action = NULL;
627 pthread_mutex_destroy(&sh->dv_mutex);
634 * Initialize shared data between primary and secondary process.
636 * A memzone is reserved by primary process and secondary processes attach to
640 * 0 on success, a negative errno value otherwise and rte_errno is set.
643 mlx5_init_shared_data(void)
645 const struct rte_memzone *mz;
648 rte_spinlock_lock(&mlx5_shared_data_lock);
649 if (mlx5_shared_data == NULL) {
650 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
651 /* Allocate shared memory. */
652 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
653 sizeof(*mlx5_shared_data),
657 "Cannot allocate mlx5 shared data\n");
661 mlx5_shared_data = mz->addr;
662 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
663 rte_spinlock_init(&mlx5_shared_data->lock);
665 /* Lookup allocated shared memory. */
666 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
669 "Cannot attach mlx5 shared data\n");
673 mlx5_shared_data = mz->addr;
674 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
678 rte_spinlock_unlock(&mlx5_shared_data_lock);
683 * Retrieve integer value from environment variable.
686 * Environment variable name.
689 * Integer value, 0 if the variable is not set.
692 mlx5_getenv_int(const char *name)
694 const char *val = getenv(name);
702 * Verbs callback to allocate a memory. This function should allocate the space
703 * according to the size provided residing inside a huge page.
704 * Please note that all allocation must respect the alignment from libmlx5
705 * (i.e. currently sysconf(_SC_PAGESIZE)).
708 * The size in bytes of the memory to allocate.
710 * A pointer to the callback data.
713 * Allocated buffer, NULL otherwise and rte_errno is set.
716 mlx5_alloc_verbs_buf(size_t size, void *data)
718 struct mlx5_priv *priv = data;
720 size_t alignment = sysconf(_SC_PAGESIZE);
721 unsigned int socket = SOCKET_ID_ANY;
723 if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
724 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
726 socket = ctrl->socket;
727 } else if (priv->verbs_alloc_ctx.type ==
728 MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
729 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
731 socket = ctrl->socket;
733 assert(data != NULL);
734 ret = rte_malloc_socket(__func__, size, alignment, socket);
741 * Verbs callback to free a memory.
744 * A pointer to the memory to free.
746 * A pointer to the callback data.
749 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
751 assert(data != NULL);
756 * DPDK callback to add udp tunnel port
759 * A pointer to eth_dev
760 * @param[in] udp_tunnel
761 * A pointer to udp tunnel
764 * 0 on valid udp ports and tunnels, -ENOTSUP otherwise.
767 mlx5_udp_tunnel_port_add(struct rte_eth_dev *dev __rte_unused,
768 struct rte_eth_udp_tunnel *udp_tunnel)
770 assert(udp_tunnel != NULL);
771 if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN &&
772 udp_tunnel->udp_port == 4789)
774 if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN_GPE &&
775 udp_tunnel->udp_port == 4790)
781 * Initialize process private data structure.
784 * Pointer to Ethernet device structure.
787 * 0 on success, a negative errno value otherwise and rte_errno is set.
790 mlx5_proc_priv_init(struct rte_eth_dev *dev)
792 struct mlx5_priv *priv = dev->data->dev_private;
793 struct mlx5_proc_priv *ppriv;
797 * UAR register table follows the process private structure. BlueFlame
798 * registers for Tx queues are stored in the table.
801 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
802 ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
803 RTE_CACHE_LINE_SIZE, dev->device->numa_node);
808 ppriv->uar_table_sz = ppriv_size;
809 dev->process_private = ppriv;
814 * Un-initialize process private data structure.
817 * Pointer to Ethernet device structure.
820 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
822 if (!dev->process_private)
824 rte_free(dev->process_private);
825 dev->process_private = NULL;
829 * DPDK callback to close the device.
831 * Destroy all queues and objects, free memory.
834 * Pointer to Ethernet device structure.
837 mlx5_dev_close(struct rte_eth_dev *dev)
839 struct mlx5_priv *priv = dev->data->dev_private;
843 DRV_LOG(DEBUG, "port %u closing device \"%s\"",
845 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
846 /* In case mlx5_dev_stop() has not been called. */
847 mlx5_dev_interrupt_handler_uninstall(dev);
848 mlx5_traffic_disable(dev);
849 mlx5_flow_flush(dev, NULL);
850 /* Prevent crashes when queues are still in use. */
851 dev->rx_pkt_burst = removed_rx_burst;
852 dev->tx_pkt_burst = removed_tx_burst;
854 /* Disable datapath on secondary process. */
855 mlx5_mp_req_stop_rxtx(dev);
856 if (priv->rxqs != NULL) {
857 /* XXX race condition if mlx5_rx_burst() is still running. */
859 for (i = 0; (i != priv->rxqs_n); ++i)
860 mlx5_rxq_release(dev, i);
864 if (priv->txqs != NULL) {
865 /* XXX race condition if mlx5_tx_burst() is still running. */
867 for (i = 0; (i != priv->txqs_n); ++i)
868 mlx5_txq_release(dev, i);
872 mlx5_proc_priv_uninit(dev);
873 mlx5_mprq_free_mp(dev);
874 mlx5_free_shared_dr(priv);
875 if (priv->rss_conf.rss_key != NULL)
876 rte_free(priv->rss_conf.rss_key);
877 if (priv->reta_idx != NULL)
878 rte_free(priv->reta_idx);
880 mlx5_nl_mac_addr_flush(dev);
881 if (priv->nl_socket_route >= 0)
882 close(priv->nl_socket_route);
883 if (priv->nl_socket_rdma >= 0)
884 close(priv->nl_socket_rdma);
885 if (priv->vmwa_context)
886 mlx5_vlan_vmwa_exit(priv->vmwa_context);
889 * Free the shared context in last turn, because the cleanup
890 * routines above may use some shared fields, like
891 * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
892 * ifindex if Netlink fails.
894 mlx5_free_shared_ibctx(priv->sh);
897 ret = mlx5_hrxq_verify(dev);
899 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
901 ret = mlx5_ind_table_obj_verify(dev);
903 DRV_LOG(WARNING, "port %u some indirection table still remain",
905 ret = mlx5_rxq_obj_verify(dev);
907 DRV_LOG(WARNING, "port %u some Rx queue objects still remain",
909 ret = mlx5_rxq_verify(dev);
911 DRV_LOG(WARNING, "port %u some Rx queues still remain",
913 ret = mlx5_txq_ibv_verify(dev);
915 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
917 ret = mlx5_txq_verify(dev);
919 DRV_LOG(WARNING, "port %u some Tx queues still remain",
921 ret = mlx5_flow_verify(dev);
923 DRV_LOG(WARNING, "port %u some flows still remain",
925 if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
929 RTE_ETH_FOREACH_DEV_OF(port_id, dev->device) {
930 struct mlx5_priv *opriv =
931 rte_eth_devices[port_id].data->dev_private;
934 opriv->domain_id != priv->domain_id ||
935 &rte_eth_devices[port_id] == dev)
940 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
942 memset(priv, 0, sizeof(*priv));
943 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
945 * Reset mac_addrs to NULL such that it is not freed as part of
946 * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
947 * it is freed when dev_private is freed.
949 dev->data->mac_addrs = NULL;
952 const struct eth_dev_ops mlx5_dev_ops = {
953 .dev_configure = mlx5_dev_configure,
954 .dev_start = mlx5_dev_start,
955 .dev_stop = mlx5_dev_stop,
956 .dev_set_link_down = mlx5_set_link_down,
957 .dev_set_link_up = mlx5_set_link_up,
958 .dev_close = mlx5_dev_close,
959 .promiscuous_enable = mlx5_promiscuous_enable,
960 .promiscuous_disable = mlx5_promiscuous_disable,
961 .allmulticast_enable = mlx5_allmulticast_enable,
962 .allmulticast_disable = mlx5_allmulticast_disable,
963 .link_update = mlx5_link_update,
964 .stats_get = mlx5_stats_get,
965 .stats_reset = mlx5_stats_reset,
966 .xstats_get = mlx5_xstats_get,
967 .xstats_reset = mlx5_xstats_reset,
968 .xstats_get_names = mlx5_xstats_get_names,
969 .fw_version_get = mlx5_fw_version_get,
970 .dev_infos_get = mlx5_dev_infos_get,
971 .read_clock = mlx5_read_clock,
972 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
973 .vlan_filter_set = mlx5_vlan_filter_set,
974 .rx_queue_setup = mlx5_rx_queue_setup,
975 .tx_queue_setup = mlx5_tx_queue_setup,
976 .rx_queue_release = mlx5_rx_queue_release,
977 .tx_queue_release = mlx5_tx_queue_release,
978 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
979 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
980 .mac_addr_remove = mlx5_mac_addr_remove,
981 .mac_addr_add = mlx5_mac_addr_add,
982 .mac_addr_set = mlx5_mac_addr_set,
983 .set_mc_addr_list = mlx5_set_mc_addr_list,
984 .mtu_set = mlx5_dev_set_mtu,
985 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
986 .vlan_offload_set = mlx5_vlan_offload_set,
987 .reta_update = mlx5_dev_rss_reta_update,
988 .reta_query = mlx5_dev_rss_reta_query,
989 .rss_hash_update = mlx5_rss_hash_update,
990 .rss_hash_conf_get = mlx5_rss_hash_conf_get,
991 .filter_ctrl = mlx5_dev_filter_ctrl,
992 .rx_descriptor_status = mlx5_rx_descriptor_status,
993 .tx_descriptor_status = mlx5_tx_descriptor_status,
994 .rx_queue_count = mlx5_rx_queue_count,
995 .rx_queue_intr_enable = mlx5_rx_intr_enable,
996 .rx_queue_intr_disable = mlx5_rx_intr_disable,
997 .is_removed = mlx5_is_removed,
998 .udp_tunnel_port_add = mlx5_udp_tunnel_port_add,
1001 /* Available operations from secondary process. */
1002 static const struct eth_dev_ops mlx5_dev_sec_ops = {
1003 .stats_get = mlx5_stats_get,
1004 .stats_reset = mlx5_stats_reset,
1005 .xstats_get = mlx5_xstats_get,
1006 .xstats_reset = mlx5_xstats_reset,
1007 .xstats_get_names = mlx5_xstats_get_names,
1008 .fw_version_get = mlx5_fw_version_get,
1009 .dev_infos_get = mlx5_dev_infos_get,
1010 .rx_descriptor_status = mlx5_rx_descriptor_status,
1011 .tx_descriptor_status = mlx5_tx_descriptor_status,
1014 /* Available operations in flow isolated mode. */
1015 const struct eth_dev_ops mlx5_dev_ops_isolate = {
1016 .dev_configure = mlx5_dev_configure,
1017 .dev_start = mlx5_dev_start,
1018 .dev_stop = mlx5_dev_stop,
1019 .dev_set_link_down = mlx5_set_link_down,
1020 .dev_set_link_up = mlx5_set_link_up,
1021 .dev_close = mlx5_dev_close,
1022 .promiscuous_enable = mlx5_promiscuous_enable,
1023 .promiscuous_disable = mlx5_promiscuous_disable,
1024 .allmulticast_enable = mlx5_allmulticast_enable,
1025 .allmulticast_disable = mlx5_allmulticast_disable,
1026 .link_update = mlx5_link_update,
1027 .stats_get = mlx5_stats_get,
1028 .stats_reset = mlx5_stats_reset,
1029 .xstats_get = mlx5_xstats_get,
1030 .xstats_reset = mlx5_xstats_reset,
1031 .xstats_get_names = mlx5_xstats_get_names,
1032 .fw_version_get = mlx5_fw_version_get,
1033 .dev_infos_get = mlx5_dev_infos_get,
1034 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1035 .vlan_filter_set = mlx5_vlan_filter_set,
1036 .rx_queue_setup = mlx5_rx_queue_setup,
1037 .tx_queue_setup = mlx5_tx_queue_setup,
1038 .rx_queue_release = mlx5_rx_queue_release,
1039 .tx_queue_release = mlx5_tx_queue_release,
1040 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1041 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1042 .mac_addr_remove = mlx5_mac_addr_remove,
1043 .mac_addr_add = mlx5_mac_addr_add,
1044 .mac_addr_set = mlx5_mac_addr_set,
1045 .set_mc_addr_list = mlx5_set_mc_addr_list,
1046 .mtu_set = mlx5_dev_set_mtu,
1047 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1048 .vlan_offload_set = mlx5_vlan_offload_set,
1049 .filter_ctrl = mlx5_dev_filter_ctrl,
1050 .rx_descriptor_status = mlx5_rx_descriptor_status,
1051 .tx_descriptor_status = mlx5_tx_descriptor_status,
1052 .rx_queue_intr_enable = mlx5_rx_intr_enable,
1053 .rx_queue_intr_disable = mlx5_rx_intr_disable,
1054 .is_removed = mlx5_is_removed,
1058 * Verify and store value for device argument.
1061 * Key argument to verify.
1063 * Value associated with key.
1068 * 0 on success, a negative errno value otherwise and rte_errno is set.
1071 mlx5_args_check(const char *key, const char *val, void *opaque)
1073 struct mlx5_dev_config *config = opaque;
1076 /* No-op, port representors are processed in mlx5_dev_spawn(). */
1077 if (!strcmp(MLX5_REPRESENTOR, key))
1080 tmp = strtoul(val, NULL, 0);
1083 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
1086 if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
1087 config->cqe_comp = !!tmp;
1088 } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
1089 config->cqe_pad = !!tmp;
1090 } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
1091 config->hw_padding = !!tmp;
1092 } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
1093 config->mprq.enabled = !!tmp;
1094 } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
1095 config->mprq.stride_num_n = tmp;
1096 } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
1097 config->mprq.max_memcpy_len = tmp;
1098 } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
1099 config->mprq.min_rxqs_num = tmp;
1100 } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
1101 DRV_LOG(WARNING, "%s: deprecated parameter,"
1102 " converted to txq_inline_max", key);
1103 config->txq_inline_max = tmp;
1104 } else if (strcmp(MLX5_TXQ_INLINE_MAX, key) == 0) {
1105 config->txq_inline_max = tmp;
1106 } else if (strcmp(MLX5_TXQ_INLINE_MIN, key) == 0) {
1107 config->txq_inline_min = tmp;
1108 } else if (strcmp(MLX5_TXQ_INLINE_MPW, key) == 0) {
1109 config->txq_inline_mpw = tmp;
1110 } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
1111 config->txqs_inline = tmp;
1112 } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
1113 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1114 } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
1115 config->mps = !!tmp;
1116 } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
1117 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1118 } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
1119 DRV_LOG(WARNING, "%s: deprecated parameter,"
1120 " converted to txq_inline_mpw", key);
1121 config->txq_inline_mpw = tmp;
1122 } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
1123 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1124 } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
1125 config->rx_vec_en = !!tmp;
1126 } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
1127 config->l3_vxlan_en = !!tmp;
1128 } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
1129 config->vf_nl_en = !!tmp;
1130 } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
1131 config->dv_esw_en = !!tmp;
1132 } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
1133 config->dv_flow_en = !!tmp;
1134 } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
1135 config->mr_ext_memseg_en = !!tmp;
1136 } else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {
1137 config->max_dump_files_num = tmp;
1138 } else if (strcmp(MLX5_LRO_TIMEOUT_USEC, key) == 0) {
1139 config->lro.timeout = tmp;
1141 DRV_LOG(WARNING, "%s: unknown parameter", key);
1149 * Parse device parameters.
1152 * Pointer to device configuration structure.
1154 * Device arguments structure.
1157 * 0 on success, a negative errno value otherwise and rte_errno is set.
1160 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
1162 const char **params = (const char *[]){
1163 MLX5_RXQ_CQE_COMP_EN,
1164 MLX5_RXQ_CQE_PAD_EN,
1165 MLX5_RXQ_PKT_PAD_EN,
1167 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
1168 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
1171 MLX5_TXQ_INLINE_MIN,
1172 MLX5_TXQ_INLINE_MAX,
1173 MLX5_TXQ_INLINE_MPW,
1174 MLX5_TXQS_MIN_INLINE,
1177 MLX5_TXQ_MPW_HDR_DSEG_EN,
1178 MLX5_TXQ_MAX_INLINE_LEN,
1185 MLX5_MR_EXT_MEMSEG_EN,
1187 MLX5_MAX_DUMP_FILES_NUM,
1188 MLX5_LRO_TIMEOUT_USEC,
1191 struct rte_kvargs *kvlist;
1195 if (devargs == NULL)
1197 /* Following UGLY cast is done to pass checkpatch. */
1198 kvlist = rte_kvargs_parse(devargs->args, params);
1199 if (kvlist == NULL) {
1203 /* Process parameters. */
1204 for (i = 0; (params[i] != NULL); ++i) {
1205 if (rte_kvargs_count(kvlist, params[i])) {
1206 ret = rte_kvargs_process(kvlist, params[i],
1207 mlx5_args_check, config);
1210 rte_kvargs_free(kvlist);
1215 rte_kvargs_free(kvlist);
1219 static struct rte_pci_driver mlx5_driver;
1222 * PMD global initialization.
1224 * Independent from individual device, this function initializes global
1225 * per-PMD data structures distinguishing primary and secondary processes.
1226 * Hence, each initialization is called once per a process.
1229 * 0 on success, a negative errno value otherwise and rte_errno is set.
1232 mlx5_init_once(void)
1234 struct mlx5_shared_data *sd;
1235 struct mlx5_local_data *ld = &mlx5_local_data;
1238 if (mlx5_init_shared_data())
1240 sd = mlx5_shared_data;
1242 rte_spinlock_lock(&sd->lock);
1243 switch (rte_eal_process_type()) {
1244 case RTE_PROC_PRIMARY:
1247 LIST_INIT(&sd->mem_event_cb_list);
1248 rte_rwlock_init(&sd->mem_event_rwlock);
1249 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1250 mlx5_mr_mem_event_cb, NULL);
1251 ret = mlx5_mp_init_primary();
1254 sd->init_done = true;
1256 case RTE_PROC_SECONDARY:
1259 ret = mlx5_mp_init_secondary();
1262 ++sd->secondary_cnt;
1263 ld->init_done = true;
1269 rte_spinlock_unlock(&sd->lock);
1274 * Configures the minimal amount of data to inline into WQE
1275 * while sending packets.
1277 * - the txq_inline_min has the maximal priority, if this
1278 * key is specified in devargs
1279 * - if DevX is enabled the inline mode is queried from the
1280 * device (HCA attributes and NIC vport context if needed).
1281 * - otherwise L2 mode (18 bytes) is assumed for ConnectX-4/4LX
1282 * and none (0 bytes) for other NICs
1285 * Verbs device parameters (name, port, switch_info) to spawn.
1287 * Device configuration parameters.
1290 mlx5_set_min_inline(struct mlx5_dev_spawn_data *spawn,
1291 struct mlx5_dev_config *config)
1293 if (config->txq_inline_min != MLX5_ARG_UNSET) {
1294 /* Application defines size of inlined data explicitly. */
1295 switch (spawn->pci_dev->id.device_id) {
1296 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1297 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1298 if (config->txq_inline_min <
1299 (int)MLX5_INLINE_HSIZE_L2) {
1301 "txq_inline_mix aligned to minimal"
1302 " ConnectX-4 required value %d",
1303 (int)MLX5_INLINE_HSIZE_L2);
1304 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1310 if (config->hca_attr.eth_net_offloads) {
1311 /* We have DevX enabled, inline mode queried successfully. */
1312 switch (config->hca_attr.wqe_inline_mode) {
1313 case MLX5_CAP_INLINE_MODE_L2:
1314 /* outer L2 header must be inlined. */
1315 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1317 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
1318 /* No inline data are required by NIC. */
1319 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1320 config->hw_vlan_insert =
1321 config->hca_attr.wqe_vlan_insert;
1322 DRV_LOG(DEBUG, "Tx VLAN insertion is supported");
1324 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
1325 /* inline mode is defined by NIC vport context. */
1326 if (!config->hca_attr.eth_virt)
1328 switch (config->hca_attr.vport_inline_mode) {
1329 case MLX5_INLINE_MODE_NONE:
1330 config->txq_inline_min =
1331 MLX5_INLINE_HSIZE_NONE;
1333 case MLX5_INLINE_MODE_L2:
1334 config->txq_inline_min =
1335 MLX5_INLINE_HSIZE_L2;
1337 case MLX5_INLINE_MODE_IP:
1338 config->txq_inline_min =
1339 MLX5_INLINE_HSIZE_L3;
1341 case MLX5_INLINE_MODE_TCP_UDP:
1342 config->txq_inline_min =
1343 MLX5_INLINE_HSIZE_L4;
1345 case MLX5_INLINE_MODE_INNER_L2:
1346 config->txq_inline_min =
1347 MLX5_INLINE_HSIZE_INNER_L2;
1349 case MLX5_INLINE_MODE_INNER_IP:
1350 config->txq_inline_min =
1351 MLX5_INLINE_HSIZE_INNER_L3;
1353 case MLX5_INLINE_MODE_INNER_TCP_UDP:
1354 config->txq_inline_min =
1355 MLX5_INLINE_HSIZE_INNER_L4;
1361 * We get here if we are unable to deduce
1362 * inline data size with DevX. Try PCI ID
1363 * to determine old NICs.
1365 switch (spawn->pci_dev->id.device_id) {
1366 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1367 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1368 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LX:
1369 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1370 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1371 config->hw_vlan_insert = 0;
1373 case PCI_DEVICE_ID_MELLANOX_CONNECTX5:
1374 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1375 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EX:
1376 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1378 * These NICs support VLAN insertion from WQE and
1379 * report the wqe_vlan_insert flag. But there is the bug
1380 * and PFC control may be broken, so disable feature.
1382 config->hw_vlan_insert = 0;
1383 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1386 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1390 DRV_LOG(DEBUG, "min tx inline configured: %d", config->txq_inline_min);
1394 * Allocate page of door-bells and register it using DevX API.
1397 * Pointer to Ethernet device.
1400 * Pointer to new page on success, NULL otherwise.
1402 static struct mlx5_devx_dbr_page *
1403 mlx5_alloc_dbr_page(struct rte_eth_dev *dev)
1405 struct mlx5_priv *priv = dev->data->dev_private;
1406 struct mlx5_devx_dbr_page *page;
1408 /* Allocate space for door-bell page and management data. */
1409 page = rte_calloc_socket(__func__, 1, sizeof(struct mlx5_devx_dbr_page),
1410 RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1412 DRV_LOG(ERR, "port %u cannot allocate dbr page",
1413 dev->data->port_id);
1416 /* Register allocated memory. */
1417 page->umem = mlx5_glue->devx_umem_reg(priv->sh->ctx, page->dbrs,
1418 MLX5_DBR_PAGE_SIZE, 0);
1420 DRV_LOG(ERR, "port %u cannot umem reg dbr page",
1421 dev->data->port_id);
1429 * Find the next available door-bell, allocate new page if needed.
1432 * Pointer to Ethernet device.
1433 * @param [out] dbr_page
1434 * Door-bell page containing the page data.
1437 * Door-bell address offset on success, a negative error value otherwise.
1440 mlx5_get_dbr(struct rte_eth_dev *dev, struct mlx5_devx_dbr_page **dbr_page)
1442 struct mlx5_priv *priv = dev->data->dev_private;
1443 struct mlx5_devx_dbr_page *page = NULL;
1446 LIST_FOREACH(page, &priv->dbrpgs, next)
1447 if (page->dbr_count < MLX5_DBR_PER_PAGE)
1449 if (!page) { /* No page with free door-bell exists. */
1450 page = mlx5_alloc_dbr_page(dev);
1451 if (!page) /* Failed to allocate new page. */
1453 LIST_INSERT_HEAD(&priv->dbrpgs, page, next);
1455 /* Loop to find bitmap part with clear bit. */
1457 i < MLX5_DBR_BITMAP_SIZE && page->dbr_bitmap[i] == UINT64_MAX;
1460 /* Find the first clear bit. */
1461 j = rte_bsf64(~page->dbr_bitmap[i]);
1462 assert(i < (MLX5_DBR_PER_PAGE / 64));
1463 page->dbr_bitmap[i] |= (1 << j);
1466 return (((i * 64) + j) * sizeof(uint64_t));
1470 * Release a door-bell record.
1473 * Pointer to Ethernet device.
1474 * @param [in] umem_id
1475 * UMEM ID of page containing the door-bell record to release.
1476 * @param [in] offset
1477 * Offset of door-bell record in page.
1480 * 0 on success, a negative error value otherwise.
1483 mlx5_release_dbr(struct rte_eth_dev *dev, uint32_t umem_id, uint64_t offset)
1485 struct mlx5_priv *priv = dev->data->dev_private;
1486 struct mlx5_devx_dbr_page *page = NULL;
1489 LIST_FOREACH(page, &priv->dbrpgs, next)
1490 /* Find the page this address belongs to. */
1491 if (page->umem->umem_id == umem_id)
1496 if (!page->dbr_count) {
1497 /* Page not used, free it and remove from list. */
1498 LIST_REMOVE(page, next);
1500 ret = -mlx5_glue->devx_umem_dereg(page->umem);
1503 /* Mark in bitmap that this door-bell is not in use. */
1504 offset /= MLX5_DBR_SIZE;
1505 int i = offset / 64;
1506 int j = offset % 64;
1508 page->dbr_bitmap[i] &= ~(1 << j);
1514 * Spawn an Ethernet device from Verbs information.
1517 * Backing DPDK device.
1519 * Verbs device parameters (name, port, switch_info) to spawn.
1521 * Device configuration parameters.
1524 * A valid Ethernet device object on success, NULL otherwise and rte_errno
1525 * is set. The following errors are defined:
1527 * EBUSY: device is not supposed to be spawned.
1528 * EEXIST: device is already spawned
1530 static struct rte_eth_dev *
1531 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1532 struct mlx5_dev_spawn_data *spawn,
1533 struct mlx5_dev_config config)
1535 const struct mlx5_switch_info *switch_info = &spawn->info;
1536 struct mlx5_ibv_shared *sh = NULL;
1537 struct ibv_port_attr port_attr;
1538 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1539 struct rte_eth_dev *eth_dev = NULL;
1540 struct mlx5_priv *priv = NULL;
1542 unsigned int hw_padding = 0;
1544 unsigned int cqe_comp;
1545 unsigned int cqe_pad = 0;
1546 unsigned int tunnel_en = 0;
1547 unsigned int mpls_en = 0;
1548 unsigned int swp = 0;
1549 unsigned int mprq = 0;
1550 unsigned int mprq_min_stride_size_n = 0;
1551 unsigned int mprq_max_stride_size_n = 0;
1552 unsigned int mprq_min_stride_num_n = 0;
1553 unsigned int mprq_max_stride_num_n = 0;
1554 struct rte_ether_addr mac;
1555 char name[RTE_ETH_NAME_MAX_LEN];
1556 int own_domain_id = 0;
1560 /* Determine if this port representor is supposed to be spawned. */
1561 if (switch_info->representor && dpdk_dev->devargs) {
1562 struct rte_eth_devargs eth_da;
1564 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da);
1567 DRV_LOG(ERR, "failed to process device arguments: %s",
1568 strerror(rte_errno));
1571 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1572 if (eth_da.representor_ports[i] ==
1573 (uint16_t)switch_info->port_name)
1575 if (i == eth_da.nb_representor_ports) {
1580 /* Build device name. */
1581 if (!switch_info->representor)
1582 strlcpy(name, dpdk_dev->name, sizeof(name));
1584 snprintf(name, sizeof(name), "%s_representor_%u",
1585 dpdk_dev->name, switch_info->port_name);
1586 /* check if the device is already spawned */
1587 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1591 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1592 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1593 eth_dev = rte_eth_dev_attach_secondary(name);
1594 if (eth_dev == NULL) {
1595 DRV_LOG(ERR, "can not attach rte ethdev");
1599 eth_dev->device = dpdk_dev;
1600 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1601 err = mlx5_proc_priv_init(eth_dev);
1604 /* Receive command fd from primary process */
1605 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1608 /* Remap UAR for Tx queues. */
1609 err = mlx5_tx_uar_init_secondary(eth_dev, err);
1613 * Ethdev pointer is still required as input since
1614 * the primary device is not accessible from the
1615 * secondary process.
1617 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1618 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1621 sh = mlx5_alloc_shared_ibctx(spawn);
1624 config.devx = sh->devx;
1625 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
1626 config.dest_tir = 1;
1628 #ifdef HAVE_IBV_MLX5_MOD_SWP
1629 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1632 * Multi-packet send is supported by ConnectX-4 Lx PF as well
1633 * as all ConnectX-5 devices.
1635 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1636 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1638 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1639 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1641 mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1642 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1643 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1644 DRV_LOG(DEBUG, "enhanced MPW is supported");
1645 mps = MLX5_MPW_ENHANCED;
1647 DRV_LOG(DEBUG, "MPW is supported");
1651 DRV_LOG(DEBUG, "MPW isn't supported");
1652 mps = MLX5_MPW_DISABLED;
1654 #ifdef HAVE_IBV_MLX5_MOD_SWP
1655 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1656 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1657 DRV_LOG(DEBUG, "SWP support: %u", swp);
1660 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1661 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1662 struct mlx5dv_striding_rq_caps mprq_caps =
1663 dv_attr.striding_rq_caps;
1665 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1666 mprq_caps.min_single_stride_log_num_of_bytes);
1667 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1668 mprq_caps.max_single_stride_log_num_of_bytes);
1669 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1670 mprq_caps.min_single_wqe_log_num_of_strides);
1671 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1672 mprq_caps.max_single_wqe_log_num_of_strides);
1673 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1674 mprq_caps.supported_qpts);
1675 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1677 mprq_min_stride_size_n =
1678 mprq_caps.min_single_stride_log_num_of_bytes;
1679 mprq_max_stride_size_n =
1680 mprq_caps.max_single_stride_log_num_of_bytes;
1681 mprq_min_stride_num_n =
1682 mprq_caps.min_single_wqe_log_num_of_strides;
1683 mprq_max_stride_num_n =
1684 mprq_caps.max_single_wqe_log_num_of_strides;
1685 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1686 mprq_min_stride_num_n);
1689 if (RTE_CACHE_LINE_SIZE == 128 &&
1690 !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
1694 config.cqe_comp = cqe_comp;
1695 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
1696 /* Whether device supports 128B Rx CQE padding. */
1697 cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
1698 (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
1700 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1701 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1702 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1703 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1704 (dv_attr.tunnel_offloads_caps &
1705 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
1707 DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1708 tunnel_en ? "" : "not ");
1711 "tunnel offloading disabled due to old OFED/rdma-core version");
1713 config.tunnel_en = tunnel_en;
1714 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1715 mpls_en = ((dv_attr.tunnel_offloads_caps &
1716 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1717 (dv_attr.tunnel_offloads_caps &
1718 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1719 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1720 mpls_en ? "" : "not ");
1722 DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1723 " old OFED/rdma-core version or firmware configuration");
1725 config.mpls_en = mpls_en;
1726 /* Check port status. */
1727 err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
1729 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1732 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1733 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1737 if (port_attr.state != IBV_PORT_ACTIVE)
1738 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1739 mlx5_glue->port_state_str(port_attr.state),
1741 /* Allocate private eth device data. */
1742 priv = rte_zmalloc("ethdev private structure",
1744 RTE_CACHE_LINE_SIZE);
1746 DRV_LOG(ERR, "priv allocation failure");
1751 priv->ibv_port = spawn->ibv_port;
1752 priv->mtu = RTE_ETHER_MTU;
1754 /* Initialize UAR access locks for 32bit implementations. */
1755 rte_spinlock_init(&priv->uar_lock_cq);
1756 for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1757 rte_spinlock_init(&priv->uar_lock[i]);
1759 /* Some internal functions rely on Netlink sockets, open them now. */
1760 priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1761 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1763 priv->representor = !!switch_info->representor;
1764 priv->master = !!switch_info->master;
1765 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1767 * Currently we support single E-Switch per PF configurations
1768 * only and vport_id field contains the vport index for
1769 * associated VF, which is deduced from representor port name.
1770 * For example, let's have the IB device port 10, it has
1771 * attached network device eth0, which has port name attribute
1772 * pf0vf2, we can deduce the VF number as 2, and set vport index
1773 * as 3 (2+1). This assigning schema should be changed if the
1774 * multiple E-Switch instances per PF configurations or/and PCI
1775 * subfunctions are added.
1777 priv->vport_id = switch_info->representor ?
1778 switch_info->port_name + 1 : -1;
1779 /* representor_id field keeps the unmodified port/VF index. */
1780 priv->representor_id = switch_info->representor ?
1781 switch_info->port_name : -1;
1783 * Look for sibling devices in order to reuse their switch domain
1784 * if any, otherwise allocate one.
1786 RTE_ETH_FOREACH_DEV_OF(port_id, dpdk_dev) {
1787 const struct mlx5_priv *opriv =
1788 rte_eth_devices[port_id].data->dev_private;
1792 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1794 priv->domain_id = opriv->domain_id;
1797 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1798 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1801 DRV_LOG(ERR, "unable to allocate switch domain: %s",
1802 strerror(rte_errno));
1807 err = mlx5_args(&config, dpdk_dev->devargs);
1810 DRV_LOG(ERR, "failed to process device arguments: %s",
1811 strerror(rte_errno));
1814 config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1815 IBV_DEVICE_RAW_IP_CSUM);
1816 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1817 (config.hw_csum ? "" : "not "));
1818 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1819 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1820 DRV_LOG(DEBUG, "counters are not supported");
1822 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
1823 if (config.dv_flow_en) {
1824 DRV_LOG(WARNING, "DV flow is not supported");
1825 config.dv_flow_en = 0;
1828 config.ind_table_max_size =
1829 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
1831 * Remove this check once DPDK supports larger/variable
1832 * indirection tables.
1834 if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1835 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1836 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1837 config.ind_table_max_size);
1838 config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1839 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1840 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1841 (config.hw_vlan_strip ? "" : "not "));
1842 config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1843 IBV_RAW_PACKET_CAP_SCATTER_FCS);
1844 DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1845 (config.hw_fcs_strip ? "" : "not "));
1846 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1847 hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1848 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1849 hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1850 IBV_DEVICE_PCI_WRITE_END_PADDING);
1852 if (config.hw_padding && !hw_padding) {
1853 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1854 config.hw_padding = 0;
1855 } else if (config.hw_padding) {
1856 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1858 config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
1859 (sh->device_attr.tso_caps.supported_qpts &
1860 (1 << IBV_QPT_RAW_PACKET)));
1862 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
1864 * MPW is disabled by default, while the Enhanced MPW is enabled
1867 if (config.mps == MLX5_ARG_UNSET)
1868 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1871 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
1872 DRV_LOG(INFO, "%sMPS is %s",
1873 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
1874 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1875 if (config.cqe_comp && !cqe_comp) {
1876 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1877 config.cqe_comp = 0;
1879 if (config.cqe_pad && !cqe_pad) {
1880 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1882 } else if (config.cqe_pad) {
1883 DRV_LOG(INFO, "Rx CQE padding is enabled");
1886 priv->counter_fallback = 0;
1887 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
1892 if (!config.hca_attr.flow_counters_dump)
1893 priv->counter_fallback = 1;
1894 #ifndef HAVE_IBV_DEVX_ASYNC
1895 priv->counter_fallback = 1;
1897 if (priv->counter_fallback)
1898 DRV_LOG(INFO, "Use fall-back DV counter management\n");
1899 /* Check for LRO support. */
1900 if (config.dest_tir && config.hca_attr.lro_cap) {
1901 /* TBD check tunnel lro caps. */
1902 config.lro.supported = config.hca_attr.lro_cap;
1903 DRV_LOG(DEBUG, "Device supports LRO");
1905 * If LRO timeout is not configured by application,
1906 * use the minimal supported value.
1908 if (!config.lro.timeout)
1909 config.lro.timeout =
1910 config.hca_attr.lro_timer_supported_periods[0];
1911 DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1912 config.lro.timeout);
1915 if (config.mprq.enabled && mprq) {
1916 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
1917 config.mprq.stride_num_n < mprq_min_stride_num_n) {
1918 config.mprq.stride_num_n =
1919 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1920 mprq_min_stride_num_n);
1922 "the number of strides"
1923 " for Multi-Packet RQ is out of range,"
1924 " setting default value (%u)",
1925 1 << config.mprq.stride_num_n);
1927 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
1928 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
1929 } else if (config.mprq.enabled && !mprq) {
1930 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1931 config.mprq.enabled = 0;
1933 if (config.max_dump_files_num == 0)
1934 config.max_dump_files_num = 128;
1935 eth_dev = rte_eth_dev_allocate(name);
1936 if (eth_dev == NULL) {
1937 DRV_LOG(ERR, "can not allocate rte ethdev");
1941 /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1942 eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1943 if (priv->representor) {
1944 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1945 eth_dev->data->representor_id = priv->representor_id;
1948 * Store associated network device interface index. This index
1949 * is permanent throughout the lifetime of device. So, we may store
1950 * the ifindex here and use the cached value further.
1952 assert(spawn->ifindex);
1953 priv->if_index = spawn->ifindex;
1954 eth_dev->data->dev_private = priv;
1955 priv->dev_data = eth_dev->data;
1956 eth_dev->data->mac_addrs = priv->mac;
1957 eth_dev->device = dpdk_dev;
1958 /* Configure the first MAC address by default. */
1959 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1961 "port %u cannot get MAC address, is mlx5_en"
1962 " loaded? (errno: %s)",
1963 eth_dev->data->port_id, strerror(rte_errno));
1968 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1969 eth_dev->data->port_id,
1970 mac.addr_bytes[0], mac.addr_bytes[1],
1971 mac.addr_bytes[2], mac.addr_bytes[3],
1972 mac.addr_bytes[4], mac.addr_bytes[5]);
1975 char ifname[IF_NAMESIZE];
1977 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1978 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1979 eth_dev->data->port_id, ifname);
1981 DRV_LOG(DEBUG, "port %u ifname is unknown",
1982 eth_dev->data->port_id);
1985 /* Get actual MTU if possible. */
1986 err = mlx5_get_mtu(eth_dev, &priv->mtu);
1991 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1993 /* Initialize burst functions to prevent crashes before link-up. */
1994 eth_dev->rx_pkt_burst = removed_rx_burst;
1995 eth_dev->tx_pkt_burst = removed_tx_burst;
1996 eth_dev->dev_ops = &mlx5_dev_ops;
1997 /* Register MAC address. */
1998 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1999 if (config.vf && config.vf_nl_en)
2000 mlx5_nl_mac_addr_sync(eth_dev);
2001 TAILQ_INIT(&priv->flows);
2002 TAILQ_INIT(&priv->ctrl_flows);
2003 /* Hint libmlx5 to use PMD allocator for data plane resources */
2004 struct mlx5dv_ctx_allocators alctr = {
2005 .alloc = &mlx5_alloc_verbs_buf,
2006 .free = &mlx5_free_verbs_buf,
2009 mlx5_glue->dv_set_context_attr(sh->ctx,
2010 MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
2011 (void *)((uintptr_t)&alctr));
2012 /* Bring Ethernet device up. */
2013 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
2014 eth_dev->data->port_id);
2015 mlx5_set_link_up(eth_dev);
2017 * Even though the interrupt handler is not installed yet,
2018 * interrupts will still trigger on the async_fd from
2019 * Verbs context returned by ibv_open_device().
2021 mlx5_link_update(eth_dev, 0);
2022 #ifdef HAVE_MLX5DV_DR_ESWITCH
2023 if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
2024 (switch_info->representor || switch_info->master)))
2025 config.dv_esw_en = 0;
2027 config.dv_esw_en = 0;
2029 /* Detect minimal data bytes to inline. */
2030 mlx5_set_min_inline(spawn, &config);
2031 /* Store device configuration on private structure. */
2032 priv->config = config;
2033 /* Create context for virtual machine VLAN workaround. */
2034 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
2035 if (config.dv_flow_en) {
2036 err = mlx5_alloc_shared_dr(priv);
2040 /* Supported Verbs flow priority number detection. */
2041 err = mlx5_flow_discover_priorities(eth_dev);
2046 priv->config.flow_prio = err;
2051 mlx5_free_shared_dr(priv);
2052 if (priv->nl_socket_route >= 0)
2053 close(priv->nl_socket_route);
2054 if (priv->nl_socket_rdma >= 0)
2055 close(priv->nl_socket_rdma);
2056 if (priv->vmwa_context)
2057 mlx5_vlan_vmwa_exit(priv->vmwa_context);
2059 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
2061 if (eth_dev != NULL)
2062 eth_dev->data->dev_private = NULL;
2064 if (eth_dev != NULL) {
2065 /* mac_addrs must not be freed alone because part of dev_private */
2066 eth_dev->data->mac_addrs = NULL;
2067 rte_eth_dev_release_port(eth_dev);
2070 mlx5_free_shared_ibctx(sh);
2077 * Comparison callback to sort device data.
2079 * This is meant to be used with qsort().
2082 * Pointer to pointer to first data object.
2084 * Pointer to pointer to second data object.
2087 * 0 if both objects are equal, less than 0 if the first argument is less
2088 * than the second, greater than 0 otherwise.
2091 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
2093 const struct mlx5_switch_info *si_a =
2094 &((const struct mlx5_dev_spawn_data *)a)->info;
2095 const struct mlx5_switch_info *si_b =
2096 &((const struct mlx5_dev_spawn_data *)b)->info;
2099 /* Master device first. */
2100 ret = si_b->master - si_a->master;
2103 /* Then representor devices. */
2104 ret = si_b->representor - si_a->representor;
2107 /* Unidentified devices come last in no specific order. */
2108 if (!si_a->representor)
2110 /* Order representors by name. */
2111 return si_a->port_name - si_b->port_name;
2115 * DPDK callback to register a PCI device.
2117 * This function spawns Ethernet devices out of a given PCI device.
2119 * @param[in] pci_drv
2120 * PCI driver structure (mlx5_driver).
2121 * @param[in] pci_dev
2122 * PCI device information.
2125 * 0 on success, a negative errno value otherwise and rte_errno is set.
2128 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2129 struct rte_pci_device *pci_dev)
2131 struct ibv_device **ibv_list;
2133 * Number of found IB Devices matching with requested PCI BDF.
2134 * nd != 1 means there are multiple IB devices over the same
2135 * PCI device and we have representors and master.
2137 unsigned int nd = 0;
2139 * Number of found IB device Ports. nd = 1 and np = 1..n means
2140 * we have the single multiport IB device, and there may be
2141 * representors attached to some of found ports.
2143 unsigned int np = 0;
2145 * Number of DPDK ethernet devices to Spawn - either over
2146 * multiple IB devices or multiple ports of single IB device.
2147 * Actually this is the number of iterations to spawn.
2149 unsigned int ns = 0;
2150 struct mlx5_dev_config dev_config;
2153 ret = mlx5_init_once();
2155 DRV_LOG(ERR, "unable to init PMD global data: %s",
2156 strerror(rte_errno));
2159 assert(pci_drv == &mlx5_driver);
2161 ibv_list = mlx5_glue->get_device_list(&ret);
2163 rte_errno = errno ? errno : ENOSYS;
2164 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
2168 * First scan the list of all Infiniband devices to find
2169 * matching ones, gathering into the list.
2171 struct ibv_device *ibv_match[ret + 1];
2177 struct rte_pci_addr pci_addr;
2179 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
2180 if (mlx5_ibv_device_to_pci_addr(ibv_list[ret], &pci_addr))
2182 if (pci_dev->addr.domain != pci_addr.domain ||
2183 pci_dev->addr.bus != pci_addr.bus ||
2184 pci_dev->addr.devid != pci_addr.devid ||
2185 pci_dev->addr.function != pci_addr.function)
2187 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2188 ibv_list[ret]->name);
2189 ibv_match[nd++] = ibv_list[ret];
2191 ibv_match[nd] = NULL;
2193 /* No device matches, just complain and bail out. */
2194 mlx5_glue->free_device_list(ibv_list);
2196 "no Verbs device matches PCI device " PCI_PRI_FMT ","
2197 " are kernel drivers loaded?",
2198 pci_dev->addr.domain, pci_dev->addr.bus,
2199 pci_dev->addr.devid, pci_dev->addr.function);
2204 nl_route = mlx5_nl_init(NETLINK_ROUTE);
2205 nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2208 * Found single matching device may have multiple ports.
2209 * Each port may be representor, we have to check the port
2210 * number and check the representors existence.
2213 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2215 DRV_LOG(WARNING, "can not get IB device \"%s\""
2216 " ports number", ibv_match[0]->name);
2219 * Now we can determine the maximal
2220 * amount of devices to be spawned.
2222 struct mlx5_dev_spawn_data list[np ? np : nd];
2226 * Single IB device with multiple ports found,
2227 * it may be E-Switch master device and representors.
2228 * We have to perform identification trough the ports.
2230 assert(nl_rdma >= 0);
2233 for (i = 1; i <= np; ++i) {
2234 list[ns].max_port = np;
2235 list[ns].ibv_port = i;
2236 list[ns].ibv_dev = ibv_match[0];
2237 list[ns].eth_dev = NULL;
2238 list[ns].pci_dev = pci_dev;
2239 list[ns].ifindex = mlx5_nl_ifindex
2240 (nl_rdma, list[ns].ibv_dev->name, i);
2241 if (!list[ns].ifindex) {
2243 * No network interface index found for the
2244 * specified port, it means there is no
2245 * representor on this port. It's OK,
2246 * there can be disabled ports, for example
2247 * if sriov_numvfs < sriov_totalvfs.
2253 ret = mlx5_nl_switch_info
2257 if (ret || (!list[ns].info.representor &&
2258 !list[ns].info.master)) {
2260 * We failed to recognize representors with
2261 * Netlink, let's try to perform the task
2264 ret = mlx5_sysfs_switch_info
2268 if (!ret && (list[ns].info.representor ^
2269 list[ns].info.master))
2274 "unable to recognize master/representors"
2275 " on the IB device with multiple ports");
2282 * The existence of several matching entries (nd > 1) means
2283 * port representors have been instantiated. No existing Verbs
2284 * call nor sysfs entries can tell them apart, this can only
2285 * be done through Netlink calls assuming kernel drivers are
2286 * recent enough to support them.
2288 * In the event of identification failure through Netlink,
2289 * try again through sysfs, then:
2291 * 1. A single IB device matches (nd == 1) with single
2292 * port (np=0/1) and is not a representor, assume
2293 * no switch support.
2295 * 2. Otherwise no safe assumptions can be made;
2296 * complain louder and bail out.
2299 for (i = 0; i != nd; ++i) {
2300 memset(&list[ns].info, 0, sizeof(list[ns].info));
2301 list[ns].max_port = 1;
2302 list[ns].ibv_port = 1;
2303 list[ns].ibv_dev = ibv_match[i];
2304 list[ns].eth_dev = NULL;
2305 list[ns].pci_dev = pci_dev;
2306 list[ns].ifindex = 0;
2308 list[ns].ifindex = mlx5_nl_ifindex
2309 (nl_rdma, list[ns].ibv_dev->name, 1);
2310 if (!list[ns].ifindex) {
2311 char ifname[IF_NAMESIZE];
2314 * Netlink failed, it may happen with old
2315 * ib_core kernel driver (before 4.16).
2316 * We can assume there is old driver because
2317 * here we are processing single ports IB
2318 * devices. Let's try sysfs to retrieve
2319 * the ifindex. The method works for
2320 * master device only.
2324 * Multiple devices found, assume
2325 * representors, can not distinguish
2326 * master/representor and retrieve
2327 * ifindex via sysfs.
2331 ret = mlx5_get_master_ifname
2332 (ibv_match[i]->ibdev_path, &ifname);
2335 if_nametoindex(ifname);
2336 if (!list[ns].ifindex) {
2338 * No network interface index found
2339 * for the specified device, it means
2340 * there it is neither representor
2348 ret = mlx5_nl_switch_info
2352 if (ret || (!list[ns].info.representor &&
2353 !list[ns].info.master)) {
2355 * We failed to recognize representors with
2356 * Netlink, let's try to perform the task
2359 ret = mlx5_sysfs_switch_info
2363 if (!ret && (list[ns].info.representor ^
2364 list[ns].info.master)) {
2366 } else if ((nd == 1) &&
2367 !list[ns].info.representor &&
2368 !list[ns].info.master) {
2370 * Single IB device with
2371 * one physical port and
2372 * attached network device.
2373 * May be SRIOV is not enabled
2374 * or there is no representors.
2376 DRV_LOG(INFO, "no E-Switch support detected");
2383 "unable to recognize master/representors"
2384 " on the multiple IB devices");
2392 * Sort list to probe devices in natural order for users convenience
2393 * (i.e. master first, then representors from lowest to highest ID).
2395 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2396 /* Default configuration. */
2397 dev_config = (struct mlx5_dev_config){
2399 .mps = MLX5_ARG_UNSET,
2401 .txq_inline_max = MLX5_ARG_UNSET,
2402 .txq_inline_min = MLX5_ARG_UNSET,
2403 .txq_inline_mpw = MLX5_ARG_UNSET,
2404 .txqs_inline = MLX5_ARG_UNSET,
2406 .mr_ext_memseg_en = 1,
2408 .enabled = 0, /* Disabled by default. */
2409 .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
2410 .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
2411 .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
2415 /* Device specific configuration. */
2416 switch (pci_dev->id.device_id) {
2417 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2418 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2419 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2420 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2426 for (i = 0; i != ns; ++i) {
2429 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2432 if (!list[i].eth_dev) {
2433 if (rte_errno != EBUSY && rte_errno != EEXIST)
2435 /* Device is disabled or already spawned. Ignore it. */
2438 restore = list[i].eth_dev->data->dev_flags;
2439 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2440 /* Restore non-PCI flags cleared by the above call. */
2441 list[i].eth_dev->data->dev_flags |= restore;
2442 rte_eth_dev_probing_finish(list[i].eth_dev);
2446 "probe of PCI device " PCI_PRI_FMT " aborted after"
2447 " encountering an error: %s",
2448 pci_dev->addr.domain, pci_dev->addr.bus,
2449 pci_dev->addr.devid, pci_dev->addr.function,
2450 strerror(rte_errno));
2454 if (!list[i].eth_dev)
2456 mlx5_dev_close(list[i].eth_dev);
2457 /* mac_addrs must not be freed because in dev_private */
2458 list[i].eth_dev->data->mac_addrs = NULL;
2459 claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2461 /* Restore original error. */
2468 * Do the routine cleanup:
2469 * - close opened Netlink sockets
2470 * - free the Infiniband device list
2477 mlx5_glue->free_device_list(ibv_list);
2482 * DPDK callback to remove a PCI device.
2484 * This function removes all Ethernet devices belong to a given PCI device.
2486 * @param[in] pci_dev
2487 * Pointer to the PCI device.
2490 * 0 on success, the function cannot fail.
2493 mlx5_pci_remove(struct rte_pci_device *pci_dev)
2497 RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
2498 rte_eth_dev_close(port_id);
2502 static const struct rte_pci_id mlx5_pci_id_map[] = {
2504 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2505 PCI_DEVICE_ID_MELLANOX_CONNECTX4)
2508 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2509 PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
2512 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2513 PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
2516 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2517 PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
2520 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2521 PCI_DEVICE_ID_MELLANOX_CONNECTX5)
2524 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2525 PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
2528 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2529 PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
2532 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2533 PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
2536 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2537 PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
2540 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2541 PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
2544 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2545 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
2548 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2549 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
2556 static struct rte_pci_driver mlx5_driver = {
2558 .name = MLX5_DRIVER_NAME
2560 .id_table = mlx5_pci_id_map,
2561 .probe = mlx5_pci_probe,
2562 .remove = mlx5_pci_remove,
2563 .dma_map = mlx5_dma_map,
2564 .dma_unmap = mlx5_dma_unmap,
2565 .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
2566 RTE_PCI_DRV_PROBE_AGAIN,
2569 #ifdef RTE_IBVERBS_LINK_DLOPEN
2572 * Suffix RTE_EAL_PMD_PATH with "-glue".
2574 * This function performs a sanity check on RTE_EAL_PMD_PATH before
2575 * suffixing its last component.
2578 * Output buffer, should be large enough otherwise NULL is returned.
2583 * Pointer to @p buf or @p NULL in case suffix cannot be appended.
2586 mlx5_glue_path(char *buf, size_t size)
2588 static const char *const bad[] = { "/", ".", "..", NULL };
2589 const char *path = RTE_EAL_PMD_PATH;
2590 size_t len = strlen(path);
2594 while (len && path[len - 1] == '/')
2596 for (off = len; off && path[off - 1] != '/'; --off)
2598 for (i = 0; bad[i]; ++i)
2599 if (!strncmp(path + off, bad[i], (int)(len - off)))
2601 i = snprintf(buf, size, "%.*s-glue", (int)len, path);
2602 if (i == -1 || (size_t)i >= size)
2607 "unable to append \"-glue\" to last component of"
2608 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
2609 " please re-configure DPDK");
2614 * Initialization routine for run-time dependency on rdma-core.
2617 mlx5_glue_init(void)
2619 char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
2620 const char *path[] = {
2622 * A basic security check is necessary before trusting
2623 * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
2625 (geteuid() == getuid() && getegid() == getgid() ?
2626 getenv("MLX5_GLUE_PATH") : NULL),
2628 * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
2629 * variant, otherwise let dlopen() look up libraries on its
2632 (*RTE_EAL_PMD_PATH ?
2633 mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
2636 void *handle = NULL;
2640 while (!handle && i != RTE_DIM(path)) {
2649 end = strpbrk(path[i], ":;");
2651 end = path[i] + strlen(path[i]);
2652 len = end - path[i];
2657 ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
2659 (!len || *(end - 1) == '/') ? "" : "/");
2662 if (sizeof(name) != (size_t)ret + 1)
2664 DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
2666 handle = dlopen(name, RTLD_LAZY);
2677 DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
2680 sym = dlsym(handle, "mlx5_glue");
2681 if (!sym || !*sym) {
2685 DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
2694 "cannot initialize PMD due to missing run-time dependency on"
2695 " rdma-core libraries (libibverbs, libmlx5)");
2702 * Driver initialization routine.
2704 RTE_INIT(rte_mlx5_pmd_init)
2706 /* Initialize driver log type. */
2707 mlx5_logtype = rte_log_register("pmd.net.mlx5");
2708 if (mlx5_logtype >= 0)
2709 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
2711 /* Build the static tables for Verbs conversion. */
2712 mlx5_set_ptype_table();
2713 mlx5_set_cksum_table();
2714 mlx5_set_swp_types_table();
2716 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
2717 * huge pages. Calling ibv_fork_init() during init allows
2718 * applications to use fork() safely for purposes other than
2719 * using this PMD, which is not supported in forked processes.
2721 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
2722 /* Match the size of Rx completion entry to the size of a cacheline. */
2723 if (RTE_CACHE_LINE_SIZE == 128)
2724 setenv("MLX5_CQE_SIZE", "128", 0);
2726 * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
2727 * cleanup all the Verbs resources even when the device was removed.
2729 setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
2730 #ifdef RTE_IBVERBS_LINK_DLOPEN
2731 if (mlx5_glue_init())
2736 /* Glue structure must not contain any NULL pointers. */
2740 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
2741 assert(((const void *const *)mlx5_glue)[i]);
2744 if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
2746 "rdma-core glue \"%s\" mismatch: \"%s\" is required",
2747 mlx5_glue->version, MLX5_GLUE_VERSION);
2750 mlx5_glue->fork_init();
2751 rte_pci_register(&mlx5_driver);
2754 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
2755 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
2756 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");