drivers/net/mlx5/mlx5.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2015 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <assert.h>
  10 #include <dlfcn.h>
  11 #include <stdint.h>
  12 #include <stdlib.h>
  13 #include <errno.h>
  14 #include <net/if.h>
  15 #include <sys/mman.h>
  16 #include <linux/rtnetlink.h>
  17
  18 /* Verbs header. */
  19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  20 #ifdef PEDANTIC
  21 #pragma GCC diagnostic ignored "-Wpedantic"
  22 #endif
  23 #include <infiniband/verbs.h>
  24 #ifdef PEDANTIC
  25 #pragma GCC diagnostic error "-Wpedantic"
  26 #endif
  27
  28 #include <rte_malloc.h>
  29 #include <rte_ethdev_driver.h>
  30 #include <rte_ethdev_pci.h>
  31 #include <rte_pci.h>
  32 #include <rte_bus_pci.h>
  33 #include <rte_common.h>
  34 #include <rte_config.h>
  35 #include <rte_eal_memconfig.h>
  36 #include <rte_kvargs.h>
  37 #include <rte_rwlock.h>
  38 #include <rte_spinlock.h>
  39 #include <rte_string_fns.h>
  40
  41 #include "mlx5.h"
  42 #include "mlx5_utils.h"
  43 #include "mlx5_rxtx.h"
  44 #include "mlx5_autoconf.h"
  45 #include "mlx5_defs.h"
  46 #include "mlx5_glue.h"
  47 #include "mlx5_mr.h"
  48 #include "mlx5_flow.h"
  49
  50 /* Device parameter to enable RX completion queue compression. */
  51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
  52
  53 /* Device parameter to enable RX completion entry padding to 128B. */
  54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
  55
  56 /* Device parameter to enable padding Rx packet to cacheline size. */
  57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
  58
  59 /* Device parameter to enable Multi-Packet Rx queue. */
  60 #define MLX5_RX_MPRQ_EN "mprq_en"
  61
  62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
  63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
  64
  65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
  66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
  67
  68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
  69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
  70
  71 /* Device parameter to configure inline send. */
  72 #define MLX5_TXQ_INLINE "txq_inline"
  73
  74 /*
  75  * Device parameter to configure the number of TX queues threshold for
  76  * enabling inline send.
  77  */
  78 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
  79
  80 /*
  81  * Device parameter to configure the number of TX queues threshold for
  82  * enabling vectorized Tx.
  83  */
  84 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
  85
  86 /* Device parameter to enable multi-packet send WQEs. */
  87 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
  88
  89 /* Device parameter to include 2 dsegs in the title WQEBB. */
  90 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
  91
  92 /* Device parameter to limit the size of inlining packet. */
  93 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
  94
  95 /* Device parameter to enable hardware Tx vector. */
  96 #define MLX5_TX_VEC_EN "tx_vec_en"
  97
  98 /* Device parameter to enable hardware Rx vector. */
  99 #define MLX5_RX_VEC_EN "rx_vec_en"
 100
 101 /* Allow L3 VXLAN flow creation. */
 102 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
 103
 104 /* Activate DV flow steering. */
 105 #define MLX5_DV_FLOW_EN "dv_flow_en"
 106
 107 /* Activate Netlink support in VF mode. */
 108 #define MLX5_VF_NL_EN "vf_nl_en"
 109
 110 /* Select port representors to instantiate. */
 111 #define MLX5_REPRESENTOR "representor"
 112
 113 #ifndef HAVE_IBV_MLX5_MOD_MPW
 114 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
 115 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
 116 #endif
 117
 118 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
 119 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
 120 #endif
 121
 122 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
 123
 124 /* Shared memory between primary and secondary processes. */
 125 struct mlx5_shared_data *mlx5_shared_data;
 126
 127 /* Spinlock for mlx5_shared_data allocation. */
 128 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
 129
 130 /* Process local data for secondary processes. */
 131 static struct mlx5_local_data mlx5_local_data;
 132
 133 /** Driver-specific log messages type. */
 134 int mlx5_logtype;
 135
 136 /** Data associated with devices to spawn. */
 137 struct mlx5_dev_spawn_data {
 138         uint32_t ifindex; /**< Network interface index. */
 139         uint32_t max_port; /**< IB device maximal port index. */
 140         uint32_t ibv_port; /**< IB device physical port index. */
 141         struct mlx5_switch_info info; /**< Switch information. */
 142         struct ibv_device *ibv_dev; /**< Associated IB device. */
 143         struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
 144 };
 145
 146 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
 147 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
 148
 149 /**
 150  * Allocate shared IB device context. If there is multiport device the
 151  * master and representors will share this context, if there is single
 152  * port dedicated IB device, the context will be used by only given
 153  * port due to unification.
 154  *
 155  * Routine first searches the context for the spesified IB device name,
 156  * if found the shared context assumed and reference counter is incremented.
 157  * If no context found the new one is created and initialized with specified
 158  * IB device context and parameters.
 159  *
 160  * @param[in] spawn
 161  *   Pointer to the IB device attributes (name, port, etc).
 162  *
 163  * @return
 164  *   Pointer to mlx5_ibv_shared object on success,
 165  *   otherwise NULL and rte_errno is set.
 166  */
 167 static struct mlx5_ibv_shared *
 168 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
 169 {
 170         struct mlx5_ibv_shared *sh;
 171         int err = 0;
 172         uint32_t i;
 173
 174         assert(spawn);
 175         /* Secondary process should not create the shared context. */
 176         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 177         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 178         /* Search for IB context by device name. */
 179         LIST_FOREACH(sh, &mlx5_ibv_list, next) {
 180                 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
 181                         sh->refcnt++;
 182                         goto exit;
 183                 }
 184         }
 185         /* No device found, we have to create new sharted context. */
 186         assert(spawn->max_port);
 187         sh = rte_zmalloc("ethdev shared ib context",
 188                          sizeof(struct mlx5_ibv_shared) +
 189                          spawn->max_port *
 190                          sizeof(struct mlx5_ibv_shared_port),
 191                          RTE_CACHE_LINE_SIZE);
 192         if (!sh) {
 193                 DRV_LOG(ERR, "shared context allocation failure");
 194                 rte_errno  = ENOMEM;
 195                 goto exit;
 196         }
 197         /* Try to open IB device with DV first, then usual Verbs. */
 198         errno = 0;
 199         sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
 200         if (sh->ctx) {
 201                 sh->devx = 1;
 202                 DRV_LOG(DEBUG, "DevX is supported");
 203         } else {
 204                 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
 205                 if (!sh->ctx) {
 206                         err = errno ? errno : ENODEV;
 207                         goto error;
 208                 }
 209                 DRV_LOG(DEBUG, "DevX is NOT supported");
 210         }
 211         err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
 212         if (err) {
 213                 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
 214                 goto error;
 215         }
 216         sh->refcnt = 1;
 217         sh->max_port = spawn->max_port;
 218         strncpy(sh->ibdev_name, sh->ctx->device->name,
 219                 sizeof(sh->ibdev_name));
 220         strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
 221                 sizeof(sh->ibdev_path));
 222         pthread_mutex_init(&sh->intr_mutex, NULL);
 223         /*
 224          * Setting port_id to max unallowed value means
 225          * there is no interrupt subhandler installed for
 226          * the given port index i.
 227          */
 228         for (i = 0; i < sh->max_port; i++)
 229                 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
 230         sh->pd = mlx5_glue->alloc_pd(sh->ctx);
 231         if (sh->pd == NULL) {
 232                 DRV_LOG(ERR, "PD allocation failure");
 233                 err = ENOMEM;
 234                 goto error;
 235         }
 236         LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
 237 exit:
 238         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 239         return sh;
 240 error:
 241         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 242         assert(sh);
 243         if (sh->pd)
 244                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 245         if (sh->ctx)
 246                 claim_zero(mlx5_glue->close_device(sh->ctx));
 247         rte_free(sh);
 248         assert(err > 0);
 249         rte_errno = err;
 250         return NULL;
 251 }
 252
 253 /**
 254  * Free shared IB device context. Decrement counter and if zero free
 255  * all allocated resources and close handles.
 256  *
 257  * @param[in] sh
 258  *   Pointer to mlx5_ibv_shared object to free
 259  */
 260 static void
 261 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
 262 {
 263         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 264 #ifndef NDEBUG
 265         /* Check the object presence in the list. */
 266         struct mlx5_ibv_shared *lctx;
 267
 268         LIST_FOREACH(lctx, &mlx5_ibv_list, next)
 269                 if (lctx == sh)
 270                         break;
 271         assert(lctx);
 272         if (lctx != sh) {
 273                 DRV_LOG(ERR, "Freeing non-existing shared IB context");
 274                 goto exit;
 275         }
 276 #endif
 277         assert(sh);
 278         assert(sh->refcnt);
 279         /* Secondary process should not free the shared context. */
 280         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 281         if (--sh->refcnt)
 282                 goto exit;
 283         LIST_REMOVE(sh, next);
 284         /*
 285          *  Ensure there is no async event handler installed.
 286          *  Only primary process handles async device events.
 287          **/
 288         assert(!sh->intr_cnt);
 289         if (sh->intr_cnt)
 290                 rte_intr_callback_unregister
 291                         (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
 292         pthread_mutex_destroy(&sh->intr_mutex);
 293         if (sh->pd)
 294                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 295         if (sh->ctx)
 296                 claim_zero(mlx5_glue->close_device(sh->ctx));
 297         rte_free(sh);
 298 exit:
 299         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 300 }
 301
 302 /**
 303  * Initialize shared data between primary and secondary process.
 304  *
 305  * A memzone is reserved by primary process and secondary processes attach to
 306  * the memzone.
 307  *
 308  * @return
 309  *   0 on success, a negative errno value otherwise and rte_errno is set.
 310  */
 311 static int
 312 mlx5_init_shared_data(void)
 313 {
 314         const struct rte_memzone *mz;
 315         int ret = 0;
 316
 317         rte_spinlock_lock(&mlx5_shared_data_lock);
 318         if (mlx5_shared_data == NULL) {
 319                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 320                         /* Allocate shared memory. */
 321                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 322                                                  sizeof(*mlx5_shared_data),
 323                                                  SOCKET_ID_ANY, 0);
 324                         if (mz == NULL) {
 325                                 DRV_LOG(ERR,
 326                                         "Cannot allocate mlx5 shared data\n");
 327                                 ret = -rte_errno;
 328                                 goto error;
 329                         }
 330                         mlx5_shared_data = mz->addr;
 331                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 332                         rte_spinlock_init(&mlx5_shared_data->lock);
 333                 } else {
 334                         /* Lookup allocated shared memory. */
 335                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 336                         if (mz == NULL) {
 337                                 DRV_LOG(ERR,
 338                                         "Cannot attach mlx5 shared data\n");
 339                                 ret = -rte_errno;
 340                                 goto error;
 341                         }
 342                         mlx5_shared_data = mz->addr;
 343                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 344                 }
 345         }
 346 error:
 347         rte_spinlock_unlock(&mlx5_shared_data_lock);
 348         return ret;
 349 }
 350
 351 /**
 352  * Uninitialize shared data between primary and secondary process.
 353  *
 354  * The pointer of secondary process is dereferenced and primary process frees
 355  * the memzone.
 356  */
 357 static void
 358 mlx5_uninit_shared_data(void)
 359 {
 360         const struct rte_memzone *mz;
 361
 362         rte_spinlock_lock(&mlx5_shared_data_lock);
 363         if (mlx5_shared_data) {
 364                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 365                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 366                         rte_memzone_free(mz);
 367                 } else {
 368                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 369                 }
 370                 mlx5_shared_data = NULL;
 371         }
 372         rte_spinlock_unlock(&mlx5_shared_data_lock);
 373 }
 374
 375 /**
 376  * Retrieve integer value from environment variable.
 377  *
 378  * @param[in] name
 379  *   Environment variable name.
 380  *
 381  * @return
 382  *   Integer value, 0 if the variable is not set.
 383  */
 384 int
 385 mlx5_getenv_int(const char *name)
 386 {
 387         const char *val = getenv(name);
 388
 389         if (val == NULL)
 390                 return 0;
 391         return atoi(val);
 392 }
 393
 394 /**
 395  * Verbs callback to allocate a memory. This function should allocate the space
 396  * according to the size provided residing inside a huge page.
 397  * Please note that all allocation must respect the alignment from libmlx5
 398  * (i.e. currently sysconf(_SC_PAGESIZE)).
 399  *
 400  * @param[in] size
 401  *   The size in bytes of the memory to allocate.
 402  * @param[in] data
 403  *   A pointer to the callback data.
 404  *
 405  * @return
 406  *   Allocated buffer, NULL otherwise and rte_errno is set.
 407  */
 408 static void *
 409 mlx5_alloc_verbs_buf(size_t size, void *data)
 410 {
 411         struct mlx5_priv *priv = data;
 412         void *ret;
 413         size_t alignment = sysconf(_SC_PAGESIZE);
 414         unsigned int socket = SOCKET_ID_ANY;
 415
 416         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
 417                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 418
 419                 socket = ctrl->socket;
 420         } else if (priv->verbs_alloc_ctx.type ==
 421                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
 422                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 423
 424                 socket = ctrl->socket;
 425         }
 426         assert(data != NULL);
 427         ret = rte_malloc_socket(__func__, size, alignment, socket);
 428         if (!ret && size)
 429                 rte_errno = ENOMEM;
 430         return ret;
 431 }
 432
 433 /**
 434  * Verbs callback to free a memory.
 435  *
 436  * @param[in] ptr
 437  *   A pointer to the memory to free.
 438  * @param[in] data
 439  *   A pointer to the callback data.
 440  */
 441 static void
 442 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 443 {
 444         assert(data != NULL);
 445         rte_free(ptr);
 446 }
 447
 448 /**
 449  * DPDK callback to close the device.
 450  *
 451  * Destroy all queues and objects, free memory.
 452  *
 453  * @param dev
 454  *   Pointer to Ethernet device structure.
 455  */
 456 static void
 457 mlx5_dev_close(struct rte_eth_dev *dev)
 458 {
 459         struct mlx5_priv *priv = dev->data->dev_private;
 460         unsigned int i;
 461         int ret;
 462
 463         DRV_LOG(DEBUG, "port %u closing device \"%s\"",
 464                 dev->data->port_id,
 465                 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
 466         /* In case mlx5_dev_stop() has not been called. */
 467         mlx5_dev_interrupt_handler_uninstall(dev);
 468         mlx5_traffic_disable(dev);
 469         mlx5_flow_flush(dev, NULL);
 470         /* Prevent crashes when queues are still in use. */
 471         dev->rx_pkt_burst = removed_rx_burst;
 472         dev->tx_pkt_burst = removed_tx_burst;
 473         if (priv->rxqs != NULL) {
 474                 /* XXX race condition if mlx5_rx_burst() is still running. */
 475                 usleep(1000);
 476                 for (i = 0; (i != priv->rxqs_n); ++i)
 477                         mlx5_rxq_release(dev, i);
 478                 priv->rxqs_n = 0;
 479                 priv->rxqs = NULL;
 480         }
 481         if (priv->txqs != NULL) {
 482                 /* XXX race condition if mlx5_tx_burst() is still running. */
 483                 usleep(1000);
 484                 for (i = 0; (i != priv->txqs_n); ++i)
 485                         mlx5_txq_release(dev, i);
 486                 priv->txqs_n = 0;
 487                 priv->txqs = NULL;
 488         }
 489         mlx5_mprq_free_mp(dev);
 490         mlx5_mr_release(dev);
 491         assert(priv->sh);
 492         if (priv->sh)
 493                 mlx5_free_shared_ibctx(priv->sh);
 494         priv->sh = NULL;
 495         if (priv->rss_conf.rss_key != NULL)
 496                 rte_free(priv->rss_conf.rss_key);
 497         if (priv->reta_idx != NULL)
 498                 rte_free(priv->reta_idx);
 499         if (priv->config.vf)
 500                 mlx5_nl_mac_addr_flush(dev);
 501         if (priv->nl_socket_route >= 0)
 502                 close(priv->nl_socket_route);
 503         if (priv->nl_socket_rdma >= 0)
 504                 close(priv->nl_socket_rdma);
 505         if (priv->tcf_context)
 506                 mlx5_flow_tcf_context_destroy(priv->tcf_context);
 507         ret = mlx5_hrxq_ibv_verify(dev);
 508         if (ret)
 509                 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
 510                         dev->data->port_id);
 511         ret = mlx5_ind_table_ibv_verify(dev);
 512         if (ret)
 513                 DRV_LOG(WARNING, "port %u some indirection table still remain",
 514                         dev->data->port_id);
 515         ret = mlx5_rxq_ibv_verify(dev);
 516         if (ret)
 517                 DRV_LOG(WARNING, "port %u some Verbs Rx queue still remain",
 518                         dev->data->port_id);
 519         ret = mlx5_rxq_verify(dev);
 520         if (ret)
 521                 DRV_LOG(WARNING, "port %u some Rx queues still remain",
 522                         dev->data->port_id);
 523         ret = mlx5_txq_ibv_verify(dev);
 524         if (ret)
 525                 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
 526                         dev->data->port_id);
 527         ret = mlx5_txq_verify(dev);
 528         if (ret)
 529                 DRV_LOG(WARNING, "port %u some Tx queues still remain",
 530                         dev->data->port_id);
 531         ret = mlx5_flow_verify(dev);
 532         if (ret)
 533                 DRV_LOG(WARNING, "port %u some flows still remain",
 534                         dev->data->port_id);
 535         if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
 536                 unsigned int c = 0;
 537                 unsigned int i = mlx5_dev_to_port_id(dev->device, NULL, 0);
 538                 uint16_t port_id[i];
 539
 540                 i = RTE_MIN(mlx5_dev_to_port_id(dev->device, port_id, i), i);
 541                 while (i--) {
 542                         struct mlx5_priv *opriv =
 543                                 rte_eth_devices[port_id[i]].data->dev_private;
 544
 545                         if (!opriv ||
 546                             opriv->domain_id != priv->domain_id ||
 547                             &rte_eth_devices[port_id[i]] == dev)
 548                                 continue;
 549                         ++c;
 550                 }
 551                 if (!c)
 552                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
 553         }
 554         memset(priv, 0, sizeof(*priv));
 555         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
 556         /*
 557          * Reset mac_addrs to NULL such that it is not freed as part of
 558          * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
 559          * it is freed when dev_private is freed.
 560          */
 561         dev->data->mac_addrs = NULL;
 562 }
 563
 564 const struct eth_dev_ops mlx5_dev_ops = {
 565         .dev_configure = mlx5_dev_configure,
 566         .dev_start = mlx5_dev_start,
 567         .dev_stop = mlx5_dev_stop,
 568         .dev_set_link_down = mlx5_set_link_down,
 569         .dev_set_link_up = mlx5_set_link_up,
 570         .dev_close = mlx5_dev_close,
 571         .promiscuous_enable = mlx5_promiscuous_enable,
 572         .promiscuous_disable = mlx5_promiscuous_disable,
 573         .allmulticast_enable = mlx5_allmulticast_enable,
 574         .allmulticast_disable = mlx5_allmulticast_disable,
 575         .link_update = mlx5_link_update,
 576         .stats_get = mlx5_stats_get,
 577         .stats_reset = mlx5_stats_reset,
 578         .xstats_get = mlx5_xstats_get,
 579         .xstats_reset = mlx5_xstats_reset,
 580         .xstats_get_names = mlx5_xstats_get_names,
 581         .fw_version_get = mlx5_fw_version_get,
 582         .dev_infos_get = mlx5_dev_infos_get,
 583         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
 584         .vlan_filter_set = mlx5_vlan_filter_set,
 585         .rx_queue_setup = mlx5_rx_queue_setup,
 586         .tx_queue_setup = mlx5_tx_queue_setup,
 587         .rx_queue_release = mlx5_rx_queue_release,
 588         .tx_queue_release = mlx5_tx_queue_release,
 589         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
 590         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
 591         .mac_addr_remove = mlx5_mac_addr_remove,
 592         .mac_addr_add = mlx5_mac_addr_add,
 593         .mac_addr_set = mlx5_mac_addr_set,
 594         .set_mc_addr_list = mlx5_set_mc_addr_list,
 595         .mtu_set = mlx5_dev_set_mtu,
 596         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
 597         .vlan_offload_set = mlx5_vlan_offload_set,
 598         .reta_update = mlx5_dev_rss_reta_update,
 599         .reta_query = mlx5_dev_rss_reta_query,
 600         .rss_hash_update = mlx5_rss_hash_update,
 601         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
 602         .filter_ctrl = mlx5_dev_filter_ctrl,
 603         .rx_descriptor_status = mlx5_rx_descriptor_status,
 604         .tx_descriptor_status = mlx5_tx_descriptor_status,
 605         .rx_queue_count = mlx5_rx_queue_count,
 606         .rx_queue_intr_enable = mlx5_rx_intr_enable,
 607         .rx_queue_intr_disable = mlx5_rx_intr_disable,
 608         .is_removed = mlx5_is_removed,
 609 };
 610
 611 /* Available operations from secondary process. */
 612 static const struct eth_dev_ops mlx5_dev_sec_ops = {
 613         .stats_get = mlx5_stats_get,
 614         .stats_reset = mlx5_stats_reset,
 615         .xstats_get = mlx5_xstats_get,
 616         .xstats_reset = mlx5_xstats_reset,
 617         .xstats_get_names = mlx5_xstats_get_names,
 618         .fw_version_get = mlx5_fw_version_get,
 619         .dev_infos_get = mlx5_dev_infos_get,
 620         .rx_descriptor_status = mlx5_rx_descriptor_status,
 621         .tx_descriptor_status = mlx5_tx_descriptor_status,
 622 };
 623
 624 /* Available operations in flow isolated mode. */
 625 const struct eth_dev_ops mlx5_dev_ops_isolate = {
 626         .dev_configure = mlx5_dev_configure,
 627         .dev_start = mlx5_dev_start,
 628         .dev_stop = mlx5_dev_stop,
 629         .dev_set_link_down = mlx5_set_link_down,
 630         .dev_set_link_up = mlx5_set_link_up,
 631         .dev_close = mlx5_dev_close,
 632         .promiscuous_enable = mlx5_promiscuous_enable,
 633         .promiscuous_disable = mlx5_promiscuous_disable,
 634         .allmulticast_enable = mlx5_allmulticast_enable,
 635         .allmulticast_disable = mlx5_allmulticast_disable,
 636         .link_update = mlx5_link_update,
 637         .stats_get = mlx5_stats_get,
 638         .stats_reset = mlx5_stats_reset,
 639         .xstats_get = mlx5_xstats_get,
 640         .xstats_reset = mlx5_xstats_reset,
 641         .xstats_get_names = mlx5_xstats_get_names,
 642         .fw_version_get = mlx5_fw_version_get,
 643         .dev_infos_get = mlx5_dev_infos_get,
 644         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
 645         .vlan_filter_set = mlx5_vlan_filter_set,
 646         .rx_queue_setup = mlx5_rx_queue_setup,
 647         .tx_queue_setup = mlx5_tx_queue_setup,
 648         .rx_queue_release = mlx5_rx_queue_release,
 649         .tx_queue_release = mlx5_tx_queue_release,
 650         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
 651         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
 652         .mac_addr_remove = mlx5_mac_addr_remove,
 653         .mac_addr_add = mlx5_mac_addr_add,
 654         .mac_addr_set = mlx5_mac_addr_set,
 655         .set_mc_addr_list = mlx5_set_mc_addr_list,
 656         .mtu_set = mlx5_dev_set_mtu,
 657         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
 658         .vlan_offload_set = mlx5_vlan_offload_set,
 659         .filter_ctrl = mlx5_dev_filter_ctrl,
 660         .rx_descriptor_status = mlx5_rx_descriptor_status,
 661         .tx_descriptor_status = mlx5_tx_descriptor_status,
 662         .rx_queue_intr_enable = mlx5_rx_intr_enable,
 663         .rx_queue_intr_disable = mlx5_rx_intr_disable,
 664         .is_removed = mlx5_is_removed,
 665 };
 666
 667 /**
 668  * Verify and store value for device argument.
 669  *
 670  * @param[in] key
 671  *   Key argument to verify.
 672  * @param[in] val
 673  *   Value associated with key.
 674  * @param opaque
 675  *   User data.
 676  *
 677  * @return
 678  *   0 on success, a negative errno value otherwise and rte_errno is set.
 679  */
 680 static int
 681 mlx5_args_check(const char *key, const char *val, void *opaque)
 682 {
 683         struct mlx5_dev_config *config = opaque;
 684         unsigned long tmp;
 685
 686         /* No-op, port representors are processed in mlx5_dev_spawn(). */
 687         if (!strcmp(MLX5_REPRESENTOR, key))
 688                 return 0;
 689         errno = 0;
 690         tmp = strtoul(val, NULL, 0);
 691         if (errno) {
 692                 rte_errno = errno;
 693                 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
 694                 return -rte_errno;
 695         }
 696         if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
 697                 config->cqe_comp = !!tmp;
 698         } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
 699                 config->cqe_pad = !!tmp;
 700         } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
 701                 config->hw_padding = !!tmp;
 702         } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
 703                 config->mprq.enabled = !!tmp;
 704         } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
 705                 config->mprq.stride_num_n = tmp;
 706         } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
 707                 config->mprq.max_memcpy_len = tmp;
 708         } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
 709                 config->mprq.min_rxqs_num = tmp;
 710         } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
 711                 config->txq_inline = tmp;
 712         } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
 713                 config->txqs_inline = tmp;
 714         } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
 715                 config->txqs_vec = tmp;
 716         } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
 717                 config->mps = !!tmp;
 718         } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
 719                 config->mpw_hdr_dseg = !!tmp;
 720         } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
 721                 config->inline_max_packet_sz = tmp;
 722         } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
 723                 config->tx_vec_en = !!tmp;
 724         } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
 725                 config->rx_vec_en = !!tmp;
 726         } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
 727                 config->l3_vxlan_en = !!tmp;
 728         } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
 729                 config->vf_nl_en = !!tmp;
 730         } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
 731                 config->dv_flow_en = !!tmp;
 732         } else {
 733                 DRV_LOG(WARNING, "%s: unknown parameter", key);
 734                 rte_errno = EINVAL;
 735                 return -rte_errno;
 736         }
 737         return 0;
 738 }
 739
 740 /**
 741  * Parse device parameters.
 742  *
 743  * @param config
 744  *   Pointer to device configuration structure.
 745  * @param devargs
 746  *   Device arguments structure.
 747  *
 748  * @return
 749  *   0 on success, a negative errno value otherwise and rte_errno is set.
 750  */
 751 static int
 752 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
 753 {
 754         const char **params = (const char *[]){
 755                 MLX5_RXQ_CQE_COMP_EN,
 756                 MLX5_RXQ_CQE_PAD_EN,
 757                 MLX5_RXQ_PKT_PAD_EN,
 758                 MLX5_RX_MPRQ_EN,
 759                 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
 760                 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
 761                 MLX5_RXQS_MIN_MPRQ,
 762                 MLX5_TXQ_INLINE,
 763                 MLX5_TXQS_MIN_INLINE,
 764                 MLX5_TXQS_MAX_VEC,
 765                 MLX5_TXQ_MPW_EN,
 766                 MLX5_TXQ_MPW_HDR_DSEG_EN,
 767                 MLX5_TXQ_MAX_INLINE_LEN,
 768                 MLX5_TX_VEC_EN,
 769                 MLX5_RX_VEC_EN,
 770                 MLX5_L3_VXLAN_EN,
 771                 MLX5_VF_NL_EN,
 772                 MLX5_DV_FLOW_EN,
 773                 MLX5_REPRESENTOR,
 774                 NULL,
 775         };
 776         struct rte_kvargs *kvlist;
 777         int ret = 0;
 778         int i;
 779
 780         if (devargs == NULL)
 781                 return 0;
 782         /* Following UGLY cast is done to pass checkpatch. */
 783         kvlist = rte_kvargs_parse(devargs->args, params);
 784         if (kvlist == NULL)
 785                 return 0;
 786         /* Process parameters. */
 787         for (i = 0; (params[i] != NULL); ++i) {
 788                 if (rte_kvargs_count(kvlist, params[i])) {
 789                         ret = rte_kvargs_process(kvlist, params[i],
 790                                                  mlx5_args_check, config);
 791                         if (ret) {
 792                                 rte_errno = EINVAL;
 793                                 rte_kvargs_free(kvlist);
 794                                 return -rte_errno;
 795                         }
 796                 }
 797         }
 798         rte_kvargs_free(kvlist);
 799         return 0;
 800 }
 801
 802 static struct rte_pci_driver mlx5_driver;
 803
 804 static int
 805 find_lower_va_bound(const struct rte_memseg_list *msl,
 806                 const struct rte_memseg *ms, void *arg)
 807 {
 808         void **addr = arg;
 809
 810         if (msl->external)
 811                 return 0;
 812         if (*addr == NULL)
 813                 *addr = ms->addr;
 814         else
 815                 *addr = RTE_MIN(*addr, ms->addr);
 816
 817         return 0;
 818 }
 819
 820 /**
 821  * Reserve UAR address space for primary process.
 822  *
 823  * Process local resource is used by both primary and secondary to avoid
 824  * duplicate reservation. The space has to be available on both primary and
 825  * secondary process, TXQ UAR maps to this area using fixed mmap w/o double
 826  * check.
 827  *
 828  * @return
 829  *   0 on success, a negative errno value otherwise and rte_errno is set.
 830  */
 831 static int
 832 mlx5_uar_init_primary(void)
 833 {
 834         struct mlx5_shared_data *sd = mlx5_shared_data;
 835         void *addr = (void *)0;
 836
 837         if (sd->uar_base)
 838                 return 0;
 839         /* find out lower bound of hugepage segments */
 840         rte_memseg_walk(find_lower_va_bound, &addr);
 841         /* keep distance to hugepages to minimize potential conflicts. */
 842         addr = RTE_PTR_SUB(addr, (uintptr_t)(MLX5_UAR_OFFSET + MLX5_UAR_SIZE));
 843         /* anonymous mmap, no real memory consumption. */
 844         addr = mmap(addr, MLX5_UAR_SIZE,
 845                     PROT_NONE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
 846         if (addr == MAP_FAILED) {
 847                 DRV_LOG(ERR,
 848                         "Failed to reserve UAR address space, please"
 849                         " adjust MLX5_UAR_SIZE or try --base-virtaddr");
 850                 rte_errno = ENOMEM;
 851                 return -rte_errno;
 852         }
 853         /* Accept either same addr or a new addr returned from mmap if target
 854          * range occupied.
 855          */
 856         DRV_LOG(INFO, "Reserved UAR address space: %p", addr);
 857         sd->uar_base = addr; /* for primary and secondary UAR re-mmap. */
 858         return 0;
 859 }
 860
 861 /**
 862  * Unmap UAR address space reserved for primary process.
 863  */
 864 static void
 865 mlx5_uar_uninit_primary(void)
 866 {
 867         struct mlx5_shared_data *sd = mlx5_shared_data;
 868
 869         if (!sd->uar_base)
 870                 return;
 871         munmap(sd->uar_base, MLX5_UAR_SIZE);
 872         sd->uar_base = NULL;
 873 }
 874
 875 /**
 876  * Reserve UAR address space for secondary process, align with primary process.
 877  *
 878  * @return
 879  *   0 on success, a negative errno value otherwise and rte_errno is set.
 880  */
 881 static int
 882 mlx5_uar_init_secondary(void)
 883 {
 884         struct mlx5_shared_data *sd = mlx5_shared_data;
 885         struct mlx5_local_data *ld = &mlx5_local_data;
 886         void *addr;
 887
 888         if (ld->uar_base) { /* Already reserved. */
 889                 assert(sd->uar_base == ld->uar_base);
 890                 return 0;
 891         }
 892         assert(sd->uar_base);
 893         /* anonymous mmap, no real memory consumption. */
 894         addr = mmap(sd->uar_base, MLX5_UAR_SIZE,
 895                     PROT_NONE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
 896         if (addr == MAP_FAILED) {
 897                 DRV_LOG(ERR, "UAR mmap failed: %p size: %llu",
 898                         sd->uar_base, MLX5_UAR_SIZE);
 899                 rte_errno = ENXIO;
 900                 return -rte_errno;
 901         }
 902         if (sd->uar_base != addr) {
 903                 DRV_LOG(ERR,
 904                         "UAR address %p size %llu occupied, please"
 905                         " adjust MLX5_UAR_OFFSET or try EAL parameter"
 906                         " --base-virtaddr",
 907                         sd->uar_base, MLX5_UAR_SIZE);
 908                 rte_errno = ENXIO;
 909                 return -rte_errno;
 910         }
 911         ld->uar_base = addr;
 912         DRV_LOG(INFO, "Reserved UAR address space: %p", addr);
 913         return 0;
 914 }
 915
 916 /**
 917  * Unmap UAR address space reserved for secondary process.
 918  */
 919 static void
 920 mlx5_uar_uninit_secondary(void)
 921 {
 922         struct mlx5_local_data *ld = &mlx5_local_data;
 923
 924         if (!ld->uar_base)
 925                 return;
 926         munmap(ld->uar_base, MLX5_UAR_SIZE);
 927         ld->uar_base = NULL;
 928 }
 929
 930 /**
 931  * PMD global initialization.
 932  *
 933  * Independent from individual device, this function initializes global
 934  * per-PMD data structures distinguishing primary and secondary processes.
 935  * Hence, each initialization is called once per a process.
 936  *
 937  * @return
 938  *   0 on success, a negative errno value otherwise and rte_errno is set.
 939  */
 940 static int
 941 mlx5_init_once(void)
 942 {
 943         struct mlx5_shared_data *sd;
 944         struct mlx5_local_data *ld = &mlx5_local_data;
 945         int ret;
 946
 947         if (mlx5_init_shared_data())
 948                 return -rte_errno;
 949         sd = mlx5_shared_data;
 950         assert(sd);
 951         rte_spinlock_lock(&sd->lock);
 952         switch (rte_eal_process_type()) {
 953         case RTE_PROC_PRIMARY:
 954                 if (sd->init_done)
 955                         break;
 956                 LIST_INIT(&sd->mem_event_cb_list);
 957                 rte_rwlock_init(&sd->mem_event_rwlock);
 958                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
 959                                                 mlx5_mr_mem_event_cb, NULL);
 960                 mlx5_mp_init_primary();
 961                 ret = mlx5_uar_init_primary();
 962                 if (ret)
 963                         goto error;
 964                 sd->init_done = true;
 965                 break;
 966         case RTE_PROC_SECONDARY:
 967                 if (ld->init_done)
 968                         break;
 969                 ret = mlx5_uar_init_secondary();
 970                 if (ret)
 971                         goto error;
 972                 ++sd->secondary_cnt;
 973                 ld->init_done = true;
 974                 break;
 975         default:
 976                 break;
 977         }
 978         rte_spinlock_unlock(&sd->lock);
 979         return 0;
 980 error:
 981         switch (rte_eal_process_type()) {
 982         case RTE_PROC_PRIMARY:
 983                 mlx5_uar_uninit_primary();
 984                 mlx5_mp_uninit_primary();
 985                 rte_mem_event_callback_unregister("MLX5_MEM_EVENT_CB", NULL);
 986                 break;
 987         case RTE_PROC_SECONDARY:
 988                 mlx5_uar_uninit_secondary();
 989                 break;
 990         default:
 991                 break;
 992         }
 993         rte_spinlock_unlock(&sd->lock);
 994         mlx5_uninit_shared_data();
 995         return -rte_errno;
 996 }
 997
 998 /**
 999  * Spawn an Ethernet device from Verbs information.
1000  *
1001  * @param dpdk_dev
1002  *   Backing DPDK device.
1003  * @param spawn
1004  *   Verbs device parameters (name, port, switch_info) to spawn.
1005  * @param config
1006  *   Device configuration parameters.
1007  *
1008  * @return
1009  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
1010  *   is set. The following errors are defined:
1011  *
1012  *   EBUSY: device is not supposed to be spawned.
1013  *   EEXIST: device is already spawned
1014  */
1015 static struct rte_eth_dev *
1016 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1017                struct mlx5_dev_spawn_data *spawn,
1018                struct mlx5_dev_config config)
1019 {
1020         const struct mlx5_switch_info *switch_info = &spawn->info;
1021         struct mlx5_ibv_shared *sh = NULL;
1022         struct ibv_port_attr port_attr;
1023         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1024         struct rte_eth_dev *eth_dev = NULL;
1025         struct mlx5_priv *priv = NULL;
1026         int err = 0;
1027         unsigned int hw_padding = 0;
1028         unsigned int mps;
1029         unsigned int cqe_comp;
1030         unsigned int cqe_pad = 0;
1031         unsigned int tunnel_en = 0;
1032         unsigned int mpls_en = 0;
1033         unsigned int swp = 0;
1034         unsigned int mprq = 0;
1035         unsigned int mprq_min_stride_size_n = 0;
1036         unsigned int mprq_max_stride_size_n = 0;
1037         unsigned int mprq_min_stride_num_n = 0;
1038         unsigned int mprq_max_stride_num_n = 0;
1039         struct ether_addr mac;
1040         char name[RTE_ETH_NAME_MAX_LEN];
1041         int own_domain_id = 0;
1042         uint16_t port_id;
1043         unsigned int i;
1044
1045         /* Determine if this port representor is supposed to be spawned. */
1046         if (switch_info->representor && dpdk_dev->devargs) {
1047                 struct rte_eth_devargs eth_da;
1048
1049                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
1050                 if (err) {
1051                         rte_errno = -err;
1052                         DRV_LOG(ERR, "failed to process device arguments: %s",
1053                                 strerror(rte_errno));
1054                         return NULL;
1055                 }
1056                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1057                         if (eth_da.representor_ports[i] ==
1058                             (uint16_t)switch_info->port_name)
1059                                 break;
1060                 if (i == eth_da.nb_representor_ports) {
1061                         rte_errno = EBUSY;
1062                         return NULL;
1063                 }
1064         }
1065         /* Build device name. */
1066         if (!switch_info->representor)
1067                 strlcpy(name, dpdk_dev->name, sizeof(name));
1068         else
1069                 snprintf(name, sizeof(name), "%s_representor_%u",
1070                          dpdk_dev->name, switch_info->port_name);
1071         /* check if the device is already spawned */
1072         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1073                 rte_errno = EEXIST;
1074                 return NULL;
1075         }
1076         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1077         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1078                 eth_dev = rte_eth_dev_attach_secondary(name);
1079                 if (eth_dev == NULL) {
1080                         DRV_LOG(ERR, "can not attach rte ethdev");
1081                         rte_errno = ENOMEM;
1082                         return NULL;
1083                 }
1084                 eth_dev->device = dpdk_dev;
1085                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1086                 /* Receive command fd from primary process */
1087                 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1088                 if (err < 0)
1089                         return NULL;
1090                 /* Remap UAR for Tx queues. */
1091                 err = mlx5_tx_uar_remap(eth_dev, err);
1092                 if (err)
1093                         return NULL;
1094                 /*
1095                  * Ethdev pointer is still required as input since
1096                  * the primary device is not accessible from the
1097                  * secondary process.
1098                  */
1099                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1100                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1101                 return eth_dev;
1102         }
1103         sh = mlx5_alloc_shared_ibctx(spawn);
1104         if (!sh)
1105                 return NULL;
1106         config.devx = sh->devx;
1107 #ifdef HAVE_IBV_MLX5_MOD_SWP
1108         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1109 #endif
1110         /*
1111          * Multi-packet send is supported by ConnectX-4 Lx PF as well
1112          * as all ConnectX-5 devices.
1113          */
1114 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1115         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1116 #endif
1117 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1118         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1119 #endif
1120         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1121         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1122                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1123                         DRV_LOG(DEBUG, "enhanced MPW is supported");
1124                         mps = MLX5_MPW_ENHANCED;
1125                 } else {
1126                         DRV_LOG(DEBUG, "MPW is supported");
1127                         mps = MLX5_MPW;
1128                 }
1129         } else {
1130                 DRV_LOG(DEBUG, "MPW isn't supported");
1131                 mps = MLX5_MPW_DISABLED;
1132         }
1133 #ifdef HAVE_IBV_MLX5_MOD_SWP
1134         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1135                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1136         DRV_LOG(DEBUG, "SWP support: %u", swp);
1137 #endif
1138         config.swp = !!swp;
1139 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1140         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1141                 struct mlx5dv_striding_rq_caps mprq_caps =
1142                         dv_attr.striding_rq_caps;
1143
1144                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1145                         mprq_caps.min_single_stride_log_num_of_bytes);
1146                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1147                         mprq_caps.max_single_stride_log_num_of_bytes);
1148                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1149                         mprq_caps.min_single_wqe_log_num_of_strides);
1150                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1151                         mprq_caps.max_single_wqe_log_num_of_strides);
1152                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1153                         mprq_caps.supported_qpts);
1154                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1155                 mprq = 1;
1156                 mprq_min_stride_size_n =
1157                         mprq_caps.min_single_stride_log_num_of_bytes;
1158                 mprq_max_stride_size_n =
1159                         mprq_caps.max_single_stride_log_num_of_bytes;
1160                 mprq_min_stride_num_n =
1161                         mprq_caps.min_single_wqe_log_num_of_strides;
1162                 mprq_max_stride_num_n =
1163                         mprq_caps.max_single_wqe_log_num_of_strides;
1164                 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1165                                                    mprq_min_stride_num_n);
1166         }
1167 #endif
1168         if (RTE_CACHE_LINE_SIZE == 128 &&
1169             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
1170                 cqe_comp = 0;
1171         else
1172                 cqe_comp = 1;
1173         config.cqe_comp = cqe_comp;
1174 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
1175         /* Whether device supports 128B Rx CQE padding. */
1176         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
1177                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
1178 #endif
1179 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1180         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1181                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1182                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1183                              (dv_attr.tunnel_offloads_caps &
1184                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
1185         }
1186         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1187                 tunnel_en ? "" : "not ");
1188 #else
1189         DRV_LOG(WARNING,
1190                 "tunnel offloading disabled due to old OFED/rdma-core version");
1191 #endif
1192         config.tunnel_en = tunnel_en;
1193 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1194         mpls_en = ((dv_attr.tunnel_offloads_caps &
1195                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1196                    (dv_attr.tunnel_offloads_caps &
1197                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1198         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1199                 mpls_en ? "" : "not ");
1200 #else
1201         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1202                 " old OFED/rdma-core version or firmware configuration");
1203 #endif
1204         config.mpls_en = mpls_en;
1205         /* Check port status. */
1206         err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
1207         if (err) {
1208                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1209                 goto error;
1210         }
1211         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1212                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1213                 err = EINVAL;
1214                 goto error;
1215         }
1216         if (port_attr.state != IBV_PORT_ACTIVE)
1217                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1218                         mlx5_glue->port_state_str(port_attr.state),
1219                         port_attr.state);
1220         /* Allocate private eth device data. */
1221         priv = rte_zmalloc("ethdev private structure",
1222                            sizeof(*priv),
1223                            RTE_CACHE_LINE_SIZE);
1224         if (priv == NULL) {
1225                 DRV_LOG(ERR, "priv allocation failure");
1226                 err = ENOMEM;
1227                 goto error;
1228         }
1229         priv->sh = sh;
1230         priv->ibv_port = spawn->ibv_port;
1231         priv->mtu = ETHER_MTU;
1232 #ifndef RTE_ARCH_64
1233         /* Initialize UAR access locks for 32bit implementations. */
1234         rte_spinlock_init(&priv->uar_lock_cq);
1235         for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1236                 rte_spinlock_init(&priv->uar_lock[i]);
1237 #endif
1238         /* Some internal functions rely on Netlink sockets, open them now. */
1239         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1240         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1241         priv->nl_sn = 0;
1242         priv->representor = !!switch_info->representor;
1243         priv->master = !!switch_info->master;
1244         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1245         /*
1246          * Currently we support single E-Switch per PF configurations
1247          * only and vport_id field contains the vport index for
1248          * associated VF, which is deduced from representor port name.
1249          * For exapmple, let's have the IB device port 10, it has
1250          * attached network device eth0, which has port name attribute
1251          * pf0vf2, we can deduce the VF number as 2, and set vport index
1252          * as 3 (2+1). This assigning schema should be changed if the
1253          * multiple E-Switch instances per PF configurations or/and PCI
1254          * subfunctions are added.
1255          */
1256         priv->vport_id = switch_info->representor ?
1257                          switch_info->port_name + 1 : -1;
1258         /* representor_id field keeps the unmodified port/VF index. */
1259         priv->representor_id = switch_info->representor ?
1260                                switch_info->port_name : -1;
1261         /*
1262          * Look for sibling devices in order to reuse their switch domain
1263          * if any, otherwise allocate one.
1264          */
1265         i = mlx5_dev_to_port_id(dpdk_dev, NULL, 0);
1266         if (i > 0) {
1267                 uint16_t port_id[i];
1268
1269                 i = RTE_MIN(mlx5_dev_to_port_id(dpdk_dev, port_id, i), i);
1270                 while (i--) {
1271                         const struct mlx5_priv *opriv =
1272                                 rte_eth_devices[port_id[i]].data->dev_private;
1273
1274                         if (!opriv ||
1275                             opriv->domain_id ==
1276                             RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1277                                 continue;
1278                         priv->domain_id = opriv->domain_id;
1279                         break;
1280                 }
1281         }
1282         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1283                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1284                 if (err) {
1285                         err = rte_errno;
1286                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1287                                 strerror(rte_errno));
1288                         goto error;
1289                 }
1290                 own_domain_id = 1;
1291         }
1292         err = mlx5_args(&config, dpdk_dev->devargs);
1293         if (err) {
1294                 err = rte_errno;
1295                 DRV_LOG(ERR, "failed to process device arguments: %s",
1296                         strerror(rte_errno));
1297                 goto error;
1298         }
1299         config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1300                             IBV_DEVICE_RAW_IP_CSUM);
1301         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1302                 (config.hw_csum ? "" : "not "));
1303 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1304         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1305         DRV_LOG(DEBUG, "counters are not supported");
1306 #endif
1307 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
1308         if (config.dv_flow_en) {
1309                 DRV_LOG(WARNING, "DV flow is not supported");
1310                 config.dv_flow_en = 0;
1311         }
1312 #endif
1313         config.ind_table_max_size =
1314                 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
1315         /*
1316          * Remove this check once DPDK supports larger/variable
1317          * indirection tables.
1318          */
1319         if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1320                 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1321         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1322                 config.ind_table_max_size);
1323         config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1324                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1325         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1326                 (config.hw_vlan_strip ? "" : "not "));
1327         config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1328                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1329         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1330                 (config.hw_fcs_strip ? "" : "not "));
1331 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1332         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1333 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1334         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1335                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1336 #endif
1337         if (config.hw_padding && !hw_padding) {
1338                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1339                 config.hw_padding = 0;
1340         } else if (config.hw_padding) {
1341                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1342         }
1343         config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
1344                       (sh->device_attr.tso_caps.supported_qpts &
1345                        (1 << IBV_QPT_RAW_PACKET)));
1346         if (config.tso)
1347                 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
1348         /*
1349          * MPW is disabled by default, while the Enhanced MPW is enabled
1350          * by default.
1351          */
1352         if (config.mps == MLX5_ARG_UNSET)
1353                 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1354                                                           MLX5_MPW_DISABLED;
1355         else
1356                 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
1357         DRV_LOG(INFO, "%sMPS is %s",
1358                 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
1359                 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1360         if (config.cqe_comp && !cqe_comp) {
1361                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1362                 config.cqe_comp = 0;
1363         }
1364         if (config.cqe_pad && !cqe_pad) {
1365                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1366                 config.cqe_pad = 0;
1367         } else if (config.cqe_pad) {
1368                 DRV_LOG(INFO, "Rx CQE padding is enabled");
1369         }
1370         if (config.mprq.enabled && mprq) {
1371                 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
1372                     config.mprq.stride_num_n < mprq_min_stride_num_n) {
1373                         config.mprq.stride_num_n =
1374                                 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1375                                         mprq_min_stride_num_n);
1376                         DRV_LOG(WARNING,
1377                                 "the number of strides"
1378                                 " for Multi-Packet RQ is out of range,"
1379                                 " setting default value (%u)",
1380                                 1 << config.mprq.stride_num_n);
1381                 }
1382                 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
1383                 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
1384         } else if (config.mprq.enabled && !mprq) {
1385                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1386                 config.mprq.enabled = 0;
1387         }
1388         eth_dev = rte_eth_dev_allocate(name);
1389         if (eth_dev == NULL) {
1390                 DRV_LOG(ERR, "can not allocate rte ethdev");
1391                 err = ENOMEM;
1392                 goto error;
1393         }
1394         /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1395         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1396         if (priv->representor) {
1397                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1398                 eth_dev->data->representor_id = priv->representor_id;
1399         }
1400         eth_dev->data->dev_private = priv;
1401         priv->dev_data = eth_dev->data;
1402         eth_dev->data->mac_addrs = priv->mac;
1403         eth_dev->device = dpdk_dev;
1404         /* Configure the first MAC address by default. */
1405         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1406                 DRV_LOG(ERR,
1407                         "port %u cannot get MAC address, is mlx5_en"
1408                         " loaded? (errno: %s)",
1409                         eth_dev->data->port_id, strerror(rte_errno));
1410                 err = ENODEV;
1411                 goto error;
1412         }
1413         DRV_LOG(INFO,
1414                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1415                 eth_dev->data->port_id,
1416                 mac.addr_bytes[0], mac.addr_bytes[1],
1417                 mac.addr_bytes[2], mac.addr_bytes[3],
1418                 mac.addr_bytes[4], mac.addr_bytes[5]);
1419 #ifndef NDEBUG
1420         {
1421                 char ifname[IF_NAMESIZE];
1422
1423                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1424                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1425                                 eth_dev->data->port_id, ifname);
1426                 else
1427                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1428                                 eth_dev->data->port_id);
1429         }
1430 #endif
1431         /* Get actual MTU if possible. */
1432         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1433         if (err) {
1434                 err = rte_errno;
1435                 goto error;
1436         }
1437         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1438                 priv->mtu);
1439         /* Initialize burst functions to prevent crashes before link-up. */
1440         eth_dev->rx_pkt_burst = removed_rx_burst;
1441         eth_dev->tx_pkt_burst = removed_tx_burst;
1442         eth_dev->dev_ops = &mlx5_dev_ops;
1443         /* Register MAC address. */
1444         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1445         if (config.vf && config.vf_nl_en)
1446                 mlx5_nl_mac_addr_sync(eth_dev);
1447         priv->tcf_context = mlx5_flow_tcf_context_create();
1448         if (!priv->tcf_context) {
1449                 err = -rte_errno;
1450                 DRV_LOG(WARNING,
1451                         "flow rules relying on switch offloads will not be"
1452                         " supported: cannot open libmnl socket: %s",
1453                         strerror(rte_errno));
1454         } else {
1455                 struct rte_flow_error error;
1456                 unsigned int ifindex = mlx5_ifindex(eth_dev);
1457
1458                 if (!ifindex) {
1459                         err = -rte_errno;
1460                         error.message =
1461                                 "cannot retrieve network interface index";
1462                 } else {
1463                         err = mlx5_flow_tcf_init(priv->tcf_context,
1464                                                  ifindex, &error);
1465                 }
1466                 if (err) {
1467                         DRV_LOG(WARNING,
1468                                 "flow rules relying on switch offloads will"
1469                                 " not be supported: %s: %s",
1470                                 error.message, strerror(rte_errno));
1471                         mlx5_flow_tcf_context_destroy(priv->tcf_context);
1472                         priv->tcf_context = NULL;
1473                 }
1474         }
1475         TAILQ_INIT(&priv->flows);
1476         TAILQ_INIT(&priv->ctrl_flows);
1477         /* Hint libmlx5 to use PMD allocator for data plane resources */
1478         struct mlx5dv_ctx_allocators alctr = {
1479                 .alloc = &mlx5_alloc_verbs_buf,
1480                 .free = &mlx5_free_verbs_buf,
1481                 .data = priv,
1482         };
1483         mlx5_glue->dv_set_context_attr(sh->ctx,
1484                                        MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1485                                        (void *)((uintptr_t)&alctr));
1486         /* Bring Ethernet device up. */
1487         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1488                 eth_dev->data->port_id);
1489         mlx5_set_link_up(eth_dev);
1490         /*
1491          * Even though the interrupt handler is not installed yet,
1492          * interrupts will still trigger on the asyn_fd from
1493          * Verbs context returned by ibv_open_device().
1494          */
1495         mlx5_link_update(eth_dev, 0);
1496         /* Store device configuration on private structure. */
1497         priv->config = config;
1498         /* Supported Verbs flow priority number detection. */
1499         err = mlx5_flow_discover_priorities(eth_dev);
1500         if (err < 0) {
1501                 err = -err;
1502                 goto error;
1503         }
1504         priv->config.flow_prio = err;
1505         /*
1506          * Once the device is added to the list of memory event
1507          * callback, its global MR cache table cannot be expanded
1508          * on the fly because of deadlock. If it overflows, lookup
1509          * should be done by searching MR list linearly, which is slow.
1510          */
1511         err = mlx5_mr_btree_init(&priv->mr.cache,
1512                                  MLX5_MR_BTREE_CACHE_N * 2,
1513                                  eth_dev->device->numa_node);
1514         if (err) {
1515                 err = rte_errno;
1516                 goto error;
1517         }
1518         /* Add device to memory callback list. */
1519         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
1520         LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
1521                          priv, mem_event_cb);
1522         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
1523         return eth_dev;
1524 error:
1525         if (priv) {
1526                 if (priv->nl_socket_route >= 0)
1527                         close(priv->nl_socket_route);
1528                 if (priv->nl_socket_rdma >= 0)
1529                         close(priv->nl_socket_rdma);
1530                 if (priv->tcf_context)
1531                         mlx5_flow_tcf_context_destroy(priv->tcf_context);
1532                 if (own_domain_id)
1533                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1534                 rte_free(priv);
1535                 if (eth_dev != NULL)
1536                         eth_dev->data->dev_private = NULL;
1537         }
1538         if (eth_dev != NULL) {
1539                 /* mac_addrs must not be freed alone because part of dev_private */
1540                 eth_dev->data->mac_addrs = NULL;
1541                 rte_eth_dev_release_port(eth_dev);
1542         }
1543         if (sh)
1544                 mlx5_free_shared_ibctx(sh);
1545         assert(err > 0);
1546         rte_errno = err;
1547         return NULL;
1548 }
1549
1550 /**
1551  * Comparison callback to sort device data.
1552  *
1553  * This is meant to be used with qsort().
1554  *
1555  * @param a[in]
1556  *   Pointer to pointer to first data object.
1557  * @param b[in]
1558  *   Pointer to pointer to second data object.
1559  *
1560  * @return
1561  *   0 if both objects are equal, less than 0 if the first argument is less
1562  *   than the second, greater than 0 otherwise.
1563  */
1564 static int
1565 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1566 {
1567         const struct mlx5_switch_info *si_a =
1568                 &((const struct mlx5_dev_spawn_data *)a)->info;
1569         const struct mlx5_switch_info *si_b =
1570                 &((const struct mlx5_dev_spawn_data *)b)->info;
1571         int ret;
1572
1573         /* Master device first. */
1574         ret = si_b->master - si_a->master;
1575         if (ret)
1576                 return ret;
1577         /* Then representor devices. */
1578         ret = si_b->representor - si_a->representor;
1579         if (ret)
1580                 return ret;
1581         /* Unidentified devices come last in no specific order. */
1582         if (!si_a->representor)
1583                 return 0;
1584         /* Order representors by name. */
1585         return si_a->port_name - si_b->port_name;
1586 }
1587
1588 /**
1589  * DPDK callback to register a PCI device.
1590  *
1591  * This function spawns Ethernet devices out of a given PCI device.
1592  *
1593  * @param[in] pci_drv
1594  *   PCI driver structure (mlx5_driver).
1595  * @param[in] pci_dev
1596  *   PCI device information.
1597  *
1598  * @return
1599  *   0 on success, a negative errno value otherwise and rte_errno is set.
1600  */
1601 static int
1602 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1603                struct rte_pci_device *pci_dev)
1604 {
1605         struct ibv_device **ibv_list;
1606         /*
1607          * Number of found IB Devices matching with requested PCI BDF.
1608          * nd != 1 means there are multiple IB devices over the same
1609          * PCI device and we have representors and master.
1610          */
1611         unsigned int nd = 0;
1612         /*
1613          * Number of found IB device Ports. nd = 1 and np = 1..n means
1614          * we have the single multiport IB device, and there may be
1615          * representors attached to some of found ports.
1616          */
1617         unsigned int np = 0;
1618         /*
1619          * Number of DPDK ethernet devices to Spawn - either over
1620          * multiple IB devices or multiple ports of single IB device.
1621          * Actually this is the number of iterations to spawn.
1622          */
1623         unsigned int ns = 0;
1624         struct mlx5_dev_config dev_config;
1625         int ret;
1626
1627         ret = mlx5_init_once();
1628         if (ret) {
1629                 DRV_LOG(ERR, "unable to init PMD global data: %s",
1630                         strerror(rte_errno));
1631                 return -rte_errno;
1632         }
1633         assert(pci_drv == &mlx5_driver);
1634         errno = 0;
1635         ibv_list = mlx5_glue->get_device_list(&ret);
1636         if (!ibv_list) {
1637                 rte_errno = errno ? errno : ENOSYS;
1638                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1639                 return -rte_errno;
1640         }
1641         /*
1642          * First scan the list of all Infiniband devices to find
1643          * matching ones, gathering into the list.
1644          */
1645         struct ibv_device *ibv_match[ret + 1];
1646         int nl_route = -1;
1647         int nl_rdma = -1;
1648         unsigned int i;
1649
1650         while (ret-- > 0) {
1651                 struct rte_pci_addr pci_addr;
1652
1653                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1654                 if (mlx5_ibv_device_to_pci_addr(ibv_list[ret], &pci_addr))
1655                         continue;
1656                 if (pci_dev->addr.domain != pci_addr.domain ||
1657                     pci_dev->addr.bus != pci_addr.bus ||
1658                     pci_dev->addr.devid != pci_addr.devid ||
1659                     pci_dev->addr.function != pci_addr.function)
1660                         continue;
1661                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1662                         ibv_list[ret]->name);
1663                 ibv_match[nd++] = ibv_list[ret];
1664         }
1665         ibv_match[nd] = NULL;
1666         if (!nd) {
1667                 /* No device macthes, just complain and bail out. */
1668                 mlx5_glue->free_device_list(ibv_list);
1669                 DRV_LOG(WARNING,
1670                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
1671                         " are kernel drivers loaded?",
1672                         pci_dev->addr.domain, pci_dev->addr.bus,
1673                         pci_dev->addr.devid, pci_dev->addr.function);
1674                 rte_errno = ENOENT;
1675                 ret = -rte_errno;
1676                 return ret;
1677         }
1678         nl_route = mlx5_nl_init(NETLINK_ROUTE);
1679         nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1680         if (nd == 1) {
1681                 /*
1682                  * Found single matching device may have multiple ports.
1683                  * Each port may be representor, we have to check the port
1684                  * number and check the representors existence.
1685                  */
1686                 if (nl_rdma >= 0)
1687                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1688                 if (!np)
1689                         DRV_LOG(WARNING, "can not get IB device \"%s\""
1690                                          " ports number", ibv_match[0]->name);
1691         }
1692         /*
1693          * Now we can determine the maximal
1694          * amount of devices to be spawned.
1695          */
1696         struct mlx5_dev_spawn_data list[np ? np : nd];
1697
1698         if (np > 1) {
1699                 /*
1700                  * Signle IB device with multiple ports found,
1701                  * it may be E-Switch master device and representors.
1702                  * We have to perform identification trough the ports.
1703                  */
1704                 assert(nl_rdma >= 0);
1705                 assert(ns == 0);
1706                 assert(nd == 1);
1707                 for (i = 1; i <= np; ++i) {
1708                         list[ns].max_port = np;
1709                         list[ns].ibv_port = i;
1710                         list[ns].ibv_dev = ibv_match[0];
1711                         list[ns].eth_dev = NULL;
1712                         list[ns].ifindex = mlx5_nl_ifindex
1713                                         (nl_rdma, list[ns].ibv_dev->name, i);
1714                         if (!list[ns].ifindex) {
1715                                 /*
1716                                  * No network interface index found for the
1717                                  * specified port, it means there is no
1718                                  * representor on this port. It's OK,
1719                                  * there can be disabled ports, for example
1720                                  * if sriov_numvfs < sriov_totalvfs.
1721                                  */
1722                                 continue;
1723                         }
1724                         ret = -1;
1725                         if (nl_route >= 0)
1726                                 ret = mlx5_nl_switch_info
1727                                                (nl_route,
1728                                                 list[ns].ifindex,
1729                                                 &list[ns].info);
1730                         if (ret || (!list[ns].info.representor &&
1731                                     !list[ns].info.master)) {
1732                                 /*
1733                                  * We failed to recognize representors with
1734                                  * Netlink, let's try to perform the task
1735                                  * with sysfs.
1736                                  */
1737                                 ret =  mlx5_sysfs_switch_info
1738                                                 (list[ns].ifindex,
1739                                                  &list[ns].info);
1740                         }
1741                         if (!ret && (list[ns].info.representor ^
1742                                      list[ns].info.master))
1743                                 ns++;
1744                 }
1745                 if (!ns) {
1746                         DRV_LOG(ERR,
1747                                 "unable to recognize master/representors"
1748                                 " on the IB device with multiple ports");
1749                         rte_errno = ENOENT;
1750                         ret = -rte_errno;
1751                         goto exit;
1752                 }
1753         } else {
1754                 /*
1755                  * The existence of several matching entries (nd > 1) means
1756                  * port representors have been instantiated. No existing Verbs
1757                  * call nor sysfs entries can tell them apart, this can only
1758                  * be done through Netlink calls assuming kernel drivers are
1759                  * recent enough to support them.
1760                  *
1761                  * In the event of identification failure through Netlink,
1762                  * try again through sysfs, then:
1763                  *
1764                  * 1. A single IB device matches (nd == 1) with single
1765                  *    port (np=0/1) and is not a representor, assume
1766                  *    no switch support.
1767                  *
1768                  * 2. Otherwise no safe assumptions can be made;
1769                  *    complain louder and bail out.
1770                  */
1771                 np = 1;
1772                 for (i = 0; i != nd; ++i) {
1773                         memset(&list[ns].info, 0, sizeof(list[ns].info));
1774                         list[ns].max_port = 1;
1775                         list[ns].ibv_port = 1;
1776                         list[ns].ibv_dev = ibv_match[i];
1777                         list[ns].eth_dev = NULL;
1778                         list[ns].ifindex = 0;
1779                         if (nl_rdma >= 0)
1780                                 list[ns].ifindex = mlx5_nl_ifindex
1781                                         (nl_rdma, list[ns].ibv_dev->name, 1);
1782                         if (!list[ns].ifindex) {
1783                                 /*
1784                                  * No network interface index found for the
1785                                  * specified device, it means there it is not
1786                                  * a representor/master.
1787                                  */
1788                                 continue;
1789                         }
1790                         ret = -1;
1791                         if (nl_route >= 0)
1792                                 ret = mlx5_nl_switch_info
1793                                                (nl_route,
1794                                                 list[ns].ifindex,
1795                                                 &list[ns].info);
1796                         if (ret || (!list[ns].info.representor &&
1797                                     !list[ns].info.master)) {
1798                                 /*
1799                                  * We failed to recognize representors with
1800                                  * Netlink, let's try to perform the task
1801                                  * with sysfs.
1802                                  */
1803                                 ret =  mlx5_sysfs_switch_info
1804                                                 (list[ns].ifindex,
1805                                                  &list[ns].info);
1806                         }
1807                         if (!ret && (list[ns].info.representor ^
1808                                      list[ns].info.master)) {
1809                                 ns++;
1810                         } else if ((nd == 1) &&
1811                                    !list[ns].info.representor &&
1812                                    !list[ns].info.master) {
1813                                 /*
1814                                  * Single IB device with
1815                                  * one physical port and
1816                                  * attached network device.
1817                                  * May be SRIOV is not enabled
1818                                  * or there is no representors.
1819                                  */
1820                                 DRV_LOG(INFO, "no E-Switch support detected");
1821                                 ns++;
1822                                 break;
1823                         }
1824                 }
1825                 if (!ns) {
1826                         DRV_LOG(ERR,
1827                                 "unable to recognize master/representors"
1828                                 " on the multiple IB devices");
1829                         rte_errno = ENOENT;
1830                         ret = -rte_errno;
1831                         goto exit;
1832                 }
1833         }
1834         assert(ns);
1835         /*
1836          * Sort list to probe devices in natural order for users convenience
1837          * (i.e. master first, then representors from lowest to highest ID).
1838          */
1839         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
1840         /* Default configuration. */
1841         dev_config = (struct mlx5_dev_config){
1842                 .hw_padding = 0,
1843                 .mps = MLX5_ARG_UNSET,
1844                 .tx_vec_en = 1,
1845                 .rx_vec_en = 1,
1846                 .txq_inline = MLX5_ARG_UNSET,
1847                 .txqs_inline = MLX5_ARG_UNSET,
1848                 .txqs_vec = MLX5_ARG_UNSET,
1849                 .inline_max_packet_sz = MLX5_ARG_UNSET,
1850                 .vf_nl_en = 1,
1851                 .mprq = {
1852                         .enabled = 0, /* Disabled by default. */
1853                         .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
1854                         .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
1855                         .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
1856                 },
1857         };
1858         /* Device specific configuration. */
1859         switch (pci_dev->id.device_id) {
1860         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
1861                 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS_BLUEFIELD;
1862                 break;
1863         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1864         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1865         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1866         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1867                 dev_config.vf = 1;
1868                 break;
1869         default:
1870                 break;
1871         }
1872         /* Set architecture-dependent default value if unset. */
1873         if (dev_config.txqs_vec == MLX5_ARG_UNSET)
1874                 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS;
1875         for (i = 0; i != ns; ++i) {
1876                 uint32_t restore;
1877
1878                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
1879                                                  &list[i],
1880                                                  dev_config);
1881                 if (!list[i].eth_dev) {
1882                         if (rte_errno != EBUSY && rte_errno != EEXIST)
1883                                 break;
1884                         /* Device is disabled or already spawned. Ignore it. */
1885                         continue;
1886                 }
1887                 restore = list[i].eth_dev->data->dev_flags;
1888                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
1889                 /* Restore non-PCI flags cleared by the above call. */
1890                 list[i].eth_dev->data->dev_flags |= restore;
1891                 rte_eth_dev_probing_finish(list[i].eth_dev);
1892         }
1893         if (i != ns) {
1894                 DRV_LOG(ERR,
1895                         "probe of PCI device " PCI_PRI_FMT " aborted after"
1896                         " encountering an error: %s",
1897                         pci_dev->addr.domain, pci_dev->addr.bus,
1898                         pci_dev->addr.devid, pci_dev->addr.function,
1899                         strerror(rte_errno));
1900                 ret = -rte_errno;
1901                 /* Roll back. */
1902                 while (i--) {
1903                         if (!list[i].eth_dev)
1904                                 continue;
1905                         mlx5_dev_close(list[i].eth_dev);
1906                         /* mac_addrs must not be freed because in dev_private */
1907                         list[i].eth_dev->data->mac_addrs = NULL;
1908                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
1909                 }
1910                 /* Restore original error. */
1911                 rte_errno = -ret;
1912         } else {
1913                 ret = 0;
1914         }
1915 exit:
1916         /*
1917          * Do the routine cleanup:
1918          * - close opened Netlink sockets
1919          * - free the Infiniband device list
1920          */
1921         if (nl_rdma >= 0)
1922                 close(nl_rdma);
1923         if (nl_route >= 0)
1924                 close(nl_route);
1925         assert(ibv_list);
1926         mlx5_glue->free_device_list(ibv_list);
1927         return ret;
1928 }
1929
1930 /**
1931  * DPDK callback to remove a PCI device.
1932  *
1933  * This function removes all Ethernet devices belong to a given PCI device.
1934  *
1935  * @param[in] pci_dev
1936  *   Pointer to the PCI device.
1937  *
1938  * @return
1939  *   0 on success, the function cannot fail.
1940  */
1941 static int
1942 mlx5_pci_remove(struct rte_pci_device *pci_dev)
1943 {
1944         uint16_t port_id;
1945         struct rte_eth_dev *port;
1946
1947         for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++) {
1948                 port = &rte_eth_devices[port_id];
1949                 if (port->state != RTE_ETH_DEV_UNUSED &&
1950                                 port->device == &pci_dev->device)
1951                         rte_eth_dev_close(port_id);
1952         }
1953         return 0;
1954 }
1955
1956 static const struct rte_pci_id mlx5_pci_id_map[] = {
1957         {
1958                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1959                                PCI_DEVICE_ID_MELLANOX_CONNECTX4)
1960         },
1961         {
1962                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1963                                PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
1964         },
1965         {
1966                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1967                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
1968         },
1969         {
1970                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1971                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
1972         },
1973         {
1974                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1975                                PCI_DEVICE_ID_MELLANOX_CONNECTX5)
1976         },
1977         {
1978                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1979                                PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
1980         },
1981         {
1982                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1983                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
1984         },
1985         {
1986                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1987                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
1988         },
1989         {
1990                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1991                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
1992         },
1993         {
1994                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1995                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
1996         },
1997         {
1998                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1999                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
2000         },
2001         {
2002                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2003                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
2004         },
2005         {
2006                 .vendor_id = 0
2007         }
2008 };
2009
2010 static struct rte_pci_driver mlx5_driver = {
2011         .driver = {
2012                 .name = MLX5_DRIVER_NAME
2013         },
2014         .id_table = mlx5_pci_id_map,
2015         .probe = mlx5_pci_probe,
2016         .remove = mlx5_pci_remove,
2017         .dma_map = mlx5_dma_map,
2018         .dma_unmap = mlx5_dma_unmap,
2019         .drv_flags = (RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
2020                       RTE_PCI_DRV_PROBE_AGAIN),
2021 };
2022
2023 #ifdef RTE_IBVERBS_LINK_DLOPEN
2024
2025 /**
2026  * Suffix RTE_EAL_PMD_PATH with "-glue".
2027  *
2028  * This function performs a sanity check on RTE_EAL_PMD_PATH before
2029  * suffixing its last component.
2030  *
2031  * @param buf[out]
2032  *   Output buffer, should be large enough otherwise NULL is returned.
2033  * @param size
2034  *   Size of @p out.
2035  *
2036  * @return
2037  *   Pointer to @p buf or @p NULL in case suffix cannot be appended.
2038  */
2039 static char *
2040 mlx5_glue_path(char *buf, size_t size)
2041 {
2042         static const char *const bad[] = { "/", ".", "..", NULL };
2043         const char *path = RTE_EAL_PMD_PATH;
2044         size_t len = strlen(path);
2045         size_t off;
2046         int i;
2047
2048         while (len && path[len - 1] == '/')
2049                 --len;
2050         for (off = len; off && path[off - 1] != '/'; --off)
2051                 ;
2052         for (i = 0; bad[i]; ++i)
2053                 if (!strncmp(path + off, bad[i], (int)(len - off)))
2054                         goto error;
2055         i = snprintf(buf, size, "%.*s-glue", (int)len, path);
2056         if (i == -1 || (size_t)i >= size)
2057                 goto error;
2058         return buf;
2059 error:
2060         DRV_LOG(ERR,
2061                 "unable to append \"-glue\" to last component of"
2062                 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
2063                 " please re-configure DPDK");
2064         return NULL;
2065 }
2066
2067 /**
2068  * Initialization routine for run-time dependency on rdma-core.
2069  */
2070 static int
2071 mlx5_glue_init(void)
2072 {
2073         char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
2074         const char *path[] = {
2075                 /*
2076                  * A basic security check is necessary before trusting
2077                  * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
2078                  */
2079                 (geteuid() == getuid() && getegid() == getgid() ?
2080                  getenv("MLX5_GLUE_PATH") : NULL),
2081                 /*
2082                  * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
2083                  * variant, otherwise let dlopen() look up libraries on its
2084                  * own.
2085                  */
2086                 (*RTE_EAL_PMD_PATH ?
2087                  mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
2088         };
2089         unsigned int i = 0;
2090         void *handle = NULL;
2091         void **sym;
2092         const char *dlmsg;
2093
2094         while (!handle && i != RTE_DIM(path)) {
2095                 const char *end;
2096                 size_t len;
2097                 int ret;
2098
2099                 if (!path[i]) {
2100                         ++i;
2101                         continue;
2102                 }
2103                 end = strpbrk(path[i], ":;");
2104                 if (!end)
2105                         end = path[i] + strlen(path[i]);
2106                 len = end - path[i];
2107                 ret = 0;
2108                 do {
2109                         char name[ret + 1];
2110
2111                         ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
2112                                        (int)len, path[i],
2113                                        (!len || *(end - 1) == '/') ? "" : "/");
2114                         if (ret == -1)
2115                                 break;
2116                         if (sizeof(name) != (size_t)ret + 1)
2117                                 continue;
2118                         DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
2119                                 name);
2120                         handle = dlopen(name, RTLD_LAZY);
2121                         break;
2122                 } while (1);
2123                 path[i] = end + 1;
2124                 if (!*end)
2125                         ++i;
2126         }
2127         if (!handle) {
2128                 rte_errno = EINVAL;
2129                 dlmsg = dlerror();
2130                 if (dlmsg)
2131                         DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
2132                 goto glue_error;
2133         }
2134         sym = dlsym(handle, "mlx5_glue");
2135         if (!sym || !*sym) {
2136                 rte_errno = EINVAL;
2137                 dlmsg = dlerror();
2138                 if (dlmsg)
2139                         DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
2140                 goto glue_error;
2141         }
2142         mlx5_glue = *sym;
2143         return 0;
2144 glue_error:
2145         if (handle)
2146                 dlclose(handle);
2147         DRV_LOG(WARNING,
2148                 "cannot initialize PMD due to missing run-time dependency on"
2149                 " rdma-core libraries (libibverbs, libmlx5)");
2150         return -rte_errno;
2151 }
2152
2153 #endif
2154
2155 /**
2156  * Driver initialization routine.
2157  */
2158 RTE_INIT(rte_mlx5_pmd_init)
2159 {
2160         /* Initialize driver log type. */
2161         mlx5_logtype = rte_log_register("pmd.net.mlx5");
2162         if (mlx5_logtype >= 0)
2163                 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
2164
2165         /* Build the static tables for Verbs conversion. */
2166         mlx5_set_ptype_table();
2167         mlx5_set_cksum_table();
2168         mlx5_set_swp_types_table();
2169         /*
2170          * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
2171          * huge pages. Calling ibv_fork_init() during init allows
2172          * applications to use fork() safely for purposes other than
2173          * using this PMD, which is not supported in forked processes.
2174          */
2175         setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
2176         /* Match the size of Rx completion entry to the size of a cacheline. */
2177         if (RTE_CACHE_LINE_SIZE == 128)
2178                 setenv("MLX5_CQE_SIZE", "128", 0);
2179         /*
2180          * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
2181          * cleanup all the Verbs resources even when the device was removed.
2182          */
2183         setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
2184 #ifdef RTE_IBVERBS_LINK_DLOPEN
2185         if (mlx5_glue_init())
2186                 return;
2187         assert(mlx5_glue);
2188 #endif
2189 #ifndef NDEBUG
2190         /* Glue structure must not contain any NULL pointers. */
2191         {
2192                 unsigned int i;
2193
2194                 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
2195                         assert(((const void *const *)mlx5_glue)[i]);
2196         }
2197 #endif
2198         if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
2199                 DRV_LOG(ERR,
2200                         "rdma-core glue \"%s\" mismatch: \"%s\" is required",
2201                         mlx5_glue->version, MLX5_GLUE_VERSION);
2202                 return;
2203         }
2204         mlx5_glue->fork_init();
2205         rte_pci_register(&mlx5_driver);
2206 }
2207
2208 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
2209 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
2210 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");