drivers/net/mlx5/mlx5.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2015 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <assert.h>
  10 #include <dlfcn.h>
  11 #include <stdint.h>
  12 #include <stdlib.h>
  13 #include <errno.h>
  14 #include <net/if.h>
  15 #include <sys/mman.h>
  16 #include <linux/rtnetlink.h>
  17
  18 /* Verbs header. */
  19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  20 #ifdef PEDANTIC
  21 #pragma GCC diagnostic ignored "-Wpedantic"
  22 #endif
  23 #include <infiniband/verbs.h>
  24 #ifdef PEDANTIC
  25 #pragma GCC diagnostic error "-Wpedantic"
  26 #endif
  27
  28 #include <rte_malloc.h>
  29 #include <rte_ethdev_driver.h>
  30 #include <rte_ethdev_pci.h>
  31 #include <rte_pci.h>
  32 #include <rte_bus_pci.h>
  33 #include <rte_common.h>
  34 #include <rte_config.h>
  35 #include <rte_kvargs.h>
  36 #include <rte_rwlock.h>
  37 #include <rte_spinlock.h>
  38 #include <rte_string_fns.h>
  39 #include <rte_alarm.h>
  40
  41 #include "mlx5.h"
  42 #include "mlx5_utils.h"
  43 #include "mlx5_rxtx.h"
  44 #include "mlx5_autoconf.h"
  45 #include "mlx5_defs.h"
  46 #include "mlx5_glue.h"
  47 #include "mlx5_mr.h"
  48 #include "mlx5_flow.h"
  49
  50 /* Device parameter to enable RX completion queue compression. */
  51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
  52
  53 /* Device parameter to enable RX completion entry padding to 128B. */
  54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
  55
  56 /* Device parameter to enable padding Rx packet to cacheline size. */
  57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
  58
  59 /* Device parameter to enable Multi-Packet Rx queue. */
  60 #define MLX5_RX_MPRQ_EN "mprq_en"
  61
  62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
  63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
  64
  65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
  66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
  67
  68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
  69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
  70
  71 /* Device parameter to configure inline send. Deprecated, ignored.*/
  72 #define MLX5_TXQ_INLINE "txq_inline"
  73
  74 /* Device parameter to limit packet size to inline with ordinary SEND. */
  75 #define MLX5_TXQ_INLINE_MAX "txq_inline_max"
  76
  77 /* Device parameter to configure minimal data size to inline. */
  78 #define MLX5_TXQ_INLINE_MIN "txq_inline_min"
  79
  80 /* Device parameter to limit packet size to inline with Enhanced MPW. */
  81 #define MLX5_TXQ_INLINE_MPW "txq_inline_mpw"
  82
  83 /*
  84  * Device parameter to configure the number of TX queues threshold for
  85  * enabling inline send.
  86  */
  87 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
  88
  89 /*
  90  * Device parameter to configure the number of TX queues threshold for
  91  * enabling vectorized Tx, deprecated, ignored (no vectorized Tx routines).
  92  */
  93 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
  94
  95 /* Device parameter to enable multi-packet send WQEs. */
  96 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
  97
  98 /*
  99  * Device parameter to include 2 dsegs in the title WQEBB.
 100  * Deprecated, ignored.
 101  */
 102 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
 103
 104 /*
 105  * Device parameter to limit the size of inlining packet.
 106  * Deprecated, ignored.
 107  */
 108 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
 109
 110 /*
 111  * Device parameter to enable hardware Tx vector.
 112  * Deprecated, ignored (no vectorized Tx routines anymore).
 113  */
 114 #define MLX5_TX_VEC_EN "tx_vec_en"
 115
 116 /* Device parameter to enable hardware Rx vector. */
 117 #define MLX5_RX_VEC_EN "rx_vec_en"
 118
 119 /* Allow L3 VXLAN flow creation. */
 120 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
 121
 122 /* Activate DV E-Switch flow steering. */
 123 #define MLX5_DV_ESW_EN "dv_esw_en"
 124
 125 /* Activate DV flow steering. */
 126 #define MLX5_DV_FLOW_EN "dv_flow_en"
 127
 128 /* Activate Netlink support in VF mode. */
 129 #define MLX5_VF_NL_EN "vf_nl_en"
 130
 131 /* Enable extending memsegs when creating a MR. */
 132 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
 133
 134 /* Select port representors to instantiate. */
 135 #define MLX5_REPRESENTOR "representor"
 136
 137 /* Device parameter to configure the maximum number of dump files per queue. */
 138 #define MLX5_MAX_DUMP_FILES_NUM "max_dump_files_num"
 139
 140 /* Configure timeout of LRO session (in microseconds). */
 141 #define MLX5_LRO_TIMEOUT_USEC "lro_timeout_usec"
 142
 143 #ifndef HAVE_IBV_MLX5_MOD_MPW
 144 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
 145 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
 146 #endif
 147
 148 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
 149 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
 150 #endif
 151
 152 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
 153
 154 /* Shared memory between primary and secondary processes. */
 155 struct mlx5_shared_data *mlx5_shared_data;
 156
 157 /* Spinlock for mlx5_shared_data allocation. */
 158 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
 159
 160 /* Process local data for secondary processes. */
 161 static struct mlx5_local_data mlx5_local_data;
 162
 163 /** Driver-specific log messages type. */
 164 int mlx5_logtype;
 165
 166 /** Data associated with devices to spawn. */
 167 struct mlx5_dev_spawn_data {
 168         uint32_t ifindex; /**< Network interface index. */
 169         uint32_t max_port; /**< IB device maximal port index. */
 170         uint32_t ibv_port; /**< IB device physical port index. */
 171         struct mlx5_switch_info info; /**< Switch information. */
 172         struct ibv_device *ibv_dev; /**< Associated IB device. */
 173         struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
 174         struct rte_pci_device *pci_dev; /**< Backend PCI device. */
 175 };
 176
 177 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
 178 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
 179
 180 /**
 181  * Initialize the counters management structure.
 182  *
 183  * @param[in] sh
 184  *   Pointer to mlx5_ibv_shared object to free
 185  */
 186 static void
 187 mlx5_flow_counters_mng_init(struct mlx5_ibv_shared *sh)
 188 {
 189         uint8_t i;
 190
 191         TAILQ_INIT(&sh->cmng.flow_counters);
 192         for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i)
 193                 TAILQ_INIT(&sh->cmng.ccont[i].pool_list);
 194 }
 195
 196 /**
 197  * Destroy all the resources allocated for a counter memory management.
 198  *
 199  * @param[in] mng
 200  *   Pointer to the memory management structure.
 201  */
 202 static void
 203 mlx5_flow_destroy_counter_stat_mem_mng(struct mlx5_counter_stats_mem_mng *mng)
 204 {
 205         uint8_t *mem = (uint8_t *)(uintptr_t)mng->raws[0].data;
 206
 207         LIST_REMOVE(mng, next);
 208         claim_zero(mlx5_devx_cmd_destroy(mng->dm));
 209         claim_zero(mlx5_glue->devx_umem_dereg(mng->umem));
 210         rte_free(mem);
 211 }
 212
 213 /**
 214  * Close and release all the resources of the counters management.
 215  *
 216  * @param[in] sh
 217  *   Pointer to mlx5_ibv_shared object to free.
 218  */
 219 static void
 220 mlx5_flow_counters_mng_close(struct mlx5_ibv_shared *sh)
 221 {
 222         struct mlx5_counter_stats_mem_mng *mng;
 223         uint8_t i;
 224         int j;
 225         int retries = 1024;
 226
 227         rte_errno = 0;
 228         while (--retries) {
 229                 rte_eal_alarm_cancel(mlx5_flow_query_alarm, sh);
 230                 if (rte_errno != EINPROGRESS)
 231                         break;
 232                 rte_pause();
 233         }
 234         for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i) {
 235                 struct mlx5_flow_counter_pool *pool;
 236                 uint32_t batch = !!(i % 2);
 237
 238                 if (!sh->cmng.ccont[i].pools)
 239                         continue;
 240                 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
 241                 while (pool) {
 242                         if (batch) {
 243                                 if (pool->min_dcs)
 244                                         claim_zero
 245                                         (mlx5_devx_cmd_destroy(pool->min_dcs));
 246                         }
 247                         for (j = 0; j < MLX5_COUNTERS_PER_POOL; ++j) {
 248                                 if (pool->counters_raw[j].action)
 249                                         claim_zero
 250                                         (mlx5_glue->destroy_flow_action
 251                                                (pool->counters_raw[j].action));
 252                                 if (!batch && pool->counters_raw[j].dcs)
 253                                         claim_zero(mlx5_devx_cmd_destroy
 254                                                   (pool->counters_raw[j].dcs));
 255                         }
 256                         TAILQ_REMOVE(&sh->cmng.ccont[i].pool_list, pool,
 257                                      next);
 258                         rte_free(pool);
 259                         pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
 260                 }
 261                 rte_free(sh->cmng.ccont[i].pools);
 262         }
 263         mng = LIST_FIRST(&sh->cmng.mem_mngs);
 264         while (mng) {
 265                 mlx5_flow_destroy_counter_stat_mem_mng(mng);
 266                 mng = LIST_FIRST(&sh->cmng.mem_mngs);
 267         }
 268         memset(&sh->cmng, 0, sizeof(sh->cmng));
 269 }
 270
 271 /**
 272  * Extract pdn of PD object using DV API.
 273  *
 274  * @param[in] pd
 275  *   Pointer to the verbs PD object.
 276  * @param[out] pdn
 277  *   Pointer to the PD object number variable.
 278  *
 279  * @return
 280  *   0 on success, error value otherwise.
 281  */
 282 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 283 static int
 284 mlx5_get_pdn(struct ibv_pd *pd __rte_unused, uint32_t *pdn __rte_unused)
 285 {
 286         struct mlx5dv_obj obj;
 287         struct mlx5dv_pd pd_info;
 288         int ret = 0;
 289
 290         obj.pd.in = pd;
 291         obj.pd.out = &pd_info;
 292         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
 293         if (ret) {
 294                 DRV_LOG(DEBUG, "Fail to get PD object info");
 295                 return ret;
 296         }
 297         *pdn = pd_info.pdn;
 298         return 0;
 299 }
 300 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
 301
 302 /**
 303  * Allocate shared IB device context. If there is multiport device the
 304  * master and representors will share this context, if there is single
 305  * port dedicated IB device, the context will be used by only given
 306  * port due to unification.
 307  *
 308  * Routine first searches the context for the specified IB device name,
 309  * if found the shared context assumed and reference counter is incremented.
 310  * If no context found the new one is created and initialized with specified
 311  * IB device context and parameters.
 312  *
 313  * @param[in] spawn
 314  *   Pointer to the IB device attributes (name, port, etc).
 315  *
 316  * @return
 317  *   Pointer to mlx5_ibv_shared object on success,
 318  *   otherwise NULL and rte_errno is set.
 319  */
 320 static struct mlx5_ibv_shared *
 321 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
 322 {
 323         struct mlx5_ibv_shared *sh;
 324         int err = 0;
 325         uint32_t i;
 326
 327         assert(spawn);
 328         /* Secondary process should not create the shared context. */
 329         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 330         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 331         /* Search for IB context by device name. */
 332         LIST_FOREACH(sh, &mlx5_ibv_list, next) {
 333                 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
 334                         sh->refcnt++;
 335                         goto exit;
 336                 }
 337         }
 338         /* No device found, we have to create new shared context. */
 339         assert(spawn->max_port);
 340         sh = rte_zmalloc("ethdev shared ib context",
 341                          sizeof(struct mlx5_ibv_shared) +
 342                          spawn->max_port *
 343                          sizeof(struct mlx5_ibv_shared_port),
 344                          RTE_CACHE_LINE_SIZE);
 345         if (!sh) {
 346                 DRV_LOG(ERR, "shared context allocation failure");
 347                 rte_errno  = ENOMEM;
 348                 goto exit;
 349         }
 350         /* Try to open IB device with DV first, then usual Verbs. */
 351         errno = 0;
 352         sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
 353         if (sh->ctx) {
 354                 sh->devx = 1;
 355                 DRV_LOG(DEBUG, "DevX is supported");
 356         } else {
 357                 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
 358                 if (!sh->ctx) {
 359                         err = errno ? errno : ENODEV;
 360                         goto error;
 361                 }
 362                 DRV_LOG(DEBUG, "DevX is NOT supported");
 363         }
 364         err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
 365         if (err) {
 366                 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
 367                 goto error;
 368         }
 369         sh->refcnt = 1;
 370         sh->max_port = spawn->max_port;
 371         strncpy(sh->ibdev_name, sh->ctx->device->name,
 372                 sizeof(sh->ibdev_name));
 373         strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
 374                 sizeof(sh->ibdev_path));
 375         sh->pci_dev = spawn->pci_dev;
 376         pthread_mutex_init(&sh->intr_mutex, NULL);
 377         /*
 378          * Setting port_id to max unallowed value means
 379          * there is no interrupt subhandler installed for
 380          * the given port index i.
 381          */
 382         for (i = 0; i < sh->max_port; i++)
 383                 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
 384         sh->pd = mlx5_glue->alloc_pd(sh->ctx);
 385         if (sh->pd == NULL) {
 386                 DRV_LOG(ERR, "PD allocation failure");
 387                 err = ENOMEM;
 388                 goto error;
 389         }
 390 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 391         err = mlx5_get_pdn(sh->pd, &sh->pdn);
 392         if (err) {
 393                 DRV_LOG(ERR, "Fail to extract pdn from PD");
 394                 goto error;
 395         }
 396 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
 397         /*
 398          * Once the device is added to the list of memory event
 399          * callback, its global MR cache table cannot be expanded
 400          * on the fly because of deadlock. If it overflows, lookup
 401          * should be done by searching MR list linearly, which is slow.
 402          *
 403          * At this point the device is not added to the memory
 404          * event list yet, context is just being created.
 405          */
 406         err = mlx5_mr_btree_init(&sh->mr.cache,
 407                                  MLX5_MR_BTREE_CACHE_N * 2,
 408                                  sh->pci_dev->device.numa_node);
 409         if (err) {
 410                 err = rte_errno;
 411                 goto error;
 412         }
 413         mlx5_flow_counters_mng_init(sh);
 414         /* Add device to memory callback list. */
 415         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
 416         LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
 417                          sh, mem_event_cb);
 418         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
 419         /* Add context to the global device list. */
 420         LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
 421 exit:
 422         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 423         return sh;
 424 error:
 425         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 426         assert(sh);
 427         if (sh->pd)
 428                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 429         if (sh->ctx)
 430                 claim_zero(mlx5_glue->close_device(sh->ctx));
 431         rte_free(sh);
 432         assert(err > 0);
 433         rte_errno = err;
 434         return NULL;
 435 }
 436
 437 /**
 438  * Free shared IB device context. Decrement counter and if zero free
 439  * all allocated resources and close handles.
 440  *
 441  * @param[in] sh
 442  *   Pointer to mlx5_ibv_shared object to free
 443  */
 444 static void
 445 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
 446 {
 447         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 448 #ifndef NDEBUG
 449         /* Check the object presence in the list. */
 450         struct mlx5_ibv_shared *lctx;
 451
 452         LIST_FOREACH(lctx, &mlx5_ibv_list, next)
 453                 if (lctx == sh)
 454                         break;
 455         assert(lctx);
 456         if (lctx != sh) {
 457                 DRV_LOG(ERR, "Freeing non-existing shared IB context");
 458                 goto exit;
 459         }
 460 #endif
 461         assert(sh);
 462         assert(sh->refcnt);
 463         /* Secondary process should not free the shared context. */
 464         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 465         if (--sh->refcnt)
 466                 goto exit;
 467         /* Release created Memory Regions. */
 468         mlx5_mr_release(sh);
 469         /* Remove from memory callback device list. */
 470         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
 471         LIST_REMOVE(sh, mem_event_cb);
 472         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
 473         /* Remove context from the global device list. */
 474         LIST_REMOVE(sh, next);
 475         /*
 476          *  Ensure there is no async event handler installed.
 477          *  Only primary process handles async device events.
 478          **/
 479         mlx5_flow_counters_mng_close(sh);
 480         assert(!sh->intr_cnt);
 481         if (sh->intr_cnt)
 482                 mlx5_intr_callback_unregister
 483                         (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
 484         pthread_mutex_destroy(&sh->intr_mutex);
 485         if (sh->pd)
 486                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 487         if (sh->ctx)
 488                 claim_zero(mlx5_glue->close_device(sh->ctx));
 489         rte_free(sh);
 490 exit:
 491         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 492 }
 493
 494 /**
 495  * Initialize DR related data within private structure.
 496  * Routine checks the reference counter and does actual
 497  * resources creation/initialization only if counter is zero.
 498  *
 499  * @param[in] priv
 500  *   Pointer to the private device data structure.
 501  *
 502  * @return
 503  *   Zero on success, positive error code otherwise.
 504  */
 505 static int
 506 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 507 {
 508 #ifdef HAVE_MLX5DV_DR
 509         struct mlx5_ibv_shared *sh = priv->sh;
 510         int err = 0;
 511         void *domain;
 512
 513         assert(sh);
 514         if (sh->dv_refcnt) {
 515                 /* Shared DV/DR structures is already initialized. */
 516                 sh->dv_refcnt++;
 517                 priv->dr_shared = 1;
 518                 return 0;
 519         }
 520         /* Reference counter is zero, we should initialize structures. */
 521         domain = mlx5_glue->dr_create_domain(sh->ctx,
 522                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 523         if (!domain) {
 524                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 525                 err = errno;
 526                 goto error;
 527         }
 528         sh->rx_domain = domain;
 529         domain = mlx5_glue->dr_create_domain(sh->ctx,
 530                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 531         if (!domain) {
 532                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 533                 err = errno;
 534                 goto error;
 535         }
 536         pthread_mutex_init(&sh->dv_mutex, NULL);
 537         sh->tx_domain = domain;
 538 #ifdef HAVE_MLX5DV_DR_ESWITCH
 539         if (priv->config.dv_esw_en) {
 540                 domain  = mlx5_glue->dr_create_domain
 541                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 542                 if (!domain) {
 543                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 544                         err = errno;
 545                         goto error;
 546                 }
 547                 sh->fdb_domain = domain;
 548                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 549         }
 550 #endif
 551         sh->dv_refcnt++;
 552         priv->dr_shared = 1;
 553         return 0;
 554
 555 error:
 556        /* Rollback the created objects. */
 557         if (sh->rx_domain) {
 558                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 559                 sh->rx_domain = NULL;
 560         }
 561         if (sh->tx_domain) {
 562                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 563                 sh->tx_domain = NULL;
 564         }
 565         if (sh->fdb_domain) {
 566                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 567                 sh->fdb_domain = NULL;
 568         }
 569         if (sh->esw_drop_action) {
 570                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 571                 sh->esw_drop_action = NULL;
 572         }
 573         return err;
 574 #else
 575         (void)priv;
 576         return 0;
 577 #endif
 578 }
 579
 580 /**
 581  * Destroy DR related data within private structure.
 582  *
 583  * @param[in] priv
 584  *   Pointer to the private device data structure.
 585  */
 586 static void
 587 mlx5_free_shared_dr(struct mlx5_priv *priv)
 588 {
 589 #ifdef HAVE_MLX5DV_DR
 590         struct mlx5_ibv_shared *sh;
 591
 592         if (!priv->dr_shared)
 593                 return;
 594         priv->dr_shared = 0;
 595         sh = priv->sh;
 596         assert(sh);
 597         assert(sh->dv_refcnt);
 598         if (sh->dv_refcnt && --sh->dv_refcnt)
 599                 return;
 600         if (sh->rx_domain) {
 601                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 602                 sh->rx_domain = NULL;
 603         }
 604         if (sh->tx_domain) {
 605                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 606                 sh->tx_domain = NULL;
 607         }
 608 #ifdef HAVE_MLX5DV_DR_ESWITCH
 609         if (sh->fdb_domain) {
 610                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 611                 sh->fdb_domain = NULL;
 612         }
 613         if (sh->esw_drop_action) {
 614                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 615                 sh->esw_drop_action = NULL;
 616         }
 617 #endif
 618         pthread_mutex_destroy(&sh->dv_mutex);
 619 #else
 620         (void)priv;
 621 #endif
 622 }
 623
 624 /**
 625  * Initialize shared data between primary and secondary process.
 626  *
 627  * A memzone is reserved by primary process and secondary processes attach to
 628  * the memzone.
 629  *
 630  * @return
 631  *   0 on success, a negative errno value otherwise and rte_errno is set.
 632  */
 633 static int
 634 mlx5_init_shared_data(void)
 635 {
 636         const struct rte_memzone *mz;
 637         int ret = 0;
 638
 639         rte_spinlock_lock(&mlx5_shared_data_lock);
 640         if (mlx5_shared_data == NULL) {
 641                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 642                         /* Allocate shared memory. */
 643                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 644                                                  sizeof(*mlx5_shared_data),
 645                                                  SOCKET_ID_ANY, 0);
 646                         if (mz == NULL) {
 647                                 DRV_LOG(ERR,
 648                                         "Cannot allocate mlx5 shared data\n");
 649                                 ret = -rte_errno;
 650                                 goto error;
 651                         }
 652                         mlx5_shared_data = mz->addr;
 653                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 654                         rte_spinlock_init(&mlx5_shared_data->lock);
 655                 } else {
 656                         /* Lookup allocated shared memory. */
 657                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 658                         if (mz == NULL) {
 659                                 DRV_LOG(ERR,
 660                                         "Cannot attach mlx5 shared data\n");
 661                                 ret = -rte_errno;
 662                                 goto error;
 663                         }
 664                         mlx5_shared_data = mz->addr;
 665                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 666                 }
 667         }
 668 error:
 669         rte_spinlock_unlock(&mlx5_shared_data_lock);
 670         return ret;
 671 }
 672
 673 /**
 674  * Retrieve integer value from environment variable.
 675  *
 676  * @param[in] name
 677  *   Environment variable name.
 678  *
 679  * @return
 680  *   Integer value, 0 if the variable is not set.
 681  */
 682 int
 683 mlx5_getenv_int(const char *name)
 684 {
 685         const char *val = getenv(name);
 686
 687         if (val == NULL)
 688                 return 0;
 689         return atoi(val);
 690 }
 691
 692 /**
 693  * Verbs callback to allocate a memory. This function should allocate the space
 694  * according to the size provided residing inside a huge page.
 695  * Please note that all allocation must respect the alignment from libmlx5
 696  * (i.e. currently sysconf(_SC_PAGESIZE)).
 697  *
 698  * @param[in] size
 699  *   The size in bytes of the memory to allocate.
 700  * @param[in] data
 701  *   A pointer to the callback data.
 702  *
 703  * @return
 704  *   Allocated buffer, NULL otherwise and rte_errno is set.
 705  */
 706 static void *
 707 mlx5_alloc_verbs_buf(size_t size, void *data)
 708 {
 709         struct mlx5_priv *priv = data;
 710         void *ret;
 711         size_t alignment = sysconf(_SC_PAGESIZE);
 712         unsigned int socket = SOCKET_ID_ANY;
 713
 714         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
 715                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 716
 717                 socket = ctrl->socket;
 718         } else if (priv->verbs_alloc_ctx.type ==
 719                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
 720                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 721
 722                 socket = ctrl->socket;
 723         }
 724         assert(data != NULL);
 725         ret = rte_malloc_socket(__func__, size, alignment, socket);
 726         if (!ret && size)
 727                 rte_errno = ENOMEM;
 728         return ret;
 729 }
 730
 731 /**
 732  * Verbs callback to free a memory.
 733  *
 734  * @param[in] ptr
 735  *   A pointer to the memory to free.
 736  * @param[in] data
 737  *   A pointer to the callback data.
 738  */
 739 static void
 740 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 741 {
 742         assert(data != NULL);
 743         rte_free(ptr);
 744 }
 745
 746 /**
 747  * DPDK callback to add udp tunnel port
 748  *
 749  * @param[in] dev
 750  *   A pointer to eth_dev
 751  * @param[in] udp_tunnel
 752  *   A pointer to udp tunnel
 753  *
 754  * @return
 755  *   0 on valid udp ports and tunnels, -ENOTSUP otherwise.
 756  */
 757 int
 758 mlx5_udp_tunnel_port_add(struct rte_eth_dev *dev __rte_unused,
 759                          struct rte_eth_udp_tunnel *udp_tunnel)
 760 {
 761         assert(udp_tunnel != NULL);
 762         if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN &&
 763             udp_tunnel->udp_port == 4789)
 764                 return 0;
 765         if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN_GPE &&
 766             udp_tunnel->udp_port == 4790)
 767                 return 0;
 768         return -ENOTSUP;
 769 }
 770
 771 /**
 772  * Initialize process private data structure.
 773  *
 774  * @param dev
 775  *   Pointer to Ethernet device structure.
 776  *
 777  * @return
 778  *   0 on success, a negative errno value otherwise and rte_errno is set.
 779  */
 780 int
 781 mlx5_proc_priv_init(struct rte_eth_dev *dev)
 782 {
 783         struct mlx5_priv *priv = dev->data->dev_private;
 784         struct mlx5_proc_priv *ppriv;
 785         size_t ppriv_size;
 786
 787         /*
 788          * UAR register table follows the process private structure. BlueFlame
 789          * registers for Tx queues are stored in the table.
 790          */
 791         ppriv_size =
 792                 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
 793         ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
 794                                   RTE_CACHE_LINE_SIZE, dev->device->numa_node);
 795         if (!ppriv) {
 796                 rte_errno = ENOMEM;
 797                 return -rte_errno;
 798         }
 799         ppriv->uar_table_sz = ppriv_size;
 800         dev->process_private = ppriv;
 801         return 0;
 802 }
 803
 804 /**
 805  * Un-initialize process private data structure.
 806  *
 807  * @param dev
 808  *   Pointer to Ethernet device structure.
 809  */
 810 static void
 811 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
 812 {
 813         if (!dev->process_private)
 814                 return;
 815         rte_free(dev->process_private);
 816         dev->process_private = NULL;
 817 }
 818
 819 /**
 820  * DPDK callback to close the device.
 821  *
 822  * Destroy all queues and objects, free memory.
 823  *
 824  * @param dev
 825  *   Pointer to Ethernet device structure.
 826  */
 827 static void
 828 mlx5_dev_close(struct rte_eth_dev *dev)
 829 {
 830         struct mlx5_priv *priv = dev->data->dev_private;
 831         unsigned int i;
 832         int ret;
 833
 834         DRV_LOG(DEBUG, "port %u closing device \"%s\"",
 835                 dev->data->port_id,
 836                 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
 837         /* In case mlx5_dev_stop() has not been called. */
 838         mlx5_dev_interrupt_handler_uninstall(dev);
 839         mlx5_traffic_disable(dev);
 840         mlx5_flow_flush(dev, NULL);
 841         /* Prevent crashes when queues are still in use. */
 842         dev->rx_pkt_burst = removed_rx_burst;
 843         dev->tx_pkt_burst = removed_tx_burst;
 844         rte_wmb();
 845         /* Disable datapath on secondary process. */
 846         mlx5_mp_req_stop_rxtx(dev);
 847         if (priv->rxqs != NULL) {
 848                 /* XXX race condition if mlx5_rx_burst() is still running. */
 849                 usleep(1000);
 850                 for (i = 0; (i != priv->rxqs_n); ++i)
 851                         mlx5_rxq_release(dev, i);
 852                 priv->rxqs_n = 0;
 853                 priv->rxqs = NULL;
 854         }
 855         if (priv->txqs != NULL) {
 856                 /* XXX race condition if mlx5_tx_burst() is still running. */
 857                 usleep(1000);
 858                 for (i = 0; (i != priv->txqs_n); ++i)
 859                         mlx5_txq_release(dev, i);
 860                 priv->txqs_n = 0;
 861                 priv->txqs = NULL;
 862         }
 863         mlx5_proc_priv_uninit(dev);
 864         mlx5_mprq_free_mp(dev);
 865         mlx5_free_shared_dr(priv);
 866         if (priv->rss_conf.rss_key != NULL)
 867                 rte_free(priv->rss_conf.rss_key);
 868         if (priv->reta_idx != NULL)
 869                 rte_free(priv->reta_idx);
 870         if (priv->config.vf)
 871                 mlx5_nl_mac_addr_flush(dev);
 872         if (priv->nl_socket_route >= 0)
 873                 close(priv->nl_socket_route);
 874         if (priv->nl_socket_rdma >= 0)
 875                 close(priv->nl_socket_rdma);
 876         if (priv->vmwa_context)
 877                 mlx5_vlan_vmwa_exit(priv->vmwa_context);
 878         if (priv->sh) {
 879                 /*
 880                  * Free the shared context in last turn, because the cleanup
 881                  * routines above may use some shared fields, like
 882                  * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
 883                  * ifindex if Netlink fails.
 884                  */
 885                 mlx5_free_shared_ibctx(priv->sh);
 886                 priv->sh = NULL;
 887         }
 888         ret = mlx5_hrxq_verify(dev);
 889         if (ret)
 890                 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
 891                         dev->data->port_id);
 892         ret = mlx5_ind_table_obj_verify(dev);
 893         if (ret)
 894                 DRV_LOG(WARNING, "port %u some indirection table still remain",
 895                         dev->data->port_id);
 896         ret = mlx5_rxq_obj_verify(dev);
 897         if (ret)
 898                 DRV_LOG(WARNING, "port %u some Rx queue objects still remain",
 899                         dev->data->port_id);
 900         ret = mlx5_rxq_verify(dev);
 901         if (ret)
 902                 DRV_LOG(WARNING, "port %u some Rx queues still remain",
 903                         dev->data->port_id);
 904         ret = mlx5_txq_ibv_verify(dev);
 905         if (ret)
 906                 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
 907                         dev->data->port_id);
 908         ret = mlx5_txq_verify(dev);
 909         if (ret)
 910                 DRV_LOG(WARNING, "port %u some Tx queues still remain",
 911                         dev->data->port_id);
 912         ret = mlx5_flow_verify(dev);
 913         if (ret)
 914                 DRV_LOG(WARNING, "port %u some flows still remain",
 915                         dev->data->port_id);
 916         if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
 917                 unsigned int c = 0;
 918                 uint16_t port_id;
 919
 920                 RTE_ETH_FOREACH_DEV_OF(port_id, dev->device) {
 921                         struct mlx5_priv *opriv =
 922                                 rte_eth_devices[port_id].data->dev_private;
 923
 924                         if (!opriv ||
 925                             opriv->domain_id != priv->domain_id ||
 926                             &rte_eth_devices[port_id] == dev)
 927                                 continue;
 928                         ++c;
 929                 }
 930                 if (!c)
 931                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
 932         }
 933         memset(priv, 0, sizeof(*priv));
 934         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
 935         /*
 936          * Reset mac_addrs to NULL such that it is not freed as part of
 937          * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
 938          * it is freed when dev_private is freed.
 939          */
 940         dev->data->mac_addrs = NULL;
 941 }
 942
 943 const struct eth_dev_ops mlx5_dev_ops = {
 944         .dev_configure = mlx5_dev_configure,
 945         .dev_start = mlx5_dev_start,
 946         .dev_stop = mlx5_dev_stop,
 947         .dev_set_link_down = mlx5_set_link_down,
 948         .dev_set_link_up = mlx5_set_link_up,
 949         .dev_close = mlx5_dev_close,
 950         .promiscuous_enable = mlx5_promiscuous_enable,
 951         .promiscuous_disable = mlx5_promiscuous_disable,
 952         .allmulticast_enable = mlx5_allmulticast_enable,
 953         .allmulticast_disable = mlx5_allmulticast_disable,
 954         .link_update = mlx5_link_update,
 955         .stats_get = mlx5_stats_get,
 956         .stats_reset = mlx5_stats_reset,
 957         .xstats_get = mlx5_xstats_get,
 958         .xstats_reset = mlx5_xstats_reset,
 959         .xstats_get_names = mlx5_xstats_get_names,
 960         .fw_version_get = mlx5_fw_version_get,
 961         .dev_infos_get = mlx5_dev_infos_get,
 962         .read_clock = mlx5_read_clock,
 963         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
 964         .vlan_filter_set = mlx5_vlan_filter_set,
 965         .rx_queue_setup = mlx5_rx_queue_setup,
 966         .tx_queue_setup = mlx5_tx_queue_setup,
 967         .rx_queue_release = mlx5_rx_queue_release,
 968         .tx_queue_release = mlx5_tx_queue_release,
 969         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
 970         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
 971         .mac_addr_remove = mlx5_mac_addr_remove,
 972         .mac_addr_add = mlx5_mac_addr_add,
 973         .mac_addr_set = mlx5_mac_addr_set,
 974         .set_mc_addr_list = mlx5_set_mc_addr_list,
 975         .mtu_set = mlx5_dev_set_mtu,
 976         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
 977         .vlan_offload_set = mlx5_vlan_offload_set,
 978         .reta_update = mlx5_dev_rss_reta_update,
 979         .reta_query = mlx5_dev_rss_reta_query,
 980         .rss_hash_update = mlx5_rss_hash_update,
 981         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
 982         .filter_ctrl = mlx5_dev_filter_ctrl,
 983         .rx_descriptor_status = mlx5_rx_descriptor_status,
 984         .tx_descriptor_status = mlx5_tx_descriptor_status,
 985         .rx_queue_count = mlx5_rx_queue_count,
 986         .rx_queue_intr_enable = mlx5_rx_intr_enable,
 987         .rx_queue_intr_disable = mlx5_rx_intr_disable,
 988         .is_removed = mlx5_is_removed,
 989         .udp_tunnel_port_add  = mlx5_udp_tunnel_port_add,
 990 };
 991
 992 /* Available operations from secondary process. */
 993 static const struct eth_dev_ops mlx5_dev_sec_ops = {
 994         .stats_get = mlx5_stats_get,
 995         .stats_reset = mlx5_stats_reset,
 996         .xstats_get = mlx5_xstats_get,
 997         .xstats_reset = mlx5_xstats_reset,
 998         .xstats_get_names = mlx5_xstats_get_names,
 999         .fw_version_get = mlx5_fw_version_get,
1000         .dev_infos_get = mlx5_dev_infos_get,
1001         .rx_descriptor_status = mlx5_rx_descriptor_status,
1002         .tx_descriptor_status = mlx5_tx_descriptor_status,
1003 };
1004
1005 /* Available operations in flow isolated mode. */
1006 const struct eth_dev_ops mlx5_dev_ops_isolate = {
1007         .dev_configure = mlx5_dev_configure,
1008         .dev_start = mlx5_dev_start,
1009         .dev_stop = mlx5_dev_stop,
1010         .dev_set_link_down = mlx5_set_link_down,
1011         .dev_set_link_up = mlx5_set_link_up,
1012         .dev_close = mlx5_dev_close,
1013         .promiscuous_enable = mlx5_promiscuous_enable,
1014         .promiscuous_disable = mlx5_promiscuous_disable,
1015         .allmulticast_enable = mlx5_allmulticast_enable,
1016         .allmulticast_disable = mlx5_allmulticast_disable,
1017         .link_update = mlx5_link_update,
1018         .stats_get = mlx5_stats_get,
1019         .stats_reset = mlx5_stats_reset,
1020         .xstats_get = mlx5_xstats_get,
1021         .xstats_reset = mlx5_xstats_reset,
1022         .xstats_get_names = mlx5_xstats_get_names,
1023         .fw_version_get = mlx5_fw_version_get,
1024         .dev_infos_get = mlx5_dev_infos_get,
1025         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1026         .vlan_filter_set = mlx5_vlan_filter_set,
1027         .rx_queue_setup = mlx5_rx_queue_setup,
1028         .tx_queue_setup = mlx5_tx_queue_setup,
1029         .rx_queue_release = mlx5_rx_queue_release,
1030         .tx_queue_release = mlx5_tx_queue_release,
1031         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1032         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1033         .mac_addr_remove = mlx5_mac_addr_remove,
1034         .mac_addr_add = mlx5_mac_addr_add,
1035         .mac_addr_set = mlx5_mac_addr_set,
1036         .set_mc_addr_list = mlx5_set_mc_addr_list,
1037         .mtu_set = mlx5_dev_set_mtu,
1038         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1039         .vlan_offload_set = mlx5_vlan_offload_set,
1040         .filter_ctrl = mlx5_dev_filter_ctrl,
1041         .rx_descriptor_status = mlx5_rx_descriptor_status,
1042         .tx_descriptor_status = mlx5_tx_descriptor_status,
1043         .rx_queue_intr_enable = mlx5_rx_intr_enable,
1044         .rx_queue_intr_disable = mlx5_rx_intr_disable,
1045         .is_removed = mlx5_is_removed,
1046 };
1047
1048 /**
1049  * Verify and store value for device argument.
1050  *
1051  * @param[in] key
1052  *   Key argument to verify.
1053  * @param[in] val
1054  *   Value associated with key.
1055  * @param opaque
1056  *   User data.
1057  *
1058  * @return
1059  *   0 on success, a negative errno value otherwise and rte_errno is set.
1060  */
1061 static int
1062 mlx5_args_check(const char *key, const char *val, void *opaque)
1063 {
1064         struct mlx5_dev_config *config = opaque;
1065         unsigned long tmp;
1066
1067         /* No-op, port representors are processed in mlx5_dev_spawn(). */
1068         if (!strcmp(MLX5_REPRESENTOR, key))
1069                 return 0;
1070         errno = 0;
1071         tmp = strtoul(val, NULL, 0);
1072         if (errno) {
1073                 rte_errno = errno;
1074                 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
1075                 return -rte_errno;
1076         }
1077         if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
1078                 config->cqe_comp = !!tmp;
1079         } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
1080                 config->cqe_pad = !!tmp;
1081         } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
1082                 config->hw_padding = !!tmp;
1083         } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
1084                 config->mprq.enabled = !!tmp;
1085         } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
1086                 config->mprq.stride_num_n = tmp;
1087         } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
1088                 config->mprq.max_memcpy_len = tmp;
1089         } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
1090                 config->mprq.min_rxqs_num = tmp;
1091         } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
1092                 DRV_LOG(WARNING, "%s: deprecated parameter,"
1093                                  " converted to txq_inline_max", key);
1094                 config->txq_inline_max = tmp;
1095         } else if (strcmp(MLX5_TXQ_INLINE_MAX, key) == 0) {
1096                 config->txq_inline_max = tmp;
1097         } else if (strcmp(MLX5_TXQ_INLINE_MIN, key) == 0) {
1098                 config->txq_inline_min = tmp;
1099         } else if (strcmp(MLX5_TXQ_INLINE_MPW, key) == 0) {
1100                 config->txq_inline_mpw = tmp;
1101         } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
1102                 config->txqs_inline = tmp;
1103         } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
1104                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1105         } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
1106                 config->mps = !!tmp;
1107         } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
1108                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1109         } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
1110                 DRV_LOG(WARNING, "%s: deprecated parameter,"
1111                                  " converted to txq_inline_mpw", key);
1112                 config->txq_inline_mpw = tmp;
1113         } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
1114                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1115         } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
1116                 config->rx_vec_en = !!tmp;
1117         } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
1118                 config->l3_vxlan_en = !!tmp;
1119         } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
1120                 config->vf_nl_en = !!tmp;
1121         } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
1122                 config->dv_esw_en = !!tmp;
1123         } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
1124                 config->dv_flow_en = !!tmp;
1125         } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
1126                 config->mr_ext_memseg_en = !!tmp;
1127         } else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {
1128                 config->max_dump_files_num = tmp;
1129         } else if (strcmp(MLX5_LRO_TIMEOUT_USEC, key) == 0) {
1130                 config->lro.timeout = tmp;
1131         } else {
1132                 DRV_LOG(WARNING, "%s: unknown parameter", key);
1133                 rte_errno = EINVAL;
1134                 return -rte_errno;
1135         }
1136         return 0;
1137 }
1138
1139 /**
1140  * Parse device parameters.
1141  *
1142  * @param config
1143  *   Pointer to device configuration structure.
1144  * @param devargs
1145  *   Device arguments structure.
1146  *
1147  * @return
1148  *   0 on success, a negative errno value otherwise and rte_errno is set.
1149  */
1150 static int
1151 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
1152 {
1153         const char **params = (const char *[]){
1154                 MLX5_RXQ_CQE_COMP_EN,
1155                 MLX5_RXQ_CQE_PAD_EN,
1156                 MLX5_RXQ_PKT_PAD_EN,
1157                 MLX5_RX_MPRQ_EN,
1158                 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
1159                 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
1160                 MLX5_RXQS_MIN_MPRQ,
1161                 MLX5_TXQ_INLINE,
1162                 MLX5_TXQ_INLINE_MIN,
1163                 MLX5_TXQ_INLINE_MAX,
1164                 MLX5_TXQ_INLINE_MPW,
1165                 MLX5_TXQS_MIN_INLINE,
1166                 MLX5_TXQS_MAX_VEC,
1167                 MLX5_TXQ_MPW_EN,
1168                 MLX5_TXQ_MPW_HDR_DSEG_EN,
1169                 MLX5_TXQ_MAX_INLINE_LEN,
1170                 MLX5_TX_VEC_EN,
1171                 MLX5_RX_VEC_EN,
1172                 MLX5_L3_VXLAN_EN,
1173                 MLX5_VF_NL_EN,
1174                 MLX5_DV_ESW_EN,
1175                 MLX5_DV_FLOW_EN,
1176                 MLX5_MR_EXT_MEMSEG_EN,
1177                 MLX5_REPRESENTOR,
1178                 MLX5_MAX_DUMP_FILES_NUM,
1179                 MLX5_LRO_TIMEOUT_USEC,
1180                 NULL,
1181         };
1182         struct rte_kvargs *kvlist;
1183         int ret = 0;
1184         int i;
1185
1186         if (devargs == NULL)
1187                 return 0;
1188         /* Following UGLY cast is done to pass checkpatch. */
1189         kvlist = rte_kvargs_parse(devargs->args, params);
1190         if (kvlist == NULL) {
1191                 rte_errno = EINVAL;
1192                 return -rte_errno;
1193         }
1194         /* Process parameters. */
1195         for (i = 0; (params[i] != NULL); ++i) {
1196                 if (rte_kvargs_count(kvlist, params[i])) {
1197                         ret = rte_kvargs_process(kvlist, params[i],
1198                                                  mlx5_args_check, config);
1199                         if (ret) {
1200                                 rte_errno = EINVAL;
1201                                 rte_kvargs_free(kvlist);
1202                                 return -rte_errno;
1203                         }
1204                 }
1205         }
1206         rte_kvargs_free(kvlist);
1207         return 0;
1208 }
1209
1210 static struct rte_pci_driver mlx5_driver;
1211
1212 /**
1213  * PMD global initialization.
1214  *
1215  * Independent from individual device, this function initializes global
1216  * per-PMD data structures distinguishing primary and secondary processes.
1217  * Hence, each initialization is called once per a process.
1218  *
1219  * @return
1220  *   0 on success, a negative errno value otherwise and rte_errno is set.
1221  */
1222 static int
1223 mlx5_init_once(void)
1224 {
1225         struct mlx5_shared_data *sd;
1226         struct mlx5_local_data *ld = &mlx5_local_data;
1227         int ret = 0;
1228
1229         if (mlx5_init_shared_data())
1230                 return -rte_errno;
1231         sd = mlx5_shared_data;
1232         assert(sd);
1233         rte_spinlock_lock(&sd->lock);
1234         switch (rte_eal_process_type()) {
1235         case RTE_PROC_PRIMARY:
1236                 if (sd->init_done)
1237                         break;
1238                 LIST_INIT(&sd->mem_event_cb_list);
1239                 rte_rwlock_init(&sd->mem_event_rwlock);
1240                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1241                                                 mlx5_mr_mem_event_cb, NULL);
1242                 ret = mlx5_mp_init_primary();
1243                 if (ret)
1244                         goto out;
1245                 sd->init_done = true;
1246                 break;
1247         case RTE_PROC_SECONDARY:
1248                 if (ld->init_done)
1249                         break;
1250                 ret = mlx5_mp_init_secondary();
1251                 if (ret)
1252                         goto out;
1253                 ++sd->secondary_cnt;
1254                 ld->init_done = true;
1255                 break;
1256         default:
1257                 break;
1258         }
1259 out:
1260         rte_spinlock_unlock(&sd->lock);
1261         return ret;
1262 }
1263
1264 /**
1265  * Configures the minimal amount of data to inline into WQE
1266  * while sending packets.
1267  *
1268  * - the txq_inline_min has the maximal priority, if this
1269  *   key is specified in devargs
1270  * - if DevX is enabled the inline mode is queried from the
1271  *   device (HCA attributes and NIC vport context if needed).
1272  * - otherwise L2 mode (18 bytes) is assumed for ConnectX-4/4LX
1273  *   and none (0 bytes) for other NICs
1274  *
1275  * @param spawn
1276  *   Verbs device parameters (name, port, switch_info) to spawn.
1277  * @param config
1278  *   Device configuration parameters.
1279  */
1280 static void
1281 mlx5_set_min_inline(struct mlx5_dev_spawn_data *spawn,
1282                     struct mlx5_dev_config *config)
1283 {
1284         if (config->txq_inline_min != MLX5_ARG_UNSET) {
1285                 /* Application defines size of inlined data explicitly. */
1286                 switch (spawn->pci_dev->id.device_id) {
1287                 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1288                 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1289                         if (config->txq_inline_min <
1290                                        (int)MLX5_INLINE_HSIZE_L2) {
1291                                 DRV_LOG(DEBUG,
1292                                         "txq_inline_mix aligned to minimal"
1293                                         " ConnectX-4 required value %d",
1294                                         (int)MLX5_INLINE_HSIZE_L2);
1295                                 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1296                         }
1297                         break;
1298                 }
1299                 goto exit;
1300         }
1301         if (config->hca_attr.eth_net_offloads) {
1302                 /* We have DevX enabled, inline mode queried successfully. */
1303                 switch (config->hca_attr.wqe_inline_mode) {
1304                 case MLX5_CAP_INLINE_MODE_L2:
1305                         /* outer L2 header must be inlined. */
1306                         config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1307                         goto exit;
1308                 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
1309                         /* No inline data are required by NIC. */
1310                         config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1311                         config->hw_vlan_insert =
1312                                 config->hca_attr.wqe_vlan_insert;
1313                         DRV_LOG(DEBUG, "Tx VLAN insertion is supported");
1314                         goto exit;
1315                 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
1316                         /* inline mode is defined by NIC vport context. */
1317                         if (!config->hca_attr.eth_virt)
1318                                 break;
1319                         switch (config->hca_attr.vport_inline_mode) {
1320                         case MLX5_INLINE_MODE_NONE:
1321                                 config->txq_inline_min =
1322                                         MLX5_INLINE_HSIZE_NONE;
1323                                 goto exit;
1324                         case MLX5_INLINE_MODE_L2:
1325                                 config->txq_inline_min =
1326                                         MLX5_INLINE_HSIZE_L2;
1327                                 goto exit;
1328                         case MLX5_INLINE_MODE_IP:
1329                                 config->txq_inline_min =
1330                                         MLX5_INLINE_HSIZE_L3;
1331                                 goto exit;
1332                         case MLX5_INLINE_MODE_TCP_UDP:
1333                                 config->txq_inline_min =
1334                                         MLX5_INLINE_HSIZE_L4;
1335                                 goto exit;
1336                         case MLX5_INLINE_MODE_INNER_L2:
1337                                 config->txq_inline_min =
1338                                         MLX5_INLINE_HSIZE_INNER_L2;
1339                                 goto exit;
1340                         case MLX5_INLINE_MODE_INNER_IP:
1341                                 config->txq_inline_min =
1342                                         MLX5_INLINE_HSIZE_INNER_L3;
1343                                 goto exit;
1344                         case MLX5_INLINE_MODE_INNER_TCP_UDP:
1345                                 config->txq_inline_min =
1346                                         MLX5_INLINE_HSIZE_INNER_L4;
1347                                 goto exit;
1348                         }
1349                 }
1350         }
1351         /*
1352          * We get here if we are unable to deduce
1353          * inline data size with DevX. Try PCI ID
1354          * to determine old NICs.
1355          */
1356         switch (spawn->pci_dev->id.device_id) {
1357         case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1358         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1359         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LX:
1360         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1361                 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1362                 config->hw_vlan_insert = 0;
1363                 break;
1364         case PCI_DEVICE_ID_MELLANOX_CONNECTX5:
1365         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1366         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EX:
1367         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1368                 /*
1369                  * These NICs support VLAN insertion from WQE and
1370                  * report the wqe_vlan_insert flag. But there is the bug
1371                  * and PFC control may be broken, so disable feature.
1372                  */
1373                 config->hw_vlan_insert = 0;
1374                 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1375                 break;
1376         default:
1377                 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1378                 break;
1379         }
1380 exit:
1381         DRV_LOG(DEBUG, "min tx inline configured: %d", config->txq_inline_min);
1382 }
1383
1384 /**
1385  * Allocate page of door-bells and register it using DevX API.
1386  *
1387  * @param [in] dev
1388  *   Pointer to Ethernet device.
1389  *
1390  * @return
1391  *   Pointer to new page on success, NULL otherwise.
1392  */
1393 static struct mlx5_devx_dbr_page *
1394 mlx5_alloc_dbr_page(struct rte_eth_dev *dev)
1395 {
1396         struct mlx5_priv *priv = dev->data->dev_private;
1397         struct mlx5_devx_dbr_page *page;
1398
1399         /* Allocate space for door-bell page and management data. */
1400         page = rte_calloc_socket(__func__, 1, sizeof(struct mlx5_devx_dbr_page),
1401                                  RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1402         if (!page) {
1403                 DRV_LOG(ERR, "port %u cannot allocate dbr page",
1404                         dev->data->port_id);
1405                 return NULL;
1406         }
1407         /* Register allocated memory. */
1408         page->umem = mlx5_glue->devx_umem_reg(priv->sh->ctx, page->dbrs,
1409                                               MLX5_DBR_PAGE_SIZE, 0);
1410         if (!page->umem) {
1411                 DRV_LOG(ERR, "port %u cannot umem reg dbr page",
1412                         dev->data->port_id);
1413                 rte_free(page);
1414                 return NULL;
1415         }
1416         return page;
1417 }
1418
1419 /**
1420  * Find the next available door-bell, allocate new page if needed.
1421  *
1422  * @param [in] dev
1423  *   Pointer to Ethernet device.
1424  * @param [out] dbr_page
1425  *   Door-bell page containing the page data.
1426  *
1427  * @return
1428  *   Door-bell address offset on success, a negative error value otherwise.
1429  */
1430 int64_t
1431 mlx5_get_dbr(struct rte_eth_dev *dev, struct mlx5_devx_dbr_page **dbr_page)
1432 {
1433         struct mlx5_priv *priv = dev->data->dev_private;
1434         struct mlx5_devx_dbr_page *page = NULL;
1435         uint32_t i, j;
1436
1437         LIST_FOREACH(page, &priv->dbrpgs, next)
1438                 if (page->dbr_count < MLX5_DBR_PER_PAGE)
1439                         break;
1440         if (!page) { /* No page with free door-bell exists. */
1441                 page = mlx5_alloc_dbr_page(dev);
1442                 if (!page) /* Failed to allocate new page. */
1443                         return (-1);
1444                 LIST_INSERT_HEAD(&priv->dbrpgs, page, next);
1445         }
1446         /* Loop to find bitmap part with clear bit. */
1447         for (i = 0;
1448              i < MLX5_DBR_BITMAP_SIZE && page->dbr_bitmap[i] == UINT64_MAX;
1449              i++)
1450                 ; /* Empty. */
1451         /* Find the first clear bit. */
1452         j = rte_bsf64(~page->dbr_bitmap[i]);
1453         assert(i < (MLX5_DBR_PER_PAGE / 64));
1454         page->dbr_bitmap[i] |= (1 << j);
1455         page->dbr_count++;
1456         *dbr_page = page;
1457         return (((i * 64) + j) * sizeof(uint64_t));
1458 }
1459
1460 /**
1461  * Release a door-bell record.
1462  *
1463  * @param [in] dev
1464  *   Pointer to Ethernet device.
1465  * @param [in] umem_id
1466  *   UMEM ID of page containing the door-bell record to release.
1467  * @param [in] offset
1468  *   Offset of door-bell record in page.
1469  *
1470  * @return
1471  *   0 on success, a negative error value otherwise.
1472  */
1473 int32_t
1474 mlx5_release_dbr(struct rte_eth_dev *dev, uint32_t umem_id, uint64_t offset)
1475 {
1476         struct mlx5_priv *priv = dev->data->dev_private;
1477         struct mlx5_devx_dbr_page *page = NULL;
1478         int ret = 0;
1479
1480         LIST_FOREACH(page, &priv->dbrpgs, next)
1481                 /* Find the page this address belongs to. */
1482                 if (page->umem->umem_id == umem_id)
1483                         break;
1484         if (!page)
1485                 return -EINVAL;
1486         page->dbr_count--;
1487         if (!page->dbr_count) {
1488                 /* Page not used, free it and remove from list. */
1489                 LIST_REMOVE(page, next);
1490                 if (page->umem)
1491                         ret = -mlx5_glue->devx_umem_dereg(page->umem);
1492                 rte_free(page);
1493         } else {
1494                 /* Mark in bitmap that this door-bell is not in use. */
1495                 offset /= MLX5_DBR_SIZE;
1496                 int i = offset / 64;
1497                 int j = offset % 64;
1498
1499                 page->dbr_bitmap[i] &= ~(1 << j);
1500         }
1501         return ret;
1502 }
1503
1504 /**
1505  * Spawn an Ethernet device from Verbs information.
1506  *
1507  * @param dpdk_dev
1508  *   Backing DPDK device.
1509  * @param spawn
1510  *   Verbs device parameters (name, port, switch_info) to spawn.
1511  * @param config
1512  *   Device configuration parameters.
1513  *
1514  * @return
1515  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
1516  *   is set. The following errors are defined:
1517  *
1518  *   EBUSY: device is not supposed to be spawned.
1519  *   EEXIST: device is already spawned
1520  */
1521 static struct rte_eth_dev *
1522 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1523                struct mlx5_dev_spawn_data *spawn,
1524                struct mlx5_dev_config config)
1525 {
1526         const struct mlx5_switch_info *switch_info = &spawn->info;
1527         struct mlx5_ibv_shared *sh = NULL;
1528         struct ibv_port_attr port_attr;
1529         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1530         struct rte_eth_dev *eth_dev = NULL;
1531         struct mlx5_priv *priv = NULL;
1532         int err = 0;
1533         unsigned int hw_padding = 0;
1534         unsigned int mps;
1535         unsigned int cqe_comp;
1536         unsigned int cqe_pad = 0;
1537         unsigned int tunnel_en = 0;
1538         unsigned int mpls_en = 0;
1539         unsigned int swp = 0;
1540         unsigned int mprq = 0;
1541         unsigned int mprq_min_stride_size_n = 0;
1542         unsigned int mprq_max_stride_size_n = 0;
1543         unsigned int mprq_min_stride_num_n = 0;
1544         unsigned int mprq_max_stride_num_n = 0;
1545         struct rte_ether_addr mac;
1546         char name[RTE_ETH_NAME_MAX_LEN];
1547         int own_domain_id = 0;
1548         uint16_t port_id;
1549         unsigned int i;
1550
1551         /* Determine if this port representor is supposed to be spawned. */
1552         if (switch_info->representor && dpdk_dev->devargs) {
1553                 struct rte_eth_devargs eth_da;
1554
1555                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
1556                 if (err) {
1557                         rte_errno = -err;
1558                         DRV_LOG(ERR, "failed to process device arguments: %s",
1559                                 strerror(rte_errno));
1560                         return NULL;
1561                 }
1562                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1563                         if (eth_da.representor_ports[i] ==
1564                             (uint16_t)switch_info->port_name)
1565                                 break;
1566                 if (i == eth_da.nb_representor_ports) {
1567                         rte_errno = EBUSY;
1568                         return NULL;
1569                 }
1570         }
1571         /* Build device name. */
1572         if (!switch_info->representor)
1573                 strlcpy(name, dpdk_dev->name, sizeof(name));
1574         else
1575                 snprintf(name, sizeof(name), "%s_representor_%u",
1576                          dpdk_dev->name, switch_info->port_name);
1577         /* check if the device is already spawned */
1578         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1579                 rte_errno = EEXIST;
1580                 return NULL;
1581         }
1582         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1583         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1584                 eth_dev = rte_eth_dev_attach_secondary(name);
1585                 if (eth_dev == NULL) {
1586                         DRV_LOG(ERR, "can not attach rte ethdev");
1587                         rte_errno = ENOMEM;
1588                         return NULL;
1589                 }
1590                 eth_dev->device = dpdk_dev;
1591                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1592                 err = mlx5_proc_priv_init(eth_dev);
1593                 if (err)
1594                         return NULL;
1595                 /* Receive command fd from primary process */
1596                 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1597                 if (err < 0)
1598                         return NULL;
1599                 /* Remap UAR for Tx queues. */
1600                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
1601                 if (err)
1602                         return NULL;
1603                 /*
1604                  * Ethdev pointer is still required as input since
1605                  * the primary device is not accessible from the
1606                  * secondary process.
1607                  */
1608                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1609                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1610                 return eth_dev;
1611         }
1612         sh = mlx5_alloc_shared_ibctx(spawn);
1613         if (!sh)
1614                 return NULL;
1615         config.devx = sh->devx;
1616 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
1617         config.dest_tir = 1;
1618 #endif
1619 #ifdef HAVE_IBV_MLX5_MOD_SWP
1620         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1621 #endif
1622         /*
1623          * Multi-packet send is supported by ConnectX-4 Lx PF as well
1624          * as all ConnectX-5 devices.
1625          */
1626 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1627         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1628 #endif
1629 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1630         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1631 #endif
1632         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1633         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1634                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1635                         DRV_LOG(DEBUG, "enhanced MPW is supported");
1636                         mps = MLX5_MPW_ENHANCED;
1637                 } else {
1638                         DRV_LOG(DEBUG, "MPW is supported");
1639                         mps = MLX5_MPW;
1640                 }
1641         } else {
1642                 DRV_LOG(DEBUG, "MPW isn't supported");
1643                 mps = MLX5_MPW_DISABLED;
1644         }
1645 #ifdef HAVE_IBV_MLX5_MOD_SWP
1646         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1647                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1648         DRV_LOG(DEBUG, "SWP support: %u", swp);
1649 #endif
1650         config.swp = !!swp;
1651 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1652         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1653                 struct mlx5dv_striding_rq_caps mprq_caps =
1654                         dv_attr.striding_rq_caps;
1655
1656                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1657                         mprq_caps.min_single_stride_log_num_of_bytes);
1658                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1659                         mprq_caps.max_single_stride_log_num_of_bytes);
1660                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1661                         mprq_caps.min_single_wqe_log_num_of_strides);
1662                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1663                         mprq_caps.max_single_wqe_log_num_of_strides);
1664                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1665                         mprq_caps.supported_qpts);
1666                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1667                 mprq = 1;
1668                 mprq_min_stride_size_n =
1669                         mprq_caps.min_single_stride_log_num_of_bytes;
1670                 mprq_max_stride_size_n =
1671                         mprq_caps.max_single_stride_log_num_of_bytes;
1672                 mprq_min_stride_num_n =
1673                         mprq_caps.min_single_wqe_log_num_of_strides;
1674                 mprq_max_stride_num_n =
1675                         mprq_caps.max_single_wqe_log_num_of_strides;
1676                 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1677                                                    mprq_min_stride_num_n);
1678         }
1679 #endif
1680         if (RTE_CACHE_LINE_SIZE == 128 &&
1681             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
1682                 cqe_comp = 0;
1683         else
1684                 cqe_comp = 1;
1685         config.cqe_comp = cqe_comp;
1686 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
1687         /* Whether device supports 128B Rx CQE padding. */
1688         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
1689                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
1690 #endif
1691 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1692         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1693                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1694                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1695                              (dv_attr.tunnel_offloads_caps &
1696                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
1697         }
1698         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1699                 tunnel_en ? "" : "not ");
1700 #else
1701         DRV_LOG(WARNING,
1702                 "tunnel offloading disabled due to old OFED/rdma-core version");
1703 #endif
1704         config.tunnel_en = tunnel_en;
1705 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1706         mpls_en = ((dv_attr.tunnel_offloads_caps &
1707                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1708                    (dv_attr.tunnel_offloads_caps &
1709                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1710         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1711                 mpls_en ? "" : "not ");
1712 #else
1713         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1714                 " old OFED/rdma-core version or firmware configuration");
1715 #endif
1716         config.mpls_en = mpls_en;
1717         /* Check port status. */
1718         err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
1719         if (err) {
1720                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1721                 goto error;
1722         }
1723         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1724                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1725                 err = EINVAL;
1726                 goto error;
1727         }
1728         if (port_attr.state != IBV_PORT_ACTIVE)
1729                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1730                         mlx5_glue->port_state_str(port_attr.state),
1731                         port_attr.state);
1732         /* Allocate private eth device data. */
1733         priv = rte_zmalloc("ethdev private structure",
1734                            sizeof(*priv),
1735                            RTE_CACHE_LINE_SIZE);
1736         if (priv == NULL) {
1737                 DRV_LOG(ERR, "priv allocation failure");
1738                 err = ENOMEM;
1739                 goto error;
1740         }
1741         priv->sh = sh;
1742         priv->ibv_port = spawn->ibv_port;
1743         priv->mtu = RTE_ETHER_MTU;
1744 #ifndef RTE_ARCH_64
1745         /* Initialize UAR access locks for 32bit implementations. */
1746         rte_spinlock_init(&priv->uar_lock_cq);
1747         for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1748                 rte_spinlock_init(&priv->uar_lock[i]);
1749 #endif
1750         /* Some internal functions rely on Netlink sockets, open them now. */
1751         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1752         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1753         priv->nl_sn = 0;
1754         priv->representor = !!switch_info->representor;
1755         priv->master = !!switch_info->master;
1756         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1757         /*
1758          * Currently we support single E-Switch per PF configurations
1759          * only and vport_id field contains the vport index for
1760          * associated VF, which is deduced from representor port name.
1761          * For example, let's have the IB device port 10, it has
1762          * attached network device eth0, which has port name attribute
1763          * pf0vf2, we can deduce the VF number as 2, and set vport index
1764          * as 3 (2+1). This assigning schema should be changed if the
1765          * multiple E-Switch instances per PF configurations or/and PCI
1766          * subfunctions are added.
1767          */
1768         priv->vport_id = switch_info->representor ?
1769                          switch_info->port_name + 1 : -1;
1770         /* representor_id field keeps the unmodified port/VF index. */
1771         priv->representor_id = switch_info->representor ?
1772                                switch_info->port_name : -1;
1773         /*
1774          * Look for sibling devices in order to reuse their switch domain
1775          * if any, otherwise allocate one.
1776          */
1777         RTE_ETH_FOREACH_DEV_OF(port_id, dpdk_dev) {
1778                 const struct mlx5_priv *opriv =
1779                         rte_eth_devices[port_id].data->dev_private;
1780
1781                 if (!opriv ||
1782                         opriv->domain_id ==
1783                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1784                         continue;
1785                 priv->domain_id = opriv->domain_id;
1786                 break;
1787         }
1788         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1789                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1790                 if (err) {
1791                         err = rte_errno;
1792                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1793                                 strerror(rte_errno));
1794                         goto error;
1795                 }
1796                 own_domain_id = 1;
1797         }
1798         err = mlx5_args(&config, dpdk_dev->devargs);
1799         if (err) {
1800                 err = rte_errno;
1801                 DRV_LOG(ERR, "failed to process device arguments: %s",
1802                         strerror(rte_errno));
1803                 goto error;
1804         }
1805         config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1806                             IBV_DEVICE_RAW_IP_CSUM);
1807         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1808                 (config.hw_csum ? "" : "not "));
1809 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1810         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1811         DRV_LOG(DEBUG, "counters are not supported");
1812 #endif
1813 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
1814         if (config.dv_flow_en) {
1815                 DRV_LOG(WARNING, "DV flow is not supported");
1816                 config.dv_flow_en = 0;
1817         }
1818 #endif
1819         config.ind_table_max_size =
1820                 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
1821         /*
1822          * Remove this check once DPDK supports larger/variable
1823          * indirection tables.
1824          */
1825         if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1826                 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1827         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1828                 config.ind_table_max_size);
1829         config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1830                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1831         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1832                 (config.hw_vlan_strip ? "" : "not "));
1833         config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1834                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1835         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1836                 (config.hw_fcs_strip ? "" : "not "));
1837 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1838         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1839 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1840         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1841                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1842 #endif
1843         if (config.hw_padding && !hw_padding) {
1844                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1845                 config.hw_padding = 0;
1846         } else if (config.hw_padding) {
1847                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1848         }
1849         config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
1850                       (sh->device_attr.tso_caps.supported_qpts &
1851                        (1 << IBV_QPT_RAW_PACKET)));
1852         if (config.tso)
1853                 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
1854         /*
1855          * MPW is disabled by default, while the Enhanced MPW is enabled
1856          * by default.
1857          */
1858         if (config.mps == MLX5_ARG_UNSET)
1859                 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1860                                                           MLX5_MPW_DISABLED;
1861         else
1862                 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
1863         DRV_LOG(INFO, "%sMPS is %s",
1864                 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
1865                 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1866         if (config.cqe_comp && !cqe_comp) {
1867                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1868                 config.cqe_comp = 0;
1869         }
1870         if (config.cqe_pad && !cqe_pad) {
1871                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1872                 config.cqe_pad = 0;
1873         } else if (config.cqe_pad) {
1874                 DRV_LOG(INFO, "Rx CQE padding is enabled");
1875         }
1876         if (config.devx) {
1877                 priv->counter_fallback = 0;
1878                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
1879                 if (err) {
1880                         err = -err;
1881                         goto error;
1882                 }
1883                 if (!config.hca_attr.flow_counters_dump)
1884                         priv->counter_fallback = 1;
1885 #ifndef HAVE_IBV_DEVX_ASYNC
1886                 priv->counter_fallback = 1;
1887 #endif
1888                 if (priv->counter_fallback)
1889                         DRV_LOG(INFO, "Use fall-back DV counter management\n");
1890                 /* Check for LRO support. */
1891                 if (config.dest_tir && config.hca_attr.lro_cap) {
1892                         /* TBD check tunnel lro caps. */
1893                         config.lro.supported = config.hca_attr.lro_cap;
1894                         DRV_LOG(DEBUG, "Device supports LRO");
1895                         /*
1896                          * If LRO timeout is not configured by application,
1897                          * use the minimal supported value.
1898                          */
1899                         if (!config.lro.timeout)
1900                                 config.lro.timeout =
1901                                 config.hca_attr.lro_timer_supported_periods[0];
1902                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1903                                 config.lro.timeout);
1904                 }
1905         }
1906         if (config.mprq.enabled && mprq) {
1907                 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
1908                     config.mprq.stride_num_n < mprq_min_stride_num_n) {
1909                         config.mprq.stride_num_n =
1910                                 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1911                                         mprq_min_stride_num_n);
1912                         DRV_LOG(WARNING,
1913                                 "the number of strides"
1914                                 " for Multi-Packet RQ is out of range,"
1915                                 " setting default value (%u)",
1916                                 1 << config.mprq.stride_num_n);
1917                 }
1918                 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
1919                 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
1920         } else if (config.mprq.enabled && !mprq) {
1921                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1922                 config.mprq.enabled = 0;
1923         }
1924         if (config.max_dump_files_num == 0)
1925                 config.max_dump_files_num = 128;
1926         eth_dev = rte_eth_dev_allocate(name);
1927         if (eth_dev == NULL) {
1928                 DRV_LOG(ERR, "can not allocate rte ethdev");
1929                 err = ENOMEM;
1930                 goto error;
1931         }
1932         /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1933         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1934         if (priv->representor) {
1935                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1936                 eth_dev->data->representor_id = priv->representor_id;
1937         }
1938         /*
1939          * Store associated network device interface index. This index
1940          * is permanent throughout the lifetime of device. So, we may store
1941          * the ifindex here and use the cached value further.
1942          */
1943         assert(spawn->ifindex);
1944         priv->if_index = spawn->ifindex;
1945         eth_dev->data->dev_private = priv;
1946         priv->dev_data = eth_dev->data;
1947         eth_dev->data->mac_addrs = priv->mac;
1948         eth_dev->device = dpdk_dev;
1949         /* Configure the first MAC address by default. */
1950         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1951                 DRV_LOG(ERR,
1952                         "port %u cannot get MAC address, is mlx5_en"
1953                         " loaded? (errno: %s)",
1954                         eth_dev->data->port_id, strerror(rte_errno));
1955                 err = ENODEV;
1956                 goto error;
1957         }
1958         DRV_LOG(INFO,
1959                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1960                 eth_dev->data->port_id,
1961                 mac.addr_bytes[0], mac.addr_bytes[1],
1962                 mac.addr_bytes[2], mac.addr_bytes[3],
1963                 mac.addr_bytes[4], mac.addr_bytes[5]);
1964 #ifndef NDEBUG
1965         {
1966                 char ifname[IF_NAMESIZE];
1967
1968                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1969                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1970                                 eth_dev->data->port_id, ifname);
1971                 else
1972                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1973                                 eth_dev->data->port_id);
1974         }
1975 #endif
1976         /* Get actual MTU if possible. */
1977         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1978         if (err) {
1979                 err = rte_errno;
1980                 goto error;
1981         }
1982         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1983                 priv->mtu);
1984         /* Initialize burst functions to prevent crashes before link-up. */
1985         eth_dev->rx_pkt_burst = removed_rx_burst;
1986         eth_dev->tx_pkt_burst = removed_tx_burst;
1987         eth_dev->dev_ops = &mlx5_dev_ops;
1988         /* Register MAC address. */
1989         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1990         if (config.vf && config.vf_nl_en)
1991                 mlx5_nl_mac_addr_sync(eth_dev);
1992         TAILQ_INIT(&priv->flows);
1993         TAILQ_INIT(&priv->ctrl_flows);
1994         /* Hint libmlx5 to use PMD allocator for data plane resources */
1995         struct mlx5dv_ctx_allocators alctr = {
1996                 .alloc = &mlx5_alloc_verbs_buf,
1997                 .free = &mlx5_free_verbs_buf,
1998                 .data = priv,
1999         };
2000         mlx5_glue->dv_set_context_attr(sh->ctx,
2001                                        MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
2002                                        (void *)((uintptr_t)&alctr));
2003         /* Bring Ethernet device up. */
2004         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
2005                 eth_dev->data->port_id);
2006         mlx5_set_link_up(eth_dev);
2007         /*
2008          * Even though the interrupt handler is not installed yet,
2009          * interrupts will still trigger on the async_fd from
2010          * Verbs context returned by ibv_open_device().
2011          */
2012         mlx5_link_update(eth_dev, 0);
2013 #ifdef HAVE_MLX5DV_DR_ESWITCH
2014         if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
2015               (switch_info->representor || switch_info->master)))
2016                 config.dv_esw_en = 0;
2017 #else
2018         config.dv_esw_en = 0;
2019 #endif
2020         /* Detect minimal data bytes to inline. */
2021         mlx5_set_min_inline(spawn, &config);
2022         /* Store device configuration on private structure. */
2023         priv->config = config;
2024         /* Create context for virtual machine VLAN workaround. */
2025         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
2026         if (config.dv_flow_en) {
2027                 err = mlx5_alloc_shared_dr(priv);
2028                 if (err)
2029                         goto error;
2030         }
2031         /* Supported Verbs flow priority number detection. */
2032         err = mlx5_flow_discover_priorities(eth_dev);
2033         if (err < 0) {
2034                 err = -err;
2035                 goto error;
2036         }
2037         priv->config.flow_prio = err;
2038         return eth_dev;
2039 error:
2040         if (priv) {
2041                 if (priv->sh)
2042                         mlx5_free_shared_dr(priv);
2043                 if (priv->nl_socket_route >= 0)
2044                         close(priv->nl_socket_route);
2045                 if (priv->nl_socket_rdma >= 0)
2046                         close(priv->nl_socket_rdma);
2047                 if (priv->vmwa_context)
2048                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
2049                 if (own_domain_id)
2050                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
2051                 rte_free(priv);
2052                 if (eth_dev != NULL)
2053                         eth_dev->data->dev_private = NULL;
2054         }
2055         if (eth_dev != NULL) {
2056                 /* mac_addrs must not be freed alone because part of dev_private */
2057                 eth_dev->data->mac_addrs = NULL;
2058                 rte_eth_dev_release_port(eth_dev);
2059         }
2060         if (sh)
2061                 mlx5_free_shared_ibctx(sh);
2062         assert(err > 0);
2063         rte_errno = err;
2064         return NULL;
2065 }
2066
2067 /**
2068  * Comparison callback to sort device data.
2069  *
2070  * This is meant to be used with qsort().
2071  *
2072  * @param a[in]
2073  *   Pointer to pointer to first data object.
2074  * @param b[in]
2075  *   Pointer to pointer to second data object.
2076  *
2077  * @return
2078  *   0 if both objects are equal, less than 0 if the first argument is less
2079  *   than the second, greater than 0 otherwise.
2080  */
2081 static int
2082 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
2083 {
2084         const struct mlx5_switch_info *si_a =
2085                 &((const struct mlx5_dev_spawn_data *)a)->info;
2086         const struct mlx5_switch_info *si_b =
2087                 &((const struct mlx5_dev_spawn_data *)b)->info;
2088         int ret;
2089
2090         /* Master device first. */
2091         ret = si_b->master - si_a->master;
2092         if (ret)
2093                 return ret;
2094         /* Then representor devices. */
2095         ret = si_b->representor - si_a->representor;
2096         if (ret)
2097                 return ret;
2098         /* Unidentified devices come last in no specific order. */
2099         if (!si_a->representor)
2100                 return 0;
2101         /* Order representors by name. */
2102         return si_a->port_name - si_b->port_name;
2103 }
2104
2105 /**
2106  * DPDK callback to register a PCI device.
2107  *
2108  * This function spawns Ethernet devices out of a given PCI device.
2109  *
2110  * @param[in] pci_drv
2111  *   PCI driver structure (mlx5_driver).
2112  * @param[in] pci_dev
2113  *   PCI device information.
2114  *
2115  * @return
2116  *   0 on success, a negative errno value otherwise and rte_errno is set.
2117  */
2118 static int
2119 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2120                struct rte_pci_device *pci_dev)
2121 {
2122         struct ibv_device **ibv_list;
2123         /*
2124          * Number of found IB Devices matching with requested PCI BDF.
2125          * nd != 1 means there are multiple IB devices over the same
2126          * PCI device and we have representors and master.
2127          */
2128         unsigned int nd = 0;
2129         /*
2130          * Number of found IB device Ports. nd = 1 and np = 1..n means
2131          * we have the single multiport IB device, and there may be
2132          * representors attached to some of found ports.
2133          */
2134         unsigned int np = 0;
2135         /*
2136          * Number of DPDK ethernet devices to Spawn - either over
2137          * multiple IB devices or multiple ports of single IB device.
2138          * Actually this is the number of iterations to spawn.
2139          */
2140         unsigned int ns = 0;
2141         struct mlx5_dev_config dev_config;
2142         int ret;
2143
2144         ret = mlx5_init_once();
2145         if (ret) {
2146                 DRV_LOG(ERR, "unable to init PMD global data: %s",
2147                         strerror(rte_errno));
2148                 return -rte_errno;
2149         }
2150         assert(pci_drv == &mlx5_driver);
2151         errno = 0;
2152         ibv_list = mlx5_glue->get_device_list(&ret);
2153         if (!ibv_list) {
2154                 rte_errno = errno ? errno : ENOSYS;
2155                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
2156                 return -rte_errno;
2157         }
2158         /*
2159          * First scan the list of all Infiniband devices to find
2160          * matching ones, gathering into the list.
2161          */
2162         struct ibv_device *ibv_match[ret + 1];
2163         int nl_route = -1;
2164         int nl_rdma = -1;
2165         unsigned int i;
2166
2167         while (ret-- > 0) {
2168                 struct rte_pci_addr pci_addr;
2169
2170                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
2171                 if (mlx5_ibv_device_to_pci_addr(ibv_list[ret], &pci_addr))
2172                         continue;
2173                 if (pci_dev->addr.domain != pci_addr.domain ||
2174                     pci_dev->addr.bus != pci_addr.bus ||
2175                     pci_dev->addr.devid != pci_addr.devid ||
2176                     pci_dev->addr.function != pci_addr.function)
2177                         continue;
2178                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2179                         ibv_list[ret]->name);
2180                 ibv_match[nd++] = ibv_list[ret];
2181         }
2182         ibv_match[nd] = NULL;
2183         if (!nd) {
2184                 /* No device matches, just complain and bail out. */
2185                 mlx5_glue->free_device_list(ibv_list);
2186                 DRV_LOG(WARNING,
2187                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
2188                         " are kernel drivers loaded?",
2189                         pci_dev->addr.domain, pci_dev->addr.bus,
2190                         pci_dev->addr.devid, pci_dev->addr.function);
2191                 rte_errno = ENOENT;
2192                 ret = -rte_errno;
2193                 return ret;
2194         }
2195         nl_route = mlx5_nl_init(NETLINK_ROUTE);
2196         nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2197         if (nd == 1) {
2198                 /*
2199                  * Found single matching device may have multiple ports.
2200                  * Each port may be representor, we have to check the port
2201                  * number and check the representors existence.
2202                  */
2203                 if (nl_rdma >= 0)
2204                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2205                 if (!np)
2206                         DRV_LOG(WARNING, "can not get IB device \"%s\""
2207                                          " ports number", ibv_match[0]->name);
2208         }
2209         /*
2210          * Now we can determine the maximal
2211          * amount of devices to be spawned.
2212          */
2213         struct mlx5_dev_spawn_data list[np ? np : nd];
2214
2215         if (np > 1) {
2216                 /*
2217                  * Single IB device with multiple ports found,
2218                  * it may be E-Switch master device and representors.
2219                  * We have to perform identification trough the ports.
2220                  */
2221                 assert(nl_rdma >= 0);
2222                 assert(ns == 0);
2223                 assert(nd == 1);
2224                 for (i = 1; i <= np; ++i) {
2225                         list[ns].max_port = np;
2226                         list[ns].ibv_port = i;
2227                         list[ns].ibv_dev = ibv_match[0];
2228                         list[ns].eth_dev = NULL;
2229                         list[ns].pci_dev = pci_dev;
2230                         list[ns].ifindex = mlx5_nl_ifindex
2231                                         (nl_rdma, list[ns].ibv_dev->name, i);
2232                         if (!list[ns].ifindex) {
2233                                 /*
2234                                  * No network interface index found for the
2235                                  * specified port, it means there is no
2236                                  * representor on this port. It's OK,
2237                                  * there can be disabled ports, for example
2238                                  * if sriov_numvfs < sriov_totalvfs.
2239                                  */
2240                                 continue;
2241                         }
2242                         ret = -1;
2243                         if (nl_route >= 0)
2244                                 ret = mlx5_nl_switch_info
2245                                                (nl_route,
2246                                                 list[ns].ifindex,
2247                                                 &list[ns].info);
2248                         if (ret || (!list[ns].info.representor &&
2249                                     !list[ns].info.master)) {
2250                                 /*
2251                                  * We failed to recognize representors with
2252                                  * Netlink, let's try to perform the task
2253                                  * with sysfs.
2254                                  */
2255                                 ret =  mlx5_sysfs_switch_info
2256                                                 (list[ns].ifindex,
2257                                                  &list[ns].info);
2258                         }
2259                         if (!ret && (list[ns].info.representor ^
2260                                      list[ns].info.master))
2261                                 ns++;
2262                 }
2263                 if (!ns) {
2264                         DRV_LOG(ERR,
2265                                 "unable to recognize master/representors"
2266                                 " on the IB device with multiple ports");
2267                         rte_errno = ENOENT;
2268                         ret = -rte_errno;
2269                         goto exit;
2270                 }
2271         } else {
2272                 /*
2273                  * The existence of several matching entries (nd > 1) means
2274                  * port representors have been instantiated. No existing Verbs
2275                  * call nor sysfs entries can tell them apart, this can only
2276                  * be done through Netlink calls assuming kernel drivers are
2277                  * recent enough to support them.
2278                  *
2279                  * In the event of identification failure through Netlink,
2280                  * try again through sysfs, then:
2281                  *
2282                  * 1. A single IB device matches (nd == 1) with single
2283                  *    port (np=0/1) and is not a representor, assume
2284                  *    no switch support.
2285                  *
2286                  * 2. Otherwise no safe assumptions can be made;
2287                  *    complain louder and bail out.
2288                  */
2289                 np = 1;
2290                 for (i = 0; i != nd; ++i) {
2291                         memset(&list[ns].info, 0, sizeof(list[ns].info));
2292                         list[ns].max_port = 1;
2293                         list[ns].ibv_port = 1;
2294                         list[ns].ibv_dev = ibv_match[i];
2295                         list[ns].eth_dev = NULL;
2296                         list[ns].pci_dev = pci_dev;
2297                         list[ns].ifindex = 0;
2298                         if (nl_rdma >= 0)
2299                                 list[ns].ifindex = mlx5_nl_ifindex
2300                                         (nl_rdma, list[ns].ibv_dev->name, 1);
2301                         if (!list[ns].ifindex) {
2302                                 char ifname[IF_NAMESIZE];
2303
2304                                 /*
2305                                  * Netlink failed, it may happen with old
2306                                  * ib_core kernel driver (before 4.16).
2307                                  * We can assume there is old driver because
2308                                  * here we are processing single ports IB
2309                                  * devices. Let's try sysfs to retrieve
2310                                  * the ifindex. The method works for
2311                                  * master device only.
2312                                  */
2313                                 if (nd > 1) {
2314                                         /*
2315                                          * Multiple devices found, assume
2316                                          * representors, can not distinguish
2317                                          * master/representor and retrieve
2318                                          * ifindex via sysfs.
2319                                          */
2320                                         continue;
2321                                 }
2322                                 ret = mlx5_get_master_ifname
2323                                         (ibv_match[i]->ibdev_path, &ifname);
2324                                 if (!ret)
2325                                         list[ns].ifindex =
2326                                                 if_nametoindex(ifname);
2327                                 if (!list[ns].ifindex) {
2328                                         /*
2329                                          * No network interface index found
2330                                          * for the specified device, it means
2331                                          * there it is neither representor
2332                                          * nor master.
2333                                          */
2334                                         continue;
2335                                 }
2336                         }
2337                         ret = -1;
2338                         if (nl_route >= 0)
2339                                 ret = mlx5_nl_switch_info
2340                                                (nl_route,
2341                                                 list[ns].ifindex,
2342                                                 &list[ns].info);
2343                         if (ret || (!list[ns].info.representor &&
2344                                     !list[ns].info.master)) {
2345                                 /*
2346                                  * We failed to recognize representors with
2347                                  * Netlink, let's try to perform the task
2348                                  * with sysfs.
2349                                  */
2350                                 ret =  mlx5_sysfs_switch_info
2351                                                 (list[ns].ifindex,
2352                                                  &list[ns].info);
2353                         }
2354                         if (!ret && (list[ns].info.representor ^
2355                                      list[ns].info.master)) {
2356                                 ns++;
2357                         } else if ((nd == 1) &&
2358                                    !list[ns].info.representor &&
2359                                    !list[ns].info.master) {
2360                                 /*
2361                                  * Single IB device with
2362                                  * one physical port and
2363                                  * attached network device.
2364                                  * May be SRIOV is not enabled
2365                                  * or there is no representors.
2366                                  */
2367                                 DRV_LOG(INFO, "no E-Switch support detected");
2368                                 ns++;
2369                                 break;
2370                         }
2371                 }
2372                 if (!ns) {
2373                         DRV_LOG(ERR,
2374                                 "unable to recognize master/representors"
2375                                 " on the multiple IB devices");
2376                         rte_errno = ENOENT;
2377                         ret = -rte_errno;
2378                         goto exit;
2379                 }
2380         }
2381         assert(ns);
2382         /*
2383          * Sort list to probe devices in natural order for users convenience
2384          * (i.e. master first, then representors from lowest to highest ID).
2385          */
2386         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2387         /* Default configuration. */
2388         dev_config = (struct mlx5_dev_config){
2389                 .hw_padding = 0,
2390                 .mps = MLX5_ARG_UNSET,
2391                 .rx_vec_en = 1,
2392                 .txq_inline_max = MLX5_ARG_UNSET,
2393                 .txq_inline_min = MLX5_ARG_UNSET,
2394                 .txq_inline_mpw = MLX5_ARG_UNSET,
2395                 .txqs_inline = MLX5_ARG_UNSET,
2396                 .vf_nl_en = 1,
2397                 .mr_ext_memseg_en = 1,
2398                 .mprq = {
2399                         .enabled = 0, /* Disabled by default. */
2400                         .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
2401                         .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
2402                         .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
2403                 },
2404                 .dv_esw_en = 1,
2405         };
2406         /* Device specific configuration. */
2407         switch (pci_dev->id.device_id) {
2408         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2409         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2410         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2411         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2412                 dev_config.vf = 1;
2413                 break;
2414         default:
2415                 break;
2416         }
2417         for (i = 0; i != ns; ++i) {
2418                 uint32_t restore;
2419
2420                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2421                                                  &list[i],
2422                                                  dev_config);
2423                 if (!list[i].eth_dev) {
2424                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2425                                 break;
2426                         /* Device is disabled or already spawned. Ignore it. */
2427                         continue;
2428                 }
2429                 restore = list[i].eth_dev->data->dev_flags;
2430                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2431                 /* Restore non-PCI flags cleared by the above call. */
2432                 list[i].eth_dev->data->dev_flags |= restore;
2433                 rte_eth_dev_probing_finish(list[i].eth_dev);
2434         }
2435         if (i != ns) {
2436                 DRV_LOG(ERR,
2437                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2438                         " encountering an error: %s",
2439                         pci_dev->addr.domain, pci_dev->addr.bus,
2440                         pci_dev->addr.devid, pci_dev->addr.function,
2441                         strerror(rte_errno));
2442                 ret = -rte_errno;
2443                 /* Roll back. */
2444                 while (i--) {
2445                         if (!list[i].eth_dev)
2446                                 continue;
2447                         mlx5_dev_close(list[i].eth_dev);
2448                         /* mac_addrs must not be freed because in dev_private */
2449                         list[i].eth_dev->data->mac_addrs = NULL;
2450                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2451                 }
2452                 /* Restore original error. */
2453                 rte_errno = -ret;
2454         } else {
2455                 ret = 0;
2456         }
2457 exit:
2458         /*
2459          * Do the routine cleanup:
2460          * - close opened Netlink sockets
2461          * - free the Infiniband device list
2462          */
2463         if (nl_rdma >= 0)
2464                 close(nl_rdma);
2465         if (nl_route >= 0)
2466                 close(nl_route);
2467         assert(ibv_list);
2468         mlx5_glue->free_device_list(ibv_list);
2469         return ret;
2470 }
2471
2472 /**
2473  * DPDK callback to remove a PCI device.
2474  *
2475  * This function removes all Ethernet devices belong to a given PCI device.
2476  *
2477  * @param[in] pci_dev
2478  *   Pointer to the PCI device.
2479  *
2480  * @return
2481  *   0 on success, the function cannot fail.
2482  */
2483 static int
2484 mlx5_pci_remove(struct rte_pci_device *pci_dev)
2485 {
2486         uint16_t port_id;
2487
2488         RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
2489                 rte_eth_dev_close(port_id);
2490         return 0;
2491 }
2492
2493 static const struct rte_pci_id mlx5_pci_id_map[] = {
2494         {
2495                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2496                                PCI_DEVICE_ID_MELLANOX_CONNECTX4)
2497         },
2498         {
2499                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2500                                PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
2501         },
2502         {
2503                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2504                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
2505         },
2506         {
2507                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2508                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
2509         },
2510         {
2511                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2512                                PCI_DEVICE_ID_MELLANOX_CONNECTX5)
2513         },
2514         {
2515                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2516                                PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
2517         },
2518         {
2519                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2520                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
2521         },
2522         {
2523                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2524                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
2525         },
2526         {
2527                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2528                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
2529         },
2530         {
2531                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2532                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
2533         },
2534         {
2535                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2536                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
2537         },
2538         {
2539                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2540                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
2541         },
2542         {
2543                 .vendor_id = 0
2544         }
2545 };
2546
2547 static struct rte_pci_driver mlx5_driver = {
2548         .driver = {
2549                 .name = MLX5_DRIVER_NAME
2550         },
2551         .id_table = mlx5_pci_id_map,
2552         .probe = mlx5_pci_probe,
2553         .remove = mlx5_pci_remove,
2554         .dma_map = mlx5_dma_map,
2555         .dma_unmap = mlx5_dma_unmap,
2556         .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
2557                      RTE_PCI_DRV_PROBE_AGAIN,
2558 };
2559
2560 #ifdef RTE_IBVERBS_LINK_DLOPEN
2561
2562 /**
2563  * Suffix RTE_EAL_PMD_PATH with "-glue".
2564  *
2565  * This function performs a sanity check on RTE_EAL_PMD_PATH before
2566  * suffixing its last component.
2567  *
2568  * @param buf[out]
2569  *   Output buffer, should be large enough otherwise NULL is returned.
2570  * @param size
2571  *   Size of @p out.
2572  *
2573  * @return
2574  *   Pointer to @p buf or @p NULL in case suffix cannot be appended.
2575  */
2576 static char *
2577 mlx5_glue_path(char *buf, size_t size)
2578 {
2579         static const char *const bad[] = { "/", ".", "..", NULL };
2580         const char *path = RTE_EAL_PMD_PATH;
2581         size_t len = strlen(path);
2582         size_t off;
2583         int i;
2584
2585         while (len && path[len - 1] == '/')
2586                 --len;
2587         for (off = len; off && path[off - 1] != '/'; --off)
2588                 ;
2589         for (i = 0; bad[i]; ++i)
2590                 if (!strncmp(path + off, bad[i], (int)(len - off)))
2591                         goto error;
2592         i = snprintf(buf, size, "%.*s-glue", (int)len, path);
2593         if (i == -1 || (size_t)i >= size)
2594                 goto error;
2595         return buf;
2596 error:
2597         DRV_LOG(ERR,
2598                 "unable to append \"-glue\" to last component of"
2599                 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
2600                 " please re-configure DPDK");
2601         return NULL;
2602 }
2603
2604 /**
2605  * Initialization routine for run-time dependency on rdma-core.
2606  */
2607 static int
2608 mlx5_glue_init(void)
2609 {
2610         char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
2611         const char *path[] = {
2612                 /*
2613                  * A basic security check is necessary before trusting
2614                  * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
2615                  */
2616                 (geteuid() == getuid() && getegid() == getgid() ?
2617                  getenv("MLX5_GLUE_PATH") : NULL),
2618                 /*
2619                  * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
2620                  * variant, otherwise let dlopen() look up libraries on its
2621                  * own.
2622                  */
2623                 (*RTE_EAL_PMD_PATH ?
2624                  mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
2625         };
2626         unsigned int i = 0;
2627         void *handle = NULL;
2628         void **sym;
2629         const char *dlmsg;
2630
2631         while (!handle && i != RTE_DIM(path)) {
2632                 const char *end;
2633                 size_t len;
2634                 int ret;
2635
2636                 if (!path[i]) {
2637                         ++i;
2638                         continue;
2639                 }
2640                 end = strpbrk(path[i], ":;");
2641                 if (!end)
2642                         end = path[i] + strlen(path[i]);
2643                 len = end - path[i];
2644                 ret = 0;
2645                 do {
2646                         char name[ret + 1];
2647
2648                         ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
2649                                        (int)len, path[i],
2650                                        (!len || *(end - 1) == '/') ? "" : "/");
2651                         if (ret == -1)
2652                                 break;
2653                         if (sizeof(name) != (size_t)ret + 1)
2654                                 continue;
2655                         DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
2656                                 name);
2657                         handle = dlopen(name, RTLD_LAZY);
2658                         break;
2659                 } while (1);
2660                 path[i] = end + 1;
2661                 if (!*end)
2662                         ++i;
2663         }
2664         if (!handle) {
2665                 rte_errno = EINVAL;
2666                 dlmsg = dlerror();
2667                 if (dlmsg)
2668                         DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
2669                 goto glue_error;
2670         }
2671         sym = dlsym(handle, "mlx5_glue");
2672         if (!sym || !*sym) {
2673                 rte_errno = EINVAL;
2674                 dlmsg = dlerror();
2675                 if (dlmsg)
2676                         DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
2677                 goto glue_error;
2678         }
2679         mlx5_glue = *sym;
2680         return 0;
2681 glue_error:
2682         if (handle)
2683                 dlclose(handle);
2684         DRV_LOG(WARNING,
2685                 "cannot initialize PMD due to missing run-time dependency on"
2686                 " rdma-core libraries (libibverbs, libmlx5)");
2687         return -rte_errno;
2688 }
2689
2690 #endif
2691
2692 /**
2693  * Driver initialization routine.
2694  */
2695 RTE_INIT(rte_mlx5_pmd_init)
2696 {
2697         /* Initialize driver log type. */
2698         mlx5_logtype = rte_log_register("pmd.net.mlx5");
2699         if (mlx5_logtype >= 0)
2700                 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
2701
2702         /* Build the static tables for Verbs conversion. */
2703         mlx5_set_ptype_table();
2704         mlx5_set_cksum_table();
2705         mlx5_set_swp_types_table();
2706         /*
2707          * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
2708          * huge pages. Calling ibv_fork_init() during init allows
2709          * applications to use fork() safely for purposes other than
2710          * using this PMD, which is not supported in forked processes.
2711          */
2712         setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
2713         /* Match the size of Rx completion entry to the size of a cacheline. */
2714         if (RTE_CACHE_LINE_SIZE == 128)
2715                 setenv("MLX5_CQE_SIZE", "128", 0);
2716         /*
2717          * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
2718          * cleanup all the Verbs resources even when the device was removed.
2719          */
2720         setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
2721 #ifdef RTE_IBVERBS_LINK_DLOPEN
2722         if (mlx5_glue_init())
2723                 return;
2724         assert(mlx5_glue);
2725 #endif
2726 #ifndef NDEBUG
2727         /* Glue structure must not contain any NULL pointers. */
2728         {
2729                 unsigned int i;
2730
2731                 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
2732                         assert(((const void *const *)mlx5_glue)[i]);
2733         }
2734 #endif
2735         if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
2736                 DRV_LOG(ERR,
2737                         "rdma-core glue \"%s\" mismatch: \"%s\" is required",
2738                         mlx5_glue->version, MLX5_GLUE_VERSION);
2739                 return;
2740         }
2741         mlx5_glue->fork_init();
2742         rte_pci_register(&mlx5_driver);
2743 }
2744
2745 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
2746 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
2747 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");