drivers/net/mlx5/mlx5.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2015 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <assert.h>
  10 #include <dlfcn.h>
  11 #include <stdint.h>
  12 #include <stdlib.h>
  13 #include <errno.h>
  14 #include <net/if.h>
  15 #include <sys/mman.h>
  16 #include <linux/rtnetlink.h>
  17
  18 /* Verbs header. */
  19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  20 #ifdef PEDANTIC
  21 #pragma GCC diagnostic ignored "-Wpedantic"
  22 #endif
  23 #include <infiniband/verbs.h>
  24 #ifdef PEDANTIC
  25 #pragma GCC diagnostic error "-Wpedantic"
  26 #endif
  27
  28 #include <rte_malloc.h>
  29 #include <rte_ethdev_driver.h>
  30 #include <rte_ethdev_pci.h>
  31 #include <rte_pci.h>
  32 #include <rte_bus_pci.h>
  33 #include <rte_common.h>
  34 #include <rte_config.h>
  35 #include <rte_eal_memconfig.h>
  36 #include <rte_kvargs.h>
  37 #include <rte_rwlock.h>
  38 #include <rte_spinlock.h>
  39 #include <rte_string_fns.h>
  40
  41 #include "mlx5.h"
  42 #include "mlx5_utils.h"
  43 #include "mlx5_rxtx.h"
  44 #include "mlx5_autoconf.h"
  45 #include "mlx5_defs.h"
  46 #include "mlx5_glue.h"
  47 #include "mlx5_mr.h"
  48 #include "mlx5_flow.h"
  49
  50 /* Device parameter to enable RX completion queue compression. */
  51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
  52
  53 /* Device parameter to enable RX completion entry padding to 128B. */
  54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
  55
  56 /* Device parameter to enable padding Rx packet to cacheline size. */
  57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
  58
  59 /* Device parameter to enable Multi-Packet Rx queue. */
  60 #define MLX5_RX_MPRQ_EN "mprq_en"
  61
  62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
  63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
  64
  65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
  66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
  67
  68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
  69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
  70
  71 /* Device parameter to configure inline send. */
  72 #define MLX5_TXQ_INLINE "txq_inline"
  73
  74 /*
  75  * Device parameter to configure the number of TX queues threshold for
  76  * enabling inline send.
  77  */
  78 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
  79
  80 /*
  81  * Device parameter to configure the number of TX queues threshold for
  82  * enabling vectorized Tx.
  83  */
  84 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
  85
  86 /* Device parameter to enable multi-packet send WQEs. */
  87 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
  88
  89 /* Device parameter to include 2 dsegs in the title WQEBB. */
  90 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
  91
  92 /* Device parameter to limit the size of inlining packet. */
  93 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
  94
  95 /* Device parameter to enable hardware Tx vector. */
  96 #define MLX5_TX_VEC_EN "tx_vec_en"
  97
  98 /* Device parameter to enable hardware Rx vector. */
  99 #define MLX5_RX_VEC_EN "rx_vec_en"
 100
 101 /* Allow L3 VXLAN flow creation. */
 102 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
 103
 104 /* Activate DV flow steering. */
 105 #define MLX5_DV_FLOW_EN "dv_flow_en"
 106
 107 /* Activate Netlink support in VF mode. */
 108 #define MLX5_VF_NL_EN "vf_nl_en"
 109
 110 /* Select port representors to instantiate. */
 111 #define MLX5_REPRESENTOR "representor"
 112
 113 #ifndef HAVE_IBV_MLX5_MOD_MPW
 114 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
 115 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
 116 #endif
 117
 118 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
 119 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
 120 #endif
 121
 122 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
 123
 124 /* Shared memory between primary and secondary processes. */
 125 struct mlx5_shared_data *mlx5_shared_data;
 126
 127 /* Spinlock for mlx5_shared_data allocation. */
 128 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
 129
 130 /** Driver-specific log messages type. */
 131 int mlx5_logtype;
 132
 133 /** Data associated with devices to spawn. */
 134 struct mlx5_dev_spawn_data {
 135         uint32_t ifindex; /**< Network interface index. */
 136         uint32_t max_port; /**< IB device maximal port index. */
 137         uint32_t ibv_port; /**< IB device physical port index. */
 138         struct mlx5_switch_info info; /**< Switch information. */
 139         struct ibv_device *ibv_dev; /**< Associated IB device. */
 140         struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
 141 };
 142
 143 /**
 144  * Prepare shared data between primary and secondary process.
 145  */
 146 static void
 147 mlx5_prepare_shared_data(void)
 148 {
 149         const struct rte_memzone *mz;
 150
 151         rte_spinlock_lock(&mlx5_shared_data_lock);
 152         if (mlx5_shared_data == NULL) {
 153                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 154                         /* Allocate shared memory. */
 155                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 156                                                  sizeof(*mlx5_shared_data),
 157                                                  SOCKET_ID_ANY, 0);
 158                 } else {
 159                         /* Lookup allocated shared memory. */
 160                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 161                 }
 162                 if (mz == NULL)
 163                         rte_panic("Cannot allocate mlx5 shared data\n");
 164                 mlx5_shared_data = mz->addr;
 165                 /* Initialize shared data. */
 166                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 167                         LIST_INIT(&mlx5_shared_data->mem_event_cb_list);
 168                         rte_rwlock_init(&mlx5_shared_data->mem_event_rwlock);
 169                 }
 170                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
 171                                                 mlx5_mr_mem_event_cb, NULL);
 172         }
 173         rte_spinlock_unlock(&mlx5_shared_data_lock);
 174 }
 175
 176 /**
 177  * Retrieve integer value from environment variable.
 178  *
 179  * @param[in] name
 180  *   Environment variable name.
 181  *
 182  * @return
 183  *   Integer value, 0 if the variable is not set.
 184  */
 185 int
 186 mlx5_getenv_int(const char *name)
 187 {
 188         const char *val = getenv(name);
 189
 190         if (val == NULL)
 191                 return 0;
 192         return atoi(val);
 193 }
 194
 195 /**
 196  * Verbs callback to allocate a memory. This function should allocate the space
 197  * according to the size provided residing inside a huge page.
 198  * Please note that all allocation must respect the alignment from libmlx5
 199  * (i.e. currently sysconf(_SC_PAGESIZE)).
 200  *
 201  * @param[in] size
 202  *   The size in bytes of the memory to allocate.
 203  * @param[in] data
 204  *   A pointer to the callback data.
 205  *
 206  * @return
 207  *   Allocated buffer, NULL otherwise and rte_errno is set.
 208  */
 209 static void *
 210 mlx5_alloc_verbs_buf(size_t size, void *data)
 211 {
 212         struct mlx5_priv *priv = data;
 213         void *ret;
 214         size_t alignment = sysconf(_SC_PAGESIZE);
 215         unsigned int socket = SOCKET_ID_ANY;
 216
 217         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
 218                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 219
 220                 socket = ctrl->socket;
 221         } else if (priv->verbs_alloc_ctx.type ==
 222                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
 223                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 224
 225                 socket = ctrl->socket;
 226         }
 227         assert(data != NULL);
 228         ret = rte_malloc_socket(__func__, size, alignment, socket);
 229         if (!ret && size)
 230                 rte_errno = ENOMEM;
 231         return ret;
 232 }
 233
 234 /**
 235  * Verbs callback to free a memory.
 236  *
 237  * @param[in] ptr
 238  *   A pointer to the memory to free.
 239  * @param[in] data
 240  *   A pointer to the callback data.
 241  */
 242 static void
 243 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 244 {
 245         assert(data != NULL);
 246         rte_free(ptr);
 247 }
 248
 249 /**
 250  * DPDK callback to close the device.
 251  *
 252  * Destroy all queues and objects, free memory.
 253  *
 254  * @param dev
 255  *   Pointer to Ethernet device structure.
 256  */
 257 static void
 258 mlx5_dev_close(struct rte_eth_dev *dev)
 259 {
 260         struct mlx5_priv *priv = dev->data->dev_private;
 261         unsigned int i;
 262         int ret;
 263
 264         DRV_LOG(DEBUG, "port %u closing device \"%s\"",
 265                 dev->data->port_id,
 266                 ((priv->ctx != NULL) ? priv->ctx->device->name : ""));
 267         /* In case mlx5_dev_stop() has not been called. */
 268         mlx5_dev_interrupt_handler_uninstall(dev);
 269         mlx5_traffic_disable(dev);
 270         mlx5_flow_flush(dev, NULL);
 271         /* Prevent crashes when queues are still in use. */
 272         dev->rx_pkt_burst = removed_rx_burst;
 273         dev->tx_pkt_burst = removed_tx_burst;
 274         if (priv->rxqs != NULL) {
 275                 /* XXX race condition if mlx5_rx_burst() is still running. */
 276                 usleep(1000);
 277                 for (i = 0; (i != priv->rxqs_n); ++i)
 278                         mlx5_rxq_release(dev, i);
 279                 priv->rxqs_n = 0;
 280                 priv->rxqs = NULL;
 281         }
 282         if (priv->txqs != NULL) {
 283                 /* XXX race condition if mlx5_tx_burst() is still running. */
 284                 usleep(1000);
 285                 for (i = 0; (i != priv->txqs_n); ++i)
 286                         mlx5_txq_release(dev, i);
 287                 priv->txqs_n = 0;
 288                 priv->txqs = NULL;
 289         }
 290         mlx5_mprq_free_mp(dev);
 291         mlx5_mr_release(dev);
 292         if (priv->pd != NULL) {
 293                 assert(priv->ctx != NULL);
 294                 claim_zero(mlx5_glue->dealloc_pd(priv->pd));
 295                 claim_zero(mlx5_glue->close_device(priv->ctx));
 296         } else
 297                 assert(priv->ctx == NULL);
 298         if (priv->rss_conf.rss_key != NULL)
 299                 rte_free(priv->rss_conf.rss_key);
 300         if (priv->reta_idx != NULL)
 301                 rte_free(priv->reta_idx);
 302         if (priv->primary_socket)
 303                 mlx5_socket_uninit(dev);
 304         if (priv->config.vf)
 305                 mlx5_nl_mac_addr_flush(dev);
 306         if (priv->nl_socket_route >= 0)
 307                 close(priv->nl_socket_route);
 308         if (priv->nl_socket_rdma >= 0)
 309                 close(priv->nl_socket_rdma);
 310         if (priv->tcf_context)
 311                 mlx5_flow_tcf_context_destroy(priv->tcf_context);
 312         ret = mlx5_hrxq_ibv_verify(dev);
 313         if (ret)
 314                 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
 315                         dev->data->port_id);
 316         ret = mlx5_ind_table_ibv_verify(dev);
 317         if (ret)
 318                 DRV_LOG(WARNING, "port %u some indirection table still remain",
 319                         dev->data->port_id);
 320         ret = mlx5_rxq_ibv_verify(dev);
 321         if (ret)
 322                 DRV_LOG(WARNING, "port %u some Verbs Rx queue still remain",
 323                         dev->data->port_id);
 324         ret = mlx5_rxq_verify(dev);
 325         if (ret)
 326                 DRV_LOG(WARNING, "port %u some Rx queues still remain",
 327                         dev->data->port_id);
 328         ret = mlx5_txq_ibv_verify(dev);
 329         if (ret)
 330                 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
 331                         dev->data->port_id);
 332         ret = mlx5_txq_verify(dev);
 333         if (ret)
 334                 DRV_LOG(WARNING, "port %u some Tx queues still remain",
 335                         dev->data->port_id);
 336         ret = mlx5_flow_verify(dev);
 337         if (ret)
 338                 DRV_LOG(WARNING, "port %u some flows still remain",
 339                         dev->data->port_id);
 340         if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
 341                 unsigned int c = 0;
 342                 unsigned int i = mlx5_dev_to_port_id(dev->device, NULL, 0);
 343                 uint16_t port_id[i];
 344
 345                 i = RTE_MIN(mlx5_dev_to_port_id(dev->device, port_id, i), i);
 346                 while (i--) {
 347                         struct mlx5_priv *opriv =
 348                                 rte_eth_devices[port_id[i]].data->dev_private;
 349
 350                         if (!opriv ||
 351                             opriv->domain_id != priv->domain_id ||
 352                             &rte_eth_devices[port_id[i]] == dev)
 353                                 continue;
 354                         ++c;
 355                 }
 356                 if (!c)
 357                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
 358         }
 359         memset(priv, 0, sizeof(*priv));
 360         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
 361         /*
 362          * Reset mac_addrs to NULL such that it is not freed as part of
 363          * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
 364          * it is freed when dev_private is freed.
 365          */
 366         dev->data->mac_addrs = NULL;
 367 }
 368
 369 const struct eth_dev_ops mlx5_dev_ops = {
 370         .dev_configure = mlx5_dev_configure,
 371         .dev_start = mlx5_dev_start,
 372         .dev_stop = mlx5_dev_stop,
 373         .dev_set_link_down = mlx5_set_link_down,
 374         .dev_set_link_up = mlx5_set_link_up,
 375         .dev_close = mlx5_dev_close,
 376         .promiscuous_enable = mlx5_promiscuous_enable,
 377         .promiscuous_disable = mlx5_promiscuous_disable,
 378         .allmulticast_enable = mlx5_allmulticast_enable,
 379         .allmulticast_disable = mlx5_allmulticast_disable,
 380         .link_update = mlx5_link_update,
 381         .stats_get = mlx5_stats_get,
 382         .stats_reset = mlx5_stats_reset,
 383         .xstats_get = mlx5_xstats_get,
 384         .xstats_reset = mlx5_xstats_reset,
 385         .xstats_get_names = mlx5_xstats_get_names,
 386         .fw_version_get = mlx5_fw_version_get,
 387         .dev_infos_get = mlx5_dev_infos_get,
 388         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
 389         .vlan_filter_set = mlx5_vlan_filter_set,
 390         .rx_queue_setup = mlx5_rx_queue_setup,
 391         .tx_queue_setup = mlx5_tx_queue_setup,
 392         .rx_queue_release = mlx5_rx_queue_release,
 393         .tx_queue_release = mlx5_tx_queue_release,
 394         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
 395         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
 396         .mac_addr_remove = mlx5_mac_addr_remove,
 397         .mac_addr_add = mlx5_mac_addr_add,
 398         .mac_addr_set = mlx5_mac_addr_set,
 399         .set_mc_addr_list = mlx5_set_mc_addr_list,
 400         .mtu_set = mlx5_dev_set_mtu,
 401         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
 402         .vlan_offload_set = mlx5_vlan_offload_set,
 403         .reta_update = mlx5_dev_rss_reta_update,
 404         .reta_query = mlx5_dev_rss_reta_query,
 405         .rss_hash_update = mlx5_rss_hash_update,
 406         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
 407         .filter_ctrl = mlx5_dev_filter_ctrl,
 408         .rx_descriptor_status = mlx5_rx_descriptor_status,
 409         .tx_descriptor_status = mlx5_tx_descriptor_status,
 410         .rx_queue_count = mlx5_rx_queue_count,
 411         .rx_queue_intr_enable = mlx5_rx_intr_enable,
 412         .rx_queue_intr_disable = mlx5_rx_intr_disable,
 413         .is_removed = mlx5_is_removed,
 414 };
 415
 416 /* Available operations from secondary process. */
 417 static const struct eth_dev_ops mlx5_dev_sec_ops = {
 418         .stats_get = mlx5_stats_get,
 419         .stats_reset = mlx5_stats_reset,
 420         .xstats_get = mlx5_xstats_get,
 421         .xstats_reset = mlx5_xstats_reset,
 422         .xstats_get_names = mlx5_xstats_get_names,
 423         .fw_version_get = mlx5_fw_version_get,
 424         .dev_infos_get = mlx5_dev_infos_get,
 425         .rx_descriptor_status = mlx5_rx_descriptor_status,
 426         .tx_descriptor_status = mlx5_tx_descriptor_status,
 427 };
 428
 429 /* Available operations in flow isolated mode. */
 430 const struct eth_dev_ops mlx5_dev_ops_isolate = {
 431         .dev_configure = mlx5_dev_configure,
 432         .dev_start = mlx5_dev_start,
 433         .dev_stop = mlx5_dev_stop,
 434         .dev_set_link_down = mlx5_set_link_down,
 435         .dev_set_link_up = mlx5_set_link_up,
 436         .dev_close = mlx5_dev_close,
 437         .promiscuous_enable = mlx5_promiscuous_enable,
 438         .promiscuous_disable = mlx5_promiscuous_disable,
 439         .allmulticast_enable = mlx5_allmulticast_enable,
 440         .allmulticast_disable = mlx5_allmulticast_disable,
 441         .link_update = mlx5_link_update,
 442         .stats_get = mlx5_stats_get,
 443         .stats_reset = mlx5_stats_reset,
 444         .xstats_get = mlx5_xstats_get,
 445         .xstats_reset = mlx5_xstats_reset,
 446         .xstats_get_names = mlx5_xstats_get_names,
 447         .fw_version_get = mlx5_fw_version_get,
 448         .dev_infos_get = mlx5_dev_infos_get,
 449         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
 450         .vlan_filter_set = mlx5_vlan_filter_set,
 451         .rx_queue_setup = mlx5_rx_queue_setup,
 452         .tx_queue_setup = mlx5_tx_queue_setup,
 453         .rx_queue_release = mlx5_rx_queue_release,
 454         .tx_queue_release = mlx5_tx_queue_release,
 455         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
 456         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
 457         .mac_addr_remove = mlx5_mac_addr_remove,
 458         .mac_addr_add = mlx5_mac_addr_add,
 459         .mac_addr_set = mlx5_mac_addr_set,
 460         .set_mc_addr_list = mlx5_set_mc_addr_list,
 461         .mtu_set = mlx5_dev_set_mtu,
 462         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
 463         .vlan_offload_set = mlx5_vlan_offload_set,
 464         .filter_ctrl = mlx5_dev_filter_ctrl,
 465         .rx_descriptor_status = mlx5_rx_descriptor_status,
 466         .tx_descriptor_status = mlx5_tx_descriptor_status,
 467         .rx_queue_intr_enable = mlx5_rx_intr_enable,
 468         .rx_queue_intr_disable = mlx5_rx_intr_disable,
 469         .is_removed = mlx5_is_removed,
 470 };
 471
 472 /**
 473  * Verify and store value for device argument.
 474  *
 475  * @param[in] key
 476  *   Key argument to verify.
 477  * @param[in] val
 478  *   Value associated with key.
 479  * @param opaque
 480  *   User data.
 481  *
 482  * @return
 483  *   0 on success, a negative errno value otherwise and rte_errno is set.
 484  */
 485 static int
 486 mlx5_args_check(const char *key, const char *val, void *opaque)
 487 {
 488         struct mlx5_dev_config *config = opaque;
 489         unsigned long tmp;
 490
 491         /* No-op, port representors are processed in mlx5_dev_spawn(). */
 492         if (!strcmp(MLX5_REPRESENTOR, key))
 493                 return 0;
 494         errno = 0;
 495         tmp = strtoul(val, NULL, 0);
 496         if (errno) {
 497                 rte_errno = errno;
 498                 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
 499                 return -rte_errno;
 500         }
 501         if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
 502                 config->cqe_comp = !!tmp;
 503         } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
 504                 config->cqe_pad = !!tmp;
 505         } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
 506                 config->hw_padding = !!tmp;
 507         } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
 508                 config->mprq.enabled = !!tmp;
 509         } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
 510                 config->mprq.stride_num_n = tmp;
 511         } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
 512                 config->mprq.max_memcpy_len = tmp;
 513         } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
 514                 config->mprq.min_rxqs_num = tmp;
 515         } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
 516                 config->txq_inline = tmp;
 517         } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
 518                 config->txqs_inline = tmp;
 519         } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
 520                 config->txqs_vec = tmp;
 521         } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
 522                 config->mps = !!tmp;
 523         } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
 524                 config->mpw_hdr_dseg = !!tmp;
 525         } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
 526                 config->inline_max_packet_sz = tmp;
 527         } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
 528                 config->tx_vec_en = !!tmp;
 529         } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
 530                 config->rx_vec_en = !!tmp;
 531         } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
 532                 config->l3_vxlan_en = !!tmp;
 533         } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
 534                 config->vf_nl_en = !!tmp;
 535         } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
 536                 config->dv_flow_en = !!tmp;
 537         } else {
 538                 DRV_LOG(WARNING, "%s: unknown parameter", key);
 539                 rte_errno = EINVAL;
 540                 return -rte_errno;
 541         }
 542         return 0;
 543 }
 544
 545 /**
 546  * Parse device parameters.
 547  *
 548  * @param config
 549  *   Pointer to device configuration structure.
 550  * @param devargs
 551  *   Device arguments structure.
 552  *
 553  * @return
 554  *   0 on success, a negative errno value otherwise and rte_errno is set.
 555  */
 556 static int
 557 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
 558 {
 559         const char **params = (const char *[]){
 560                 MLX5_RXQ_CQE_COMP_EN,
 561                 MLX5_RXQ_CQE_PAD_EN,
 562                 MLX5_RXQ_PKT_PAD_EN,
 563                 MLX5_RX_MPRQ_EN,
 564                 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
 565                 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
 566                 MLX5_RXQS_MIN_MPRQ,
 567                 MLX5_TXQ_INLINE,
 568                 MLX5_TXQS_MIN_INLINE,
 569                 MLX5_TXQS_MAX_VEC,
 570                 MLX5_TXQ_MPW_EN,
 571                 MLX5_TXQ_MPW_HDR_DSEG_EN,
 572                 MLX5_TXQ_MAX_INLINE_LEN,
 573                 MLX5_TX_VEC_EN,
 574                 MLX5_RX_VEC_EN,
 575                 MLX5_L3_VXLAN_EN,
 576                 MLX5_VF_NL_EN,
 577                 MLX5_DV_FLOW_EN,
 578                 MLX5_REPRESENTOR,
 579                 NULL,
 580         };
 581         struct rte_kvargs *kvlist;
 582         int ret = 0;
 583         int i;
 584
 585         if (devargs == NULL)
 586                 return 0;
 587         /* Following UGLY cast is done to pass checkpatch. */
 588         kvlist = rte_kvargs_parse(devargs->args, params);
 589         if (kvlist == NULL)
 590                 return 0;
 591         /* Process parameters. */
 592         for (i = 0; (params[i] != NULL); ++i) {
 593                 if (rte_kvargs_count(kvlist, params[i])) {
 594                         ret = rte_kvargs_process(kvlist, params[i],
 595                                                  mlx5_args_check, config);
 596                         if (ret) {
 597                                 rte_errno = EINVAL;
 598                                 rte_kvargs_free(kvlist);
 599                                 return -rte_errno;
 600                         }
 601                 }
 602         }
 603         rte_kvargs_free(kvlist);
 604         return 0;
 605 }
 606
 607 static struct rte_pci_driver mlx5_driver;
 608
 609 /*
 610  * Reserved UAR address space for TXQ UAR(hw doorbell) mapping, process
 611  * local resource used by both primary and secondary to avoid duplicate
 612  * reservation.
 613  * The space has to be available on both primary and secondary process,
 614  * TXQ UAR maps to this area using fixed mmap w/o double check.
 615  */
 616 static void *uar_base;
 617
 618 static int
 619 find_lower_va_bound(const struct rte_memseg_list *msl,
 620                 const struct rte_memseg *ms, void *arg)
 621 {
 622         void **addr = arg;
 623
 624         if (msl->external)
 625                 return 0;
 626         if (*addr == NULL)
 627                 *addr = ms->addr;
 628         else
 629                 *addr = RTE_MIN(*addr, ms->addr);
 630
 631         return 0;
 632 }
 633
 634 /**
 635  * Reserve UAR address space for primary process.
 636  *
 637  * @param[in] dev
 638  *   Pointer to Ethernet device.
 639  *
 640  * @return
 641  *   0 on success, a negative errno value otherwise and rte_errno is set.
 642  */
 643 static int
 644 mlx5_uar_init_primary(struct rte_eth_dev *dev)
 645 {
 646         struct mlx5_priv *priv = dev->data->dev_private;
 647         void *addr = (void *)0;
 648
 649         if (uar_base) { /* UAR address space mapped. */
 650                 priv->uar_base = uar_base;
 651                 return 0;
 652         }
 653         /* find out lower bound of hugepage segments */
 654         rte_memseg_walk(find_lower_va_bound, &addr);
 655
 656         /* keep distance to hugepages to minimize potential conflicts. */
 657         addr = RTE_PTR_SUB(addr, (uintptr_t)(MLX5_UAR_OFFSET + MLX5_UAR_SIZE));
 658         /* anonymous mmap, no real memory consumption. */
 659         addr = mmap(addr, MLX5_UAR_SIZE,
 660                     PROT_NONE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
 661         if (addr == MAP_FAILED) {
 662                 DRV_LOG(ERR,
 663                         "port %u failed to reserve UAR address space, please"
 664                         " adjust MLX5_UAR_SIZE or try --base-virtaddr",
 665                         dev->data->port_id);
 666                 rte_errno = ENOMEM;
 667                 return -rte_errno;
 668         }
 669         /* Accept either same addr or a new addr returned from mmap if target
 670          * range occupied.
 671          */
 672         DRV_LOG(INFO, "port %u reserved UAR address space: %p",
 673                 dev->data->port_id, addr);
 674         priv->uar_base = addr; /* for primary and secondary UAR re-mmap. */
 675         uar_base = addr; /* process local, don't reserve again. */
 676         return 0;
 677 }
 678
 679 /**
 680  * Reserve UAR address space for secondary process, align with
 681  * primary process.
 682  *
 683  * @param[in] dev
 684  *   Pointer to Ethernet device.
 685  *
 686  * @return
 687  *   0 on success, a negative errno value otherwise and rte_errno is set.
 688  */
 689 static int
 690 mlx5_uar_init_secondary(struct rte_eth_dev *dev)
 691 {
 692         struct mlx5_priv *priv = dev->data->dev_private;
 693         void *addr;
 694
 695         assert(priv->uar_base);
 696         if (uar_base) { /* already reserved. */
 697                 assert(uar_base == priv->uar_base);
 698                 return 0;
 699         }
 700         /* anonymous mmap, no real memory consumption. */
 701         addr = mmap(priv->uar_base, MLX5_UAR_SIZE,
 702                     PROT_NONE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
 703         if (addr == MAP_FAILED) {
 704                 DRV_LOG(ERR, "port %u UAR mmap failed: %p size: %llu",
 705                         dev->data->port_id, priv->uar_base, MLX5_UAR_SIZE);
 706                 rte_errno = ENXIO;
 707                 return -rte_errno;
 708         }
 709         if (priv->uar_base != addr) {
 710                 DRV_LOG(ERR,
 711                         "port %u UAR address %p size %llu occupied, please"
 712                         " adjust MLX5_UAR_OFFSET or try EAL parameter"
 713                         " --base-virtaddr",
 714                         dev->data->port_id, priv->uar_base, MLX5_UAR_SIZE);
 715                 rte_errno = ENXIO;
 716                 return -rte_errno;
 717         }
 718         uar_base = addr; /* process local, don't reserve again */
 719         DRV_LOG(INFO, "port %u reserved UAR address space: %p",
 720                 dev->data->port_id, addr);
 721         return 0;
 722 }
 723
 724 /**
 725  * Spawn an Ethernet device from Verbs information.
 726  *
 727  * @param dpdk_dev
 728  *   Backing DPDK device.
 729  * @param spawn
 730  *   Verbs device parameters (name, port, switch_info) to spawn.
 731  * @param config
 732  *   Device configuration parameters.
 733  *
 734  * @return
 735  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
 736  *   is set. The following errors are defined:
 737  *
 738  *   EBUSY: device is not supposed to be spawned.
 739  *   EEXIST: device is already spawned
 740  */
 741 static struct rte_eth_dev *
 742 mlx5_dev_spawn(struct rte_device *dpdk_dev,
 743                struct mlx5_dev_spawn_data *spawn,
 744                struct mlx5_dev_config config)
 745 {
 746         const struct mlx5_switch_info *switch_info = &spawn->info;
 747         struct ibv_device *ibv_dev = spawn->ibv_dev;
 748         struct ibv_context *ctx = NULL;
 749         struct ibv_device_attr_ex attr;
 750         struct ibv_port_attr port_attr;
 751         struct ibv_pd *pd = NULL;
 752         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
 753         struct rte_eth_dev *eth_dev = NULL;
 754         struct mlx5_priv *priv = NULL;
 755         int err = 0;
 756         unsigned int hw_padding = 0;
 757         unsigned int mps;
 758         unsigned int cqe_comp;
 759         unsigned int cqe_pad = 0;
 760         unsigned int tunnel_en = 0;
 761         unsigned int mpls_en = 0;
 762         unsigned int swp = 0;
 763         unsigned int mprq = 0;
 764         unsigned int mprq_min_stride_size_n = 0;
 765         unsigned int mprq_max_stride_size_n = 0;
 766         unsigned int mprq_min_stride_num_n = 0;
 767         unsigned int mprq_max_stride_num_n = 0;
 768         struct ether_addr mac;
 769         char name[RTE_ETH_NAME_MAX_LEN];
 770         int own_domain_id = 0;
 771         uint16_t port_id;
 772         unsigned int i;
 773
 774         /* Determine if this port representor is supposed to be spawned. */
 775         if (switch_info->representor && dpdk_dev->devargs) {
 776                 struct rte_eth_devargs eth_da;
 777
 778                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
 779                 if (err) {
 780                         rte_errno = -err;
 781                         DRV_LOG(ERR, "failed to process device arguments: %s",
 782                                 strerror(rte_errno));
 783                         return NULL;
 784                 }
 785                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
 786                         if (eth_da.representor_ports[i] ==
 787                             (uint16_t)switch_info->port_name)
 788                                 break;
 789                 if (i == eth_da.nb_representor_ports) {
 790                         rte_errno = EBUSY;
 791                         return NULL;
 792                 }
 793         }
 794         /* Build device name. */
 795         if (!switch_info->representor)
 796                 strlcpy(name, dpdk_dev->name, sizeof(name));
 797         else
 798                 snprintf(name, sizeof(name), "%s_representor_%u",
 799                          dpdk_dev->name, switch_info->port_name);
 800         /* check if the device is already spawned */
 801         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
 802                 rte_errno = EEXIST;
 803                 return NULL;
 804         }
 805         /* Prepare shared data between primary and secondary process. */
 806         mlx5_prepare_shared_data();
 807         errno = 0;
 808         ctx = mlx5_glue->dv_open_device(ibv_dev);
 809         if (ctx) {
 810                 config.devx = 1;
 811                 DRV_LOG(DEBUG, "DEVX is supported");
 812         } else {
 813                 ctx = mlx5_glue->open_device(ibv_dev);
 814                 if (!ctx) {
 815                         rte_errno = errno ? errno : ENODEV;
 816                         return NULL;
 817                 }
 818         }
 819 #ifdef HAVE_IBV_MLX5_MOD_SWP
 820         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
 821 #endif
 822         /*
 823          * Multi-packet send is supported by ConnectX-4 Lx PF as well
 824          * as all ConnectX-5 devices.
 825          */
 826 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 827         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
 828 #endif
 829 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 830         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
 831 #endif
 832         mlx5_glue->dv_query_device(ctx, &dv_attr);
 833         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
 834                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
 835                         DRV_LOG(DEBUG, "enhanced MPW is supported");
 836                         mps = MLX5_MPW_ENHANCED;
 837                 } else {
 838                         DRV_LOG(DEBUG, "MPW is supported");
 839                         mps = MLX5_MPW;
 840                 }
 841         } else {
 842                 DRV_LOG(DEBUG, "MPW isn't supported");
 843                 mps = MLX5_MPW_DISABLED;
 844         }
 845 #ifdef HAVE_IBV_MLX5_MOD_SWP
 846         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
 847                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
 848         DRV_LOG(DEBUG, "SWP support: %u", swp);
 849 #endif
 850         config.swp = !!swp;
 851 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
 852         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
 853                 struct mlx5dv_striding_rq_caps mprq_caps =
 854                         dv_attr.striding_rq_caps;
 855
 856                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
 857                         mprq_caps.min_single_stride_log_num_of_bytes);
 858                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
 859                         mprq_caps.max_single_stride_log_num_of_bytes);
 860                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
 861                         mprq_caps.min_single_wqe_log_num_of_strides);
 862                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
 863                         mprq_caps.max_single_wqe_log_num_of_strides);
 864                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
 865                         mprq_caps.supported_qpts);
 866                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
 867                 mprq = 1;
 868                 mprq_min_stride_size_n =
 869                         mprq_caps.min_single_stride_log_num_of_bytes;
 870                 mprq_max_stride_size_n =
 871                         mprq_caps.max_single_stride_log_num_of_bytes;
 872                 mprq_min_stride_num_n =
 873                         mprq_caps.min_single_wqe_log_num_of_strides;
 874                 mprq_max_stride_num_n =
 875                         mprq_caps.max_single_wqe_log_num_of_strides;
 876                 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
 877                                                    mprq_min_stride_num_n);
 878         }
 879 #endif
 880         if (RTE_CACHE_LINE_SIZE == 128 &&
 881             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
 882                 cqe_comp = 0;
 883         else
 884                 cqe_comp = 1;
 885         config.cqe_comp = cqe_comp;
 886 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
 887         /* Whether device supports 128B Rx CQE padding. */
 888         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
 889                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
 890 #endif
 891 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 892         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
 893                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
 894                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
 895                              (dv_attr.tunnel_offloads_caps &
 896                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
 897         }
 898         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
 899                 tunnel_en ? "" : "not ");
 900 #else
 901         DRV_LOG(WARNING,
 902                 "tunnel offloading disabled due to old OFED/rdma-core version");
 903 #endif
 904         config.tunnel_en = tunnel_en;
 905 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
 906         mpls_en = ((dv_attr.tunnel_offloads_caps &
 907                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
 908                    (dv_attr.tunnel_offloads_caps &
 909                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
 910         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
 911                 mpls_en ? "" : "not ");
 912 #else
 913         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
 914                 " old OFED/rdma-core version or firmware configuration");
 915 #endif
 916         config.mpls_en = mpls_en;
 917         err = mlx5_glue->query_device_ex(ctx, NULL, &attr);
 918         if (err) {
 919                 DEBUG("ibv_query_device_ex() failed");
 920                 goto error;
 921         }
 922         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
 923         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
 924                 eth_dev = rte_eth_dev_attach_secondary(name);
 925                 if (eth_dev == NULL) {
 926                         DRV_LOG(ERR, "can not attach rte ethdev");
 927                         rte_errno = ENOMEM;
 928                         err = rte_errno;
 929                         goto error;
 930                 }
 931                 eth_dev->device = dpdk_dev;
 932                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
 933                 err = mlx5_uar_init_secondary(eth_dev);
 934                 if (err) {
 935                         err = rte_errno;
 936                         goto error;
 937                 }
 938                 /* Receive command fd from primary process */
 939                 err = mlx5_socket_connect(eth_dev);
 940                 if (err < 0) {
 941                         err = rte_errno;
 942                         goto error;
 943                 }
 944                 /* Remap UAR for Tx queues. */
 945                 err = mlx5_tx_uar_remap(eth_dev, err);
 946                 if (err) {
 947                         err = rte_errno;
 948                         goto error;
 949                 }
 950                 /*
 951                  * Ethdev pointer is still required as input since
 952                  * the primary device is not accessible from the
 953                  * secondary process.
 954                  */
 955                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
 956                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
 957                 claim_zero(mlx5_glue->close_device(ctx));
 958                 return eth_dev;
 959         }
 960         /* Check port status. */
 961         err = mlx5_glue->query_port(ctx, spawn->ibv_port, &port_attr);
 962         if (err) {
 963                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
 964                 goto error;
 965         }
 966         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
 967                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
 968                 err = EINVAL;
 969                 goto error;
 970         }
 971         if (port_attr.state != IBV_PORT_ACTIVE)
 972                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
 973                         mlx5_glue->port_state_str(port_attr.state),
 974                         port_attr.state);
 975         /* Allocate protection domain. */
 976         pd = mlx5_glue->alloc_pd(ctx);
 977         if (pd == NULL) {
 978                 DRV_LOG(ERR, "PD allocation failure");
 979                 err = ENOMEM;
 980                 goto error;
 981         }
 982         priv = rte_zmalloc("ethdev private structure",
 983                            sizeof(*priv),
 984                            RTE_CACHE_LINE_SIZE);
 985         if (priv == NULL) {
 986                 DRV_LOG(ERR, "priv allocation failure");
 987                 err = ENOMEM;
 988                 goto error;
 989         }
 990         priv->ctx = ctx;
 991         strncpy(priv->ibdev_name, priv->ctx->device->name,
 992                 sizeof(priv->ibdev_name));
 993         strncpy(priv->ibdev_path, priv->ctx->device->ibdev_path,
 994                 sizeof(priv->ibdev_path));
 995         priv->device_attr = attr;
 996         priv->pd = pd;
 997         priv->mtu = ETHER_MTU;
 998 #ifndef RTE_ARCH_64
 999         /* Initialize UAR access locks for 32bit implementations. */
1000         rte_spinlock_init(&priv->uar_lock_cq);
1001         for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1002                 rte_spinlock_init(&priv->uar_lock[i]);
1003 #endif
1004         /* Some internal functions rely on Netlink sockets, open them now. */
1005         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1006         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1007         priv->nl_sn = 0;
1008         priv->representor = !!switch_info->representor;
1009         priv->master = !!switch_info->master;
1010         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1011         /*
1012          * Currently we support single E-Switch per PF configurations
1013          * only and vport_id field contains the vport index for
1014          * associated VF, which is deduced from representor port name.
1015          * For exapmple, let's have the IB device port 10, it has
1016          * attached network device eth0, which has port name attribute
1017          * pf0vf2, we can deduce the VF number as 2, and set vport index
1018          * as 3 (2+1). This assigning schema should be changed if the
1019          * multiple E-Switch instances per PF configurations or/and PCI
1020          * subfunctions are added.
1021          */
1022         priv->vport_id = switch_info->representor ?
1023                          switch_info->port_name + 1 : -1;
1024         /* representor_id field keeps the unmodified port/VF index. */
1025         priv->representor_id = switch_info->representor ?
1026                                switch_info->port_name : -1;
1027         /*
1028          * Look for sibling devices in order to reuse their switch domain
1029          * if any, otherwise allocate one.
1030          */
1031         i = mlx5_dev_to_port_id(dpdk_dev, NULL, 0);
1032         if (i > 0) {
1033                 uint16_t port_id[i];
1034
1035                 i = RTE_MIN(mlx5_dev_to_port_id(dpdk_dev, port_id, i), i);
1036                 while (i--) {
1037                         const struct mlx5_priv *opriv =
1038                                 rte_eth_devices[port_id[i]].data->dev_private;
1039
1040                         if (!opriv ||
1041                             opriv->domain_id ==
1042                             RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1043                                 continue;
1044                         priv->domain_id = opriv->domain_id;
1045                         break;
1046                 }
1047         }
1048         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1049                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1050                 if (err) {
1051                         err = rte_errno;
1052                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1053                                 strerror(rte_errno));
1054                         goto error;
1055                 }
1056                 own_domain_id = 1;
1057         }
1058         err = mlx5_args(&config, dpdk_dev->devargs);
1059         if (err) {
1060                 err = rte_errno;
1061                 DRV_LOG(ERR, "failed to process device arguments: %s",
1062                         strerror(rte_errno));
1063                 goto error;
1064         }
1065         config.hw_csum = !!(attr.device_cap_flags_ex & IBV_DEVICE_RAW_IP_CSUM);
1066         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1067                 (config.hw_csum ? "" : "not "));
1068 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1069         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1070         DRV_LOG(DEBUG, "counters are not supported");
1071 #endif
1072 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
1073         if (config.dv_flow_en) {
1074                 DRV_LOG(WARNING, "DV flow is not supported");
1075                 config.dv_flow_en = 0;
1076         }
1077 #endif
1078         config.ind_table_max_size =
1079                 attr.rss_caps.max_rwq_indirection_table_size;
1080         /*
1081          * Remove this check once DPDK supports larger/variable
1082          * indirection tables.
1083          */
1084         if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1085                 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1086         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1087                 config.ind_table_max_size);
1088         config.hw_vlan_strip = !!(attr.raw_packet_caps &
1089                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1090         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1091                 (config.hw_vlan_strip ? "" : "not "));
1092         config.hw_fcs_strip = !!(attr.raw_packet_caps &
1093                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1094         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1095                 (config.hw_fcs_strip ? "" : "not "));
1096 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1097         hw_padding = !!attr.rx_pad_end_addr_align;
1098 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1099         hw_padding = !!(attr.device_cap_flags_ex &
1100                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1101 #endif
1102         if (config.hw_padding && !hw_padding) {
1103                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1104                 config.hw_padding = 0;
1105         } else if (config.hw_padding) {
1106                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1107         }
1108         config.tso = (attr.tso_caps.max_tso > 0 &&
1109                       (attr.tso_caps.supported_qpts &
1110                        (1 << IBV_QPT_RAW_PACKET)));
1111         if (config.tso)
1112                 config.tso_max_payload_sz = attr.tso_caps.max_tso;
1113         /*
1114          * MPW is disabled by default, while the Enhanced MPW is enabled
1115          * by default.
1116          */
1117         if (config.mps == MLX5_ARG_UNSET)
1118                 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1119                                                           MLX5_MPW_DISABLED;
1120         else
1121                 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
1122         DRV_LOG(INFO, "%sMPS is %s",
1123                 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
1124                 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1125         if (config.cqe_comp && !cqe_comp) {
1126                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1127                 config.cqe_comp = 0;
1128         }
1129         if (config.cqe_pad && !cqe_pad) {
1130                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1131                 config.cqe_pad = 0;
1132         } else if (config.cqe_pad) {
1133                 DRV_LOG(INFO, "Rx CQE padding is enabled");
1134         }
1135         if (config.mprq.enabled && mprq) {
1136                 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
1137                     config.mprq.stride_num_n < mprq_min_stride_num_n) {
1138                         config.mprq.stride_num_n =
1139                                 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1140                                         mprq_min_stride_num_n);
1141                         DRV_LOG(WARNING,
1142                                 "the number of strides"
1143                                 " for Multi-Packet RQ is out of range,"
1144                                 " setting default value (%u)",
1145                                 1 << config.mprq.stride_num_n);
1146                 }
1147                 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
1148                 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
1149         } else if (config.mprq.enabled && !mprq) {
1150                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1151                 config.mprq.enabled = 0;
1152         }
1153         eth_dev = rte_eth_dev_allocate(name);
1154         if (eth_dev == NULL) {
1155                 DRV_LOG(ERR, "can not allocate rte ethdev");
1156                 err = ENOMEM;
1157                 goto error;
1158         }
1159         /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1160         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1161         if (priv->representor) {
1162                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1163                 eth_dev->data->representor_id = priv->representor_id;
1164         }
1165         eth_dev->data->dev_private = priv;
1166         priv->dev_data = eth_dev->data;
1167         eth_dev->data->mac_addrs = priv->mac;
1168         eth_dev->device = dpdk_dev;
1169         err = mlx5_uar_init_primary(eth_dev);
1170         if (err) {
1171                 err = rte_errno;
1172                 goto error;
1173         }
1174         /* Configure the first MAC address by default. */
1175         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1176                 DRV_LOG(ERR,
1177                         "port %u cannot get MAC address, is mlx5_en"
1178                         " loaded? (errno: %s)",
1179                         eth_dev->data->port_id, strerror(rte_errno));
1180                 err = ENODEV;
1181                 goto error;
1182         }
1183         DRV_LOG(INFO,
1184                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1185                 eth_dev->data->port_id,
1186                 mac.addr_bytes[0], mac.addr_bytes[1],
1187                 mac.addr_bytes[2], mac.addr_bytes[3],
1188                 mac.addr_bytes[4], mac.addr_bytes[5]);
1189 #ifndef NDEBUG
1190         {
1191                 char ifname[IF_NAMESIZE];
1192
1193                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1194                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1195                                 eth_dev->data->port_id, ifname);
1196                 else
1197                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1198                                 eth_dev->data->port_id);
1199         }
1200 #endif
1201         /* Get actual MTU if possible. */
1202         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1203         if (err) {
1204                 err = rte_errno;
1205                 goto error;
1206         }
1207         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1208                 priv->mtu);
1209         /* Initialize burst functions to prevent crashes before link-up. */
1210         eth_dev->rx_pkt_burst = removed_rx_burst;
1211         eth_dev->tx_pkt_burst = removed_tx_burst;
1212         eth_dev->dev_ops = &mlx5_dev_ops;
1213         /* Register MAC address. */
1214         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1215         if (config.vf && config.vf_nl_en)
1216                 mlx5_nl_mac_addr_sync(eth_dev);
1217         priv->tcf_context = mlx5_flow_tcf_context_create();
1218         if (!priv->tcf_context) {
1219                 err = -rte_errno;
1220                 DRV_LOG(WARNING,
1221                         "flow rules relying on switch offloads will not be"
1222                         " supported: cannot open libmnl socket: %s",
1223                         strerror(rte_errno));
1224         } else {
1225                 struct rte_flow_error error;
1226                 unsigned int ifindex = mlx5_ifindex(eth_dev);
1227
1228                 if (!ifindex) {
1229                         err = -rte_errno;
1230                         error.message =
1231                                 "cannot retrieve network interface index";
1232                 } else {
1233                         err = mlx5_flow_tcf_init(priv->tcf_context,
1234                                                  ifindex, &error);
1235                 }
1236                 if (err) {
1237                         DRV_LOG(WARNING,
1238                                 "flow rules relying on switch offloads will"
1239                                 " not be supported: %s: %s",
1240                                 error.message, strerror(rte_errno));
1241                         mlx5_flow_tcf_context_destroy(priv->tcf_context);
1242                         priv->tcf_context = NULL;
1243                 }
1244         }
1245         TAILQ_INIT(&priv->flows);
1246         TAILQ_INIT(&priv->ctrl_flows);
1247         /* Hint libmlx5 to use PMD allocator for data plane resources */
1248         struct mlx5dv_ctx_allocators alctr = {
1249                 .alloc = &mlx5_alloc_verbs_buf,
1250                 .free = &mlx5_free_verbs_buf,
1251                 .data = priv,
1252         };
1253         mlx5_glue->dv_set_context_attr(ctx, MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1254                                        (void *)((uintptr_t)&alctr));
1255         /* Bring Ethernet device up. */
1256         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1257                 eth_dev->data->port_id);
1258         mlx5_set_link_up(eth_dev);
1259         /*
1260          * Even though the interrupt handler is not installed yet,
1261          * interrupts will still trigger on the asyn_fd from
1262          * Verbs context returned by ibv_open_device().
1263          */
1264         mlx5_link_update(eth_dev, 0);
1265         /* Store device configuration on private structure. */
1266         priv->config = config;
1267         /* Supported Verbs flow priority number detection. */
1268         err = mlx5_flow_discover_priorities(eth_dev);
1269         if (err < 0) {
1270                 err = -err;
1271                 goto error;
1272         }
1273         priv->config.flow_prio = err;
1274         /*
1275          * Once the device is added to the list of memory event
1276          * callback, its global MR cache table cannot be expanded
1277          * on the fly because of deadlock. If it overflows, lookup
1278          * should be done by searching MR list linearly, which is slow.
1279          */
1280         err = mlx5_mr_btree_init(&priv->mr.cache,
1281                                  MLX5_MR_BTREE_CACHE_N * 2,
1282                                  eth_dev->device->numa_node);
1283         if (err) {
1284                 err = rte_errno;
1285                 goto error;
1286         }
1287         /* Add device to memory callback list. */
1288         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
1289         LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
1290                          priv, mem_event_cb);
1291         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
1292         return eth_dev;
1293 error:
1294         if (priv) {
1295                 if (priv->nl_socket_route >= 0)
1296                         close(priv->nl_socket_route);
1297                 if (priv->nl_socket_rdma >= 0)
1298                         close(priv->nl_socket_rdma);
1299                 if (priv->tcf_context)
1300                         mlx5_flow_tcf_context_destroy(priv->tcf_context);
1301                 if (own_domain_id)
1302                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1303                 rte_free(priv);
1304                 if (eth_dev != NULL)
1305                         eth_dev->data->dev_private = NULL;
1306         }
1307         if (pd)
1308                 claim_zero(mlx5_glue->dealloc_pd(pd));
1309         if (eth_dev != NULL) {
1310                 /* mac_addrs must not be freed alone because part of dev_private */
1311                 eth_dev->data->mac_addrs = NULL;
1312                 rte_eth_dev_release_port(eth_dev);
1313         }
1314         if (ctx)
1315                 claim_zero(mlx5_glue->close_device(ctx));
1316         assert(err > 0);
1317         rte_errno = err;
1318         return NULL;
1319 }
1320
1321 /**
1322  * Comparison callback to sort device data.
1323  *
1324  * This is meant to be used with qsort().
1325  *
1326  * @param a[in]
1327  *   Pointer to pointer to first data object.
1328  * @param b[in]
1329  *   Pointer to pointer to second data object.
1330  *
1331  * @return
1332  *   0 if both objects are equal, less than 0 if the first argument is less
1333  *   than the second, greater than 0 otherwise.
1334  */
1335 static int
1336 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1337 {
1338         const struct mlx5_switch_info *si_a =
1339                 &((const struct mlx5_dev_spawn_data *)a)->info;
1340         const struct mlx5_switch_info *si_b =
1341                 &((const struct mlx5_dev_spawn_data *)b)->info;
1342         int ret;
1343
1344         /* Master device first. */
1345         ret = si_b->master - si_a->master;
1346         if (ret)
1347                 return ret;
1348         /* Then representor devices. */
1349         ret = si_b->representor - si_a->representor;
1350         if (ret)
1351                 return ret;
1352         /* Unidentified devices come last in no specific order. */
1353         if (!si_a->representor)
1354                 return 0;
1355         /* Order representors by name. */
1356         return si_a->port_name - si_b->port_name;
1357 }
1358
1359 /**
1360  * DPDK callback to register a PCI device.
1361  *
1362  * This function spawns Ethernet devices out of a given PCI device.
1363  *
1364  * @param[in] pci_drv
1365  *   PCI driver structure (mlx5_driver).
1366  * @param[in] pci_dev
1367  *   PCI device information.
1368  *
1369  * @return
1370  *   0 on success, a negative errno value otherwise and rte_errno is set.
1371  */
1372 static int
1373 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1374                struct rte_pci_device *pci_dev)
1375 {
1376         struct ibv_device **ibv_list;
1377         /*
1378          * Number of found IB Devices matching with requested PCI BDF.
1379          * nd != 1 means there are multiple IB devices over the same
1380          * PCI device and we have representors and master.
1381          */
1382         unsigned int nd = 0;
1383         /*
1384          * Number of found IB device Ports. nd = 1 and np = 1..n means
1385          * we have the single multiport IB device, and there may be
1386          * representors attached to some of found ports.
1387          */
1388         unsigned int np = 0;
1389         /*
1390          * Number of DPDK ethernet devices to Spawn - either over
1391          * multiple IB devices or multiple ports of single IB device.
1392          * Actually this is the number of iterations to spawn.
1393          */
1394         unsigned int ns = 0;
1395         struct mlx5_dev_config dev_config;
1396         int ret;
1397
1398         assert(pci_drv == &mlx5_driver);
1399         errno = 0;
1400         ibv_list = mlx5_glue->get_device_list(&ret);
1401         if (!ibv_list) {
1402                 rte_errno = errno ? errno : ENOSYS;
1403                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1404                 return -rte_errno;
1405         }
1406         /*
1407          * First scan the list of all Infiniband devices to find
1408          * matching ones, gathering into the list.
1409          */
1410         struct ibv_device *ibv_match[ret + 1];
1411         int nl_route = -1;
1412         int nl_rdma = -1;
1413         unsigned int i;
1414
1415         while (ret-- > 0) {
1416                 struct rte_pci_addr pci_addr;
1417
1418                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1419                 if (mlx5_ibv_device_to_pci_addr(ibv_list[ret], &pci_addr))
1420                         continue;
1421                 if (pci_dev->addr.domain != pci_addr.domain ||
1422                     pci_dev->addr.bus != pci_addr.bus ||
1423                     pci_dev->addr.devid != pci_addr.devid ||
1424                     pci_dev->addr.function != pci_addr.function)
1425                         continue;
1426                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1427                         ibv_list[ret]->name);
1428                 ibv_match[nd++] = ibv_list[ret];
1429         }
1430         ibv_match[nd] = NULL;
1431         if (!nd) {
1432                 /* No device macthes, just complain and bail out. */
1433                 mlx5_glue->free_device_list(ibv_list);
1434                 DRV_LOG(WARNING,
1435                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
1436                         " are kernel drivers loaded?",
1437                         pci_dev->addr.domain, pci_dev->addr.bus,
1438                         pci_dev->addr.devid, pci_dev->addr.function);
1439                 rte_errno = ENOENT;
1440                 ret = -rte_errno;
1441                 return ret;
1442         }
1443         nl_route = mlx5_nl_init(NETLINK_ROUTE);
1444         nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1445         if (nd == 1) {
1446                 /*
1447                  * Found single matching device may have multiple ports.
1448                  * Each port may be representor, we have to check the port
1449                  * number and check the representors existence.
1450                  */
1451                 if (nl_rdma >= 0)
1452                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1453                 if (!np)
1454                         DRV_LOG(WARNING, "can not get IB device \"%s\""
1455                                          " ports number", ibv_match[0]->name);
1456         }
1457         /*
1458          * Now we can determine the maximal
1459          * amount of devices to be spawned.
1460          */
1461         struct mlx5_dev_spawn_data list[np ? np : nd];
1462
1463         if (np > 1) {
1464                 /*
1465                  * Signle IB device with multiple ports found,
1466                  * it may be E-Switch master device and representors.
1467                  * We have to perform identification trough the ports.
1468                  */
1469                 assert(nl_rdma >= 0);
1470                 assert(ns == 0);
1471                 assert(nd == 1);
1472                 for (i = 1; i <= np; ++i) {
1473                         list[ns].max_port = np;
1474                         list[ns].ibv_port = i;
1475                         list[ns].ibv_dev = ibv_match[0];
1476                         list[ns].eth_dev = NULL;
1477                         list[ns].ifindex = mlx5_nl_ifindex
1478                                         (nl_rdma, list[ns].ibv_dev->name, i);
1479                         if (!list[ns].ifindex) {
1480                                 /*
1481                                  * No network interface index found for the
1482                                  * specified port, it means there is no
1483                                  * representor on this port. It's OK,
1484                                  * there can be disabled ports, for example
1485                                  * if sriov_numvfs < sriov_totalvfs.
1486                                  */
1487                                 continue;
1488                         }
1489                         ret = -1;
1490                         if (nl_route >= 0)
1491                                 ret = mlx5_nl_switch_info
1492                                                (nl_route,
1493                                                 list[ns].ifindex,
1494                                                 &list[ns].info);
1495                         if (ret || (!list[ns].info.representor &&
1496                                     !list[ns].info.master)) {
1497                                 /*
1498                                  * We failed to recognize representors with
1499                                  * Netlink, let's try to perform the task
1500                                  * with sysfs.
1501                                  */
1502                                 ret =  mlx5_sysfs_switch_info
1503                                                 (list[ns].ifindex,
1504                                                  &list[ns].info);
1505                         }
1506                         if (!ret && (list[ns].info.representor ^
1507                                      list[ns].info.master))
1508                                 ns++;
1509                 }
1510                 if (!ns) {
1511                         DRV_LOG(ERR,
1512                                 "unable to recognize master/representors"
1513                                 " on the IB device with multiple ports");
1514                         rte_errno = ENOENT;
1515                         ret = -rte_errno;
1516                         goto exit;
1517                 }
1518         } else {
1519                 /*
1520                  * The existence of several matching entries (nd > 1) means
1521                  * port representors have been instantiated. No existing Verbs
1522                  * call nor sysfs entries can tell them apart, this can only
1523                  * be done through Netlink calls assuming kernel drivers are
1524                  * recent enough to support them.
1525                  *
1526                  * In the event of identification failure through Netlink,
1527                  * try again through sysfs, then:
1528                  *
1529                  * 1. A single IB device matches (nd == 1) with single
1530                  *    port (np=0/1) and is not a representor, assume
1531                  *    no switch support.
1532                  *
1533                  * 2. Otherwise no safe assumptions can be made;
1534                  *    complain louder and bail out.
1535                  */
1536                 np = 1;
1537                 for (i = 0; i != nd; ++i) {
1538                         memset(&list[ns].info, 0, sizeof(list[ns].info));
1539                         list[ns].max_port = 1;
1540                         list[ns].ibv_port = 1;
1541                         list[ns].ibv_dev = ibv_match[i];
1542                         list[ns].eth_dev = NULL;
1543                         list[ns].ifindex = 0;
1544                         if (nl_rdma >= 0)
1545                                 list[ns].ifindex = mlx5_nl_ifindex
1546                                         (nl_rdma, list[ns].ibv_dev->name, 1);
1547                         if (!list[ns].ifindex) {
1548                                 /*
1549                                  * No network interface index found for the
1550                                  * specified device, it means there it is not
1551                                  * a representor/master.
1552                                  */
1553                                 continue;
1554                         }
1555                         ret = -1;
1556                         if (nl_route >= 0)
1557                                 ret = mlx5_nl_switch_info
1558                                                (nl_route,
1559                                                 list[ns].ifindex,
1560                                                 &list[ns].info);
1561                         if (ret || (!list[ns].info.representor &&
1562                                     !list[ns].info.master)) {
1563                                 /*
1564                                  * We failed to recognize representors with
1565                                  * Netlink, let's try to perform the task
1566                                  * with sysfs.
1567                                  */
1568                                 ret =  mlx5_sysfs_switch_info
1569                                                 (list[ns].ifindex,
1570                                                  &list[ns].info);
1571                         }
1572                         if (!ret && (list[ns].info.representor ^
1573                                      list[ns].info.master)) {
1574                                 ns++;
1575                         } else if ((nd == 1) &&
1576                                    !list[ns].info.representor &&
1577                                    !list[ns].info.master) {
1578                                 /*
1579                                  * Single IB device with
1580                                  * one physical port and
1581                                  * attached network device.
1582                                  * May be SRIOV is not enabled
1583                                  * or there is no representors.
1584                                  */
1585                                 DRV_LOG(INFO, "no E-Switch support detected");
1586                                 ns++;
1587                                 break;
1588                         }
1589                 }
1590                 if (!ns) {
1591                         DRV_LOG(ERR,
1592                                 "unable to recognize master/representors"
1593                                 " on the multiple IB devices");
1594                         rte_errno = ENOENT;
1595                         ret = -rte_errno;
1596                         goto exit;
1597                 }
1598         }
1599         assert(ns);
1600         /*
1601          * Sort list to probe devices in natural order for users convenience
1602          * (i.e. master first, then representors from lowest to highest ID).
1603          */
1604         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
1605         /* Default configuration. */
1606         dev_config = (struct mlx5_dev_config){
1607                 .hw_padding = 0,
1608                 .mps = MLX5_ARG_UNSET,
1609                 .tx_vec_en = 1,
1610                 .rx_vec_en = 1,
1611                 .txq_inline = MLX5_ARG_UNSET,
1612                 .txqs_inline = MLX5_ARG_UNSET,
1613                 .txqs_vec = MLX5_ARG_UNSET,
1614                 .inline_max_packet_sz = MLX5_ARG_UNSET,
1615                 .vf_nl_en = 1,
1616                 .mprq = {
1617                         .enabled = 0, /* Disabled by default. */
1618                         .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
1619                         .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
1620                         .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
1621                 },
1622         };
1623         /* Device specific configuration. */
1624         switch (pci_dev->id.device_id) {
1625         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
1626                 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS_BLUEFIELD;
1627                 break;
1628         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1629         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1630         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1631         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1632                 dev_config.vf = 1;
1633                 break;
1634         default:
1635                 break;
1636         }
1637         /* Set architecture-dependent default value if unset. */
1638         if (dev_config.txqs_vec == MLX5_ARG_UNSET)
1639                 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS;
1640         for (i = 0; i != ns; ++i) {
1641                 uint32_t restore;
1642
1643                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
1644                                                  &list[i],
1645                                                  dev_config);
1646                 if (!list[i].eth_dev) {
1647                         if (rte_errno != EBUSY && rte_errno != EEXIST)
1648                                 break;
1649                         /* Device is disabled or already spawned. Ignore it. */
1650                         continue;
1651                 }
1652                 restore = list[i].eth_dev->data->dev_flags;
1653                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
1654                 /* Restore non-PCI flags cleared by the above call. */
1655                 list[i].eth_dev->data->dev_flags |= restore;
1656                 rte_eth_dev_probing_finish(list[i].eth_dev);
1657         }
1658         if (i != ns) {
1659                 DRV_LOG(ERR,
1660                         "probe of PCI device " PCI_PRI_FMT " aborted after"
1661                         " encountering an error: %s",
1662                         pci_dev->addr.domain, pci_dev->addr.bus,
1663                         pci_dev->addr.devid, pci_dev->addr.function,
1664                         strerror(rte_errno));
1665                 ret = -rte_errno;
1666                 /* Roll back. */
1667                 while (i--) {
1668                         if (!list[i].eth_dev)
1669                                 continue;
1670                         mlx5_dev_close(list[i].eth_dev);
1671                         /* mac_addrs must not be freed because in dev_private */
1672                         list[i].eth_dev->data->mac_addrs = NULL;
1673                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
1674                 }
1675                 /* Restore original error. */
1676                 rte_errno = -ret;
1677         } else {
1678                 ret = 0;
1679         }
1680 exit:
1681         /*
1682          * Do the routine cleanup:
1683          * - close opened Netlink sockets
1684          * - free the Infiniband device list
1685          */
1686         if (nl_rdma >= 0)
1687                 close(nl_rdma);
1688         if (nl_route >= 0)
1689                 close(nl_route);
1690         assert(ibv_list);
1691         mlx5_glue->free_device_list(ibv_list);
1692         return ret;
1693 }
1694
1695 /**
1696  * DPDK callback to remove a PCI device.
1697  *
1698  * This function removes all Ethernet devices belong to a given PCI device.
1699  *
1700  * @param[in] pci_dev
1701  *   Pointer to the PCI device.
1702  *
1703  * @return
1704  *   0 on success, the function cannot fail.
1705  */
1706 static int
1707 mlx5_pci_remove(struct rte_pci_device *pci_dev)
1708 {
1709         uint16_t port_id;
1710         struct rte_eth_dev *port;
1711
1712         for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++) {
1713                 port = &rte_eth_devices[port_id];
1714                 if (port->state != RTE_ETH_DEV_UNUSED &&
1715                                 port->device == &pci_dev->device)
1716                         rte_eth_dev_close(port_id);
1717         }
1718         return 0;
1719 }
1720
1721 static const struct rte_pci_id mlx5_pci_id_map[] = {
1722         {
1723                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1724                                PCI_DEVICE_ID_MELLANOX_CONNECTX4)
1725         },
1726         {
1727                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1728                                PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
1729         },
1730         {
1731                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1732                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
1733         },
1734         {
1735                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1736                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
1737         },
1738         {
1739                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1740                                PCI_DEVICE_ID_MELLANOX_CONNECTX5)
1741         },
1742         {
1743                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1744                                PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
1745         },
1746         {
1747                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1748                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
1749         },
1750         {
1751                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1752                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
1753         },
1754         {
1755                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1756                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
1757         },
1758         {
1759                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1760                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
1761         },
1762         {
1763                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1764                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
1765         },
1766         {
1767                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1768                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
1769         },
1770         {
1771                 .vendor_id = 0
1772         }
1773 };
1774
1775 static struct rte_pci_driver mlx5_driver = {
1776         .driver = {
1777                 .name = MLX5_DRIVER_NAME
1778         },
1779         .id_table = mlx5_pci_id_map,
1780         .probe = mlx5_pci_probe,
1781         .remove = mlx5_pci_remove,
1782         .dma_map = mlx5_dma_map,
1783         .dma_unmap = mlx5_dma_unmap,
1784         .drv_flags = (RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
1785                       RTE_PCI_DRV_PROBE_AGAIN),
1786 };
1787
1788 #ifdef RTE_IBVERBS_LINK_DLOPEN
1789
1790 /**
1791  * Suffix RTE_EAL_PMD_PATH with "-glue".
1792  *
1793  * This function performs a sanity check on RTE_EAL_PMD_PATH before
1794  * suffixing its last component.
1795  *
1796  * @param buf[out]
1797  *   Output buffer, should be large enough otherwise NULL is returned.
1798  * @param size
1799  *   Size of @p out.
1800  *
1801  * @return
1802  *   Pointer to @p buf or @p NULL in case suffix cannot be appended.
1803  */
1804 static char *
1805 mlx5_glue_path(char *buf, size_t size)
1806 {
1807         static const char *const bad[] = { "/", ".", "..", NULL };
1808         const char *path = RTE_EAL_PMD_PATH;
1809         size_t len = strlen(path);
1810         size_t off;
1811         int i;
1812
1813         while (len && path[len - 1] == '/')
1814                 --len;
1815         for (off = len; off && path[off - 1] != '/'; --off)
1816                 ;
1817         for (i = 0; bad[i]; ++i)
1818                 if (!strncmp(path + off, bad[i], (int)(len - off)))
1819                         goto error;
1820         i = snprintf(buf, size, "%.*s-glue", (int)len, path);
1821         if (i == -1 || (size_t)i >= size)
1822                 goto error;
1823         return buf;
1824 error:
1825         DRV_LOG(ERR,
1826                 "unable to append \"-glue\" to last component of"
1827                 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
1828                 " please re-configure DPDK");
1829         return NULL;
1830 }
1831
1832 /**
1833  * Initialization routine for run-time dependency on rdma-core.
1834  */
1835 static int
1836 mlx5_glue_init(void)
1837 {
1838         char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
1839         const char *path[] = {
1840                 /*
1841                  * A basic security check is necessary before trusting
1842                  * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
1843                  */
1844                 (geteuid() == getuid() && getegid() == getgid() ?
1845                  getenv("MLX5_GLUE_PATH") : NULL),
1846                 /*
1847                  * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
1848                  * variant, otherwise let dlopen() look up libraries on its
1849                  * own.
1850                  */
1851                 (*RTE_EAL_PMD_PATH ?
1852                  mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
1853         };
1854         unsigned int i = 0;
1855         void *handle = NULL;
1856         void **sym;
1857         const char *dlmsg;
1858
1859         while (!handle && i != RTE_DIM(path)) {
1860                 const char *end;
1861                 size_t len;
1862                 int ret;
1863
1864                 if (!path[i]) {
1865                         ++i;
1866                         continue;
1867                 }
1868                 end = strpbrk(path[i], ":;");
1869                 if (!end)
1870                         end = path[i] + strlen(path[i]);
1871                 len = end - path[i];
1872                 ret = 0;
1873                 do {
1874                         char name[ret + 1];
1875
1876                         ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
1877                                        (int)len, path[i],
1878                                        (!len || *(end - 1) == '/') ? "" : "/");
1879                         if (ret == -1)
1880                                 break;
1881                         if (sizeof(name) != (size_t)ret + 1)
1882                                 continue;
1883                         DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
1884                                 name);
1885                         handle = dlopen(name, RTLD_LAZY);
1886                         break;
1887                 } while (1);
1888                 path[i] = end + 1;
1889                 if (!*end)
1890                         ++i;
1891         }
1892         if (!handle) {
1893                 rte_errno = EINVAL;
1894                 dlmsg = dlerror();
1895                 if (dlmsg)
1896                         DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
1897                 goto glue_error;
1898         }
1899         sym = dlsym(handle, "mlx5_glue");
1900         if (!sym || !*sym) {
1901                 rte_errno = EINVAL;
1902                 dlmsg = dlerror();
1903                 if (dlmsg)
1904                         DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
1905                 goto glue_error;
1906         }
1907         mlx5_glue = *sym;
1908         return 0;
1909 glue_error:
1910         if (handle)
1911                 dlclose(handle);
1912         DRV_LOG(WARNING,
1913                 "cannot initialize PMD due to missing run-time dependency on"
1914                 " rdma-core libraries (libibverbs, libmlx5)");
1915         return -rte_errno;
1916 }
1917
1918 #endif
1919
1920 /**
1921  * Driver initialization routine.
1922  */
1923 RTE_INIT(rte_mlx5_pmd_init)
1924 {
1925         /* Initialize driver log type. */
1926         mlx5_logtype = rte_log_register("pmd.net.mlx5");
1927         if (mlx5_logtype >= 0)
1928                 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
1929
1930         /* Build the static tables for Verbs conversion. */
1931         mlx5_set_ptype_table();
1932         mlx5_set_cksum_table();
1933         mlx5_set_swp_types_table();
1934         /*
1935          * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
1936          * huge pages. Calling ibv_fork_init() during init allows
1937          * applications to use fork() safely for purposes other than
1938          * using this PMD, which is not supported in forked processes.
1939          */
1940         setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
1941         /* Match the size of Rx completion entry to the size of a cacheline. */
1942         if (RTE_CACHE_LINE_SIZE == 128)
1943                 setenv("MLX5_CQE_SIZE", "128", 0);
1944         /*
1945          * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
1946          * cleanup all the Verbs resources even when the device was removed.
1947          */
1948         setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
1949 #ifdef RTE_IBVERBS_LINK_DLOPEN
1950         if (mlx5_glue_init())
1951                 return;
1952         assert(mlx5_glue);
1953 #endif
1954 #ifndef NDEBUG
1955         /* Glue structure must not contain any NULL pointers. */
1956         {
1957                 unsigned int i;
1958
1959                 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
1960                         assert(((const void *const *)mlx5_glue)[i]);
1961         }
1962 #endif
1963         if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
1964                 DRV_LOG(ERR,
1965                         "rdma-core glue \"%s\" mismatch: \"%s\" is required",
1966                         mlx5_glue->version, MLX5_GLUE_VERSION);
1967                 return;
1968         }
1969         mlx5_glue->fork_init();
1970         rte_pci_register(&mlx5_driver);
1971 }
1972
1973 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
1974 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
1975 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");