drivers/net/mlx5/mlx5.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2015 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <assert.h>
  10 #include <dlfcn.h>
  11 #include <stdint.h>
  12 #include <stdlib.h>
  13 #include <errno.h>
  14 #include <net/if.h>
  15 #include <sys/mman.h>
  16 #include <linux/rtnetlink.h>
  17
  18 /* Verbs header. */
  19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  20 #ifdef PEDANTIC
  21 #pragma GCC diagnostic ignored "-Wpedantic"
  22 #endif
  23 #include <infiniband/verbs.h>
  24 #ifdef PEDANTIC
  25 #pragma GCC diagnostic error "-Wpedantic"
  26 #endif
  27
  28 #include <rte_malloc.h>
  29 #include <rte_ethdev_driver.h>
  30 #include <rte_ethdev_pci.h>
  31 #include <rte_pci.h>
  32 #include <rte_bus_pci.h>
  33 #include <rte_common.h>
  34 #include <rte_config.h>
  35 #include <rte_eal_memconfig.h>
  36 #include <rte_kvargs.h>
  37 #include <rte_rwlock.h>
  38 #include <rte_spinlock.h>
  39 #include <rte_string_fns.h>
  40
  41 #include "mlx5.h"
  42 #include "mlx5_utils.h"
  43 #include "mlx5_rxtx.h"
  44 #include "mlx5_autoconf.h"
  45 #include "mlx5_defs.h"
  46 #include "mlx5_glue.h"
  47 #include "mlx5_mr.h"
  48 #include "mlx5_flow.h"
  49
  50 /* Device parameter to enable RX completion queue compression. */
  51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
  52
  53 /* Device parameter to enable RX completion entry padding to 128B. */
  54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
  55
  56 /* Device parameter to enable padding Rx packet to cacheline size. */
  57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
  58
  59 /* Device parameter to enable Multi-Packet Rx queue. */
  60 #define MLX5_RX_MPRQ_EN "mprq_en"
  61
  62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
  63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
  64
  65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
  66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
  67
  68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
  69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
  70
  71 /* Device parameter to configure inline send. */
  72 #define MLX5_TXQ_INLINE "txq_inline"
  73
  74 /*
  75  * Device parameter to configure the number of TX queues threshold for
  76  * enabling inline send.
  77  */
  78 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
  79
  80 /*
  81  * Device parameter to configure the number of TX queues threshold for
  82  * enabling vectorized Tx.
  83  */
  84 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
  85
  86 /* Device parameter to enable multi-packet send WQEs. */
  87 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
  88
  89 /* Device parameter to include 2 dsegs in the title WQEBB. */
  90 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
  91
  92 /* Device parameter to limit the size of inlining packet. */
  93 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
  94
  95 /* Device parameter to enable hardware Tx vector. */
  96 #define MLX5_TX_VEC_EN "tx_vec_en"
  97
  98 /* Device parameter to enable hardware Rx vector. */
  99 #define MLX5_RX_VEC_EN "rx_vec_en"
 100
 101 /* Allow L3 VXLAN flow creation. */
 102 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
 103
 104 /* Activate DV E-Switch flow steering. */
 105 #define MLX5_DV_ESW_EN "dv_esw_en"
 106
 107 /* Activate DV flow steering. */
 108 #define MLX5_DV_FLOW_EN "dv_flow_en"
 109
 110 /* Activate Netlink support in VF mode. */
 111 #define MLX5_VF_NL_EN "vf_nl_en"
 112
 113 /* Enable extending memsegs when creating a MR. */
 114 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
 115
 116 /* Select port representors to instantiate. */
 117 #define MLX5_REPRESENTOR "representor"
 118
 119 #ifndef HAVE_IBV_MLX5_MOD_MPW
 120 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
 121 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
 122 #endif
 123
 124 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
 125 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
 126 #endif
 127
 128 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
 129
 130 /* Shared memory between primary and secondary processes. */
 131 struct mlx5_shared_data *mlx5_shared_data;
 132
 133 /* Spinlock for mlx5_shared_data allocation. */
 134 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
 135
 136 /* Process local data for secondary processes. */
 137 static struct mlx5_local_data mlx5_local_data;
 138
 139 /** Driver-specific log messages type. */
 140 int mlx5_logtype;
 141
 142 /** Data associated with devices to spawn. */
 143 struct mlx5_dev_spawn_data {
 144         uint32_t ifindex; /**< Network interface index. */
 145         uint32_t max_port; /**< IB device maximal port index. */
 146         uint32_t ibv_port; /**< IB device physical port index. */
 147         struct mlx5_switch_info info; /**< Switch information. */
 148         struct ibv_device *ibv_dev; /**< Associated IB device. */
 149         struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
 150         struct rte_pci_device *pci_dev; /**< Backend PCI device. */
 151 };
 152
 153 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
 154 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
 155
 156 /**
 157  * Allocate shared IB device context. If there is multiport device the
 158  * master and representors will share this context, if there is single
 159  * port dedicated IB device, the context will be used by only given
 160  * port due to unification.
 161  *
 162  * Routine first searches the context for the specified IB device name,
 163  * if found the shared context assumed and reference counter is incremented.
 164  * If no context found the new one is created and initialized with specified
 165  * IB device context and parameters.
 166  *
 167  * @param[in] spawn
 168  *   Pointer to the IB device attributes (name, port, etc).
 169  *
 170  * @return
 171  *   Pointer to mlx5_ibv_shared object on success,
 172  *   otherwise NULL and rte_errno is set.
 173  */
 174 static struct mlx5_ibv_shared *
 175 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
 176 {
 177         struct mlx5_ibv_shared *sh;
 178         int err = 0;
 179         uint32_t i;
 180
 181         assert(spawn);
 182         /* Secondary process should not create the shared context. */
 183         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 184         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 185         /* Search for IB context by device name. */
 186         LIST_FOREACH(sh, &mlx5_ibv_list, next) {
 187                 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
 188                         sh->refcnt++;
 189                         goto exit;
 190                 }
 191         }
 192         /* No device found, we have to create new shared context. */
 193         assert(spawn->max_port);
 194         sh = rte_zmalloc("ethdev shared ib context",
 195                          sizeof(struct mlx5_ibv_shared) +
 196                          spawn->max_port *
 197                          sizeof(struct mlx5_ibv_shared_port),
 198                          RTE_CACHE_LINE_SIZE);
 199         if (!sh) {
 200                 DRV_LOG(ERR, "shared context allocation failure");
 201                 rte_errno  = ENOMEM;
 202                 goto exit;
 203         }
 204         /* Try to open IB device with DV first, then usual Verbs. */
 205         errno = 0;
 206         sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
 207         if (sh->ctx) {
 208                 sh->devx = 1;
 209                 DRV_LOG(DEBUG, "DevX is supported");
 210         } else {
 211                 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
 212                 if (!sh->ctx) {
 213                         err = errno ? errno : ENODEV;
 214                         goto error;
 215                 }
 216                 DRV_LOG(DEBUG, "DevX is NOT supported");
 217         }
 218         err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
 219         if (err) {
 220                 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
 221                 goto error;
 222         }
 223         sh->refcnt = 1;
 224         sh->max_port = spawn->max_port;
 225         strncpy(sh->ibdev_name, sh->ctx->device->name,
 226                 sizeof(sh->ibdev_name));
 227         strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
 228                 sizeof(sh->ibdev_path));
 229         sh->pci_dev = spawn->pci_dev;
 230         pthread_mutex_init(&sh->intr_mutex, NULL);
 231         /*
 232          * Setting port_id to max unallowed value means
 233          * there is no interrupt subhandler installed for
 234          * the given port index i.
 235          */
 236         for (i = 0; i < sh->max_port; i++)
 237                 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
 238         sh->pd = mlx5_glue->alloc_pd(sh->ctx);
 239         if (sh->pd == NULL) {
 240                 DRV_LOG(ERR, "PD allocation failure");
 241                 err = ENOMEM;
 242                 goto error;
 243         }
 244         /*
 245          * Once the device is added to the list of memory event
 246          * callback, its global MR cache table cannot be expanded
 247          * on the fly because of deadlock. If it overflows, lookup
 248          * should be done by searching MR list linearly, which is slow.
 249          *
 250          * At this point the device is not added to the memory
 251          * event list yet, context is just being created.
 252          */
 253         err = mlx5_mr_btree_init(&sh->mr.cache,
 254                                  MLX5_MR_BTREE_CACHE_N * 2,
 255                                  sh->pci_dev->device.numa_node);
 256         if (err) {
 257                 err = rte_errno;
 258                 goto error;
 259         }
 260         LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
 261 exit:
 262         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 263         return sh;
 264 error:
 265         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 266         assert(sh);
 267         if (sh->pd)
 268                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 269         if (sh->ctx)
 270                 claim_zero(mlx5_glue->close_device(sh->ctx));
 271         rte_free(sh);
 272         assert(err > 0);
 273         rte_errno = err;
 274         return NULL;
 275 }
 276
 277 /**
 278  * Free shared IB device context. Decrement counter and if zero free
 279  * all allocated resources and close handles.
 280  *
 281  * @param[in] sh
 282  *   Pointer to mlx5_ibv_shared object to free
 283  */
 284 static void
 285 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
 286 {
 287         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 288 #ifndef NDEBUG
 289         /* Check the object presence in the list. */
 290         struct mlx5_ibv_shared *lctx;
 291
 292         LIST_FOREACH(lctx, &mlx5_ibv_list, next)
 293                 if (lctx == sh)
 294                         break;
 295         assert(lctx);
 296         if (lctx != sh) {
 297                 DRV_LOG(ERR, "Freeing non-existing shared IB context");
 298                 goto exit;
 299         }
 300 #endif
 301         assert(sh);
 302         assert(sh->refcnt);
 303         /* Secondary process should not free the shared context. */
 304         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 305         if (--sh->refcnt)
 306                 goto exit;
 307         /* Release created Memory Regions. */
 308         mlx5_mr_release(sh);
 309         LIST_REMOVE(sh, next);
 310         /*
 311          *  Ensure there is no async event handler installed.
 312          *  Only primary process handles async device events.
 313          **/
 314         assert(!sh->intr_cnt);
 315         if (sh->intr_cnt)
 316                 rte_intr_callback_unregister
 317                         (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
 318         pthread_mutex_destroy(&sh->intr_mutex);
 319         if (sh->pd)
 320                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 321         if (sh->ctx)
 322                 claim_zero(mlx5_glue->close_device(sh->ctx));
 323         rte_free(sh);
 324 exit:
 325         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 326 }
 327
 328 /**
 329  * Initialize DR related data within private structure.
 330  * Routine checks the reference counter and does actual
 331  * resources creation/initialization only if counter is zero.
 332  *
 333  * @param[in] priv
 334  *   Pointer to the private device data structure.
 335  *
 336  * @return
 337  *   Zero on success, positive error code otherwise.
 338  */
 339 static int
 340 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 341 {
 342 #ifdef HAVE_MLX5DV_DR
 343         struct mlx5_ibv_shared *sh = priv->sh;
 344         int err = 0;
 345         void *domain;
 346
 347         assert(sh);
 348         if (sh->dv_refcnt) {
 349                 /* Shared DV/DR structures is already initialized. */
 350                 sh->dv_refcnt++;
 351                 priv->dr_shared = 1;
 352                 return 0;
 353         }
 354         /* Reference counter is zero, we should initialize structures. */
 355         domain = mlx5_glue->dr_create_domain(sh->ctx,
 356                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 357         if (!domain) {
 358                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 359                 err = errno;
 360                 goto error;
 361         }
 362         sh->rx_domain = domain;
 363         domain = mlx5_glue->dr_create_domain(sh->ctx,
 364                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 365         if (!domain) {
 366                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 367                 err = errno;
 368                 goto error;
 369         }
 370         pthread_mutex_init(&sh->dv_mutex, NULL);
 371         sh->tx_domain = domain;
 372 #ifdef HAVE_MLX5DV_DR_ESWITCH
 373         if (priv->config.dv_esw_en) {
 374                 domain  = mlx5_glue->dr_create_domain
 375                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 376                 if (!domain) {
 377                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 378                         err = errno;
 379                         goto error;
 380                 }
 381                 sh->fdb_domain = domain;
 382                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 383         }
 384 #endif
 385         sh->dv_refcnt++;
 386         priv->dr_shared = 1;
 387         return 0;
 388
 389 error:
 390        /* Rollback the created objects. */
 391         if (sh->rx_domain) {
 392                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 393                 sh->rx_domain = NULL;
 394         }
 395         if (sh->tx_domain) {
 396                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 397                 sh->tx_domain = NULL;
 398         }
 399         if (sh->fdb_domain) {
 400                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 401                 sh->fdb_domain = NULL;
 402         }
 403         if (sh->esw_drop_action) {
 404                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 405                 sh->esw_drop_action = NULL;
 406         }
 407         return err;
 408 #else
 409         (void)priv;
 410         return 0;
 411 #endif
 412 }
 413
 414 /**
 415  * Destroy DR related data within private structure.
 416  *
 417  * @param[in] priv
 418  *   Pointer to the private device data structure.
 419  */
 420 static void
 421 mlx5_free_shared_dr(struct mlx5_priv *priv)
 422 {
 423 #ifdef HAVE_MLX5DV_DR
 424         struct mlx5_ibv_shared *sh;
 425
 426         if (!priv->dr_shared)
 427                 return;
 428         priv->dr_shared = 0;
 429         sh = priv->sh;
 430         assert(sh);
 431         assert(sh->dv_refcnt);
 432         if (sh->dv_refcnt && --sh->dv_refcnt)
 433                 return;
 434         if (sh->rx_domain) {
 435                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 436                 sh->rx_domain = NULL;
 437         }
 438         if (sh->tx_domain) {
 439                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 440                 sh->tx_domain = NULL;
 441         }
 442 #ifdef HAVE_MLX5DV_DR_ESWITCH
 443         if (sh->fdb_domain) {
 444                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 445                 sh->fdb_domain = NULL;
 446         }
 447         if (sh->esw_drop_action) {
 448                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 449                 sh->esw_drop_action = NULL;
 450         }
 451 #endif
 452         pthread_mutex_destroy(&sh->dv_mutex);
 453 #else
 454         (void)priv;
 455 #endif
 456 }
 457
 458 /**
 459  * Initialize shared data between primary and secondary process.
 460  *
 461  * A memzone is reserved by primary process and secondary processes attach to
 462  * the memzone.
 463  *
 464  * @return
 465  *   0 on success, a negative errno value otherwise and rte_errno is set.
 466  */
 467 static int
 468 mlx5_init_shared_data(void)
 469 {
 470         const struct rte_memzone *mz;
 471         int ret = 0;
 472
 473         rte_spinlock_lock(&mlx5_shared_data_lock);
 474         if (mlx5_shared_data == NULL) {
 475                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 476                         /* Allocate shared memory. */
 477                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 478                                                  sizeof(*mlx5_shared_data),
 479                                                  SOCKET_ID_ANY, 0);
 480                         if (mz == NULL) {
 481                                 DRV_LOG(ERR,
 482                                         "Cannot allocate mlx5 shared data\n");
 483                                 ret = -rte_errno;
 484                                 goto error;
 485                         }
 486                         mlx5_shared_data = mz->addr;
 487                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 488                         rte_spinlock_init(&mlx5_shared_data->lock);
 489                 } else {
 490                         /* Lookup allocated shared memory. */
 491                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 492                         if (mz == NULL) {
 493                                 DRV_LOG(ERR,
 494                                         "Cannot attach mlx5 shared data\n");
 495                                 ret = -rte_errno;
 496                                 goto error;
 497                         }
 498                         mlx5_shared_data = mz->addr;
 499                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 500                 }
 501         }
 502 error:
 503         rte_spinlock_unlock(&mlx5_shared_data_lock);
 504         return ret;
 505 }
 506
 507 /**
 508  * Retrieve integer value from environment variable.
 509  *
 510  * @param[in] name
 511  *   Environment variable name.
 512  *
 513  * @return
 514  *   Integer value, 0 if the variable is not set.
 515  */
 516 int
 517 mlx5_getenv_int(const char *name)
 518 {
 519         const char *val = getenv(name);
 520
 521         if (val == NULL)
 522                 return 0;
 523         return atoi(val);
 524 }
 525
 526 /**
 527  * Verbs callback to allocate a memory. This function should allocate the space
 528  * according to the size provided residing inside a huge page.
 529  * Please note that all allocation must respect the alignment from libmlx5
 530  * (i.e. currently sysconf(_SC_PAGESIZE)).
 531  *
 532  * @param[in] size
 533  *   The size in bytes of the memory to allocate.
 534  * @param[in] data
 535  *   A pointer to the callback data.
 536  *
 537  * @return
 538  *   Allocated buffer, NULL otherwise and rte_errno is set.
 539  */
 540 static void *
 541 mlx5_alloc_verbs_buf(size_t size, void *data)
 542 {
 543         struct mlx5_priv *priv = data;
 544         void *ret;
 545         size_t alignment = sysconf(_SC_PAGESIZE);
 546         unsigned int socket = SOCKET_ID_ANY;
 547
 548         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
 549                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 550
 551                 socket = ctrl->socket;
 552         } else if (priv->verbs_alloc_ctx.type ==
 553                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
 554                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 555
 556                 socket = ctrl->socket;
 557         }
 558         assert(data != NULL);
 559         ret = rte_malloc_socket(__func__, size, alignment, socket);
 560         if (!ret && size)
 561                 rte_errno = ENOMEM;
 562         return ret;
 563 }
 564
 565 /**
 566  * Verbs callback to free a memory.
 567  *
 568  * @param[in] ptr
 569  *   A pointer to the memory to free.
 570  * @param[in] data
 571  *   A pointer to the callback data.
 572  */
 573 static void
 574 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 575 {
 576         assert(data != NULL);
 577         rte_free(ptr);
 578 }
 579
 580 /**
 581  * Initialize process private data structure.
 582  *
 583  * @param dev
 584  *   Pointer to Ethernet device structure.
 585  *
 586  * @return
 587  *   0 on success, a negative errno value otherwise and rte_errno is set.
 588  */
 589 int
 590 mlx5_proc_priv_init(struct rte_eth_dev *dev)
 591 {
 592         struct mlx5_priv *priv = dev->data->dev_private;
 593         struct mlx5_proc_priv *ppriv;
 594         size_t ppriv_size;
 595
 596         /*
 597          * UAR register table follows the process private structure. BlueFlame
 598          * registers for Tx queues are stored in the table.
 599          */
 600         ppriv_size =
 601                 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
 602         ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
 603                                   RTE_CACHE_LINE_SIZE, dev->device->numa_node);
 604         if (!ppriv) {
 605                 rte_errno = ENOMEM;
 606                 return -rte_errno;
 607         }
 608         ppriv->uar_table_sz = ppriv_size;
 609         dev->process_private = ppriv;
 610         return 0;
 611 }
 612
 613 /**
 614  * Un-initialize process private data structure.
 615  *
 616  * @param dev
 617  *   Pointer to Ethernet device structure.
 618  */
 619 static void
 620 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
 621 {
 622         if (!dev->process_private)
 623                 return;
 624         rte_free(dev->process_private);
 625         dev->process_private = NULL;
 626 }
 627
 628 /**
 629  * DPDK callback to close the device.
 630  *
 631  * Destroy all queues and objects, free memory.
 632  *
 633  * @param dev
 634  *   Pointer to Ethernet device structure.
 635  */
 636 static void
 637 mlx5_dev_close(struct rte_eth_dev *dev)
 638 {
 639         struct mlx5_priv *priv = dev->data->dev_private;
 640         unsigned int i;
 641         int ret;
 642
 643         DRV_LOG(DEBUG, "port %u closing device \"%s\"",
 644                 dev->data->port_id,
 645                 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
 646         /* In case mlx5_dev_stop() has not been called. */
 647         mlx5_dev_interrupt_handler_uninstall(dev);
 648         mlx5_traffic_disable(dev);
 649         mlx5_flow_flush(dev, NULL);
 650         /* Prevent crashes when queues are still in use. */
 651         dev->rx_pkt_burst = removed_rx_burst;
 652         dev->tx_pkt_burst = removed_tx_burst;
 653         rte_wmb();
 654         /* Disable datapath on secondary process. */
 655         mlx5_mp_req_stop_rxtx(dev);
 656         if (priv->rxqs != NULL) {
 657                 /* XXX race condition if mlx5_rx_burst() is still running. */
 658                 usleep(1000);
 659                 for (i = 0; (i != priv->rxqs_n); ++i)
 660                         mlx5_rxq_release(dev, i);
 661                 priv->rxqs_n = 0;
 662                 priv->rxqs = NULL;
 663         }
 664         if (priv->txqs != NULL) {
 665                 /* XXX race condition if mlx5_tx_burst() is still running. */
 666                 usleep(1000);
 667                 for (i = 0; (i != priv->txqs_n); ++i)
 668                         mlx5_txq_release(dev, i);
 669                 priv->txqs_n = 0;
 670                 priv->txqs = NULL;
 671         }
 672         mlx5_proc_priv_uninit(dev);
 673         mlx5_mprq_free_mp(dev);
 674         /* Remove from memory callback device list. */
 675         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
 676         assert(priv->sh);
 677         LIST_REMOVE(priv->sh, mem_event_cb);
 678         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
 679         mlx5_free_shared_dr(priv);
 680         if (priv->rss_conf.rss_key != NULL)
 681                 rte_free(priv->rss_conf.rss_key);
 682         if (priv->reta_idx != NULL)
 683                 rte_free(priv->reta_idx);
 684         if (priv->config.vf)
 685                 mlx5_nl_mac_addr_flush(dev);
 686         if (priv->nl_socket_route >= 0)
 687                 close(priv->nl_socket_route);
 688         if (priv->nl_socket_rdma >= 0)
 689                 close(priv->nl_socket_rdma);
 690         if (priv->tcf_context)
 691                 mlx5_flow_tcf_context_destroy(priv->tcf_context);
 692         if (priv->sh) {
 693                 /*
 694                  * Free the shared context in last turn, because the cleanup
 695                  * routines above may use some shared fields, like
 696                  * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
 697                  * ifindex if Netlink fails.
 698                  */
 699                 mlx5_free_shared_ibctx(priv->sh);
 700                 priv->sh = NULL;
 701         }
 702         ret = mlx5_hrxq_ibv_verify(dev);
 703         if (ret)
 704                 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
 705                         dev->data->port_id);
 706         ret = mlx5_ind_table_ibv_verify(dev);
 707         if (ret)
 708                 DRV_LOG(WARNING, "port %u some indirection table still remain",
 709                         dev->data->port_id);
 710         ret = mlx5_rxq_ibv_verify(dev);
 711         if (ret)
 712                 DRV_LOG(WARNING, "port %u some Verbs Rx queue still remain",
 713                         dev->data->port_id);
 714         ret = mlx5_rxq_verify(dev);
 715         if (ret)
 716                 DRV_LOG(WARNING, "port %u some Rx queues still remain",
 717                         dev->data->port_id);
 718         ret = mlx5_txq_ibv_verify(dev);
 719         if (ret)
 720                 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
 721                         dev->data->port_id);
 722         ret = mlx5_txq_verify(dev);
 723         if (ret)
 724                 DRV_LOG(WARNING, "port %u some Tx queues still remain",
 725                         dev->data->port_id);
 726         ret = mlx5_flow_verify(dev);
 727         if (ret)
 728                 DRV_LOG(WARNING, "port %u some flows still remain",
 729                         dev->data->port_id);
 730         if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
 731                 unsigned int c = 0;
 732                 uint16_t port_id;
 733
 734                 RTE_ETH_FOREACH_DEV_OF(port_id, dev->device) {
 735                         struct mlx5_priv *opriv =
 736                                 rte_eth_devices[port_id].data->dev_private;
 737
 738                         if (!opriv ||
 739                             opriv->domain_id != priv->domain_id ||
 740                             &rte_eth_devices[port_id] == dev)
 741                                 continue;
 742                         ++c;
 743                 }
 744                 if (!c)
 745                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
 746         }
 747         memset(priv, 0, sizeof(*priv));
 748         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
 749         /*
 750          * Reset mac_addrs to NULL such that it is not freed as part of
 751          * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
 752          * it is freed when dev_private is freed.
 753          */
 754         dev->data->mac_addrs = NULL;
 755 }
 756
 757 const struct eth_dev_ops mlx5_dev_ops = {
 758         .dev_configure = mlx5_dev_configure,
 759         .dev_start = mlx5_dev_start,
 760         .dev_stop = mlx5_dev_stop,
 761         .dev_set_link_down = mlx5_set_link_down,
 762         .dev_set_link_up = mlx5_set_link_up,
 763         .dev_close = mlx5_dev_close,
 764         .promiscuous_enable = mlx5_promiscuous_enable,
 765         .promiscuous_disable = mlx5_promiscuous_disable,
 766         .allmulticast_enable = mlx5_allmulticast_enable,
 767         .allmulticast_disable = mlx5_allmulticast_disable,
 768         .link_update = mlx5_link_update,
 769         .stats_get = mlx5_stats_get,
 770         .stats_reset = mlx5_stats_reset,
 771         .xstats_get = mlx5_xstats_get,
 772         .xstats_reset = mlx5_xstats_reset,
 773         .xstats_get_names = mlx5_xstats_get_names,
 774         .fw_version_get = mlx5_fw_version_get,
 775         .dev_infos_get = mlx5_dev_infos_get,
 776         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
 777         .vlan_filter_set = mlx5_vlan_filter_set,
 778         .rx_queue_setup = mlx5_rx_queue_setup,
 779         .tx_queue_setup = mlx5_tx_queue_setup,
 780         .rx_queue_release = mlx5_rx_queue_release,
 781         .tx_queue_release = mlx5_tx_queue_release,
 782         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
 783         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
 784         .mac_addr_remove = mlx5_mac_addr_remove,
 785         .mac_addr_add = mlx5_mac_addr_add,
 786         .mac_addr_set = mlx5_mac_addr_set,
 787         .set_mc_addr_list = mlx5_set_mc_addr_list,
 788         .mtu_set = mlx5_dev_set_mtu,
 789         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
 790         .vlan_offload_set = mlx5_vlan_offload_set,
 791         .reta_update = mlx5_dev_rss_reta_update,
 792         .reta_query = mlx5_dev_rss_reta_query,
 793         .rss_hash_update = mlx5_rss_hash_update,
 794         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
 795         .filter_ctrl = mlx5_dev_filter_ctrl,
 796         .rx_descriptor_status = mlx5_rx_descriptor_status,
 797         .tx_descriptor_status = mlx5_tx_descriptor_status,
 798         .rx_queue_count = mlx5_rx_queue_count,
 799         .rx_queue_intr_enable = mlx5_rx_intr_enable,
 800         .rx_queue_intr_disable = mlx5_rx_intr_disable,
 801         .is_removed = mlx5_is_removed,
 802 };
 803
 804 /* Available operations from secondary process. */
 805 static const struct eth_dev_ops mlx5_dev_sec_ops = {
 806         .stats_get = mlx5_stats_get,
 807         .stats_reset = mlx5_stats_reset,
 808         .xstats_get = mlx5_xstats_get,
 809         .xstats_reset = mlx5_xstats_reset,
 810         .xstats_get_names = mlx5_xstats_get_names,
 811         .fw_version_get = mlx5_fw_version_get,
 812         .dev_infos_get = mlx5_dev_infos_get,
 813         .rx_descriptor_status = mlx5_rx_descriptor_status,
 814         .tx_descriptor_status = mlx5_tx_descriptor_status,
 815 };
 816
 817 /* Available operations in flow isolated mode. */
 818 const struct eth_dev_ops mlx5_dev_ops_isolate = {
 819         .dev_configure = mlx5_dev_configure,
 820         .dev_start = mlx5_dev_start,
 821         .dev_stop = mlx5_dev_stop,
 822         .dev_set_link_down = mlx5_set_link_down,
 823         .dev_set_link_up = mlx5_set_link_up,
 824         .dev_close = mlx5_dev_close,
 825         .promiscuous_enable = mlx5_promiscuous_enable,
 826         .promiscuous_disable = mlx5_promiscuous_disable,
 827         .allmulticast_enable = mlx5_allmulticast_enable,
 828         .allmulticast_disable = mlx5_allmulticast_disable,
 829         .link_update = mlx5_link_update,
 830         .stats_get = mlx5_stats_get,
 831         .stats_reset = mlx5_stats_reset,
 832         .xstats_get = mlx5_xstats_get,
 833         .xstats_reset = mlx5_xstats_reset,
 834         .xstats_get_names = mlx5_xstats_get_names,
 835         .fw_version_get = mlx5_fw_version_get,
 836         .dev_infos_get = mlx5_dev_infos_get,
 837         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
 838         .vlan_filter_set = mlx5_vlan_filter_set,
 839         .rx_queue_setup = mlx5_rx_queue_setup,
 840         .tx_queue_setup = mlx5_tx_queue_setup,
 841         .rx_queue_release = mlx5_rx_queue_release,
 842         .tx_queue_release = mlx5_tx_queue_release,
 843         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
 844         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
 845         .mac_addr_remove = mlx5_mac_addr_remove,
 846         .mac_addr_add = mlx5_mac_addr_add,
 847         .mac_addr_set = mlx5_mac_addr_set,
 848         .set_mc_addr_list = mlx5_set_mc_addr_list,
 849         .mtu_set = mlx5_dev_set_mtu,
 850         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
 851         .vlan_offload_set = mlx5_vlan_offload_set,
 852         .filter_ctrl = mlx5_dev_filter_ctrl,
 853         .rx_descriptor_status = mlx5_rx_descriptor_status,
 854         .tx_descriptor_status = mlx5_tx_descriptor_status,
 855         .rx_queue_intr_enable = mlx5_rx_intr_enable,
 856         .rx_queue_intr_disable = mlx5_rx_intr_disable,
 857         .is_removed = mlx5_is_removed,
 858 };
 859
 860 /**
 861  * Verify and store value for device argument.
 862  *
 863  * @param[in] key
 864  *   Key argument to verify.
 865  * @param[in] val
 866  *   Value associated with key.
 867  * @param opaque
 868  *   User data.
 869  *
 870  * @return
 871  *   0 on success, a negative errno value otherwise and rte_errno is set.
 872  */
 873 static int
 874 mlx5_args_check(const char *key, const char *val, void *opaque)
 875 {
 876         struct mlx5_dev_config *config = opaque;
 877         unsigned long tmp;
 878
 879         /* No-op, port representors are processed in mlx5_dev_spawn(). */
 880         if (!strcmp(MLX5_REPRESENTOR, key))
 881                 return 0;
 882         errno = 0;
 883         tmp = strtoul(val, NULL, 0);
 884         if (errno) {
 885                 rte_errno = errno;
 886                 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
 887                 return -rte_errno;
 888         }
 889         if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
 890                 config->cqe_comp = !!tmp;
 891         } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
 892                 config->cqe_pad = !!tmp;
 893         } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
 894                 config->hw_padding = !!tmp;
 895         } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
 896                 config->mprq.enabled = !!tmp;
 897         } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
 898                 config->mprq.stride_num_n = tmp;
 899         } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
 900                 config->mprq.max_memcpy_len = tmp;
 901         } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
 902                 config->mprq.min_rxqs_num = tmp;
 903         } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
 904                 config->txq_inline = tmp;
 905         } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
 906                 config->txqs_inline = tmp;
 907         } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
 908                 config->txqs_vec = tmp;
 909         } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
 910                 config->mps = !!tmp;
 911         } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
 912                 config->mpw_hdr_dseg = !!tmp;
 913         } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
 914                 config->inline_max_packet_sz = tmp;
 915         } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
 916                 config->tx_vec_en = !!tmp;
 917         } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
 918                 config->rx_vec_en = !!tmp;
 919         } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
 920                 config->l3_vxlan_en = !!tmp;
 921         } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
 922                 config->vf_nl_en = !!tmp;
 923         } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
 924                 config->dv_esw_en = !!tmp;
 925         } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
 926                 config->dv_flow_en = !!tmp;
 927         } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
 928                 config->mr_ext_memseg_en = !!tmp;
 929         } else {
 930                 DRV_LOG(WARNING, "%s: unknown parameter", key);
 931                 rte_errno = EINVAL;
 932                 return -rte_errno;
 933         }
 934         return 0;
 935 }
 936
 937 /**
 938  * Parse device parameters.
 939  *
 940  * @param config
 941  *   Pointer to device configuration structure.
 942  * @param devargs
 943  *   Device arguments structure.
 944  *
 945  * @return
 946  *   0 on success, a negative errno value otherwise and rte_errno is set.
 947  */
 948 static int
 949 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
 950 {
 951         const char **params = (const char *[]){
 952                 MLX5_RXQ_CQE_COMP_EN,
 953                 MLX5_RXQ_CQE_PAD_EN,
 954                 MLX5_RXQ_PKT_PAD_EN,
 955                 MLX5_RX_MPRQ_EN,
 956                 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
 957                 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
 958                 MLX5_RXQS_MIN_MPRQ,
 959                 MLX5_TXQ_INLINE,
 960                 MLX5_TXQS_MIN_INLINE,
 961                 MLX5_TXQS_MAX_VEC,
 962                 MLX5_TXQ_MPW_EN,
 963                 MLX5_TXQ_MPW_HDR_DSEG_EN,
 964                 MLX5_TXQ_MAX_INLINE_LEN,
 965                 MLX5_TX_VEC_EN,
 966                 MLX5_RX_VEC_EN,
 967                 MLX5_L3_VXLAN_EN,
 968                 MLX5_VF_NL_EN,
 969                 MLX5_DV_ESW_EN,
 970                 MLX5_DV_FLOW_EN,
 971                 MLX5_MR_EXT_MEMSEG_EN,
 972                 MLX5_REPRESENTOR,
 973                 NULL,
 974         };
 975         struct rte_kvargs *kvlist;
 976         int ret = 0;
 977         int i;
 978
 979         if (devargs == NULL)
 980                 return 0;
 981         /* Following UGLY cast is done to pass checkpatch. */
 982         kvlist = rte_kvargs_parse(devargs->args, params);
 983         if (kvlist == NULL)
 984                 return 0;
 985         /* Process parameters. */
 986         for (i = 0; (params[i] != NULL); ++i) {
 987                 if (rte_kvargs_count(kvlist, params[i])) {
 988                         ret = rte_kvargs_process(kvlist, params[i],
 989                                                  mlx5_args_check, config);
 990                         if (ret) {
 991                                 rte_errno = EINVAL;
 992                                 rte_kvargs_free(kvlist);
 993                                 return -rte_errno;
 994                         }
 995                 }
 996         }
 997         rte_kvargs_free(kvlist);
 998         return 0;
 999 }
1000
1001 static struct rte_pci_driver mlx5_driver;
1002
1003 /**
1004  * PMD global initialization.
1005  *
1006  * Independent from individual device, this function initializes global
1007  * per-PMD data structures distinguishing primary and secondary processes.
1008  * Hence, each initialization is called once per a process.
1009  *
1010  * @return
1011  *   0 on success, a negative errno value otherwise and rte_errno is set.
1012  */
1013 static int
1014 mlx5_init_once(void)
1015 {
1016         struct mlx5_shared_data *sd;
1017         struct mlx5_local_data *ld = &mlx5_local_data;
1018         int ret = 0;
1019
1020         if (mlx5_init_shared_data())
1021                 return -rte_errno;
1022         sd = mlx5_shared_data;
1023         assert(sd);
1024         rte_spinlock_lock(&sd->lock);
1025         switch (rte_eal_process_type()) {
1026         case RTE_PROC_PRIMARY:
1027                 if (sd->init_done)
1028                         break;
1029                 LIST_INIT(&sd->mem_event_cb_list);
1030                 rte_rwlock_init(&sd->mem_event_rwlock);
1031                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1032                                                 mlx5_mr_mem_event_cb, NULL);
1033                 ret = mlx5_mp_init_primary();
1034                 if (ret)
1035                         goto out;
1036                 sd->init_done = true;
1037                 break;
1038         case RTE_PROC_SECONDARY:
1039                 if (ld->init_done)
1040                         break;
1041                 ret = mlx5_mp_init_secondary();
1042                 if (ret)
1043                         goto out;
1044                 ++sd->secondary_cnt;
1045                 ld->init_done = true;
1046                 break;
1047         default:
1048                 break;
1049         }
1050 out:
1051         rte_spinlock_unlock(&sd->lock);
1052         return ret;
1053 }
1054
1055 /**
1056  * Spawn an Ethernet device from Verbs information.
1057  *
1058  * @param dpdk_dev
1059  *   Backing DPDK device.
1060  * @param spawn
1061  *   Verbs device parameters (name, port, switch_info) to spawn.
1062  * @param config
1063  *   Device configuration parameters.
1064  *
1065  * @return
1066  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
1067  *   is set. The following errors are defined:
1068  *
1069  *   EBUSY: device is not supposed to be spawned.
1070  *   EEXIST: device is already spawned
1071  */
1072 static struct rte_eth_dev *
1073 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1074                struct mlx5_dev_spawn_data *spawn,
1075                struct mlx5_dev_config config)
1076 {
1077         const struct mlx5_switch_info *switch_info = &spawn->info;
1078         struct mlx5_ibv_shared *sh = NULL;
1079         struct ibv_port_attr port_attr;
1080         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1081         struct rte_eth_dev *eth_dev = NULL;
1082         struct mlx5_priv *priv = NULL;
1083         int err = 0;
1084         unsigned int hw_padding = 0;
1085         unsigned int mps;
1086         unsigned int cqe_comp;
1087         unsigned int cqe_pad = 0;
1088         unsigned int tunnel_en = 0;
1089         unsigned int mpls_en = 0;
1090         unsigned int swp = 0;
1091         unsigned int mprq = 0;
1092         unsigned int mprq_min_stride_size_n = 0;
1093         unsigned int mprq_max_stride_size_n = 0;
1094         unsigned int mprq_min_stride_num_n = 0;
1095         unsigned int mprq_max_stride_num_n = 0;
1096         struct rte_ether_addr mac;
1097         char name[RTE_ETH_NAME_MAX_LEN];
1098         int own_domain_id = 0;
1099         uint16_t port_id;
1100         unsigned int i;
1101
1102         /* Determine if this port representor is supposed to be spawned. */
1103         if (switch_info->representor && dpdk_dev->devargs) {
1104                 struct rte_eth_devargs eth_da;
1105
1106                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
1107                 if (err) {
1108                         rte_errno = -err;
1109                         DRV_LOG(ERR, "failed to process device arguments: %s",
1110                                 strerror(rte_errno));
1111                         return NULL;
1112                 }
1113                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1114                         if (eth_da.representor_ports[i] ==
1115                             (uint16_t)switch_info->port_name)
1116                                 break;
1117                 if (i == eth_da.nb_representor_ports) {
1118                         rte_errno = EBUSY;
1119                         return NULL;
1120                 }
1121         }
1122         /* Build device name. */
1123         if (!switch_info->representor)
1124                 strlcpy(name, dpdk_dev->name, sizeof(name));
1125         else
1126                 snprintf(name, sizeof(name), "%s_representor_%u",
1127                          dpdk_dev->name, switch_info->port_name);
1128         /* check if the device is already spawned */
1129         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1130                 rte_errno = EEXIST;
1131                 return NULL;
1132         }
1133         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1134         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1135                 eth_dev = rte_eth_dev_attach_secondary(name);
1136                 if (eth_dev == NULL) {
1137                         DRV_LOG(ERR, "can not attach rte ethdev");
1138                         rte_errno = ENOMEM;
1139                         return NULL;
1140                 }
1141                 eth_dev->device = dpdk_dev;
1142                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1143                 err = mlx5_proc_priv_init(eth_dev);
1144                 if (err)
1145                         return NULL;
1146                 /* Receive command fd from primary process */
1147                 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1148                 if (err < 0)
1149                         return NULL;
1150                 /* Remap UAR for Tx queues. */
1151                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
1152                 if (err)
1153                         return NULL;
1154                 /*
1155                  * Ethdev pointer is still required as input since
1156                  * the primary device is not accessible from the
1157                  * secondary process.
1158                  */
1159                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1160                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1161                 return eth_dev;
1162         }
1163         sh = mlx5_alloc_shared_ibctx(spawn);
1164         if (!sh)
1165                 return NULL;
1166         config.devx = sh->devx;
1167 #ifdef HAVE_IBV_MLX5_MOD_SWP
1168         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1169 #endif
1170         /*
1171          * Multi-packet send is supported by ConnectX-4 Lx PF as well
1172          * as all ConnectX-5 devices.
1173          */
1174 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1175         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1176 #endif
1177 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1178         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1179 #endif
1180         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1181         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1182                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1183                         DRV_LOG(DEBUG, "enhanced MPW is supported");
1184                         mps = MLX5_MPW_ENHANCED;
1185                 } else {
1186                         DRV_LOG(DEBUG, "MPW is supported");
1187                         mps = MLX5_MPW;
1188                 }
1189         } else {
1190                 DRV_LOG(DEBUG, "MPW isn't supported");
1191                 mps = MLX5_MPW_DISABLED;
1192         }
1193 #ifdef HAVE_IBV_MLX5_MOD_SWP
1194         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1195                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1196         DRV_LOG(DEBUG, "SWP support: %u", swp);
1197 #endif
1198         config.swp = !!swp;
1199 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1200         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1201                 struct mlx5dv_striding_rq_caps mprq_caps =
1202                         dv_attr.striding_rq_caps;
1203
1204                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1205                         mprq_caps.min_single_stride_log_num_of_bytes);
1206                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1207                         mprq_caps.max_single_stride_log_num_of_bytes);
1208                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1209                         mprq_caps.min_single_wqe_log_num_of_strides);
1210                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1211                         mprq_caps.max_single_wqe_log_num_of_strides);
1212                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1213                         mprq_caps.supported_qpts);
1214                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1215                 mprq = 1;
1216                 mprq_min_stride_size_n =
1217                         mprq_caps.min_single_stride_log_num_of_bytes;
1218                 mprq_max_stride_size_n =
1219                         mprq_caps.max_single_stride_log_num_of_bytes;
1220                 mprq_min_stride_num_n =
1221                         mprq_caps.min_single_wqe_log_num_of_strides;
1222                 mprq_max_stride_num_n =
1223                         mprq_caps.max_single_wqe_log_num_of_strides;
1224                 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1225                                                    mprq_min_stride_num_n);
1226         }
1227 #endif
1228         if (RTE_CACHE_LINE_SIZE == 128 &&
1229             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
1230                 cqe_comp = 0;
1231         else
1232                 cqe_comp = 1;
1233         config.cqe_comp = cqe_comp;
1234 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
1235         /* Whether device supports 128B Rx CQE padding. */
1236         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
1237                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
1238 #endif
1239 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1240         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1241                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1242                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1243                              (dv_attr.tunnel_offloads_caps &
1244                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
1245         }
1246         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1247                 tunnel_en ? "" : "not ");
1248 #else
1249         DRV_LOG(WARNING,
1250                 "tunnel offloading disabled due to old OFED/rdma-core version");
1251 #endif
1252         config.tunnel_en = tunnel_en;
1253 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1254         mpls_en = ((dv_attr.tunnel_offloads_caps &
1255                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1256                    (dv_attr.tunnel_offloads_caps &
1257                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1258         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1259                 mpls_en ? "" : "not ");
1260 #else
1261         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1262                 " old OFED/rdma-core version or firmware configuration");
1263 #endif
1264         config.mpls_en = mpls_en;
1265         /* Check port status. */
1266         err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
1267         if (err) {
1268                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1269                 goto error;
1270         }
1271         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1272                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1273                 err = EINVAL;
1274                 goto error;
1275         }
1276         if (port_attr.state != IBV_PORT_ACTIVE)
1277                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1278                         mlx5_glue->port_state_str(port_attr.state),
1279                         port_attr.state);
1280         /* Allocate private eth device data. */
1281         priv = rte_zmalloc("ethdev private structure",
1282                            sizeof(*priv),
1283                            RTE_CACHE_LINE_SIZE);
1284         if (priv == NULL) {
1285                 DRV_LOG(ERR, "priv allocation failure");
1286                 err = ENOMEM;
1287                 goto error;
1288         }
1289         priv->sh = sh;
1290         priv->ibv_port = spawn->ibv_port;
1291         priv->mtu = RTE_ETHER_MTU;
1292 #ifndef RTE_ARCH_64
1293         /* Initialize UAR access locks for 32bit implementations. */
1294         rte_spinlock_init(&priv->uar_lock_cq);
1295         for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1296                 rte_spinlock_init(&priv->uar_lock[i]);
1297 #endif
1298         /* Some internal functions rely on Netlink sockets, open them now. */
1299         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1300         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1301         priv->nl_sn = 0;
1302         priv->representor = !!switch_info->representor;
1303         priv->master = !!switch_info->master;
1304         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1305         /*
1306          * Currently we support single E-Switch per PF configurations
1307          * only and vport_id field contains the vport index for
1308          * associated VF, which is deduced from representor port name.
1309          * For example, let's have the IB device port 10, it has
1310          * attached network device eth0, which has port name attribute
1311          * pf0vf2, we can deduce the VF number as 2, and set vport index
1312          * as 3 (2+1). This assigning schema should be changed if the
1313          * multiple E-Switch instances per PF configurations or/and PCI
1314          * subfunctions are added.
1315          */
1316         priv->vport_id = switch_info->representor ?
1317                          switch_info->port_name + 1 : -1;
1318         /* representor_id field keeps the unmodified port/VF index. */
1319         priv->representor_id = switch_info->representor ?
1320                                switch_info->port_name : -1;
1321         /*
1322          * Look for sibling devices in order to reuse their switch domain
1323          * if any, otherwise allocate one.
1324          */
1325         RTE_ETH_FOREACH_DEV_OF(port_id, dpdk_dev) {
1326                 const struct mlx5_priv *opriv =
1327                         rte_eth_devices[port_id].data->dev_private;
1328
1329                 if (!opriv ||
1330                         opriv->domain_id ==
1331                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1332                         continue;
1333                 priv->domain_id = opriv->domain_id;
1334                 break;
1335         }
1336         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1337                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1338                 if (err) {
1339                         err = rte_errno;
1340                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1341                                 strerror(rte_errno));
1342                         goto error;
1343                 }
1344                 own_domain_id = 1;
1345         }
1346         err = mlx5_args(&config, dpdk_dev->devargs);
1347         if (err) {
1348                 err = rte_errno;
1349                 DRV_LOG(ERR, "failed to process device arguments: %s",
1350                         strerror(rte_errno));
1351                 goto error;
1352         }
1353         config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1354                             IBV_DEVICE_RAW_IP_CSUM);
1355         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1356                 (config.hw_csum ? "" : "not "));
1357 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1358         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1359         DRV_LOG(DEBUG, "counters are not supported");
1360 #endif
1361 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
1362         if (config.dv_flow_en) {
1363                 DRV_LOG(WARNING, "DV flow is not supported");
1364                 config.dv_flow_en = 0;
1365         }
1366 #endif
1367         config.ind_table_max_size =
1368                 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
1369         /*
1370          * Remove this check once DPDK supports larger/variable
1371          * indirection tables.
1372          */
1373         if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1374                 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1375         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1376                 config.ind_table_max_size);
1377         config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1378                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1379         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1380                 (config.hw_vlan_strip ? "" : "not "));
1381         config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1382                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1383         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1384                 (config.hw_fcs_strip ? "" : "not "));
1385 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1386         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1387 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1388         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1389                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1390 #endif
1391         if (config.hw_padding && !hw_padding) {
1392                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1393                 config.hw_padding = 0;
1394         } else if (config.hw_padding) {
1395                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1396         }
1397         config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
1398                       (sh->device_attr.tso_caps.supported_qpts &
1399                        (1 << IBV_QPT_RAW_PACKET)));
1400         if (config.tso)
1401                 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
1402         /*
1403          * MPW is disabled by default, while the Enhanced MPW is enabled
1404          * by default.
1405          */
1406         if (config.mps == MLX5_ARG_UNSET)
1407                 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1408                                                           MLX5_MPW_DISABLED;
1409         else
1410                 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
1411         DRV_LOG(INFO, "%sMPS is %s",
1412                 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
1413                 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1414         if (config.cqe_comp && !cqe_comp) {
1415                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1416                 config.cqe_comp = 0;
1417         }
1418         if (config.cqe_pad && !cqe_pad) {
1419                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1420                 config.cqe_pad = 0;
1421         } else if (config.cqe_pad) {
1422                 DRV_LOG(INFO, "Rx CQE padding is enabled");
1423         }
1424         if (config.mprq.enabled && mprq) {
1425                 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
1426                     config.mprq.stride_num_n < mprq_min_stride_num_n) {
1427                         config.mprq.stride_num_n =
1428                                 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1429                                         mprq_min_stride_num_n);
1430                         DRV_LOG(WARNING,
1431                                 "the number of strides"
1432                                 " for Multi-Packet RQ is out of range,"
1433                                 " setting default value (%u)",
1434                                 1 << config.mprq.stride_num_n);
1435                 }
1436                 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
1437                 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
1438         } else if (config.mprq.enabled && !mprq) {
1439                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1440                 config.mprq.enabled = 0;
1441         }
1442         eth_dev = rte_eth_dev_allocate(name);
1443         if (eth_dev == NULL) {
1444                 DRV_LOG(ERR, "can not allocate rte ethdev");
1445                 err = ENOMEM;
1446                 goto error;
1447         }
1448         /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1449         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1450         if (priv->representor) {
1451                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1452                 eth_dev->data->representor_id = priv->representor_id;
1453         }
1454         eth_dev->data->dev_private = priv;
1455         priv->dev_data = eth_dev->data;
1456         eth_dev->data->mac_addrs = priv->mac;
1457         eth_dev->device = dpdk_dev;
1458         /* Configure the first MAC address by default. */
1459         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1460                 DRV_LOG(ERR,
1461                         "port %u cannot get MAC address, is mlx5_en"
1462                         " loaded? (errno: %s)",
1463                         eth_dev->data->port_id, strerror(rte_errno));
1464                 err = ENODEV;
1465                 goto error;
1466         }
1467         DRV_LOG(INFO,
1468                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1469                 eth_dev->data->port_id,
1470                 mac.addr_bytes[0], mac.addr_bytes[1],
1471                 mac.addr_bytes[2], mac.addr_bytes[3],
1472                 mac.addr_bytes[4], mac.addr_bytes[5]);
1473 #ifndef NDEBUG
1474         {
1475                 char ifname[IF_NAMESIZE];
1476
1477                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1478                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1479                                 eth_dev->data->port_id, ifname);
1480                 else
1481                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1482                                 eth_dev->data->port_id);
1483         }
1484 #endif
1485         /* Get actual MTU if possible. */
1486         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1487         if (err) {
1488                 err = rte_errno;
1489                 goto error;
1490         }
1491         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1492                 priv->mtu);
1493         /* Initialize burst functions to prevent crashes before link-up. */
1494         eth_dev->rx_pkt_burst = removed_rx_burst;
1495         eth_dev->tx_pkt_burst = removed_tx_burst;
1496         eth_dev->dev_ops = &mlx5_dev_ops;
1497         /* Register MAC address. */
1498         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1499         if (config.vf && config.vf_nl_en)
1500                 mlx5_nl_mac_addr_sync(eth_dev);
1501         priv->tcf_context = mlx5_flow_tcf_context_create();
1502         if (!priv->tcf_context) {
1503                 err = -rte_errno;
1504                 DRV_LOG(WARNING,
1505                         "flow rules relying on switch offloads will not be"
1506                         " supported: cannot open libmnl socket: %s",
1507                         strerror(rte_errno));
1508         } else {
1509                 struct rte_flow_error error;
1510                 unsigned int ifindex = mlx5_ifindex(eth_dev);
1511
1512                 if (!ifindex) {
1513                         err = -rte_errno;
1514                         error.message =
1515                                 "cannot retrieve network interface index";
1516                 } else {
1517                         err = mlx5_flow_tcf_init(priv->tcf_context,
1518                                                  ifindex, &error);
1519                 }
1520                 if (err) {
1521                         DRV_LOG(WARNING,
1522                                 "flow rules relying on switch offloads will"
1523                                 " not be supported: %s: %s",
1524                                 error.message, strerror(rte_errno));
1525                         mlx5_flow_tcf_context_destroy(priv->tcf_context);
1526                         priv->tcf_context = NULL;
1527                 }
1528         }
1529         TAILQ_INIT(&priv->flows);
1530         TAILQ_INIT(&priv->ctrl_flows);
1531         /* Hint libmlx5 to use PMD allocator for data plane resources */
1532         struct mlx5dv_ctx_allocators alctr = {
1533                 .alloc = &mlx5_alloc_verbs_buf,
1534                 .free = &mlx5_free_verbs_buf,
1535                 .data = priv,
1536         };
1537         mlx5_glue->dv_set_context_attr(sh->ctx,
1538                                        MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1539                                        (void *)((uintptr_t)&alctr));
1540         /* Bring Ethernet device up. */
1541         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1542                 eth_dev->data->port_id);
1543         mlx5_set_link_up(eth_dev);
1544         /*
1545          * Even though the interrupt handler is not installed yet,
1546          * interrupts will still trigger on the async_fd from
1547          * Verbs context returned by ibv_open_device().
1548          */
1549         mlx5_link_update(eth_dev, 0);
1550 #ifdef HAVE_IBV_DEVX_OBJ
1551         if (config.devx) {
1552                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
1553                 if (err) {
1554                         err = -err;
1555                         goto error;
1556                 }
1557         }
1558 #endif
1559 #ifdef HAVE_MLX5DV_DR_ESWITCH
1560         if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
1561               (switch_info->representor || switch_info->master)))
1562                 config.dv_esw_en = 0;
1563 #else
1564         config.dv_esw_en = 0;
1565 #endif
1566         /* Store device configuration on private structure. */
1567         priv->config = config;
1568         if (config.dv_flow_en) {
1569                 err = mlx5_alloc_shared_dr(priv);
1570                 if (err)
1571                         goto error;
1572         }
1573         /* Supported Verbs flow priority number detection. */
1574         err = mlx5_flow_discover_priorities(eth_dev);
1575         if (err < 0) {
1576                 err = -err;
1577                 goto error;
1578         }
1579         priv->config.flow_prio = err;
1580         /* Add device to memory callback list. */
1581         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
1582         LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
1583                          sh, mem_event_cb);
1584         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
1585         return eth_dev;
1586 error:
1587         if (priv) {
1588                 if (priv->sh)
1589                         mlx5_free_shared_dr(priv);
1590                 if (priv->nl_socket_route >= 0)
1591                         close(priv->nl_socket_route);
1592                 if (priv->nl_socket_rdma >= 0)
1593                         close(priv->nl_socket_rdma);
1594                 if (priv->tcf_context)
1595                         mlx5_flow_tcf_context_destroy(priv->tcf_context);
1596                 if (own_domain_id)
1597                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1598                 rte_free(priv);
1599                 if (eth_dev != NULL)
1600                         eth_dev->data->dev_private = NULL;
1601         }
1602         if (eth_dev != NULL) {
1603                 /* mac_addrs must not be freed alone because part of dev_private */
1604                 eth_dev->data->mac_addrs = NULL;
1605                 rte_eth_dev_release_port(eth_dev);
1606         }
1607         if (sh)
1608                 mlx5_free_shared_ibctx(sh);
1609         assert(err > 0);
1610         rte_errno = err;
1611         return NULL;
1612 }
1613
1614 /**
1615  * Comparison callback to sort device data.
1616  *
1617  * This is meant to be used with qsort().
1618  *
1619  * @param a[in]
1620  *   Pointer to pointer to first data object.
1621  * @param b[in]
1622  *   Pointer to pointer to second data object.
1623  *
1624  * @return
1625  *   0 if both objects are equal, less than 0 if the first argument is less
1626  *   than the second, greater than 0 otherwise.
1627  */
1628 static int
1629 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1630 {
1631         const struct mlx5_switch_info *si_a =
1632                 &((const struct mlx5_dev_spawn_data *)a)->info;
1633         const struct mlx5_switch_info *si_b =
1634                 &((const struct mlx5_dev_spawn_data *)b)->info;
1635         int ret;
1636
1637         /* Master device first. */
1638         ret = si_b->master - si_a->master;
1639         if (ret)
1640                 return ret;
1641         /* Then representor devices. */
1642         ret = si_b->representor - si_a->representor;
1643         if (ret)
1644                 return ret;
1645         /* Unidentified devices come last in no specific order. */
1646         if (!si_a->representor)
1647                 return 0;
1648         /* Order representors by name. */
1649         return si_a->port_name - si_b->port_name;
1650 }
1651
1652 /**
1653  * DPDK callback to register a PCI device.
1654  *
1655  * This function spawns Ethernet devices out of a given PCI device.
1656  *
1657  * @param[in] pci_drv
1658  *   PCI driver structure (mlx5_driver).
1659  * @param[in] pci_dev
1660  *   PCI device information.
1661  *
1662  * @return
1663  *   0 on success, a negative errno value otherwise and rte_errno is set.
1664  */
1665 static int
1666 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1667                struct rte_pci_device *pci_dev)
1668 {
1669         struct ibv_device **ibv_list;
1670         /*
1671          * Number of found IB Devices matching with requested PCI BDF.
1672          * nd != 1 means there are multiple IB devices over the same
1673          * PCI device and we have representors and master.
1674          */
1675         unsigned int nd = 0;
1676         /*
1677          * Number of found IB device Ports. nd = 1 and np = 1..n means
1678          * we have the single multiport IB device, and there may be
1679          * representors attached to some of found ports.
1680          */
1681         unsigned int np = 0;
1682         /*
1683          * Number of DPDK ethernet devices to Spawn - either over
1684          * multiple IB devices or multiple ports of single IB device.
1685          * Actually this is the number of iterations to spawn.
1686          */
1687         unsigned int ns = 0;
1688         struct mlx5_dev_config dev_config;
1689         int ret;
1690
1691         ret = mlx5_init_once();
1692         if (ret) {
1693                 DRV_LOG(ERR, "unable to init PMD global data: %s",
1694                         strerror(rte_errno));
1695                 return -rte_errno;
1696         }
1697         assert(pci_drv == &mlx5_driver);
1698         errno = 0;
1699         ibv_list = mlx5_glue->get_device_list(&ret);
1700         if (!ibv_list) {
1701                 rte_errno = errno ? errno : ENOSYS;
1702                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1703                 return -rte_errno;
1704         }
1705         /*
1706          * First scan the list of all Infiniband devices to find
1707          * matching ones, gathering into the list.
1708          */
1709         struct ibv_device *ibv_match[ret + 1];
1710         int nl_route = -1;
1711         int nl_rdma = -1;
1712         unsigned int i;
1713
1714         while (ret-- > 0) {
1715                 struct rte_pci_addr pci_addr;
1716
1717                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1718                 if (mlx5_ibv_device_to_pci_addr(ibv_list[ret], &pci_addr))
1719                         continue;
1720                 if (pci_dev->addr.domain != pci_addr.domain ||
1721                     pci_dev->addr.bus != pci_addr.bus ||
1722                     pci_dev->addr.devid != pci_addr.devid ||
1723                     pci_dev->addr.function != pci_addr.function)
1724                         continue;
1725                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1726                         ibv_list[ret]->name);
1727                 ibv_match[nd++] = ibv_list[ret];
1728         }
1729         ibv_match[nd] = NULL;
1730         if (!nd) {
1731                 /* No device matches, just complain and bail out. */
1732                 mlx5_glue->free_device_list(ibv_list);
1733                 DRV_LOG(WARNING,
1734                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
1735                         " are kernel drivers loaded?",
1736                         pci_dev->addr.domain, pci_dev->addr.bus,
1737                         pci_dev->addr.devid, pci_dev->addr.function);
1738                 rte_errno = ENOENT;
1739                 ret = -rte_errno;
1740                 return ret;
1741         }
1742         nl_route = mlx5_nl_init(NETLINK_ROUTE);
1743         nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1744         if (nd == 1) {
1745                 /*
1746                  * Found single matching device may have multiple ports.
1747                  * Each port may be representor, we have to check the port
1748                  * number and check the representors existence.
1749                  */
1750                 if (nl_rdma >= 0)
1751                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1752                 if (!np)
1753                         DRV_LOG(WARNING, "can not get IB device \"%s\""
1754                                          " ports number", ibv_match[0]->name);
1755         }
1756         /*
1757          * Now we can determine the maximal
1758          * amount of devices to be spawned.
1759          */
1760         struct mlx5_dev_spawn_data list[np ? np : nd];
1761
1762         if (np > 1) {
1763                 /*
1764                  * Single IB device with multiple ports found,
1765                  * it may be E-Switch master device and representors.
1766                  * We have to perform identification trough the ports.
1767                  */
1768                 assert(nl_rdma >= 0);
1769                 assert(ns == 0);
1770                 assert(nd == 1);
1771                 for (i = 1; i <= np; ++i) {
1772                         list[ns].max_port = np;
1773                         list[ns].ibv_port = i;
1774                         list[ns].ibv_dev = ibv_match[0];
1775                         list[ns].eth_dev = NULL;
1776                         list[ns].pci_dev = pci_dev;
1777                         list[ns].ifindex = mlx5_nl_ifindex
1778                                         (nl_rdma, list[ns].ibv_dev->name, i);
1779                         if (!list[ns].ifindex) {
1780                                 /*
1781                                  * No network interface index found for the
1782                                  * specified port, it means there is no
1783                                  * representor on this port. It's OK,
1784                                  * there can be disabled ports, for example
1785                                  * if sriov_numvfs < sriov_totalvfs.
1786                                  */
1787                                 continue;
1788                         }
1789                         ret = -1;
1790                         if (nl_route >= 0)
1791                                 ret = mlx5_nl_switch_info
1792                                                (nl_route,
1793                                                 list[ns].ifindex,
1794                                                 &list[ns].info);
1795                         if (ret || (!list[ns].info.representor &&
1796                                     !list[ns].info.master)) {
1797                                 /*
1798                                  * We failed to recognize representors with
1799                                  * Netlink, let's try to perform the task
1800                                  * with sysfs.
1801                                  */
1802                                 ret =  mlx5_sysfs_switch_info
1803                                                 (list[ns].ifindex,
1804                                                  &list[ns].info);
1805                         }
1806                         if (!ret && (list[ns].info.representor ^
1807                                      list[ns].info.master))
1808                                 ns++;
1809                 }
1810                 if (!ns) {
1811                         DRV_LOG(ERR,
1812                                 "unable to recognize master/representors"
1813                                 " on the IB device with multiple ports");
1814                         rte_errno = ENOENT;
1815                         ret = -rte_errno;
1816                         goto exit;
1817                 }
1818         } else {
1819                 /*
1820                  * The existence of several matching entries (nd > 1) means
1821                  * port representors have been instantiated. No existing Verbs
1822                  * call nor sysfs entries can tell them apart, this can only
1823                  * be done through Netlink calls assuming kernel drivers are
1824                  * recent enough to support them.
1825                  *
1826                  * In the event of identification failure through Netlink,
1827                  * try again through sysfs, then:
1828                  *
1829                  * 1. A single IB device matches (nd == 1) with single
1830                  *    port (np=0/1) and is not a representor, assume
1831                  *    no switch support.
1832                  *
1833                  * 2. Otherwise no safe assumptions can be made;
1834                  *    complain louder and bail out.
1835                  */
1836                 np = 1;
1837                 for (i = 0; i != nd; ++i) {
1838                         memset(&list[ns].info, 0, sizeof(list[ns].info));
1839                         list[ns].max_port = 1;
1840                         list[ns].ibv_port = 1;
1841                         list[ns].ibv_dev = ibv_match[i];
1842                         list[ns].eth_dev = NULL;
1843                         list[ns].pci_dev = pci_dev;
1844                         list[ns].ifindex = 0;
1845                         if (nl_rdma >= 0)
1846                                 list[ns].ifindex = mlx5_nl_ifindex
1847                                         (nl_rdma, list[ns].ibv_dev->name, 1);
1848                         if (!list[ns].ifindex) {
1849                                 char ifname[IF_NAMESIZE];
1850
1851                                 /*
1852                                  * Netlink failed, it may happen with old
1853                                  * ib_core kernel driver (before 4.16).
1854                                  * We can assume there is old driver because
1855                                  * here we are processing single ports IB
1856                                  * devices. Let's try sysfs to retrieve
1857                                  * the ifindex. The method works for
1858                                  * master device only.
1859                                  */
1860                                 if (nd > 1) {
1861                                         /*
1862                                          * Multiple devices found, assume
1863                                          * representors, can not distinguish
1864                                          * master/representor and retrieve
1865                                          * ifindex via sysfs.
1866                                          */
1867                                         continue;
1868                                 }
1869                                 ret = mlx5_get_master_ifname
1870                                         (ibv_match[i]->ibdev_path, &ifname);
1871                                 if (!ret)
1872                                         list[ns].ifindex =
1873                                                 if_nametoindex(ifname);
1874                                 if (!list[ns].ifindex) {
1875                                         /*
1876                                          * No network interface index found
1877                                          * for the specified device, it means
1878                                          * there it is neither representor
1879                                          * nor master.
1880                                          */
1881                                         continue;
1882                                 }
1883                         }
1884                         ret = -1;
1885                         if (nl_route >= 0)
1886                                 ret = mlx5_nl_switch_info
1887                                                (nl_route,
1888                                                 list[ns].ifindex,
1889                                                 &list[ns].info);
1890                         if (ret || (!list[ns].info.representor &&
1891                                     !list[ns].info.master)) {
1892                                 /*
1893                                  * We failed to recognize representors with
1894                                  * Netlink, let's try to perform the task
1895                                  * with sysfs.
1896                                  */
1897                                 ret =  mlx5_sysfs_switch_info
1898                                                 (list[ns].ifindex,
1899                                                  &list[ns].info);
1900                         }
1901                         if (!ret && (list[ns].info.representor ^
1902                                      list[ns].info.master)) {
1903                                 ns++;
1904                         } else if ((nd == 1) &&
1905                                    !list[ns].info.representor &&
1906                                    !list[ns].info.master) {
1907                                 /*
1908                                  * Single IB device with
1909                                  * one physical port and
1910                                  * attached network device.
1911                                  * May be SRIOV is not enabled
1912                                  * or there is no representors.
1913                                  */
1914                                 DRV_LOG(INFO, "no E-Switch support detected");
1915                                 ns++;
1916                                 break;
1917                         }
1918                 }
1919                 if (!ns) {
1920                         DRV_LOG(ERR,
1921                                 "unable to recognize master/representors"
1922                                 " on the multiple IB devices");
1923                         rte_errno = ENOENT;
1924                         ret = -rte_errno;
1925                         goto exit;
1926                 }
1927         }
1928         assert(ns);
1929         /*
1930          * Sort list to probe devices in natural order for users convenience
1931          * (i.e. master first, then representors from lowest to highest ID).
1932          */
1933         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
1934         /* Default configuration. */
1935         dev_config = (struct mlx5_dev_config){
1936                 .hw_padding = 0,
1937                 .mps = MLX5_ARG_UNSET,
1938                 .tx_vec_en = 1,
1939                 .rx_vec_en = 1,
1940                 .txq_inline = MLX5_ARG_UNSET,
1941                 .txqs_inline = MLX5_ARG_UNSET,
1942                 .txqs_vec = MLX5_ARG_UNSET,
1943                 .inline_max_packet_sz = MLX5_ARG_UNSET,
1944                 .vf_nl_en = 1,
1945                 .mr_ext_memseg_en = 1,
1946                 .mprq = {
1947                         .enabled = 0, /* Disabled by default. */
1948                         .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
1949                         .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
1950                         .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
1951                 },
1952                 .dv_esw_en = 1,
1953         };
1954         /* Device specific configuration. */
1955         switch (pci_dev->id.device_id) {
1956         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
1957                 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS_BLUEFIELD;
1958                 break;
1959         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1960         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1961         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1962         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1963                 dev_config.vf = 1;
1964                 break;
1965         default:
1966                 break;
1967         }
1968         /* Set architecture-dependent default value if unset. */
1969         if (dev_config.txqs_vec == MLX5_ARG_UNSET)
1970                 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS;
1971         for (i = 0; i != ns; ++i) {
1972                 uint32_t restore;
1973
1974                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
1975                                                  &list[i],
1976                                                  dev_config);
1977                 if (!list[i].eth_dev) {
1978                         if (rte_errno != EBUSY && rte_errno != EEXIST)
1979                                 break;
1980                         /* Device is disabled or already spawned. Ignore it. */
1981                         continue;
1982                 }
1983                 restore = list[i].eth_dev->data->dev_flags;
1984                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
1985                 /* Restore non-PCI flags cleared by the above call. */
1986                 list[i].eth_dev->data->dev_flags |= restore;
1987                 rte_eth_dev_probing_finish(list[i].eth_dev);
1988         }
1989         if (i != ns) {
1990                 DRV_LOG(ERR,
1991                         "probe of PCI device " PCI_PRI_FMT " aborted after"
1992                         " encountering an error: %s",
1993                         pci_dev->addr.domain, pci_dev->addr.bus,
1994                         pci_dev->addr.devid, pci_dev->addr.function,
1995                         strerror(rte_errno));
1996                 ret = -rte_errno;
1997                 /* Roll back. */
1998                 while (i--) {
1999                         if (!list[i].eth_dev)
2000                                 continue;
2001                         mlx5_dev_close(list[i].eth_dev);
2002                         /* mac_addrs must not be freed because in dev_private */
2003                         list[i].eth_dev->data->mac_addrs = NULL;
2004                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2005                 }
2006                 /* Restore original error. */
2007                 rte_errno = -ret;
2008         } else {
2009                 ret = 0;
2010         }
2011 exit:
2012         /*
2013          * Do the routine cleanup:
2014          * - close opened Netlink sockets
2015          * - free the Infiniband device list
2016          */
2017         if (nl_rdma >= 0)
2018                 close(nl_rdma);
2019         if (nl_route >= 0)
2020                 close(nl_route);
2021         assert(ibv_list);
2022         mlx5_glue->free_device_list(ibv_list);
2023         return ret;
2024 }
2025
2026 /**
2027  * DPDK callback to remove a PCI device.
2028  *
2029  * This function removes all Ethernet devices belong to a given PCI device.
2030  *
2031  * @param[in] pci_dev
2032  *   Pointer to the PCI device.
2033  *
2034  * @return
2035  *   0 on success, the function cannot fail.
2036  */
2037 static int
2038 mlx5_pci_remove(struct rte_pci_device *pci_dev)
2039 {
2040         uint16_t port_id;
2041
2042         RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
2043                 rte_eth_dev_close(port_id);
2044         return 0;
2045 }
2046
2047 static const struct rte_pci_id mlx5_pci_id_map[] = {
2048         {
2049                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2050                                PCI_DEVICE_ID_MELLANOX_CONNECTX4)
2051         },
2052         {
2053                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2054                                PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
2055         },
2056         {
2057                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2058                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
2059         },
2060         {
2061                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2062                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
2063         },
2064         {
2065                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2066                                PCI_DEVICE_ID_MELLANOX_CONNECTX5)
2067         },
2068         {
2069                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2070                                PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
2071         },
2072         {
2073                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2074                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
2075         },
2076         {
2077                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2078                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
2079         },
2080         {
2081                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2082                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
2083         },
2084         {
2085                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2086                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
2087         },
2088         {
2089                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2090                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
2091         },
2092         {
2093                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2094                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
2095         },
2096         {
2097                 .vendor_id = 0
2098         }
2099 };
2100
2101 static struct rte_pci_driver mlx5_driver = {
2102         .driver = {
2103                 .name = MLX5_DRIVER_NAME
2104         },
2105         .id_table = mlx5_pci_id_map,
2106         .probe = mlx5_pci_probe,
2107         .remove = mlx5_pci_remove,
2108         .dma_map = mlx5_dma_map,
2109         .dma_unmap = mlx5_dma_unmap,
2110         .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
2111                      RTE_PCI_DRV_PROBE_AGAIN | RTE_PCI_DRV_IOVA_AS_VA,
2112 };
2113
2114 #ifdef RTE_IBVERBS_LINK_DLOPEN
2115
2116 /**
2117  * Suffix RTE_EAL_PMD_PATH with "-glue".
2118  *
2119  * This function performs a sanity check on RTE_EAL_PMD_PATH before
2120  * suffixing its last component.
2121  *
2122  * @param buf[out]
2123  *   Output buffer, should be large enough otherwise NULL is returned.
2124  * @param size
2125  *   Size of @p out.
2126  *
2127  * @return
2128  *   Pointer to @p buf or @p NULL in case suffix cannot be appended.
2129  */
2130 static char *
2131 mlx5_glue_path(char *buf, size_t size)
2132 {
2133         static const char *const bad[] = { "/", ".", "..", NULL };
2134         const char *path = RTE_EAL_PMD_PATH;
2135         size_t len = strlen(path);
2136         size_t off;
2137         int i;
2138
2139         while (len && path[len - 1] == '/')
2140                 --len;
2141         for (off = len; off && path[off - 1] != '/'; --off)
2142                 ;
2143         for (i = 0; bad[i]; ++i)
2144                 if (!strncmp(path + off, bad[i], (int)(len - off)))
2145                         goto error;
2146         i = snprintf(buf, size, "%.*s-glue", (int)len, path);
2147         if (i == -1 || (size_t)i >= size)
2148                 goto error;
2149         return buf;
2150 error:
2151         DRV_LOG(ERR,
2152                 "unable to append \"-glue\" to last component of"
2153                 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
2154                 " please re-configure DPDK");
2155         return NULL;
2156 }
2157
2158 /**
2159  * Initialization routine for run-time dependency on rdma-core.
2160  */
2161 static int
2162 mlx5_glue_init(void)
2163 {
2164         char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
2165         const char *path[] = {
2166                 /*
2167                  * A basic security check is necessary before trusting
2168                  * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
2169                  */
2170                 (geteuid() == getuid() && getegid() == getgid() ?
2171                  getenv("MLX5_GLUE_PATH") : NULL),
2172                 /*
2173                  * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
2174                  * variant, otherwise let dlopen() look up libraries on its
2175                  * own.
2176                  */
2177                 (*RTE_EAL_PMD_PATH ?
2178                  mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
2179         };
2180         unsigned int i = 0;
2181         void *handle = NULL;
2182         void **sym;
2183         const char *dlmsg;
2184
2185         while (!handle && i != RTE_DIM(path)) {
2186                 const char *end;
2187                 size_t len;
2188                 int ret;
2189
2190                 if (!path[i]) {
2191                         ++i;
2192                         continue;
2193                 }
2194                 end = strpbrk(path[i], ":;");
2195                 if (!end)
2196                         end = path[i] + strlen(path[i]);
2197                 len = end - path[i];
2198                 ret = 0;
2199                 do {
2200                         char name[ret + 1];
2201
2202                         ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
2203                                        (int)len, path[i],
2204                                        (!len || *(end - 1) == '/') ? "" : "/");
2205                         if (ret == -1)
2206                                 break;
2207                         if (sizeof(name) != (size_t)ret + 1)
2208                                 continue;
2209                         DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
2210                                 name);
2211                         handle = dlopen(name, RTLD_LAZY);
2212                         break;
2213                 } while (1);
2214                 path[i] = end + 1;
2215                 if (!*end)
2216                         ++i;
2217         }
2218         if (!handle) {
2219                 rte_errno = EINVAL;
2220                 dlmsg = dlerror();
2221                 if (dlmsg)
2222                         DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
2223                 goto glue_error;
2224         }
2225         sym = dlsym(handle, "mlx5_glue");
2226         if (!sym || !*sym) {
2227                 rte_errno = EINVAL;
2228                 dlmsg = dlerror();
2229                 if (dlmsg)
2230                         DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
2231                 goto glue_error;
2232         }
2233         mlx5_glue = *sym;
2234         return 0;
2235 glue_error:
2236         if (handle)
2237                 dlclose(handle);
2238         DRV_LOG(WARNING,
2239                 "cannot initialize PMD due to missing run-time dependency on"
2240                 " rdma-core libraries (libibverbs, libmlx5)");
2241         return -rte_errno;
2242 }
2243
2244 #endif
2245
2246 /**
2247  * Driver initialization routine.
2248  */
2249 RTE_INIT(rte_mlx5_pmd_init)
2250 {
2251         /* Initialize driver log type. */
2252         mlx5_logtype = rte_log_register("pmd.net.mlx5");
2253         if (mlx5_logtype >= 0)
2254                 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
2255
2256         /* Build the static tables for Verbs conversion. */
2257         mlx5_set_ptype_table();
2258         mlx5_set_cksum_table();
2259         mlx5_set_swp_types_table();
2260         /*
2261          * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
2262          * huge pages. Calling ibv_fork_init() during init allows
2263          * applications to use fork() safely for purposes other than
2264          * using this PMD, which is not supported in forked processes.
2265          */
2266         setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
2267         /* Match the size of Rx completion entry to the size of a cacheline. */
2268         if (RTE_CACHE_LINE_SIZE == 128)
2269                 setenv("MLX5_CQE_SIZE", "128", 0);
2270         /*
2271          * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
2272          * cleanup all the Verbs resources even when the device was removed.
2273          */
2274         setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
2275 #ifdef RTE_IBVERBS_LINK_DLOPEN
2276         if (mlx5_glue_init())
2277                 return;
2278         assert(mlx5_glue);
2279 #endif
2280 #ifndef NDEBUG
2281         /* Glue structure must not contain any NULL pointers. */
2282         {
2283                 unsigned int i;
2284
2285                 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
2286                         assert(((const void *const *)mlx5_glue)[i]);
2287         }
2288 #endif
2289         if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
2290                 DRV_LOG(ERR,
2291                         "rdma-core glue \"%s\" mismatch: \"%s\" is required",
2292                         mlx5_glue->version, MLX5_GLUE_VERSION);
2293                 return;
2294         }
2295         mlx5_glue->fork_init();
2296         rte_pci_register(&mlx5_driver);
2297 }
2298
2299 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
2300 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
2301 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");