drivers/net/mlx5/mlx5.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2015 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <assert.h>
  10 #include <dlfcn.h>
  11 #include <stdint.h>
  12 #include <stdlib.h>
  13 #include <errno.h>
  14 #include <net/if.h>
  15 #include <sys/mman.h>
  16 #include <linux/rtnetlink.h>
  17
  18 /* Verbs header. */
  19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  20 #ifdef PEDANTIC
  21 #pragma GCC diagnostic ignored "-Wpedantic"
  22 #endif
  23 #include <infiniband/verbs.h>
  24 #ifdef PEDANTIC
  25 #pragma GCC diagnostic error "-Wpedantic"
  26 #endif
  27
  28 #include <rte_malloc.h>
  29 #include <rte_ethdev_driver.h>
  30 #include <rte_ethdev_pci.h>
  31 #include <rte_pci.h>
  32 #include <rte_bus_pci.h>
  33 #include <rte_common.h>
  34 #include <rte_config.h>
  35 #include <rte_eal_memconfig.h>
  36 #include <rte_kvargs.h>
  37 #include <rte_rwlock.h>
  38 #include <rte_spinlock.h>
  39 #include <rte_string_fns.h>
  40 #include <rte_alarm.h>
  41
  42 #include "mlx5.h"
  43 #include "mlx5_utils.h"
  44 #include "mlx5_rxtx.h"
  45 #include "mlx5_autoconf.h"
  46 #include "mlx5_defs.h"
  47 #include "mlx5_glue.h"
  48 #include "mlx5_mr.h"
  49 #include "mlx5_flow.h"
  50
  51 /* Device parameter to enable RX completion queue compression. */
  52 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
  53
  54 /* Device parameter to enable RX completion entry padding to 128B. */
  55 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
  56
  57 /* Device parameter to enable padding Rx packet to cacheline size. */
  58 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
  59
  60 /* Device parameter to enable Multi-Packet Rx queue. */
  61 #define MLX5_RX_MPRQ_EN "mprq_en"
  62
  63 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
  64 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
  65
  66 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
  67 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
  68
  69 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
  70 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
  71
  72 /* Device parameter to configure inline send. */
  73 #define MLX5_TXQ_INLINE "txq_inline"
  74
  75 /*
  76  * Device parameter to configure the number of TX queues threshold for
  77  * enabling inline send.
  78  */
  79 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
  80
  81 /*
  82  * Device parameter to configure the number of TX queues threshold for
  83  * enabling vectorized Tx.
  84  */
  85 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
  86
  87 /* Device parameter to enable multi-packet send WQEs. */
  88 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
  89
  90 /* Device parameter to include 2 dsegs in the title WQEBB. */
  91 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
  92
  93 /* Device parameter to limit the size of inlining packet. */
  94 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
  95
  96 /* Device parameter to enable hardware Tx vector. */
  97 #define MLX5_TX_VEC_EN "tx_vec_en"
  98
  99 /* Device parameter to enable hardware Rx vector. */
 100 #define MLX5_RX_VEC_EN "rx_vec_en"
 101
 102 /* Allow L3 VXLAN flow creation. */
 103 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
 104
 105 /* Activate DV E-Switch flow steering. */
 106 #define MLX5_DV_ESW_EN "dv_esw_en"
 107
 108 /* Activate DV flow steering. */
 109 #define MLX5_DV_FLOW_EN "dv_flow_en"
 110
 111 /* Activate Netlink support in VF mode. */
 112 #define MLX5_VF_NL_EN "vf_nl_en"
 113
 114 /* Enable extending memsegs when creating a MR. */
 115 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
 116
 117 /* Select port representors to instantiate. */
 118 #define MLX5_REPRESENTOR "representor"
 119
 120 /* Device parameter to configure the maximum number of dump files per queue. */
 121 #define MLX5_MAX_DUMP_FILES_NUM "max_dump_files_num"
 122
 123 #ifndef HAVE_IBV_MLX5_MOD_MPW
 124 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
 125 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
 126 #endif
 127
 128 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
 129 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
 130 #endif
 131
 132 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
 133
 134 /* Shared memory between primary and secondary processes. */
 135 struct mlx5_shared_data *mlx5_shared_data;
 136
 137 /* Spinlock for mlx5_shared_data allocation. */
 138 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
 139
 140 /* Process local data for secondary processes. */
 141 static struct mlx5_local_data mlx5_local_data;
 142
 143 /** Driver-specific log messages type. */
 144 int mlx5_logtype;
 145
 146 /** Data associated with devices to spawn. */
 147 struct mlx5_dev_spawn_data {
 148         uint32_t ifindex; /**< Network interface index. */
 149         uint32_t max_port; /**< IB device maximal port index. */
 150         uint32_t ibv_port; /**< IB device physical port index. */
 151         struct mlx5_switch_info info; /**< Switch information. */
 152         struct ibv_device *ibv_dev; /**< Associated IB device. */
 153         struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
 154         struct rte_pci_device *pci_dev; /**< Backend PCI device. */
 155 };
 156
 157 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
 158 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
 159
 160 /**
 161  * Initialize the counters management structure.
 162  *
 163  * @param[in] sh
 164  *   Pointer to mlx5_ibv_shared object to free
 165  */
 166 static void
 167 mlx5_flow_counters_mng_init(struct mlx5_ibv_shared *sh)
 168 {
 169         uint8_t i;
 170
 171         TAILQ_INIT(&sh->cmng.flow_counters);
 172         for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i)
 173                 TAILQ_INIT(&sh->cmng.ccont[i].pool_list);
 174 }
 175
 176 /**
 177  * Destroy all the resources allocated for a counter memory management.
 178  *
 179  * @param[in] mng
 180  *   Pointer to the memory management structure.
 181  */
 182 static void
 183 mlx5_flow_destroy_counter_stat_mem_mng(struct mlx5_counter_stats_mem_mng *mng)
 184 {
 185         uint8_t *mem = (uint8_t *)(uintptr_t)mng->raws[0].data;
 186
 187         LIST_REMOVE(mng, next);
 188         claim_zero(mlx5_devx_cmd_destroy(mng->dm));
 189         claim_zero(mlx5_glue->devx_umem_dereg(mng->umem));
 190         rte_free(mem);
 191 }
 192
 193 /**
 194  * Close and release all the resources of the counters management.
 195  *
 196  * @param[in] sh
 197  *   Pointer to mlx5_ibv_shared object to free.
 198  */
 199 static void
 200 mlx5_flow_counters_mng_close(struct mlx5_ibv_shared *sh)
 201 {
 202         struct mlx5_counter_stats_mem_mng *mng;
 203         uint8_t i;
 204         int j;
 205         int retries = 1024;
 206
 207         rte_errno = 0;
 208         while (--retries) {
 209                 rte_eal_alarm_cancel(mlx5_flow_query_alarm, sh);
 210                 if (rte_errno != EINPROGRESS)
 211                         break;
 212                 rte_pause();
 213         }
 214         for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i) {
 215                 struct mlx5_flow_counter_pool *pool;
 216                 uint32_t batch = !!(i % 2);
 217
 218                 if (!sh->cmng.ccont[i].pools)
 219                         continue;
 220                 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
 221                 while (pool) {
 222                         if (batch) {
 223                                 if (pool->min_dcs)
 224                                         claim_zero
 225                                         (mlx5_devx_cmd_destroy(pool->min_dcs));
 226                         }
 227                         for (j = 0; j < MLX5_COUNTERS_PER_POOL; ++j) {
 228                                 if (pool->counters_raw[j].action)
 229                                         claim_zero
 230                                         (mlx5_glue->destroy_flow_action
 231                                                (pool->counters_raw[j].action));
 232                                 if (!batch && pool->counters_raw[j].dcs)
 233                                         claim_zero(mlx5_devx_cmd_destroy
 234                                                   (pool->counters_raw[j].dcs));
 235                         }
 236                         TAILQ_REMOVE(&sh->cmng.ccont[i].pool_list, pool,
 237                                      next);
 238                         rte_free(pool);
 239                         pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
 240                 }
 241                 rte_free(sh->cmng.ccont[i].pools);
 242         }
 243         mng = LIST_FIRST(&sh->cmng.mem_mngs);
 244         while (mng) {
 245                 mlx5_flow_destroy_counter_stat_mem_mng(mng);
 246                 mng = LIST_FIRST(&sh->cmng.mem_mngs);
 247         }
 248         memset(&sh->cmng, 0, sizeof(sh->cmng));
 249 }
 250
 251 /**
 252  * Allocate shared IB device context. If there is multiport device the
 253  * master and representors will share this context, if there is single
 254  * port dedicated IB device, the context will be used by only given
 255  * port due to unification.
 256  *
 257  * Routine first searches the context for the specified IB device name,
 258  * if found the shared context assumed and reference counter is incremented.
 259  * If no context found the new one is created and initialized with specified
 260  * IB device context and parameters.
 261  *
 262  * @param[in] spawn
 263  *   Pointer to the IB device attributes (name, port, etc).
 264  *
 265  * @return
 266  *   Pointer to mlx5_ibv_shared object on success,
 267  *   otherwise NULL and rte_errno is set.
 268  */
 269 static struct mlx5_ibv_shared *
 270 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
 271 {
 272         struct mlx5_ibv_shared *sh;
 273         int err = 0;
 274         uint32_t i;
 275
 276         assert(spawn);
 277         /* Secondary process should not create the shared context. */
 278         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 279         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 280         /* Search for IB context by device name. */
 281         LIST_FOREACH(sh, &mlx5_ibv_list, next) {
 282                 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
 283                         sh->refcnt++;
 284                         goto exit;
 285                 }
 286         }
 287         /* No device found, we have to create new shared context. */
 288         assert(spawn->max_port);
 289         sh = rte_zmalloc("ethdev shared ib context",
 290                          sizeof(struct mlx5_ibv_shared) +
 291                          spawn->max_port *
 292                          sizeof(struct mlx5_ibv_shared_port),
 293                          RTE_CACHE_LINE_SIZE);
 294         if (!sh) {
 295                 DRV_LOG(ERR, "shared context allocation failure");
 296                 rte_errno  = ENOMEM;
 297                 goto exit;
 298         }
 299         /* Try to open IB device with DV first, then usual Verbs. */
 300         errno = 0;
 301         sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
 302         if (sh->ctx) {
 303                 sh->devx = 1;
 304                 DRV_LOG(DEBUG, "DevX is supported");
 305         } else {
 306                 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
 307                 if (!sh->ctx) {
 308                         err = errno ? errno : ENODEV;
 309                         goto error;
 310                 }
 311                 DRV_LOG(DEBUG, "DevX is NOT supported");
 312         }
 313         err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
 314         if (err) {
 315                 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
 316                 goto error;
 317         }
 318         sh->refcnt = 1;
 319         sh->max_port = spawn->max_port;
 320         strncpy(sh->ibdev_name, sh->ctx->device->name,
 321                 sizeof(sh->ibdev_name));
 322         strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
 323                 sizeof(sh->ibdev_path));
 324         sh->pci_dev = spawn->pci_dev;
 325         pthread_mutex_init(&sh->intr_mutex, NULL);
 326         /*
 327          * Setting port_id to max unallowed value means
 328          * there is no interrupt subhandler installed for
 329          * the given port index i.
 330          */
 331         for (i = 0; i < sh->max_port; i++)
 332                 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
 333         sh->pd = mlx5_glue->alloc_pd(sh->ctx);
 334         if (sh->pd == NULL) {
 335                 DRV_LOG(ERR, "PD allocation failure");
 336                 err = ENOMEM;
 337                 goto error;
 338         }
 339         /*
 340          * Once the device is added to the list of memory event
 341          * callback, its global MR cache table cannot be expanded
 342          * on the fly because of deadlock. If it overflows, lookup
 343          * should be done by searching MR list linearly, which is slow.
 344          *
 345          * At this point the device is not added to the memory
 346          * event list yet, context is just being created.
 347          */
 348         err = mlx5_mr_btree_init(&sh->mr.cache,
 349                                  MLX5_MR_BTREE_CACHE_N * 2,
 350                                  sh->pci_dev->device.numa_node);
 351         if (err) {
 352                 err = rte_errno;
 353                 goto error;
 354         }
 355         mlx5_flow_counters_mng_init(sh);
 356         LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
 357 exit:
 358         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 359         return sh;
 360 error:
 361         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 362         assert(sh);
 363         if (sh->pd)
 364                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 365         if (sh->ctx)
 366                 claim_zero(mlx5_glue->close_device(sh->ctx));
 367         rte_free(sh);
 368         assert(err > 0);
 369         rte_errno = err;
 370         return NULL;
 371 }
 372
 373 /**
 374  * Free shared IB device context. Decrement counter and if zero free
 375  * all allocated resources and close handles.
 376  *
 377  * @param[in] sh
 378  *   Pointer to mlx5_ibv_shared object to free
 379  */
 380 static void
 381 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
 382 {
 383         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 384 #ifndef NDEBUG
 385         /* Check the object presence in the list. */
 386         struct mlx5_ibv_shared *lctx;
 387
 388         LIST_FOREACH(lctx, &mlx5_ibv_list, next)
 389                 if (lctx == sh)
 390                         break;
 391         assert(lctx);
 392         if (lctx != sh) {
 393                 DRV_LOG(ERR, "Freeing non-existing shared IB context");
 394                 goto exit;
 395         }
 396 #endif
 397         assert(sh);
 398         assert(sh->refcnt);
 399         /* Secondary process should not free the shared context. */
 400         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 401         if (--sh->refcnt)
 402                 goto exit;
 403         /* Release created Memory Regions. */
 404         mlx5_mr_release(sh);
 405         LIST_REMOVE(sh, next);
 406         /*
 407          *  Ensure there is no async event handler installed.
 408          *  Only primary process handles async device events.
 409          **/
 410         mlx5_flow_counters_mng_close(sh);
 411         assert(!sh->intr_cnt);
 412         if (sh->intr_cnt)
 413                 mlx5_intr_callback_unregister
 414                         (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
 415         pthread_mutex_destroy(&sh->intr_mutex);
 416         if (sh->pd)
 417                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 418         if (sh->ctx)
 419                 claim_zero(mlx5_glue->close_device(sh->ctx));
 420         rte_free(sh);
 421 exit:
 422         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 423 }
 424
 425 /**
 426  * Initialize DR related data within private structure.
 427  * Routine checks the reference counter and does actual
 428  * resources creation/initialization only if counter is zero.
 429  *
 430  * @param[in] priv
 431  *   Pointer to the private device data structure.
 432  *
 433  * @return
 434  *   Zero on success, positive error code otherwise.
 435  */
 436 static int
 437 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 438 {
 439 #ifdef HAVE_MLX5DV_DR
 440         struct mlx5_ibv_shared *sh = priv->sh;
 441         int err = 0;
 442         void *domain;
 443
 444         assert(sh);
 445         if (sh->dv_refcnt) {
 446                 /* Shared DV/DR structures is already initialized. */
 447                 sh->dv_refcnt++;
 448                 priv->dr_shared = 1;
 449                 return 0;
 450         }
 451         /* Reference counter is zero, we should initialize structures. */
 452         domain = mlx5_glue->dr_create_domain(sh->ctx,
 453                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 454         if (!domain) {
 455                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 456                 err = errno;
 457                 goto error;
 458         }
 459         sh->rx_domain = domain;
 460         domain = mlx5_glue->dr_create_domain(sh->ctx,
 461                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 462         if (!domain) {
 463                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 464                 err = errno;
 465                 goto error;
 466         }
 467         pthread_mutex_init(&sh->dv_mutex, NULL);
 468         sh->tx_domain = domain;
 469 #ifdef HAVE_MLX5DV_DR_ESWITCH
 470         if (priv->config.dv_esw_en) {
 471                 domain  = mlx5_glue->dr_create_domain
 472                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 473                 if (!domain) {
 474                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 475                         err = errno;
 476                         goto error;
 477                 }
 478                 sh->fdb_domain = domain;
 479                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 480         }
 481 #endif
 482         sh->dv_refcnt++;
 483         priv->dr_shared = 1;
 484         return 0;
 485
 486 error:
 487        /* Rollback the created objects. */
 488         if (sh->rx_domain) {
 489                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 490                 sh->rx_domain = NULL;
 491         }
 492         if (sh->tx_domain) {
 493                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 494                 sh->tx_domain = NULL;
 495         }
 496         if (sh->fdb_domain) {
 497                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 498                 sh->fdb_domain = NULL;
 499         }
 500         if (sh->esw_drop_action) {
 501                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 502                 sh->esw_drop_action = NULL;
 503         }
 504         return err;
 505 #else
 506         (void)priv;
 507         return 0;
 508 #endif
 509 }
 510
 511 /**
 512  * Destroy DR related data within private structure.
 513  *
 514  * @param[in] priv
 515  *   Pointer to the private device data structure.
 516  */
 517 static void
 518 mlx5_free_shared_dr(struct mlx5_priv *priv)
 519 {
 520 #ifdef HAVE_MLX5DV_DR
 521         struct mlx5_ibv_shared *sh;
 522
 523         if (!priv->dr_shared)
 524                 return;
 525         priv->dr_shared = 0;
 526         sh = priv->sh;
 527         assert(sh);
 528         assert(sh->dv_refcnt);
 529         if (sh->dv_refcnt && --sh->dv_refcnt)
 530                 return;
 531         if (sh->rx_domain) {
 532                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 533                 sh->rx_domain = NULL;
 534         }
 535         if (sh->tx_domain) {
 536                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 537                 sh->tx_domain = NULL;
 538         }
 539 #ifdef HAVE_MLX5DV_DR_ESWITCH
 540         if (sh->fdb_domain) {
 541                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 542                 sh->fdb_domain = NULL;
 543         }
 544         if (sh->esw_drop_action) {
 545                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 546                 sh->esw_drop_action = NULL;
 547         }
 548 #endif
 549         pthread_mutex_destroy(&sh->dv_mutex);
 550 #else
 551         (void)priv;
 552 #endif
 553 }
 554
 555 /**
 556  * Initialize shared data between primary and secondary process.
 557  *
 558  * A memzone is reserved by primary process and secondary processes attach to
 559  * the memzone.
 560  *
 561  * @return
 562  *   0 on success, a negative errno value otherwise and rte_errno is set.
 563  */
 564 static int
 565 mlx5_init_shared_data(void)
 566 {
 567         const struct rte_memzone *mz;
 568         int ret = 0;
 569
 570         rte_spinlock_lock(&mlx5_shared_data_lock);
 571         if (mlx5_shared_data == NULL) {
 572                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 573                         /* Allocate shared memory. */
 574                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 575                                                  sizeof(*mlx5_shared_data),
 576                                                  SOCKET_ID_ANY, 0);
 577                         if (mz == NULL) {
 578                                 DRV_LOG(ERR,
 579                                         "Cannot allocate mlx5 shared data\n");
 580                                 ret = -rte_errno;
 581                                 goto error;
 582                         }
 583                         mlx5_shared_data = mz->addr;
 584                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 585                         rte_spinlock_init(&mlx5_shared_data->lock);
 586                 } else {
 587                         /* Lookup allocated shared memory. */
 588                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 589                         if (mz == NULL) {
 590                                 DRV_LOG(ERR,
 591                                         "Cannot attach mlx5 shared data\n");
 592                                 ret = -rte_errno;
 593                                 goto error;
 594                         }
 595                         mlx5_shared_data = mz->addr;
 596                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 597                 }
 598         }
 599 error:
 600         rte_spinlock_unlock(&mlx5_shared_data_lock);
 601         return ret;
 602 }
 603
 604 /**
 605  * Retrieve integer value from environment variable.
 606  *
 607  * @param[in] name
 608  *   Environment variable name.
 609  *
 610  * @return
 611  *   Integer value, 0 if the variable is not set.
 612  */
 613 int
 614 mlx5_getenv_int(const char *name)
 615 {
 616         const char *val = getenv(name);
 617
 618         if (val == NULL)
 619                 return 0;
 620         return atoi(val);
 621 }
 622
 623 /**
 624  * Verbs callback to allocate a memory. This function should allocate the space
 625  * according to the size provided residing inside a huge page.
 626  * Please note that all allocation must respect the alignment from libmlx5
 627  * (i.e. currently sysconf(_SC_PAGESIZE)).
 628  *
 629  * @param[in] size
 630  *   The size in bytes of the memory to allocate.
 631  * @param[in] data
 632  *   A pointer to the callback data.
 633  *
 634  * @return
 635  *   Allocated buffer, NULL otherwise and rte_errno is set.
 636  */
 637 static void *
 638 mlx5_alloc_verbs_buf(size_t size, void *data)
 639 {
 640         struct mlx5_priv *priv = data;
 641         void *ret;
 642         size_t alignment = sysconf(_SC_PAGESIZE);
 643         unsigned int socket = SOCKET_ID_ANY;
 644
 645         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
 646                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 647
 648                 socket = ctrl->socket;
 649         } else if (priv->verbs_alloc_ctx.type ==
 650                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
 651                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 652
 653                 socket = ctrl->socket;
 654         }
 655         assert(data != NULL);
 656         ret = rte_malloc_socket(__func__, size, alignment, socket);
 657         if (!ret && size)
 658                 rte_errno = ENOMEM;
 659         return ret;
 660 }
 661
 662 /**
 663  * Verbs callback to free a memory.
 664  *
 665  * @param[in] ptr
 666  *   A pointer to the memory to free.
 667  * @param[in] data
 668  *   A pointer to the callback data.
 669  */
 670 static void
 671 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 672 {
 673         assert(data != NULL);
 674         rte_free(ptr);
 675 }
 676
 677 /**
 678  * Initialize process private data structure.
 679  *
 680  * @param dev
 681  *   Pointer to Ethernet device structure.
 682  *
 683  * @return
 684  *   0 on success, a negative errno value otherwise and rte_errno is set.
 685  */
 686 int
 687 mlx5_proc_priv_init(struct rte_eth_dev *dev)
 688 {
 689         struct mlx5_priv *priv = dev->data->dev_private;
 690         struct mlx5_proc_priv *ppriv;
 691         size_t ppriv_size;
 692
 693         /*
 694          * UAR register table follows the process private structure. BlueFlame
 695          * registers for Tx queues are stored in the table.
 696          */
 697         ppriv_size =
 698                 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
 699         ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
 700                                   RTE_CACHE_LINE_SIZE, dev->device->numa_node);
 701         if (!ppriv) {
 702                 rte_errno = ENOMEM;
 703                 return -rte_errno;
 704         }
 705         ppriv->uar_table_sz = ppriv_size;
 706         dev->process_private = ppriv;
 707         return 0;
 708 }
 709
 710 /**
 711  * Un-initialize process private data structure.
 712  *
 713  * @param dev
 714  *   Pointer to Ethernet device structure.
 715  */
 716 static void
 717 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
 718 {
 719         if (!dev->process_private)
 720                 return;
 721         rte_free(dev->process_private);
 722         dev->process_private = NULL;
 723 }
 724
 725 /**
 726  * DPDK callback to close the device.
 727  *
 728  * Destroy all queues and objects, free memory.
 729  *
 730  * @param dev
 731  *   Pointer to Ethernet device structure.
 732  */
 733 static void
 734 mlx5_dev_close(struct rte_eth_dev *dev)
 735 {
 736         struct mlx5_priv *priv = dev->data->dev_private;
 737         unsigned int i;
 738         int ret;
 739
 740         DRV_LOG(DEBUG, "port %u closing device \"%s\"",
 741                 dev->data->port_id,
 742                 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
 743         /* In case mlx5_dev_stop() has not been called. */
 744         mlx5_dev_interrupt_handler_uninstall(dev);
 745         mlx5_traffic_disable(dev);
 746         mlx5_flow_flush(dev, NULL);
 747         /* Prevent crashes when queues are still in use. */
 748         dev->rx_pkt_burst = removed_rx_burst;
 749         dev->tx_pkt_burst = removed_tx_burst;
 750         rte_wmb();
 751         /* Disable datapath on secondary process. */
 752         mlx5_mp_req_stop_rxtx(dev);
 753         if (priv->rxqs != NULL) {
 754                 /* XXX race condition if mlx5_rx_burst() is still running. */
 755                 usleep(1000);
 756                 for (i = 0; (i != priv->rxqs_n); ++i)
 757                         mlx5_rxq_release(dev, i);
 758                 priv->rxqs_n = 0;
 759                 priv->rxqs = NULL;
 760         }
 761         if (priv->txqs != NULL) {
 762                 /* XXX race condition if mlx5_tx_burst() is still running. */
 763                 usleep(1000);
 764                 for (i = 0; (i != priv->txqs_n); ++i)
 765                         mlx5_txq_release(dev, i);
 766                 priv->txqs_n = 0;
 767                 priv->txqs = NULL;
 768         }
 769         mlx5_proc_priv_uninit(dev);
 770         mlx5_mprq_free_mp(dev);
 771         /* Remove from memory callback device list. */
 772         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
 773         assert(priv->sh);
 774         LIST_REMOVE(priv->sh, mem_event_cb);
 775         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
 776         mlx5_free_shared_dr(priv);
 777         if (priv->rss_conf.rss_key != NULL)
 778                 rte_free(priv->rss_conf.rss_key);
 779         if (priv->reta_idx != NULL)
 780                 rte_free(priv->reta_idx);
 781         if (priv->config.vf)
 782                 mlx5_nl_mac_addr_flush(dev);
 783         if (priv->nl_socket_route >= 0)
 784                 close(priv->nl_socket_route);
 785         if (priv->nl_socket_rdma >= 0)
 786                 close(priv->nl_socket_rdma);
 787         if (priv->sh) {
 788                 /*
 789                  * Free the shared context in last turn, because the cleanup
 790                  * routines above may use some shared fields, like
 791                  * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
 792                  * ifindex if Netlink fails.
 793                  */
 794                 mlx5_free_shared_ibctx(priv->sh);
 795                 priv->sh = NULL;
 796         }
 797         ret = mlx5_hrxq_ibv_verify(dev);
 798         if (ret)
 799                 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
 800                         dev->data->port_id);
 801         ret = mlx5_ind_table_ibv_verify(dev);
 802         if (ret)
 803                 DRV_LOG(WARNING, "port %u some indirection table still remain",
 804                         dev->data->port_id);
 805         ret = mlx5_rxq_ibv_verify(dev);
 806         if (ret)
 807                 DRV_LOG(WARNING, "port %u some Verbs Rx queue still remain",
 808                         dev->data->port_id);
 809         ret = mlx5_rxq_verify(dev);
 810         if (ret)
 811                 DRV_LOG(WARNING, "port %u some Rx queues still remain",
 812                         dev->data->port_id);
 813         ret = mlx5_txq_ibv_verify(dev);
 814         if (ret)
 815                 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
 816                         dev->data->port_id);
 817         ret = mlx5_txq_verify(dev);
 818         if (ret)
 819                 DRV_LOG(WARNING, "port %u some Tx queues still remain",
 820                         dev->data->port_id);
 821         ret = mlx5_flow_verify(dev);
 822         if (ret)
 823                 DRV_LOG(WARNING, "port %u some flows still remain",
 824                         dev->data->port_id);
 825         if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
 826                 unsigned int c = 0;
 827                 uint16_t port_id;
 828
 829                 RTE_ETH_FOREACH_DEV_OF(port_id, dev->device) {
 830                         struct mlx5_priv *opriv =
 831                                 rte_eth_devices[port_id].data->dev_private;
 832
 833                         if (!opriv ||
 834                             opriv->domain_id != priv->domain_id ||
 835                             &rte_eth_devices[port_id] == dev)
 836                                 continue;
 837                         ++c;
 838                 }
 839                 if (!c)
 840                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
 841         }
 842         memset(priv, 0, sizeof(*priv));
 843         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
 844         /*
 845          * Reset mac_addrs to NULL such that it is not freed as part of
 846          * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
 847          * it is freed when dev_private is freed.
 848          */
 849         dev->data->mac_addrs = NULL;
 850 }
 851
 852 const struct eth_dev_ops mlx5_dev_ops = {
 853         .dev_configure = mlx5_dev_configure,
 854         .dev_start = mlx5_dev_start,
 855         .dev_stop = mlx5_dev_stop,
 856         .dev_set_link_down = mlx5_set_link_down,
 857         .dev_set_link_up = mlx5_set_link_up,
 858         .dev_close = mlx5_dev_close,
 859         .promiscuous_enable = mlx5_promiscuous_enable,
 860         .promiscuous_disable = mlx5_promiscuous_disable,
 861         .allmulticast_enable = mlx5_allmulticast_enable,
 862         .allmulticast_disable = mlx5_allmulticast_disable,
 863         .link_update = mlx5_link_update,
 864         .stats_get = mlx5_stats_get,
 865         .stats_reset = mlx5_stats_reset,
 866         .xstats_get = mlx5_xstats_get,
 867         .xstats_reset = mlx5_xstats_reset,
 868         .xstats_get_names = mlx5_xstats_get_names,
 869         .fw_version_get = mlx5_fw_version_get,
 870         .dev_infos_get = mlx5_dev_infos_get,
 871         .read_clock = mlx5_read_clock,
 872         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
 873         .vlan_filter_set = mlx5_vlan_filter_set,
 874         .rx_queue_setup = mlx5_rx_queue_setup,
 875         .tx_queue_setup = mlx5_tx_queue_setup,
 876         .rx_queue_release = mlx5_rx_queue_release,
 877         .tx_queue_release = mlx5_tx_queue_release,
 878         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
 879         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
 880         .mac_addr_remove = mlx5_mac_addr_remove,
 881         .mac_addr_add = mlx5_mac_addr_add,
 882         .mac_addr_set = mlx5_mac_addr_set,
 883         .set_mc_addr_list = mlx5_set_mc_addr_list,
 884         .mtu_set = mlx5_dev_set_mtu,
 885         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
 886         .vlan_offload_set = mlx5_vlan_offload_set,
 887         .reta_update = mlx5_dev_rss_reta_update,
 888         .reta_query = mlx5_dev_rss_reta_query,
 889         .rss_hash_update = mlx5_rss_hash_update,
 890         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
 891         .filter_ctrl = mlx5_dev_filter_ctrl,
 892         .rx_descriptor_status = mlx5_rx_descriptor_status,
 893         .tx_descriptor_status = mlx5_tx_descriptor_status,
 894         .rx_queue_count = mlx5_rx_queue_count,
 895         .rx_queue_intr_enable = mlx5_rx_intr_enable,
 896         .rx_queue_intr_disable = mlx5_rx_intr_disable,
 897         .is_removed = mlx5_is_removed,
 898 };
 899
 900 /* Available operations from secondary process. */
 901 static const struct eth_dev_ops mlx5_dev_sec_ops = {
 902         .stats_get = mlx5_stats_get,
 903         .stats_reset = mlx5_stats_reset,
 904         .xstats_get = mlx5_xstats_get,
 905         .xstats_reset = mlx5_xstats_reset,
 906         .xstats_get_names = mlx5_xstats_get_names,
 907         .fw_version_get = mlx5_fw_version_get,
 908         .dev_infos_get = mlx5_dev_infos_get,
 909         .rx_descriptor_status = mlx5_rx_descriptor_status,
 910         .tx_descriptor_status = mlx5_tx_descriptor_status,
 911 };
 912
 913 /* Available operations in flow isolated mode. */
 914 const struct eth_dev_ops mlx5_dev_ops_isolate = {
 915         .dev_configure = mlx5_dev_configure,
 916         .dev_start = mlx5_dev_start,
 917         .dev_stop = mlx5_dev_stop,
 918         .dev_set_link_down = mlx5_set_link_down,
 919         .dev_set_link_up = mlx5_set_link_up,
 920         .dev_close = mlx5_dev_close,
 921         .promiscuous_enable = mlx5_promiscuous_enable,
 922         .promiscuous_disable = mlx5_promiscuous_disable,
 923         .allmulticast_enable = mlx5_allmulticast_enable,
 924         .allmulticast_disable = mlx5_allmulticast_disable,
 925         .link_update = mlx5_link_update,
 926         .stats_get = mlx5_stats_get,
 927         .stats_reset = mlx5_stats_reset,
 928         .xstats_get = mlx5_xstats_get,
 929         .xstats_reset = mlx5_xstats_reset,
 930         .xstats_get_names = mlx5_xstats_get_names,
 931         .fw_version_get = mlx5_fw_version_get,
 932         .dev_infos_get = mlx5_dev_infos_get,
 933         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
 934         .vlan_filter_set = mlx5_vlan_filter_set,
 935         .rx_queue_setup = mlx5_rx_queue_setup,
 936         .tx_queue_setup = mlx5_tx_queue_setup,
 937         .rx_queue_release = mlx5_rx_queue_release,
 938         .tx_queue_release = mlx5_tx_queue_release,
 939         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
 940         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
 941         .mac_addr_remove = mlx5_mac_addr_remove,
 942         .mac_addr_add = mlx5_mac_addr_add,
 943         .mac_addr_set = mlx5_mac_addr_set,
 944         .set_mc_addr_list = mlx5_set_mc_addr_list,
 945         .mtu_set = mlx5_dev_set_mtu,
 946         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
 947         .vlan_offload_set = mlx5_vlan_offload_set,
 948         .filter_ctrl = mlx5_dev_filter_ctrl,
 949         .rx_descriptor_status = mlx5_rx_descriptor_status,
 950         .tx_descriptor_status = mlx5_tx_descriptor_status,
 951         .rx_queue_intr_enable = mlx5_rx_intr_enable,
 952         .rx_queue_intr_disable = mlx5_rx_intr_disable,
 953         .is_removed = mlx5_is_removed,
 954 };
 955
 956 /**
 957  * Verify and store value for device argument.
 958  *
 959  * @param[in] key
 960  *   Key argument to verify.
 961  * @param[in] val
 962  *   Value associated with key.
 963  * @param opaque
 964  *   User data.
 965  *
 966  * @return
 967  *   0 on success, a negative errno value otherwise and rte_errno is set.
 968  */
 969 static int
 970 mlx5_args_check(const char *key, const char *val, void *opaque)
 971 {
 972         struct mlx5_dev_config *config = opaque;
 973         unsigned long tmp;
 974
 975         /* No-op, port representors are processed in mlx5_dev_spawn(). */
 976         if (!strcmp(MLX5_REPRESENTOR, key))
 977                 return 0;
 978         errno = 0;
 979         tmp = strtoul(val, NULL, 0);
 980         if (errno) {
 981                 rte_errno = errno;
 982                 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
 983                 return -rte_errno;
 984         }
 985         if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
 986                 config->cqe_comp = !!tmp;
 987         } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
 988                 config->cqe_pad = !!tmp;
 989         } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
 990                 config->hw_padding = !!tmp;
 991         } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
 992                 config->mprq.enabled = !!tmp;
 993         } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
 994                 config->mprq.stride_num_n = tmp;
 995         } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
 996                 config->mprq.max_memcpy_len = tmp;
 997         } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
 998                 config->mprq.min_rxqs_num = tmp;
 999         } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
1000                 config->txq_inline = tmp;
1001         } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
1002                 config->txqs_inline = tmp;
1003         } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
1004                 config->txqs_vec = tmp;
1005         } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
1006                 config->mps = !!tmp;
1007         } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
1008                 config->mpw_hdr_dseg = !!tmp;
1009         } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
1010                 config->inline_max_packet_sz = tmp;
1011         } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
1012                 config->tx_vec_en = !!tmp;
1013         } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
1014                 config->rx_vec_en = !!tmp;
1015         } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
1016                 config->l3_vxlan_en = !!tmp;
1017         } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
1018                 config->vf_nl_en = !!tmp;
1019         } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
1020                 config->dv_esw_en = !!tmp;
1021         } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
1022                 config->dv_flow_en = !!tmp;
1023         } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
1024                 config->mr_ext_memseg_en = !!tmp;
1025         } else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {
1026                 config->max_dump_files_num = tmp;
1027         } else {
1028                 DRV_LOG(WARNING, "%s: unknown parameter", key);
1029                 rte_errno = EINVAL;
1030                 return -rte_errno;
1031         }
1032         return 0;
1033 }
1034
1035 /**
1036  * Parse device parameters.
1037  *
1038  * @param config
1039  *   Pointer to device configuration structure.
1040  * @param devargs
1041  *   Device arguments structure.
1042  *
1043  * @return
1044  *   0 on success, a negative errno value otherwise and rte_errno is set.
1045  */
1046 static int
1047 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
1048 {
1049         const char **params = (const char *[]){
1050                 MLX5_RXQ_CQE_COMP_EN,
1051                 MLX5_RXQ_CQE_PAD_EN,
1052                 MLX5_RXQ_PKT_PAD_EN,
1053                 MLX5_RX_MPRQ_EN,
1054                 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
1055                 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
1056                 MLX5_RXQS_MIN_MPRQ,
1057                 MLX5_TXQ_INLINE,
1058                 MLX5_TXQS_MIN_INLINE,
1059                 MLX5_TXQS_MAX_VEC,
1060                 MLX5_TXQ_MPW_EN,
1061                 MLX5_TXQ_MPW_HDR_DSEG_EN,
1062                 MLX5_TXQ_MAX_INLINE_LEN,
1063                 MLX5_TX_VEC_EN,
1064                 MLX5_RX_VEC_EN,
1065                 MLX5_L3_VXLAN_EN,
1066                 MLX5_VF_NL_EN,
1067                 MLX5_DV_ESW_EN,
1068                 MLX5_DV_FLOW_EN,
1069                 MLX5_MR_EXT_MEMSEG_EN,
1070                 MLX5_REPRESENTOR,
1071                 MLX5_MAX_DUMP_FILES_NUM,
1072                 NULL,
1073         };
1074         struct rte_kvargs *kvlist;
1075         int ret = 0;
1076         int i;
1077
1078         if (devargs == NULL)
1079                 return 0;
1080         /* Following UGLY cast is done to pass checkpatch. */
1081         kvlist = rte_kvargs_parse(devargs->args, params);
1082         if (kvlist == NULL) {
1083                 rte_errno = EINVAL;
1084                 return -rte_errno;
1085         }
1086         /* Process parameters. */
1087         for (i = 0; (params[i] != NULL); ++i) {
1088                 if (rte_kvargs_count(kvlist, params[i])) {
1089                         ret = rte_kvargs_process(kvlist, params[i],
1090                                                  mlx5_args_check, config);
1091                         if (ret) {
1092                                 rte_errno = EINVAL;
1093                                 rte_kvargs_free(kvlist);
1094                                 return -rte_errno;
1095                         }
1096                 }
1097         }
1098         rte_kvargs_free(kvlist);
1099         return 0;
1100 }
1101
1102 static struct rte_pci_driver mlx5_driver;
1103
1104 /**
1105  * PMD global initialization.
1106  *
1107  * Independent from individual device, this function initializes global
1108  * per-PMD data structures distinguishing primary and secondary processes.
1109  * Hence, each initialization is called once per a process.
1110  *
1111  * @return
1112  *   0 on success, a negative errno value otherwise and rte_errno is set.
1113  */
1114 static int
1115 mlx5_init_once(void)
1116 {
1117         struct mlx5_shared_data *sd;
1118         struct mlx5_local_data *ld = &mlx5_local_data;
1119         int ret = 0;
1120
1121         if (mlx5_init_shared_data())
1122                 return -rte_errno;
1123         sd = mlx5_shared_data;
1124         assert(sd);
1125         rte_spinlock_lock(&sd->lock);
1126         switch (rte_eal_process_type()) {
1127         case RTE_PROC_PRIMARY:
1128                 if (sd->init_done)
1129                         break;
1130                 LIST_INIT(&sd->mem_event_cb_list);
1131                 rte_rwlock_init(&sd->mem_event_rwlock);
1132                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1133                                                 mlx5_mr_mem_event_cb, NULL);
1134                 ret = mlx5_mp_init_primary();
1135                 if (ret)
1136                         goto out;
1137                 sd->init_done = true;
1138                 break;
1139         case RTE_PROC_SECONDARY:
1140                 if (ld->init_done)
1141                         break;
1142                 ret = mlx5_mp_init_secondary();
1143                 if (ret)
1144                         goto out;
1145                 ++sd->secondary_cnt;
1146                 ld->init_done = true;
1147                 break;
1148         default:
1149                 break;
1150         }
1151 out:
1152         rte_spinlock_unlock(&sd->lock);
1153         return ret;
1154 }
1155
1156 /**
1157  * Spawn an Ethernet device from Verbs information.
1158  *
1159  * @param dpdk_dev
1160  *   Backing DPDK device.
1161  * @param spawn
1162  *   Verbs device parameters (name, port, switch_info) to spawn.
1163  * @param config
1164  *   Device configuration parameters.
1165  *
1166  * @return
1167  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
1168  *   is set. The following errors are defined:
1169  *
1170  *   EBUSY: device is not supposed to be spawned.
1171  *   EEXIST: device is already spawned
1172  */
1173 static struct rte_eth_dev *
1174 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1175                struct mlx5_dev_spawn_data *spawn,
1176                struct mlx5_dev_config config)
1177 {
1178         const struct mlx5_switch_info *switch_info = &spawn->info;
1179         struct mlx5_ibv_shared *sh = NULL;
1180         struct ibv_port_attr port_attr;
1181         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1182         struct rte_eth_dev *eth_dev = NULL;
1183         struct mlx5_priv *priv = NULL;
1184         int err = 0;
1185         unsigned int hw_padding = 0;
1186         unsigned int mps;
1187         unsigned int cqe_comp;
1188         unsigned int cqe_pad = 0;
1189         unsigned int tunnel_en = 0;
1190         unsigned int mpls_en = 0;
1191         unsigned int swp = 0;
1192         unsigned int mprq = 0;
1193         unsigned int mprq_min_stride_size_n = 0;
1194         unsigned int mprq_max_stride_size_n = 0;
1195         unsigned int mprq_min_stride_num_n = 0;
1196         unsigned int mprq_max_stride_num_n = 0;
1197         struct rte_ether_addr mac;
1198         char name[RTE_ETH_NAME_MAX_LEN];
1199         int own_domain_id = 0;
1200         uint16_t port_id;
1201         unsigned int i;
1202
1203         /* Determine if this port representor is supposed to be spawned. */
1204         if (switch_info->representor && dpdk_dev->devargs) {
1205                 struct rte_eth_devargs eth_da;
1206
1207                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
1208                 if (err) {
1209                         rte_errno = -err;
1210                         DRV_LOG(ERR, "failed to process device arguments: %s",
1211                                 strerror(rte_errno));
1212                         return NULL;
1213                 }
1214                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1215                         if (eth_da.representor_ports[i] ==
1216                             (uint16_t)switch_info->port_name)
1217                                 break;
1218                 if (i == eth_da.nb_representor_ports) {
1219                         rte_errno = EBUSY;
1220                         return NULL;
1221                 }
1222         }
1223         /* Build device name. */
1224         if (!switch_info->representor)
1225                 strlcpy(name, dpdk_dev->name, sizeof(name));
1226         else
1227                 snprintf(name, sizeof(name), "%s_representor_%u",
1228                          dpdk_dev->name, switch_info->port_name);
1229         /* check if the device is already spawned */
1230         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1231                 rte_errno = EEXIST;
1232                 return NULL;
1233         }
1234         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1235         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1236                 eth_dev = rte_eth_dev_attach_secondary(name);
1237                 if (eth_dev == NULL) {
1238                         DRV_LOG(ERR, "can not attach rte ethdev");
1239                         rte_errno = ENOMEM;
1240                         return NULL;
1241                 }
1242                 eth_dev->device = dpdk_dev;
1243                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1244                 err = mlx5_proc_priv_init(eth_dev);
1245                 if (err)
1246                         return NULL;
1247                 /* Receive command fd from primary process */
1248                 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1249                 if (err < 0)
1250                         return NULL;
1251                 /* Remap UAR for Tx queues. */
1252                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
1253                 if (err)
1254                         return NULL;
1255                 /*
1256                  * Ethdev pointer is still required as input since
1257                  * the primary device is not accessible from the
1258                  * secondary process.
1259                  */
1260                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1261                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1262                 return eth_dev;
1263         }
1264         sh = mlx5_alloc_shared_ibctx(spawn);
1265         if (!sh)
1266                 return NULL;
1267         config.devx = sh->devx;
1268 #ifdef HAVE_IBV_MLX5_MOD_SWP
1269         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1270 #endif
1271         /*
1272          * Multi-packet send is supported by ConnectX-4 Lx PF as well
1273          * as all ConnectX-5 devices.
1274          */
1275 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1276         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1277 #endif
1278 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1279         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1280 #endif
1281         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1282         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1283                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1284                         DRV_LOG(DEBUG, "enhanced MPW is supported");
1285                         mps = MLX5_MPW_ENHANCED;
1286                 } else {
1287                         DRV_LOG(DEBUG, "MPW is supported");
1288                         mps = MLX5_MPW;
1289                 }
1290         } else {
1291                 DRV_LOG(DEBUG, "MPW isn't supported");
1292                 mps = MLX5_MPW_DISABLED;
1293         }
1294 #ifdef HAVE_IBV_MLX5_MOD_SWP
1295         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1296                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1297         DRV_LOG(DEBUG, "SWP support: %u", swp);
1298 #endif
1299         config.swp = !!swp;
1300 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1301         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1302                 struct mlx5dv_striding_rq_caps mprq_caps =
1303                         dv_attr.striding_rq_caps;
1304
1305                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1306                         mprq_caps.min_single_stride_log_num_of_bytes);
1307                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1308                         mprq_caps.max_single_stride_log_num_of_bytes);
1309                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1310                         mprq_caps.min_single_wqe_log_num_of_strides);
1311                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1312                         mprq_caps.max_single_wqe_log_num_of_strides);
1313                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1314                         mprq_caps.supported_qpts);
1315                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1316                 mprq = 1;
1317                 mprq_min_stride_size_n =
1318                         mprq_caps.min_single_stride_log_num_of_bytes;
1319                 mprq_max_stride_size_n =
1320                         mprq_caps.max_single_stride_log_num_of_bytes;
1321                 mprq_min_stride_num_n =
1322                         mprq_caps.min_single_wqe_log_num_of_strides;
1323                 mprq_max_stride_num_n =
1324                         mprq_caps.max_single_wqe_log_num_of_strides;
1325                 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1326                                                    mprq_min_stride_num_n);
1327         }
1328 #endif
1329         if (RTE_CACHE_LINE_SIZE == 128 &&
1330             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
1331                 cqe_comp = 0;
1332         else
1333                 cqe_comp = 1;
1334         config.cqe_comp = cqe_comp;
1335 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
1336         /* Whether device supports 128B Rx CQE padding. */
1337         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
1338                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
1339 #endif
1340 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1341         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1342                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1343                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1344                              (dv_attr.tunnel_offloads_caps &
1345                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
1346         }
1347         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1348                 tunnel_en ? "" : "not ");
1349 #else
1350         DRV_LOG(WARNING,
1351                 "tunnel offloading disabled due to old OFED/rdma-core version");
1352 #endif
1353         config.tunnel_en = tunnel_en;
1354 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1355         mpls_en = ((dv_attr.tunnel_offloads_caps &
1356                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1357                    (dv_attr.tunnel_offloads_caps &
1358                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1359         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1360                 mpls_en ? "" : "not ");
1361 #else
1362         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1363                 " old OFED/rdma-core version or firmware configuration");
1364 #endif
1365         config.mpls_en = mpls_en;
1366         /* Check port status. */
1367         err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
1368         if (err) {
1369                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1370                 goto error;
1371         }
1372         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1373                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1374                 err = EINVAL;
1375                 goto error;
1376         }
1377         if (port_attr.state != IBV_PORT_ACTIVE)
1378                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1379                         mlx5_glue->port_state_str(port_attr.state),
1380                         port_attr.state);
1381         /* Allocate private eth device data. */
1382         priv = rte_zmalloc("ethdev private structure",
1383                            sizeof(*priv),
1384                            RTE_CACHE_LINE_SIZE);
1385         if (priv == NULL) {
1386                 DRV_LOG(ERR, "priv allocation failure");
1387                 err = ENOMEM;
1388                 goto error;
1389         }
1390         priv->sh = sh;
1391         priv->ibv_port = spawn->ibv_port;
1392         priv->mtu = RTE_ETHER_MTU;
1393 #ifndef RTE_ARCH_64
1394         /* Initialize UAR access locks for 32bit implementations. */
1395         rte_spinlock_init(&priv->uar_lock_cq);
1396         for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1397                 rte_spinlock_init(&priv->uar_lock[i]);
1398 #endif
1399         /* Some internal functions rely on Netlink sockets, open them now. */
1400         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1401         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1402         priv->nl_sn = 0;
1403         priv->representor = !!switch_info->representor;
1404         priv->master = !!switch_info->master;
1405         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1406         /*
1407          * Currently we support single E-Switch per PF configurations
1408          * only and vport_id field contains the vport index for
1409          * associated VF, which is deduced from representor port name.
1410          * For example, let's have the IB device port 10, it has
1411          * attached network device eth0, which has port name attribute
1412          * pf0vf2, we can deduce the VF number as 2, and set vport index
1413          * as 3 (2+1). This assigning schema should be changed if the
1414          * multiple E-Switch instances per PF configurations or/and PCI
1415          * subfunctions are added.
1416          */
1417         priv->vport_id = switch_info->representor ?
1418                          switch_info->port_name + 1 : -1;
1419         /* representor_id field keeps the unmodified port/VF index. */
1420         priv->representor_id = switch_info->representor ?
1421                                switch_info->port_name : -1;
1422         /*
1423          * Look for sibling devices in order to reuse their switch domain
1424          * if any, otherwise allocate one.
1425          */
1426         RTE_ETH_FOREACH_DEV_OF(port_id, dpdk_dev) {
1427                 const struct mlx5_priv *opriv =
1428                         rte_eth_devices[port_id].data->dev_private;
1429
1430                 if (!opriv ||
1431                         opriv->domain_id ==
1432                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1433                         continue;
1434                 priv->domain_id = opriv->domain_id;
1435                 break;
1436         }
1437         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1438                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1439                 if (err) {
1440                         err = rte_errno;
1441                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1442                                 strerror(rte_errno));
1443                         goto error;
1444                 }
1445                 own_domain_id = 1;
1446         }
1447         err = mlx5_args(&config, dpdk_dev->devargs);
1448         if (err) {
1449                 err = rte_errno;
1450                 DRV_LOG(ERR, "failed to process device arguments: %s",
1451                         strerror(rte_errno));
1452                 goto error;
1453         }
1454         config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1455                             IBV_DEVICE_RAW_IP_CSUM);
1456         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1457                 (config.hw_csum ? "" : "not "));
1458 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1459         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1460         DRV_LOG(DEBUG, "counters are not supported");
1461 #endif
1462 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
1463         if (config.dv_flow_en) {
1464                 DRV_LOG(WARNING, "DV flow is not supported");
1465                 config.dv_flow_en = 0;
1466         }
1467 #endif
1468         config.ind_table_max_size =
1469                 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
1470         /*
1471          * Remove this check once DPDK supports larger/variable
1472          * indirection tables.
1473          */
1474         if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1475                 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1476         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1477                 config.ind_table_max_size);
1478         config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1479                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1480         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1481                 (config.hw_vlan_strip ? "" : "not "));
1482         config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1483                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1484         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1485                 (config.hw_fcs_strip ? "" : "not "));
1486 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1487         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1488 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1489         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1490                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1491 #endif
1492         if (config.hw_padding && !hw_padding) {
1493                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1494                 config.hw_padding = 0;
1495         } else if (config.hw_padding) {
1496                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1497         }
1498         config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
1499                       (sh->device_attr.tso_caps.supported_qpts &
1500                        (1 << IBV_QPT_RAW_PACKET)));
1501         if (config.tso)
1502                 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
1503         /*
1504          * MPW is disabled by default, while the Enhanced MPW is enabled
1505          * by default.
1506          */
1507         if (config.mps == MLX5_ARG_UNSET)
1508                 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1509                                                           MLX5_MPW_DISABLED;
1510         else
1511                 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
1512         DRV_LOG(INFO, "%sMPS is %s",
1513                 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
1514                 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1515         if (config.cqe_comp && !cqe_comp) {
1516                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1517                 config.cqe_comp = 0;
1518         }
1519         if (config.cqe_pad && !cqe_pad) {
1520                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1521                 config.cqe_pad = 0;
1522         } else if (config.cqe_pad) {
1523                 DRV_LOG(INFO, "Rx CQE padding is enabled");
1524         }
1525         if (config.mprq.enabled && mprq) {
1526                 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
1527                     config.mprq.stride_num_n < mprq_min_stride_num_n) {
1528                         config.mprq.stride_num_n =
1529                                 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1530                                         mprq_min_stride_num_n);
1531                         DRV_LOG(WARNING,
1532                                 "the number of strides"
1533                                 " for Multi-Packet RQ is out of range,"
1534                                 " setting default value (%u)",
1535                                 1 << config.mprq.stride_num_n);
1536                 }
1537                 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
1538                 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
1539         } else if (config.mprq.enabled && !mprq) {
1540                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1541                 config.mprq.enabled = 0;
1542         }
1543         if (config.max_dump_files_num == 0)
1544                 config.max_dump_files_num = 128;
1545         eth_dev = rte_eth_dev_allocate(name);
1546         if (eth_dev == NULL) {
1547                 DRV_LOG(ERR, "can not allocate rte ethdev");
1548                 err = ENOMEM;
1549                 goto error;
1550         }
1551         /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1552         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1553         if (priv->representor) {
1554                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1555                 eth_dev->data->representor_id = priv->representor_id;
1556         }
1557         eth_dev->data->dev_private = priv;
1558         priv->dev_data = eth_dev->data;
1559         eth_dev->data->mac_addrs = priv->mac;
1560         eth_dev->device = dpdk_dev;
1561         /* Configure the first MAC address by default. */
1562         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1563                 DRV_LOG(ERR,
1564                         "port %u cannot get MAC address, is mlx5_en"
1565                         " loaded? (errno: %s)",
1566                         eth_dev->data->port_id, strerror(rte_errno));
1567                 err = ENODEV;
1568                 goto error;
1569         }
1570         DRV_LOG(INFO,
1571                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1572                 eth_dev->data->port_id,
1573                 mac.addr_bytes[0], mac.addr_bytes[1],
1574                 mac.addr_bytes[2], mac.addr_bytes[3],
1575                 mac.addr_bytes[4], mac.addr_bytes[5]);
1576 #ifndef NDEBUG
1577         {
1578                 char ifname[IF_NAMESIZE];
1579
1580                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1581                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1582                                 eth_dev->data->port_id, ifname);
1583                 else
1584                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1585                                 eth_dev->data->port_id);
1586         }
1587 #endif
1588         /* Get actual MTU if possible. */
1589         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1590         if (err) {
1591                 err = rte_errno;
1592                 goto error;
1593         }
1594         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1595                 priv->mtu);
1596         /* Initialize burst functions to prevent crashes before link-up. */
1597         eth_dev->rx_pkt_burst = removed_rx_burst;
1598         eth_dev->tx_pkt_burst = removed_tx_burst;
1599         eth_dev->dev_ops = &mlx5_dev_ops;
1600         /* Register MAC address. */
1601         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1602         if (config.vf && config.vf_nl_en)
1603                 mlx5_nl_mac_addr_sync(eth_dev);
1604         TAILQ_INIT(&priv->flows);
1605         TAILQ_INIT(&priv->ctrl_flows);
1606         /* Hint libmlx5 to use PMD allocator for data plane resources */
1607         struct mlx5dv_ctx_allocators alctr = {
1608                 .alloc = &mlx5_alloc_verbs_buf,
1609                 .free = &mlx5_free_verbs_buf,
1610                 .data = priv,
1611         };
1612         mlx5_glue->dv_set_context_attr(sh->ctx,
1613                                        MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1614                                        (void *)((uintptr_t)&alctr));
1615         /* Bring Ethernet device up. */
1616         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1617                 eth_dev->data->port_id);
1618         mlx5_set_link_up(eth_dev);
1619         /*
1620          * Even though the interrupt handler is not installed yet,
1621          * interrupts will still trigger on the async_fd from
1622          * Verbs context returned by ibv_open_device().
1623          */
1624         mlx5_link_update(eth_dev, 0);
1625 #ifdef HAVE_IBV_DEVX_OBJ
1626         if (config.devx) {
1627                 priv->counter_fallback = 0;
1628                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
1629                 if (err) {
1630                         err = -err;
1631                         goto error;
1632                 }
1633                 if (!config.hca_attr.flow_counters_dump)
1634                         priv->counter_fallback = 1;
1635 #ifndef HAVE_IBV_DEVX_ASYNC
1636                 priv->counter_fallback = 1;
1637 #endif
1638                 if (priv->counter_fallback)
1639                         DRV_LOG(INFO, "Use fall-back DV counter management\n");
1640         }
1641 #endif
1642 #ifdef HAVE_MLX5DV_DR_ESWITCH
1643         if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
1644               (switch_info->representor || switch_info->master)))
1645                 config.dv_esw_en = 0;
1646 #else
1647         config.dv_esw_en = 0;
1648 #endif
1649         /* Store device configuration on private structure. */
1650         priv->config = config;
1651         if (config.dv_flow_en) {
1652                 err = mlx5_alloc_shared_dr(priv);
1653                 if (err)
1654                         goto error;
1655         }
1656         /* Supported Verbs flow priority number detection. */
1657         err = mlx5_flow_discover_priorities(eth_dev);
1658         if (err < 0) {
1659                 err = -err;
1660                 goto error;
1661         }
1662         priv->config.flow_prio = err;
1663         /* Add device to memory callback list. */
1664         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
1665         LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
1666                          sh, mem_event_cb);
1667         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
1668         return eth_dev;
1669 error:
1670         if (priv) {
1671                 if (priv->sh)
1672                         mlx5_free_shared_dr(priv);
1673                 if (priv->nl_socket_route >= 0)
1674                         close(priv->nl_socket_route);
1675                 if (priv->nl_socket_rdma >= 0)
1676                         close(priv->nl_socket_rdma);
1677                 if (own_domain_id)
1678                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1679                 rte_free(priv);
1680                 if (eth_dev != NULL)
1681                         eth_dev->data->dev_private = NULL;
1682         }
1683         if (eth_dev != NULL) {
1684                 /* mac_addrs must not be freed alone because part of dev_private */
1685                 eth_dev->data->mac_addrs = NULL;
1686                 rte_eth_dev_release_port(eth_dev);
1687         }
1688         if (sh)
1689                 mlx5_free_shared_ibctx(sh);
1690         assert(err > 0);
1691         rte_errno = err;
1692         return NULL;
1693 }
1694
1695 /**
1696  * Comparison callback to sort device data.
1697  *
1698  * This is meant to be used with qsort().
1699  *
1700  * @param a[in]
1701  *   Pointer to pointer to first data object.
1702  * @param b[in]
1703  *   Pointer to pointer to second data object.
1704  *
1705  * @return
1706  *   0 if both objects are equal, less than 0 if the first argument is less
1707  *   than the second, greater than 0 otherwise.
1708  */
1709 static int
1710 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1711 {
1712         const struct mlx5_switch_info *si_a =
1713                 &((const struct mlx5_dev_spawn_data *)a)->info;
1714         const struct mlx5_switch_info *si_b =
1715                 &((const struct mlx5_dev_spawn_data *)b)->info;
1716         int ret;
1717
1718         /* Master device first. */
1719         ret = si_b->master - si_a->master;
1720         if (ret)
1721                 return ret;
1722         /* Then representor devices. */
1723         ret = si_b->representor - si_a->representor;
1724         if (ret)
1725                 return ret;
1726         /* Unidentified devices come last in no specific order. */
1727         if (!si_a->representor)
1728                 return 0;
1729         /* Order representors by name. */
1730         return si_a->port_name - si_b->port_name;
1731 }
1732
1733 /**
1734  * DPDK callback to register a PCI device.
1735  *
1736  * This function spawns Ethernet devices out of a given PCI device.
1737  *
1738  * @param[in] pci_drv
1739  *   PCI driver structure (mlx5_driver).
1740  * @param[in] pci_dev
1741  *   PCI device information.
1742  *
1743  * @return
1744  *   0 on success, a negative errno value otherwise and rte_errno is set.
1745  */
1746 static int
1747 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1748                struct rte_pci_device *pci_dev)
1749 {
1750         struct ibv_device **ibv_list;
1751         /*
1752          * Number of found IB Devices matching with requested PCI BDF.
1753          * nd != 1 means there are multiple IB devices over the same
1754          * PCI device and we have representors and master.
1755          */
1756         unsigned int nd = 0;
1757         /*
1758          * Number of found IB device Ports. nd = 1 and np = 1..n means
1759          * we have the single multiport IB device, and there may be
1760          * representors attached to some of found ports.
1761          */
1762         unsigned int np = 0;
1763         /*
1764          * Number of DPDK ethernet devices to Spawn - either over
1765          * multiple IB devices or multiple ports of single IB device.
1766          * Actually this is the number of iterations to spawn.
1767          */
1768         unsigned int ns = 0;
1769         struct mlx5_dev_config dev_config;
1770         int ret;
1771
1772         ret = mlx5_init_once();
1773         if (ret) {
1774                 DRV_LOG(ERR, "unable to init PMD global data: %s",
1775                         strerror(rte_errno));
1776                 return -rte_errno;
1777         }
1778         assert(pci_drv == &mlx5_driver);
1779         errno = 0;
1780         ibv_list = mlx5_glue->get_device_list(&ret);
1781         if (!ibv_list) {
1782                 rte_errno = errno ? errno : ENOSYS;
1783                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1784                 return -rte_errno;
1785         }
1786         /*
1787          * First scan the list of all Infiniband devices to find
1788          * matching ones, gathering into the list.
1789          */
1790         struct ibv_device *ibv_match[ret + 1];
1791         int nl_route = -1;
1792         int nl_rdma = -1;
1793         unsigned int i;
1794
1795         while (ret-- > 0) {
1796                 struct rte_pci_addr pci_addr;
1797
1798                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1799                 if (mlx5_ibv_device_to_pci_addr(ibv_list[ret], &pci_addr))
1800                         continue;
1801                 if (pci_dev->addr.domain != pci_addr.domain ||
1802                     pci_dev->addr.bus != pci_addr.bus ||
1803                     pci_dev->addr.devid != pci_addr.devid ||
1804                     pci_dev->addr.function != pci_addr.function)
1805                         continue;
1806                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1807                         ibv_list[ret]->name);
1808                 ibv_match[nd++] = ibv_list[ret];
1809         }
1810         ibv_match[nd] = NULL;
1811         if (!nd) {
1812                 /* No device matches, just complain and bail out. */
1813                 mlx5_glue->free_device_list(ibv_list);
1814                 DRV_LOG(WARNING,
1815                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
1816                         " are kernel drivers loaded?",
1817                         pci_dev->addr.domain, pci_dev->addr.bus,
1818                         pci_dev->addr.devid, pci_dev->addr.function);
1819                 rte_errno = ENOENT;
1820                 ret = -rte_errno;
1821                 return ret;
1822         }
1823         nl_route = mlx5_nl_init(NETLINK_ROUTE);
1824         nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1825         if (nd == 1) {
1826                 /*
1827                  * Found single matching device may have multiple ports.
1828                  * Each port may be representor, we have to check the port
1829                  * number and check the representors existence.
1830                  */
1831                 if (nl_rdma >= 0)
1832                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1833                 if (!np)
1834                         DRV_LOG(WARNING, "can not get IB device \"%s\""
1835                                          " ports number", ibv_match[0]->name);
1836         }
1837         /*
1838          * Now we can determine the maximal
1839          * amount of devices to be spawned.
1840          */
1841         struct mlx5_dev_spawn_data list[np ? np : nd];
1842
1843         if (np > 1) {
1844                 /*
1845                  * Single IB device with multiple ports found,
1846                  * it may be E-Switch master device and representors.
1847                  * We have to perform identification trough the ports.
1848                  */
1849                 assert(nl_rdma >= 0);
1850                 assert(ns == 0);
1851                 assert(nd == 1);
1852                 for (i = 1; i <= np; ++i) {
1853                         list[ns].max_port = np;
1854                         list[ns].ibv_port = i;
1855                         list[ns].ibv_dev = ibv_match[0];
1856                         list[ns].eth_dev = NULL;
1857                         list[ns].pci_dev = pci_dev;
1858                         list[ns].ifindex = mlx5_nl_ifindex
1859                                         (nl_rdma, list[ns].ibv_dev->name, i);
1860                         if (!list[ns].ifindex) {
1861                                 /*
1862                                  * No network interface index found for the
1863                                  * specified port, it means there is no
1864                                  * representor on this port. It's OK,
1865                                  * there can be disabled ports, for example
1866                                  * if sriov_numvfs < sriov_totalvfs.
1867                                  */
1868                                 continue;
1869                         }
1870                         ret = -1;
1871                         if (nl_route >= 0)
1872                                 ret = mlx5_nl_switch_info
1873                                                (nl_route,
1874                                                 list[ns].ifindex,
1875                                                 &list[ns].info);
1876                         if (ret || (!list[ns].info.representor &&
1877                                     !list[ns].info.master)) {
1878                                 /*
1879                                  * We failed to recognize representors with
1880                                  * Netlink, let's try to perform the task
1881                                  * with sysfs.
1882                                  */
1883                                 ret =  mlx5_sysfs_switch_info
1884                                                 (list[ns].ifindex,
1885                                                  &list[ns].info);
1886                         }
1887                         if (!ret && (list[ns].info.representor ^
1888                                      list[ns].info.master))
1889                                 ns++;
1890                 }
1891                 if (!ns) {
1892                         DRV_LOG(ERR,
1893                                 "unable to recognize master/representors"
1894                                 " on the IB device with multiple ports");
1895                         rte_errno = ENOENT;
1896                         ret = -rte_errno;
1897                         goto exit;
1898                 }
1899         } else {
1900                 /*
1901                  * The existence of several matching entries (nd > 1) means
1902                  * port representors have been instantiated. No existing Verbs
1903                  * call nor sysfs entries can tell them apart, this can only
1904                  * be done through Netlink calls assuming kernel drivers are
1905                  * recent enough to support them.
1906                  *
1907                  * In the event of identification failure through Netlink,
1908                  * try again through sysfs, then:
1909                  *
1910                  * 1. A single IB device matches (nd == 1) with single
1911                  *    port (np=0/1) and is not a representor, assume
1912                  *    no switch support.
1913                  *
1914                  * 2. Otherwise no safe assumptions can be made;
1915                  *    complain louder and bail out.
1916                  */
1917                 np = 1;
1918                 for (i = 0; i != nd; ++i) {
1919                         memset(&list[ns].info, 0, sizeof(list[ns].info));
1920                         list[ns].max_port = 1;
1921                         list[ns].ibv_port = 1;
1922                         list[ns].ibv_dev = ibv_match[i];
1923                         list[ns].eth_dev = NULL;
1924                         list[ns].pci_dev = pci_dev;
1925                         list[ns].ifindex = 0;
1926                         if (nl_rdma >= 0)
1927                                 list[ns].ifindex = mlx5_nl_ifindex
1928                                         (nl_rdma, list[ns].ibv_dev->name, 1);
1929                         if (!list[ns].ifindex) {
1930                                 char ifname[IF_NAMESIZE];
1931
1932                                 /*
1933                                  * Netlink failed, it may happen with old
1934                                  * ib_core kernel driver (before 4.16).
1935                                  * We can assume there is old driver because
1936                                  * here we are processing single ports IB
1937                                  * devices. Let's try sysfs to retrieve
1938                                  * the ifindex. The method works for
1939                                  * master device only.
1940                                  */
1941                                 if (nd > 1) {
1942                                         /*
1943                                          * Multiple devices found, assume
1944                                          * representors, can not distinguish
1945                                          * master/representor and retrieve
1946                                          * ifindex via sysfs.
1947                                          */
1948                                         continue;
1949                                 }
1950                                 ret = mlx5_get_master_ifname
1951                                         (ibv_match[i]->ibdev_path, &ifname);
1952                                 if (!ret)
1953                                         list[ns].ifindex =
1954                                                 if_nametoindex(ifname);
1955                                 if (!list[ns].ifindex) {
1956                                         /*
1957                                          * No network interface index found
1958                                          * for the specified device, it means
1959                                          * there it is neither representor
1960                                          * nor master.
1961                                          */
1962                                         continue;
1963                                 }
1964                         }
1965                         ret = -1;
1966                         if (nl_route >= 0)
1967                                 ret = mlx5_nl_switch_info
1968                                                (nl_route,
1969                                                 list[ns].ifindex,
1970                                                 &list[ns].info);
1971                         if (ret || (!list[ns].info.representor &&
1972                                     !list[ns].info.master)) {
1973                                 /*
1974                                  * We failed to recognize representors with
1975                                  * Netlink, let's try to perform the task
1976                                  * with sysfs.
1977                                  */
1978                                 ret =  mlx5_sysfs_switch_info
1979                                                 (list[ns].ifindex,
1980                                                  &list[ns].info);
1981                         }
1982                         if (!ret && (list[ns].info.representor ^
1983                                      list[ns].info.master)) {
1984                                 ns++;
1985                         } else if ((nd == 1) &&
1986                                    !list[ns].info.representor &&
1987                                    !list[ns].info.master) {
1988                                 /*
1989                                  * Single IB device with
1990                                  * one physical port and
1991                                  * attached network device.
1992                                  * May be SRIOV is not enabled
1993                                  * or there is no representors.
1994                                  */
1995                                 DRV_LOG(INFO, "no E-Switch support detected");
1996                                 ns++;
1997                                 break;
1998                         }
1999                 }
2000                 if (!ns) {
2001                         DRV_LOG(ERR,
2002                                 "unable to recognize master/representors"
2003                                 " on the multiple IB devices");
2004                         rte_errno = ENOENT;
2005                         ret = -rte_errno;
2006                         goto exit;
2007                 }
2008         }
2009         assert(ns);
2010         /*
2011          * Sort list to probe devices in natural order for users convenience
2012          * (i.e. master first, then representors from lowest to highest ID).
2013          */
2014         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2015         /* Default configuration. */
2016         dev_config = (struct mlx5_dev_config){
2017                 .hw_padding = 0,
2018                 .mps = MLX5_ARG_UNSET,
2019                 .tx_vec_en = 1,
2020                 .rx_vec_en = 1,
2021                 .txq_inline = MLX5_ARG_UNSET,
2022                 .txqs_inline = MLX5_ARG_UNSET,
2023                 .txqs_vec = MLX5_ARG_UNSET,
2024                 .inline_max_packet_sz = MLX5_ARG_UNSET,
2025                 .vf_nl_en = 1,
2026                 .mr_ext_memseg_en = 1,
2027                 .mprq = {
2028                         .enabled = 0, /* Disabled by default. */
2029                         .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
2030                         .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
2031                         .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
2032                 },
2033                 .dv_esw_en = 1,
2034         };
2035         /* Device specific configuration. */
2036         switch (pci_dev->id.device_id) {
2037         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
2038                 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS_BLUEFIELD;
2039                 break;
2040         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2041         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2042         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2043         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2044                 dev_config.vf = 1;
2045                 break;
2046         default:
2047                 break;
2048         }
2049         /* Set architecture-dependent default value if unset. */
2050         if (dev_config.txqs_vec == MLX5_ARG_UNSET)
2051                 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS;
2052         for (i = 0; i != ns; ++i) {
2053                 uint32_t restore;
2054
2055                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2056                                                  &list[i],
2057                                                  dev_config);
2058                 if (!list[i].eth_dev) {
2059                         if (rte_errno != EBUSY && rte_errno != EEXIST)
2060                                 break;
2061                         /* Device is disabled or already spawned. Ignore it. */
2062                         continue;
2063                 }
2064                 restore = list[i].eth_dev->data->dev_flags;
2065                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2066                 /* Restore non-PCI flags cleared by the above call. */
2067                 list[i].eth_dev->data->dev_flags |= restore;
2068                 rte_eth_dev_probing_finish(list[i].eth_dev);
2069         }
2070         if (i != ns) {
2071                 DRV_LOG(ERR,
2072                         "probe of PCI device " PCI_PRI_FMT " aborted after"
2073                         " encountering an error: %s",
2074                         pci_dev->addr.domain, pci_dev->addr.bus,
2075                         pci_dev->addr.devid, pci_dev->addr.function,
2076                         strerror(rte_errno));
2077                 ret = -rte_errno;
2078                 /* Roll back. */
2079                 while (i--) {
2080                         if (!list[i].eth_dev)
2081                                 continue;
2082                         mlx5_dev_close(list[i].eth_dev);
2083                         /* mac_addrs must not be freed because in dev_private */
2084                         list[i].eth_dev->data->mac_addrs = NULL;
2085                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2086                 }
2087                 /* Restore original error. */
2088                 rte_errno = -ret;
2089         } else {
2090                 ret = 0;
2091         }
2092 exit:
2093         /*
2094          * Do the routine cleanup:
2095          * - close opened Netlink sockets
2096          * - free the Infiniband device list
2097          */
2098         if (nl_rdma >= 0)
2099                 close(nl_rdma);
2100         if (nl_route >= 0)
2101                 close(nl_route);
2102         assert(ibv_list);
2103         mlx5_glue->free_device_list(ibv_list);
2104         return ret;
2105 }
2106
2107 /**
2108  * DPDK callback to remove a PCI device.
2109  *
2110  * This function removes all Ethernet devices belong to a given PCI device.
2111  *
2112  * @param[in] pci_dev
2113  *   Pointer to the PCI device.
2114  *
2115  * @return
2116  *   0 on success, the function cannot fail.
2117  */
2118 static int
2119 mlx5_pci_remove(struct rte_pci_device *pci_dev)
2120 {
2121         uint16_t port_id;
2122
2123         RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
2124                 rte_eth_dev_close(port_id);
2125         return 0;
2126 }
2127
2128 static const struct rte_pci_id mlx5_pci_id_map[] = {
2129         {
2130                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2131                                PCI_DEVICE_ID_MELLANOX_CONNECTX4)
2132         },
2133         {
2134                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2135                                PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
2136         },
2137         {
2138                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2139                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
2140         },
2141         {
2142                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2143                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
2144         },
2145         {
2146                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2147                                PCI_DEVICE_ID_MELLANOX_CONNECTX5)
2148         },
2149         {
2150                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2151                                PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
2152         },
2153         {
2154                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2155                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
2156         },
2157         {
2158                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2159                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
2160         },
2161         {
2162                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2163                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
2164         },
2165         {
2166                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2167                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
2168         },
2169         {
2170                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2171                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
2172         },
2173         {
2174                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2175                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
2176         },
2177         {
2178                 .vendor_id = 0
2179         }
2180 };
2181
2182 static struct rte_pci_driver mlx5_driver = {
2183         .driver = {
2184                 .name = MLX5_DRIVER_NAME
2185         },
2186         .id_table = mlx5_pci_id_map,
2187         .probe = mlx5_pci_probe,
2188         .remove = mlx5_pci_remove,
2189         .dma_map = mlx5_dma_map,
2190         .dma_unmap = mlx5_dma_unmap,
2191         .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
2192                      RTE_PCI_DRV_PROBE_AGAIN,
2193 };
2194
2195 #ifdef RTE_IBVERBS_LINK_DLOPEN
2196
2197 /**
2198  * Suffix RTE_EAL_PMD_PATH with "-glue".
2199  *
2200  * This function performs a sanity check on RTE_EAL_PMD_PATH before
2201  * suffixing its last component.
2202  *
2203  * @param buf[out]
2204  *   Output buffer, should be large enough otherwise NULL is returned.
2205  * @param size
2206  *   Size of @p out.
2207  *
2208  * @return
2209  *   Pointer to @p buf or @p NULL in case suffix cannot be appended.
2210  */
2211 static char *
2212 mlx5_glue_path(char *buf, size_t size)
2213 {
2214         static const char *const bad[] = { "/", ".", "..", NULL };
2215         const char *path = RTE_EAL_PMD_PATH;
2216         size_t len = strlen(path);
2217         size_t off;
2218         int i;
2219
2220         while (len && path[len - 1] == '/')
2221                 --len;
2222         for (off = len; off && path[off - 1] != '/'; --off)
2223                 ;
2224         for (i = 0; bad[i]; ++i)
2225                 if (!strncmp(path + off, bad[i], (int)(len - off)))
2226                         goto error;
2227         i = snprintf(buf, size, "%.*s-glue", (int)len, path);
2228         if (i == -1 || (size_t)i >= size)
2229                 goto error;
2230         return buf;
2231 error:
2232         DRV_LOG(ERR,
2233                 "unable to append \"-glue\" to last component of"
2234                 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
2235                 " please re-configure DPDK");
2236         return NULL;
2237 }
2238
2239 /**
2240  * Initialization routine for run-time dependency on rdma-core.
2241  */
2242 static int
2243 mlx5_glue_init(void)
2244 {
2245         char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
2246         const char *path[] = {
2247                 /*
2248                  * A basic security check is necessary before trusting
2249                  * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
2250                  */
2251                 (geteuid() == getuid() && getegid() == getgid() ?
2252                  getenv("MLX5_GLUE_PATH") : NULL),
2253                 /*
2254                  * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
2255                  * variant, otherwise let dlopen() look up libraries on its
2256                  * own.
2257                  */
2258                 (*RTE_EAL_PMD_PATH ?
2259                  mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
2260         };
2261         unsigned int i = 0;
2262         void *handle = NULL;
2263         void **sym;
2264         const char *dlmsg;
2265
2266         while (!handle && i != RTE_DIM(path)) {
2267                 const char *end;
2268                 size_t len;
2269                 int ret;
2270
2271                 if (!path[i]) {
2272                         ++i;
2273                         continue;
2274                 }
2275                 end = strpbrk(path[i], ":;");
2276                 if (!end)
2277                         end = path[i] + strlen(path[i]);
2278                 len = end - path[i];
2279                 ret = 0;
2280                 do {
2281                         char name[ret + 1];
2282
2283                         ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
2284                                        (int)len, path[i],
2285                                        (!len || *(end - 1) == '/') ? "" : "/");
2286                         if (ret == -1)
2287                                 break;
2288                         if (sizeof(name) != (size_t)ret + 1)
2289                                 continue;
2290                         DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
2291                                 name);
2292                         handle = dlopen(name, RTLD_LAZY);
2293                         break;
2294                 } while (1);
2295                 path[i] = end + 1;
2296                 if (!*end)
2297                         ++i;
2298         }
2299         if (!handle) {
2300                 rte_errno = EINVAL;
2301                 dlmsg = dlerror();
2302                 if (dlmsg)
2303                         DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
2304                 goto glue_error;
2305         }
2306         sym = dlsym(handle, "mlx5_glue");
2307         if (!sym || !*sym) {
2308                 rte_errno = EINVAL;
2309                 dlmsg = dlerror();
2310                 if (dlmsg)
2311                         DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
2312                 goto glue_error;
2313         }
2314         mlx5_glue = *sym;
2315         return 0;
2316 glue_error:
2317         if (handle)
2318                 dlclose(handle);
2319         DRV_LOG(WARNING,
2320                 "cannot initialize PMD due to missing run-time dependency on"
2321                 " rdma-core libraries (libibverbs, libmlx5)");
2322         return -rte_errno;
2323 }
2324
2325 #endif
2326
2327 /**
2328  * Driver initialization routine.
2329  */
2330 RTE_INIT(rte_mlx5_pmd_init)
2331 {
2332         /* Initialize driver log type. */
2333         mlx5_logtype = rte_log_register("pmd.net.mlx5");
2334         if (mlx5_logtype >= 0)
2335                 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
2336
2337         /* Build the static tables for Verbs conversion. */
2338         mlx5_set_ptype_table();
2339         mlx5_set_cksum_table();
2340         mlx5_set_swp_types_table();
2341         /*
2342          * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
2343          * huge pages. Calling ibv_fork_init() during init allows
2344          * applications to use fork() safely for purposes other than
2345          * using this PMD, which is not supported in forked processes.
2346          */
2347         setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
2348         /* Match the size of Rx completion entry to the size of a cacheline. */
2349         if (RTE_CACHE_LINE_SIZE == 128)
2350                 setenv("MLX5_CQE_SIZE", "128", 0);
2351         /*
2352          * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
2353          * cleanup all the Verbs resources even when the device was removed.
2354          */
2355         setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
2356 #ifdef RTE_IBVERBS_LINK_DLOPEN
2357         if (mlx5_glue_init())
2358                 return;
2359         assert(mlx5_glue);
2360 #endif
2361 #ifndef NDEBUG
2362         /* Glue structure must not contain any NULL pointers. */
2363         {
2364                 unsigned int i;
2365
2366                 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
2367                         assert(((const void *const *)mlx5_glue)[i]);
2368         }
2369 #endif
2370         if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
2371                 DRV_LOG(ERR,
2372                         "rdma-core glue \"%s\" mismatch: \"%s\" is required",
2373                         mlx5_glue->version, MLX5_GLUE_VERSION);
2374                 return;
2375         }
2376         mlx5_glue->fork_init();
2377         rte_pci_register(&mlx5_driver);
2378 }
2379
2380 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
2381 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
2382 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");