drivers/net/mlx5/mlx5.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2015 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <assert.h>
  10 #include <dlfcn.h>
  11 #include <stdint.h>
  12 #include <stdlib.h>
  13 #include <errno.h>
  14 #include <net/if.h>
  15 #include <sys/mman.h>
  16 #include <linux/rtnetlink.h>
  17
  18 /* Verbs header. */
  19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  20 #ifdef PEDANTIC
  21 #pragma GCC diagnostic ignored "-Wpedantic"
  22 #endif
  23 #include <infiniband/verbs.h>
  24 #ifdef PEDANTIC
  25 #pragma GCC diagnostic error "-Wpedantic"
  26 #endif
  27
  28 #include <rte_malloc.h>
  29 #include <rte_ethdev_driver.h>
  30 #include <rte_ethdev_pci.h>
  31 #include <rte_pci.h>
  32 #include <rte_bus_pci.h>
  33 #include <rte_common.h>
  34 #include <rte_config.h>
  35 #include <rte_eal_memconfig.h>
  36 #include <rte_kvargs.h>
  37 #include <rte_rwlock.h>
  38 #include <rte_spinlock.h>
  39 #include <rte_string_fns.h>
  40
  41 #include "mlx5.h"
  42 #include "mlx5_utils.h"
  43 #include "mlx5_rxtx.h"
  44 #include "mlx5_autoconf.h"
  45 #include "mlx5_defs.h"
  46 #include "mlx5_glue.h"
  47 #include "mlx5_mr.h"
  48 #include "mlx5_flow.h"
  49
  50 /* Device parameter to enable RX completion queue compression. */
  51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
  52
  53 /* Device parameter to enable RX completion entry padding to 128B. */
  54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
  55
  56 /* Device parameter to enable padding Rx packet to cacheline size. */
  57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
  58
  59 /* Device parameter to enable Multi-Packet Rx queue. */
  60 #define MLX5_RX_MPRQ_EN "mprq_en"
  61
  62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
  63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
  64
  65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
  66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
  67
  68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
  69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
  70
  71 /* Device parameter to configure inline send. */
  72 #define MLX5_TXQ_INLINE "txq_inline"
  73
  74 /*
  75  * Device parameter to configure the number of TX queues threshold for
  76  * enabling inline send.
  77  */
  78 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
  79
  80 /*
  81  * Device parameter to configure the number of TX queues threshold for
  82  * enabling vectorized Tx.
  83  */
  84 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
  85
  86 /* Device parameter to enable multi-packet send WQEs. */
  87 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
  88
  89 /* Device parameter to include 2 dsegs in the title WQEBB. */
  90 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
  91
  92 /* Device parameter to limit the size of inlining packet. */
  93 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
  94
  95 /* Device parameter to enable hardware Tx vector. */
  96 #define MLX5_TX_VEC_EN "tx_vec_en"
  97
  98 /* Device parameter to enable hardware Rx vector. */
  99 #define MLX5_RX_VEC_EN "rx_vec_en"
 100
 101 /* Allow L3 VXLAN flow creation. */
 102 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
 103
 104 /* Activate DV E-Switch flow steering. */
 105 #define MLX5_DV_ESW_EN "dv_esw_en"
 106
 107 /* Activate DV flow steering. */
 108 #define MLX5_DV_FLOW_EN "dv_flow_en"
 109
 110 /* Activate Netlink support in VF mode. */
 111 #define MLX5_VF_NL_EN "vf_nl_en"
 112
 113 /* Enable extending memsegs when creating a MR. */
 114 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
 115
 116 /* Select port representors to instantiate. */
 117 #define MLX5_REPRESENTOR "representor"
 118
 119 #ifndef HAVE_IBV_MLX5_MOD_MPW
 120 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
 121 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
 122 #endif
 123
 124 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
 125 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
 126 #endif
 127
 128 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
 129
 130 /* Shared memory between primary and secondary processes. */
 131 struct mlx5_shared_data *mlx5_shared_data;
 132
 133 /* Spinlock for mlx5_shared_data allocation. */
 134 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
 135
 136 /* Process local data for secondary processes. */
 137 static struct mlx5_local_data mlx5_local_data;
 138
 139 /** Driver-specific log messages type. */
 140 int mlx5_logtype;
 141
 142 /** Data associated with devices to spawn. */
 143 struct mlx5_dev_spawn_data {
 144         uint32_t ifindex; /**< Network interface index. */
 145         uint32_t max_port; /**< IB device maximal port index. */
 146         uint32_t ibv_port; /**< IB device physical port index. */
 147         struct mlx5_switch_info info; /**< Switch information. */
 148         struct ibv_device *ibv_dev; /**< Associated IB device. */
 149         struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
 150         struct rte_pci_device *pci_dev; /**< Backend PCI device. */
 151 };
 152
 153 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
 154 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
 155
 156 /**
 157  * Allocate shared IB device context. If there is multiport device the
 158  * master and representors will share this context, if there is single
 159  * port dedicated IB device, the context will be used by only given
 160  * port due to unification.
 161  *
 162  * Routine first searches the context for the specified IB device name,
 163  * if found the shared context assumed and reference counter is incremented.
 164  * If no context found the new one is created and initialized with specified
 165  * IB device context and parameters.
 166  *
 167  * @param[in] spawn
 168  *   Pointer to the IB device attributes (name, port, etc).
 169  *
 170  * @return
 171  *   Pointer to mlx5_ibv_shared object on success,
 172  *   otherwise NULL and rte_errno is set.
 173  */
 174 static struct mlx5_ibv_shared *
 175 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
 176 {
 177         struct mlx5_ibv_shared *sh;
 178         int err = 0;
 179         uint32_t i;
 180
 181         assert(spawn);
 182         /* Secondary process should not create the shared context. */
 183         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 184         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 185         /* Search for IB context by device name. */
 186         LIST_FOREACH(sh, &mlx5_ibv_list, next) {
 187                 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
 188                         sh->refcnt++;
 189                         goto exit;
 190                 }
 191         }
 192         /* No device found, we have to create new shared context. */
 193         assert(spawn->max_port);
 194         sh = rte_zmalloc("ethdev shared ib context",
 195                          sizeof(struct mlx5_ibv_shared) +
 196                          spawn->max_port *
 197                          sizeof(struct mlx5_ibv_shared_port),
 198                          RTE_CACHE_LINE_SIZE);
 199         if (!sh) {
 200                 DRV_LOG(ERR, "shared context allocation failure");
 201                 rte_errno  = ENOMEM;
 202                 goto exit;
 203         }
 204         /* Try to open IB device with DV first, then usual Verbs. */
 205         errno = 0;
 206         sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
 207         if (sh->ctx) {
 208                 sh->devx = 1;
 209                 DRV_LOG(DEBUG, "DevX is supported");
 210         } else {
 211                 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
 212                 if (!sh->ctx) {
 213                         err = errno ? errno : ENODEV;
 214                         goto error;
 215                 }
 216                 DRV_LOG(DEBUG, "DevX is NOT supported");
 217         }
 218         err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
 219         if (err) {
 220                 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
 221                 goto error;
 222         }
 223         sh->refcnt = 1;
 224         sh->max_port = spawn->max_port;
 225         strncpy(sh->ibdev_name, sh->ctx->device->name,
 226                 sizeof(sh->ibdev_name));
 227         strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
 228                 sizeof(sh->ibdev_path));
 229         sh->pci_dev = spawn->pci_dev;
 230         pthread_mutex_init(&sh->intr_mutex, NULL);
 231         /*
 232          * Setting port_id to max unallowed value means
 233          * there is no interrupt subhandler installed for
 234          * the given port index i.
 235          */
 236         for (i = 0; i < sh->max_port; i++)
 237                 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
 238         sh->pd = mlx5_glue->alloc_pd(sh->ctx);
 239         if (sh->pd == NULL) {
 240                 DRV_LOG(ERR, "PD allocation failure");
 241                 err = ENOMEM;
 242                 goto error;
 243         }
 244         /*
 245          * Once the device is added to the list of memory event
 246          * callback, its global MR cache table cannot be expanded
 247          * on the fly because of deadlock. If it overflows, lookup
 248          * should be done by searching MR list linearly, which is slow.
 249          *
 250          * At this point the device is not added to the memory
 251          * event list yet, context is just being created.
 252          */
 253         err = mlx5_mr_btree_init(&sh->mr.cache,
 254                                  MLX5_MR_BTREE_CACHE_N * 2,
 255                                  sh->pci_dev->device.numa_node);
 256         if (err) {
 257                 err = rte_errno;
 258                 goto error;
 259         }
 260         LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
 261 exit:
 262         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 263         return sh;
 264 error:
 265         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 266         assert(sh);
 267         if (sh->pd)
 268                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 269         if (sh->ctx)
 270                 claim_zero(mlx5_glue->close_device(sh->ctx));
 271         rte_free(sh);
 272         assert(err > 0);
 273         rte_errno = err;
 274         return NULL;
 275 }
 276
 277 /**
 278  * Free shared IB device context. Decrement counter and if zero free
 279  * all allocated resources and close handles.
 280  *
 281  * @param[in] sh
 282  *   Pointer to mlx5_ibv_shared object to free
 283  */
 284 static void
 285 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
 286 {
 287         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 288 #ifndef NDEBUG
 289         /* Check the object presence in the list. */
 290         struct mlx5_ibv_shared *lctx;
 291
 292         LIST_FOREACH(lctx, &mlx5_ibv_list, next)
 293                 if (lctx == sh)
 294                         break;
 295         assert(lctx);
 296         if (lctx != sh) {
 297                 DRV_LOG(ERR, "Freeing non-existing shared IB context");
 298                 goto exit;
 299         }
 300 #endif
 301         assert(sh);
 302         assert(sh->refcnt);
 303         /* Secondary process should not free the shared context. */
 304         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 305         if (--sh->refcnt)
 306                 goto exit;
 307         /* Release created Memory Regions. */
 308         mlx5_mr_release(sh);
 309         LIST_REMOVE(sh, next);
 310         /*
 311          *  Ensure there is no async event handler installed.
 312          *  Only primary process handles async device events.
 313          **/
 314         assert(!sh->intr_cnt);
 315         if (sh->intr_cnt)
 316                 mlx5_intr_callback_unregister
 317                         (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
 318         pthread_mutex_destroy(&sh->intr_mutex);
 319         if (sh->pd)
 320                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 321         if (sh->ctx)
 322                 claim_zero(mlx5_glue->close_device(sh->ctx));
 323         rte_free(sh);
 324 exit:
 325         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 326 }
 327
 328 /**
 329  * Initialize DR related data within private structure.
 330  * Routine checks the reference counter and does actual
 331  * resources creation/initialization only if counter is zero.
 332  *
 333  * @param[in] priv
 334  *   Pointer to the private device data structure.
 335  *
 336  * @return
 337  *   Zero on success, positive error code otherwise.
 338  */
 339 static int
 340 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 341 {
 342 #ifdef HAVE_MLX5DV_DR
 343         struct mlx5_ibv_shared *sh = priv->sh;
 344         int err = 0;
 345         void *domain;
 346
 347         assert(sh);
 348         if (sh->dv_refcnt) {
 349                 /* Shared DV/DR structures is already initialized. */
 350                 sh->dv_refcnt++;
 351                 priv->dr_shared = 1;
 352                 return 0;
 353         }
 354         /* Reference counter is zero, we should initialize structures. */
 355         domain = mlx5_glue->dr_create_domain(sh->ctx,
 356                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 357         if (!domain) {
 358                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 359                 err = errno;
 360                 goto error;
 361         }
 362         sh->rx_domain = domain;
 363         domain = mlx5_glue->dr_create_domain(sh->ctx,
 364                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 365         if (!domain) {
 366                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 367                 err = errno;
 368                 goto error;
 369         }
 370         pthread_mutex_init(&sh->dv_mutex, NULL);
 371         sh->tx_domain = domain;
 372 #ifdef HAVE_MLX5DV_DR_ESWITCH
 373         if (priv->config.dv_esw_en) {
 374                 domain  = mlx5_glue->dr_create_domain
 375                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 376                 if (!domain) {
 377                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 378                         err = errno;
 379                         goto error;
 380                 }
 381                 sh->fdb_domain = domain;
 382                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 383         }
 384 #endif
 385         sh->dv_refcnt++;
 386         priv->dr_shared = 1;
 387         return 0;
 388
 389 error:
 390        /* Rollback the created objects. */
 391         if (sh->rx_domain) {
 392                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 393                 sh->rx_domain = NULL;
 394         }
 395         if (sh->tx_domain) {
 396                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 397                 sh->tx_domain = NULL;
 398         }
 399         if (sh->fdb_domain) {
 400                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 401                 sh->fdb_domain = NULL;
 402         }
 403         if (sh->esw_drop_action) {
 404                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 405                 sh->esw_drop_action = NULL;
 406         }
 407         return err;
 408 #else
 409         (void)priv;
 410         return 0;
 411 #endif
 412 }
 413
 414 /**
 415  * Destroy DR related data within private structure.
 416  *
 417  * @param[in] priv
 418  *   Pointer to the private device data structure.
 419  */
 420 static void
 421 mlx5_free_shared_dr(struct mlx5_priv *priv)
 422 {
 423 #ifdef HAVE_MLX5DV_DR
 424         struct mlx5_ibv_shared *sh;
 425
 426         if (!priv->dr_shared)
 427                 return;
 428         priv->dr_shared = 0;
 429         sh = priv->sh;
 430         assert(sh);
 431         assert(sh->dv_refcnt);
 432         if (sh->dv_refcnt && --sh->dv_refcnt)
 433                 return;
 434         if (sh->rx_domain) {
 435                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 436                 sh->rx_domain = NULL;
 437         }
 438         if (sh->tx_domain) {
 439                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 440                 sh->tx_domain = NULL;
 441         }
 442 #ifdef HAVE_MLX5DV_DR_ESWITCH
 443         if (sh->fdb_domain) {
 444                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 445                 sh->fdb_domain = NULL;
 446         }
 447         if (sh->esw_drop_action) {
 448                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 449                 sh->esw_drop_action = NULL;
 450         }
 451 #endif
 452         pthread_mutex_destroy(&sh->dv_mutex);
 453 #else
 454         (void)priv;
 455 #endif
 456 }
 457
 458 /**
 459  * Initialize shared data between primary and secondary process.
 460  *
 461  * A memzone is reserved by primary process and secondary processes attach to
 462  * the memzone.
 463  *
 464  * @return
 465  *   0 on success, a negative errno value otherwise and rte_errno is set.
 466  */
 467 static int
 468 mlx5_init_shared_data(void)
 469 {
 470         const struct rte_memzone *mz;
 471         int ret = 0;
 472
 473         rte_spinlock_lock(&mlx5_shared_data_lock);
 474         if (mlx5_shared_data == NULL) {
 475                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 476                         /* Allocate shared memory. */
 477                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
 478                                                  sizeof(*mlx5_shared_data),
 479                                                  SOCKET_ID_ANY, 0);
 480                         if (mz == NULL) {
 481                                 DRV_LOG(ERR,
 482                                         "Cannot allocate mlx5 shared data\n");
 483                                 ret = -rte_errno;
 484                                 goto error;
 485                         }
 486                         mlx5_shared_data = mz->addr;
 487                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
 488                         rte_spinlock_init(&mlx5_shared_data->lock);
 489                 } else {
 490                         /* Lookup allocated shared memory. */
 491                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
 492                         if (mz == NULL) {
 493                                 DRV_LOG(ERR,
 494                                         "Cannot attach mlx5 shared data\n");
 495                                 ret = -rte_errno;
 496                                 goto error;
 497                         }
 498                         mlx5_shared_data = mz->addr;
 499                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
 500                 }
 501         }
 502 error:
 503         rte_spinlock_unlock(&mlx5_shared_data_lock);
 504         return ret;
 505 }
 506
 507 /**
 508  * Retrieve integer value from environment variable.
 509  *
 510  * @param[in] name
 511  *   Environment variable name.
 512  *
 513  * @return
 514  *   Integer value, 0 if the variable is not set.
 515  */
 516 int
 517 mlx5_getenv_int(const char *name)
 518 {
 519         const char *val = getenv(name);
 520
 521         if (val == NULL)
 522                 return 0;
 523         return atoi(val);
 524 }
 525
 526 /**
 527  * Verbs callback to allocate a memory. This function should allocate the space
 528  * according to the size provided residing inside a huge page.
 529  * Please note that all allocation must respect the alignment from libmlx5
 530  * (i.e. currently sysconf(_SC_PAGESIZE)).
 531  *
 532  * @param[in] size
 533  *   The size in bytes of the memory to allocate.
 534  * @param[in] data
 535  *   A pointer to the callback data.
 536  *
 537  * @return
 538  *   Allocated buffer, NULL otherwise and rte_errno is set.
 539  */
 540 static void *
 541 mlx5_alloc_verbs_buf(size_t size, void *data)
 542 {
 543         struct mlx5_priv *priv = data;
 544         void *ret;
 545         size_t alignment = sysconf(_SC_PAGESIZE);
 546         unsigned int socket = SOCKET_ID_ANY;
 547
 548         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
 549                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 550
 551                 socket = ctrl->socket;
 552         } else if (priv->verbs_alloc_ctx.type ==
 553                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
 554                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
 555
 556                 socket = ctrl->socket;
 557         }
 558         assert(data != NULL);
 559         ret = rte_malloc_socket(__func__, size, alignment, socket);
 560         if (!ret && size)
 561                 rte_errno = ENOMEM;
 562         return ret;
 563 }
 564
 565 /**
 566  * Verbs callback to free a memory.
 567  *
 568  * @param[in] ptr
 569  *   A pointer to the memory to free.
 570  * @param[in] data
 571  *   A pointer to the callback data.
 572  */
 573 static void
 574 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
 575 {
 576         assert(data != NULL);
 577         rte_free(ptr);
 578 }
 579
 580 /**
 581  * Initialize process private data structure.
 582  *
 583  * @param dev
 584  *   Pointer to Ethernet device structure.
 585  *
 586  * @return
 587  *   0 on success, a negative errno value otherwise and rte_errno is set.
 588  */
 589 int
 590 mlx5_proc_priv_init(struct rte_eth_dev *dev)
 591 {
 592         struct mlx5_priv *priv = dev->data->dev_private;
 593         struct mlx5_proc_priv *ppriv;
 594         size_t ppriv_size;
 595
 596         /*
 597          * UAR register table follows the process private structure. BlueFlame
 598          * registers for Tx queues are stored in the table.
 599          */
 600         ppriv_size =
 601                 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
 602         ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
 603                                   RTE_CACHE_LINE_SIZE, dev->device->numa_node);
 604         if (!ppriv) {
 605                 rte_errno = ENOMEM;
 606                 return -rte_errno;
 607         }
 608         ppriv->uar_table_sz = ppriv_size;
 609         dev->process_private = ppriv;
 610         return 0;
 611 }
 612
 613 /**
 614  * Un-initialize process private data structure.
 615  *
 616  * @param dev
 617  *   Pointer to Ethernet device structure.
 618  */
 619 static void
 620 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
 621 {
 622         if (!dev->process_private)
 623                 return;
 624         rte_free(dev->process_private);
 625         dev->process_private = NULL;
 626 }
 627
 628 /**
 629  * DPDK callback to close the device.
 630  *
 631  * Destroy all queues and objects, free memory.
 632  *
 633  * @param dev
 634  *   Pointer to Ethernet device structure.
 635  */
 636 static void
 637 mlx5_dev_close(struct rte_eth_dev *dev)
 638 {
 639         struct mlx5_priv *priv = dev->data->dev_private;
 640         unsigned int i;
 641         int ret;
 642
 643         DRV_LOG(DEBUG, "port %u closing device \"%s\"",
 644                 dev->data->port_id,
 645                 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
 646         /* In case mlx5_dev_stop() has not been called. */
 647         mlx5_dev_interrupt_handler_uninstall(dev);
 648         mlx5_traffic_disable(dev);
 649         mlx5_flow_flush(dev, NULL);
 650         /* Prevent crashes when queues are still in use. */
 651         dev->rx_pkt_burst = removed_rx_burst;
 652         dev->tx_pkt_burst = removed_tx_burst;
 653         rte_wmb();
 654         /* Disable datapath on secondary process. */
 655         mlx5_mp_req_stop_rxtx(dev);
 656         if (priv->rxqs != NULL) {
 657                 /* XXX race condition if mlx5_rx_burst() is still running. */
 658                 usleep(1000);
 659                 for (i = 0; (i != priv->rxqs_n); ++i)
 660                         mlx5_rxq_release(dev, i);
 661                 priv->rxqs_n = 0;
 662                 priv->rxqs = NULL;
 663         }
 664         if (priv->txqs != NULL) {
 665                 /* XXX race condition if mlx5_tx_burst() is still running. */
 666                 usleep(1000);
 667                 for (i = 0; (i != priv->txqs_n); ++i)
 668                         mlx5_txq_release(dev, i);
 669                 priv->txqs_n = 0;
 670                 priv->txqs = NULL;
 671         }
 672         mlx5_proc_priv_uninit(dev);
 673         mlx5_mprq_free_mp(dev);
 674         /* Remove from memory callback device list. */
 675         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
 676         assert(priv->sh);
 677         LIST_REMOVE(priv->sh, mem_event_cb);
 678         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
 679         mlx5_free_shared_dr(priv);
 680         if (priv->rss_conf.rss_key != NULL)
 681                 rte_free(priv->rss_conf.rss_key);
 682         if (priv->reta_idx != NULL)
 683                 rte_free(priv->reta_idx);
 684         if (priv->config.vf)
 685                 mlx5_nl_mac_addr_flush(dev);
 686         if (priv->nl_socket_route >= 0)
 687                 close(priv->nl_socket_route);
 688         if (priv->nl_socket_rdma >= 0)
 689                 close(priv->nl_socket_rdma);
 690         if (priv->tcf_context)
 691                 mlx5_flow_tcf_context_destroy(priv->tcf_context);
 692         if (priv->sh) {
 693                 /*
 694                  * Free the shared context in last turn, because the cleanup
 695                  * routines above may use some shared fields, like
 696                  * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
 697                  * ifindex if Netlink fails.
 698                  */
 699                 mlx5_free_shared_ibctx(priv->sh);
 700                 priv->sh = NULL;
 701         }
 702         ret = mlx5_hrxq_ibv_verify(dev);
 703         if (ret)
 704                 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
 705                         dev->data->port_id);
 706         ret = mlx5_ind_table_ibv_verify(dev);
 707         if (ret)
 708                 DRV_LOG(WARNING, "port %u some indirection table still remain",
 709                         dev->data->port_id);
 710         ret = mlx5_rxq_ibv_verify(dev);
 711         if (ret)
 712                 DRV_LOG(WARNING, "port %u some Verbs Rx queue still remain",
 713                         dev->data->port_id);
 714         ret = mlx5_rxq_verify(dev);
 715         if (ret)
 716                 DRV_LOG(WARNING, "port %u some Rx queues still remain",
 717                         dev->data->port_id);
 718         ret = mlx5_txq_ibv_verify(dev);
 719         if (ret)
 720                 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
 721                         dev->data->port_id);
 722         ret = mlx5_txq_verify(dev);
 723         if (ret)
 724                 DRV_LOG(WARNING, "port %u some Tx queues still remain",
 725                         dev->data->port_id);
 726         ret = mlx5_flow_verify(dev);
 727         if (ret)
 728                 DRV_LOG(WARNING, "port %u some flows still remain",
 729                         dev->data->port_id);
 730         if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
 731                 unsigned int c = 0;
 732                 uint16_t port_id;
 733
 734                 RTE_ETH_FOREACH_DEV_OF(port_id, dev->device) {
 735                         struct mlx5_priv *opriv =
 736                                 rte_eth_devices[port_id].data->dev_private;
 737
 738                         if (!opriv ||
 739                             opriv->domain_id != priv->domain_id ||
 740                             &rte_eth_devices[port_id] == dev)
 741                                 continue;
 742                         ++c;
 743                 }
 744                 if (!c)
 745                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
 746         }
 747         memset(priv, 0, sizeof(*priv));
 748         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
 749         /*
 750          * Reset mac_addrs to NULL such that it is not freed as part of
 751          * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
 752          * it is freed when dev_private is freed.
 753          */
 754         dev->data->mac_addrs = NULL;
 755 }
 756
 757 const struct eth_dev_ops mlx5_dev_ops = {
 758         .dev_configure = mlx5_dev_configure,
 759         .dev_start = mlx5_dev_start,
 760         .dev_stop = mlx5_dev_stop,
 761         .dev_set_link_down = mlx5_set_link_down,
 762         .dev_set_link_up = mlx5_set_link_up,
 763         .dev_close = mlx5_dev_close,
 764         .promiscuous_enable = mlx5_promiscuous_enable,
 765         .promiscuous_disable = mlx5_promiscuous_disable,
 766         .allmulticast_enable = mlx5_allmulticast_enable,
 767         .allmulticast_disable = mlx5_allmulticast_disable,
 768         .link_update = mlx5_link_update,
 769         .stats_get = mlx5_stats_get,
 770         .stats_reset = mlx5_stats_reset,
 771         .xstats_get = mlx5_xstats_get,
 772         .xstats_reset = mlx5_xstats_reset,
 773         .xstats_get_names = mlx5_xstats_get_names,
 774         .fw_version_get = mlx5_fw_version_get,
 775         .dev_infos_get = mlx5_dev_infos_get,
 776         .read_clock = mlx5_read_clock,
 777         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
 778         .vlan_filter_set = mlx5_vlan_filter_set,
 779         .rx_queue_setup = mlx5_rx_queue_setup,
 780         .tx_queue_setup = mlx5_tx_queue_setup,
 781         .rx_queue_release = mlx5_rx_queue_release,
 782         .tx_queue_release = mlx5_tx_queue_release,
 783         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
 784         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
 785         .mac_addr_remove = mlx5_mac_addr_remove,
 786         .mac_addr_add = mlx5_mac_addr_add,
 787         .mac_addr_set = mlx5_mac_addr_set,
 788         .set_mc_addr_list = mlx5_set_mc_addr_list,
 789         .mtu_set = mlx5_dev_set_mtu,
 790         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
 791         .vlan_offload_set = mlx5_vlan_offload_set,
 792         .reta_update = mlx5_dev_rss_reta_update,
 793         .reta_query = mlx5_dev_rss_reta_query,
 794         .rss_hash_update = mlx5_rss_hash_update,
 795         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
 796         .filter_ctrl = mlx5_dev_filter_ctrl,
 797         .rx_descriptor_status = mlx5_rx_descriptor_status,
 798         .tx_descriptor_status = mlx5_tx_descriptor_status,
 799         .rx_queue_count = mlx5_rx_queue_count,
 800         .rx_queue_intr_enable = mlx5_rx_intr_enable,
 801         .rx_queue_intr_disable = mlx5_rx_intr_disable,
 802         .is_removed = mlx5_is_removed,
 803 };
 804
 805 /* Available operations from secondary process. */
 806 static const struct eth_dev_ops mlx5_dev_sec_ops = {
 807         .stats_get = mlx5_stats_get,
 808         .stats_reset = mlx5_stats_reset,
 809         .xstats_get = mlx5_xstats_get,
 810         .xstats_reset = mlx5_xstats_reset,
 811         .xstats_get_names = mlx5_xstats_get_names,
 812         .fw_version_get = mlx5_fw_version_get,
 813         .dev_infos_get = mlx5_dev_infos_get,
 814         .rx_descriptor_status = mlx5_rx_descriptor_status,
 815         .tx_descriptor_status = mlx5_tx_descriptor_status,
 816 };
 817
 818 /* Available operations in flow isolated mode. */
 819 const struct eth_dev_ops mlx5_dev_ops_isolate = {
 820         .dev_configure = mlx5_dev_configure,
 821         .dev_start = mlx5_dev_start,
 822         .dev_stop = mlx5_dev_stop,
 823         .dev_set_link_down = mlx5_set_link_down,
 824         .dev_set_link_up = mlx5_set_link_up,
 825         .dev_close = mlx5_dev_close,
 826         .promiscuous_enable = mlx5_promiscuous_enable,
 827         .promiscuous_disable = mlx5_promiscuous_disable,
 828         .allmulticast_enable = mlx5_allmulticast_enable,
 829         .allmulticast_disable = mlx5_allmulticast_disable,
 830         .link_update = mlx5_link_update,
 831         .stats_get = mlx5_stats_get,
 832         .stats_reset = mlx5_stats_reset,
 833         .xstats_get = mlx5_xstats_get,
 834         .xstats_reset = mlx5_xstats_reset,
 835         .xstats_get_names = mlx5_xstats_get_names,
 836         .fw_version_get = mlx5_fw_version_get,
 837         .dev_infos_get = mlx5_dev_infos_get,
 838         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
 839         .vlan_filter_set = mlx5_vlan_filter_set,
 840         .rx_queue_setup = mlx5_rx_queue_setup,
 841         .tx_queue_setup = mlx5_tx_queue_setup,
 842         .rx_queue_release = mlx5_rx_queue_release,
 843         .tx_queue_release = mlx5_tx_queue_release,
 844         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
 845         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
 846         .mac_addr_remove = mlx5_mac_addr_remove,
 847         .mac_addr_add = mlx5_mac_addr_add,
 848         .mac_addr_set = mlx5_mac_addr_set,
 849         .set_mc_addr_list = mlx5_set_mc_addr_list,
 850         .mtu_set = mlx5_dev_set_mtu,
 851         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
 852         .vlan_offload_set = mlx5_vlan_offload_set,
 853         .filter_ctrl = mlx5_dev_filter_ctrl,
 854         .rx_descriptor_status = mlx5_rx_descriptor_status,
 855         .tx_descriptor_status = mlx5_tx_descriptor_status,
 856         .rx_queue_intr_enable = mlx5_rx_intr_enable,
 857         .rx_queue_intr_disable = mlx5_rx_intr_disable,
 858         .is_removed = mlx5_is_removed,
 859 };
 860
 861 /**
 862  * Verify and store value for device argument.
 863  *
 864  * @param[in] key
 865  *   Key argument to verify.
 866  * @param[in] val
 867  *   Value associated with key.
 868  * @param opaque
 869  *   User data.
 870  *
 871  * @return
 872  *   0 on success, a negative errno value otherwise and rte_errno is set.
 873  */
 874 static int
 875 mlx5_args_check(const char *key, const char *val, void *opaque)
 876 {
 877         struct mlx5_dev_config *config = opaque;
 878         unsigned long tmp;
 879
 880         /* No-op, port representors are processed in mlx5_dev_spawn(). */
 881         if (!strcmp(MLX5_REPRESENTOR, key))
 882                 return 0;
 883         errno = 0;
 884         tmp = strtoul(val, NULL, 0);
 885         if (errno) {
 886                 rte_errno = errno;
 887                 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
 888                 return -rte_errno;
 889         }
 890         if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
 891                 config->cqe_comp = !!tmp;
 892         } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
 893                 config->cqe_pad = !!tmp;
 894         } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
 895                 config->hw_padding = !!tmp;
 896         } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
 897                 config->mprq.enabled = !!tmp;
 898         } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
 899                 config->mprq.stride_num_n = tmp;
 900         } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
 901                 config->mprq.max_memcpy_len = tmp;
 902         } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
 903                 config->mprq.min_rxqs_num = tmp;
 904         } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
 905                 config->txq_inline = tmp;
 906         } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
 907                 config->txqs_inline = tmp;
 908         } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
 909                 config->txqs_vec = tmp;
 910         } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
 911                 config->mps = !!tmp;
 912         } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
 913                 config->mpw_hdr_dseg = !!tmp;
 914         } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
 915                 config->inline_max_packet_sz = tmp;
 916         } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
 917                 config->tx_vec_en = !!tmp;
 918         } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
 919                 config->rx_vec_en = !!tmp;
 920         } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
 921                 config->l3_vxlan_en = !!tmp;
 922         } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
 923                 config->vf_nl_en = !!tmp;
 924         } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
 925                 config->dv_esw_en = !!tmp;
 926         } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
 927                 config->dv_flow_en = !!tmp;
 928         } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
 929                 config->mr_ext_memseg_en = !!tmp;
 930         } else {
 931                 DRV_LOG(WARNING, "%s: unknown parameter", key);
 932                 rte_errno = EINVAL;
 933                 return -rte_errno;
 934         }
 935         return 0;
 936 }
 937
 938 /**
 939  * Parse device parameters.
 940  *
 941  * @param config
 942  *   Pointer to device configuration structure.
 943  * @param devargs
 944  *   Device arguments structure.
 945  *
 946  * @return
 947  *   0 on success, a negative errno value otherwise and rte_errno is set.
 948  */
 949 static int
 950 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
 951 {
 952         const char **params = (const char *[]){
 953                 MLX5_RXQ_CQE_COMP_EN,
 954                 MLX5_RXQ_CQE_PAD_EN,
 955                 MLX5_RXQ_PKT_PAD_EN,
 956                 MLX5_RX_MPRQ_EN,
 957                 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
 958                 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
 959                 MLX5_RXQS_MIN_MPRQ,
 960                 MLX5_TXQ_INLINE,
 961                 MLX5_TXQS_MIN_INLINE,
 962                 MLX5_TXQS_MAX_VEC,
 963                 MLX5_TXQ_MPW_EN,
 964                 MLX5_TXQ_MPW_HDR_DSEG_EN,
 965                 MLX5_TXQ_MAX_INLINE_LEN,
 966                 MLX5_TX_VEC_EN,
 967                 MLX5_RX_VEC_EN,
 968                 MLX5_L3_VXLAN_EN,
 969                 MLX5_VF_NL_EN,
 970                 MLX5_DV_ESW_EN,
 971                 MLX5_DV_FLOW_EN,
 972                 MLX5_MR_EXT_MEMSEG_EN,
 973                 MLX5_REPRESENTOR,
 974                 NULL,
 975         };
 976         struct rte_kvargs *kvlist;
 977         int ret = 0;
 978         int i;
 979
 980         if (devargs == NULL)
 981                 return 0;
 982         /* Following UGLY cast is done to pass checkpatch. */
 983         kvlist = rte_kvargs_parse(devargs->args, params);
 984         if (kvlist == NULL)
 985                 return 0;
 986         /* Process parameters. */
 987         for (i = 0; (params[i] != NULL); ++i) {
 988                 if (rte_kvargs_count(kvlist, params[i])) {
 989                         ret = rte_kvargs_process(kvlist, params[i],
 990                                                  mlx5_args_check, config);
 991                         if (ret) {
 992                                 rte_errno = EINVAL;
 993                                 rte_kvargs_free(kvlist);
 994                                 return -rte_errno;
 995                         }
 996                 }
 997         }
 998         rte_kvargs_free(kvlist);
 999         return 0;
1000 }
1001
1002 static struct rte_pci_driver mlx5_driver;
1003
1004 /**
1005  * PMD global initialization.
1006  *
1007  * Independent from individual device, this function initializes global
1008  * per-PMD data structures distinguishing primary and secondary processes.
1009  * Hence, each initialization is called once per a process.
1010  *
1011  * @return
1012  *   0 on success, a negative errno value otherwise and rte_errno is set.
1013  */
1014 static int
1015 mlx5_init_once(void)
1016 {
1017         struct mlx5_shared_data *sd;
1018         struct mlx5_local_data *ld = &mlx5_local_data;
1019         int ret = 0;
1020
1021         if (mlx5_init_shared_data())
1022                 return -rte_errno;
1023         sd = mlx5_shared_data;
1024         assert(sd);
1025         rte_spinlock_lock(&sd->lock);
1026         switch (rte_eal_process_type()) {
1027         case RTE_PROC_PRIMARY:
1028                 if (sd->init_done)
1029                         break;
1030                 LIST_INIT(&sd->mem_event_cb_list);
1031                 rte_rwlock_init(&sd->mem_event_rwlock);
1032                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1033                                                 mlx5_mr_mem_event_cb, NULL);
1034                 ret = mlx5_mp_init_primary();
1035                 if (ret)
1036                         goto out;
1037                 sd->init_done = true;
1038                 break;
1039         case RTE_PROC_SECONDARY:
1040                 if (ld->init_done)
1041                         break;
1042                 ret = mlx5_mp_init_secondary();
1043                 if (ret)
1044                         goto out;
1045                 ++sd->secondary_cnt;
1046                 ld->init_done = true;
1047                 break;
1048         default:
1049                 break;
1050         }
1051 out:
1052         rte_spinlock_unlock(&sd->lock);
1053         return ret;
1054 }
1055
1056 /**
1057  * Spawn an Ethernet device from Verbs information.
1058  *
1059  * @param dpdk_dev
1060  *   Backing DPDK device.
1061  * @param spawn
1062  *   Verbs device parameters (name, port, switch_info) to spawn.
1063  * @param config
1064  *   Device configuration parameters.
1065  *
1066  * @return
1067  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
1068  *   is set. The following errors are defined:
1069  *
1070  *   EBUSY: device is not supposed to be spawned.
1071  *   EEXIST: device is already spawned
1072  */
1073 static struct rte_eth_dev *
1074 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1075                struct mlx5_dev_spawn_data *spawn,
1076                struct mlx5_dev_config config)
1077 {
1078         const struct mlx5_switch_info *switch_info = &spawn->info;
1079         struct mlx5_ibv_shared *sh = NULL;
1080         struct ibv_port_attr port_attr;
1081         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1082         struct rte_eth_dev *eth_dev = NULL;
1083         struct mlx5_priv *priv = NULL;
1084         int err = 0;
1085         unsigned int hw_padding = 0;
1086         unsigned int mps;
1087         unsigned int cqe_comp;
1088         unsigned int cqe_pad = 0;
1089         unsigned int tunnel_en = 0;
1090         unsigned int mpls_en = 0;
1091         unsigned int swp = 0;
1092         unsigned int mprq = 0;
1093         unsigned int mprq_min_stride_size_n = 0;
1094         unsigned int mprq_max_stride_size_n = 0;
1095         unsigned int mprq_min_stride_num_n = 0;
1096         unsigned int mprq_max_stride_num_n = 0;
1097         struct rte_ether_addr mac;
1098         char name[RTE_ETH_NAME_MAX_LEN];
1099         int own_domain_id = 0;
1100         uint16_t port_id;
1101         unsigned int i;
1102
1103         /* Determine if this port representor is supposed to be spawned. */
1104         if (switch_info->representor && dpdk_dev->devargs) {
1105                 struct rte_eth_devargs eth_da;
1106
1107                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
1108                 if (err) {
1109                         rte_errno = -err;
1110                         DRV_LOG(ERR, "failed to process device arguments: %s",
1111                                 strerror(rte_errno));
1112                         return NULL;
1113                 }
1114                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1115                         if (eth_da.representor_ports[i] ==
1116                             (uint16_t)switch_info->port_name)
1117                                 break;
1118                 if (i == eth_da.nb_representor_ports) {
1119                         rte_errno = EBUSY;
1120                         return NULL;
1121                 }
1122         }
1123         /* Build device name. */
1124         if (!switch_info->representor)
1125                 strlcpy(name, dpdk_dev->name, sizeof(name));
1126         else
1127                 snprintf(name, sizeof(name), "%s_representor_%u",
1128                          dpdk_dev->name, switch_info->port_name);
1129         /* check if the device is already spawned */
1130         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1131                 rte_errno = EEXIST;
1132                 return NULL;
1133         }
1134         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1135         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1136                 eth_dev = rte_eth_dev_attach_secondary(name);
1137                 if (eth_dev == NULL) {
1138                         DRV_LOG(ERR, "can not attach rte ethdev");
1139                         rte_errno = ENOMEM;
1140                         return NULL;
1141                 }
1142                 eth_dev->device = dpdk_dev;
1143                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1144                 err = mlx5_proc_priv_init(eth_dev);
1145                 if (err)
1146                         return NULL;
1147                 /* Receive command fd from primary process */
1148                 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1149                 if (err < 0)
1150                         return NULL;
1151                 /* Remap UAR for Tx queues. */
1152                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
1153                 if (err)
1154                         return NULL;
1155                 /*
1156                  * Ethdev pointer is still required as input since
1157                  * the primary device is not accessible from the
1158                  * secondary process.
1159                  */
1160                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1161                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1162                 return eth_dev;
1163         }
1164         sh = mlx5_alloc_shared_ibctx(spawn);
1165         if (!sh)
1166                 return NULL;
1167         config.devx = sh->devx;
1168 #ifdef HAVE_IBV_MLX5_MOD_SWP
1169         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1170 #endif
1171         /*
1172          * Multi-packet send is supported by ConnectX-4 Lx PF as well
1173          * as all ConnectX-5 devices.
1174          */
1175 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1176         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1177 #endif
1178 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1179         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1180 #endif
1181         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1182         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1183                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1184                         DRV_LOG(DEBUG, "enhanced MPW is supported");
1185                         mps = MLX5_MPW_ENHANCED;
1186                 } else {
1187                         DRV_LOG(DEBUG, "MPW is supported");
1188                         mps = MLX5_MPW;
1189                 }
1190         } else {
1191                 DRV_LOG(DEBUG, "MPW isn't supported");
1192                 mps = MLX5_MPW_DISABLED;
1193         }
1194 #ifdef HAVE_IBV_MLX5_MOD_SWP
1195         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1196                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1197         DRV_LOG(DEBUG, "SWP support: %u", swp);
1198 #endif
1199         config.swp = !!swp;
1200 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1201         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1202                 struct mlx5dv_striding_rq_caps mprq_caps =
1203                         dv_attr.striding_rq_caps;
1204
1205                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1206                         mprq_caps.min_single_stride_log_num_of_bytes);
1207                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1208                         mprq_caps.max_single_stride_log_num_of_bytes);
1209                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1210                         mprq_caps.min_single_wqe_log_num_of_strides);
1211                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1212                         mprq_caps.max_single_wqe_log_num_of_strides);
1213                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1214                         mprq_caps.supported_qpts);
1215                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1216                 mprq = 1;
1217                 mprq_min_stride_size_n =
1218                         mprq_caps.min_single_stride_log_num_of_bytes;
1219                 mprq_max_stride_size_n =
1220                         mprq_caps.max_single_stride_log_num_of_bytes;
1221                 mprq_min_stride_num_n =
1222                         mprq_caps.min_single_wqe_log_num_of_strides;
1223                 mprq_max_stride_num_n =
1224                         mprq_caps.max_single_wqe_log_num_of_strides;
1225                 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1226                                                    mprq_min_stride_num_n);
1227         }
1228 #endif
1229         if (RTE_CACHE_LINE_SIZE == 128 &&
1230             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
1231                 cqe_comp = 0;
1232         else
1233                 cqe_comp = 1;
1234         config.cqe_comp = cqe_comp;
1235 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
1236         /* Whether device supports 128B Rx CQE padding. */
1237         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
1238                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
1239 #endif
1240 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1241         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1242                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1243                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1244                              (dv_attr.tunnel_offloads_caps &
1245                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
1246         }
1247         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1248                 tunnel_en ? "" : "not ");
1249 #else
1250         DRV_LOG(WARNING,
1251                 "tunnel offloading disabled due to old OFED/rdma-core version");
1252 #endif
1253         config.tunnel_en = tunnel_en;
1254 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1255         mpls_en = ((dv_attr.tunnel_offloads_caps &
1256                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1257                    (dv_attr.tunnel_offloads_caps &
1258                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1259         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1260                 mpls_en ? "" : "not ");
1261 #else
1262         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1263                 " old OFED/rdma-core version or firmware configuration");
1264 #endif
1265         config.mpls_en = mpls_en;
1266         /* Check port status. */
1267         err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
1268         if (err) {
1269                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1270                 goto error;
1271         }
1272         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1273                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1274                 err = EINVAL;
1275                 goto error;
1276         }
1277         if (port_attr.state != IBV_PORT_ACTIVE)
1278                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1279                         mlx5_glue->port_state_str(port_attr.state),
1280                         port_attr.state);
1281         /* Allocate private eth device data. */
1282         priv = rte_zmalloc("ethdev private structure",
1283                            sizeof(*priv),
1284                            RTE_CACHE_LINE_SIZE);
1285         if (priv == NULL) {
1286                 DRV_LOG(ERR, "priv allocation failure");
1287                 err = ENOMEM;
1288                 goto error;
1289         }
1290         priv->sh = sh;
1291         priv->ibv_port = spawn->ibv_port;
1292         priv->mtu = RTE_ETHER_MTU;
1293 #ifndef RTE_ARCH_64
1294         /* Initialize UAR access locks for 32bit implementations. */
1295         rte_spinlock_init(&priv->uar_lock_cq);
1296         for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1297                 rte_spinlock_init(&priv->uar_lock[i]);
1298 #endif
1299         /* Some internal functions rely on Netlink sockets, open them now. */
1300         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1301         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1302         priv->nl_sn = 0;
1303         priv->representor = !!switch_info->representor;
1304         priv->master = !!switch_info->master;
1305         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1306         /*
1307          * Currently we support single E-Switch per PF configurations
1308          * only and vport_id field contains the vport index for
1309          * associated VF, which is deduced from representor port name.
1310          * For example, let's have the IB device port 10, it has
1311          * attached network device eth0, which has port name attribute
1312          * pf0vf2, we can deduce the VF number as 2, and set vport index
1313          * as 3 (2+1). This assigning schema should be changed if the
1314          * multiple E-Switch instances per PF configurations or/and PCI
1315          * subfunctions are added.
1316          */
1317         priv->vport_id = switch_info->representor ?
1318                          switch_info->port_name + 1 : -1;
1319         /* representor_id field keeps the unmodified port/VF index. */
1320         priv->representor_id = switch_info->representor ?
1321                                switch_info->port_name : -1;
1322         /*
1323          * Look for sibling devices in order to reuse their switch domain
1324          * if any, otherwise allocate one.
1325          */
1326         RTE_ETH_FOREACH_DEV_OF(port_id, dpdk_dev) {
1327                 const struct mlx5_priv *opriv =
1328                         rte_eth_devices[port_id].data->dev_private;
1329
1330                 if (!opriv ||
1331                         opriv->domain_id ==
1332                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1333                         continue;
1334                 priv->domain_id = opriv->domain_id;
1335                 break;
1336         }
1337         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1338                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1339                 if (err) {
1340                         err = rte_errno;
1341                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
1342                                 strerror(rte_errno));
1343                         goto error;
1344                 }
1345                 own_domain_id = 1;
1346         }
1347         err = mlx5_args(&config, dpdk_dev->devargs);
1348         if (err) {
1349                 err = rte_errno;
1350                 DRV_LOG(ERR, "failed to process device arguments: %s",
1351                         strerror(rte_errno));
1352                 goto error;
1353         }
1354         config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1355                             IBV_DEVICE_RAW_IP_CSUM);
1356         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1357                 (config.hw_csum ? "" : "not "));
1358 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1359         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1360         DRV_LOG(DEBUG, "counters are not supported");
1361 #endif
1362 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
1363         if (config.dv_flow_en) {
1364                 DRV_LOG(WARNING, "DV flow is not supported");
1365                 config.dv_flow_en = 0;
1366         }
1367 #endif
1368         config.ind_table_max_size =
1369                 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
1370         /*
1371          * Remove this check once DPDK supports larger/variable
1372          * indirection tables.
1373          */
1374         if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1375                 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1376         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1377                 config.ind_table_max_size);
1378         config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1379                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1380         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1381                 (config.hw_vlan_strip ? "" : "not "));
1382         config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1383                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
1384         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1385                 (config.hw_fcs_strip ? "" : "not "));
1386 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1387         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1388 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1389         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1390                         IBV_DEVICE_PCI_WRITE_END_PADDING);
1391 #endif
1392         if (config.hw_padding && !hw_padding) {
1393                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1394                 config.hw_padding = 0;
1395         } else if (config.hw_padding) {
1396                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1397         }
1398         config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
1399                       (sh->device_attr.tso_caps.supported_qpts &
1400                        (1 << IBV_QPT_RAW_PACKET)));
1401         if (config.tso)
1402                 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
1403         /*
1404          * MPW is disabled by default, while the Enhanced MPW is enabled
1405          * by default.
1406          */
1407         if (config.mps == MLX5_ARG_UNSET)
1408                 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1409                                                           MLX5_MPW_DISABLED;
1410         else
1411                 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
1412         DRV_LOG(INFO, "%sMPS is %s",
1413                 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
1414                 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1415         if (config.cqe_comp && !cqe_comp) {
1416                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1417                 config.cqe_comp = 0;
1418         }
1419         if (config.cqe_pad && !cqe_pad) {
1420                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1421                 config.cqe_pad = 0;
1422         } else if (config.cqe_pad) {
1423                 DRV_LOG(INFO, "Rx CQE padding is enabled");
1424         }
1425         if (config.mprq.enabled && mprq) {
1426                 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
1427                     config.mprq.stride_num_n < mprq_min_stride_num_n) {
1428                         config.mprq.stride_num_n =
1429                                 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1430                                         mprq_min_stride_num_n);
1431                         DRV_LOG(WARNING,
1432                                 "the number of strides"
1433                                 " for Multi-Packet RQ is out of range,"
1434                                 " setting default value (%u)",
1435                                 1 << config.mprq.stride_num_n);
1436                 }
1437                 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
1438                 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
1439         } else if (config.mprq.enabled && !mprq) {
1440                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1441                 config.mprq.enabled = 0;
1442         }
1443         eth_dev = rte_eth_dev_allocate(name);
1444         if (eth_dev == NULL) {
1445                 DRV_LOG(ERR, "can not allocate rte ethdev");
1446                 err = ENOMEM;
1447                 goto error;
1448         }
1449         /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1450         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1451         if (priv->representor) {
1452                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1453                 eth_dev->data->representor_id = priv->representor_id;
1454         }
1455         eth_dev->data->dev_private = priv;
1456         priv->dev_data = eth_dev->data;
1457         eth_dev->data->mac_addrs = priv->mac;
1458         eth_dev->device = dpdk_dev;
1459         /* Configure the first MAC address by default. */
1460         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1461                 DRV_LOG(ERR,
1462                         "port %u cannot get MAC address, is mlx5_en"
1463                         " loaded? (errno: %s)",
1464                         eth_dev->data->port_id, strerror(rte_errno));
1465                 err = ENODEV;
1466                 goto error;
1467         }
1468         DRV_LOG(INFO,
1469                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1470                 eth_dev->data->port_id,
1471                 mac.addr_bytes[0], mac.addr_bytes[1],
1472                 mac.addr_bytes[2], mac.addr_bytes[3],
1473                 mac.addr_bytes[4], mac.addr_bytes[5]);
1474 #ifndef NDEBUG
1475         {
1476                 char ifname[IF_NAMESIZE];
1477
1478                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1479                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1480                                 eth_dev->data->port_id, ifname);
1481                 else
1482                         DRV_LOG(DEBUG, "port %u ifname is unknown",
1483                                 eth_dev->data->port_id);
1484         }
1485 #endif
1486         /* Get actual MTU if possible. */
1487         err = mlx5_get_mtu(eth_dev, &priv->mtu);
1488         if (err) {
1489                 err = rte_errno;
1490                 goto error;
1491         }
1492         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1493                 priv->mtu);
1494         /* Initialize burst functions to prevent crashes before link-up. */
1495         eth_dev->rx_pkt_burst = removed_rx_burst;
1496         eth_dev->tx_pkt_burst = removed_tx_burst;
1497         eth_dev->dev_ops = &mlx5_dev_ops;
1498         /* Register MAC address. */
1499         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1500         if (config.vf && config.vf_nl_en)
1501                 mlx5_nl_mac_addr_sync(eth_dev);
1502         priv->tcf_context = mlx5_flow_tcf_context_create();
1503         if (!priv->tcf_context) {
1504                 err = -rte_errno;
1505                 DRV_LOG(WARNING,
1506                         "flow rules relying on switch offloads will not be"
1507                         " supported: cannot open libmnl socket: %s",
1508                         strerror(rte_errno));
1509         } else {
1510                 struct rte_flow_error error;
1511                 unsigned int ifindex = mlx5_ifindex(eth_dev);
1512
1513                 if (!ifindex) {
1514                         err = -rte_errno;
1515                         error.message =
1516                                 "cannot retrieve network interface index";
1517                 } else {
1518                         err = mlx5_flow_tcf_init(priv->tcf_context,
1519                                                  ifindex, &error);
1520                 }
1521                 if (err) {
1522                         DRV_LOG(WARNING,
1523                                 "flow rules relying on switch offloads will"
1524                                 " not be supported: %s: %s",
1525                                 error.message, strerror(rte_errno));
1526                         mlx5_flow_tcf_context_destroy(priv->tcf_context);
1527                         priv->tcf_context = NULL;
1528                 }
1529         }
1530         TAILQ_INIT(&priv->flows);
1531         TAILQ_INIT(&priv->ctrl_flows);
1532         /* Hint libmlx5 to use PMD allocator for data plane resources */
1533         struct mlx5dv_ctx_allocators alctr = {
1534                 .alloc = &mlx5_alloc_verbs_buf,
1535                 .free = &mlx5_free_verbs_buf,
1536                 .data = priv,
1537         };
1538         mlx5_glue->dv_set_context_attr(sh->ctx,
1539                                        MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1540                                        (void *)((uintptr_t)&alctr));
1541         /* Bring Ethernet device up. */
1542         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1543                 eth_dev->data->port_id);
1544         mlx5_set_link_up(eth_dev);
1545         /*
1546          * Even though the interrupt handler is not installed yet,
1547          * interrupts will still trigger on the async_fd from
1548          * Verbs context returned by ibv_open_device().
1549          */
1550         mlx5_link_update(eth_dev, 0);
1551 #ifdef HAVE_IBV_DEVX_OBJ
1552         if (config.devx) {
1553                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
1554                 if (err) {
1555                         err = -err;
1556                         goto error;
1557                 }
1558         }
1559 #endif
1560 #ifdef HAVE_MLX5DV_DR_ESWITCH
1561         if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
1562               (switch_info->representor || switch_info->master)))
1563                 config.dv_esw_en = 0;
1564 #else
1565         config.dv_esw_en = 0;
1566 #endif
1567         /* Store device configuration on private structure. */
1568         priv->config = config;
1569         if (config.dv_flow_en) {
1570                 err = mlx5_alloc_shared_dr(priv);
1571                 if (err)
1572                         goto error;
1573         }
1574         /* Supported Verbs flow priority number detection. */
1575         err = mlx5_flow_discover_priorities(eth_dev);
1576         if (err < 0) {
1577                 err = -err;
1578                 goto error;
1579         }
1580         priv->config.flow_prio = err;
1581         /* Add device to memory callback list. */
1582         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
1583         LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
1584                          sh, mem_event_cb);
1585         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
1586         return eth_dev;
1587 error:
1588         if (priv) {
1589                 if (priv->sh)
1590                         mlx5_free_shared_dr(priv);
1591                 if (priv->nl_socket_route >= 0)
1592                         close(priv->nl_socket_route);
1593                 if (priv->nl_socket_rdma >= 0)
1594                         close(priv->nl_socket_rdma);
1595                 if (priv->tcf_context)
1596                         mlx5_flow_tcf_context_destroy(priv->tcf_context);
1597                 if (own_domain_id)
1598                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1599                 rte_free(priv);
1600                 if (eth_dev != NULL)
1601                         eth_dev->data->dev_private = NULL;
1602         }
1603         if (eth_dev != NULL) {
1604                 /* mac_addrs must not be freed alone because part of dev_private */
1605                 eth_dev->data->mac_addrs = NULL;
1606                 rte_eth_dev_release_port(eth_dev);
1607         }
1608         if (sh)
1609                 mlx5_free_shared_ibctx(sh);
1610         assert(err > 0);
1611         rte_errno = err;
1612         return NULL;
1613 }
1614
1615 /**
1616  * Comparison callback to sort device data.
1617  *
1618  * This is meant to be used with qsort().
1619  *
1620  * @param a[in]
1621  *   Pointer to pointer to first data object.
1622  * @param b[in]
1623  *   Pointer to pointer to second data object.
1624  *
1625  * @return
1626  *   0 if both objects are equal, less than 0 if the first argument is less
1627  *   than the second, greater than 0 otherwise.
1628  */
1629 static int
1630 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1631 {
1632         const struct mlx5_switch_info *si_a =
1633                 &((const struct mlx5_dev_spawn_data *)a)->info;
1634         const struct mlx5_switch_info *si_b =
1635                 &((const struct mlx5_dev_spawn_data *)b)->info;
1636         int ret;
1637
1638         /* Master device first. */
1639         ret = si_b->master - si_a->master;
1640         if (ret)
1641                 return ret;
1642         /* Then representor devices. */
1643         ret = si_b->representor - si_a->representor;
1644         if (ret)
1645                 return ret;
1646         /* Unidentified devices come last in no specific order. */
1647         if (!si_a->representor)
1648                 return 0;
1649         /* Order representors by name. */
1650         return si_a->port_name - si_b->port_name;
1651 }
1652
1653 /**
1654  * DPDK callback to register a PCI device.
1655  *
1656  * This function spawns Ethernet devices out of a given PCI device.
1657  *
1658  * @param[in] pci_drv
1659  *   PCI driver structure (mlx5_driver).
1660  * @param[in] pci_dev
1661  *   PCI device information.
1662  *
1663  * @return
1664  *   0 on success, a negative errno value otherwise and rte_errno is set.
1665  */
1666 static int
1667 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1668                struct rte_pci_device *pci_dev)
1669 {
1670         struct ibv_device **ibv_list;
1671         /*
1672          * Number of found IB Devices matching with requested PCI BDF.
1673          * nd != 1 means there are multiple IB devices over the same
1674          * PCI device and we have representors and master.
1675          */
1676         unsigned int nd = 0;
1677         /*
1678          * Number of found IB device Ports. nd = 1 and np = 1..n means
1679          * we have the single multiport IB device, and there may be
1680          * representors attached to some of found ports.
1681          */
1682         unsigned int np = 0;
1683         /*
1684          * Number of DPDK ethernet devices to Spawn - either over
1685          * multiple IB devices or multiple ports of single IB device.
1686          * Actually this is the number of iterations to spawn.
1687          */
1688         unsigned int ns = 0;
1689         struct mlx5_dev_config dev_config;
1690         int ret;
1691
1692         ret = mlx5_init_once();
1693         if (ret) {
1694                 DRV_LOG(ERR, "unable to init PMD global data: %s",
1695                         strerror(rte_errno));
1696                 return -rte_errno;
1697         }
1698         assert(pci_drv == &mlx5_driver);
1699         errno = 0;
1700         ibv_list = mlx5_glue->get_device_list(&ret);
1701         if (!ibv_list) {
1702                 rte_errno = errno ? errno : ENOSYS;
1703                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1704                 return -rte_errno;
1705         }
1706         /*
1707          * First scan the list of all Infiniband devices to find
1708          * matching ones, gathering into the list.
1709          */
1710         struct ibv_device *ibv_match[ret + 1];
1711         int nl_route = -1;
1712         int nl_rdma = -1;
1713         unsigned int i;
1714
1715         while (ret-- > 0) {
1716                 struct rte_pci_addr pci_addr;
1717
1718                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1719                 if (mlx5_ibv_device_to_pci_addr(ibv_list[ret], &pci_addr))
1720                         continue;
1721                 if (pci_dev->addr.domain != pci_addr.domain ||
1722                     pci_dev->addr.bus != pci_addr.bus ||
1723                     pci_dev->addr.devid != pci_addr.devid ||
1724                     pci_dev->addr.function != pci_addr.function)
1725                         continue;
1726                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1727                         ibv_list[ret]->name);
1728                 ibv_match[nd++] = ibv_list[ret];
1729         }
1730         ibv_match[nd] = NULL;
1731         if (!nd) {
1732                 /* No device matches, just complain and bail out. */
1733                 mlx5_glue->free_device_list(ibv_list);
1734                 DRV_LOG(WARNING,
1735                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
1736                         " are kernel drivers loaded?",
1737                         pci_dev->addr.domain, pci_dev->addr.bus,
1738                         pci_dev->addr.devid, pci_dev->addr.function);
1739                 rte_errno = ENOENT;
1740                 ret = -rte_errno;
1741                 return ret;
1742         }
1743         nl_route = mlx5_nl_init(NETLINK_ROUTE);
1744         nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1745         if (nd == 1) {
1746                 /*
1747                  * Found single matching device may have multiple ports.
1748                  * Each port may be representor, we have to check the port
1749                  * number and check the representors existence.
1750                  */
1751                 if (nl_rdma >= 0)
1752                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1753                 if (!np)
1754                         DRV_LOG(WARNING, "can not get IB device \"%s\""
1755                                          " ports number", ibv_match[0]->name);
1756         }
1757         /*
1758          * Now we can determine the maximal
1759          * amount of devices to be spawned.
1760          */
1761         struct mlx5_dev_spawn_data list[np ? np : nd];
1762
1763         if (np > 1) {
1764                 /*
1765                  * Single IB device with multiple ports found,
1766                  * it may be E-Switch master device and representors.
1767                  * We have to perform identification trough the ports.
1768                  */
1769                 assert(nl_rdma >= 0);
1770                 assert(ns == 0);
1771                 assert(nd == 1);
1772                 for (i = 1; i <= np; ++i) {
1773                         list[ns].max_port = np;
1774                         list[ns].ibv_port = i;
1775                         list[ns].ibv_dev = ibv_match[0];
1776                         list[ns].eth_dev = NULL;
1777                         list[ns].pci_dev = pci_dev;
1778                         list[ns].ifindex = mlx5_nl_ifindex
1779                                         (nl_rdma, list[ns].ibv_dev->name, i);
1780                         if (!list[ns].ifindex) {
1781                                 /*
1782                                  * No network interface index found for the
1783                                  * specified port, it means there is no
1784                                  * representor on this port. It's OK,
1785                                  * there can be disabled ports, for example
1786                                  * if sriov_numvfs < sriov_totalvfs.
1787                                  */
1788                                 continue;
1789                         }
1790                         ret = -1;
1791                         if (nl_route >= 0)
1792                                 ret = mlx5_nl_switch_info
1793                                                (nl_route,
1794                                                 list[ns].ifindex,
1795                                                 &list[ns].info);
1796                         if (ret || (!list[ns].info.representor &&
1797                                     !list[ns].info.master)) {
1798                                 /*
1799                                  * We failed to recognize representors with
1800                                  * Netlink, let's try to perform the task
1801                                  * with sysfs.
1802                                  */
1803                                 ret =  mlx5_sysfs_switch_info
1804                                                 (list[ns].ifindex,
1805                                                  &list[ns].info);
1806                         }
1807                         if (!ret && (list[ns].info.representor ^
1808                                      list[ns].info.master))
1809                                 ns++;
1810                 }
1811                 if (!ns) {
1812                         DRV_LOG(ERR,
1813                                 "unable to recognize master/representors"
1814                                 " on the IB device with multiple ports");
1815                         rte_errno = ENOENT;
1816                         ret = -rte_errno;
1817                         goto exit;
1818                 }
1819         } else {
1820                 /*
1821                  * The existence of several matching entries (nd > 1) means
1822                  * port representors have been instantiated. No existing Verbs
1823                  * call nor sysfs entries can tell them apart, this can only
1824                  * be done through Netlink calls assuming kernel drivers are
1825                  * recent enough to support them.
1826                  *
1827                  * In the event of identification failure through Netlink,
1828                  * try again through sysfs, then:
1829                  *
1830                  * 1. A single IB device matches (nd == 1) with single
1831                  *    port (np=0/1) and is not a representor, assume
1832                  *    no switch support.
1833                  *
1834                  * 2. Otherwise no safe assumptions can be made;
1835                  *    complain louder and bail out.
1836                  */
1837                 np = 1;
1838                 for (i = 0; i != nd; ++i) {
1839                         memset(&list[ns].info, 0, sizeof(list[ns].info));
1840                         list[ns].max_port = 1;
1841                         list[ns].ibv_port = 1;
1842                         list[ns].ibv_dev = ibv_match[i];
1843                         list[ns].eth_dev = NULL;
1844                         list[ns].pci_dev = pci_dev;
1845                         list[ns].ifindex = 0;
1846                         if (nl_rdma >= 0)
1847                                 list[ns].ifindex = mlx5_nl_ifindex
1848                                         (nl_rdma, list[ns].ibv_dev->name, 1);
1849                         if (!list[ns].ifindex) {
1850                                 char ifname[IF_NAMESIZE];
1851
1852                                 /*
1853                                  * Netlink failed, it may happen with old
1854                                  * ib_core kernel driver (before 4.16).
1855                                  * We can assume there is old driver because
1856                                  * here we are processing single ports IB
1857                                  * devices. Let's try sysfs to retrieve
1858                                  * the ifindex. The method works for
1859                                  * master device only.
1860                                  */
1861                                 if (nd > 1) {
1862                                         /*
1863                                          * Multiple devices found, assume
1864                                          * representors, can not distinguish
1865                                          * master/representor and retrieve
1866                                          * ifindex via sysfs.
1867                                          */
1868                                         continue;
1869                                 }
1870                                 ret = mlx5_get_master_ifname
1871                                         (ibv_match[i]->ibdev_path, &ifname);
1872                                 if (!ret)
1873                                         list[ns].ifindex =
1874                                                 if_nametoindex(ifname);
1875                                 if (!list[ns].ifindex) {
1876                                         /*
1877                                          * No network interface index found
1878                                          * for the specified device, it means
1879                                          * there it is neither representor
1880                                          * nor master.
1881                                          */
1882                                         continue;
1883                                 }
1884                         }
1885                         ret = -1;
1886                         if (nl_route >= 0)
1887                                 ret = mlx5_nl_switch_info
1888                                                (nl_route,
1889                                                 list[ns].ifindex,
1890                                                 &list[ns].info);
1891                         if (ret || (!list[ns].info.representor &&
1892                                     !list[ns].info.master)) {
1893                                 /*
1894                                  * We failed to recognize representors with
1895                                  * Netlink, let's try to perform the task
1896                                  * with sysfs.
1897                                  */
1898                                 ret =  mlx5_sysfs_switch_info
1899                                                 (list[ns].ifindex,
1900                                                  &list[ns].info);
1901                         }
1902                         if (!ret && (list[ns].info.representor ^
1903                                      list[ns].info.master)) {
1904                                 ns++;
1905                         } else if ((nd == 1) &&
1906                                    !list[ns].info.representor &&
1907                                    !list[ns].info.master) {
1908                                 /*
1909                                  * Single IB device with
1910                                  * one physical port and
1911                                  * attached network device.
1912                                  * May be SRIOV is not enabled
1913                                  * or there is no representors.
1914                                  */
1915                                 DRV_LOG(INFO, "no E-Switch support detected");
1916                                 ns++;
1917                                 break;
1918                         }
1919                 }
1920                 if (!ns) {
1921                         DRV_LOG(ERR,
1922                                 "unable to recognize master/representors"
1923                                 " on the multiple IB devices");
1924                         rte_errno = ENOENT;
1925                         ret = -rte_errno;
1926                         goto exit;
1927                 }
1928         }
1929         assert(ns);
1930         /*
1931          * Sort list to probe devices in natural order for users convenience
1932          * (i.e. master first, then representors from lowest to highest ID).
1933          */
1934         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
1935         /* Default configuration. */
1936         dev_config = (struct mlx5_dev_config){
1937                 .hw_padding = 0,
1938                 .mps = MLX5_ARG_UNSET,
1939                 .tx_vec_en = 1,
1940                 .rx_vec_en = 1,
1941                 .txq_inline = MLX5_ARG_UNSET,
1942                 .txqs_inline = MLX5_ARG_UNSET,
1943                 .txqs_vec = MLX5_ARG_UNSET,
1944                 .inline_max_packet_sz = MLX5_ARG_UNSET,
1945                 .vf_nl_en = 1,
1946                 .mr_ext_memseg_en = 1,
1947                 .mprq = {
1948                         .enabled = 0, /* Disabled by default. */
1949                         .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
1950                         .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
1951                         .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
1952                 },
1953                 .dv_esw_en = 1,
1954         };
1955         /* Device specific configuration. */
1956         switch (pci_dev->id.device_id) {
1957         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
1958                 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS_BLUEFIELD;
1959                 break;
1960         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1961         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1962         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1963         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1964                 dev_config.vf = 1;
1965                 break;
1966         default:
1967                 break;
1968         }
1969         /* Set architecture-dependent default value if unset. */
1970         if (dev_config.txqs_vec == MLX5_ARG_UNSET)
1971                 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS;
1972         for (i = 0; i != ns; ++i) {
1973                 uint32_t restore;
1974
1975                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
1976                                                  &list[i],
1977                                                  dev_config);
1978                 if (!list[i].eth_dev) {
1979                         if (rte_errno != EBUSY && rte_errno != EEXIST)
1980                                 break;
1981                         /* Device is disabled or already spawned. Ignore it. */
1982                         continue;
1983                 }
1984                 restore = list[i].eth_dev->data->dev_flags;
1985                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
1986                 /* Restore non-PCI flags cleared by the above call. */
1987                 list[i].eth_dev->data->dev_flags |= restore;
1988                 rte_eth_dev_probing_finish(list[i].eth_dev);
1989         }
1990         if (i != ns) {
1991                 DRV_LOG(ERR,
1992                         "probe of PCI device " PCI_PRI_FMT " aborted after"
1993                         " encountering an error: %s",
1994                         pci_dev->addr.domain, pci_dev->addr.bus,
1995                         pci_dev->addr.devid, pci_dev->addr.function,
1996                         strerror(rte_errno));
1997                 ret = -rte_errno;
1998                 /* Roll back. */
1999                 while (i--) {
2000                         if (!list[i].eth_dev)
2001                                 continue;
2002                         mlx5_dev_close(list[i].eth_dev);
2003                         /* mac_addrs must not be freed because in dev_private */
2004                         list[i].eth_dev->data->mac_addrs = NULL;
2005                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2006                 }
2007                 /* Restore original error. */
2008                 rte_errno = -ret;
2009         } else {
2010                 ret = 0;
2011         }
2012 exit:
2013         /*
2014          * Do the routine cleanup:
2015          * - close opened Netlink sockets
2016          * - free the Infiniband device list
2017          */
2018         if (nl_rdma >= 0)
2019                 close(nl_rdma);
2020         if (nl_route >= 0)
2021                 close(nl_route);
2022         assert(ibv_list);
2023         mlx5_glue->free_device_list(ibv_list);
2024         return ret;
2025 }
2026
2027 /**
2028  * DPDK callback to remove a PCI device.
2029  *
2030  * This function removes all Ethernet devices belong to a given PCI device.
2031  *
2032  * @param[in] pci_dev
2033  *   Pointer to the PCI device.
2034  *
2035  * @return
2036  *   0 on success, the function cannot fail.
2037  */
2038 static int
2039 mlx5_pci_remove(struct rte_pci_device *pci_dev)
2040 {
2041         uint16_t port_id;
2042
2043         RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
2044                 rte_eth_dev_close(port_id);
2045         return 0;
2046 }
2047
2048 static const struct rte_pci_id mlx5_pci_id_map[] = {
2049         {
2050                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2051                                PCI_DEVICE_ID_MELLANOX_CONNECTX4)
2052         },
2053         {
2054                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2055                                PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
2056         },
2057         {
2058                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2059                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
2060         },
2061         {
2062                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2063                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
2064         },
2065         {
2066                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2067                                PCI_DEVICE_ID_MELLANOX_CONNECTX5)
2068         },
2069         {
2070                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2071                                PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
2072         },
2073         {
2074                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2075                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
2076         },
2077         {
2078                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2079                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
2080         },
2081         {
2082                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2083                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
2084         },
2085         {
2086                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2087                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
2088         },
2089         {
2090                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2091                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
2092         },
2093         {
2094                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2095                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
2096         },
2097         {
2098                 .vendor_id = 0
2099         }
2100 };
2101
2102 static struct rte_pci_driver mlx5_driver = {
2103         .driver = {
2104                 .name = MLX5_DRIVER_NAME
2105         },
2106         .id_table = mlx5_pci_id_map,
2107         .probe = mlx5_pci_probe,
2108         .remove = mlx5_pci_remove,
2109         .dma_map = mlx5_dma_map,
2110         .dma_unmap = mlx5_dma_unmap,
2111         .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
2112                      RTE_PCI_DRV_PROBE_AGAIN | RTE_PCI_DRV_IOVA_AS_VA,
2113 };
2114
2115 #ifdef RTE_IBVERBS_LINK_DLOPEN
2116
2117 /**
2118  * Suffix RTE_EAL_PMD_PATH with "-glue".
2119  *
2120  * This function performs a sanity check on RTE_EAL_PMD_PATH before
2121  * suffixing its last component.
2122  *
2123  * @param buf[out]
2124  *   Output buffer, should be large enough otherwise NULL is returned.
2125  * @param size
2126  *   Size of @p out.
2127  *
2128  * @return
2129  *   Pointer to @p buf or @p NULL in case suffix cannot be appended.
2130  */
2131 static char *
2132 mlx5_glue_path(char *buf, size_t size)
2133 {
2134         static const char *const bad[] = { "/", ".", "..", NULL };
2135         const char *path = RTE_EAL_PMD_PATH;
2136         size_t len = strlen(path);
2137         size_t off;
2138         int i;
2139
2140         while (len && path[len - 1] == '/')
2141                 --len;
2142         for (off = len; off && path[off - 1] != '/'; --off)
2143                 ;
2144         for (i = 0; bad[i]; ++i)
2145                 if (!strncmp(path + off, bad[i], (int)(len - off)))
2146                         goto error;
2147         i = snprintf(buf, size, "%.*s-glue", (int)len, path);
2148         if (i == -1 || (size_t)i >= size)
2149                 goto error;
2150         return buf;
2151 error:
2152         DRV_LOG(ERR,
2153                 "unable to append \"-glue\" to last component of"
2154                 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
2155                 " please re-configure DPDK");
2156         return NULL;
2157 }
2158
2159 /**
2160  * Initialization routine for run-time dependency on rdma-core.
2161  */
2162 static int
2163 mlx5_glue_init(void)
2164 {
2165         char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
2166         const char *path[] = {
2167                 /*
2168                  * A basic security check is necessary before trusting
2169                  * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
2170                  */
2171                 (geteuid() == getuid() && getegid() == getgid() ?
2172                  getenv("MLX5_GLUE_PATH") : NULL),
2173                 /*
2174                  * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
2175                  * variant, otherwise let dlopen() look up libraries on its
2176                  * own.
2177                  */
2178                 (*RTE_EAL_PMD_PATH ?
2179                  mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
2180         };
2181         unsigned int i = 0;
2182         void *handle = NULL;
2183         void **sym;
2184         const char *dlmsg;
2185
2186         while (!handle && i != RTE_DIM(path)) {
2187                 const char *end;
2188                 size_t len;
2189                 int ret;
2190
2191                 if (!path[i]) {
2192                         ++i;
2193                         continue;
2194                 }
2195                 end = strpbrk(path[i], ":;");
2196                 if (!end)
2197                         end = path[i] + strlen(path[i]);
2198                 len = end - path[i];
2199                 ret = 0;
2200                 do {
2201                         char name[ret + 1];
2202
2203                         ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
2204                                        (int)len, path[i],
2205                                        (!len || *(end - 1) == '/') ? "" : "/");
2206                         if (ret == -1)
2207                                 break;
2208                         if (sizeof(name) != (size_t)ret + 1)
2209                                 continue;
2210                         DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
2211                                 name);
2212                         handle = dlopen(name, RTLD_LAZY);
2213                         break;
2214                 } while (1);
2215                 path[i] = end + 1;
2216                 if (!*end)
2217                         ++i;
2218         }
2219         if (!handle) {
2220                 rte_errno = EINVAL;
2221                 dlmsg = dlerror();
2222                 if (dlmsg)
2223                         DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
2224                 goto glue_error;
2225         }
2226         sym = dlsym(handle, "mlx5_glue");
2227         if (!sym || !*sym) {
2228                 rte_errno = EINVAL;
2229                 dlmsg = dlerror();
2230                 if (dlmsg)
2231                         DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
2232                 goto glue_error;
2233         }
2234         mlx5_glue = *sym;
2235         return 0;
2236 glue_error:
2237         if (handle)
2238                 dlclose(handle);
2239         DRV_LOG(WARNING,
2240                 "cannot initialize PMD due to missing run-time dependency on"
2241                 " rdma-core libraries (libibverbs, libmlx5)");
2242         return -rte_errno;
2243 }
2244
2245 #endif
2246
2247 /**
2248  * Driver initialization routine.
2249  */
2250 RTE_INIT(rte_mlx5_pmd_init)
2251 {
2252         /* Initialize driver log type. */
2253         mlx5_logtype = rte_log_register("pmd.net.mlx5");
2254         if (mlx5_logtype >= 0)
2255                 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
2256
2257         /* Build the static tables for Verbs conversion. */
2258         mlx5_set_ptype_table();
2259         mlx5_set_cksum_table();
2260         mlx5_set_swp_types_table();
2261         /*
2262          * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
2263          * huge pages. Calling ibv_fork_init() during init allows
2264          * applications to use fork() safely for purposes other than
2265          * using this PMD, which is not supported in forked processes.
2266          */
2267         setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
2268         /* Match the size of Rx completion entry to the size of a cacheline. */
2269         if (RTE_CACHE_LINE_SIZE == 128)
2270                 setenv("MLX5_CQE_SIZE", "128", 0);
2271         /*
2272          * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
2273          * cleanup all the Verbs resources even when the device was removed.
2274          */
2275         setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
2276 #ifdef RTE_IBVERBS_LINK_DLOPEN
2277         if (mlx5_glue_init())
2278                 return;
2279         assert(mlx5_glue);
2280 #endif
2281 #ifndef NDEBUG
2282         /* Glue structure must not contain any NULL pointers. */
2283         {
2284                 unsigned int i;
2285
2286                 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
2287                         assert(((const void *const *)mlx5_glue)[i]);
2288         }
2289 #endif
2290         if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
2291                 DRV_LOG(ERR,
2292                         "rdma-core glue \"%s\" mismatch: \"%s\" is required",
2293                         mlx5_glue->version, MLX5_GLUE_VERSION);
2294                 return;
2295         }
2296         mlx5_glue->fork_init();
2297         rte_pci_register(&mlx5_driver);
2298 }
2299
2300 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
2301 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
2302 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");