drivers/net/mlx5/mlx5.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2015 6WIND S.A.
   3  * Copyright 2015 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stddef.h>
   7 #include <unistd.h>
   8 #include <string.h>
   9 #include <assert.h>
  10 #include <dlfcn.h>
  11 #include <stdint.h>
  12 #include <stdlib.h>
  13 #include <errno.h>
  14 #include <net/if.h>
  15 #include <sys/mman.h>
  16 #include <linux/rtnetlink.h>
  17
  18 /* Verbs header. */
  19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  20 #ifdef PEDANTIC
  21 #pragma GCC diagnostic ignored "-Wpedantic"
  22 #endif
  23 #include <infiniband/verbs.h>
  24 #ifdef PEDANTIC
  25 #pragma GCC diagnostic error "-Wpedantic"
  26 #endif
  27
  28 #include <rte_malloc.h>
  29 #include <rte_ethdev_driver.h>
  30 #include <rte_ethdev_pci.h>
  31 #include <rte_pci.h>
  32 #include <rte_bus_pci.h>
  33 #include <rte_common.h>
  34 #include <rte_config.h>
  35 #include <rte_kvargs.h>
  36 #include <rte_rwlock.h>
  37 #include <rte_spinlock.h>
  38 #include <rte_string_fns.h>
  39 #include <rte_alarm.h>
  40
  41 #include "mlx5.h"
  42 #include "mlx5_utils.h"
  43 #include "mlx5_rxtx.h"
  44 #include "mlx5_autoconf.h"
  45 #include "mlx5_defs.h"
  46 #include "mlx5_glue.h"
  47 #include "mlx5_mr.h"
  48 #include "mlx5_flow.h"
  49
  50 /* Device parameter to enable RX completion queue compression. */
  51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
  52
  53 /* Device parameter to enable RX completion entry padding to 128B. */
  54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
  55
  56 /* Device parameter to enable padding Rx packet to cacheline size. */
  57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
  58
  59 /* Device parameter to enable Multi-Packet Rx queue. */
  60 #define MLX5_RX_MPRQ_EN "mprq_en"
  61
  62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
  63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
  64
  65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
  66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
  67
  68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
  69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
  70
  71 /* Device parameter to configure inline send. Deprecated, ignored.*/
  72 #define MLX5_TXQ_INLINE "txq_inline"
  73
  74 /* Device parameter to limit packet size to inline with ordinary SEND. */
  75 #define MLX5_TXQ_INLINE_MAX "txq_inline_max"
  76
  77 /* Device parameter to configure minimal data size to inline. */
  78 #define MLX5_TXQ_INLINE_MIN "txq_inline_min"
  79
  80 /* Device parameter to limit packet size to inline with Enhanced MPW. */
  81 #define MLX5_TXQ_INLINE_MPW "txq_inline_mpw"
  82
  83 /*
  84  * Device parameter to configure the number of TX queues threshold for
  85  * enabling inline send.
  86  */
  87 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
  88
  89 /*
  90  * Device parameter to configure the number of TX queues threshold for
  91  * enabling vectorized Tx, deprecated, ignored (no vectorized Tx routines).
  92  */
  93 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
  94
  95 /* Device parameter to enable multi-packet send WQEs. */
  96 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
  97
  98 /*
  99  * Device parameter to force doorbell register mapping
 100  * to non-cahed region eliminating the extra write memory barrier.
 101  */
 102 #define MLX5_TX_DB_NC "tx_db_nc"
 103
 104 /*
 105  * Device parameter to include 2 dsegs in the title WQEBB.
 106  * Deprecated, ignored.
 107  */
 108 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
 109
 110 /*
 111  * Device parameter to limit the size of inlining packet.
 112  * Deprecated, ignored.
 113  */
 114 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
 115
 116 /*
 117  * Device parameter to enable hardware Tx vector.
 118  * Deprecated, ignored (no vectorized Tx routines anymore).
 119  */
 120 #define MLX5_TX_VEC_EN "tx_vec_en"
 121
 122 /* Device parameter to enable hardware Rx vector. */
 123 #define MLX5_RX_VEC_EN "rx_vec_en"
 124
 125 /* Allow L3 VXLAN flow creation. */
 126 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
 127
 128 /* Activate DV E-Switch flow steering. */
 129 #define MLX5_DV_ESW_EN "dv_esw_en"
 130
 131 /* Activate DV flow steering. */
 132 #define MLX5_DV_FLOW_EN "dv_flow_en"
 133
 134 /* Enable extensive flow metadata support. */
 135 #define MLX5_DV_XMETA_EN "dv_xmeta_en"
 136
 137 /* Activate Netlink support in VF mode. */
 138 #define MLX5_VF_NL_EN "vf_nl_en"
 139
 140 /* Enable extending memsegs when creating a MR. */
 141 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
 142
 143 /* Select port representors to instantiate. */
 144 #define MLX5_REPRESENTOR "representor"
 145
 146 /* Device parameter to configure the maximum number of dump files per queue. */
 147 #define MLX5_MAX_DUMP_FILES_NUM "max_dump_files_num"
 148
 149 /* Configure timeout of LRO session (in microseconds). */
 150 #define MLX5_LRO_TIMEOUT_USEC "lro_timeout_usec"
 151
 152 #ifndef HAVE_IBV_MLX5_MOD_MPW
 153 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
 154 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
 155 #endif
 156
 157 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
 158 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
 159 #endif
 160
 161 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
 162
 163 /* Shared memory between primary and secondary processes. */
 164 struct mlx5_shared_data *mlx5_shared_data;
 165
 166 /* Spinlock for mlx5_shared_data allocation. */
 167 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
 168
 169 /* Process local data for secondary processes. */
 170 static struct mlx5_local_data mlx5_local_data;
 171
 172 /** Driver-specific log messages type. */
 173 int mlx5_logtype;
 174
 175 /** Data associated with devices to spawn. */
 176 struct mlx5_dev_spawn_data {
 177         uint32_t ifindex; /**< Network interface index. */
 178         uint32_t max_port; /**< IB device maximal port index. */
 179         uint32_t ibv_port; /**< IB device physical port index. */
 180         int pf_bond; /**< bonding device PF index. < 0 - no bonding */
 181         struct mlx5_switch_info info; /**< Switch information. */
 182         struct ibv_device *ibv_dev; /**< Associated IB device. */
 183         struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
 184         struct rte_pci_device *pci_dev; /**< Backend PCI device. */
 185 };
 186
 187 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
 188 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
 189
 190 #define MLX5_FLOW_MIN_ID_POOL_SIZE 512
 191 #define MLX5_ID_GENERATION_ARRAY_FACTOR 16
 192
 193 #define MLX5_FLOW_TABLE_HLIST_ARRAY_SIZE 4096
 194 #define MLX5_TAGS_HLIST_ARRAY_SIZE 8192
 195
 196 /**
 197  * Allocate ID pool structure.
 198  *
 199  * @return
 200  *   Pointer to pool object, NULL value otherwise.
 201  */
 202 struct mlx5_flow_id_pool *
 203 mlx5_flow_id_pool_alloc(void)
 204 {
 205         struct mlx5_flow_id_pool *pool;
 206         void *mem;
 207
 208         pool = rte_zmalloc("id pool allocation", sizeof(*pool),
 209                            RTE_CACHE_LINE_SIZE);
 210         if (!pool) {
 211                 DRV_LOG(ERR, "can't allocate id pool");
 212                 rte_errno  = ENOMEM;
 213                 return NULL;
 214         }
 215         mem = rte_zmalloc("", MLX5_FLOW_MIN_ID_POOL_SIZE * sizeof(uint32_t),
 216                           RTE_CACHE_LINE_SIZE);
 217         if (!mem) {
 218                 DRV_LOG(ERR, "can't allocate mem for id pool");
 219                 rte_errno  = ENOMEM;
 220                 goto error;
 221         }
 222         pool->free_arr = mem;
 223         pool->curr = pool->free_arr;
 224         pool->last = pool->free_arr + MLX5_FLOW_MIN_ID_POOL_SIZE;
 225         pool->base_index = 0;
 226         return pool;
 227 error:
 228         rte_free(pool);
 229         return NULL;
 230 }
 231
 232 /**
 233  * Release ID pool structure.
 234  *
 235  * @param[in] pool
 236  *   Pointer to flow id pool object to free.
 237  */
 238 void
 239 mlx5_flow_id_pool_release(struct mlx5_flow_id_pool *pool)
 240 {
 241         rte_free(pool->free_arr);
 242         rte_free(pool);
 243 }
 244
 245 /**
 246  * Generate ID.
 247  *
 248  * @param[in] pool
 249  *   Pointer to flow id pool.
 250  * @param[out] id
 251  *   The generated ID.
 252  *
 253  * @return
 254  *   0 on success, error value otherwise.
 255  */
 256 uint32_t
 257 mlx5_flow_id_get(struct mlx5_flow_id_pool *pool, uint32_t *id)
 258 {
 259         if (pool->curr == pool->free_arr) {
 260                 if (pool->base_index == UINT32_MAX) {
 261                         rte_errno  = ENOMEM;
 262                         DRV_LOG(ERR, "no free id");
 263                         return -rte_errno;
 264                 }
 265                 *id = ++pool->base_index;
 266                 return 0;
 267         }
 268         *id = *(--pool->curr);
 269         return 0;
 270 }
 271
 272 /**
 273  * Release ID.
 274  *
 275  * @param[in] pool
 276  *   Pointer to flow id pool.
 277  * @param[out] id
 278  *   The generated ID.
 279  *
 280  * @return
 281  *   0 on success, error value otherwise.
 282  */
 283 uint32_t
 284 mlx5_flow_id_release(struct mlx5_flow_id_pool *pool, uint32_t id)
 285 {
 286         uint32_t size;
 287         uint32_t size2;
 288         void *mem;
 289
 290         if (pool->curr == pool->last) {
 291                 size = pool->curr - pool->free_arr;
 292                 size2 = size * MLX5_ID_GENERATION_ARRAY_FACTOR;
 293                 assert(size2 > size);
 294                 mem = rte_malloc("", size2 * sizeof(uint32_t), 0);
 295                 if (!mem) {
 296                         DRV_LOG(ERR, "can't allocate mem for id pool");
 297                         rte_errno  = ENOMEM;
 298                         return -rte_errno;
 299                 }
 300                 memcpy(mem, pool->free_arr, size * sizeof(uint32_t));
 301                 rte_free(pool->free_arr);
 302                 pool->free_arr = mem;
 303                 pool->curr = pool->free_arr + size;
 304                 pool->last = pool->free_arr + size2;
 305         }
 306         *pool->curr = id;
 307         pool->curr++;
 308         return 0;
 309 }
 310
 311 /**
 312  * Initialize the counters management structure.
 313  *
 314  * @param[in] sh
 315  *   Pointer to mlx5_ibv_shared object to free
 316  */
 317 static void
 318 mlx5_flow_counters_mng_init(struct mlx5_ibv_shared *sh)
 319 {
 320         uint8_t i;
 321
 322         TAILQ_INIT(&sh->cmng.flow_counters);
 323         for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i)
 324                 TAILQ_INIT(&sh->cmng.ccont[i].pool_list);
 325 }
 326
 327 /**
 328  * Destroy all the resources allocated for a counter memory management.
 329  *
 330  * @param[in] mng
 331  *   Pointer to the memory management structure.
 332  */
 333 static void
 334 mlx5_flow_destroy_counter_stat_mem_mng(struct mlx5_counter_stats_mem_mng *mng)
 335 {
 336         uint8_t *mem = (uint8_t *)(uintptr_t)mng->raws[0].data;
 337
 338         LIST_REMOVE(mng, next);
 339         claim_zero(mlx5_devx_cmd_destroy(mng->dm));
 340         claim_zero(mlx5_glue->devx_umem_dereg(mng->umem));
 341         rte_free(mem);
 342 }
 343
 344 /**
 345  * Close and release all the resources of the counters management.
 346  *
 347  * @param[in] sh
 348  *   Pointer to mlx5_ibv_shared object to free.
 349  */
 350 static void
 351 mlx5_flow_counters_mng_close(struct mlx5_ibv_shared *sh)
 352 {
 353         struct mlx5_counter_stats_mem_mng *mng;
 354         uint8_t i;
 355         int j;
 356         int retries = 1024;
 357
 358         rte_errno = 0;
 359         while (--retries) {
 360                 rte_eal_alarm_cancel(mlx5_flow_query_alarm, sh);
 361                 if (rte_errno != EINPROGRESS)
 362                         break;
 363                 rte_pause();
 364         }
 365         for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i) {
 366                 struct mlx5_flow_counter_pool *pool;
 367                 uint32_t batch = !!(i % 2);
 368
 369                 if (!sh->cmng.ccont[i].pools)
 370                         continue;
 371                 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
 372                 while (pool) {
 373                         if (batch) {
 374                                 if (pool->min_dcs)
 375                                         claim_zero
 376                                         (mlx5_devx_cmd_destroy(pool->min_dcs));
 377                         }
 378                         for (j = 0; j < MLX5_COUNTERS_PER_POOL; ++j) {
 379                                 if (pool->counters_raw[j].action)
 380                                         claim_zero
 381                                         (mlx5_glue->destroy_flow_action
 382                                                (pool->counters_raw[j].action));
 383                                 if (!batch && pool->counters_raw[j].dcs)
 384                                         claim_zero(mlx5_devx_cmd_destroy
 385                                                   (pool->counters_raw[j].dcs));
 386                         }
 387                         TAILQ_REMOVE(&sh->cmng.ccont[i].pool_list, pool,
 388                                      next);
 389                         rte_free(pool);
 390                         pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
 391                 }
 392                 rte_free(sh->cmng.ccont[i].pools);
 393         }
 394         mng = LIST_FIRST(&sh->cmng.mem_mngs);
 395         while (mng) {
 396                 mlx5_flow_destroy_counter_stat_mem_mng(mng);
 397                 mng = LIST_FIRST(&sh->cmng.mem_mngs);
 398         }
 399         memset(&sh->cmng, 0, sizeof(sh->cmng));
 400 }
 401
 402 /**
 403  * Extract pdn of PD object using DV API.
 404  *
 405  * @param[in] pd
 406  *   Pointer to the verbs PD object.
 407  * @param[out] pdn
 408  *   Pointer to the PD object number variable.
 409  *
 410  * @return
 411  *   0 on success, error value otherwise.
 412  */
 413 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 414 static int
 415 mlx5_get_pdn(struct ibv_pd *pd __rte_unused, uint32_t *pdn __rte_unused)
 416 {
 417         struct mlx5dv_obj obj;
 418         struct mlx5dv_pd pd_info;
 419         int ret = 0;
 420
 421         obj.pd.in = pd;
 422         obj.pd.out = &pd_info;
 423         ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
 424         if (ret) {
 425                 DRV_LOG(DEBUG, "Fail to get PD object info");
 426                 return ret;
 427         }
 428         *pdn = pd_info.pdn;
 429         return 0;
 430 }
 431 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
 432
 433 static int
 434 mlx5_config_doorbell_mapping_env(const struct mlx5_dev_config *config)
 435 {
 436         char *env;
 437         int value;
 438
 439         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 440         /* Get environment variable to store. */
 441         env = getenv(MLX5_SHUT_UP_BF);
 442         value = env ? !!strcmp(env, "0") : MLX5_ARG_UNSET;
 443         if (config->dbnc == MLX5_ARG_UNSET)
 444                 setenv(MLX5_SHUT_UP_BF, MLX5_SHUT_UP_BF_DEFAULT, 1);
 445         else
 446                 setenv(MLX5_SHUT_UP_BF,
 447                        config->dbnc == MLX5_TXDB_NCACHED ? "1" : "0", 1);
 448         return value;
 449 }
 450
 451 static void
 452 mlx5_restore_doorbell_mapping_env(int value)
 453 {
 454         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 455         /* Restore the original environment variable state. */
 456         if (value == MLX5_ARG_UNSET)
 457                 unsetenv(MLX5_SHUT_UP_BF);
 458         else
 459                 setenv(MLX5_SHUT_UP_BF, value ? "1" : "0", 1);
 460 }
 461
 462 /**
 463  * Allocate shared IB device context. If there is multiport device the
 464  * master and representors will share this context, if there is single
 465  * port dedicated IB device, the context will be used by only given
 466  * port due to unification.
 467  *
 468  * Routine first searches the context for the specified IB device name,
 469  * if found the shared context assumed and reference counter is incremented.
 470  * If no context found the new one is created and initialized with specified
 471  * IB device context and parameters.
 472  *
 473  * @param[in] spawn
 474  *   Pointer to the IB device attributes (name, port, etc).
 475  * @param[in] config
 476  *   Pointer to device configuration structure.
 477  *
 478  * @return
 479  *   Pointer to mlx5_ibv_shared object on success,
 480  *   otherwise NULL and rte_errno is set.
 481  */
 482 static struct mlx5_ibv_shared *
 483 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn,
 484                         const struct mlx5_dev_config *config)
 485 {
 486         struct mlx5_ibv_shared *sh;
 487         int dbmap_env;
 488         int err = 0;
 489         uint32_t i;
 490 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 491         struct mlx5_devx_tis_attr tis_attr = { 0 };
 492 #endif
 493
 494         assert(spawn);
 495         /* Secondary process should not create the shared context. */
 496         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 497         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 498         /* Search for IB context by device name. */
 499         LIST_FOREACH(sh, &mlx5_ibv_list, next) {
 500                 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
 501                         sh->refcnt++;
 502                         goto exit;
 503                 }
 504         }
 505         /* No device found, we have to create new shared context. */
 506         assert(spawn->max_port);
 507         sh = rte_zmalloc("ethdev shared ib context",
 508                          sizeof(struct mlx5_ibv_shared) +
 509                          spawn->max_port *
 510                          sizeof(struct mlx5_ibv_shared_port),
 511                          RTE_CACHE_LINE_SIZE);
 512         if (!sh) {
 513                 DRV_LOG(ERR, "shared context allocation failure");
 514                 rte_errno  = ENOMEM;
 515                 goto exit;
 516         }
 517         /*
 518          * Configure environment variable "MLX5_BF_SHUT_UP"
 519          * before the device creation. The rdma_core library
 520          * checks the variable at device creation and
 521          * stores the result internally.
 522          */
 523         dbmap_env = mlx5_config_doorbell_mapping_env(config);
 524         /* Try to open IB device with DV first, then usual Verbs. */
 525         errno = 0;
 526         sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
 527         if (sh->ctx) {
 528                 sh->devx = 1;
 529                 DRV_LOG(DEBUG, "DevX is supported");
 530                 /* The device is created, no need for environment. */
 531                 mlx5_restore_doorbell_mapping_env(dbmap_env);
 532         } else {
 533                 /* The environment variable is still configured. */
 534                 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
 535                 err = errno ? errno : ENODEV;
 536                 /*
 537                  * The environment variable is not needed anymore,
 538                  * all device creation attempts are completed.
 539                  */
 540                 mlx5_restore_doorbell_mapping_env(dbmap_env);
 541                 if (!sh->ctx)
 542                         goto error;
 543                 DRV_LOG(DEBUG, "DevX is NOT supported");
 544         }
 545         err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
 546         if (err) {
 547                 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
 548                 goto error;
 549         }
 550         sh->refcnt = 1;
 551         sh->max_port = spawn->max_port;
 552         strncpy(sh->ibdev_name, sh->ctx->device->name,
 553                 sizeof(sh->ibdev_name));
 554         strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
 555                 sizeof(sh->ibdev_path));
 556         pthread_mutex_init(&sh->intr_mutex, NULL);
 557         /*
 558          * Setting port_id to max unallowed value means
 559          * there is no interrupt subhandler installed for
 560          * the given port index i.
 561          */
 562         for (i = 0; i < sh->max_port; i++) {
 563                 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
 564                 sh->port[i].devx_ih_port_id = RTE_MAX_ETHPORTS;
 565         }
 566         sh->pd = mlx5_glue->alloc_pd(sh->ctx);
 567         if (sh->pd == NULL) {
 568                 DRV_LOG(ERR, "PD allocation failure");
 569                 err = ENOMEM;
 570                 goto error;
 571         }
 572 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
 573         if (sh->devx) {
 574                 err = mlx5_get_pdn(sh->pd, &sh->pdn);
 575                 if (err) {
 576                         DRV_LOG(ERR, "Fail to extract pdn from PD");
 577                         goto error;
 578                 }
 579                 sh->td = mlx5_devx_cmd_create_td(sh->ctx);
 580                 if (!sh->td) {
 581                         DRV_LOG(ERR, "TD allocation failure");
 582                         err = ENOMEM;
 583                         goto error;
 584                 }
 585                 tis_attr.transport_domain = sh->td->id;
 586                 sh->tis = mlx5_devx_cmd_create_tis(sh->ctx, &tis_attr);
 587                 if (!sh->tis) {
 588                         DRV_LOG(ERR, "TIS allocation failure");
 589                         err = ENOMEM;
 590                         goto error;
 591                 }
 592         }
 593         sh->flow_id_pool = mlx5_flow_id_pool_alloc();
 594         if (!sh->flow_id_pool) {
 595                 DRV_LOG(ERR, "can't create flow id pool");
 596                 err = ENOMEM;
 597                 goto error;
 598         }
 599 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
 600         /*
 601          * Once the device is added to the list of memory event
 602          * callback, its global MR cache table cannot be expanded
 603          * on the fly because of deadlock. If it overflows, lookup
 604          * should be done by searching MR list linearly, which is slow.
 605          *
 606          * At this point the device is not added to the memory
 607          * event list yet, context is just being created.
 608          */
 609         err = mlx5_mr_btree_init(&sh->mr.cache,
 610                                  MLX5_MR_BTREE_CACHE_N * 2,
 611                                  spawn->pci_dev->device.numa_node);
 612         if (err) {
 613                 err = rte_errno;
 614                 goto error;
 615         }
 616         mlx5_flow_counters_mng_init(sh);
 617         /* Add device to memory callback list. */
 618         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
 619         LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
 620                          sh, mem_event_cb);
 621         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
 622         /* Add context to the global device list. */
 623         LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
 624 exit:
 625         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 626         return sh;
 627 error:
 628         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 629         assert(sh);
 630         if (sh->tis)
 631                 claim_zero(mlx5_devx_cmd_destroy(sh->tis));
 632         if (sh->td)
 633                 claim_zero(mlx5_devx_cmd_destroy(sh->td));
 634         if (sh->pd)
 635                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 636         if (sh->ctx)
 637                 claim_zero(mlx5_glue->close_device(sh->ctx));
 638         if (sh->flow_id_pool)
 639                 mlx5_flow_id_pool_release(sh->flow_id_pool);
 640         rte_free(sh);
 641         assert(err > 0);
 642         rte_errno = err;
 643         return NULL;
 644 }
 645
 646 /**
 647  * Free shared IB device context. Decrement counter and if zero free
 648  * all allocated resources and close handles.
 649  *
 650  * @param[in] sh
 651  *   Pointer to mlx5_ibv_shared object to free
 652  */
 653 static void
 654 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
 655 {
 656         pthread_mutex_lock(&mlx5_ibv_list_mutex);
 657 #ifndef NDEBUG
 658         /* Check the object presence in the list. */
 659         struct mlx5_ibv_shared *lctx;
 660
 661         LIST_FOREACH(lctx, &mlx5_ibv_list, next)
 662                 if (lctx == sh)
 663                         break;
 664         assert(lctx);
 665         if (lctx != sh) {
 666                 DRV_LOG(ERR, "Freeing non-existing shared IB context");
 667                 goto exit;
 668         }
 669 #endif
 670         assert(sh);
 671         assert(sh->refcnt);
 672         /* Secondary process should not free the shared context. */
 673         assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
 674         if (--sh->refcnt)
 675                 goto exit;
 676         /* Release created Memory Regions. */
 677         mlx5_mr_release(sh);
 678         /* Remove from memory callback device list. */
 679         rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
 680         LIST_REMOVE(sh, mem_event_cb);
 681         rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
 682         /* Remove context from the global device list. */
 683         LIST_REMOVE(sh, next);
 684         /*
 685          *  Ensure there is no async event handler installed.
 686          *  Only primary process handles async device events.
 687          **/
 688         mlx5_flow_counters_mng_close(sh);
 689         assert(!sh->intr_cnt);
 690         if (sh->intr_cnt)
 691                 mlx5_intr_callback_unregister
 692                         (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
 693 #ifdef HAVE_MLX5_DEVX_ASYNC_SUPPORT
 694         if (sh->devx_intr_cnt) {
 695                 if (sh->intr_handle_devx.fd)
 696                         rte_intr_callback_unregister(&sh->intr_handle_devx,
 697                                           mlx5_dev_interrupt_handler_devx, sh);
 698                 if (sh->devx_comp)
 699                         mlx5dv_devx_destroy_cmd_comp(sh->devx_comp);
 700         }
 701 #endif
 702         pthread_mutex_destroy(&sh->intr_mutex);
 703         if (sh->pd)
 704                 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
 705         if (sh->tis)
 706                 claim_zero(mlx5_devx_cmd_destroy(sh->tis));
 707         if (sh->td)
 708                 claim_zero(mlx5_devx_cmd_destroy(sh->td));
 709         if (sh->ctx)
 710                 claim_zero(mlx5_glue->close_device(sh->ctx));
 711         if (sh->flow_id_pool)
 712                 mlx5_flow_id_pool_release(sh->flow_id_pool);
 713         rte_free(sh);
 714 exit:
 715         pthread_mutex_unlock(&mlx5_ibv_list_mutex);
 716 }
 717
 718 /**
 719  * Destroy table hash list and all the root entries per domain.
 720  *
 721  * @param[in] priv
 722  *   Pointer to the private device data structure.
 723  */
 724 static void
 725 mlx5_free_table_hash_list(struct mlx5_priv *priv)
 726 {
 727         struct mlx5_ibv_shared *sh = priv->sh;
 728         struct mlx5_flow_tbl_data_entry *tbl_data;
 729         union mlx5_flow_tbl_key table_key = {
 730                 {
 731                         .table_id = 0,
 732                         .reserved = 0,
 733                         .domain = 0,
 734                         .direction = 0,
 735                 }
 736         };
 737         struct mlx5_hlist_entry *pos;
 738
 739         if (!sh->flow_tbls)
 740                 return;
 741         pos = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64);
 742         if (pos) {
 743                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
 744                                         entry);
 745                 assert(tbl_data);
 746                 mlx5_hlist_remove(sh->flow_tbls, pos);
 747                 rte_free(tbl_data);
 748         }
 749         table_key.direction = 1;
 750         pos = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64);
 751         if (pos) {
 752                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
 753                                         entry);
 754                 assert(tbl_data);
 755                 mlx5_hlist_remove(sh->flow_tbls, pos);
 756                 rte_free(tbl_data);
 757         }
 758         table_key.direction = 0;
 759         table_key.domain = 1;
 760         pos = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64);
 761         if (pos) {
 762                 tbl_data = container_of(pos, struct mlx5_flow_tbl_data_entry,
 763                                         entry);
 764                 assert(tbl_data);
 765                 mlx5_hlist_remove(sh->flow_tbls, pos);
 766                 rte_free(tbl_data);
 767         }
 768         mlx5_hlist_destroy(sh->flow_tbls, NULL, NULL);
 769 }
 770
 771 /**
 772  * Initialize flow table hash list and create the root tables entry
 773  * for each domain.
 774  *
 775  * @param[in] priv
 776  *   Pointer to the private device data structure.
 777  *
 778  * @return
 779  *   Zero on success, positive error code otherwise.
 780  */
 781 static int
 782 mlx5_alloc_table_hash_list(struct mlx5_priv *priv)
 783 {
 784         struct mlx5_ibv_shared *sh = priv->sh;
 785         char s[MLX5_HLIST_NAMESIZE];
 786         int err = 0;
 787
 788         assert(sh);
 789         snprintf(s, sizeof(s), "%s_flow_table", priv->sh->ibdev_name);
 790         sh->flow_tbls = mlx5_hlist_create(s, MLX5_FLOW_TABLE_HLIST_ARRAY_SIZE);
 791         if (!sh->flow_tbls) {
 792                 DRV_LOG(ERR, "flow tables with hash creation failed.\n");
 793                 err = ENOMEM;
 794                 return err;
 795         }
 796 #ifndef HAVE_MLX5DV_DR
 797         /*
 798          * In case we have not DR support, the zero tables should be created
 799          * because DV expect to see them even if they cannot be created by
 800          * RDMA-CORE.
 801          */
 802         union mlx5_flow_tbl_key table_key = {
 803                 {
 804                         .table_id = 0,
 805                         .reserved = 0,
 806                         .domain = 0,
 807                         .direction = 0,
 808                 }
 809         };
 810         struct mlx5_flow_tbl_data_entry *tbl_data = rte_zmalloc(NULL,
 811                                                           sizeof(*tbl_data), 0);
 812
 813         if (!tbl_data) {
 814                 err = ENOMEM;
 815                 goto error;
 816         }
 817         tbl_data->entry.key = table_key.v64;
 818         err = mlx5_hlist_insert(sh->flow_tbls, &tbl_data->entry);
 819         if (err)
 820                 goto error;
 821         rte_atomic32_init(&tbl_data->tbl.refcnt);
 822         rte_atomic32_inc(&tbl_data->tbl.refcnt);
 823         table_key.direction = 1;
 824         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
 825         if (!tbl_data) {
 826                 err = ENOMEM;
 827                 goto error;
 828         }
 829         tbl_data->entry.key = table_key.v64;
 830         err = mlx5_hlist_insert(sh->flow_tbls, &tbl_data->entry);
 831         if (err)
 832                 goto error;
 833         rte_atomic32_init(&tbl_data->tbl.refcnt);
 834         rte_atomic32_inc(&tbl_data->tbl.refcnt);
 835         table_key.direction = 0;
 836         table_key.domain = 1;
 837         tbl_data = rte_zmalloc(NULL, sizeof(*tbl_data), 0);
 838         if (!tbl_data) {
 839                 err = ENOMEM;
 840                 goto error;
 841         }
 842         tbl_data->entry.key = table_key.v64;
 843         err = mlx5_hlist_insert(sh->flow_tbls, &tbl_data->entry);
 844         if (err)
 845                 goto error;
 846         rte_atomic32_init(&tbl_data->tbl.refcnt);
 847         rte_atomic32_inc(&tbl_data->tbl.refcnt);
 848         return err;
 849 error:
 850         mlx5_free_table_hash_list(priv);
 851 #endif /* HAVE_MLX5DV_DR */
 852         return err;
 853 }
 854
 855 /**
 856  * Initialize DR related data within private structure.
 857  * Routine checks the reference counter and does actual
 858  * resources creation/initialization only if counter is zero.
 859  *
 860  * @param[in] priv
 861  *   Pointer to the private device data structure.
 862  *
 863  * @return
 864  *   Zero on success, positive error code otherwise.
 865  */
 866 static int
 867 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
 868 {
 869         struct mlx5_ibv_shared *sh = priv->sh;
 870         char s[MLX5_HLIST_NAMESIZE];
 871         int err = 0;
 872
 873         if (!sh->flow_tbls)
 874                 err = mlx5_alloc_table_hash_list(priv);
 875         else
 876                 DRV_LOG(DEBUG, "sh->flow_tbls[%p] already created, reuse\n",
 877                         (void *)sh->flow_tbls);
 878         if (err)
 879                 return err;
 880         /* Create tags hash list table. */
 881         snprintf(s, sizeof(s), "%s_tags", sh->ibdev_name);
 882         sh->tag_table = mlx5_hlist_create(s, MLX5_TAGS_HLIST_ARRAY_SIZE);
 883         if (!sh->tag_table) {
 884                 DRV_LOG(ERR, "tags with hash creation failed.\n");
 885                 err = ENOMEM;
 886                 goto error;
 887         }
 888 #ifdef HAVE_MLX5DV_DR
 889         void *domain;
 890
 891         if (sh->dv_refcnt) {
 892                 /* Shared DV/DR structures is already initialized. */
 893                 sh->dv_refcnt++;
 894                 priv->dr_shared = 1;
 895                 return 0;
 896         }
 897         /* Reference counter is zero, we should initialize structures. */
 898         domain = mlx5_glue->dr_create_domain(sh->ctx,
 899                                              MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
 900         if (!domain) {
 901                 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
 902                 err = errno;
 903                 goto error;
 904         }
 905         sh->rx_domain = domain;
 906         domain = mlx5_glue->dr_create_domain(sh->ctx,
 907                                              MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
 908         if (!domain) {
 909                 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
 910                 err = errno;
 911                 goto error;
 912         }
 913         pthread_mutex_init(&sh->dv_mutex, NULL);
 914         sh->tx_domain = domain;
 915 #ifdef HAVE_MLX5DV_DR_ESWITCH
 916         if (priv->config.dv_esw_en) {
 917                 domain  = mlx5_glue->dr_create_domain
 918                         (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
 919                 if (!domain) {
 920                         DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
 921                         err = errno;
 922                         goto error;
 923                 }
 924                 sh->fdb_domain = domain;
 925                 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
 926         }
 927 #endif
 928         sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
 929 #endif /* HAVE_MLX5DV_DR */
 930         sh->dv_refcnt++;
 931         priv->dr_shared = 1;
 932         return 0;
 933 error:
 934         /* Rollback the created objects. */
 935         if (sh->rx_domain) {
 936                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 937                 sh->rx_domain = NULL;
 938         }
 939         if (sh->tx_domain) {
 940                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 941                 sh->tx_domain = NULL;
 942         }
 943         if (sh->fdb_domain) {
 944                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 945                 sh->fdb_domain = NULL;
 946         }
 947         if (sh->esw_drop_action) {
 948                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 949                 sh->esw_drop_action = NULL;
 950         }
 951         if (sh->pop_vlan_action) {
 952                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
 953                 sh->pop_vlan_action = NULL;
 954         }
 955         if (sh->tag_table) {
 956                 /* tags should be destroyed with flow before. */
 957                 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
 958                 sh->tag_table = NULL;
 959         }
 960         mlx5_free_table_hash_list(priv);
 961         return err;
 962 }
 963
 964 /**
 965  * Destroy DR related data within private structure.
 966  *
 967  * @param[in] priv
 968  *   Pointer to the private device data structure.
 969  */
 970 static void
 971 mlx5_free_shared_dr(struct mlx5_priv *priv)
 972 {
 973         struct mlx5_ibv_shared *sh;
 974
 975         if (!priv->dr_shared)
 976                 return;
 977         priv->dr_shared = 0;
 978         sh = priv->sh;
 979         assert(sh);
 980 #ifdef HAVE_MLX5DV_DR
 981         assert(sh->dv_refcnt);
 982         if (sh->dv_refcnt && --sh->dv_refcnt)
 983                 return;
 984         if (sh->rx_domain) {
 985                 mlx5_glue->dr_destroy_domain(sh->rx_domain);
 986                 sh->rx_domain = NULL;
 987         }
 988         if (sh->tx_domain) {
 989                 mlx5_glue->dr_destroy_domain(sh->tx_domain);
 990                 sh->tx_domain = NULL;
 991         }
 992 #ifdef HAVE_MLX5DV_DR_ESWITCH
 993         if (sh->fdb_domain) {
 994                 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
 995                 sh->fdb_domain = NULL;
 996         }
 997         if (sh->esw_drop_action) {
 998                 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
 999                 sh->esw_drop_action = NULL;
1000         }
1001 #endif
1002         if (sh->pop_vlan_action) {
1003                 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
1004                 sh->pop_vlan_action = NULL;
1005         }
1006         pthread_mutex_destroy(&sh->dv_mutex);
1007 #endif /* HAVE_MLX5DV_DR */
1008         if (sh->tag_table) {
1009                 /* tags should be destroyed with flow before. */
1010                 mlx5_hlist_destroy(sh->tag_table, NULL, NULL);
1011                 sh->tag_table = NULL;
1012         }
1013         mlx5_free_table_hash_list(priv);
1014 }
1015
1016 /**
1017  * Initialize shared data between primary and secondary process.
1018  *
1019  * A memzone is reserved by primary process and secondary processes attach to
1020  * the memzone.
1021  *
1022  * @return
1023  *   0 on success, a negative errno value otherwise and rte_errno is set.
1024  */
1025 static int
1026 mlx5_init_shared_data(void)
1027 {
1028         const struct rte_memzone *mz;
1029         int ret = 0;
1030
1031         rte_spinlock_lock(&mlx5_shared_data_lock);
1032         if (mlx5_shared_data == NULL) {
1033                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
1034                         /* Allocate shared memory. */
1035                         mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
1036                                                  sizeof(*mlx5_shared_data),
1037                                                  SOCKET_ID_ANY, 0);
1038                         if (mz == NULL) {
1039                                 DRV_LOG(ERR,
1040                                         "Cannot allocate mlx5 shared data");
1041                                 ret = -rte_errno;
1042                                 goto error;
1043                         }
1044                         mlx5_shared_data = mz->addr;
1045                         memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
1046                         rte_spinlock_init(&mlx5_shared_data->lock);
1047                 } else {
1048                         /* Lookup allocated shared memory. */
1049                         mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
1050                         if (mz == NULL) {
1051                                 DRV_LOG(ERR,
1052                                         "Cannot attach mlx5 shared data");
1053                                 ret = -rte_errno;
1054                                 goto error;
1055                         }
1056                         mlx5_shared_data = mz->addr;
1057                         memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
1058                 }
1059         }
1060 error:
1061         rte_spinlock_unlock(&mlx5_shared_data_lock);
1062         return ret;
1063 }
1064
1065 /**
1066  * Retrieve integer value from environment variable.
1067  *
1068  * @param[in] name
1069  *   Environment variable name.
1070  *
1071  * @return
1072  *   Integer value, 0 if the variable is not set.
1073  */
1074 int
1075 mlx5_getenv_int(const char *name)
1076 {
1077         const char *val = getenv(name);
1078
1079         if (val == NULL)
1080                 return 0;
1081         return atoi(val);
1082 }
1083
1084 /**
1085  * Verbs callback to allocate a memory. This function should allocate the space
1086  * according to the size provided residing inside a huge page.
1087  * Please note that all allocation must respect the alignment from libmlx5
1088  * (i.e. currently sysconf(_SC_PAGESIZE)).
1089  *
1090  * @param[in] size
1091  *   The size in bytes of the memory to allocate.
1092  * @param[in] data
1093  *   A pointer to the callback data.
1094  *
1095  * @return
1096  *   Allocated buffer, NULL otherwise and rte_errno is set.
1097  */
1098 static void *
1099 mlx5_alloc_verbs_buf(size_t size, void *data)
1100 {
1101         struct mlx5_priv *priv = data;
1102         void *ret;
1103         size_t alignment = sysconf(_SC_PAGESIZE);
1104         unsigned int socket = SOCKET_ID_ANY;
1105
1106         if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
1107                 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
1108
1109                 socket = ctrl->socket;
1110         } else if (priv->verbs_alloc_ctx.type ==
1111                    MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
1112                 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
1113
1114                 socket = ctrl->socket;
1115         }
1116         assert(data != NULL);
1117         ret = rte_malloc_socket(__func__, size, alignment, socket);
1118         if (!ret && size)
1119                 rte_errno = ENOMEM;
1120         return ret;
1121 }
1122
1123 /**
1124  * Verbs callback to free a memory.
1125  *
1126  * @param[in] ptr
1127  *   A pointer to the memory to free.
1128  * @param[in] data
1129  *   A pointer to the callback data.
1130  */
1131 static void
1132 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
1133 {
1134         assert(data != NULL);
1135         rte_free(ptr);
1136 }
1137
1138 /**
1139  * DPDK callback to add udp tunnel port
1140  *
1141  * @param[in] dev
1142  *   A pointer to eth_dev
1143  * @param[in] udp_tunnel
1144  *   A pointer to udp tunnel
1145  *
1146  * @return
1147  *   0 on valid udp ports and tunnels, -ENOTSUP otherwise.
1148  */
1149 int
1150 mlx5_udp_tunnel_port_add(struct rte_eth_dev *dev __rte_unused,
1151                          struct rte_eth_udp_tunnel *udp_tunnel)
1152 {
1153         assert(udp_tunnel != NULL);
1154         if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN &&
1155             udp_tunnel->udp_port == 4789)
1156                 return 0;
1157         if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN_GPE &&
1158             udp_tunnel->udp_port == 4790)
1159                 return 0;
1160         return -ENOTSUP;
1161 }
1162
1163 /**
1164  * Initialize process private data structure.
1165  *
1166  * @param dev
1167  *   Pointer to Ethernet device structure.
1168  *
1169  * @return
1170  *   0 on success, a negative errno value otherwise and rte_errno is set.
1171  */
1172 int
1173 mlx5_proc_priv_init(struct rte_eth_dev *dev)
1174 {
1175         struct mlx5_priv *priv = dev->data->dev_private;
1176         struct mlx5_proc_priv *ppriv;
1177         size_t ppriv_size;
1178
1179         /*
1180          * UAR register table follows the process private structure. BlueFlame
1181          * registers for Tx queues are stored in the table.
1182          */
1183         ppriv_size =
1184                 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
1185         ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
1186                                   RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1187         if (!ppriv) {
1188                 rte_errno = ENOMEM;
1189                 return -rte_errno;
1190         }
1191         ppriv->uar_table_sz = ppriv_size;
1192         dev->process_private = ppriv;
1193         return 0;
1194 }
1195
1196 /**
1197  * Un-initialize process private data structure.
1198  *
1199  * @param dev
1200  *   Pointer to Ethernet device structure.
1201  */
1202 static void
1203 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
1204 {
1205         if (!dev->process_private)
1206                 return;
1207         rte_free(dev->process_private);
1208         dev->process_private = NULL;
1209 }
1210
1211 /**
1212  * DPDK callback to close the device.
1213  *
1214  * Destroy all queues and objects, free memory.
1215  *
1216  * @param dev
1217  *   Pointer to Ethernet device structure.
1218  */
1219 static void
1220 mlx5_dev_close(struct rte_eth_dev *dev)
1221 {
1222         struct mlx5_priv *priv = dev->data->dev_private;
1223         unsigned int i;
1224         int ret;
1225
1226         DRV_LOG(DEBUG, "port %u closing device \"%s\"",
1227                 dev->data->port_id,
1228                 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
1229         /* In case mlx5_dev_stop() has not been called. */
1230         mlx5_dev_interrupt_handler_uninstall(dev);
1231         mlx5_dev_interrupt_handler_devx_uninstall(dev);
1232         mlx5_traffic_disable(dev);
1233         mlx5_flow_flush(dev, NULL);
1234         mlx5_flow_meter_flush(dev, NULL);
1235         /* Prevent crashes when queues are still in use. */
1236         dev->rx_pkt_burst = removed_rx_burst;
1237         dev->tx_pkt_burst = removed_tx_burst;
1238         rte_wmb();
1239         /* Disable datapath on secondary process. */
1240         mlx5_mp_req_stop_rxtx(dev);
1241         if (priv->rxqs != NULL) {
1242                 /* XXX race condition if mlx5_rx_burst() is still running. */
1243                 usleep(1000);
1244                 for (i = 0; (i != priv->rxqs_n); ++i)
1245                         mlx5_rxq_release(dev, i);
1246                 priv->rxqs_n = 0;
1247                 priv->rxqs = NULL;
1248         }
1249         if (priv->txqs != NULL) {
1250                 /* XXX race condition if mlx5_tx_burst() is still running. */
1251                 usleep(1000);
1252                 for (i = 0; (i != priv->txqs_n); ++i)
1253                         mlx5_txq_release(dev, i);
1254                 priv->txqs_n = 0;
1255                 priv->txqs = NULL;
1256         }
1257         mlx5_proc_priv_uninit(dev);
1258         if (priv->mreg_cp_tbl)
1259                 mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
1260         mlx5_mprq_free_mp(dev);
1261         mlx5_free_shared_dr(priv);
1262         if (priv->rss_conf.rss_key != NULL)
1263                 rte_free(priv->rss_conf.rss_key);
1264         if (priv->reta_idx != NULL)
1265                 rte_free(priv->reta_idx);
1266         if (priv->config.vf)
1267                 mlx5_nl_mac_addr_flush(dev);
1268         if (priv->nl_socket_route >= 0)
1269                 close(priv->nl_socket_route);
1270         if (priv->nl_socket_rdma >= 0)
1271                 close(priv->nl_socket_rdma);
1272         if (priv->vmwa_context)
1273                 mlx5_vlan_vmwa_exit(priv->vmwa_context);
1274         if (priv->sh) {
1275                 /*
1276                  * Free the shared context in last turn, because the cleanup
1277                  * routines above may use some shared fields, like
1278                  * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
1279                  * ifindex if Netlink fails.
1280                  */
1281                 mlx5_free_shared_ibctx(priv->sh);
1282                 priv->sh = NULL;
1283         }
1284         ret = mlx5_hrxq_verify(dev);
1285         if (ret)
1286                 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
1287                         dev->data->port_id);
1288         ret = mlx5_ind_table_obj_verify(dev);
1289         if (ret)
1290                 DRV_LOG(WARNING, "port %u some indirection table still remain",
1291                         dev->data->port_id);
1292         ret = mlx5_rxq_obj_verify(dev);
1293         if (ret)
1294                 DRV_LOG(WARNING, "port %u some Rx queue objects still remain",
1295                         dev->data->port_id);
1296         ret = mlx5_rxq_verify(dev);
1297         if (ret)
1298                 DRV_LOG(WARNING, "port %u some Rx queues still remain",
1299                         dev->data->port_id);
1300         ret = mlx5_txq_obj_verify(dev);
1301         if (ret)
1302                 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
1303                         dev->data->port_id);
1304         ret = mlx5_txq_verify(dev);
1305         if (ret)
1306                 DRV_LOG(WARNING, "port %u some Tx queues still remain",
1307                         dev->data->port_id);
1308         ret = mlx5_flow_verify(dev);
1309         if (ret)
1310                 DRV_LOG(WARNING, "port %u some flows still remain",
1311                         dev->data->port_id);
1312         if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1313                 unsigned int c = 0;
1314                 uint16_t port_id;
1315
1316                 MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
1317                         struct mlx5_priv *opriv =
1318                                 rte_eth_devices[port_id].data->dev_private;
1319
1320                         if (!opriv ||
1321                             opriv->domain_id != priv->domain_id ||
1322                             &rte_eth_devices[port_id] == dev)
1323                                 continue;
1324                         ++c;
1325                         break;
1326                 }
1327                 if (!c)
1328                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1329         }
1330         memset(priv, 0, sizeof(*priv));
1331         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1332         /*
1333          * Reset mac_addrs to NULL such that it is not freed as part of
1334          * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
1335          * it is freed when dev_private is freed.
1336          */
1337         dev->data->mac_addrs = NULL;
1338 }
1339
1340 const struct eth_dev_ops mlx5_dev_ops = {
1341         .dev_configure = mlx5_dev_configure,
1342         .dev_start = mlx5_dev_start,
1343         .dev_stop = mlx5_dev_stop,
1344         .dev_set_link_down = mlx5_set_link_down,
1345         .dev_set_link_up = mlx5_set_link_up,
1346         .dev_close = mlx5_dev_close,
1347         .promiscuous_enable = mlx5_promiscuous_enable,
1348         .promiscuous_disable = mlx5_promiscuous_disable,
1349         .allmulticast_enable = mlx5_allmulticast_enable,
1350         .allmulticast_disable = mlx5_allmulticast_disable,
1351         .link_update = mlx5_link_update,
1352         .stats_get = mlx5_stats_get,
1353         .stats_reset = mlx5_stats_reset,
1354         .xstats_get = mlx5_xstats_get,
1355         .xstats_reset = mlx5_xstats_reset,
1356         .xstats_get_names = mlx5_xstats_get_names,
1357         .fw_version_get = mlx5_fw_version_get,
1358         .dev_infos_get = mlx5_dev_infos_get,
1359         .read_clock = mlx5_read_clock,
1360         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1361         .vlan_filter_set = mlx5_vlan_filter_set,
1362         .rx_queue_setup = mlx5_rx_queue_setup,
1363         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
1364         .tx_queue_setup = mlx5_tx_queue_setup,
1365         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
1366         .rx_queue_release = mlx5_rx_queue_release,
1367         .tx_queue_release = mlx5_tx_queue_release,
1368         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1369         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1370         .mac_addr_remove = mlx5_mac_addr_remove,
1371         .mac_addr_add = mlx5_mac_addr_add,
1372         .mac_addr_set = mlx5_mac_addr_set,
1373         .set_mc_addr_list = mlx5_set_mc_addr_list,
1374         .mtu_set = mlx5_dev_set_mtu,
1375         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1376         .vlan_offload_set = mlx5_vlan_offload_set,
1377         .reta_update = mlx5_dev_rss_reta_update,
1378         .reta_query = mlx5_dev_rss_reta_query,
1379         .rss_hash_update = mlx5_rss_hash_update,
1380         .rss_hash_conf_get = mlx5_rss_hash_conf_get,
1381         .filter_ctrl = mlx5_dev_filter_ctrl,
1382         .rx_descriptor_status = mlx5_rx_descriptor_status,
1383         .tx_descriptor_status = mlx5_tx_descriptor_status,
1384         .rx_queue_count = mlx5_rx_queue_count,
1385         .rx_queue_intr_enable = mlx5_rx_intr_enable,
1386         .rx_queue_intr_disable = mlx5_rx_intr_disable,
1387         .is_removed = mlx5_is_removed,
1388         .udp_tunnel_port_add  = mlx5_udp_tunnel_port_add,
1389         .get_module_info = mlx5_get_module_info,
1390         .get_module_eeprom = mlx5_get_module_eeprom,
1391         .hairpin_cap_get = mlx5_hairpin_cap_get,
1392         .mtr_ops_get = mlx5_flow_meter_ops_get,
1393 };
1394
1395 /* Available operations from secondary process. */
1396 static const struct eth_dev_ops mlx5_dev_sec_ops = {
1397         .stats_get = mlx5_stats_get,
1398         .stats_reset = mlx5_stats_reset,
1399         .xstats_get = mlx5_xstats_get,
1400         .xstats_reset = mlx5_xstats_reset,
1401         .xstats_get_names = mlx5_xstats_get_names,
1402         .fw_version_get = mlx5_fw_version_get,
1403         .dev_infos_get = mlx5_dev_infos_get,
1404         .rx_descriptor_status = mlx5_rx_descriptor_status,
1405         .tx_descriptor_status = mlx5_tx_descriptor_status,
1406         .get_module_info = mlx5_get_module_info,
1407         .get_module_eeprom = mlx5_get_module_eeprom,
1408 };
1409
1410 /* Available operations in flow isolated mode. */
1411 const struct eth_dev_ops mlx5_dev_ops_isolate = {
1412         .dev_configure = mlx5_dev_configure,
1413         .dev_start = mlx5_dev_start,
1414         .dev_stop = mlx5_dev_stop,
1415         .dev_set_link_down = mlx5_set_link_down,
1416         .dev_set_link_up = mlx5_set_link_up,
1417         .dev_close = mlx5_dev_close,
1418         .promiscuous_enable = mlx5_promiscuous_enable,
1419         .promiscuous_disable = mlx5_promiscuous_disable,
1420         .allmulticast_enable = mlx5_allmulticast_enable,
1421         .allmulticast_disable = mlx5_allmulticast_disable,
1422         .link_update = mlx5_link_update,
1423         .stats_get = mlx5_stats_get,
1424         .stats_reset = mlx5_stats_reset,
1425         .xstats_get = mlx5_xstats_get,
1426         .xstats_reset = mlx5_xstats_reset,
1427         .xstats_get_names = mlx5_xstats_get_names,
1428         .fw_version_get = mlx5_fw_version_get,
1429         .dev_infos_get = mlx5_dev_infos_get,
1430         .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1431         .vlan_filter_set = mlx5_vlan_filter_set,
1432         .rx_queue_setup = mlx5_rx_queue_setup,
1433         .rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,
1434         .tx_queue_setup = mlx5_tx_queue_setup,
1435         .tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,
1436         .rx_queue_release = mlx5_rx_queue_release,
1437         .tx_queue_release = mlx5_tx_queue_release,
1438         .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1439         .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1440         .mac_addr_remove = mlx5_mac_addr_remove,
1441         .mac_addr_add = mlx5_mac_addr_add,
1442         .mac_addr_set = mlx5_mac_addr_set,
1443         .set_mc_addr_list = mlx5_set_mc_addr_list,
1444         .mtu_set = mlx5_dev_set_mtu,
1445         .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1446         .vlan_offload_set = mlx5_vlan_offload_set,
1447         .filter_ctrl = mlx5_dev_filter_ctrl,
1448         .rx_descriptor_status = mlx5_rx_descriptor_status,
1449         .tx_descriptor_status = mlx5_tx_descriptor_status,
1450         .rx_queue_intr_enable = mlx5_rx_intr_enable,
1451         .rx_queue_intr_disable = mlx5_rx_intr_disable,
1452         .is_removed = mlx5_is_removed,
1453         .get_module_info = mlx5_get_module_info,
1454         .get_module_eeprom = mlx5_get_module_eeprom,
1455         .hairpin_cap_get = mlx5_hairpin_cap_get,
1456         .mtr_ops_get = mlx5_flow_meter_ops_get,
1457 };
1458
1459 /**
1460  * Verify and store value for device argument.
1461  *
1462  * @param[in] key
1463  *   Key argument to verify.
1464  * @param[in] val
1465  *   Value associated with key.
1466  * @param opaque
1467  *   User data.
1468  *
1469  * @return
1470  *   0 on success, a negative errno value otherwise and rte_errno is set.
1471  */
1472 static int
1473 mlx5_args_check(const char *key, const char *val, void *opaque)
1474 {
1475         struct mlx5_dev_config *config = opaque;
1476         unsigned long tmp;
1477
1478         /* No-op, port representors are processed in mlx5_dev_spawn(). */
1479         if (!strcmp(MLX5_REPRESENTOR, key))
1480                 return 0;
1481         errno = 0;
1482         tmp = strtoul(val, NULL, 0);
1483         if (errno) {
1484                 rte_errno = errno;
1485                 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
1486                 return -rte_errno;
1487         }
1488         if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
1489                 config->cqe_comp = !!tmp;
1490         } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
1491                 config->cqe_pad = !!tmp;
1492         } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
1493                 config->hw_padding = !!tmp;
1494         } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
1495                 config->mprq.enabled = !!tmp;
1496         } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
1497                 config->mprq.stride_num_n = tmp;
1498         } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
1499                 config->mprq.max_memcpy_len = tmp;
1500         } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
1501                 config->mprq.min_rxqs_num = tmp;
1502         } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
1503                 DRV_LOG(WARNING, "%s: deprecated parameter,"
1504                                  " converted to txq_inline_max", key);
1505                 config->txq_inline_max = tmp;
1506         } else if (strcmp(MLX5_TXQ_INLINE_MAX, key) == 0) {
1507                 config->txq_inline_max = tmp;
1508         } else if (strcmp(MLX5_TXQ_INLINE_MIN, key) == 0) {
1509                 config->txq_inline_min = tmp;
1510         } else if (strcmp(MLX5_TXQ_INLINE_MPW, key) == 0) {
1511                 config->txq_inline_mpw = tmp;
1512         } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
1513                 config->txqs_inline = tmp;
1514         } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
1515                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1516         } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
1517                 config->mps = !!tmp;
1518         } else if (strcmp(MLX5_TX_DB_NC, key) == 0) {
1519                 if (tmp != MLX5_TXDB_CACHED &&
1520                     tmp != MLX5_TXDB_NCACHED &&
1521                     tmp != MLX5_TXDB_HEURISTIC) {
1522                         DRV_LOG(ERR, "invalid Tx doorbell "
1523                                      "mapping parameter");
1524                         rte_errno = EINVAL;
1525                         return -rte_errno;
1526                 }
1527                 config->dbnc = tmp;
1528         } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
1529                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1530         } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
1531                 DRV_LOG(WARNING, "%s: deprecated parameter,"
1532                                  " converted to txq_inline_mpw", key);
1533                 config->txq_inline_mpw = tmp;
1534         } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
1535                 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1536         } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
1537                 config->rx_vec_en = !!tmp;
1538         } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
1539                 config->l3_vxlan_en = !!tmp;
1540         } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
1541                 config->vf_nl_en = !!tmp;
1542         } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
1543                 config->dv_esw_en = !!tmp;
1544         } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
1545                 config->dv_flow_en = !!tmp;
1546         } else if (strcmp(MLX5_DV_XMETA_EN, key) == 0) {
1547                 if (tmp != MLX5_XMETA_MODE_LEGACY &&
1548                     tmp != MLX5_XMETA_MODE_META16 &&
1549                     tmp != MLX5_XMETA_MODE_META32) {
1550                         DRV_LOG(ERR, "invalid extensive "
1551                                      "metadata parameter");
1552                         rte_errno = EINVAL;
1553                         return -rte_errno;
1554                 }
1555                 config->dv_xmeta_en = tmp;
1556         } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
1557                 config->mr_ext_memseg_en = !!tmp;
1558         } else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {
1559                 config->max_dump_files_num = tmp;
1560         } else if (strcmp(MLX5_LRO_TIMEOUT_USEC, key) == 0) {
1561                 config->lro.timeout = tmp;
1562         } else {
1563                 DRV_LOG(WARNING, "%s: unknown parameter", key);
1564                 rte_errno = EINVAL;
1565                 return -rte_errno;
1566         }
1567         return 0;
1568 }
1569
1570 /**
1571  * Parse device parameters.
1572  *
1573  * @param config
1574  *   Pointer to device configuration structure.
1575  * @param devargs
1576  *   Device arguments structure.
1577  *
1578  * @return
1579  *   0 on success, a negative errno value otherwise and rte_errno is set.
1580  */
1581 static int
1582 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
1583 {
1584         const char **params = (const char *[]){
1585                 MLX5_RXQ_CQE_COMP_EN,
1586                 MLX5_RXQ_CQE_PAD_EN,
1587                 MLX5_RXQ_PKT_PAD_EN,
1588                 MLX5_RX_MPRQ_EN,
1589                 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
1590                 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
1591                 MLX5_RXQS_MIN_MPRQ,
1592                 MLX5_TXQ_INLINE,
1593                 MLX5_TXQ_INLINE_MIN,
1594                 MLX5_TXQ_INLINE_MAX,
1595                 MLX5_TXQ_INLINE_MPW,
1596                 MLX5_TXQS_MIN_INLINE,
1597                 MLX5_TXQS_MAX_VEC,
1598                 MLX5_TXQ_MPW_EN,
1599                 MLX5_TXQ_MPW_HDR_DSEG_EN,
1600                 MLX5_TXQ_MAX_INLINE_LEN,
1601                 MLX5_TX_DB_NC,
1602                 MLX5_TX_VEC_EN,
1603                 MLX5_RX_VEC_EN,
1604                 MLX5_L3_VXLAN_EN,
1605                 MLX5_VF_NL_EN,
1606                 MLX5_DV_ESW_EN,
1607                 MLX5_DV_FLOW_EN,
1608                 MLX5_DV_XMETA_EN,
1609                 MLX5_MR_EXT_MEMSEG_EN,
1610                 MLX5_REPRESENTOR,
1611                 MLX5_MAX_DUMP_FILES_NUM,
1612                 MLX5_LRO_TIMEOUT_USEC,
1613                 NULL,
1614         };
1615         struct rte_kvargs *kvlist;
1616         int ret = 0;
1617         int i;
1618
1619         if (devargs == NULL)
1620                 return 0;
1621         /* Following UGLY cast is done to pass checkpatch. */
1622         kvlist = rte_kvargs_parse(devargs->args, params);
1623         if (kvlist == NULL) {
1624                 rte_errno = EINVAL;
1625                 return -rte_errno;
1626         }
1627         /* Process parameters. */
1628         for (i = 0; (params[i] != NULL); ++i) {
1629                 if (rte_kvargs_count(kvlist, params[i])) {
1630                         ret = rte_kvargs_process(kvlist, params[i],
1631                                                  mlx5_args_check, config);
1632                         if (ret) {
1633                                 rte_errno = EINVAL;
1634                                 rte_kvargs_free(kvlist);
1635                                 return -rte_errno;
1636                         }
1637                 }
1638         }
1639         rte_kvargs_free(kvlist);
1640         return 0;
1641 }
1642
1643 static struct rte_pci_driver mlx5_driver;
1644
1645 /**
1646  * PMD global initialization.
1647  *
1648  * Independent from individual device, this function initializes global
1649  * per-PMD data structures distinguishing primary and secondary processes.
1650  * Hence, each initialization is called once per a process.
1651  *
1652  * @return
1653  *   0 on success, a negative errno value otherwise and rte_errno is set.
1654  */
1655 static int
1656 mlx5_init_once(void)
1657 {
1658         struct mlx5_shared_data *sd;
1659         struct mlx5_local_data *ld = &mlx5_local_data;
1660         int ret = 0;
1661
1662         if (mlx5_init_shared_data())
1663                 return -rte_errno;
1664         sd = mlx5_shared_data;
1665         assert(sd);
1666         rte_spinlock_lock(&sd->lock);
1667         switch (rte_eal_process_type()) {
1668         case RTE_PROC_PRIMARY:
1669                 if (sd->init_done)
1670                         break;
1671                 LIST_INIT(&sd->mem_event_cb_list);
1672                 rte_rwlock_init(&sd->mem_event_rwlock);
1673                 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1674                                                 mlx5_mr_mem_event_cb, NULL);
1675                 ret = mlx5_mp_init_primary();
1676                 if (ret)
1677                         goto out;
1678                 sd->init_done = true;
1679                 break;
1680         case RTE_PROC_SECONDARY:
1681                 if (ld->init_done)
1682                         break;
1683                 ret = mlx5_mp_init_secondary();
1684                 if (ret)
1685                         goto out;
1686                 ++sd->secondary_cnt;
1687                 ld->init_done = true;
1688                 break;
1689         default:
1690                 break;
1691         }
1692 out:
1693         rte_spinlock_unlock(&sd->lock);
1694         return ret;
1695 }
1696
1697 /**
1698  * Configures the minimal amount of data to inline into WQE
1699  * while sending packets.
1700  *
1701  * - the txq_inline_min has the maximal priority, if this
1702  *   key is specified in devargs
1703  * - if DevX is enabled the inline mode is queried from the
1704  *   device (HCA attributes and NIC vport context if needed).
1705  * - otherwise L2 mode (18 bytes) is assumed for ConnectX-4/4LX
1706  *   and none (0 bytes) for other NICs
1707  *
1708  * @param spawn
1709  *   Verbs device parameters (name, port, switch_info) to spawn.
1710  * @param config
1711  *   Device configuration parameters.
1712  */
1713 static void
1714 mlx5_set_min_inline(struct mlx5_dev_spawn_data *spawn,
1715                     struct mlx5_dev_config *config)
1716 {
1717         if (config->txq_inline_min != MLX5_ARG_UNSET) {
1718                 /* Application defines size of inlined data explicitly. */
1719                 switch (spawn->pci_dev->id.device_id) {
1720                 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1721                 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1722                         if (config->txq_inline_min <
1723                                        (int)MLX5_INLINE_HSIZE_L2) {
1724                                 DRV_LOG(DEBUG,
1725                                         "txq_inline_mix aligned to minimal"
1726                                         " ConnectX-4 required value %d",
1727                                         (int)MLX5_INLINE_HSIZE_L2);
1728                                 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1729                         }
1730                         break;
1731                 }
1732                 goto exit;
1733         }
1734         if (config->hca_attr.eth_net_offloads) {
1735                 /* We have DevX enabled, inline mode queried successfully. */
1736                 switch (config->hca_attr.wqe_inline_mode) {
1737                 case MLX5_CAP_INLINE_MODE_L2:
1738                         /* outer L2 header must be inlined. */
1739                         config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1740                         goto exit;
1741                 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
1742                         /* No inline data are required by NIC. */
1743                         config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1744                         config->hw_vlan_insert =
1745                                 config->hca_attr.wqe_vlan_insert;
1746                         DRV_LOG(DEBUG, "Tx VLAN insertion is supported");
1747                         goto exit;
1748                 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
1749                         /* inline mode is defined by NIC vport context. */
1750                         if (!config->hca_attr.eth_virt)
1751                                 break;
1752                         switch (config->hca_attr.vport_inline_mode) {
1753                         case MLX5_INLINE_MODE_NONE:
1754                                 config->txq_inline_min =
1755                                         MLX5_INLINE_HSIZE_NONE;
1756                                 goto exit;
1757                         case MLX5_INLINE_MODE_L2:
1758                                 config->txq_inline_min =
1759                                         MLX5_INLINE_HSIZE_L2;
1760                                 goto exit;
1761                         case MLX5_INLINE_MODE_IP:
1762                                 config->txq_inline_min =
1763                                         MLX5_INLINE_HSIZE_L3;
1764                                 goto exit;
1765                         case MLX5_INLINE_MODE_TCP_UDP:
1766                                 config->txq_inline_min =
1767                                         MLX5_INLINE_HSIZE_L4;
1768                                 goto exit;
1769                         case MLX5_INLINE_MODE_INNER_L2:
1770                                 config->txq_inline_min =
1771                                         MLX5_INLINE_HSIZE_INNER_L2;
1772                                 goto exit;
1773                         case MLX5_INLINE_MODE_INNER_IP:
1774                                 config->txq_inline_min =
1775                                         MLX5_INLINE_HSIZE_INNER_L3;
1776                                 goto exit;
1777                         case MLX5_INLINE_MODE_INNER_TCP_UDP:
1778                                 config->txq_inline_min =
1779                                         MLX5_INLINE_HSIZE_INNER_L4;
1780                                 goto exit;
1781                         }
1782                 }
1783         }
1784         /*
1785          * We get here if we are unable to deduce
1786          * inline data size with DevX. Try PCI ID
1787          * to determine old NICs.
1788          */
1789         switch (spawn->pci_dev->id.device_id) {
1790         case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1791         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1792         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LX:
1793         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1794                 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1795                 config->hw_vlan_insert = 0;
1796                 break;
1797         case PCI_DEVICE_ID_MELLANOX_CONNECTX5:
1798         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1799         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EX:
1800         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1801                 /*
1802                  * These NICs support VLAN insertion from WQE and
1803                  * report the wqe_vlan_insert flag. But there is the bug
1804                  * and PFC control may be broken, so disable feature.
1805                  */
1806                 config->hw_vlan_insert = 0;
1807                 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1808                 break;
1809         default:
1810                 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1811                 break;
1812         }
1813 exit:
1814         DRV_LOG(DEBUG, "min tx inline configured: %d", config->txq_inline_min);
1815 }
1816
1817 /**
1818  * Configures the metadata mask fields in the shared context.
1819  *
1820  * @param [in] dev
1821  *   Pointer to Ethernet device.
1822  */
1823 static void
1824 mlx5_set_metadata_mask(struct rte_eth_dev *dev)
1825 {
1826         struct mlx5_priv *priv = dev->data->dev_private;
1827         struct mlx5_ibv_shared *sh = priv->sh;
1828         uint32_t meta, mark, reg_c0;
1829
1830         reg_c0 = ~priv->vport_meta_mask;
1831         switch (priv->config.dv_xmeta_en) {
1832         case MLX5_XMETA_MODE_LEGACY:
1833                 meta = UINT32_MAX;
1834                 mark = MLX5_FLOW_MARK_MASK;
1835                 break;
1836         case MLX5_XMETA_MODE_META16:
1837                 meta = reg_c0 >> rte_bsf32(reg_c0);
1838                 mark = MLX5_FLOW_MARK_MASK;
1839                 break;
1840         case MLX5_XMETA_MODE_META32:
1841                 meta = UINT32_MAX;
1842                 mark = (reg_c0 >> rte_bsf32(reg_c0)) & MLX5_FLOW_MARK_MASK;
1843                 break;
1844         default:
1845                 meta = 0;
1846                 mark = 0;
1847                 assert(false);
1848                 break;
1849         }
1850         if (sh->dv_mark_mask && sh->dv_mark_mask != mark)
1851                 DRV_LOG(WARNING, "metadata MARK mask mismatche %08X:%08X",
1852                                  sh->dv_mark_mask, mark);
1853         else
1854                 sh->dv_mark_mask = mark;
1855         if (sh->dv_meta_mask && sh->dv_meta_mask != meta)
1856                 DRV_LOG(WARNING, "metadata META mask mismatche %08X:%08X",
1857                                  sh->dv_meta_mask, meta);
1858         else
1859                 sh->dv_meta_mask = meta;
1860         if (sh->dv_regc0_mask && sh->dv_regc0_mask != reg_c0)
1861                 DRV_LOG(WARNING, "metadata reg_c0 mask mismatche %08X:%08X",
1862                                  sh->dv_meta_mask, reg_c0);
1863         else
1864                 sh->dv_regc0_mask = reg_c0;
1865         DRV_LOG(DEBUG, "metadata mode %u", priv->config.dv_xmeta_en);
1866         DRV_LOG(DEBUG, "metadata MARK mask %08X", sh->dv_mark_mask);
1867         DRV_LOG(DEBUG, "metadata META mask %08X", sh->dv_meta_mask);
1868         DRV_LOG(DEBUG, "metadata reg_c0 mask %08X", sh->dv_regc0_mask);
1869 }
1870
1871 /**
1872  * Allocate page of door-bells and register it using DevX API.
1873  *
1874  * @param [in] dev
1875  *   Pointer to Ethernet device.
1876  *
1877  * @return
1878  *   Pointer to new page on success, NULL otherwise.
1879  */
1880 static struct mlx5_devx_dbr_page *
1881 mlx5_alloc_dbr_page(struct rte_eth_dev *dev)
1882 {
1883         struct mlx5_priv *priv = dev->data->dev_private;
1884         struct mlx5_devx_dbr_page *page;
1885
1886         /* Allocate space for door-bell page and management data. */
1887         page = rte_calloc_socket(__func__, 1, sizeof(struct mlx5_devx_dbr_page),
1888                                  RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1889         if (!page) {
1890                 DRV_LOG(ERR, "port %u cannot allocate dbr page",
1891                         dev->data->port_id);
1892                 return NULL;
1893         }
1894         /* Register allocated memory. */
1895         page->umem = mlx5_glue->devx_umem_reg(priv->sh->ctx, page->dbrs,
1896                                               MLX5_DBR_PAGE_SIZE, 0);
1897         if (!page->umem) {
1898                 DRV_LOG(ERR, "port %u cannot umem reg dbr page",
1899                         dev->data->port_id);
1900                 rte_free(page);
1901                 return NULL;
1902         }
1903         return page;
1904 }
1905
1906 /**
1907  * Find the next available door-bell, allocate new page if needed.
1908  *
1909  * @param [in] dev
1910  *   Pointer to Ethernet device.
1911  * @param [out] dbr_page
1912  *   Door-bell page containing the page data.
1913  *
1914  * @return
1915  *   Door-bell address offset on success, a negative error value otherwise.
1916  */
1917 int64_t
1918 mlx5_get_dbr(struct rte_eth_dev *dev, struct mlx5_devx_dbr_page **dbr_page)
1919 {
1920         struct mlx5_priv *priv = dev->data->dev_private;
1921         struct mlx5_devx_dbr_page *page = NULL;
1922         uint32_t i, j;
1923
1924         LIST_FOREACH(page, &priv->dbrpgs, next)
1925                 if (page->dbr_count < MLX5_DBR_PER_PAGE)
1926                         break;
1927         if (!page) { /* No page with free door-bell exists. */
1928                 page = mlx5_alloc_dbr_page(dev);
1929                 if (!page) /* Failed to allocate new page. */
1930                         return (-1);
1931                 LIST_INSERT_HEAD(&priv->dbrpgs, page, next);
1932         }
1933         /* Loop to find bitmap part with clear bit. */
1934         for (i = 0;
1935              i < MLX5_DBR_BITMAP_SIZE && page->dbr_bitmap[i] == UINT64_MAX;
1936              i++)
1937                 ; /* Empty. */
1938         /* Find the first clear bit. */
1939         j = rte_bsf64(~page->dbr_bitmap[i]);
1940         assert(i < (MLX5_DBR_PER_PAGE / 64));
1941         page->dbr_bitmap[i] |= (1 << j);
1942         page->dbr_count++;
1943         *dbr_page = page;
1944         return (((i * 64) + j) * sizeof(uint64_t));
1945 }
1946
1947 /**
1948  * Release a door-bell record.
1949  *
1950  * @param [in] dev
1951  *   Pointer to Ethernet device.
1952  * @param [in] umem_id
1953  *   UMEM ID of page containing the door-bell record to release.
1954  * @param [in] offset
1955  *   Offset of door-bell record in page.
1956  *
1957  * @return
1958  *   0 on success, a negative error value otherwise.
1959  */
1960 int32_t
1961 mlx5_release_dbr(struct rte_eth_dev *dev, uint32_t umem_id, uint64_t offset)
1962 {
1963         struct mlx5_priv *priv = dev->data->dev_private;
1964         struct mlx5_devx_dbr_page *page = NULL;
1965         int ret = 0;
1966
1967         LIST_FOREACH(page, &priv->dbrpgs, next)
1968                 /* Find the page this address belongs to. */
1969                 if (page->umem->umem_id == umem_id)
1970                         break;
1971         if (!page)
1972                 return -EINVAL;
1973         page->dbr_count--;
1974         if (!page->dbr_count) {
1975                 /* Page not used, free it and remove from list. */
1976                 LIST_REMOVE(page, next);
1977                 if (page->umem)
1978                         ret = -mlx5_glue->devx_umem_dereg(page->umem);
1979                 rte_free(page);
1980         } else {
1981                 /* Mark in bitmap that this door-bell is not in use. */
1982                 offset /= MLX5_DBR_SIZE;
1983                 int i = offset / 64;
1984                 int j = offset % 64;
1985
1986                 page->dbr_bitmap[i] &= ~(1 << j);
1987         }
1988         return ret;
1989 }
1990
1991 /**
1992  * Check sibling device configurations.
1993  *
1994  * Sibling devices sharing the Infiniband device context
1995  * should have compatible configurations. This regards
1996  * representors and bonding slaves.
1997  *
1998  * @param priv
1999  *   Private device descriptor.
2000  * @param config
2001  *   Configuration of the device is going to be created.
2002  *
2003  * @return
2004  *   0 on success, EINVAL otherwise
2005  */
2006 static int
2007 mlx5_dev_check_sibling_config(struct mlx5_priv *priv,
2008                               struct mlx5_dev_config *config)
2009 {
2010         struct mlx5_ibv_shared *sh = priv->sh;
2011         struct mlx5_dev_config *sh_conf = NULL;
2012         uint16_t port_id;
2013
2014         assert(sh);
2015         /* Nothing to compare for the single/first device. */
2016         if (sh->refcnt == 1)
2017                 return 0;
2018         /* Find the device with shared context. */
2019         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
2020                 struct mlx5_priv *opriv =
2021                         rte_eth_devices[port_id].data->dev_private;
2022
2023                 if (opriv && opriv != priv && opriv->sh == sh) {
2024                         sh_conf = &opriv->config;
2025                         break;
2026                 }
2027         }
2028         if (!sh_conf)
2029                 return 0;
2030         if (sh_conf->dv_flow_en ^ config->dv_flow_en) {
2031                 DRV_LOG(ERR, "\"dv_flow_en\" configuration mismatch"
2032                              " for shared %s context", sh->ibdev_name);
2033                 rte_errno = EINVAL;
2034                 return rte_errno;
2035         }
2036         if (sh_conf->dv_xmeta_en ^ config->dv_xmeta_en) {
2037                 DRV_LOG(ERR, "\"dv_xmeta_en\" configuration mismatch"
2038                              " for shared %s context", sh->ibdev_name);
2039                 rte_errno = EINVAL;
2040                 return rte_errno;
2041         }
2042         return 0;
2043 }
2044 /**
2045  * Spawn an Ethernet device from Verbs information.
2046  *
2047  * @param dpdk_dev
2048  *   Backing DPDK device.
2049  * @param spawn
2050  *   Verbs device parameters (name, port, switch_info) to spawn.
2051  * @param config
2052  *   Device configuration parameters.
2053  *
2054  * @return
2055  *   A valid Ethernet device object on success, NULL otherwise and rte_errno
2056  *   is set. The following errors are defined:
2057  *
2058  *   EBUSY: device is not supposed to be spawned.
2059  *   EEXIST: device is already spawned
2060  */
2061 static struct rte_eth_dev *
2062 mlx5_dev_spawn(struct rte_device *dpdk_dev,
2063                struct mlx5_dev_spawn_data *spawn,
2064                struct mlx5_dev_config config)
2065 {
2066         const struct mlx5_switch_info *switch_info = &spawn->info;
2067         struct mlx5_ibv_shared *sh = NULL;
2068         struct ibv_port_attr port_attr;
2069         struct mlx5dv_context dv_attr = { .comp_mask = 0 };
2070         struct rte_eth_dev *eth_dev = NULL;
2071         struct mlx5_priv *priv = NULL;
2072         int err = 0;
2073         unsigned int hw_padding = 0;
2074         unsigned int mps;
2075         unsigned int cqe_comp;
2076         unsigned int cqe_pad = 0;
2077         unsigned int tunnel_en = 0;
2078         unsigned int mpls_en = 0;
2079         unsigned int swp = 0;
2080         unsigned int mprq = 0;
2081         unsigned int mprq_min_stride_size_n = 0;
2082         unsigned int mprq_max_stride_size_n = 0;
2083         unsigned int mprq_min_stride_num_n = 0;
2084         unsigned int mprq_max_stride_num_n = 0;
2085         struct rte_ether_addr mac;
2086         char name[RTE_ETH_NAME_MAX_LEN];
2087         int own_domain_id = 0;
2088         uint16_t port_id;
2089         unsigned int i;
2090 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
2091         struct mlx5dv_devx_port devx_port = { .comp_mask = 0 };
2092 #endif
2093
2094         /* Determine if this port representor is supposed to be spawned. */
2095         if (switch_info->representor && dpdk_dev->devargs) {
2096                 struct rte_eth_devargs eth_da;
2097
2098                 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, &eth_da);
2099                 if (err) {
2100                         rte_errno = -err;
2101                         DRV_LOG(ERR, "failed to process device arguments: %s",
2102                                 strerror(rte_errno));
2103                         return NULL;
2104                 }
2105                 for (i = 0; i < eth_da.nb_representor_ports; ++i)
2106                         if (eth_da.representor_ports[i] ==
2107                             (uint16_t)switch_info->port_name)
2108                                 break;
2109                 if (i == eth_da.nb_representor_ports) {
2110                         rte_errno = EBUSY;
2111                         return NULL;
2112                 }
2113         }
2114         /* Build device name. */
2115         if (spawn->pf_bond <  0) {
2116                 /* Single device. */
2117                 if (!switch_info->representor)
2118                         strlcpy(name, dpdk_dev->name, sizeof(name));
2119                 else
2120                         snprintf(name, sizeof(name), "%s_representor_%u",
2121                                  dpdk_dev->name, switch_info->port_name);
2122         } else {
2123                 /* Bonding device. */
2124                 if (!switch_info->representor)
2125                         snprintf(name, sizeof(name), "%s_%s",
2126                                  dpdk_dev->name, spawn->ibv_dev->name);
2127                 else
2128                         snprintf(name, sizeof(name), "%s_%s_representor_%u",
2129                                  dpdk_dev->name, spawn->ibv_dev->name,
2130                                  switch_info->port_name);
2131         }
2132         /* check if the device is already spawned */
2133         if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
2134                 rte_errno = EEXIST;
2135                 return NULL;
2136         }
2137         DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
2138         if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
2139                 eth_dev = rte_eth_dev_attach_secondary(name);
2140                 if (eth_dev == NULL) {
2141                         DRV_LOG(ERR, "can not attach rte ethdev");
2142                         rte_errno = ENOMEM;
2143                         return NULL;
2144                 }
2145                 eth_dev->device = dpdk_dev;
2146                 eth_dev->dev_ops = &mlx5_dev_sec_ops;
2147                 err = mlx5_proc_priv_init(eth_dev);
2148                 if (err)
2149                         return NULL;
2150                 /* Receive command fd from primary process */
2151                 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
2152                 if (err < 0)
2153                         return NULL;
2154                 /* Remap UAR for Tx queues. */
2155                 err = mlx5_tx_uar_init_secondary(eth_dev, err);
2156                 if (err)
2157                         return NULL;
2158                 /*
2159                  * Ethdev pointer is still required as input since
2160                  * the primary device is not accessible from the
2161                  * secondary process.
2162                  */
2163                 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
2164                 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
2165                 return eth_dev;
2166         }
2167         /*
2168          * Some parameters ("tx_db_nc" in particularly) are needed in
2169          * advance to create dv/verbs device context. We proceed the
2170          * devargs here to get ones, and later proceed devargs again
2171          * to override some hardware settings.
2172          */
2173         err = mlx5_args(&config, dpdk_dev->devargs);
2174         if (err) {
2175                 err = rte_errno;
2176                 DRV_LOG(ERR, "failed to process device arguments: %s",
2177                         strerror(rte_errno));
2178                 goto error;
2179         }
2180         sh = mlx5_alloc_shared_ibctx(spawn, &config);
2181         if (!sh)
2182                 return NULL;
2183         config.devx = sh->devx;
2184 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
2185         config.dest_tir = 1;
2186 #endif
2187 #ifdef HAVE_IBV_MLX5_MOD_SWP
2188         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
2189 #endif
2190         /*
2191          * Multi-packet send is supported by ConnectX-4 Lx PF as well
2192          * as all ConnectX-5 devices.
2193          */
2194 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
2195         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
2196 #endif
2197 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
2198         dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
2199 #endif
2200         mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
2201         if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
2202                 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
2203                         DRV_LOG(DEBUG, "enhanced MPW is supported");
2204                         mps = MLX5_MPW_ENHANCED;
2205                 } else {
2206                         DRV_LOG(DEBUG, "MPW is supported");
2207                         mps = MLX5_MPW;
2208                 }
2209         } else {
2210                 DRV_LOG(DEBUG, "MPW isn't supported");
2211                 mps = MLX5_MPW_DISABLED;
2212         }
2213 #ifdef HAVE_IBV_MLX5_MOD_SWP
2214         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
2215                 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
2216         DRV_LOG(DEBUG, "SWP support: %u", swp);
2217 #endif
2218         config.swp = !!swp;
2219 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
2220         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
2221                 struct mlx5dv_striding_rq_caps mprq_caps =
2222                         dv_attr.striding_rq_caps;
2223
2224                 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
2225                         mprq_caps.min_single_stride_log_num_of_bytes);
2226                 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
2227                         mprq_caps.max_single_stride_log_num_of_bytes);
2228                 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
2229                         mprq_caps.min_single_wqe_log_num_of_strides);
2230                 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
2231                         mprq_caps.max_single_wqe_log_num_of_strides);
2232                 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
2233                         mprq_caps.supported_qpts);
2234                 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
2235                 mprq = 1;
2236                 mprq_min_stride_size_n =
2237                         mprq_caps.min_single_stride_log_num_of_bytes;
2238                 mprq_max_stride_size_n =
2239                         mprq_caps.max_single_stride_log_num_of_bytes;
2240                 mprq_min_stride_num_n =
2241                         mprq_caps.min_single_wqe_log_num_of_strides;
2242                 mprq_max_stride_num_n =
2243                         mprq_caps.max_single_wqe_log_num_of_strides;
2244                 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
2245                                                    mprq_min_stride_num_n);
2246         }
2247 #endif
2248         if (RTE_CACHE_LINE_SIZE == 128 &&
2249             !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
2250                 cqe_comp = 0;
2251         else
2252                 cqe_comp = 1;
2253         config.cqe_comp = cqe_comp;
2254 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
2255         /* Whether device supports 128B Rx CQE padding. */
2256         cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
2257                   (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
2258 #endif
2259 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
2260         if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
2261                 tunnel_en = ((dv_attr.tunnel_offloads_caps &
2262                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
2263                              (dv_attr.tunnel_offloads_caps &
2264                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE) &&
2265                              (dv_attr.tunnel_offloads_caps &
2266                               MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GENEVE));
2267         }
2268         DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
2269                 tunnel_en ? "" : "not ");
2270 #else
2271         DRV_LOG(WARNING,
2272                 "tunnel offloading disabled due to old OFED/rdma-core version");
2273 #endif
2274         config.tunnel_en = tunnel_en;
2275 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2276         mpls_en = ((dv_attr.tunnel_offloads_caps &
2277                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
2278                    (dv_attr.tunnel_offloads_caps &
2279                     MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
2280         DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
2281                 mpls_en ? "" : "not ");
2282 #else
2283         DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
2284                 " old OFED/rdma-core version or firmware configuration");
2285 #endif
2286         config.mpls_en = mpls_en;
2287         /* Check port status. */
2288         err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
2289         if (err) {
2290                 DRV_LOG(ERR, "port query failed: %s", strerror(err));
2291                 goto error;
2292         }
2293         if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
2294                 DRV_LOG(ERR, "port is not configured in Ethernet mode");
2295                 err = EINVAL;
2296                 goto error;
2297         }
2298         if (port_attr.state != IBV_PORT_ACTIVE)
2299                 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
2300                         mlx5_glue->port_state_str(port_attr.state),
2301                         port_attr.state);
2302         /* Allocate private eth device data. */
2303         priv = rte_zmalloc("ethdev private structure",
2304                            sizeof(*priv),
2305                            RTE_CACHE_LINE_SIZE);
2306         if (priv == NULL) {
2307                 DRV_LOG(ERR, "priv allocation failure");
2308                 err = ENOMEM;
2309                 goto error;
2310         }
2311         priv->sh = sh;
2312         priv->ibv_port = spawn->ibv_port;
2313         priv->pci_dev = spawn->pci_dev;
2314         priv->mtu = RTE_ETHER_MTU;
2315 #ifndef RTE_ARCH_64
2316         /* Initialize UAR access locks for 32bit implementations. */
2317         rte_spinlock_init(&priv->uar_lock_cq);
2318         for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
2319                 rte_spinlock_init(&priv->uar_lock[i]);
2320 #endif
2321         /* Some internal functions rely on Netlink sockets, open them now. */
2322         priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
2323         priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
2324         priv->nl_sn = 0;
2325         priv->representor = !!switch_info->representor;
2326         priv->master = !!switch_info->master;
2327         priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
2328         priv->vport_meta_tag = 0;
2329         priv->vport_meta_mask = 0;
2330         priv->pf_bond = spawn->pf_bond;
2331 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
2332         /*
2333          * The DevX port query API is implemented. E-Switch may use
2334          * either vport or reg_c[0] metadata register to match on
2335          * vport index. The engaged part of metadata register is
2336          * defined by mask.
2337          */
2338         if (switch_info->representor || switch_info->master) {
2339                 devx_port.comp_mask = MLX5DV_DEVX_PORT_VPORT |
2340                                       MLX5DV_DEVX_PORT_MATCH_REG_C_0;
2341                 err = mlx5_glue->devx_port_query(sh->ctx, spawn->ibv_port,
2342                                                  &devx_port);
2343                 if (err) {
2344                         DRV_LOG(WARNING,
2345                                 "can't query devx port %d on device %s",
2346                                 spawn->ibv_port, spawn->ibv_dev->name);
2347                         devx_port.comp_mask = 0;
2348                 }
2349         }
2350         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_MATCH_REG_C_0) {
2351                 priv->vport_meta_tag = devx_port.reg_c_0.value;
2352                 priv->vport_meta_mask = devx_port.reg_c_0.mask;
2353                 if (!priv->vport_meta_mask) {
2354                         DRV_LOG(ERR, "vport zero mask for port %d"
2355                                      " on bonding device %s",
2356                                      spawn->ibv_port, spawn->ibv_dev->name);
2357                         err = ENOTSUP;
2358                         goto error;
2359                 }
2360                 if (priv->vport_meta_tag & ~priv->vport_meta_mask) {
2361                         DRV_LOG(ERR, "invalid vport tag for port %d"
2362                                      " on bonding device %s",
2363                                      spawn->ibv_port, spawn->ibv_dev->name);
2364                         err = ENOTSUP;
2365                         goto error;
2366                 }
2367         }
2368         if (devx_port.comp_mask & MLX5DV_DEVX_PORT_VPORT) {
2369                 priv->vport_id = devx_port.vport_num;
2370         } else if (spawn->pf_bond >= 0) {
2371                 DRV_LOG(ERR, "can't deduce vport index for port %d"
2372                              " on bonding device %s",
2373                              spawn->ibv_port, spawn->ibv_dev->name);
2374                 err = ENOTSUP;
2375                 goto error;
2376         } else {
2377                 /* Suppose vport index in compatible way. */
2378                 priv->vport_id = switch_info->representor ?
2379                                  switch_info->port_name + 1 : -1;
2380         }
2381 #else
2382         /*
2383          * Kernel/rdma_core support single E-Switch per PF configurations
2384          * only and vport_id field contains the vport index for
2385          * associated VF, which is deduced from representor port name.
2386          * For example, let's have the IB device port 10, it has
2387          * attached network device eth0, which has port name attribute
2388          * pf0vf2, we can deduce the VF number as 2, and set vport index
2389          * as 3 (2+1). This assigning schema should be changed if the
2390          * multiple E-Switch instances per PF configurations or/and PCI
2391          * subfunctions are added.
2392          */
2393         priv->vport_id = switch_info->representor ?
2394                          switch_info->port_name + 1 : -1;
2395 #endif
2396         /* representor_id field keeps the unmodified VF index. */
2397         priv->representor_id = switch_info->representor ?
2398                                switch_info->port_name : -1;
2399         /*
2400          * Look for sibling devices in order to reuse their switch domain
2401          * if any, otherwise allocate one.
2402          */
2403         MLX5_ETH_FOREACH_DEV(port_id, priv->pci_dev) {
2404                 const struct mlx5_priv *opriv =
2405                         rte_eth_devices[port_id].data->dev_private;
2406
2407                 if (!opriv ||
2408                     opriv->sh != priv->sh ||
2409                         opriv->domain_id ==
2410                         RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
2411                         continue;
2412                 priv->domain_id = opriv->domain_id;
2413                 break;
2414         }
2415         if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
2416                 err = rte_eth_switch_domain_alloc(&priv->domain_id);
2417                 if (err) {
2418                         err = rte_errno;
2419                         DRV_LOG(ERR, "unable to allocate switch domain: %s",
2420                                 strerror(rte_errno));
2421                         goto error;
2422                 }
2423                 own_domain_id = 1;
2424         }
2425         /* Override some values set by hardware configuration. */
2426         mlx5_args(&config, dpdk_dev->devargs);
2427         err = mlx5_dev_check_sibling_config(priv, &config);
2428         if (err)
2429                 goto error;
2430         config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
2431                             IBV_DEVICE_RAW_IP_CSUM);
2432         DRV_LOG(DEBUG, "checksum offloading is %ssupported",
2433                 (config.hw_csum ? "" : "not "));
2434 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
2435         !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
2436         DRV_LOG(DEBUG, "counters are not supported");
2437 #endif
2438 #if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR)
2439         if (config.dv_flow_en) {
2440                 DRV_LOG(WARNING, "DV flow is not supported");
2441                 config.dv_flow_en = 0;
2442         }
2443 #endif
2444         config.ind_table_max_size =
2445                 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
2446         /*
2447          * Remove this check once DPDK supports larger/variable
2448          * indirection tables.
2449          */
2450         if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
2451                 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
2452         DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
2453                 config.ind_table_max_size);
2454         config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
2455                                   IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
2456         DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
2457                 (config.hw_vlan_strip ? "" : "not "));
2458         config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
2459                                  IBV_RAW_PACKET_CAP_SCATTER_FCS);
2460         DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
2461                 (config.hw_fcs_strip ? "" : "not "));
2462 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
2463         hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
2464 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
2465         hw_padding = !!(sh->device_attr.device_cap_flags_ex &
2466                         IBV_DEVICE_PCI_WRITE_END_PADDING);
2467 #endif
2468         if (config.hw_padding && !hw_padding) {
2469                 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
2470                 config.hw_padding = 0;
2471         } else if (config.hw_padding) {
2472                 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
2473         }
2474         config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
2475                       (sh->device_attr.tso_caps.supported_qpts &
2476                        (1 << IBV_QPT_RAW_PACKET)));
2477         if (config.tso)
2478                 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
2479         /*
2480          * MPW is disabled by default, while the Enhanced MPW is enabled
2481          * by default.
2482          */
2483         if (config.mps == MLX5_ARG_UNSET)
2484                 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
2485                                                           MLX5_MPW_DISABLED;
2486         else
2487                 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
2488         DRV_LOG(INFO, "%sMPS is %s",
2489                 config.mps == MLX5_MPW_ENHANCED ? "enhanced " :
2490                 config.mps == MLX5_MPW ? "legacy " : "",
2491                 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
2492         if (config.cqe_comp && !cqe_comp) {
2493                 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
2494                 config.cqe_comp = 0;
2495         }
2496         if (config.cqe_pad && !cqe_pad) {
2497                 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
2498                 config.cqe_pad = 0;
2499         } else if (config.cqe_pad) {
2500                 DRV_LOG(INFO, "Rx CQE padding is enabled");
2501         }
2502         if (config.devx) {
2503                 priv->counter_fallback = 0;
2504                 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
2505                 if (err) {
2506                         err = -err;
2507                         goto error;
2508                 }
2509                 if (!config.hca_attr.flow_counters_dump)
2510                         priv->counter_fallback = 1;
2511 #ifndef HAVE_IBV_DEVX_ASYNC
2512                 priv->counter_fallback = 1;
2513 #endif
2514                 if (priv->counter_fallback)
2515                         DRV_LOG(INFO, "Use fall-back DV counter management");
2516                 /* Check for LRO support. */
2517                 if (config.dest_tir && config.hca_attr.lro_cap &&
2518                     config.dv_flow_en) {
2519                         /* TBD check tunnel lro caps. */
2520                         config.lro.supported = config.hca_attr.lro_cap;
2521                         DRV_LOG(DEBUG, "Device supports LRO");
2522                         /*
2523                          * If LRO timeout is not configured by application,
2524                          * use the minimal supported value.
2525                          */
2526                         if (!config.lro.timeout)
2527                                 config.lro.timeout =
2528                                 config.hca_attr.lro_timer_supported_periods[0];
2529                         DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
2530                                 config.lro.timeout);
2531                 }
2532 #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_METER)
2533                 if (config.hca_attr.qos.sup && config.hca_attr.qos.srtcm_sup &&
2534                     config.dv_flow_en) {
2535                         uint8_t reg_c_mask =
2536                                 config.hca_attr.qos.flow_meter_reg_c_ids;
2537                         /*
2538                          * Meter needs two REG_C's for color match and pre-sfx
2539                          * flow match. Here get the REG_C for color match.
2540                          * REG_C_0 and REG_C_1 is reserved for metadata feature.
2541                          */
2542                         reg_c_mask &= 0xfc;
2543                         if (__builtin_popcount(reg_c_mask) < 1) {
2544                                 priv->mtr_en = 0;
2545                                 DRV_LOG(WARNING, "No available register for"
2546                                         " meter.");
2547                         } else {
2548                                 priv->mtr_color_reg = ffs(reg_c_mask) - 1 +
2549                                                       REG_C_0;
2550                                 priv->mtr_en = 1;
2551                                 DRV_LOG(DEBUG, "The REG_C meter uses is %d",
2552                                         priv->mtr_color_reg);
2553                         }
2554                 }
2555 #endif
2556         }
2557         if (config.mprq.enabled && mprq) {
2558                 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
2559                     config.mprq.stride_num_n < mprq_min_stride_num_n) {
2560                         config.mprq.stride_num_n =
2561                                 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
2562                                         mprq_min_stride_num_n);
2563                         DRV_LOG(WARNING,
2564                                 "the number of strides"
2565                                 " for Multi-Packet RQ is out of range,"
2566                                 " setting default value (%u)",
2567                                 1 << config.mprq.stride_num_n);
2568                 }
2569                 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
2570                 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
2571         } else if (config.mprq.enabled && !mprq) {
2572                 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
2573                 config.mprq.enabled = 0;
2574         }
2575         if (config.max_dump_files_num == 0)
2576                 config.max_dump_files_num = 128;
2577         eth_dev = rte_eth_dev_allocate(name);
2578         if (eth_dev == NULL) {
2579                 DRV_LOG(ERR, "can not allocate rte ethdev");
2580                 err = ENOMEM;
2581                 goto error;
2582         }
2583         /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
2584         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
2585         if (priv->representor) {
2586                 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
2587                 eth_dev->data->representor_id = priv->representor_id;
2588         }
2589         /*
2590          * Store associated network device interface index. This index
2591          * is permanent throughout the lifetime of device. So, we may store
2592          * the ifindex here and use the cached value further.
2593          */
2594         assert(spawn->ifindex);
2595         priv->if_index = spawn->ifindex;
2596         eth_dev->data->dev_private = priv;
2597         priv->dev_data = eth_dev->data;
2598         eth_dev->data->mac_addrs = priv->mac;
2599         eth_dev->device = dpdk_dev;
2600         /* Configure the first MAC address by default. */
2601         if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
2602                 DRV_LOG(ERR,
2603                         "port %u cannot get MAC address, is mlx5_en"
2604                         " loaded? (errno: %s)",
2605                         eth_dev->data->port_id, strerror(rte_errno));
2606                 err = ENODEV;
2607                 goto error;
2608         }
2609         DRV_LOG(INFO,
2610                 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
2611                 eth_dev->data->port_id,
2612                 mac.addr_bytes[0], mac.addr_bytes[1],
2613                 mac.addr_bytes[2], mac.addr_bytes[3],
2614                 mac.addr_bytes[4], mac.addr_bytes[5]);
2615 #ifndef NDEBUG
2616         {
2617                 char ifname[IF_NAMESIZE];
2618
2619                 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
2620                         DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
2621                                 eth_dev->data->port_id, ifname);
2622                 else
2623                         DRV_LOG(DEBUG, "port %u ifname is unknown",
2624                                 eth_dev->data->port_id);
2625         }
2626 #endif
2627         /* Get actual MTU if possible. */
2628         err = mlx5_get_mtu(eth_dev, &priv->mtu);
2629         if (err) {
2630                 err = rte_errno;
2631                 goto error;
2632         }
2633         DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
2634                 priv->mtu);
2635         /* Initialize burst functions to prevent crashes before link-up. */
2636         eth_dev->rx_pkt_burst = removed_rx_burst;
2637         eth_dev->tx_pkt_burst = removed_tx_burst;
2638         eth_dev->dev_ops = &mlx5_dev_ops;
2639         /* Register MAC address. */
2640         claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
2641         if (config.vf && config.vf_nl_en)
2642                 mlx5_nl_mac_addr_sync(eth_dev);
2643         TAILQ_INIT(&priv->flows);
2644         TAILQ_INIT(&priv->ctrl_flows);
2645         TAILQ_INIT(&priv->flow_meters);
2646         TAILQ_INIT(&priv->flow_meter_profiles);
2647         /* Hint libmlx5 to use PMD allocator for data plane resources */
2648         struct mlx5dv_ctx_allocators alctr = {
2649                 .alloc = &mlx5_alloc_verbs_buf,
2650                 .free = &mlx5_free_verbs_buf,
2651                 .data = priv,
2652         };
2653         mlx5_glue->dv_set_context_attr(sh->ctx,
2654                                        MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
2655                                        (void *)((uintptr_t)&alctr));
2656         /* Bring Ethernet device up. */
2657         DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
2658                 eth_dev->data->port_id);
2659         mlx5_set_link_up(eth_dev);
2660         /*
2661          * Even though the interrupt handler is not installed yet,
2662          * interrupts will still trigger on the async_fd from
2663          * Verbs context returned by ibv_open_device().
2664          */
2665         mlx5_link_update(eth_dev, 0);
2666 #ifdef HAVE_MLX5DV_DR_ESWITCH
2667         if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
2668               (switch_info->representor || switch_info->master)))
2669                 config.dv_esw_en = 0;
2670 #else
2671         config.dv_esw_en = 0;
2672 #endif
2673         /* Detect minimal data bytes to inline. */
2674         mlx5_set_min_inline(spawn, &config);
2675         /* Store device configuration on private structure. */
2676         priv->config = config;
2677         /* Create context for virtual machine VLAN workaround. */
2678         priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
2679         if (config.dv_flow_en) {
2680                 err = mlx5_alloc_shared_dr(priv);
2681                 if (err)
2682                         goto error;
2683                 priv->qrss_id_pool = mlx5_flow_id_pool_alloc();
2684                 if (!priv->qrss_id_pool) {
2685                         DRV_LOG(ERR, "can't create flow id pool");
2686                         err = ENOMEM;
2687                         goto error;
2688                 }
2689         }
2690         /* Supported Verbs flow priority number detection. */
2691         err = mlx5_flow_discover_priorities(eth_dev);
2692         if (err < 0) {
2693                 err = -err;
2694                 goto error;
2695         }
2696         priv->config.flow_prio = err;
2697         if (!priv->config.dv_esw_en &&
2698             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2699                 DRV_LOG(WARNING, "metadata mode %u is not supported "
2700                                  "(no E-Switch)", priv->config.dv_xmeta_en);
2701                 priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY;
2702         }
2703         mlx5_set_metadata_mask(eth_dev);
2704         if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
2705             !priv->sh->dv_regc0_mask) {
2706                 DRV_LOG(ERR, "metadata mode %u is not supported "
2707                              "(no metadata reg_c[0] is available)",
2708                              priv->config.dv_xmeta_en);
2709                         err = ENOTSUP;
2710                         goto error;
2711         }
2712         /* Query availibility of metadata reg_c's. */
2713         err = mlx5_flow_discover_mreg_c(eth_dev);
2714         if (err < 0) {
2715                 err = -err;
2716                 goto error;
2717         }
2718         if (!mlx5_flow_ext_mreg_supported(eth_dev)) {
2719                 DRV_LOG(DEBUG,
2720                         "port %u extensive metadata register is not supported",
2721                         eth_dev->data->port_id);
2722                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2723                         DRV_LOG(ERR, "metadata mode %u is not supported "
2724                                      "(no metadata registers available)",
2725                                      priv->config.dv_xmeta_en);
2726                         err = ENOTSUP;
2727                         goto error;
2728                 }
2729         }
2730         if (priv->config.dv_flow_en &&
2731             priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
2732             mlx5_flow_ext_mreg_supported(eth_dev) &&
2733             priv->sh->dv_regc0_mask) {
2734                 priv->mreg_cp_tbl = mlx5_hlist_create(MLX5_FLOW_MREG_HNAME,
2735                                                       MLX5_FLOW_MREG_HTABLE_SZ);
2736                 if (!priv->mreg_cp_tbl) {
2737                         err = ENOMEM;
2738                         goto error;
2739                 }
2740         }
2741         return eth_dev;
2742 error:
2743         if (priv) {
2744                 if (priv->mreg_cp_tbl)
2745                         mlx5_hlist_destroy(priv->mreg_cp_tbl, NULL, NULL);
2746                 if (priv->sh)
2747                         mlx5_free_shared_dr(priv);
2748                 if (priv->nl_socket_route >= 0)
2749                         close(priv->nl_socket_route);
2750                 if (priv->nl_socket_rdma >= 0)
2751                         close(priv->nl_socket_rdma);
2752                 if (priv->vmwa_context)
2753                         mlx5_vlan_vmwa_exit(priv->vmwa_context);
2754                 if (priv->qrss_id_pool)
2755                         mlx5_flow_id_pool_release(priv->qrss_id_pool);
2756                 if (own_domain_id)
2757                         claim_zero(rte_eth_switch_domain_free(priv->domain_id));
2758                 rte_free(priv);
2759                 if (eth_dev != NULL)
2760                         eth_dev->data->dev_private = NULL;
2761         }
2762         if (eth_dev != NULL) {
2763                 /* mac_addrs must not be freed alone because part of dev_private */
2764                 eth_dev->data->mac_addrs = NULL;
2765                 rte_eth_dev_release_port(eth_dev);
2766         }
2767         if (sh)
2768                 mlx5_free_shared_ibctx(sh);
2769         assert(err > 0);
2770         rte_errno = err;
2771         return NULL;
2772 }
2773
2774 /**
2775  * Comparison callback to sort device data.
2776  *
2777  * This is meant to be used with qsort().
2778  *
2779  * @param a[in]
2780  *   Pointer to pointer to first data object.
2781  * @param b[in]
2782  *   Pointer to pointer to second data object.
2783  *
2784  * @return
2785  *   0 if both objects are equal, less than 0 if the first argument is less
2786  *   than the second, greater than 0 otherwise.
2787  */
2788 static int
2789 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
2790 {
2791         const struct mlx5_switch_info *si_a =
2792                 &((const struct mlx5_dev_spawn_data *)a)->info;
2793         const struct mlx5_switch_info *si_b =
2794                 &((const struct mlx5_dev_spawn_data *)b)->info;
2795         int ret;
2796
2797         /* Master device first. */
2798         ret = si_b->master - si_a->master;
2799         if (ret)
2800                 return ret;
2801         /* Then representor devices. */
2802         ret = si_b->representor - si_a->representor;
2803         if (ret)
2804                 return ret;
2805         /* Unidentified devices come last in no specific order. */
2806         if (!si_a->representor)
2807                 return 0;
2808         /* Order representors by name. */
2809         return si_a->port_name - si_b->port_name;
2810 }
2811
2812 /**
2813  * Match PCI information for possible slaves of bonding device.
2814  *
2815  * @param[in] ibv_dev
2816  *   Pointer to Infiniband device structure.
2817  * @param[in] pci_dev
2818  *   Pointer to PCI device structure to match PCI address.
2819  * @param[in] nl_rdma
2820  *   Netlink RDMA group socket handle.
2821  *
2822  * @return
2823  *   negative value if no bonding device found, otherwise
2824  *   positive index of slave PF in bonding.
2825  */
2826 static int
2827 mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
2828                            const struct rte_pci_device *pci_dev,
2829                            int nl_rdma)
2830 {
2831         char ifname[IF_NAMESIZE + 1];
2832         unsigned int ifindex;
2833         unsigned int np, i;
2834         FILE *file = NULL;
2835         int pf = -1;
2836
2837         /*
2838          * Try to get master device name. If something goes
2839          * wrong suppose the lack of kernel support and no
2840          * bonding devices.
2841          */
2842         if (nl_rdma < 0)
2843                 return -1;
2844         if (!strstr(ibv_dev->name, "bond"))
2845                 return -1;
2846         np = mlx5_nl_portnum(nl_rdma, ibv_dev->name);
2847         if (!np)
2848                 return -1;
2849         /*
2850          * The Master device might not be on the predefined
2851          * port (not on port index 1, it is not garanted),
2852          * we have to scan all Infiniband device port and
2853          * find master.
2854          */
2855         for (i = 1; i <= np; ++i) {
2856                 /* Check whether Infiniband port is populated. */
2857                 ifindex = mlx5_nl_ifindex(nl_rdma, ibv_dev->name, i);
2858                 if (!ifindex)
2859                         continue;
2860                 if (!if_indextoname(ifindex, ifname))
2861                         continue;
2862                 /* Try to read bonding slave names from sysfs. */
2863                 MKSTR(slaves,
2864                       "/sys/class/net/%s/master/bonding/slaves", ifname);
2865                 file = fopen(slaves, "r");
2866                 if (file)
2867                         break;
2868         }
2869         if (!file)
2870                 return -1;
2871         /* Use safe format to check maximal buffer length. */
2872         assert(atol(RTE_STR(IF_NAMESIZE)) == IF_NAMESIZE);
2873         while (fscanf(file, "%" RTE_STR(IF_NAMESIZE) "s", ifname) == 1) {
2874                 char tmp_str[IF_NAMESIZE + 32];
2875                 struct rte_pci_addr pci_addr;
2876                 struct mlx5_switch_info info;
2877
2878                 /* Process slave interface names in the loop. */
2879                 snprintf(tmp_str, sizeof(tmp_str),
2880                          "/sys/class/net/%s", ifname);
2881                 if (mlx5_dev_to_pci_addr(tmp_str, &pci_addr)) {
2882                         DRV_LOG(WARNING, "can not get PCI address"
2883                                          " for netdev \"%s\"", ifname);
2884                         continue;
2885                 }
2886                 if (pci_dev->addr.domain != pci_addr.domain ||
2887                     pci_dev->addr.bus != pci_addr.bus ||
2888                     pci_dev->addr.devid != pci_addr.devid ||
2889                     pci_dev->addr.function != pci_addr.function)
2890                         continue;
2891                 /* Slave interface PCI address match found. */
2892                 fclose(file);
2893                 snprintf(tmp_str, sizeof(tmp_str),
2894                          "/sys/class/net/%s/phys_port_name", ifname);
2895                 file = fopen(tmp_str, "rb");
2896                 if (!file)
2897                         break;
2898                 info.name_type = MLX5_PHYS_PORT_NAME_TYPE_NOTSET;
2899                 if (fscanf(file, "%32s", tmp_str) == 1)
2900                         mlx5_translate_port_name(tmp_str, &info);
2901                 if (info.name_type == MLX5_PHYS_PORT_NAME_TYPE_LEGACY ||
2902                     info.name_type == MLX5_PHYS_PORT_NAME_TYPE_UPLINK)
2903                         pf = info.port_name;
2904                 break;
2905         }
2906         if (file)
2907                 fclose(file);
2908         return pf;
2909 }
2910
2911 /**
2912  * DPDK callback to register a PCI device.
2913  *
2914  * This function spawns Ethernet devices out of a given PCI device.
2915  *
2916  * @param[in] pci_drv
2917  *   PCI driver structure (mlx5_driver).
2918  * @param[in] pci_dev
2919  *   PCI device information.
2920  *
2921  * @return
2922  *   0 on success, a negative errno value otherwise and rte_errno is set.
2923  */
2924 static int
2925 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2926                struct rte_pci_device *pci_dev)
2927 {
2928         struct ibv_device **ibv_list;
2929         /*
2930          * Number of found IB Devices matching with requested PCI BDF.
2931          * nd != 1 means there are multiple IB devices over the same
2932          * PCI device and we have representors and master.
2933          */
2934         unsigned int nd = 0;
2935         /*
2936          * Number of found IB device Ports. nd = 1 and np = 1..n means
2937          * we have the single multiport IB device, and there may be
2938          * representors attached to some of found ports.
2939          */
2940         unsigned int np = 0;
2941         /*
2942          * Number of DPDK ethernet devices to Spawn - either over
2943          * multiple IB devices or multiple ports of single IB device.
2944          * Actually this is the number of iterations to spawn.
2945          */
2946         unsigned int ns = 0;
2947         /*
2948          * Bonding device
2949          *   < 0 - no bonding device (single one)
2950          *  >= 0 - bonding device (value is slave PF index)
2951          */
2952         int bd = -1;
2953         struct mlx5_dev_spawn_data *list = NULL;
2954         struct mlx5_dev_config dev_config;
2955         int ret;
2956
2957         ret = mlx5_init_once();
2958         if (ret) {
2959                 DRV_LOG(ERR, "unable to init PMD global data: %s",
2960                         strerror(rte_errno));
2961                 return -rte_errno;
2962         }
2963         assert(pci_drv == &mlx5_driver);
2964         errno = 0;
2965         ibv_list = mlx5_glue->get_device_list(&ret);
2966         if (!ibv_list) {
2967                 rte_errno = errno ? errno : ENOSYS;
2968                 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
2969                 return -rte_errno;
2970         }
2971         /*
2972          * First scan the list of all Infiniband devices to find
2973          * matching ones, gathering into the list.
2974          */
2975         struct ibv_device *ibv_match[ret + 1];
2976         int nl_route = mlx5_nl_init(NETLINK_ROUTE);
2977         int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2978         unsigned int i;
2979
2980         while (ret-- > 0) {
2981                 struct rte_pci_addr pci_addr;
2982
2983                 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
2984                 bd = mlx5_device_bond_pci_match
2985                                 (ibv_list[ret], pci_dev, nl_rdma);
2986                 if (bd >= 0) {
2987                         /*
2988                          * Bonding device detected. Only one match is allowed,
2989                          * the bonding is supported over multi-port IB device,
2990                          * there should be no matches on representor PCI
2991                          * functions or non VF LAG bonding devices with
2992                          * specified address.
2993                          */
2994                         if (nd) {
2995                                 DRV_LOG(ERR,
2996                                         "multiple PCI match on bonding device"
2997                                         "\"%s\" found", ibv_list[ret]->name);
2998                                 rte_errno = ENOENT;
2999                                 ret = -rte_errno;
3000                                 goto exit;
3001                         }
3002                         DRV_LOG(INFO, "PCI information matches for"
3003                                       " slave %d bonding device \"%s\"",
3004                                       bd, ibv_list[ret]->name);
3005                         ibv_match[nd++] = ibv_list[ret];
3006                         break;
3007                 }
3008                 if (mlx5_dev_to_pci_addr
3009                         (ibv_list[ret]->ibdev_path, &pci_addr))
3010                         continue;
3011                 if (pci_dev->addr.domain != pci_addr.domain ||
3012                     pci_dev->addr.bus != pci_addr.bus ||
3013                     pci_dev->addr.devid != pci_addr.devid ||
3014                     pci_dev->addr.function != pci_addr.function)
3015                         continue;
3016                 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
3017                         ibv_list[ret]->name);
3018                 ibv_match[nd++] = ibv_list[ret];
3019         }
3020         ibv_match[nd] = NULL;
3021         if (!nd) {
3022                 /* No device matches, just complain and bail out. */
3023                 DRV_LOG(WARNING,
3024                         "no Verbs device matches PCI device " PCI_PRI_FMT ","
3025                         " are kernel drivers loaded?",
3026                         pci_dev->addr.domain, pci_dev->addr.bus,
3027                         pci_dev->addr.devid, pci_dev->addr.function);
3028                 rte_errno = ENOENT;
3029                 ret = -rte_errno;
3030                 goto exit;
3031         }
3032         if (nd == 1) {
3033                 /*
3034                  * Found single matching device may have multiple ports.
3035                  * Each port may be representor, we have to check the port
3036                  * number and check the representors existence.
3037                  */
3038                 if (nl_rdma >= 0)
3039                         np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
3040                 if (!np)
3041                         DRV_LOG(WARNING, "can not get IB device \"%s\""
3042                                          " ports number", ibv_match[0]->name);
3043                 if (bd >= 0 && !np) {
3044                         DRV_LOG(ERR, "can not get ports"
3045                                      " for bonding device");
3046                         rte_errno = ENOENT;
3047                         ret = -rte_errno;
3048                         goto exit;
3049                 }
3050         }
3051 #ifndef HAVE_MLX5DV_DR_DEVX_PORT
3052         if (bd >= 0) {
3053                 /*
3054                  * This may happen if there is VF LAG kernel support and
3055                  * application is compiled with older rdma_core library.
3056                  */
3057                 DRV_LOG(ERR,
3058                         "No kernel/verbs support for VF LAG bonding found.");
3059                 rte_errno = ENOTSUP;
3060                 ret = -rte_errno;
3061                 goto exit;
3062         }
3063 #endif
3064         /*
3065          * Now we can determine the maximal
3066          * amount of devices to be spawned.
3067          */
3068         list = rte_zmalloc("device spawn data",
3069                          sizeof(struct mlx5_dev_spawn_data) *
3070                          (np ? np : nd),
3071                          RTE_CACHE_LINE_SIZE);
3072         if (!list) {
3073                 DRV_LOG(ERR, "spawn data array allocation failure");
3074                 rte_errno = ENOMEM;
3075                 ret = -rte_errno;
3076                 goto exit;
3077         }
3078         if (bd >= 0 || np > 1) {
3079                 /*
3080                  * Single IB device with multiple ports found,
3081                  * it may be E-Switch master device and representors.
3082                  * We have to perform identification trough the ports.
3083                  */
3084                 assert(nl_rdma >= 0);
3085                 assert(ns == 0);
3086                 assert(nd == 1);
3087                 assert(np);
3088                 for (i = 1; i <= np; ++i) {
3089                         list[ns].max_port = np;
3090                         list[ns].ibv_port = i;
3091                         list[ns].ibv_dev = ibv_match[0];
3092                         list[ns].eth_dev = NULL;
3093                         list[ns].pci_dev = pci_dev;
3094                         list[ns].pf_bond = bd;
3095                         list[ns].ifindex = mlx5_nl_ifindex
3096                                         (nl_rdma, list[ns].ibv_dev->name, i);
3097                         if (!list[ns].ifindex) {
3098                                 /*
3099                                  * No network interface index found for the
3100                                  * specified port, it means there is no
3101                                  * representor on this port. It's OK,
3102                                  * there can be disabled ports, for example
3103                                  * if sriov_numvfs < sriov_totalvfs.
3104                                  */
3105                                 continue;
3106                         }
3107                         ret = -1;
3108                         if (nl_route >= 0)
3109                                 ret = mlx5_nl_switch_info
3110                                                (nl_route,
3111                                                 list[ns].ifindex,
3112                                                 &list[ns].info);
3113                         if (ret || (!list[ns].info.representor &&
3114                                     !list[ns].info.master)) {
3115                                 /*
3116                                  * We failed to recognize representors with
3117                                  * Netlink, let's try to perform the task
3118                                  * with sysfs.
3119                                  */
3120                                 ret =  mlx5_sysfs_switch_info
3121                                                 (list[ns].ifindex,
3122                                                  &list[ns].info);
3123                         }
3124                         if (!ret && bd >= 0) {
3125                                 switch (list[ns].info.name_type) {
3126                                 case MLX5_PHYS_PORT_NAME_TYPE_UPLINK:
3127                                         if (list[ns].info.port_name == bd)
3128                                                 ns++;
3129                                         break;
3130                                 case MLX5_PHYS_PORT_NAME_TYPE_PFVF:
3131                                         if (list[ns].info.pf_num == bd)
3132                                                 ns++;
3133                                         break;
3134                                 default:
3135                                         break;
3136                                 }
3137                                 continue;
3138                         }
3139                         if (!ret && (list[ns].info.representor ^
3140                                      list[ns].info.master))
3141                                 ns++;
3142                 }
3143                 if (!ns) {
3144                         DRV_LOG(ERR,
3145                                 "unable to recognize master/representors"
3146                                 " on the IB device with multiple ports");
3147                         rte_errno = ENOENT;
3148                         ret = -rte_errno;
3149                         goto exit;
3150                 }
3151         } else {
3152                 /*
3153                  * The existence of several matching entries (nd > 1) means
3154                  * port representors have been instantiated. No existing Verbs
3155                  * call nor sysfs entries can tell them apart, this can only
3156                  * be done through Netlink calls assuming kernel drivers are
3157                  * recent enough to support them.
3158                  *
3159                  * In the event of identification failure through Netlink,
3160                  * try again through sysfs, then:
3161                  *
3162                  * 1. A single IB device matches (nd == 1) with single
3163                  *    port (np=0/1) and is not a representor, assume
3164                  *    no switch support.
3165                  *
3166                  * 2. Otherwise no safe assumptions can be made;
3167                  *    complain louder and bail out.
3168                  */
3169                 np = 1;
3170                 for (i = 0; i != nd; ++i) {
3171                         memset(&list[ns].info, 0, sizeof(list[ns].info));
3172                         list[ns].max_port = 1;
3173                         list[ns].ibv_port = 1;
3174                         list[ns].ibv_dev = ibv_match[i];
3175                         list[ns].eth_dev = NULL;
3176                         list[ns].pci_dev = pci_dev;
3177                         list[ns].pf_bond = -1;
3178                         list[ns].ifindex = 0;
3179                         if (nl_rdma >= 0)
3180                                 list[ns].ifindex = mlx5_nl_ifindex
3181                                         (nl_rdma, list[ns].ibv_dev->name, 1);
3182                         if (!list[ns].ifindex) {
3183                                 char ifname[IF_NAMESIZE];
3184
3185                                 /*
3186                                  * Netlink failed, it may happen with old
3187                                  * ib_core kernel driver (before 4.16).
3188                                  * We can assume there is old driver because
3189                                  * here we are processing single ports IB
3190                                  * devices. Let's try sysfs to retrieve
3191                                  * the ifindex. The method works for
3192                                  * master device only.
3193                                  */
3194                                 if (nd > 1) {
3195                                         /*
3196                                          * Multiple devices found, assume
3197                                          * representors, can not distinguish
3198                                          * master/representor and retrieve
3199                                          * ifindex via sysfs.
3200                                          */
3201                                         continue;
3202                                 }
3203                                 ret = mlx5_get_master_ifname
3204                                         (ibv_match[i]->ibdev_path, &ifname);
3205                                 if (!ret)
3206                                         list[ns].ifindex =
3207                                                 if_nametoindex(ifname);
3208                                 if (!list[ns].ifindex) {
3209                                         /*
3210                                          * No network interface index found
3211                                          * for the specified device, it means
3212                                          * there it is neither representor
3213                                          * nor master.
3214                                          */
3215                                         continue;
3216                                 }
3217                         }
3218                         ret = -1;
3219                         if (nl_route >= 0)
3220                                 ret = mlx5_nl_switch_info
3221                                                (nl_route,
3222                                                 list[ns].ifindex,
3223                                                 &list[ns].info);
3224                         if (ret || (!list[ns].info.representor &&
3225                                     !list[ns].info.master)) {
3226                                 /*
3227                                  * We failed to recognize representors with
3228                                  * Netlink, let's try to perform the task
3229                                  * with sysfs.
3230                                  */
3231                                 ret =  mlx5_sysfs_switch_info
3232                                                 (list[ns].ifindex,
3233                                                  &list[ns].info);
3234                         }
3235                         if (!ret && (list[ns].info.representor ^
3236                                      list[ns].info.master)) {
3237                                 ns++;
3238                         } else if ((nd == 1) &&
3239                                    !list[ns].info.representor &&
3240                                    !list[ns].info.master) {
3241                                 /*
3242                                  * Single IB device with
3243                                  * one physical port and
3244                                  * attached network device.
3245                                  * May be SRIOV is not enabled
3246                                  * or there is no representors.
3247                                  */
3248                                 DRV_LOG(INFO, "no E-Switch support detected");
3249                                 ns++;
3250                                 break;
3251                         }
3252                 }
3253                 if (!ns) {
3254                         DRV_LOG(ERR,
3255                                 "unable to recognize master/representors"
3256                                 " on the multiple IB devices");
3257                         rte_errno = ENOENT;
3258                         ret = -rte_errno;
3259                         goto exit;
3260                 }
3261         }
3262         assert(ns);
3263         /*
3264          * Sort list to probe devices in natural order for users convenience
3265          * (i.e. master first, then representors from lowest to highest ID).
3266          */
3267         qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
3268         /* Default configuration. */
3269         dev_config = (struct mlx5_dev_config){
3270                 .hw_padding = 0,
3271                 .mps = MLX5_ARG_UNSET,
3272                 .dbnc = MLX5_ARG_UNSET,
3273                 .rx_vec_en = 1,
3274                 .txq_inline_max = MLX5_ARG_UNSET,
3275                 .txq_inline_min = MLX5_ARG_UNSET,
3276                 .txq_inline_mpw = MLX5_ARG_UNSET,
3277                 .txqs_inline = MLX5_ARG_UNSET,
3278                 .vf_nl_en = 1,
3279                 .mr_ext_memseg_en = 1,
3280                 .mprq = {
3281                         .enabled = 0, /* Disabled by default. */
3282                         .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
3283                         .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
3284                         .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
3285                 },
3286                 .dv_esw_en = 1,
3287                 .dv_flow_en = 1,
3288         };
3289         /* Device specific configuration. */
3290         switch (pci_dev->id.device_id) {
3291         case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
3292         case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
3293         case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
3294         case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
3295         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
3296         case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
3297         case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF:
3298                 dev_config.vf = 1;
3299                 break;
3300         default:
3301                 break;
3302         }
3303         for (i = 0; i != ns; ++i) {
3304                 uint32_t restore;
3305
3306                 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
3307                                                  &list[i],
3308                                                  dev_config);
3309                 if (!list[i].eth_dev) {
3310                         if (rte_errno != EBUSY && rte_errno != EEXIST)
3311                                 break;
3312                         /* Device is disabled or already spawned. Ignore it. */
3313                         continue;
3314                 }
3315                 restore = list[i].eth_dev->data->dev_flags;
3316                 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
3317                 /* Restore non-PCI flags cleared by the above call. */
3318                 list[i].eth_dev->data->dev_flags |= restore;
3319                 mlx5_dev_interrupt_handler_devx_install(list[i].eth_dev);
3320                 rte_eth_dev_probing_finish(list[i].eth_dev);
3321         }
3322         if (i != ns) {
3323                 DRV_LOG(ERR,
3324                         "probe of PCI device " PCI_PRI_FMT " aborted after"
3325                         " encountering an error: %s",
3326                         pci_dev->addr.domain, pci_dev->addr.bus,
3327                         pci_dev->addr.devid, pci_dev->addr.function,
3328                         strerror(rte_errno));
3329                 ret = -rte_errno;
3330                 /* Roll back. */
3331                 while (i--) {
3332                         if (!list[i].eth_dev)
3333                                 continue;
3334                         mlx5_dev_close(list[i].eth_dev);
3335                         /* mac_addrs must not be freed because in dev_private */
3336                         list[i].eth_dev->data->mac_addrs = NULL;
3337                         claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
3338                 }
3339                 /* Restore original error. */
3340                 rte_errno = -ret;
3341         } else {
3342                 ret = 0;
3343         }
3344 exit:
3345         /*
3346          * Do the routine cleanup:
3347          * - close opened Netlink sockets
3348          * - free allocated spawn data array
3349          * - free the Infiniband device list
3350          */
3351         if (nl_rdma >= 0)
3352                 close(nl_rdma);
3353         if (nl_route >= 0)
3354                 close(nl_route);
3355         if (list)
3356                 rte_free(list);
3357         assert(ibv_list);
3358         mlx5_glue->free_device_list(ibv_list);
3359         return ret;
3360 }
3361
3362 /**
3363  * Look for the ethernet device belonging to mlx5 driver.
3364  *
3365  * @param[in] port_id
3366  *   port_id to start looking for device.
3367  * @param[in] pci_dev
3368  *   Pointer to the hint PCI device. When device is being probed
3369  *   the its siblings (master and preceding representors might
3370  *   not have assigned driver yet (because the mlx5_pci_probe()
3371  *   is not completed yet, for this case match on hint PCI
3372  *   device may be used to detect sibling device.
3373  *
3374  * @return
3375  *   port_id of found device, RTE_MAX_ETHPORT if not found.
3376  */
3377 uint16_t
3378 mlx5_eth_find_next(uint16_t port_id, struct rte_pci_device *pci_dev)
3379 {
3380         while (port_id < RTE_MAX_ETHPORTS) {
3381                 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3382
3383                 if (dev->state != RTE_ETH_DEV_UNUSED &&
3384                     dev->device &&
3385                     (dev->device == &pci_dev->device ||
3386                      (dev->device->driver &&
3387                      dev->device->driver->name &&
3388                      !strcmp(dev->device->driver->name, MLX5_DRIVER_NAME))))
3389                         break;
3390                 port_id++;
3391         }
3392         if (port_id >= RTE_MAX_ETHPORTS)
3393                 return RTE_MAX_ETHPORTS;
3394         return port_id;
3395 }
3396
3397 /**
3398  * DPDK callback to remove a PCI device.
3399  *
3400  * This function removes all Ethernet devices belong to a given PCI device.
3401  *
3402  * @param[in] pci_dev
3403  *   Pointer to the PCI device.
3404  *
3405  * @return
3406  *   0 on success, the function cannot fail.
3407  */
3408 static int
3409 mlx5_pci_remove(struct rte_pci_device *pci_dev)
3410 {
3411         uint16_t port_id;
3412
3413         RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
3414                 rte_eth_dev_close(port_id);
3415         return 0;
3416 }
3417
3418 static const struct rte_pci_id mlx5_pci_id_map[] = {
3419         {
3420                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3421                                PCI_DEVICE_ID_MELLANOX_CONNECTX4)
3422         },
3423         {
3424                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3425                                PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
3426         },
3427         {
3428                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3429                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
3430         },
3431         {
3432                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3433                                PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
3434         },
3435         {
3436                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3437                                PCI_DEVICE_ID_MELLANOX_CONNECTX5)
3438         },
3439         {
3440                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3441                                PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
3442         },
3443         {
3444                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3445                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
3446         },
3447         {
3448                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3449                                PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
3450         },
3451         {
3452                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3453                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
3454         },
3455         {
3456                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3457                                PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
3458         },
3459         {
3460                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3461                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
3462         },
3463         {
3464                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3465                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
3466         },
3467         {
3468                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3469                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6DX)
3470         },
3471         {
3472                 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
3473                                 PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF)
3474         },
3475         {
3476                 .vendor_id = 0
3477         }
3478 };
3479
3480 static struct rte_pci_driver mlx5_driver = {
3481         .driver = {
3482                 .name = MLX5_DRIVER_NAME
3483         },
3484         .id_table = mlx5_pci_id_map,
3485         .probe = mlx5_pci_probe,
3486         .remove = mlx5_pci_remove,
3487         .dma_map = mlx5_dma_map,
3488         .dma_unmap = mlx5_dma_unmap,
3489         .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
3490                      RTE_PCI_DRV_PROBE_AGAIN,
3491 };
3492
3493 #ifdef RTE_IBVERBS_LINK_DLOPEN
3494
3495 /**
3496  * Suffix RTE_EAL_PMD_PATH with "-glue".
3497  *
3498  * This function performs a sanity check on RTE_EAL_PMD_PATH before
3499  * suffixing its last component.
3500  *
3501  * @param buf[out]
3502  *   Output buffer, should be large enough otherwise NULL is returned.
3503  * @param size
3504  *   Size of @p out.
3505  *
3506  * @return
3507  *   Pointer to @p buf or @p NULL in case suffix cannot be appended.
3508  */
3509 static char *
3510 mlx5_glue_path(char *buf, size_t size)
3511 {
3512         static const char *const bad[] = { "/", ".", "..", NULL };
3513         const char *path = RTE_EAL_PMD_PATH;
3514         size_t len = strlen(path);
3515         size_t off;
3516         int i;
3517
3518         while (len && path[len - 1] == '/')
3519                 --len;
3520         for (off = len; off && path[off - 1] != '/'; --off)
3521                 ;
3522         for (i = 0; bad[i]; ++i)
3523                 if (!strncmp(path + off, bad[i], (int)(len - off)))
3524                         goto error;
3525         i = snprintf(buf, size, "%.*s-glue", (int)len, path);
3526         if (i == -1 || (size_t)i >= size)
3527                 goto error;
3528         return buf;
3529 error:
3530         DRV_LOG(ERR,
3531                 "unable to append \"-glue\" to last component of"
3532                 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
3533                 " please re-configure DPDK");
3534         return NULL;
3535 }
3536
3537 /**
3538  * Initialization routine for run-time dependency on rdma-core.
3539  */
3540 static int
3541 mlx5_glue_init(void)
3542 {
3543         char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
3544         const char *path[] = {
3545                 /*
3546                  * A basic security check is necessary before trusting
3547                  * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
3548                  */
3549                 (geteuid() == getuid() && getegid() == getgid() ?
3550                  getenv("MLX5_GLUE_PATH") : NULL),
3551                 /*
3552                  * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
3553                  * variant, otherwise let dlopen() look up libraries on its
3554                  * own.
3555                  */
3556                 (*RTE_EAL_PMD_PATH ?
3557                  mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
3558         };
3559         unsigned int i = 0;
3560         void *handle = NULL;
3561         void **sym;
3562         const char *dlmsg;
3563
3564         while (!handle && i != RTE_DIM(path)) {
3565                 const char *end;
3566                 size_t len;
3567                 int ret;
3568
3569                 if (!path[i]) {
3570                         ++i;
3571                         continue;
3572                 }
3573                 end = strpbrk(path[i], ":;");
3574                 if (!end)
3575                         end = path[i] + strlen(path[i]);
3576                 len = end - path[i];
3577                 ret = 0;
3578                 do {
3579                         char name[ret + 1];
3580
3581                         ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
3582                                        (int)len, path[i],
3583                                        (!len || *(end - 1) == '/') ? "" : "/");
3584                         if (ret == -1)
3585                                 break;
3586                         if (sizeof(name) != (size_t)ret + 1)
3587                                 continue;
3588                         DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
3589                                 name);
3590                         handle = dlopen(name, RTLD_LAZY);
3591                         break;
3592                 } while (1);
3593                 path[i] = end + 1;
3594                 if (!*end)
3595                         ++i;
3596         }
3597         if (!handle) {
3598                 rte_errno = EINVAL;
3599                 dlmsg = dlerror();
3600                 if (dlmsg)
3601                         DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
3602                 goto glue_error;
3603         }
3604         sym = dlsym(handle, "mlx5_glue");
3605         if (!sym || !*sym) {
3606                 rte_errno = EINVAL;
3607                 dlmsg = dlerror();
3608                 if (dlmsg)
3609                         DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
3610                 goto glue_error;
3611         }
3612         mlx5_glue = *sym;
3613         return 0;
3614 glue_error:
3615         if (handle)
3616                 dlclose(handle);
3617         DRV_LOG(WARNING,
3618                 "cannot initialize PMD due to missing run-time dependency on"
3619                 " rdma-core libraries (libibverbs, libmlx5)");
3620         return -rte_errno;
3621 }
3622
3623 #endif
3624
3625 /**
3626  * Driver initialization routine.
3627  */
3628 RTE_INIT(rte_mlx5_pmd_init)
3629 {
3630         /* Initialize driver log type. */
3631         mlx5_logtype = rte_log_register("pmd.net.mlx5");
3632         if (mlx5_logtype >= 0)
3633                 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
3634
3635         /* Build the static tables for Verbs conversion. */
3636         mlx5_set_ptype_table();
3637         mlx5_set_cksum_table();
3638         mlx5_set_swp_types_table();
3639         /*
3640          * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
3641          * huge pages. Calling ibv_fork_init() during init allows
3642          * applications to use fork() safely for purposes other than
3643          * using this PMD, which is not supported in forked processes.
3644          */
3645         setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
3646         /* Match the size of Rx completion entry to the size of a cacheline. */
3647         if (RTE_CACHE_LINE_SIZE == 128)
3648                 setenv("MLX5_CQE_SIZE", "128", 0);
3649         /*
3650          * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
3651          * cleanup all the Verbs resources even when the device was removed.
3652          */
3653         setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
3654 #ifdef RTE_IBVERBS_LINK_DLOPEN
3655         if (mlx5_glue_init())
3656                 return;
3657         assert(mlx5_glue);
3658 #endif
3659 #ifndef NDEBUG
3660         /* Glue structure must not contain any NULL pointers. */
3661         {
3662                 unsigned int i;
3663
3664                 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
3665                         assert(((const void *const *)mlx5_glue)[i]);
3666         }
3667 #endif
3668         if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
3669                 DRV_LOG(ERR,
3670                         "rdma-core glue \"%s\" mismatch: \"%s\" is required",
3671                         mlx5_glue->version, MLX5_GLUE_VERSION);
3672                 return;
3673         }
3674         mlx5_glue->fork_init();
3675         rte_pci_register(&mlx5_driver);
3676 }
3677
3678 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
3679 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
3680 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");