4 * Copyright 2015 6WIND S.A.
5 * Copyright 2015 Mellanox.
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34 #ifndef RTE_PMD_MLX5_H_
35 #define RTE_PMD_MLX5_H_
41 #include <netinet/in.h>
45 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
47 #pragma GCC diagnostic ignored "-pedantic"
49 #include <infiniband/verbs.h>
51 #pragma GCC diagnostic error "-pedantic"
54 /* DPDK headers don't like -pedantic. */
56 #pragma GCC diagnostic ignored "-pedantic"
58 #include <rte_ether.h>
59 #include <rte_ethdev.h>
60 #include <rte_spinlock.h>
62 #pragma GCC diagnostic error "-pedantic"
65 #include "mlx5_utils.h"
66 #include "mlx5_autoconf.h"
67 #include "mlx5_defs.h"
70 PCI_VENDOR_ID_MELLANOX = 0x15b3,
74 PCI_DEVICE_ID_MELLANOX_CONNECTX4 = 0x1013,
75 PCI_DEVICE_ID_MELLANOX_CONNECTX4VF = 0x1014,
76 PCI_DEVICE_ID_MELLANOX_CONNECTX4LX = 0x1015,
77 PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF = 0x1016,
81 struct rte_eth_dev *dev; /* Ethernet device. */
82 struct ibv_context *ctx; /* Verbs context. */
83 struct ibv_device_attr device_attr; /* Device properties. */
84 struct ibv_pd *pd; /* Protection Domain. */
86 * MAC addresses array and configuration bit-field.
87 * An extra entry that cannot be modified by the DPDK is reserved
88 * for broadcast frames (destination MAC address ff:ff:ff:ff:ff:ff).
90 struct ether_addr mac[MLX5_MAX_MAC_ADDRESSES];
91 BITFIELD_DECLARE(mac_configured, uint32_t, MLX5_MAX_MAC_ADDRESSES);
92 /* Device properties. */
93 uint16_t mtu; /* Configured MTU. */
94 uint8_t port; /* Physical port number. */
95 unsigned int started:1; /* Device started, flows enabled. */
96 unsigned int hw_qpg:1; /* QP groups are supported. */
97 unsigned int hw_tss:1; /* TSS is supported. */
98 unsigned int hw_rss:1; /* RSS is supported. */
99 unsigned int hw_csum:1; /* Checksum offload is supported. */
100 unsigned int hw_csum_l2tun:1; /* Same for L2 tunnels. */
101 unsigned int rss:1; /* RSS is enabled. */
102 unsigned int vf:1; /* This is a VF device. */
103 unsigned int max_rss_tbl_sz; /* Maximum number of RSS queues. */
104 rte_spinlock_t lock; /* Lock for control functions. */
108 * Lock private structure to protect it from concurrent access in the
112 * Pointer to private structure.
115 priv_lock(struct priv *priv)
117 rte_spinlock_lock(&priv->lock);
121 * Unlock private structure.
124 * Pointer to private structure.
127 priv_unlock(struct priv *priv)
129 rte_spinlock_unlock(&priv->lock);
134 int priv_get_ifname(const struct priv *, char (*)[IF_NAMESIZE]);
135 int priv_ifreq(const struct priv *, int req, struct ifreq *);
136 int priv_get_mtu(struct priv *, uint16_t *);
137 int priv_set_flags(struct priv *, unsigned int, unsigned int);
138 int mlx5_ibv_device_to_pci_addr(const struct ibv_device *,
139 struct rte_pci_addr *);
143 int priv_get_mac(struct priv *, uint8_t (*)[ETHER_ADDR_LEN]);
144 int priv_mac_addr_add(struct priv *, unsigned int,
145 const uint8_t (*)[ETHER_ADDR_LEN]);
147 #endif /* RTE_PMD_MLX5_H_ */