drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <stdbool.h>
  10 #include <sys/queue.h>
  11
  12 #include <rte_common.h>
  13 #include <rte_ether.h>
  14 #include <ethdev_driver.h>
  15 #include <rte_eal_paging.h>
  16 #include <rte_flow.h>
  17 #include <rte_cycles.h>
  18 #include <rte_flow_driver.h>
  19 #include <rte_malloc.h>
  20 #include <rte_ip.h>
  21
  22 #include <mlx5_glue.h>
  23 #include <mlx5_devx_cmds.h>
  24 #include <mlx5_prm.h>
  25 #include <mlx5_malloc.h>
  26
  27 #include "mlx5_defs.h"
  28 #include "mlx5.h"
  29 #include "mlx5_flow.h"
  30 #include "mlx5_flow_os.h"
  31 #include "mlx5_rxtx.h"
  32 #include "mlx5_common_os.h"
  33 #include "rte_pmd_mlx5.h"
  34
  35 struct tunnel_default_miss_ctx {
  36         uint16_t *queue;
  37         __extension__
  38         union {
  39                 struct rte_flow_action_rss action_rss;
  40                 struct rte_flow_action_queue miss_queue;
  41                 struct rte_flow_action_jump miss_jump;
  42                 uint8_t raw[0];
  43         };
  44 };
  45
  46 static int
  47 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
  48                              struct rte_flow *flow,
  49                              const struct rte_flow_attr *attr,
  50                              const struct rte_flow_action *app_actions,
  51                              uint32_t flow_idx,
  52                              struct tunnel_default_miss_ctx *ctx,
  53                              struct rte_flow_error *error);
  54 static struct mlx5_flow_tunnel *
  55 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id);
  56 static void
  57 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel);
  58 static uint32_t
  59 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
  60                                 const struct mlx5_flow_tunnel *tunnel,
  61                                 uint32_t group, uint32_t *table,
  62                                 struct rte_flow_error *error);
  63
  64 static struct mlx5_flow_workspace *mlx5_flow_push_thread_workspace(void);
  65 static void mlx5_flow_pop_thread_workspace(void);
  66
  67
  68 /** Device flow drivers. */
  69 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  70
  71 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  72
  73 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  74         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  75 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  76         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  77 #endif
  78         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  79         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  80 };
  81
  82 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */
  83 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \
  84         (const int []){ \
  85                 __VA_ARGS__, 0, \
  86         }
  87
  88 /** Node object of input graph for mlx5_flow_expand_rss(). */
  89 struct mlx5_flow_expand_node {
  90         const int *const next;
  91         /**<
  92          * List of next node indexes. Index 0 is interpreted as a terminator.
  93          */
  94         const enum rte_flow_item_type type;
  95         /**< Pattern item type of current node. */
  96         uint64_t rss_types;
  97         /**<
  98          * RSS types bit-field associated with this node
  99          * (see ETH_RSS_* definitions).
 100          */
 101 };
 102
 103 /** Object returned by mlx5_flow_expand_rss(). */
 104 struct mlx5_flow_expand_rss {
 105         uint32_t entries;
 106         /**< Number of entries @p patterns and @p priorities. */
 107         struct {
 108                 struct rte_flow_item *pattern; /**< Expanded pattern array. */
 109                 uint32_t priority; /**< Priority offset for each expansion. */
 110         } entry[];
 111 };
 112
 113 static enum rte_flow_item_type
 114 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item)
 115 {
 116         enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID;
 117         uint16_t ether_type = 0;
 118         uint16_t ether_type_m;
 119         uint8_t ip_next_proto = 0;
 120         uint8_t ip_next_proto_m;
 121
 122         if (item == NULL || item->spec == NULL)
 123                 return ret;
 124         switch (item->type) {
 125         case RTE_FLOW_ITEM_TYPE_ETH:
 126                 if (item->mask)
 127                         ether_type_m = ((const struct rte_flow_item_eth *)
 128                                                 (item->mask))->type;
 129                 else
 130                         ether_type_m = rte_flow_item_eth_mask.type;
 131                 if (ether_type_m != RTE_BE16(0xFFFF))
 132                         break;
 133                 ether_type = ((const struct rte_flow_item_eth *)
 134                                 (item->spec))->type;
 135                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 136                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 137                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 138                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 139                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 140                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 141                 else
 142                         ret = RTE_FLOW_ITEM_TYPE_END;
 143                 break;
 144         case RTE_FLOW_ITEM_TYPE_VLAN:
 145                 if (item->mask)
 146                         ether_type_m = ((const struct rte_flow_item_vlan *)
 147                                                 (item->mask))->inner_type;
 148                 else
 149                         ether_type_m = rte_flow_item_vlan_mask.inner_type;
 150                 if (ether_type_m != RTE_BE16(0xFFFF))
 151                         break;
 152                 ether_type = ((const struct rte_flow_item_vlan *)
 153                                 (item->spec))->inner_type;
 154                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 155                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 156                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 157                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 158                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 159                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 160                 else
 161                         ret = RTE_FLOW_ITEM_TYPE_END;
 162                 break;
 163         case RTE_FLOW_ITEM_TYPE_IPV4:
 164                 if (item->mask)
 165                         ip_next_proto_m = ((const struct rte_flow_item_ipv4 *)
 166                                         (item->mask))->hdr.next_proto_id;
 167                 else
 168                         ip_next_proto_m =
 169                                 rte_flow_item_ipv4_mask.hdr.next_proto_id;
 170                 if (ip_next_proto_m != 0xFF)
 171                         break;
 172                 ip_next_proto = ((const struct rte_flow_item_ipv4 *)
 173                                 (item->spec))->hdr.next_proto_id;
 174                 if (ip_next_proto == IPPROTO_UDP)
 175                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 176                 else if (ip_next_proto == IPPROTO_TCP)
 177                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 178                 else if (ip_next_proto == IPPROTO_IP)
 179                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 180                 else if (ip_next_proto == IPPROTO_IPV6)
 181                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 182                 else
 183                         ret = RTE_FLOW_ITEM_TYPE_END;
 184                 break;
 185         case RTE_FLOW_ITEM_TYPE_IPV6:
 186                 if (item->mask)
 187                         ip_next_proto_m = ((const struct rte_flow_item_ipv6 *)
 188                                                 (item->mask))->hdr.proto;
 189                 else
 190                         ip_next_proto_m =
 191                                 rte_flow_item_ipv6_mask.hdr.proto;
 192                 if (ip_next_proto_m != 0xFF)
 193                         break;
 194                 ip_next_proto = ((const struct rte_flow_item_ipv6 *)
 195                                 (item->spec))->hdr.proto;
 196                 if (ip_next_proto == IPPROTO_UDP)
 197                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 198                 else if (ip_next_proto == IPPROTO_TCP)
 199                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 200                 else if (ip_next_proto == IPPROTO_IP)
 201                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 202                 else if (ip_next_proto == IPPROTO_IPV6)
 203                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 204                 else
 205                         ret = RTE_FLOW_ITEM_TYPE_END;
 206                 break;
 207         default:
 208                 ret = RTE_FLOW_ITEM_TYPE_VOID;
 209                 break;
 210         }
 211         return ret;
 212 }
 213
 214 #define MLX5_RSS_EXP_ELT_N 8
 215
 216 /**
 217  * Expand RSS flows into several possible flows according to the RSS hash
 218  * fields requested and the driver capabilities.
 219  *
 220  * @param[out] buf
 221  *   Buffer to store the result expansion.
 222  * @param[in] size
 223  *   Buffer size in bytes. If 0, @p buf can be NULL.
 224  * @param[in] pattern
 225  *   User flow pattern.
 226  * @param[in] types
 227  *   RSS types to expand (see ETH_RSS_* definitions).
 228  * @param[in] graph
 229  *   Input graph to expand @p pattern according to @p types.
 230  * @param[in] graph_root_index
 231  *   Index of root node in @p graph, typically 0.
 232  *
 233  * @return
 234  *   A positive value representing the size of @p buf in bytes regardless of
 235  *   @p size on success, a negative errno value otherwise and rte_errno is
 236  *   set, the following errors are defined:
 237  *
 238  *   -E2BIG: graph-depth @p graph is too deep.
 239  */
 240 static int
 241 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,
 242                      const struct rte_flow_item *pattern, uint64_t types,
 243                      const struct mlx5_flow_expand_node graph[],
 244                      int graph_root_index)
 245 {
 246         const struct rte_flow_item *item;
 247         const struct mlx5_flow_expand_node *node = &graph[graph_root_index];
 248         const int *next_node;
 249         const int *stack[MLX5_RSS_EXP_ELT_N];
 250         int stack_pos = 0;
 251         struct rte_flow_item flow_items[MLX5_RSS_EXP_ELT_N];
 252         unsigned int i;
 253         size_t lsize;
 254         size_t user_pattern_size = 0;
 255         void *addr = NULL;
 256         const struct mlx5_flow_expand_node *next = NULL;
 257         struct rte_flow_item missed_item;
 258         int missed = 0;
 259         int elt = 0;
 260         const struct rte_flow_item *last_item = NULL;
 261
 262         memset(&missed_item, 0, sizeof(missed_item));
 263         lsize = offsetof(struct mlx5_flow_expand_rss, entry) +
 264                 MLX5_RSS_EXP_ELT_N * sizeof(buf->entry[0]);
 265         if (lsize <= size) {
 266                 buf->entry[0].priority = 0;
 267                 buf->entry[0].pattern = (void *)&buf->entry[MLX5_RSS_EXP_ELT_N];
 268                 buf->entries = 0;
 269                 addr = buf->entry[0].pattern;
 270         }
 271         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 272                 if (item->type != RTE_FLOW_ITEM_TYPE_VOID)
 273                         last_item = item;
 274                 for (i = 0; node->next && node->next[i]; ++i) {
 275                         next = &graph[node->next[i]];
 276                         if (next->type == item->type)
 277                                 break;
 278                 }
 279                 if (next)
 280                         node = next;
 281                 user_pattern_size += sizeof(*item);
 282         }
 283         user_pattern_size += sizeof(*item); /* Handle END item. */
 284         lsize += user_pattern_size;
 285         /* Copy the user pattern in the first entry of the buffer. */
 286         if (lsize <= size) {
 287                 rte_memcpy(addr, pattern, user_pattern_size);
 288                 addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 289                 buf->entries = 1;
 290         }
 291         /* Start expanding. */
 292         memset(flow_items, 0, sizeof(flow_items));
 293         user_pattern_size -= sizeof(*item);
 294         /*
 295          * Check if the last valid item has spec set, need complete pattern,
 296          * and the pattern can be used for expansion.
 297          */
 298         missed_item.type = mlx5_flow_expand_rss_item_complete(last_item);
 299         if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) {
 300                 /* Item type END indicates expansion is not required. */
 301                 return lsize;
 302         }
 303         if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) {
 304                 next = NULL;
 305                 missed = 1;
 306                 for (i = 0; node->next && node->next[i]; ++i) {
 307                         next = &graph[node->next[i]];
 308                         if (next->type == missed_item.type) {
 309                                 flow_items[0].type = missed_item.type;
 310                                 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 311                                 break;
 312                         }
 313                         next = NULL;
 314                 }
 315         }
 316         if (next && missed) {
 317                 elt = 2; /* missed item + item end. */
 318                 node = next;
 319                 lsize += elt * sizeof(*item) + user_pattern_size;
 320                 if ((node->rss_types & types) && lsize <= size) {
 321                         buf->entry[buf->entries].priority = 1;
 322                         buf->entry[buf->entries].pattern = addr;
 323                         buf->entries++;
 324                         rte_memcpy(addr, buf->entry[0].pattern,
 325                                    user_pattern_size);
 326                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 327                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 328                         addr = (void *)(((uintptr_t)addr) +
 329                                         elt * sizeof(*item));
 330                 }
 331         }
 332         memset(flow_items, 0, sizeof(flow_items));
 333         next_node = node->next;
 334         stack[stack_pos] = next_node;
 335         node = next_node ? &graph[*next_node] : NULL;
 336         while (node) {
 337                 flow_items[stack_pos].type = node->type;
 338                 if (node->rss_types & types) {
 339                         /*
 340                          * compute the number of items to copy from the
 341                          * expansion and copy it.
 342                          * When the stack_pos is 0, there are 1 element in it,
 343                          * plus the addition END item.
 344                          */
 345                         elt = stack_pos + 2;
 346                         flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END;
 347                         lsize += elt * sizeof(*item) + user_pattern_size;
 348                         if (lsize <= size) {
 349                                 size_t n = elt * sizeof(*item);
 350
 351                                 buf->entry[buf->entries].priority =
 352                                         stack_pos + 1 + missed;
 353                                 buf->entry[buf->entries].pattern = addr;
 354                                 buf->entries++;
 355                                 rte_memcpy(addr, buf->entry[0].pattern,
 356                                            user_pattern_size);
 357                                 addr = (void *)(((uintptr_t)addr) +
 358                                                 user_pattern_size);
 359                                 rte_memcpy(addr, &missed_item,
 360                                            missed * sizeof(*item));
 361                                 addr = (void *)(((uintptr_t)addr) +
 362                                         missed * sizeof(*item));
 363                                 rte_memcpy(addr, flow_items, n);
 364                                 addr = (void *)(((uintptr_t)addr) + n);
 365                         }
 366                 }
 367                 /* Go deeper. */
 368                 if (node->next) {
 369                         next_node = node->next;
 370                         if (stack_pos++ == MLX5_RSS_EXP_ELT_N) {
 371                                 rte_errno = E2BIG;
 372                                 return -rte_errno;
 373                         }
 374                         stack[stack_pos] = next_node;
 375                 } else if (*(next_node + 1)) {
 376                         /* Follow up with the next possibility. */
 377                         ++next_node;
 378                 } else {
 379                         /* Move to the next path. */
 380                         if (stack_pos)
 381                                 next_node = stack[--stack_pos];
 382                         next_node++;
 383                         stack[stack_pos] = next_node;
 384                 }
 385                 node = *next_node ? &graph[*next_node] : NULL;
 386         };
 387         /* no expanded flows but we have missed item, create one rule for it */
 388         if (buf->entries == 1 && missed != 0) {
 389                 elt = 2;
 390                 lsize += elt * sizeof(*item) + user_pattern_size;
 391                 if (lsize <= size) {
 392                         buf->entry[buf->entries].priority = 1;
 393                         buf->entry[buf->entries].pattern = addr;
 394                         buf->entries++;
 395                         flow_items[0].type = missed_item.type;
 396                         flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 397                         rte_memcpy(addr, buf->entry[0].pattern,
 398                                    user_pattern_size);
 399                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 400                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 401                 }
 402         }
 403         return lsize;
 404 }
 405
 406 enum mlx5_expansion {
 407         MLX5_EXPANSION_ROOT,
 408         MLX5_EXPANSION_ROOT_OUTER,
 409         MLX5_EXPANSION_ROOT_ETH_VLAN,
 410         MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
 411         MLX5_EXPANSION_OUTER_ETH,
 412         MLX5_EXPANSION_OUTER_ETH_VLAN,
 413         MLX5_EXPANSION_OUTER_VLAN,
 414         MLX5_EXPANSION_OUTER_IPV4,
 415         MLX5_EXPANSION_OUTER_IPV4_UDP,
 416         MLX5_EXPANSION_OUTER_IPV4_TCP,
 417         MLX5_EXPANSION_OUTER_IPV6,
 418         MLX5_EXPANSION_OUTER_IPV6_UDP,
 419         MLX5_EXPANSION_OUTER_IPV6_TCP,
 420         MLX5_EXPANSION_VXLAN,
 421         MLX5_EXPANSION_VXLAN_GPE,
 422         MLX5_EXPANSION_GRE,
 423         MLX5_EXPANSION_MPLS,
 424         MLX5_EXPANSION_ETH,
 425         MLX5_EXPANSION_ETH_VLAN,
 426         MLX5_EXPANSION_VLAN,
 427         MLX5_EXPANSION_IPV4,
 428         MLX5_EXPANSION_IPV4_UDP,
 429         MLX5_EXPANSION_IPV4_TCP,
 430         MLX5_EXPANSION_IPV6,
 431         MLX5_EXPANSION_IPV6_UDP,
 432         MLX5_EXPANSION_IPV6_TCP,
 433 };
 434
 435 /** Supported expansion of items. */
 436 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
 437         [MLX5_EXPANSION_ROOT] = {
 438                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 439                                                   MLX5_EXPANSION_IPV4,
 440                                                   MLX5_EXPANSION_IPV6),
 441                 .type = RTE_FLOW_ITEM_TYPE_END,
 442         },
 443         [MLX5_EXPANSION_ROOT_OUTER] = {
 444                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
 445                                                   MLX5_EXPANSION_OUTER_IPV4,
 446                                                   MLX5_EXPANSION_OUTER_IPV6),
 447                 .type = RTE_FLOW_ITEM_TYPE_END,
 448         },
 449         [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
 450                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
 451                 .type = RTE_FLOW_ITEM_TYPE_END,
 452         },
 453         [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
 454                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 455                                                 (MLX5_EXPANSION_OUTER_ETH_VLAN),
 456                 .type = RTE_FLOW_ITEM_TYPE_END,
 457         },
 458         [MLX5_EXPANSION_OUTER_ETH] = {
 459                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 460                                                   MLX5_EXPANSION_OUTER_IPV6,
 461                                                   MLX5_EXPANSION_MPLS),
 462                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 463                 .rss_types = 0,
 464         },
 465         [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
 466                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 467                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 468                 .rss_types = 0,
 469         },
 470         [MLX5_EXPANSION_OUTER_VLAN] = {
 471                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 472                                                   MLX5_EXPANSION_OUTER_IPV6),
 473                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 474         },
 475         [MLX5_EXPANSION_OUTER_IPV4] = {
 476                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 477                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 478                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 479                          MLX5_EXPANSION_GRE,
 480                          MLX5_EXPANSION_IPV4,
 481                          MLX5_EXPANSION_IPV6),
 482                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 483                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 484                         ETH_RSS_NONFRAG_IPV4_OTHER,
 485         },
 486         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 487                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 488                                                   MLX5_EXPANSION_VXLAN_GPE),
 489                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 490                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 491         },
 492         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 493                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 494                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 495         },
 496         [MLX5_EXPANSION_OUTER_IPV6] = {
 497                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 498                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 499                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 500                          MLX5_EXPANSION_IPV4,
 501                          MLX5_EXPANSION_IPV6,
 502                          MLX5_EXPANSION_GRE),
 503                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 504                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 505                         ETH_RSS_NONFRAG_IPV6_OTHER,
 506         },
 507         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 508                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 509                                                   MLX5_EXPANSION_VXLAN_GPE),
 510                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 511                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 512         },
 513         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 514                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 515                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 516         },
 517         [MLX5_EXPANSION_VXLAN] = {
 518                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 519                                                   MLX5_EXPANSION_IPV4,
 520                                                   MLX5_EXPANSION_IPV6),
 521                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 522         },
 523         [MLX5_EXPANSION_VXLAN_GPE] = {
 524                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 525                                                   MLX5_EXPANSION_IPV4,
 526                                                   MLX5_EXPANSION_IPV6),
 527                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 528         },
 529         [MLX5_EXPANSION_GRE] = {
 530                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 531                                                   MLX5_EXPANSION_IPV6),
 532                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 533         },
 534         [MLX5_EXPANSION_MPLS] = {
 535                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 536                                                   MLX5_EXPANSION_IPV6),
 537                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 538         },
 539         [MLX5_EXPANSION_ETH] = {
 540                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 541                                                   MLX5_EXPANSION_IPV6),
 542                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 543         },
 544         [MLX5_EXPANSION_ETH_VLAN] = {
 545                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 546                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 547         },
 548         [MLX5_EXPANSION_VLAN] = {
 549                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 550                                                   MLX5_EXPANSION_IPV6),
 551                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 552         },
 553         [MLX5_EXPANSION_IPV4] = {
 554                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 555                                                   MLX5_EXPANSION_IPV4_TCP),
 556                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 557                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 558                         ETH_RSS_NONFRAG_IPV4_OTHER,
 559         },
 560         [MLX5_EXPANSION_IPV4_UDP] = {
 561                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 562                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 563         },
 564         [MLX5_EXPANSION_IPV4_TCP] = {
 565                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 566                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 567         },
 568         [MLX5_EXPANSION_IPV6] = {
 569                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 570                                                   MLX5_EXPANSION_IPV6_TCP),
 571                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 572                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 573                         ETH_RSS_NONFRAG_IPV6_OTHER,
 574         },
 575         [MLX5_EXPANSION_IPV6_UDP] = {
 576                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 577                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 578         },
 579         [MLX5_EXPANSION_IPV6_TCP] = {
 580                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 581                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 582         },
 583 };
 584
 585 static struct rte_flow_shared_action *
 586 mlx5_shared_action_create(struct rte_eth_dev *dev,
 587                           const struct rte_flow_shared_action_conf *conf,
 588                           const struct rte_flow_action *action,
 589                           struct rte_flow_error *error);
 590 static int mlx5_shared_action_destroy
 591                                 (struct rte_eth_dev *dev,
 592                                  struct rte_flow_shared_action *shared_action,
 593                                  struct rte_flow_error *error);
 594 static int mlx5_shared_action_update
 595                                 (struct rte_eth_dev *dev,
 596                                  struct rte_flow_shared_action *shared_action,
 597                                  const struct rte_flow_action *action,
 598                                  struct rte_flow_error *error);
 599 static int mlx5_shared_action_query
 600                                 (struct rte_eth_dev *dev,
 601                                  const struct rte_flow_shared_action *action,
 602                                  void *data,
 603                                  struct rte_flow_error *error);
 604 static int
 605 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
 606                     struct rte_flow_tunnel *app_tunnel,
 607                     struct rte_flow_action **actions,
 608                     uint32_t *num_of_actions,
 609                     struct rte_flow_error *error);
 610 static int
 611 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
 612                        struct rte_flow_tunnel *app_tunnel,
 613                        struct rte_flow_item **items,
 614                        uint32_t *num_of_items,
 615                        struct rte_flow_error *error);
 616 static int
 617 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
 618                               struct rte_flow_item *pmd_items,
 619                               uint32_t num_items, struct rte_flow_error *err);
 620 static int
 621 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
 622                                 struct rte_flow_action *pmd_actions,
 623                                 uint32_t num_actions,
 624                                 struct rte_flow_error *err);
 625 static int
 626 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
 627                                   struct rte_mbuf *m,
 628                                   struct rte_flow_restore_info *info,
 629                                   struct rte_flow_error *err);
 630
 631 static const struct rte_flow_ops mlx5_flow_ops = {
 632         .validate = mlx5_flow_validate,
 633         .create = mlx5_flow_create,
 634         .destroy = mlx5_flow_destroy,
 635         .flush = mlx5_flow_flush,
 636         .isolate = mlx5_flow_isolate,
 637         .query = mlx5_flow_query,
 638         .dev_dump = mlx5_flow_dev_dump,
 639         .get_aged_flows = mlx5_flow_get_aged_flows,
 640         .shared_action_create = mlx5_shared_action_create,
 641         .shared_action_destroy = mlx5_shared_action_destroy,
 642         .shared_action_update = mlx5_shared_action_update,
 643         .shared_action_query = mlx5_shared_action_query,
 644         .tunnel_decap_set = mlx5_flow_tunnel_decap_set,
 645         .tunnel_match = mlx5_flow_tunnel_match,
 646         .tunnel_action_decap_release = mlx5_flow_tunnel_action_release,
 647         .tunnel_item_release = mlx5_flow_tunnel_item_release,
 648         .get_restore_info = mlx5_flow_tunnel_get_restore_info,
 649 };
 650
 651 /* Tunnel information. */
 652 struct mlx5_flow_tunnel_info {
 653         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 654         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 655 };
 656
 657 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 658         {
 659                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 660                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 661         },
 662         {
 663                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
 664                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
 665         },
 666         {
 667                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 668                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 669         },
 670         {
 671                 .tunnel = MLX5_FLOW_LAYER_GRE,
 672                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 673         },
 674         {
 675                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 676                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 677         },
 678         {
 679                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 680                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 681         },
 682         {
 683                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 684                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 685         },
 686         {
 687                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 688                 .ptype = RTE_PTYPE_TUNNEL_IP,
 689         },
 690         {
 691                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 692                 .ptype = RTE_PTYPE_TUNNEL_IP,
 693         },
 694         {
 695                 .tunnel = MLX5_FLOW_LAYER_GTP,
 696                 .ptype = RTE_PTYPE_TUNNEL_GTPU,
 697         },
 698 };
 699
 700
 701
 702 /**
 703  * Translate tag ID to register.
 704  *
 705  * @param[in] dev
 706  *   Pointer to the Ethernet device structure.
 707  * @param[in] feature
 708  *   The feature that request the register.
 709  * @param[in] id
 710  *   The request register ID.
 711  * @param[out] error
 712  *   Error description in case of any.
 713  *
 714  * @return
 715  *   The request register on success, a negative errno
 716  *   value otherwise and rte_errno is set.
 717  */
 718 int
 719 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 720                      enum mlx5_feature_name feature,
 721                      uint32_t id,
 722                      struct rte_flow_error *error)
 723 {
 724         struct mlx5_priv *priv = dev->data->dev_private;
 725         struct mlx5_dev_config *config = &priv->config;
 726         enum modify_reg start_reg;
 727         bool skip_mtr_reg = false;
 728
 729         switch (feature) {
 730         case MLX5_HAIRPIN_RX:
 731                 return REG_B;
 732         case MLX5_HAIRPIN_TX:
 733                 return REG_A;
 734         case MLX5_METADATA_RX:
 735                 switch (config->dv_xmeta_en) {
 736                 case MLX5_XMETA_MODE_LEGACY:
 737                         return REG_B;
 738                 case MLX5_XMETA_MODE_META16:
 739                         return REG_C_0;
 740                 case MLX5_XMETA_MODE_META32:
 741                         return REG_C_1;
 742                 }
 743                 break;
 744         case MLX5_METADATA_TX:
 745                 return REG_A;
 746         case MLX5_METADATA_FDB:
 747                 switch (config->dv_xmeta_en) {
 748                 case MLX5_XMETA_MODE_LEGACY:
 749                         return REG_NON;
 750                 case MLX5_XMETA_MODE_META16:
 751                         return REG_C_0;
 752                 case MLX5_XMETA_MODE_META32:
 753                         return REG_C_1;
 754                 }
 755                 break;
 756         case MLX5_FLOW_MARK:
 757                 switch (config->dv_xmeta_en) {
 758                 case MLX5_XMETA_MODE_LEGACY:
 759                         return REG_NON;
 760                 case MLX5_XMETA_MODE_META16:
 761                         return REG_C_1;
 762                 case MLX5_XMETA_MODE_META32:
 763                         return REG_C_0;
 764                 }
 765                 break;
 766         case MLX5_MTR_SFX:
 767                 /*
 768                  * If meter color and flow match share one register, flow match
 769                  * should use the meter color register for match.
 770                  */
 771                 if (priv->mtr_reg_share)
 772                         return priv->mtr_color_reg;
 773                 else
 774                         return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 775                                REG_C_3;
 776         case MLX5_MTR_COLOR:
 777         case MLX5_ASO_FLOW_HIT: /* Both features use the same REG_C. */
 778                 MLX5_ASSERT(priv->mtr_color_reg != REG_NON);
 779                 return priv->mtr_color_reg;
 780         case MLX5_COPY_MARK:
 781                 /*
 782                  * Metadata COPY_MARK register using is in meter suffix sub
 783                  * flow while with meter. It's safe to share the same register.
 784                  */
 785                 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
 786         case MLX5_APP_TAG:
 787                 /*
 788                  * If meter is enable, it will engage the register for color
 789                  * match and flow match. If meter color match is not using the
 790                  * REG_C_2, need to skip the REG_C_x be used by meter color
 791                  * match.
 792                  * If meter is disable, free to use all available registers.
 793                  */
 794                 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 795                             (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
 796                 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
 797                 if (id > (uint32_t)(REG_C_7 - start_reg))
 798                         return rte_flow_error_set(error, EINVAL,
 799                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 800                                                   NULL, "invalid tag id");
 801                 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON)
 802                         return rte_flow_error_set(error, ENOTSUP,
 803                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 804                                                   NULL, "unsupported tag id");
 805                 /*
 806                  * This case means meter is using the REG_C_x great than 2.
 807                  * Take care not to conflict with meter color REG_C_x.
 808                  * If the available index REG_C_y >= REG_C_x, skip the
 809                  * color register.
 810                  */
 811                 if (skip_mtr_reg && config->flow_mreg_c
 812                     [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
 813                         if (id >= (uint32_t)(REG_C_7 - start_reg))
 814                                 return rte_flow_error_set(error, EINVAL,
 815                                                        RTE_FLOW_ERROR_TYPE_ITEM,
 816                                                         NULL, "invalid tag id");
 817                         if (config->flow_mreg_c
 818                             [id + 1 + start_reg - REG_C_0] != REG_NON)
 819                                 return config->flow_mreg_c
 820                                                [id + 1 + start_reg - REG_C_0];
 821                         return rte_flow_error_set(error, ENOTSUP,
 822                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 823                                                   NULL, "unsupported tag id");
 824                 }
 825                 return config->flow_mreg_c[id + start_reg - REG_C_0];
 826         }
 827         MLX5_ASSERT(false);
 828         return rte_flow_error_set(error, EINVAL,
 829                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 830                                   NULL, "invalid feature name");
 831 }
 832
 833 /**
 834  * Check extensive flow metadata register support.
 835  *
 836  * @param dev
 837  *   Pointer to rte_eth_dev structure.
 838  *
 839  * @return
 840  *   True if device supports extensive flow metadata register, otherwise false.
 841  */
 842 bool
 843 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
 844 {
 845         struct mlx5_priv *priv = dev->data->dev_private;
 846         struct mlx5_dev_config *config = &priv->config;
 847
 848         /*
 849          * Having available reg_c can be regarded inclusively as supporting
 850          * extensive flow metadata register, which could mean,
 851          * - metadata register copy action by modify header.
 852          * - 16 modify header actions is supported.
 853          * - reg_c's are preserved across different domain (FDB and NIC) on
 854          *   packet loopback by flow lookup miss.
 855          */
 856         return config->flow_mreg_c[2] != REG_NON;
 857 }
 858
 859 /**
 860  * Get the lowest priority.
 861  *
 862  * @param[in] dev
 863  *   Pointer to the Ethernet device structure.
 864  * @param[in] attributes
 865  *   Pointer to device flow rule attributes.
 866  *
 867  * @return
 868  *   The value of lowest priority of flow.
 869  */
 870 uint32_t
 871 mlx5_get_lowest_priority(struct rte_eth_dev *dev,
 872                           const struct rte_flow_attr *attr)
 873 {
 874         struct mlx5_priv *priv = dev->data->dev_private;
 875
 876         if (!attr->group && !attr->transfer)
 877                 return priv->config.flow_prio - 2;
 878         return MLX5_NON_ROOT_FLOW_MAX_PRIO - 1;
 879 }
 880
 881 /**
 882  * Calculate matcher priority of the flow.
 883  *
 884  * @param[in] dev
 885  *   Pointer to the Ethernet device structure.
 886  * @param[in] attr
 887  *   Pointer to device flow rule attributes.
 888  * @param[in] subpriority
 889  *   The priority based on the items.
 890  * @return
 891  *   The matcher priority of the flow.
 892  */
 893 uint16_t
 894 mlx5_get_matcher_priority(struct rte_eth_dev *dev,
 895                           const struct rte_flow_attr *attr,
 896                           uint32_t subpriority)
 897 {
 898         uint16_t priority = (uint16_t)attr->priority;
 899         struct mlx5_priv *priv = dev->data->dev_private;
 900
 901         if (!attr->group && !attr->transfer) {
 902                 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
 903                         priority = priv->config.flow_prio - 1;
 904                 return mlx5_os_flow_adjust_priority(dev, priority, subpriority);
 905         }
 906         if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
 907                 priority = MLX5_NON_ROOT_FLOW_MAX_PRIO;
 908         return priority * 3 + subpriority;
 909 }
 910
 911 /**
 912  * Verify the @p item specifications (spec, last, mask) are compatible with the
 913  * NIC capabilities.
 914  *
 915  * @param[in] item
 916  *   Item specification.
 917  * @param[in] mask
 918  *   @p item->mask or flow default bit-masks.
 919  * @param[in] nic_mask
 920  *   Bit-masks covering supported fields by the NIC to compare with user mask.
 921  * @param[in] size
 922  *   Bit-masks size in bytes.
 923  * @param[in] range_accepted
 924  *   True if range of values is accepted for specific fields, false otherwise.
 925  * @param[out] error
 926  *   Pointer to error structure.
 927  *
 928  * @return
 929  *   0 on success, a negative errno value otherwise and rte_errno is set.
 930  */
 931 int
 932 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
 933                           const uint8_t *mask,
 934                           const uint8_t *nic_mask,
 935                           unsigned int size,
 936                           bool range_accepted,
 937                           struct rte_flow_error *error)
 938 {
 939         unsigned int i;
 940
 941         MLX5_ASSERT(nic_mask);
 942         for (i = 0; i < size; ++i)
 943                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
 944                         return rte_flow_error_set(error, ENOTSUP,
 945                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 946                                                   item,
 947                                                   "mask enables non supported"
 948                                                   " bits");
 949         if (!item->spec && (item->mask || item->last))
 950                 return rte_flow_error_set(error, EINVAL,
 951                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
 952                                           "mask/last without a spec is not"
 953                                           " supported");
 954         if (item->spec && item->last && !range_accepted) {
 955                 uint8_t spec[size];
 956                 uint8_t last[size];
 957                 unsigned int i;
 958                 int ret;
 959
 960                 for (i = 0; i < size; ++i) {
 961                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
 962                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
 963                 }
 964                 ret = memcmp(spec, last, size);
 965                 if (ret != 0)
 966                         return rte_flow_error_set(error, EINVAL,
 967                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 968                                                   item,
 969                                                   "range is not valid");
 970         }
 971         return 0;
 972 }
 973
 974 /**
 975  * Adjust the hash fields according to the @p flow information.
 976  *
 977  * @param[in] dev_flow.
 978  *   Pointer to the mlx5_flow.
 979  * @param[in] tunnel
 980  *   1 when the hash field is for a tunnel item.
 981  * @param[in] layer_types
 982  *   ETH_RSS_* types.
 983  * @param[in] hash_fields
 984  *   Item hash fields.
 985  *
 986  * @return
 987  *   The hash fields that should be used.
 988  */
 989 uint64_t
 990 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc,
 991                             int tunnel __rte_unused, uint64_t layer_types,
 992                             uint64_t hash_fields)
 993 {
 994 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 995         int rss_request_inner = rss_desc->level >= 2;
 996
 997         /* Check RSS hash level for tunnel. */
 998         if (tunnel && rss_request_inner)
 999                 hash_fields |= IBV_RX_HASH_INNER;
1000         else if (tunnel || rss_request_inner)
1001                 return 0;
1002 #endif
1003         /* Check if requested layer matches RSS hash fields. */
1004         if (!(rss_desc->types & layer_types))
1005                 return 0;
1006         return hash_fields;
1007 }
1008
1009 /**
1010  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
1011  * if several tunnel rules are used on this queue, the tunnel ptype will be
1012  * cleared.
1013  *
1014  * @param rxq_ctrl
1015  *   Rx queue to update.
1016  */
1017 static void
1018 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
1019 {
1020         unsigned int i;
1021         uint32_t tunnel_ptype = 0;
1022
1023         /* Look up for the ptype to use. */
1024         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
1025                 if (!rxq_ctrl->flow_tunnels_n[i])
1026                         continue;
1027                 if (!tunnel_ptype) {
1028                         tunnel_ptype = tunnels_info[i].ptype;
1029                 } else {
1030                         tunnel_ptype = 0;
1031                         break;
1032                 }
1033         }
1034         rxq_ctrl->rxq.tunnel = tunnel_ptype;
1035 }
1036
1037 /**
1038  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
1039  * flow.
1040  *
1041  * @param[in] dev
1042  *   Pointer to the Ethernet device structure.
1043  * @param[in] dev_handle
1044  *   Pointer to device flow handle structure.
1045  */
1046 static void
1047 flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
1048                        struct mlx5_flow_handle *dev_handle)
1049 {
1050         struct mlx5_priv *priv = dev->data->dev_private;
1051         const int mark = dev_handle->mark;
1052         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1053         struct mlx5_ind_table_obj *ind_tbl = NULL;
1054         unsigned int i;
1055
1056         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1057                 struct mlx5_hrxq *hrxq;
1058
1059                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1060                               dev_handle->rix_hrxq);
1061                 if (hrxq)
1062                         ind_tbl = hrxq->ind_table;
1063         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1064                 struct mlx5_shared_action_rss *shared_rss;
1065
1066                 shared_rss = mlx5_ipool_get
1067                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1068                          dev_handle->rix_srss);
1069                 if (shared_rss)
1070                         ind_tbl = shared_rss->ind_tbl;
1071         }
1072         if (!ind_tbl)
1073                 return;
1074         for (i = 0; i != ind_tbl->queues_n; ++i) {
1075                 int idx = ind_tbl->queues[i];
1076                 struct mlx5_rxq_ctrl *rxq_ctrl =
1077                         container_of((*priv->rxqs)[idx],
1078                                      struct mlx5_rxq_ctrl, rxq);
1079
1080                 /*
1081                  * To support metadata register copy on Tx loopback,
1082                  * this must be always enabled (metadata may arive
1083                  * from other port - not from local flows only.
1084                  */
1085                 if (priv->config.dv_flow_en &&
1086                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1087                     mlx5_flow_ext_mreg_supported(dev)) {
1088                         rxq_ctrl->rxq.mark = 1;
1089                         rxq_ctrl->flow_mark_n = 1;
1090                 } else if (mark) {
1091                         rxq_ctrl->rxq.mark = 1;
1092                         rxq_ctrl->flow_mark_n++;
1093                 }
1094                 if (tunnel) {
1095                         unsigned int j;
1096
1097                         /* Increase the counter matching the flow. */
1098                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1099                                 if ((tunnels_info[j].tunnel &
1100                                      dev_handle->layers) ==
1101                                     tunnels_info[j].tunnel) {
1102                                         rxq_ctrl->flow_tunnels_n[j]++;
1103                                         break;
1104                                 }
1105                         }
1106                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1107                 }
1108         }
1109 }
1110
1111 /**
1112  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
1113  *
1114  * @param[in] dev
1115  *   Pointer to the Ethernet device structure.
1116  * @param[in] flow
1117  *   Pointer to flow structure.
1118  */
1119 static void
1120 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
1121 {
1122         struct mlx5_priv *priv = dev->data->dev_private;
1123         uint32_t handle_idx;
1124         struct mlx5_flow_handle *dev_handle;
1125
1126         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1127                        handle_idx, dev_handle, next)
1128                 flow_drv_rxq_flags_set(dev, dev_handle);
1129 }
1130
1131 /**
1132  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1133  * device flow if no other flow uses it with the same kind of request.
1134  *
1135  * @param dev
1136  *   Pointer to Ethernet device.
1137  * @param[in] dev_handle
1138  *   Pointer to the device flow handle structure.
1139  */
1140 static void
1141 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev,
1142                         struct mlx5_flow_handle *dev_handle)
1143 {
1144         struct mlx5_priv *priv = dev->data->dev_private;
1145         const int mark = dev_handle->mark;
1146         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1147         struct mlx5_ind_table_obj *ind_tbl = NULL;
1148         unsigned int i;
1149
1150         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1151                 struct mlx5_hrxq *hrxq;
1152
1153                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1154                               dev_handle->rix_hrxq);
1155                 if (hrxq)
1156                         ind_tbl = hrxq->ind_table;
1157         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1158                 struct mlx5_shared_action_rss *shared_rss;
1159
1160                 shared_rss = mlx5_ipool_get
1161                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1162                          dev_handle->rix_srss);
1163                 if (shared_rss)
1164                         ind_tbl = shared_rss->ind_tbl;
1165         }
1166         if (!ind_tbl)
1167                 return;
1168         MLX5_ASSERT(dev->data->dev_started);
1169         for (i = 0; i != ind_tbl->queues_n; ++i) {
1170                 int idx = ind_tbl->queues[i];
1171                 struct mlx5_rxq_ctrl *rxq_ctrl =
1172                         container_of((*priv->rxqs)[idx],
1173                                      struct mlx5_rxq_ctrl, rxq);
1174
1175                 if (priv->config.dv_flow_en &&
1176                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1177                     mlx5_flow_ext_mreg_supported(dev)) {
1178                         rxq_ctrl->rxq.mark = 1;
1179                         rxq_ctrl->flow_mark_n = 1;
1180                 } else if (mark) {
1181                         rxq_ctrl->flow_mark_n--;
1182                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
1183                 }
1184                 if (tunnel) {
1185                         unsigned int j;
1186
1187                         /* Decrease the counter matching the flow. */
1188                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1189                                 if ((tunnels_info[j].tunnel &
1190                                      dev_handle->layers) ==
1191                                     tunnels_info[j].tunnel) {
1192                                         rxq_ctrl->flow_tunnels_n[j]--;
1193                                         break;
1194                                 }
1195                         }
1196                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1197                 }
1198         }
1199 }
1200
1201 /**
1202  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1203  * @p flow if no other flow uses it with the same kind of request.
1204  *
1205  * @param dev
1206  *   Pointer to Ethernet device.
1207  * @param[in] flow
1208  *   Pointer to the flow.
1209  */
1210 static void
1211 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
1212 {
1213         struct mlx5_priv *priv = dev->data->dev_private;
1214         uint32_t handle_idx;
1215         struct mlx5_flow_handle *dev_handle;
1216
1217         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1218                        handle_idx, dev_handle, next)
1219                 flow_drv_rxq_flags_trim(dev, dev_handle);
1220 }
1221
1222 /**
1223  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
1224  *
1225  * @param dev
1226  *   Pointer to Ethernet device.
1227  */
1228 static void
1229 flow_rxq_flags_clear(struct rte_eth_dev *dev)
1230 {
1231         struct mlx5_priv *priv = dev->data->dev_private;
1232         unsigned int i;
1233
1234         for (i = 0; i != priv->rxqs_n; ++i) {
1235                 struct mlx5_rxq_ctrl *rxq_ctrl;
1236                 unsigned int j;
1237
1238                 if (!(*priv->rxqs)[i])
1239                         continue;
1240                 rxq_ctrl = container_of((*priv->rxqs)[i],
1241                                         struct mlx5_rxq_ctrl, rxq);
1242                 rxq_ctrl->flow_mark_n = 0;
1243                 rxq_ctrl->rxq.mark = 0;
1244                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
1245                         rxq_ctrl->flow_tunnels_n[j] = 0;
1246                 rxq_ctrl->rxq.tunnel = 0;
1247         }
1248 }
1249
1250 /**
1251  * Set the Rx queue dynamic metadata (mask and offset) for a flow
1252  *
1253  * @param[in] dev
1254  *   Pointer to the Ethernet device structure.
1255  */
1256 void
1257 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev)
1258 {
1259         struct mlx5_priv *priv = dev->data->dev_private;
1260         struct mlx5_rxq_data *data;
1261         unsigned int i;
1262
1263         for (i = 0; i != priv->rxqs_n; ++i) {
1264                 if (!(*priv->rxqs)[i])
1265                         continue;
1266                 data = (*priv->rxqs)[i];
1267                 if (!rte_flow_dynf_metadata_avail()) {
1268                         data->dynf_meta = 0;
1269                         data->flow_meta_mask = 0;
1270                         data->flow_meta_offset = -1;
1271                         data->flow_meta_port_mask = 0;
1272                 } else {
1273                         data->dynf_meta = 1;
1274                         data->flow_meta_mask = rte_flow_dynf_metadata_mask;
1275                         data->flow_meta_offset = rte_flow_dynf_metadata_offs;
1276                         data->flow_meta_port_mask = (uint32_t)~0;
1277                         if (priv->config.dv_xmeta_en == MLX5_XMETA_MODE_META16)
1278                                 data->flow_meta_port_mask >>= 16;
1279                 }
1280         }
1281 }
1282
1283 /*
1284  * return a pointer to the desired action in the list of actions.
1285  *
1286  * @param[in] actions
1287  *   The list of actions to search the action in.
1288  * @param[in] action
1289  *   The action to find.
1290  *
1291  * @return
1292  *   Pointer to the action in the list, if found. NULL otherwise.
1293  */
1294 const struct rte_flow_action *
1295 mlx5_flow_find_action(const struct rte_flow_action *actions,
1296                       enum rte_flow_action_type action)
1297 {
1298         if (actions == NULL)
1299                 return NULL;
1300         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
1301                 if (actions->type == action)
1302                         return actions;
1303         return NULL;
1304 }
1305
1306 /*
1307  * Validate the flag action.
1308  *
1309  * @param[in] action_flags
1310  *   Bit-fields that holds the actions detected until now.
1311  * @param[in] attr
1312  *   Attributes of flow that includes this action.
1313  * @param[out] error
1314  *   Pointer to error structure.
1315  *
1316  * @return
1317  *   0 on success, a negative errno value otherwise and rte_errno is set.
1318  */
1319 int
1320 mlx5_flow_validate_action_flag(uint64_t action_flags,
1321                                const struct rte_flow_attr *attr,
1322                                struct rte_flow_error *error)
1323 {
1324         if (action_flags & MLX5_FLOW_ACTION_MARK)
1325                 return rte_flow_error_set(error, EINVAL,
1326                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1327                                           "can't mark and flag in same flow");
1328         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1329                 return rte_flow_error_set(error, EINVAL,
1330                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1331                                           "can't have 2 flag"
1332                                           " actions in same flow");
1333         if (attr->egress)
1334                 return rte_flow_error_set(error, ENOTSUP,
1335                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1336                                           "flag action not supported for "
1337                                           "egress");
1338         return 0;
1339 }
1340
1341 /*
1342  * Validate the mark action.
1343  *
1344  * @param[in] action
1345  *   Pointer to the queue action.
1346  * @param[in] action_flags
1347  *   Bit-fields that holds the actions detected until now.
1348  * @param[in] attr
1349  *   Attributes of flow that includes this action.
1350  * @param[out] error
1351  *   Pointer to error structure.
1352  *
1353  * @return
1354  *   0 on success, a negative errno value otherwise and rte_errno is set.
1355  */
1356 int
1357 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
1358                                uint64_t action_flags,
1359                                const struct rte_flow_attr *attr,
1360                                struct rte_flow_error *error)
1361 {
1362         const struct rte_flow_action_mark *mark = action->conf;
1363
1364         if (!mark)
1365                 return rte_flow_error_set(error, EINVAL,
1366                                           RTE_FLOW_ERROR_TYPE_ACTION,
1367                                           action,
1368                                           "configuration cannot be null");
1369         if (mark->id >= MLX5_FLOW_MARK_MAX)
1370                 return rte_flow_error_set(error, EINVAL,
1371                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1372                                           &mark->id,
1373                                           "mark id must in 0 <= id < "
1374                                           RTE_STR(MLX5_FLOW_MARK_MAX));
1375         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1376                 return rte_flow_error_set(error, EINVAL,
1377                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1378                                           "can't flag and mark in same flow");
1379         if (action_flags & MLX5_FLOW_ACTION_MARK)
1380                 return rte_flow_error_set(error, EINVAL,
1381                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1382                                           "can't have 2 mark actions in same"
1383                                           " flow");
1384         if (attr->egress)
1385                 return rte_flow_error_set(error, ENOTSUP,
1386                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1387                                           "mark action not supported for "
1388                                           "egress");
1389         return 0;
1390 }
1391
1392 /*
1393  * Validate the drop action.
1394  *
1395  * @param[in] action_flags
1396  *   Bit-fields that holds the actions detected until now.
1397  * @param[in] attr
1398  *   Attributes of flow that includes this action.
1399  * @param[out] error
1400  *   Pointer to error structure.
1401  *
1402  * @return
1403  *   0 on success, a negative errno value otherwise and rte_errno is set.
1404  */
1405 int
1406 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1407                                const struct rte_flow_attr *attr,
1408                                struct rte_flow_error *error)
1409 {
1410         if (attr->egress)
1411                 return rte_flow_error_set(error, ENOTSUP,
1412                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1413                                           "drop action not supported for "
1414                                           "egress");
1415         return 0;
1416 }
1417
1418 /*
1419  * Validate the queue action.
1420  *
1421  * @param[in] action
1422  *   Pointer to the queue action.
1423  * @param[in] action_flags
1424  *   Bit-fields that holds the actions detected until now.
1425  * @param[in] dev
1426  *   Pointer to the Ethernet device structure.
1427  * @param[in] attr
1428  *   Attributes of flow that includes this action.
1429  * @param[out] error
1430  *   Pointer to error structure.
1431  *
1432  * @return
1433  *   0 on success, a negative errno value otherwise and rte_errno is set.
1434  */
1435 int
1436 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1437                                 uint64_t action_flags,
1438                                 struct rte_eth_dev *dev,
1439                                 const struct rte_flow_attr *attr,
1440                                 struct rte_flow_error *error)
1441 {
1442         struct mlx5_priv *priv = dev->data->dev_private;
1443         const struct rte_flow_action_queue *queue = action->conf;
1444
1445         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1446                 return rte_flow_error_set(error, EINVAL,
1447                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1448                                           "can't have 2 fate actions in"
1449                                           " same flow");
1450         if (!priv->rxqs_n)
1451                 return rte_flow_error_set(error, EINVAL,
1452                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1453                                           NULL, "No Rx queues configured");
1454         if (queue->index >= priv->rxqs_n)
1455                 return rte_flow_error_set(error, EINVAL,
1456                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1457                                           &queue->index,
1458                                           "queue index out of range");
1459         if (!(*priv->rxqs)[queue->index])
1460                 return rte_flow_error_set(error, EINVAL,
1461                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1462                                           &queue->index,
1463                                           "queue is not configured");
1464         if (attr->egress)
1465                 return rte_flow_error_set(error, ENOTSUP,
1466                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1467                                           "queue action not supported for "
1468                                           "egress");
1469         return 0;
1470 }
1471
1472 /*
1473  * Validate the rss action.
1474  *
1475  * @param[in] dev
1476  *   Pointer to the Ethernet device structure.
1477  * @param[in] action
1478  *   Pointer to the queue action.
1479  * @param[out] error
1480  *   Pointer to error structure.
1481  *
1482  * @return
1483  *   0 on success, a negative errno value otherwise and rte_errno is set.
1484  */
1485 int
1486 mlx5_validate_action_rss(struct rte_eth_dev *dev,
1487                          const struct rte_flow_action *action,
1488                          struct rte_flow_error *error)
1489 {
1490         struct mlx5_priv *priv = dev->data->dev_private;
1491         const struct rte_flow_action_rss *rss = action->conf;
1492         enum mlx5_rxq_type rxq_type = MLX5_RXQ_TYPE_UNDEFINED;
1493         unsigned int i;
1494
1495         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1496             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1497                 return rte_flow_error_set(error, ENOTSUP,
1498                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1499                                           &rss->func,
1500                                           "RSS hash function not supported");
1501 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1502         if (rss->level > 2)
1503 #else
1504         if (rss->level > 1)
1505 #endif
1506                 return rte_flow_error_set(error, ENOTSUP,
1507                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1508                                           &rss->level,
1509                                           "tunnel RSS is not supported");
1510         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1511         if (rss->key_len == 0 && rss->key != NULL)
1512                 return rte_flow_error_set(error, ENOTSUP,
1513                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1514                                           &rss->key_len,
1515                                           "RSS hash key length 0");
1516         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1517                 return rte_flow_error_set(error, ENOTSUP,
1518                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1519                                           &rss->key_len,
1520                                           "RSS hash key too small");
1521         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1522                 return rte_flow_error_set(error, ENOTSUP,
1523                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1524                                           &rss->key_len,
1525                                           "RSS hash key too large");
1526         if (rss->queue_num > priv->config.ind_table_max_size)
1527                 return rte_flow_error_set(error, ENOTSUP,
1528                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1529                                           &rss->queue_num,
1530                                           "number of queues too large");
1531         if (rss->types & MLX5_RSS_HF_MASK)
1532                 return rte_flow_error_set(error, ENOTSUP,
1533                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1534                                           &rss->types,
1535                                           "some RSS protocols are not"
1536                                           " supported");
1537         if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) &&
1538             !(rss->types & ETH_RSS_IP))
1539                 return rte_flow_error_set(error, EINVAL,
1540                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1541                                           "L3 partial RSS requested but L3 RSS"
1542                                           " type not specified");
1543         if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) &&
1544             !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP)))
1545                 return rte_flow_error_set(error, EINVAL,
1546                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1547                                           "L4 partial RSS requested but L4 RSS"
1548                                           " type not specified");
1549         if (!priv->rxqs_n)
1550                 return rte_flow_error_set(error, EINVAL,
1551                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1552                                           NULL, "No Rx queues configured");
1553         if (!rss->queue_num)
1554                 return rte_flow_error_set(error, EINVAL,
1555                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1556                                           NULL, "No queues configured");
1557         for (i = 0; i != rss->queue_num; ++i) {
1558                 struct mlx5_rxq_ctrl *rxq_ctrl;
1559
1560                 if (rss->queue[i] >= priv->rxqs_n)
1561                         return rte_flow_error_set
1562                                 (error, EINVAL,
1563                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1564                                  &rss->queue[i], "queue index out of range");
1565                 if (!(*priv->rxqs)[rss->queue[i]])
1566                         return rte_flow_error_set
1567                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1568                                  &rss->queue[i], "queue is not configured");
1569                 rxq_ctrl = container_of((*priv->rxqs)[rss->queue[i]],
1570                                         struct mlx5_rxq_ctrl, rxq);
1571                 if (i == 0)
1572                         rxq_type = rxq_ctrl->type;
1573                 if (rxq_type != rxq_ctrl->type)
1574                         return rte_flow_error_set
1575                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1576                                  &rss->queue[i],
1577                                  "combining hairpin and regular RSS queues is not supported");
1578         }
1579         return 0;
1580 }
1581
1582 /*
1583  * Validate the rss action.
1584  *
1585  * @param[in] action
1586  *   Pointer to the queue action.
1587  * @param[in] action_flags
1588  *   Bit-fields that holds the actions detected until now.
1589  * @param[in] dev
1590  *   Pointer to the Ethernet device structure.
1591  * @param[in] attr
1592  *   Attributes of flow that includes this action.
1593  * @param[in] item_flags
1594  *   Items that were detected.
1595  * @param[out] error
1596  *   Pointer to error structure.
1597  *
1598  * @return
1599  *   0 on success, a negative errno value otherwise and rte_errno is set.
1600  */
1601 int
1602 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1603                               uint64_t action_flags,
1604                               struct rte_eth_dev *dev,
1605                               const struct rte_flow_attr *attr,
1606                               uint64_t item_flags,
1607                               struct rte_flow_error *error)
1608 {
1609         const struct rte_flow_action_rss *rss = action->conf;
1610         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1611         int ret;
1612
1613         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1614                 return rte_flow_error_set(error, EINVAL,
1615                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1616                                           "can't have 2 fate actions"
1617                                           " in same flow");
1618         ret = mlx5_validate_action_rss(dev, action, error);
1619         if (ret)
1620                 return ret;
1621         if (attr->egress)
1622                 return rte_flow_error_set(error, ENOTSUP,
1623                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1624                                           "rss action not supported for "
1625                                           "egress");
1626         if (rss->level > 1 && !tunnel)
1627                 return rte_flow_error_set(error, EINVAL,
1628                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1629                                           "inner RSS is not supported for "
1630                                           "non-tunnel flows");
1631         if ((item_flags & MLX5_FLOW_LAYER_ECPRI) &&
1632             !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) {
1633                 return rte_flow_error_set(error, EINVAL,
1634                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1635                                           "RSS on eCPRI is not supported now");
1636         }
1637         return 0;
1638 }
1639
1640 /*
1641  * Validate the default miss action.
1642  *
1643  * @param[in] action_flags
1644  *   Bit-fields that holds the actions detected until now.
1645  * @param[out] error
1646  *   Pointer to error structure.
1647  *
1648  * @return
1649  *   0 on success, a negative errno value otherwise and rte_errno is set.
1650  */
1651 int
1652 mlx5_flow_validate_action_default_miss(uint64_t action_flags,
1653                                 const struct rte_flow_attr *attr,
1654                                 struct rte_flow_error *error)
1655 {
1656         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1657                 return rte_flow_error_set(error, EINVAL,
1658                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1659                                           "can't have 2 fate actions in"
1660                                           " same flow");
1661         if (attr->egress)
1662                 return rte_flow_error_set(error, ENOTSUP,
1663                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1664                                           "default miss action not supported "
1665                                           "for egress");
1666         if (attr->group)
1667                 return rte_flow_error_set(error, ENOTSUP,
1668                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
1669                                           "only group 0 is supported");
1670         if (attr->transfer)
1671                 return rte_flow_error_set(error, ENOTSUP,
1672                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1673                                           NULL, "transfer is not supported");
1674         return 0;
1675 }
1676
1677 /*
1678  * Validate the count action.
1679  *
1680  * @param[in] dev
1681  *   Pointer to the Ethernet device structure.
1682  * @param[in] attr
1683  *   Attributes of flow that includes this action.
1684  * @param[out] error
1685  *   Pointer to error structure.
1686  *
1687  * @return
1688  *   0 on success, a negative errno value otherwise and rte_errno is set.
1689  */
1690 int
1691 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1692                                 const struct rte_flow_attr *attr,
1693                                 struct rte_flow_error *error)
1694 {
1695         if (attr->egress)
1696                 return rte_flow_error_set(error, ENOTSUP,
1697                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1698                                           "count action not supported for "
1699                                           "egress");
1700         return 0;
1701 }
1702
1703 /**
1704  * Verify the @p attributes will be correctly understood by the NIC and store
1705  * them in the @p flow if everything is correct.
1706  *
1707  * @param[in] dev
1708  *   Pointer to the Ethernet device structure.
1709  * @param[in] attributes
1710  *   Pointer to flow attributes
1711  * @param[out] error
1712  *   Pointer to error structure.
1713  *
1714  * @return
1715  *   0 on success, a negative errno value otherwise and rte_errno is set.
1716  */
1717 int
1718 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1719                               const struct rte_flow_attr *attributes,
1720                               struct rte_flow_error *error)
1721 {
1722         struct mlx5_priv *priv = dev->data->dev_private;
1723         uint32_t priority_max = priv->config.flow_prio - 1;
1724
1725         if (attributes->group)
1726                 return rte_flow_error_set(error, ENOTSUP,
1727                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1728                                           NULL, "groups is not supported");
1729         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
1730             attributes->priority >= priority_max)
1731                 return rte_flow_error_set(error, ENOTSUP,
1732                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1733                                           NULL, "priority out of range");
1734         if (attributes->egress)
1735                 return rte_flow_error_set(error, ENOTSUP,
1736                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1737                                           "egress is not supported");
1738         if (attributes->transfer && !priv->config.dv_esw_en)
1739                 return rte_flow_error_set(error, ENOTSUP,
1740                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1741                                           NULL, "transfer is not supported");
1742         if (!attributes->ingress)
1743                 return rte_flow_error_set(error, EINVAL,
1744                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1745                                           NULL,
1746                                           "ingress attribute is mandatory");
1747         return 0;
1748 }
1749
1750 /**
1751  * Validate ICMP6 item.
1752  *
1753  * @param[in] item
1754  *   Item specification.
1755  * @param[in] item_flags
1756  *   Bit-fields that holds the items detected until now.
1757  * @param[in] ext_vlan_sup
1758  *   Whether extended VLAN features are supported or not.
1759  * @param[out] error
1760  *   Pointer to error structure.
1761  *
1762  * @return
1763  *   0 on success, a negative errno value otherwise and rte_errno is set.
1764  */
1765 int
1766 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1767                                uint64_t item_flags,
1768                                uint8_t target_protocol,
1769                                struct rte_flow_error *error)
1770 {
1771         const struct rte_flow_item_icmp6 *mask = item->mask;
1772         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1773         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1774                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1775         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1776                                       MLX5_FLOW_LAYER_OUTER_L4;
1777         int ret;
1778
1779         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1780                 return rte_flow_error_set(error, EINVAL,
1781                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1782                                           "protocol filtering not compatible"
1783                                           " with ICMP6 layer");
1784         if (!(item_flags & l3m))
1785                 return rte_flow_error_set(error, EINVAL,
1786                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1787                                           "IPv6 is mandatory to filter on"
1788                                           " ICMP6");
1789         if (item_flags & l4m)
1790                 return rte_flow_error_set(error, EINVAL,
1791                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1792                                           "multiple L4 layers not supported");
1793         if (!mask)
1794                 mask = &rte_flow_item_icmp6_mask;
1795         ret = mlx5_flow_item_acceptable
1796                 (item, (const uint8_t *)mask,
1797                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1798                  sizeof(struct rte_flow_item_icmp6),
1799                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1800         if (ret < 0)
1801                 return ret;
1802         return 0;
1803 }
1804
1805 /**
1806  * Validate ICMP item.
1807  *
1808  * @param[in] item
1809  *   Item specification.
1810  * @param[in] item_flags
1811  *   Bit-fields that holds the items detected until now.
1812  * @param[out] error
1813  *   Pointer to error structure.
1814  *
1815  * @return
1816  *   0 on success, a negative errno value otherwise and rte_errno is set.
1817  */
1818 int
1819 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1820                              uint64_t item_flags,
1821                              uint8_t target_protocol,
1822                              struct rte_flow_error *error)
1823 {
1824         const struct rte_flow_item_icmp *mask = item->mask;
1825         const struct rte_flow_item_icmp nic_mask = {
1826                 .hdr.icmp_type = 0xff,
1827                 .hdr.icmp_code = 0xff,
1828                 .hdr.icmp_ident = RTE_BE16(0xffff),
1829                 .hdr.icmp_seq_nb = RTE_BE16(0xffff),
1830         };
1831         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1832         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1833                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1834         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1835                                       MLX5_FLOW_LAYER_OUTER_L4;
1836         int ret;
1837
1838         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1839                 return rte_flow_error_set(error, EINVAL,
1840                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1841                                           "protocol filtering not compatible"
1842                                           " with ICMP layer");
1843         if (!(item_flags & l3m))
1844                 return rte_flow_error_set(error, EINVAL,
1845                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1846                                           "IPv4 is mandatory to filter"
1847                                           " on ICMP");
1848         if (item_flags & l4m)
1849                 return rte_flow_error_set(error, EINVAL,
1850                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1851                                           "multiple L4 layers not supported");
1852         if (!mask)
1853                 mask = &nic_mask;
1854         ret = mlx5_flow_item_acceptable
1855                 (item, (const uint8_t *)mask,
1856                  (const uint8_t *)&nic_mask,
1857                  sizeof(struct rte_flow_item_icmp),
1858                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1859         if (ret < 0)
1860                 return ret;
1861         return 0;
1862 }
1863
1864 /**
1865  * Validate Ethernet item.
1866  *
1867  * @param[in] item
1868  *   Item specification.
1869  * @param[in] item_flags
1870  *   Bit-fields that holds the items detected until now.
1871  * @param[out] error
1872  *   Pointer to error structure.
1873  *
1874  * @return
1875  *   0 on success, a negative errno value otherwise and rte_errno is set.
1876  */
1877 int
1878 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1879                             uint64_t item_flags, bool ext_vlan_sup,
1880                             struct rte_flow_error *error)
1881 {
1882         const struct rte_flow_item_eth *mask = item->mask;
1883         const struct rte_flow_item_eth nic_mask = {
1884                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1885                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1886                 .type = RTE_BE16(0xffff),
1887                 .has_vlan = ext_vlan_sup ? 1 : 0,
1888         };
1889         int ret;
1890         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1891         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1892                                        MLX5_FLOW_LAYER_OUTER_L2;
1893
1894         if (item_flags & ethm)
1895                 return rte_flow_error_set(error, ENOTSUP,
1896                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1897                                           "multiple L2 layers not supported");
1898         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
1899             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
1900                 return rte_flow_error_set(error, EINVAL,
1901                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1902                                           "L2 layer should not follow "
1903                                           "L3 layers");
1904         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
1905             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
1906                 return rte_flow_error_set(error, EINVAL,
1907                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1908                                           "L2 layer should not follow VLAN");
1909         if (!mask)
1910                 mask = &rte_flow_item_eth_mask;
1911         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1912                                         (const uint8_t *)&nic_mask,
1913                                         sizeof(struct rte_flow_item_eth),
1914                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1915         return ret;
1916 }
1917
1918 /**
1919  * Validate VLAN item.
1920  *
1921  * @param[in] item
1922  *   Item specification.
1923  * @param[in] item_flags
1924  *   Bit-fields that holds the items detected until now.
1925  * @param[in] dev
1926  *   Ethernet device flow is being created on.
1927  * @param[out] error
1928  *   Pointer to error structure.
1929  *
1930  * @return
1931  *   0 on success, a negative errno value otherwise and rte_errno is set.
1932  */
1933 int
1934 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1935                              uint64_t item_flags,
1936                              struct rte_eth_dev *dev,
1937                              struct rte_flow_error *error)
1938 {
1939         const struct rte_flow_item_vlan *spec = item->spec;
1940         const struct rte_flow_item_vlan *mask = item->mask;
1941         const struct rte_flow_item_vlan nic_mask = {
1942                 .tci = RTE_BE16(UINT16_MAX),
1943                 .inner_type = RTE_BE16(UINT16_MAX),
1944         };
1945         uint16_t vlan_tag = 0;
1946         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1947         int ret;
1948         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1949                                         MLX5_FLOW_LAYER_INNER_L4) :
1950                                        (MLX5_FLOW_LAYER_OUTER_L3 |
1951                                         MLX5_FLOW_LAYER_OUTER_L4);
1952         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1953                                         MLX5_FLOW_LAYER_OUTER_VLAN;
1954
1955         if (item_flags & vlanm)
1956                 return rte_flow_error_set(error, EINVAL,
1957                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1958                                           "multiple VLAN layers not supported");
1959         else if ((item_flags & l34m) != 0)
1960                 return rte_flow_error_set(error, EINVAL,
1961                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1962                                           "VLAN cannot follow L3/L4 layer");
1963         if (!mask)
1964                 mask = &rte_flow_item_vlan_mask;
1965         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1966                                         (const uint8_t *)&nic_mask,
1967                                         sizeof(struct rte_flow_item_vlan),
1968                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1969         if (ret)
1970                 return ret;
1971         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
1972                 struct mlx5_priv *priv = dev->data->dev_private;
1973
1974                 if (priv->vmwa_context) {
1975                         /*
1976                          * Non-NULL context means we have a virtual machine
1977                          * and SR-IOV enabled, we have to create VLAN interface
1978                          * to make hypervisor to setup E-Switch vport
1979                          * context correctly. We avoid creating the multiple
1980                          * VLAN interfaces, so we cannot support VLAN tag mask.
1981                          */
1982                         return rte_flow_error_set(error, EINVAL,
1983                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1984                                                   item,
1985                                                   "VLAN tag mask is not"
1986                                                   " supported in virtual"
1987                                                   " environment");
1988                 }
1989         }
1990         if (spec) {
1991                 vlan_tag = spec->tci;
1992                 vlan_tag &= mask->tci;
1993         }
1994         /*
1995          * From verbs perspective an empty VLAN is equivalent
1996          * to a packet without VLAN layer.
1997          */
1998         if (!vlan_tag)
1999                 return rte_flow_error_set(error, EINVAL,
2000                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2001                                           item->spec,
2002                                           "VLAN cannot be empty");
2003         return 0;
2004 }
2005
2006 /**
2007  * Validate IPV4 item.
2008  *
2009  * @param[in] item
2010  *   Item specification.
2011  * @param[in] item_flags
2012  *   Bit-fields that holds the items detected until now.
2013  * @param[in] last_item
2014  *   Previous validated item in the pattern items.
2015  * @param[in] ether_type
2016  *   Type in the ethernet layer header (including dot1q).
2017  * @param[in] acc_mask
2018  *   Acceptable mask, if NULL default internal default mask
2019  *   will be used to check whether item fields are supported.
2020  * @param[in] range_accepted
2021  *   True if range of values is accepted for specific fields, false otherwise.
2022  * @param[out] error
2023  *   Pointer to error structure.
2024  *
2025  * @return
2026  *   0 on success, a negative errno value otherwise and rte_errno is set.
2027  */
2028 int
2029 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
2030                              uint64_t item_flags,
2031                              uint64_t last_item,
2032                              uint16_t ether_type,
2033                              const struct rte_flow_item_ipv4 *acc_mask,
2034                              bool range_accepted,
2035                              struct rte_flow_error *error)
2036 {
2037         const struct rte_flow_item_ipv4 *mask = item->mask;
2038         const struct rte_flow_item_ipv4 *spec = item->spec;
2039         const struct rte_flow_item_ipv4 nic_mask = {
2040                 .hdr = {
2041                         .src_addr = RTE_BE32(0xffffffff),
2042                         .dst_addr = RTE_BE32(0xffffffff),
2043                         .type_of_service = 0xff,
2044                         .next_proto_id = 0xff,
2045                 },
2046         };
2047         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2048         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2049                                       MLX5_FLOW_LAYER_OUTER_L3;
2050         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2051                                       MLX5_FLOW_LAYER_OUTER_L4;
2052         int ret;
2053         uint8_t next_proto = 0xFF;
2054         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2055                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2056                                   MLX5_FLOW_LAYER_INNER_VLAN);
2057
2058         if ((last_item & l2_vlan) && ether_type &&
2059             ether_type != RTE_ETHER_TYPE_IPV4)
2060                 return rte_flow_error_set(error, EINVAL,
2061                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2062                                           "IPv4 cannot follow L2/VLAN layer "
2063                                           "which ether type is not IPv4");
2064         if (item_flags & MLX5_FLOW_LAYER_IPIP) {
2065                 if (mask && spec)
2066                         next_proto = mask->hdr.next_proto_id &
2067                                      spec->hdr.next_proto_id;
2068                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2069                         return rte_flow_error_set(error, EINVAL,
2070                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2071                                                   item,
2072                                                   "multiple tunnel "
2073                                                   "not supported");
2074         }
2075         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
2076                 return rte_flow_error_set(error, EINVAL,
2077                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2078                                           "wrong tunnel type - IPv6 specified "
2079                                           "but IPv4 item provided");
2080         if (item_flags & l3m)
2081                 return rte_flow_error_set(error, ENOTSUP,
2082                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2083                                           "multiple L3 layers not supported");
2084         else if (item_flags & l4m)
2085                 return rte_flow_error_set(error, EINVAL,
2086                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2087                                           "L3 cannot follow an L4 layer.");
2088         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2089                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2090                 return rte_flow_error_set(error, EINVAL,
2091                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2092                                           "L3 cannot follow an NVGRE layer.");
2093         if (!mask)
2094                 mask = &rte_flow_item_ipv4_mask;
2095         else if (mask->hdr.next_proto_id != 0 &&
2096                  mask->hdr.next_proto_id != 0xff)
2097                 return rte_flow_error_set(error, EINVAL,
2098                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2099                                           "partial mask is not supported"
2100                                           " for protocol");
2101         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2102                                         acc_mask ? (const uint8_t *)acc_mask
2103                                                  : (const uint8_t *)&nic_mask,
2104                                         sizeof(struct rte_flow_item_ipv4),
2105                                         range_accepted, error);
2106         if (ret < 0)
2107                 return ret;
2108         return 0;
2109 }
2110
2111 /**
2112  * Validate IPV6 item.
2113  *
2114  * @param[in] item
2115  *   Item specification.
2116  * @param[in] item_flags
2117  *   Bit-fields that holds the items detected until now.
2118  * @param[in] last_item
2119  *   Previous validated item in the pattern items.
2120  * @param[in] ether_type
2121  *   Type in the ethernet layer header (including dot1q).
2122  * @param[in] acc_mask
2123  *   Acceptable mask, if NULL default internal default mask
2124  *   will be used to check whether item fields are supported.
2125  * @param[out] error
2126  *   Pointer to error structure.
2127  *
2128  * @return
2129  *   0 on success, a negative errno value otherwise and rte_errno is set.
2130  */
2131 int
2132 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
2133                              uint64_t item_flags,
2134                              uint64_t last_item,
2135                              uint16_t ether_type,
2136                              const struct rte_flow_item_ipv6 *acc_mask,
2137                              struct rte_flow_error *error)
2138 {
2139         const struct rte_flow_item_ipv6 *mask = item->mask;
2140         const struct rte_flow_item_ipv6 *spec = item->spec;
2141         const struct rte_flow_item_ipv6 nic_mask = {
2142                 .hdr = {
2143                         .src_addr =
2144                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2145                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2146                         .dst_addr =
2147                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2148                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2149                         .vtc_flow = RTE_BE32(0xffffffff),
2150                         .proto = 0xff,
2151                 },
2152         };
2153         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2154         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2155                                       MLX5_FLOW_LAYER_OUTER_L3;
2156         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2157                                       MLX5_FLOW_LAYER_OUTER_L4;
2158         int ret;
2159         uint8_t next_proto = 0xFF;
2160         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2161                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2162                                   MLX5_FLOW_LAYER_INNER_VLAN);
2163
2164         if ((last_item & l2_vlan) && ether_type &&
2165             ether_type != RTE_ETHER_TYPE_IPV6)
2166                 return rte_flow_error_set(error, EINVAL,
2167                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2168                                           "IPv6 cannot follow L2/VLAN layer "
2169                                           "which ether type is not IPv6");
2170         if (mask && mask->hdr.proto == UINT8_MAX && spec)
2171                 next_proto = spec->hdr.proto;
2172         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
2173                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2174                         return rte_flow_error_set(error, EINVAL,
2175                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2176                                                   item,
2177                                                   "multiple tunnel "
2178                                                   "not supported");
2179         }
2180         if (next_proto == IPPROTO_HOPOPTS  ||
2181             next_proto == IPPROTO_ROUTING  ||
2182             next_proto == IPPROTO_FRAGMENT ||
2183             next_proto == IPPROTO_ESP      ||
2184             next_proto == IPPROTO_AH       ||
2185             next_proto == IPPROTO_DSTOPTS)
2186                 return rte_flow_error_set(error, EINVAL,
2187                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2188                                           "IPv6 proto (next header) should "
2189                                           "not be set as extension header");
2190         if (item_flags & MLX5_FLOW_LAYER_IPIP)
2191                 return rte_flow_error_set(error, EINVAL,
2192                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2193                                           "wrong tunnel type - IPv4 specified "
2194                                           "but IPv6 item provided");
2195         if (item_flags & l3m)
2196                 return rte_flow_error_set(error, ENOTSUP,
2197                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2198                                           "multiple L3 layers not supported");
2199         else if (item_flags & l4m)
2200                 return rte_flow_error_set(error, EINVAL,
2201                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2202                                           "L3 cannot follow an L4 layer.");
2203         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2204                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2205                 return rte_flow_error_set(error, EINVAL,
2206                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2207                                           "L3 cannot follow an NVGRE layer.");
2208         if (!mask)
2209                 mask = &rte_flow_item_ipv6_mask;
2210         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2211                                         acc_mask ? (const uint8_t *)acc_mask
2212                                                  : (const uint8_t *)&nic_mask,
2213                                         sizeof(struct rte_flow_item_ipv6),
2214                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2215         if (ret < 0)
2216                 return ret;
2217         return 0;
2218 }
2219
2220 /**
2221  * Validate UDP item.
2222  *
2223  * @param[in] item
2224  *   Item specification.
2225  * @param[in] item_flags
2226  *   Bit-fields that holds the items detected until now.
2227  * @param[in] target_protocol
2228  *   The next protocol in the previous item.
2229  * @param[in] flow_mask
2230  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
2231  * @param[out] error
2232  *   Pointer to error structure.
2233  *
2234  * @return
2235  *   0 on success, a negative errno value otherwise and rte_errno is set.
2236  */
2237 int
2238 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
2239                             uint64_t item_flags,
2240                             uint8_t target_protocol,
2241                             struct rte_flow_error *error)
2242 {
2243         const struct rte_flow_item_udp *mask = item->mask;
2244         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2245         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2246                                       MLX5_FLOW_LAYER_OUTER_L3;
2247         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2248                                       MLX5_FLOW_LAYER_OUTER_L4;
2249         int ret;
2250
2251         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
2252                 return rte_flow_error_set(error, EINVAL,
2253                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2254                                           "protocol filtering not compatible"
2255                                           " with UDP layer");
2256         if (!(item_flags & l3m))
2257                 return rte_flow_error_set(error, EINVAL,
2258                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2259                                           "L3 is mandatory to filter on L4");
2260         if (item_flags & l4m)
2261                 return rte_flow_error_set(error, EINVAL,
2262                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2263                                           "multiple L4 layers not supported");
2264         if (!mask)
2265                 mask = &rte_flow_item_udp_mask;
2266         ret = mlx5_flow_item_acceptable
2267                 (item, (const uint8_t *)mask,
2268                  (const uint8_t *)&rte_flow_item_udp_mask,
2269                  sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2270                  error);
2271         if (ret < 0)
2272                 return ret;
2273         return 0;
2274 }
2275
2276 /**
2277  * Validate TCP item.
2278  *
2279  * @param[in] item
2280  *   Item specification.
2281  * @param[in] item_flags
2282  *   Bit-fields that holds the items detected until now.
2283  * @param[in] target_protocol
2284  *   The next protocol in the previous item.
2285  * @param[out] error
2286  *   Pointer to error structure.
2287  *
2288  * @return
2289  *   0 on success, a negative errno value otherwise and rte_errno is set.
2290  */
2291 int
2292 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
2293                             uint64_t item_flags,
2294                             uint8_t target_protocol,
2295                             const struct rte_flow_item_tcp *flow_mask,
2296                             struct rte_flow_error *error)
2297 {
2298         const struct rte_flow_item_tcp *mask = item->mask;
2299         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2300         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2301                                       MLX5_FLOW_LAYER_OUTER_L3;
2302         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2303                                       MLX5_FLOW_LAYER_OUTER_L4;
2304         int ret;
2305
2306         MLX5_ASSERT(flow_mask);
2307         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
2308                 return rte_flow_error_set(error, EINVAL,
2309                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2310                                           "protocol filtering not compatible"
2311                                           " with TCP layer");
2312         if (!(item_flags & l3m))
2313                 return rte_flow_error_set(error, EINVAL,
2314                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2315                                           "L3 is mandatory to filter on L4");
2316         if (item_flags & l4m)
2317                 return rte_flow_error_set(error, EINVAL,
2318                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2319                                           "multiple L4 layers not supported");
2320         if (!mask)
2321                 mask = &rte_flow_item_tcp_mask;
2322         ret = mlx5_flow_item_acceptable
2323                 (item, (const uint8_t *)mask,
2324                  (const uint8_t *)flow_mask,
2325                  sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2326                  error);
2327         if (ret < 0)
2328                 return ret;
2329         return 0;
2330 }
2331
2332 /**
2333  * Validate VXLAN item.
2334  *
2335  * @param[in] item
2336  *   Item specification.
2337  * @param[in] item_flags
2338  *   Bit-fields that holds the items detected until now.
2339  * @param[in] target_protocol
2340  *   The next protocol in the previous item.
2341  * @param[out] error
2342  *   Pointer to error structure.
2343  *
2344  * @return
2345  *   0 on success, a negative errno value otherwise and rte_errno is set.
2346  */
2347 int
2348 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
2349                               uint64_t item_flags,
2350                               struct rte_flow_error *error)
2351 {
2352         const struct rte_flow_item_vxlan *spec = item->spec;
2353         const struct rte_flow_item_vxlan *mask = item->mask;
2354         int ret;
2355         union vni {
2356                 uint32_t vlan_id;
2357                 uint8_t vni[4];
2358         } id = { .vlan_id = 0, };
2359
2360
2361         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2362                 return rte_flow_error_set(error, ENOTSUP,
2363                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2364                                           "multiple tunnel layers not"
2365                                           " supported");
2366         /*
2367          * Verify only UDPv4 is present as defined in
2368          * https://tools.ietf.org/html/rfc7348
2369          */
2370         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2371                 return rte_flow_error_set(error, EINVAL,
2372                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2373                                           "no outer UDP layer found");
2374         if (!mask)
2375                 mask = &rte_flow_item_vxlan_mask;
2376         ret = mlx5_flow_item_acceptable
2377                 (item, (const uint8_t *)mask,
2378                  (const uint8_t *)&rte_flow_item_vxlan_mask,
2379                  sizeof(struct rte_flow_item_vxlan),
2380                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2381         if (ret < 0)
2382                 return ret;
2383         if (spec) {
2384                 memcpy(&id.vni[1], spec->vni, 3);
2385                 memcpy(&id.vni[1], mask->vni, 3);
2386         }
2387         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2388                 return rte_flow_error_set(error, ENOTSUP,
2389                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2390                                           "VXLAN tunnel must be fully defined");
2391         return 0;
2392 }
2393
2394 /**
2395  * Validate VXLAN_GPE item.
2396  *
2397  * @param[in] item
2398  *   Item specification.
2399  * @param[in] item_flags
2400  *   Bit-fields that holds the items detected until now.
2401  * @param[in] priv
2402  *   Pointer to the private data structure.
2403  * @param[in] target_protocol
2404  *   The next protocol in the previous item.
2405  * @param[out] error
2406  *   Pointer to error structure.
2407  *
2408  * @return
2409  *   0 on success, a negative errno value otherwise and rte_errno is set.
2410  */
2411 int
2412 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
2413                                   uint64_t item_flags,
2414                                   struct rte_eth_dev *dev,
2415                                   struct rte_flow_error *error)
2416 {
2417         struct mlx5_priv *priv = dev->data->dev_private;
2418         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
2419         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
2420         int ret;
2421         union vni {
2422                 uint32_t vlan_id;
2423                 uint8_t vni[4];
2424         } id = { .vlan_id = 0, };
2425
2426         if (!priv->config.l3_vxlan_en)
2427                 return rte_flow_error_set(error, ENOTSUP,
2428                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2429                                           "L3 VXLAN is not enabled by device"
2430                                           " parameter and/or not configured in"
2431                                           " firmware");
2432         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2433                 return rte_flow_error_set(error, ENOTSUP,
2434                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2435                                           "multiple tunnel layers not"
2436                                           " supported");
2437         /*
2438          * Verify only UDPv4 is present as defined in
2439          * https://tools.ietf.org/html/rfc7348
2440          */
2441         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2442                 return rte_flow_error_set(error, EINVAL,
2443                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2444                                           "no outer UDP layer found");
2445         if (!mask)
2446                 mask = &rte_flow_item_vxlan_gpe_mask;
2447         ret = mlx5_flow_item_acceptable
2448                 (item, (const uint8_t *)mask,
2449                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
2450                  sizeof(struct rte_flow_item_vxlan_gpe),
2451                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2452         if (ret < 0)
2453                 return ret;
2454         if (spec) {
2455                 if (spec->protocol)
2456                         return rte_flow_error_set(error, ENOTSUP,
2457                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2458                                                   item,
2459                                                   "VxLAN-GPE protocol"
2460                                                   " not supported");
2461                 memcpy(&id.vni[1], spec->vni, 3);
2462                 memcpy(&id.vni[1], mask->vni, 3);
2463         }
2464         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2465                 return rte_flow_error_set(error, ENOTSUP,
2466                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2467                                           "VXLAN-GPE tunnel must be fully"
2468                                           " defined");
2469         return 0;
2470 }
2471 /**
2472  * Validate GRE Key item.
2473  *
2474  * @param[in] item
2475  *   Item specification.
2476  * @param[in] item_flags
2477  *   Bit flags to mark detected items.
2478  * @param[in] gre_item
2479  *   Pointer to gre_item
2480  * @param[out] error
2481  *   Pointer to error structure.
2482  *
2483  * @return
2484  *   0 on success, a negative errno value otherwise and rte_errno is set.
2485  */
2486 int
2487 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
2488                                 uint64_t item_flags,
2489                                 const struct rte_flow_item *gre_item,
2490                                 struct rte_flow_error *error)
2491 {
2492         const rte_be32_t *mask = item->mask;
2493         int ret = 0;
2494         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
2495         const struct rte_flow_item_gre *gre_spec;
2496         const struct rte_flow_item_gre *gre_mask;
2497
2498         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
2499                 return rte_flow_error_set(error, ENOTSUP,
2500                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2501                                           "Multiple GRE key not support");
2502         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2503                 return rte_flow_error_set(error, ENOTSUP,
2504                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2505                                           "No preceding GRE header");
2506         if (item_flags & MLX5_FLOW_LAYER_INNER)
2507                 return rte_flow_error_set(error, ENOTSUP,
2508                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2509                                           "GRE key following a wrong item");
2510         gre_mask = gre_item->mask;
2511         if (!gre_mask)
2512                 gre_mask = &rte_flow_item_gre_mask;
2513         gre_spec = gre_item->spec;
2514         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2515                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2516                 return rte_flow_error_set(error, EINVAL,
2517                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2518                                           "Key bit must be on");
2519
2520         if (!mask)
2521                 mask = &gre_key_default_mask;
2522         ret = mlx5_flow_item_acceptable
2523                 (item, (const uint8_t *)mask,
2524                  (const uint8_t *)&gre_key_default_mask,
2525                  sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2526         return ret;
2527 }
2528
2529 /**
2530  * Validate GRE item.
2531  *
2532  * @param[in] item
2533  *   Item specification.
2534  * @param[in] item_flags
2535  *   Bit flags to mark detected items.
2536  * @param[in] target_protocol
2537  *   The next protocol in the previous item.
2538  * @param[out] error
2539  *   Pointer to error structure.
2540  *
2541  * @return
2542  *   0 on success, a negative errno value otherwise and rte_errno is set.
2543  */
2544 int
2545 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2546                             uint64_t item_flags,
2547                             uint8_t target_protocol,
2548                             struct rte_flow_error *error)
2549 {
2550         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2551         const struct rte_flow_item_gre *mask = item->mask;
2552         int ret;
2553         const struct rte_flow_item_gre nic_mask = {
2554                 .c_rsvd0_ver = RTE_BE16(0xB000),
2555                 .protocol = RTE_BE16(UINT16_MAX),
2556         };
2557
2558         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2559                 return rte_flow_error_set(error, EINVAL,
2560                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2561                                           "protocol filtering not compatible"
2562                                           " with this GRE layer");
2563         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2564                 return rte_flow_error_set(error, ENOTSUP,
2565                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2566                                           "multiple tunnel layers not"
2567                                           " supported");
2568         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2569                 return rte_flow_error_set(error, ENOTSUP,
2570                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2571                                           "L3 Layer is missing");
2572         if (!mask)
2573                 mask = &rte_flow_item_gre_mask;
2574         ret = mlx5_flow_item_acceptable
2575                 (item, (const uint8_t *)mask,
2576                  (const uint8_t *)&nic_mask,
2577                  sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2578                  error);
2579         if (ret < 0)
2580                 return ret;
2581 #ifndef HAVE_MLX5DV_DR
2582 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2583         if (spec && (spec->protocol & mask->protocol))
2584                 return rte_flow_error_set(error, ENOTSUP,
2585                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2586                                           "without MPLS support the"
2587                                           " specification cannot be used for"
2588                                           " filtering");
2589 #endif
2590 #endif
2591         return 0;
2592 }
2593
2594 /**
2595  * Validate Geneve item.
2596  *
2597  * @param[in] item
2598  *   Item specification.
2599  * @param[in] itemFlags
2600  *   Bit-fields that holds the items detected until now.
2601  * @param[in] enPriv
2602  *   Pointer to the private data structure.
2603  * @param[out] error
2604  *   Pointer to error structure.
2605  *
2606  * @return
2607  *   0 on success, a negative errno value otherwise and rte_errno is set.
2608  */
2609
2610 int
2611 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2612                                uint64_t item_flags,
2613                                struct rte_eth_dev *dev,
2614                                struct rte_flow_error *error)
2615 {
2616         struct mlx5_priv *priv = dev->data->dev_private;
2617         const struct rte_flow_item_geneve *spec = item->spec;
2618         const struct rte_flow_item_geneve *mask = item->mask;
2619         int ret;
2620         uint16_t gbhdr;
2621         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2622                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2623         const struct rte_flow_item_geneve nic_mask = {
2624                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2625                 .vni = "\xff\xff\xff",
2626                 .protocol = RTE_BE16(UINT16_MAX),
2627         };
2628
2629         if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2630                 return rte_flow_error_set(error, ENOTSUP,
2631                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2632                                           "L3 Geneve is not enabled by device"
2633                                           " parameter and/or not configured in"
2634                                           " firmware");
2635         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2636                 return rte_flow_error_set(error, ENOTSUP,
2637                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2638                                           "multiple tunnel layers not"
2639                                           " supported");
2640         /*
2641          * Verify only UDPv4 is present as defined in
2642          * https://tools.ietf.org/html/rfc7348
2643          */
2644         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2645                 return rte_flow_error_set(error, EINVAL,
2646                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2647                                           "no outer UDP layer found");
2648         if (!mask)
2649                 mask = &rte_flow_item_geneve_mask;
2650         ret = mlx5_flow_item_acceptable
2651                                   (item, (const uint8_t *)mask,
2652                                    (const uint8_t *)&nic_mask,
2653                                    sizeof(struct rte_flow_item_geneve),
2654                                    MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2655         if (ret)
2656                 return ret;
2657         if (spec) {
2658                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2659                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2660                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2661                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2662                         return rte_flow_error_set(error, ENOTSUP,
2663                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2664                                                   item,
2665                                                   "Geneve protocol unsupported"
2666                                                   " fields are being used");
2667                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2668                         return rte_flow_error_set
2669                                         (error, ENOTSUP,
2670                                          RTE_FLOW_ERROR_TYPE_ITEM,
2671                                          item,
2672                                          "Unsupported Geneve options length");
2673         }
2674         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2675                 return rte_flow_error_set
2676                                     (error, ENOTSUP,
2677                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2678                                      "Geneve tunnel must be fully defined");
2679         return 0;
2680 }
2681
2682 /**
2683  * Validate Geneve TLV option item.
2684  *
2685  * @param[in] item
2686  *   Item specification.
2687  * @param[in] last_item
2688  *   Previous validated item in the pattern items.
2689  * @param[in] geneve_item
2690  *   Previous GENEVE item specification.
2691  * @param[in] dev
2692  *   Pointer to the rte_eth_dev structure.
2693  * @param[out] error
2694  *   Pointer to error structure.
2695  *
2696  * @return
2697  *   0 on success, a negative errno value otherwise and rte_errno is set.
2698  */
2699 int
2700 mlx5_flow_validate_item_geneve_opt(const struct rte_flow_item *item,
2701                                    uint64_t last_item,
2702                                    const struct rte_flow_item *geneve_item,
2703                                    struct rte_eth_dev *dev,
2704                                    struct rte_flow_error *error)
2705 {
2706         struct mlx5_priv *priv = dev->data->dev_private;
2707         struct mlx5_dev_ctx_shared *sh = priv->sh;
2708         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource;
2709         struct mlx5_hca_attr *hca_attr = &priv->config.hca_attr;
2710         uint8_t data_max_supported =
2711                         hca_attr->max_geneve_tlv_option_data_len * 4;
2712         struct mlx5_dev_config *config = &priv->config;
2713         const struct rte_flow_item_geneve *geneve_spec;
2714         const struct rte_flow_item_geneve *geneve_mask;
2715         const struct rte_flow_item_geneve_opt *spec = item->spec;
2716         const struct rte_flow_item_geneve_opt *mask = item->mask;
2717         unsigned int i;
2718         unsigned int data_len;
2719         uint8_t tlv_option_len;
2720         uint16_t optlen_m, optlen_v;
2721         const struct rte_flow_item_geneve_opt full_mask = {
2722                 .option_class = RTE_BE16(0xffff),
2723                 .option_type = 0xff,
2724                 .option_len = 0x1f,
2725         };
2726
2727         if (!mask)
2728                 mask = &rte_flow_item_geneve_opt_mask;
2729         if (!spec)
2730                 return rte_flow_error_set
2731                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2732                         "Geneve TLV opt class/type/length must be specified");
2733         if ((uint32_t)spec->option_len > MLX5_GENEVE_OPTLEN_MASK)
2734                 return rte_flow_error_set
2735                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2736                         "Geneve TLV opt length exceeeds the limit (31)");
2737         /* Check if class type and length masks are full. */
2738         if (full_mask.option_class != mask->option_class ||
2739             full_mask.option_type != mask->option_type ||
2740             full_mask.option_len != (mask->option_len & full_mask.option_len))
2741                 return rte_flow_error_set
2742                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2743                         "Geneve TLV opt class/type/length masks must be full");
2744         /* Check if length is supported */
2745         if ((uint32_t)spec->option_len >
2746                         config->hca_attr.max_geneve_tlv_option_data_len)
2747                 return rte_flow_error_set
2748                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2749                         "Geneve TLV opt length not supported");
2750         if (config->hca_attr.max_geneve_tlv_options > 1)
2751                 DRV_LOG(DEBUG,
2752                         "max_geneve_tlv_options supports more than 1 option");
2753         /* Check GENEVE item preceding. */
2754         if (!geneve_item || !(last_item & MLX5_FLOW_LAYER_GENEVE))
2755                 return rte_flow_error_set
2756                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2757                         "Geneve opt item must be preceded with Geneve item");
2758         geneve_spec = geneve_item->spec;
2759         geneve_mask = geneve_item->mask ? geneve_item->mask :
2760                                           &rte_flow_item_geneve_mask;
2761         /* Check if GENEVE TLV option size doesn't exceed option length */
2762         if (geneve_spec && (geneve_mask->ver_opt_len_o_c_rsvd0 ||
2763                             geneve_spec->ver_opt_len_o_c_rsvd0)) {
2764                 tlv_option_len = spec->option_len & mask->option_len;
2765                 optlen_v = rte_be_to_cpu_16(geneve_spec->ver_opt_len_o_c_rsvd0);
2766                 optlen_v = MLX5_GENEVE_OPTLEN_VAL(optlen_v);
2767                 optlen_m = rte_be_to_cpu_16(geneve_mask->ver_opt_len_o_c_rsvd0);
2768                 optlen_m = MLX5_GENEVE_OPTLEN_VAL(optlen_m);
2769                 if ((optlen_v & optlen_m) <= tlv_option_len)
2770                         return rte_flow_error_set
2771                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2772                                  "GENEVE TLV option length exceeds optlen");
2773         }
2774         /* Check if length is 0 or data is 0. */
2775         if (spec->data == NULL || spec->option_len == 0)
2776                 return rte_flow_error_set
2777                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2778                         "Geneve TLV opt with zero data/length not supported");
2779         /* Check not all data & mask are 0. */
2780         data_len = spec->option_len * 4;
2781         if (mask->data == NULL) {
2782                 for (i = 0; i < data_len; i++)
2783                         if (spec->data[i])
2784                                 break;
2785                 if (i == data_len)
2786                         return rte_flow_error_set(error, ENOTSUP,
2787                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2788                                 "Can't match on Geneve option data 0");
2789         } else {
2790                 for (i = 0; i < data_len; i++)
2791                         if (spec->data[i] & mask->data[i])
2792                                 break;
2793                 if (i == data_len)
2794                         return rte_flow_error_set(error, ENOTSUP,
2795                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2796                                 "Can't match on Geneve option data and mask 0");
2797                 /* Check data mask supported. */
2798                 for (i = data_max_supported; i < data_len ; i++)
2799                         if (mask->data[i])
2800                                 return rte_flow_error_set(error, ENOTSUP,
2801                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2802                                         "Data mask is of unsupported size");
2803         }
2804         /* Check GENEVE option is supported in NIC. */
2805         if (!config->hca_attr.geneve_tlv_opt)
2806                 return rte_flow_error_set
2807                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2808                         "Geneve TLV opt not supported");
2809         /* Check if we already have geneve option with different type/class. */
2810         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
2811         geneve_opt_resource = sh->geneve_tlv_option_resource;
2812         if (geneve_opt_resource != NULL)
2813                 if (geneve_opt_resource->option_class != spec->option_class ||
2814                     geneve_opt_resource->option_type != spec->option_type ||
2815                     geneve_opt_resource->length != spec->option_len) {
2816                         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
2817                         return rte_flow_error_set(error, ENOTSUP,
2818                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2819                                 "Only one Geneve TLV option supported");
2820                 }
2821         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
2822         return 0;
2823 }
2824
2825 /**
2826  * Validate MPLS item.
2827  *
2828  * @param[in] dev
2829  *   Pointer to the rte_eth_dev structure.
2830  * @param[in] item
2831  *   Item specification.
2832  * @param[in] item_flags
2833  *   Bit-fields that holds the items detected until now.
2834  * @param[in] prev_layer
2835  *   The protocol layer indicated in previous item.
2836  * @param[out] error
2837  *   Pointer to error structure.
2838  *
2839  * @return
2840  *   0 on success, a negative errno value otherwise and rte_errno is set.
2841  */
2842 int
2843 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
2844                              const struct rte_flow_item *item __rte_unused,
2845                              uint64_t item_flags __rte_unused,
2846                              uint64_t prev_layer __rte_unused,
2847                              struct rte_flow_error *error)
2848 {
2849 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2850         const struct rte_flow_item_mpls *mask = item->mask;
2851         struct mlx5_priv *priv = dev->data->dev_private;
2852         int ret;
2853
2854         if (!priv->config.mpls_en)
2855                 return rte_flow_error_set(error, ENOTSUP,
2856                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2857                                           "MPLS not supported or"
2858                                           " disabled in firmware"
2859                                           " configuration.");
2860         /* MPLS over IP, UDP, GRE is allowed */
2861         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
2862                             MLX5_FLOW_LAYER_OUTER_L4_UDP |
2863                             MLX5_FLOW_LAYER_GRE |
2864                             MLX5_FLOW_LAYER_GRE_KEY)))
2865                 return rte_flow_error_set(error, EINVAL,
2866                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2867                                           "protocol filtering not compatible"
2868                                           " with MPLS layer");
2869         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
2870         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
2871             !(item_flags & MLX5_FLOW_LAYER_GRE))
2872                 return rte_flow_error_set(error, ENOTSUP,
2873                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2874                                           "multiple tunnel layers not"
2875                                           " supported");
2876         if (!mask)
2877                 mask = &rte_flow_item_mpls_mask;
2878         ret = mlx5_flow_item_acceptable
2879                 (item, (const uint8_t *)mask,
2880                  (const uint8_t *)&rte_flow_item_mpls_mask,
2881                  sizeof(struct rte_flow_item_mpls),
2882                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2883         if (ret < 0)
2884                 return ret;
2885         return 0;
2886 #else
2887         return rte_flow_error_set(error, ENOTSUP,
2888                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
2889                                   "MPLS is not supported by Verbs, please"
2890                                   " update.");
2891 #endif
2892 }
2893
2894 /**
2895  * Validate NVGRE item.
2896  *
2897  * @param[in] item
2898  *   Item specification.
2899  * @param[in] item_flags
2900  *   Bit flags to mark detected items.
2901  * @param[in] target_protocol
2902  *   The next protocol in the previous item.
2903  * @param[out] error
2904  *   Pointer to error structure.
2905  *
2906  * @return
2907  *   0 on success, a negative errno value otherwise and rte_errno is set.
2908  */
2909 int
2910 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
2911                               uint64_t item_flags,
2912                               uint8_t target_protocol,
2913                               struct rte_flow_error *error)
2914 {
2915         const struct rte_flow_item_nvgre *mask = item->mask;
2916         int ret;
2917
2918         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2919                 return rte_flow_error_set(error, EINVAL,
2920                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2921                                           "protocol filtering not compatible"
2922                                           " with this GRE layer");
2923         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2924                 return rte_flow_error_set(error, ENOTSUP,
2925                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2926                                           "multiple tunnel layers not"
2927                                           " supported");
2928         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2929                 return rte_flow_error_set(error, ENOTSUP,
2930                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2931                                           "L3 Layer is missing");
2932         if (!mask)
2933                 mask = &rte_flow_item_nvgre_mask;
2934         ret = mlx5_flow_item_acceptable
2935                 (item, (const uint8_t *)mask,
2936                  (const uint8_t *)&rte_flow_item_nvgre_mask,
2937                  sizeof(struct rte_flow_item_nvgre),
2938                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2939         if (ret < 0)
2940                 return ret;
2941         return 0;
2942 }
2943
2944 /**
2945  * Validate eCPRI item.
2946  *
2947  * @param[in] item
2948  *   Item specification.
2949  * @param[in] item_flags
2950  *   Bit-fields that holds the items detected until now.
2951  * @param[in] last_item
2952  *   Previous validated item in the pattern items.
2953  * @param[in] ether_type
2954  *   Type in the ethernet layer header (including dot1q).
2955  * @param[in] acc_mask
2956  *   Acceptable mask, if NULL default internal default mask
2957  *   will be used to check whether item fields are supported.
2958  * @param[out] error
2959  *   Pointer to error structure.
2960  *
2961  * @return
2962  *   0 on success, a negative errno value otherwise and rte_errno is set.
2963  */
2964 int
2965 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item,
2966                               uint64_t item_flags,
2967                               uint64_t last_item,
2968                               uint16_t ether_type,
2969                               const struct rte_flow_item_ecpri *acc_mask,
2970                               struct rte_flow_error *error)
2971 {
2972         const struct rte_flow_item_ecpri *mask = item->mask;
2973         const struct rte_flow_item_ecpri nic_mask = {
2974                 .hdr = {
2975                         .common = {
2976                                 .u32 =
2977                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
2978                                         .type = 0xFF,
2979                                         }).u32),
2980                         },
2981                         .dummy[0] = 0xFFFFFFFF,
2982                 },
2983         };
2984         const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 |
2985                                         MLX5_FLOW_LAYER_OUTER_VLAN);
2986         struct rte_flow_item_ecpri mask_lo;
2987
2988         if (!(last_item & outer_l2_vlan) &&
2989             last_item != MLX5_FLOW_LAYER_OUTER_L4_UDP)
2990                 return rte_flow_error_set(error, EINVAL,
2991                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2992                                           "eCPRI can only follow L2/VLAN layer or UDP layer");
2993         if ((last_item & outer_l2_vlan) && ether_type &&
2994             ether_type != RTE_ETHER_TYPE_ECPRI)
2995                 return rte_flow_error_set(error, EINVAL,
2996                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2997                                           "eCPRI cannot follow L2/VLAN layer which ether type is not 0xAEFE");
2998         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2999                 return rte_flow_error_set(error, EINVAL,
3000                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3001                                           "eCPRI with tunnel is not supported right now");
3002         if (item_flags & MLX5_FLOW_LAYER_OUTER_L3)
3003                 return rte_flow_error_set(error, ENOTSUP,
3004                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3005                                           "multiple L3 layers not supported");
3006         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP)
3007                 return rte_flow_error_set(error, EINVAL,
3008                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3009                                           "eCPRI cannot coexist with a TCP layer");
3010         /* In specification, eCPRI could be over UDP layer. */
3011         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)
3012                 return rte_flow_error_set(error, EINVAL,
3013                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3014                                           "eCPRI over UDP layer is not yet supported right now");
3015         /* Mask for type field in common header could be zero. */
3016         if (!mask)
3017                 mask = &rte_flow_item_ecpri_mask;
3018         mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32);
3019         /* Input mask is in big-endian format. */
3020         if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff)
3021                 return rte_flow_error_set(error, EINVAL,
3022                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3023                                           "partial mask is not supported for protocol");
3024         else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0)
3025                 return rte_flow_error_set(error, EINVAL,
3026                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3027                                           "message header mask must be after a type mask");
3028         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
3029                                          acc_mask ? (const uint8_t *)acc_mask
3030                                                   : (const uint8_t *)&nic_mask,
3031                                          sizeof(struct rte_flow_item_ecpri),
3032                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3033 }
3034
3035 /**
3036  * Release resource related QUEUE/RSS action split.
3037  *
3038  * @param dev
3039  *   Pointer to Ethernet device.
3040  * @param flow
3041  *   Flow to release id's from.
3042  */
3043 static void
3044 flow_mreg_split_qrss_release(struct rte_eth_dev *dev,
3045                              struct rte_flow *flow)
3046 {
3047         struct mlx5_priv *priv = dev->data->dev_private;
3048         uint32_t handle_idx;
3049         struct mlx5_flow_handle *dev_handle;
3050
3051         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
3052                        handle_idx, dev_handle, next)
3053                 if (dev_handle->split_flow_id)
3054                         mlx5_ipool_free(priv->sh->ipool
3055                                         [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
3056                                         dev_handle->split_flow_id);
3057 }
3058
3059 static int
3060 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
3061                    const struct rte_flow_attr *attr __rte_unused,
3062                    const struct rte_flow_item items[] __rte_unused,
3063                    const struct rte_flow_action actions[] __rte_unused,
3064                    bool external __rte_unused,
3065                    int hairpin __rte_unused,
3066                    struct rte_flow_error *error)
3067 {
3068         return rte_flow_error_set(error, ENOTSUP,
3069                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3070 }
3071
3072 static struct mlx5_flow *
3073 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
3074                   const struct rte_flow_attr *attr __rte_unused,
3075                   const struct rte_flow_item items[] __rte_unused,
3076                   const struct rte_flow_action actions[] __rte_unused,
3077                   struct rte_flow_error *error)
3078 {
3079         rte_flow_error_set(error, ENOTSUP,
3080                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3081         return NULL;
3082 }
3083
3084 static int
3085 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
3086                     struct mlx5_flow *dev_flow __rte_unused,
3087                     const struct rte_flow_attr *attr __rte_unused,
3088                     const struct rte_flow_item items[] __rte_unused,
3089                     const struct rte_flow_action actions[] __rte_unused,
3090                     struct rte_flow_error *error)
3091 {
3092         return rte_flow_error_set(error, ENOTSUP,
3093                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3094 }
3095
3096 static int
3097 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
3098                 struct rte_flow *flow __rte_unused,
3099                 struct rte_flow_error *error)
3100 {
3101         return rte_flow_error_set(error, ENOTSUP,
3102                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3103 }
3104
3105 static void
3106 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
3107                  struct rte_flow *flow __rte_unused)
3108 {
3109 }
3110
3111 static void
3112 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
3113                   struct rte_flow *flow __rte_unused)
3114 {
3115 }
3116
3117 static int
3118 flow_null_query(struct rte_eth_dev *dev __rte_unused,
3119                 struct rte_flow *flow __rte_unused,
3120                 const struct rte_flow_action *actions __rte_unused,
3121                 void *data __rte_unused,
3122                 struct rte_flow_error *error)
3123 {
3124         return rte_flow_error_set(error, ENOTSUP,
3125                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3126 }
3127
3128 static int
3129 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused,
3130                       uint32_t domains __rte_unused,
3131                       uint32_t flags __rte_unused)
3132 {
3133         return 0;
3134 }
3135
3136 /* Void driver to protect from null pointer reference. */
3137 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
3138         .validate = flow_null_validate,
3139         .prepare = flow_null_prepare,
3140         .translate = flow_null_translate,
3141         .apply = flow_null_apply,
3142         .remove = flow_null_remove,
3143         .destroy = flow_null_destroy,
3144         .query = flow_null_query,
3145         .sync_domain = flow_null_sync_domain,
3146 };
3147
3148 /**
3149  * Select flow driver type according to flow attributes and device
3150  * configuration.
3151  *
3152  * @param[in] dev
3153  *   Pointer to the dev structure.
3154  * @param[in] attr
3155  *   Pointer to the flow attributes.
3156  *
3157  * @return
3158  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
3159  */
3160 static enum mlx5_flow_drv_type
3161 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
3162 {
3163         struct mlx5_priv *priv = dev->data->dev_private;
3164         /* The OS can determine first a specific flow type (DV, VERBS) */
3165         enum mlx5_flow_drv_type type = mlx5_flow_os_get_type();
3166
3167         if (type != MLX5_FLOW_TYPE_MAX)
3168                 return type;
3169         /* If no OS specific type - continue with DV/VERBS selection */
3170         if (attr->transfer && priv->config.dv_esw_en)
3171                 type = MLX5_FLOW_TYPE_DV;
3172         if (!attr->transfer)
3173                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
3174                                                  MLX5_FLOW_TYPE_VERBS;
3175         return type;
3176 }
3177
3178 #define flow_get_drv_ops(type) flow_drv_ops[type]
3179
3180 /**
3181  * Flow driver validation API. This abstracts calling driver specific functions.
3182  * The type of flow driver is determined according to flow attributes.
3183  *
3184  * @param[in] dev
3185  *   Pointer to the dev structure.
3186  * @param[in] attr
3187  *   Pointer to the flow attributes.
3188  * @param[in] items
3189  *   Pointer to the list of items.
3190  * @param[in] actions
3191  *   Pointer to the list of actions.
3192  * @param[in] external
3193  *   This flow rule is created by request external to PMD.
3194  * @param[in] hairpin
3195  *   Number of hairpin TX actions, 0 means classic flow.
3196  * @param[out] error
3197  *   Pointer to the error structure.
3198  *
3199  * @return
3200  *   0 on success, a negative errno value otherwise and rte_errno is set.
3201  */
3202 static inline int
3203 flow_drv_validate(struct rte_eth_dev *dev,
3204                   const struct rte_flow_attr *attr,
3205                   const struct rte_flow_item items[],
3206                   const struct rte_flow_action actions[],
3207                   bool external, int hairpin, struct rte_flow_error *error)
3208 {
3209         const struct mlx5_flow_driver_ops *fops;
3210         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
3211
3212         fops = flow_get_drv_ops(type);
3213         return fops->validate(dev, attr, items, actions, external,
3214                               hairpin, error);
3215 }
3216
3217 /**
3218  * Flow driver preparation API. This abstracts calling driver specific
3219  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3220  * calculates the size of memory required for device flow, allocates the memory,
3221  * initializes the device flow and returns the pointer.
3222  *
3223  * @note
3224  *   This function initializes device flow structure such as dv or verbs in
3225  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
3226  *   rest. For example, adding returning device flow to flow->dev_flow list and
3227  *   setting backward reference to the flow should be done out of this function.
3228  *   layers field is not filled either.
3229  *
3230  * @param[in] dev
3231  *   Pointer to the dev structure.
3232  * @param[in] attr
3233  *   Pointer to the flow attributes.
3234  * @param[in] items
3235  *   Pointer to the list of items.
3236  * @param[in] actions
3237  *   Pointer to the list of actions.
3238  * @param[in] flow_idx
3239  *   This memory pool index to the flow.
3240  * @param[out] error
3241  *   Pointer to the error structure.
3242  *
3243  * @return
3244  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
3245  */
3246 static inline struct mlx5_flow *
3247 flow_drv_prepare(struct rte_eth_dev *dev,
3248                  const struct rte_flow *flow,
3249                  const struct rte_flow_attr *attr,
3250                  const struct rte_flow_item items[],
3251                  const struct rte_flow_action actions[],
3252                  uint32_t flow_idx,
3253                  struct rte_flow_error *error)
3254 {
3255         const struct mlx5_flow_driver_ops *fops;
3256         enum mlx5_flow_drv_type type = flow->drv_type;
3257         struct mlx5_flow *mlx5_flow = NULL;
3258
3259         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3260         fops = flow_get_drv_ops(type);
3261         mlx5_flow = fops->prepare(dev, attr, items, actions, error);
3262         if (mlx5_flow)
3263                 mlx5_flow->flow_idx = flow_idx;
3264         return mlx5_flow;
3265 }
3266
3267 /**
3268  * Flow driver translation API. This abstracts calling driver specific
3269  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3270  * translates a generic flow into a driver flow. flow_drv_prepare() must
3271  * precede.
3272  *
3273  * @note
3274  *   dev_flow->layers could be filled as a result of parsing during translation
3275  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
3276  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
3277  *   flow->actions could be overwritten even though all the expanded dev_flows
3278  *   have the same actions.
3279  *
3280  * @param[in] dev
3281  *   Pointer to the rte dev structure.
3282  * @param[in, out] dev_flow
3283  *   Pointer to the mlx5 flow.
3284  * @param[in] attr
3285  *   Pointer to the flow attributes.
3286  * @param[in] items
3287  *   Pointer to the list of items.
3288  * @param[in] actions
3289  *   Pointer to the list of actions.
3290  * @param[out] error
3291  *   Pointer to the error structure.
3292  *
3293  * @return
3294  *   0 on success, a negative errno value otherwise and rte_errno is set.
3295  */
3296 static inline int
3297 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
3298                    const struct rte_flow_attr *attr,
3299                    const struct rte_flow_item items[],
3300                    const struct rte_flow_action actions[],
3301                    struct rte_flow_error *error)
3302 {
3303         const struct mlx5_flow_driver_ops *fops;
3304         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
3305
3306         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3307         fops = flow_get_drv_ops(type);
3308         return fops->translate(dev, dev_flow, attr, items, actions, error);
3309 }
3310
3311 /**
3312  * Flow driver apply API. This abstracts calling driver specific functions.
3313  * Parent flow (rte_flow) should have driver type (drv_type). It applies
3314  * translated driver flows on to device. flow_drv_translate() must precede.
3315  *
3316  * @param[in] dev
3317  *   Pointer to Ethernet device structure.
3318  * @param[in, out] flow
3319  *   Pointer to flow structure.
3320  * @param[out] error
3321  *   Pointer to error structure.
3322  *
3323  * @return
3324  *   0 on success, a negative errno value otherwise and rte_errno is set.
3325  */
3326 static inline int
3327 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
3328                struct rte_flow_error *error)
3329 {
3330         const struct mlx5_flow_driver_ops *fops;
3331         enum mlx5_flow_drv_type type = flow->drv_type;
3332
3333         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3334         fops = flow_get_drv_ops(type);
3335         return fops->apply(dev, flow, error);
3336 }
3337
3338 /**
3339  * Flow driver destroy API. This abstracts calling driver specific functions.
3340  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
3341  * on device and releases resources of the flow.
3342  *
3343  * @param[in] dev
3344  *   Pointer to Ethernet device.
3345  * @param[in, out] flow
3346  *   Pointer to flow structure.
3347  */
3348 static inline void
3349 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
3350 {
3351         const struct mlx5_flow_driver_ops *fops;
3352         enum mlx5_flow_drv_type type = flow->drv_type;
3353
3354         flow_mreg_split_qrss_release(dev, flow);
3355         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3356         fops = flow_get_drv_ops(type);
3357         fops->destroy(dev, flow);
3358 }
3359
3360 /**
3361  * Get RSS action from the action list.
3362  *
3363  * @param[in] actions
3364  *   Pointer to the list of actions.
3365  *
3366  * @return
3367  *   Pointer to the RSS action if exist, else return NULL.
3368  */
3369 static const struct rte_flow_action_rss*
3370 flow_get_rss_action(const struct rte_flow_action actions[])
3371 {
3372         const struct rte_flow_action_rss *rss = NULL;
3373
3374         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3375                 switch (actions->type) {
3376                 case RTE_FLOW_ACTION_TYPE_RSS:
3377                         rss = actions->conf;
3378                         break;
3379                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
3380                 {
3381                         const struct rte_flow_action_sample *sample =
3382                                                                 actions->conf;
3383                         const struct rte_flow_action *act = sample->actions;
3384                         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++)
3385                                 if (act->type == RTE_FLOW_ACTION_TYPE_RSS)
3386                                         rss = act->conf;
3387                         break;
3388                 }
3389                 default:
3390                         break;
3391                 }
3392         }
3393         return rss;
3394 }
3395
3396 /**
3397  * Get ASO age action by index.
3398  *
3399  * @param[in] dev
3400  *   Pointer to the Ethernet device structure.
3401  * @param[in] age_idx
3402  *   Index to the ASO age action.
3403  *
3404  * @return
3405  *   The specified ASO age action.
3406  */
3407 struct mlx5_aso_age_action*
3408 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx)
3409 {
3410         uint16_t pool_idx = age_idx & UINT16_MAX;
3411         uint16_t offset = (age_idx >> 16) & UINT16_MAX;
3412         struct mlx5_priv *priv = dev->data->dev_private;
3413         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
3414         struct mlx5_aso_age_pool *pool = mng->pools[pool_idx];
3415
3416         return &pool->actions[offset - 1];
3417 }
3418
3419 /* maps shared action to translated non shared in some actions array */
3420 struct mlx5_translated_shared_action {
3421         struct rte_flow_shared_action *action; /**< Shared action */
3422         int index; /**< Index in related array of rte_flow_action */
3423 };
3424
3425 /**
3426  * Translates actions of type RTE_FLOW_ACTION_TYPE_SHARED to related
3427  * non shared action if translation possible.
3428  * This functionality used to run same execution path for both shared & non
3429  * shared actions on flow create. All necessary preparations for shared
3430  * action handling should be preformed on *shared* actions list returned
3431  * from this call.
3432  *
3433  * @param[in] dev
3434  *   Pointer to Ethernet device.
3435  * @param[in] actions
3436  *   List of actions to translate.
3437  * @param[out] shared
3438  *   List to store translated shared actions.
3439  * @param[in, out] shared_n
3440  *   Size of *shared* array. On return should be updated with number of shared
3441  *   actions retrieved from the *actions* list.
3442  * @param[out] translated_actions
3443  *   List of actions where all shared actions were translated to non shared
3444  *   if possible. NULL if no translation took place.
3445  * @param[out] error
3446  *   Pointer to the error structure.
3447  *
3448  * @return
3449  *   0 on success, a negative errno value otherwise and rte_errno is set.
3450  */
3451 static int
3452 flow_shared_actions_translate(struct rte_eth_dev *dev,
3453                               const struct rte_flow_action actions[],
3454                               struct mlx5_translated_shared_action *shared,
3455                               int *shared_n,
3456                               struct rte_flow_action **translated_actions,
3457                               struct rte_flow_error *error)
3458 {
3459         struct mlx5_priv *priv = dev->data->dev_private;
3460         struct rte_flow_action *translated = NULL;
3461         size_t actions_size;
3462         int n;
3463         int copied_n = 0;
3464         struct mlx5_translated_shared_action *shared_end = NULL;
3465
3466         for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
3467                 if (actions[n].type != RTE_FLOW_ACTION_TYPE_SHARED)
3468                         continue;
3469                 if (copied_n == *shared_n) {
3470                         return rte_flow_error_set
3471                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
3472                                  NULL, "too many shared actions");
3473                 }
3474                 rte_memcpy(&shared[copied_n].action, &actions[n].conf,
3475                            sizeof(actions[n].conf));
3476                 shared[copied_n].index = n;
3477                 copied_n++;
3478         }
3479         n++;
3480         *shared_n = copied_n;
3481         if (!copied_n)
3482                 return 0;
3483         actions_size = sizeof(struct rte_flow_action) * n;
3484         translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY);
3485         if (!translated) {
3486                 rte_errno = ENOMEM;
3487                 return -ENOMEM;
3488         }
3489         memcpy(translated, actions, actions_size);
3490         for (shared_end = shared + copied_n; shared < shared_end; shared++) {
3491                 struct mlx5_shared_action_rss *shared_rss;
3492                 uint32_t act_idx = (uint32_t)(uintptr_t)shared->action;
3493                 uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
3494                 uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET)
3495                                                                            - 1);
3496
3497                 switch (type) {
3498                 case MLX5_SHARED_ACTION_TYPE_RSS:
3499                         shared_rss = mlx5_ipool_get
3500                           (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
3501                         translated[shared->index].type =
3502                                 RTE_FLOW_ACTION_TYPE_RSS;
3503                         translated[shared->index].conf =
3504                                 &shared_rss->origin;
3505                         break;
3506                 case MLX5_SHARED_ACTION_TYPE_AGE:
3507                         if (priv->sh->flow_hit_aso_en) {
3508                                 translated[shared->index].type =
3509                                         (enum rte_flow_action_type)
3510                                         MLX5_RTE_FLOW_ACTION_TYPE_AGE;
3511                                 translated[shared->index].conf =
3512                                                          (void *)(uintptr_t)idx;
3513                                 break;
3514                         }
3515                         /* Fall-through */
3516                 default:
3517                         mlx5_free(translated);
3518                         return rte_flow_error_set
3519                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
3520                                  NULL, "invalid shared action type");
3521                 }
3522         }
3523         *translated_actions = translated;
3524         return 0;
3525 }
3526
3527 /**
3528  * Get Shared RSS action from the action list.
3529  *
3530  * @param[in] dev
3531  *   Pointer to Ethernet device.
3532  * @param[in] shared
3533  *   Pointer to the list of actions.
3534  * @param[in] shared_n
3535  *   Actions list length.
3536  *
3537  * @return
3538  *   The MLX5 RSS action ID if exists, otherwise return 0.
3539  */
3540 static uint32_t
3541 flow_get_shared_rss_action(struct rte_eth_dev *dev,
3542                            struct mlx5_translated_shared_action *shared,
3543                            int shared_n)
3544 {
3545         struct mlx5_translated_shared_action *shared_end;
3546         struct mlx5_priv *priv = dev->data->dev_private;
3547         struct mlx5_shared_action_rss *shared_rss;
3548
3549
3550         for (shared_end = shared + shared_n; shared < shared_end; shared++) {
3551                 uint32_t act_idx = (uint32_t)(uintptr_t)shared->action;
3552                 uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
3553                 uint32_t idx = act_idx &
3554                                    ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1);
3555                 switch (type) {
3556                 case MLX5_SHARED_ACTION_TYPE_RSS:
3557                         shared_rss = mlx5_ipool_get
3558                                 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
3559                                                                            idx);
3560                         __atomic_add_fetch(&shared_rss->refcnt, 1,
3561                                            __ATOMIC_RELAXED);
3562                         return idx;
3563                 default:
3564                         break;
3565                 }
3566         }
3567         return 0;
3568 }
3569
3570 static unsigned int
3571 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
3572 {
3573         const struct rte_flow_item *item;
3574         unsigned int has_vlan = 0;
3575
3576         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
3577                 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
3578                         has_vlan = 1;
3579                         break;
3580                 }
3581         }
3582         if (has_vlan)
3583                 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
3584                                        MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
3585         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
3586                                MLX5_EXPANSION_ROOT_OUTER;
3587 }
3588
3589 /**
3590  *  Get layer flags from the prefix flow.
3591  *
3592  *  Some flows may be split to several subflows, the prefix subflow gets the
3593  *  match items and the suffix sub flow gets the actions.
3594  *  Some actions need the user defined match item flags to get the detail for
3595  *  the action.
3596  *  This function helps the suffix flow to get the item layer flags from prefix
3597  *  subflow.
3598  *
3599  * @param[in] dev_flow
3600  *   Pointer the created preifx subflow.
3601  *
3602  * @return
3603  *   The layers get from prefix subflow.
3604  */
3605 static inline uint64_t
3606 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
3607 {
3608         uint64_t layers = 0;
3609
3610         /*
3611          * Layers bits could be localization, but usually the compiler will
3612          * help to do the optimization work for source code.
3613          * If no decap actions, use the layers directly.
3614          */
3615         if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP))
3616                 return dev_flow->handle->layers;
3617         /* Convert L3 layers with decap action. */
3618         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
3619                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3620         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
3621                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3622         /* Convert L4 layers with decap action.  */
3623         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
3624                 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
3625         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
3626                 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
3627         return layers;
3628 }
3629
3630 /**
3631  * Get metadata split action information.
3632  *
3633  * @param[in] actions
3634  *   Pointer to the list of actions.
3635  * @param[out] qrss
3636  *   Pointer to the return pointer.
3637  * @param[out] qrss_type
3638  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
3639  *   if no QUEUE/RSS is found.
3640  * @param[out] encap_idx
3641  *   Pointer to the index of the encap action if exists, otherwise the last
3642  *   action index.
3643  *
3644  * @return
3645  *   Total number of actions.
3646  */
3647 static int
3648 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
3649                                        const struct rte_flow_action **qrss,
3650                                        int *encap_idx)
3651 {
3652         const struct rte_flow_action_raw_encap *raw_encap;
3653         int actions_n = 0;
3654         int raw_decap_idx = -1;
3655
3656         *encap_idx = -1;
3657         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3658                 switch (actions->type) {
3659                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3660                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3661                         *encap_idx = actions_n;
3662                         break;
3663                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3664                         raw_decap_idx = actions_n;
3665                         break;
3666                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3667                         raw_encap = actions->conf;
3668                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3669                                 *encap_idx = raw_decap_idx != -1 ?
3670                                                       raw_decap_idx : actions_n;
3671                         break;
3672                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3673                 case RTE_FLOW_ACTION_TYPE_RSS:
3674                         *qrss = actions;
3675                         break;
3676                 default:
3677                         break;
3678                 }
3679                 actions_n++;
3680         }
3681         if (*encap_idx == -1)
3682                 *encap_idx = actions_n;
3683         /* Count RTE_FLOW_ACTION_TYPE_END. */
3684         return actions_n + 1;
3685 }
3686
3687 /**
3688  * Check meter action from the action list.
3689  *
3690  * @param[in] actions
3691  *   Pointer to the list of actions.
3692  * @param[out] mtr
3693  *   Pointer to the meter exist flag.
3694  *
3695  * @return
3696  *   Total number of actions.
3697  */
3698 static int
3699 flow_check_meter_action(const struct rte_flow_action actions[], uint32_t *mtr)
3700 {
3701         int actions_n = 0;
3702
3703         MLX5_ASSERT(mtr);
3704         *mtr = 0;
3705         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3706                 switch (actions->type) {
3707                 case RTE_FLOW_ACTION_TYPE_METER:
3708                         *mtr = 1;
3709                         break;
3710                 default:
3711                         break;
3712                 }
3713                 actions_n++;
3714         }
3715         /* Count RTE_FLOW_ACTION_TYPE_END. */
3716         return actions_n + 1;
3717 }
3718
3719 /**
3720  * Check if the flow should be split due to hairpin.
3721  * The reason for the split is that in current HW we can't
3722  * support encap and push-vlan on Rx, so if a flow contains
3723  * these actions we move it to Tx.
3724  *
3725  * @param dev
3726  *   Pointer to Ethernet device.
3727  * @param[in] attr
3728  *   Flow rule attributes.
3729  * @param[in] actions
3730  *   Associated actions (list terminated by the END action).
3731  *
3732  * @return
3733  *   > 0 the number of actions and the flow should be split,
3734  *   0 when no split required.
3735  */
3736 static int
3737 flow_check_hairpin_split(struct rte_eth_dev *dev,
3738                          const struct rte_flow_attr *attr,
3739                          const struct rte_flow_action actions[])
3740 {
3741         int queue_action = 0;
3742         int action_n = 0;
3743         int split = 0;
3744         const struct rte_flow_action_queue *queue;
3745         const struct rte_flow_action_rss *rss;
3746         const struct rte_flow_action_raw_encap *raw_encap;
3747         const struct rte_eth_hairpin_conf *conf;
3748
3749         if (!attr->ingress)
3750                 return 0;
3751         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3752                 switch (actions->type) {
3753                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3754                         queue = actions->conf;
3755                         if (queue == NULL)
3756                                 return 0;
3757                         conf = mlx5_rxq_get_hairpin_conf(dev, queue->index);
3758                         if (conf == NULL || conf->tx_explicit != 0)
3759                                 return 0;
3760                         queue_action = 1;
3761                         action_n++;
3762                         break;
3763                 case RTE_FLOW_ACTION_TYPE_RSS:
3764                         rss = actions->conf;
3765                         if (rss == NULL || rss->queue_num == 0)
3766                                 return 0;
3767                         conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]);
3768                         if (conf == NULL || conf->tx_explicit != 0)
3769                                 return 0;
3770                         queue_action = 1;
3771                         action_n++;
3772                         break;
3773                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3774                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3775                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3776                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3777                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
3778                         split++;
3779                         action_n++;
3780                         break;
3781                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3782                         raw_encap = actions->conf;
3783                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3784                                 split++;
3785                         action_n++;
3786                         break;
3787                 default:
3788                         action_n++;
3789                         break;
3790                 }
3791         }
3792         if (split && queue_action)
3793                 return action_n;
3794         return 0;
3795 }
3796
3797 /* Declare flow create/destroy prototype in advance. */
3798 static uint32_t
3799 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
3800                  const struct rte_flow_attr *attr,
3801                  const struct rte_flow_item items[],
3802                  const struct rte_flow_action actions[],
3803                  bool external, struct rte_flow_error *error);
3804
3805 static void
3806 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
3807                   uint32_t flow_idx);
3808
3809 int
3810 flow_dv_mreg_match_cb(struct mlx5_hlist *list __rte_unused,
3811                       struct mlx5_hlist_entry *entry,
3812                       uint64_t key, void *cb_ctx __rte_unused)
3813 {
3814         struct mlx5_flow_mreg_copy_resource *mcp_res =
3815                 container_of(entry, typeof(*mcp_res), hlist_ent);
3816
3817         return mcp_res->mark_id != key;
3818 }
3819
3820 struct mlx5_hlist_entry *
3821 flow_dv_mreg_create_cb(struct mlx5_hlist *list, uint64_t key,
3822                        void *cb_ctx)
3823 {
3824         struct rte_eth_dev *dev = list->ctx;
3825         struct mlx5_priv *priv = dev->data->dev_private;
3826         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3827         struct mlx5_flow_mreg_copy_resource *mcp_res;
3828         struct rte_flow_error *error = ctx->error;
3829         uint32_t idx = 0;
3830         int ret;
3831         uint32_t mark_id = key;
3832         struct rte_flow_attr attr = {
3833                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
3834                 .ingress = 1,
3835         };
3836         struct mlx5_rte_flow_item_tag tag_spec = {
3837                 .data = mark_id,
3838         };
3839         struct rte_flow_item items[] = {
3840                 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
3841         };
3842         struct rte_flow_action_mark ftag = {
3843                 .id = mark_id,
3844         };
3845         struct mlx5_flow_action_copy_mreg cp_mreg = {
3846                 .dst = REG_B,
3847                 .src = REG_NON,
3848         };
3849         struct rte_flow_action_jump jump = {
3850                 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
3851         };
3852         struct rte_flow_action actions[] = {
3853                 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
3854         };
3855
3856         /* Fill the register fileds in the flow. */
3857         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3858         if (ret < 0)
3859                 return NULL;
3860         tag_spec.id = ret;
3861         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
3862         if (ret < 0)
3863                 return NULL;
3864         cp_mreg.src = ret;
3865         /* Provide the full width of FLAG specific value. */
3866         if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
3867                 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
3868         /* Build a new flow. */
3869         if (mark_id != MLX5_DEFAULT_COPY_ID) {
3870                 items[0] = (struct rte_flow_item){
3871                         .type = (enum rte_flow_item_type)
3872                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
3873                         .spec = &tag_spec,
3874                 };
3875                 items[1] = (struct rte_flow_item){
3876                         .type = RTE_FLOW_ITEM_TYPE_END,
3877                 };
3878                 actions[0] = (struct rte_flow_action){
3879                         .type = (enum rte_flow_action_type)
3880                                 MLX5_RTE_FLOW_ACTION_TYPE_MARK,
3881                         .conf = &ftag,
3882                 };
3883                 actions[1] = (struct rte_flow_action){
3884                         .type = (enum rte_flow_action_type)
3885                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3886                         .conf = &cp_mreg,
3887                 };
3888                 actions[2] = (struct rte_flow_action){
3889                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
3890                         .conf = &jump,
3891                 };
3892                 actions[3] = (struct rte_flow_action){
3893                         .type = RTE_FLOW_ACTION_TYPE_END,
3894                 };
3895         } else {
3896                 /* Default rule, wildcard match. */
3897                 attr.priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR;
3898                 items[0] = (struct rte_flow_item){
3899                         .type = RTE_FLOW_ITEM_TYPE_END,
3900                 };
3901                 actions[0] = (struct rte_flow_action){
3902                         .type = (enum rte_flow_action_type)
3903                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3904                         .conf = &cp_mreg,
3905                 };
3906                 actions[1] = (struct rte_flow_action){
3907                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
3908                         .conf = &jump,
3909                 };
3910                 actions[2] = (struct rte_flow_action){
3911                         .type = RTE_FLOW_ACTION_TYPE_END,
3912                 };
3913         }
3914         /* Build a new entry. */
3915         mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
3916         if (!mcp_res) {
3917                 rte_errno = ENOMEM;
3918                 return NULL;
3919         }
3920         mcp_res->idx = idx;
3921         mcp_res->mark_id = mark_id;
3922         /*
3923          * The copy Flows are not included in any list. There
3924          * ones are referenced from other Flows and can not
3925          * be applied, removed, deleted in ardbitrary order
3926          * by list traversing.
3927          */
3928         mcp_res->rix_flow = flow_list_create(dev, NULL, &attr, items,
3929                                          actions, false, error);
3930         if (!mcp_res->rix_flow) {
3931                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx);
3932                 return NULL;
3933         }
3934         return &mcp_res->hlist_ent;
3935 }
3936
3937 /**
3938  * Add a flow of copying flow metadata registers in RX_CP_TBL.
3939  *
3940  * As mark_id is unique, if there's already a registered flow for the mark_id,
3941  * return by increasing the reference counter of the resource. Otherwise, create
3942  * the resource (mcp_res) and flow.
3943  *
3944  * Flow looks like,
3945  *   - If ingress port is ANY and reg_c[1] is mark_id,
3946  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3947  *
3948  * For default flow (zero mark_id), flow is like,
3949  *   - If ingress port is ANY,
3950  *     reg_b := reg_c[0] and jump to RX_ACT_TBL.
3951  *
3952  * @param dev
3953  *   Pointer to Ethernet device.
3954  * @param mark_id
3955  *   ID of MARK action, zero means default flow for META.
3956  * @param[out] error
3957  *   Perform verbose error reporting if not NULL.
3958  *
3959  * @return
3960  *   Associated resource on success, NULL otherwise and rte_errno is set.
3961  */
3962 static struct mlx5_flow_mreg_copy_resource *
3963 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
3964                           struct rte_flow_error *error)
3965 {
3966         struct mlx5_priv *priv = dev->data->dev_private;
3967         struct mlx5_hlist_entry *entry;
3968         struct mlx5_flow_cb_ctx ctx = {
3969                 .dev = dev,
3970                 .error = error,
3971         };
3972
3973         /* Check if already registered. */
3974         MLX5_ASSERT(priv->mreg_cp_tbl);
3975         entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx);
3976         if (!entry)
3977                 return NULL;
3978         return container_of(entry, struct mlx5_flow_mreg_copy_resource,
3979                             hlist_ent);
3980 }
3981
3982 void
3983 flow_dv_mreg_remove_cb(struct mlx5_hlist *list, struct mlx5_hlist_entry *entry)
3984 {
3985         struct mlx5_flow_mreg_copy_resource *mcp_res =
3986                 container_of(entry, typeof(*mcp_res), hlist_ent);
3987         struct rte_eth_dev *dev = list->ctx;
3988         struct mlx5_priv *priv = dev->data->dev_private;
3989
3990         MLX5_ASSERT(mcp_res->rix_flow);
3991         flow_list_destroy(dev, NULL, mcp_res->rix_flow);
3992         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
3993 }
3994
3995 /**
3996  * Release flow in RX_CP_TBL.
3997  *
3998  * @param dev
3999  *   Pointer to Ethernet device.
4000  * @flow
4001  *   Parent flow for wich copying is provided.
4002  */
4003 static void
4004 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
4005                           struct rte_flow *flow)
4006 {
4007         struct mlx5_flow_mreg_copy_resource *mcp_res;
4008         struct mlx5_priv *priv = dev->data->dev_private;
4009
4010         if (!flow->rix_mreg_copy)
4011                 return;
4012         mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
4013                                  flow->rix_mreg_copy);
4014         if (!mcp_res || !priv->mreg_cp_tbl)
4015                 return;
4016         MLX5_ASSERT(mcp_res->rix_flow);
4017         mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
4018         flow->rix_mreg_copy = 0;
4019 }
4020
4021 /**
4022  * Remove the default copy action from RX_CP_TBL.
4023  *
4024  * This functions is called in the mlx5_dev_start(). No thread safe
4025  * is guaranteed.
4026  *
4027  * @param dev
4028  *   Pointer to Ethernet device.
4029  */
4030 static void
4031 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
4032 {
4033         struct mlx5_hlist_entry *entry;
4034         struct mlx5_priv *priv = dev->data->dev_private;
4035
4036         /* Check if default flow is registered. */
4037         if (!priv->mreg_cp_tbl)
4038                 return;
4039         entry = mlx5_hlist_lookup(priv->mreg_cp_tbl,
4040                                   MLX5_DEFAULT_COPY_ID, NULL);
4041         if (!entry)
4042                 return;
4043         mlx5_hlist_unregister(priv->mreg_cp_tbl, entry);
4044 }
4045
4046 /**
4047  * Add the default copy action in in RX_CP_TBL.
4048  *
4049  * This functions is called in the mlx5_dev_start(). No thread safe
4050  * is guaranteed.
4051  *
4052  * @param dev
4053  *   Pointer to Ethernet device.
4054  * @param[out] error
4055  *   Perform verbose error reporting if not NULL.
4056  *
4057  * @return
4058  *   0 for success, negative value otherwise and rte_errno is set.
4059  */
4060 static int
4061 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
4062                                   struct rte_flow_error *error)
4063 {
4064         struct mlx5_priv *priv = dev->data->dev_private;
4065         struct mlx5_flow_mreg_copy_resource *mcp_res;
4066
4067         /* Check whether extensive metadata feature is engaged. */
4068         if (!priv->config.dv_flow_en ||
4069             priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4070             !mlx5_flow_ext_mreg_supported(dev) ||
4071             !priv->sh->dv_regc0_mask)
4072                 return 0;
4073         /*
4074          * Add default mreg copy flow may be called multiple time, but
4075          * only be called once in stop. Avoid register it twice.
4076          */
4077         if (mlx5_hlist_lookup(priv->mreg_cp_tbl, MLX5_DEFAULT_COPY_ID, NULL))
4078                 return 0;
4079         mcp_res = flow_mreg_add_copy_action(dev, MLX5_DEFAULT_COPY_ID, error);
4080         if (!mcp_res)
4081                 return -rte_errno;
4082         return 0;
4083 }
4084
4085 /**
4086  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4087  *
4088  * All the flow having Q/RSS action should be split by
4089  * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
4090  * performs the following,
4091  *   - CQE->flow_tag := reg_c[1] (MARK)
4092  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4093  * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
4094  * but there should be a flow per each MARK ID set by MARK action.
4095  *
4096  * For the aforementioned reason, if there's a MARK action in flow's action
4097  * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
4098  * the MARK ID to CQE's flow_tag like,
4099  *   - If reg_c[1] is mark_id,
4100  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4101  *
4102  * For SET_META action which stores value in reg_c[0], as the destination is
4103  * also a flow metadata register (reg_b), adding a default flow is enough. Zero
4104  * MARK ID means the default flow. The default flow looks like,
4105  *   - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4106  *
4107  * @param dev
4108  *   Pointer to Ethernet device.
4109  * @param flow
4110  *   Pointer to flow structure.
4111  * @param[in] actions
4112  *   Pointer to the list of actions.
4113  * @param[out] error
4114  *   Perform verbose error reporting if not NULL.
4115  *
4116  * @return
4117  *   0 on success, negative value otherwise and rte_errno is set.
4118  */
4119 static int
4120 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
4121                             struct rte_flow *flow,
4122                             const struct rte_flow_action *actions,
4123                             struct rte_flow_error *error)
4124 {
4125         struct mlx5_priv *priv = dev->data->dev_private;
4126         struct mlx5_dev_config *config = &priv->config;
4127         struct mlx5_flow_mreg_copy_resource *mcp_res;
4128         const struct rte_flow_action_mark *mark;
4129
4130         /* Check whether extensive metadata feature is engaged. */
4131         if (!config->dv_flow_en ||
4132             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4133             !mlx5_flow_ext_mreg_supported(dev) ||
4134             !priv->sh->dv_regc0_mask)
4135                 return 0;
4136         /* Find MARK action. */
4137         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4138                 switch (actions->type) {
4139                 case RTE_FLOW_ACTION_TYPE_FLAG:
4140                         mcp_res = flow_mreg_add_copy_action
4141                                 (dev, MLX5_FLOW_MARK_DEFAULT, error);
4142                         if (!mcp_res)
4143                                 return -rte_errno;
4144                         flow->rix_mreg_copy = mcp_res->idx;
4145                         return 0;
4146                 case RTE_FLOW_ACTION_TYPE_MARK:
4147                         mark = (const struct rte_flow_action_mark *)
4148                                 actions->conf;
4149                         mcp_res =
4150                                 flow_mreg_add_copy_action(dev, mark->id, error);
4151                         if (!mcp_res)
4152                                 return -rte_errno;
4153                         flow->rix_mreg_copy = mcp_res->idx;
4154                         return 0;
4155                 default:
4156                         break;
4157                 }
4158         }
4159         return 0;
4160 }
4161
4162 #define MLX5_MAX_SPLIT_ACTIONS 24
4163 #define MLX5_MAX_SPLIT_ITEMS 24
4164
4165 /**
4166  * Split the hairpin flow.
4167  * Since HW can't support encap and push-vlan on Rx, we move these
4168  * actions to Tx.
4169  * If the count action is after the encap then we also
4170  * move the count action. in this case the count will also measure
4171  * the outer bytes.
4172  *
4173  * @param dev
4174  *   Pointer to Ethernet device.
4175  * @param[in] actions
4176  *   Associated actions (list terminated by the END action).
4177  * @param[out] actions_rx
4178  *   Rx flow actions.
4179  * @param[out] actions_tx
4180  *   Tx flow actions..
4181  * @param[out] pattern_tx
4182  *   The pattern items for the Tx flow.
4183  * @param[out] flow_id
4184  *   The flow ID connected to this flow.
4185  *
4186  * @return
4187  *   0 on success.
4188  */
4189 static int
4190 flow_hairpin_split(struct rte_eth_dev *dev,
4191                    const struct rte_flow_action actions[],
4192                    struct rte_flow_action actions_rx[],
4193                    struct rte_flow_action actions_tx[],
4194                    struct rte_flow_item pattern_tx[],
4195                    uint32_t flow_id)
4196 {
4197         const struct rte_flow_action_raw_encap *raw_encap;
4198         const struct rte_flow_action_raw_decap *raw_decap;
4199         struct mlx5_rte_flow_action_set_tag *set_tag;
4200         struct rte_flow_action *tag_action;
4201         struct mlx5_rte_flow_item_tag *tag_item;
4202         struct rte_flow_item *item;
4203         char *addr;
4204         int encap = 0;
4205
4206         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4207                 switch (actions->type) {
4208                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4209                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4210                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4211                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4212                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4213                         rte_memcpy(actions_tx, actions,
4214                                sizeof(struct rte_flow_action));
4215                         actions_tx++;
4216                         break;
4217                 case RTE_FLOW_ACTION_TYPE_COUNT:
4218                         if (encap) {
4219                                 rte_memcpy(actions_tx, actions,
4220                                            sizeof(struct rte_flow_action));
4221                                 actions_tx++;
4222                         } else {
4223                                 rte_memcpy(actions_rx, actions,
4224                                            sizeof(struct rte_flow_action));
4225                                 actions_rx++;
4226                         }
4227                         break;
4228                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4229                         raw_encap = actions->conf;
4230                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
4231                                 memcpy(actions_tx, actions,
4232                                        sizeof(struct rte_flow_action));
4233                                 actions_tx++;
4234                                 encap = 1;
4235                         } else {
4236                                 rte_memcpy(actions_rx, actions,
4237                                            sizeof(struct rte_flow_action));
4238                                 actions_rx++;
4239                         }
4240                         break;
4241                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4242                         raw_decap = actions->conf;
4243                         if (raw_decap->size < MLX5_ENCAPSULATION_DECISION_SIZE) {
4244                                 memcpy(actions_tx, actions,
4245                                        sizeof(struct rte_flow_action));
4246                                 actions_tx++;
4247                         } else {
4248                                 rte_memcpy(actions_rx, actions,
4249                                            sizeof(struct rte_flow_action));
4250                                 actions_rx++;
4251                         }
4252                         break;
4253                 default:
4254                         rte_memcpy(actions_rx, actions,
4255                                    sizeof(struct rte_flow_action));
4256                         actions_rx++;
4257                         break;
4258                 }
4259         }
4260         /* Add set meta action and end action for the Rx flow. */
4261         tag_action = actions_rx;
4262         tag_action->type = (enum rte_flow_action_type)
4263                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4264         actions_rx++;
4265         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
4266         actions_rx++;
4267         set_tag = (void *)actions_rx;
4268         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL);
4269         MLX5_ASSERT(set_tag->id > REG_NON);
4270         set_tag->data = flow_id;
4271         tag_action->conf = set_tag;
4272         /* Create Tx item list. */
4273         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
4274         addr = (void *)&pattern_tx[2];
4275         item = pattern_tx;
4276         item->type = (enum rte_flow_item_type)
4277                      MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4278         tag_item = (void *)addr;
4279         tag_item->data = flow_id;
4280         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
4281         MLX5_ASSERT(set_tag->id > REG_NON);
4282         item->spec = tag_item;
4283         addr += sizeof(struct mlx5_rte_flow_item_tag);
4284         tag_item = (void *)addr;
4285         tag_item->data = UINT32_MAX;
4286         tag_item->id = UINT16_MAX;
4287         item->mask = tag_item;
4288         item->last = NULL;
4289         item++;
4290         item->type = RTE_FLOW_ITEM_TYPE_END;
4291         return 0;
4292 }
4293
4294 /**
4295  * The last stage of splitting chain, just creates the subflow
4296  * without any modification.
4297  *
4298  * @param[in] dev
4299  *   Pointer to Ethernet device.
4300  * @param[in] flow
4301  *   Parent flow structure pointer.
4302  * @param[in, out] sub_flow
4303  *   Pointer to return the created subflow, may be NULL.
4304  * @param[in] attr
4305  *   Flow rule attributes.
4306  * @param[in] items
4307  *   Pattern specification (list terminated by the END pattern item).
4308  * @param[in] actions
4309  *   Associated actions (list terminated by the END action).
4310  * @param[in] flow_split_info
4311  *   Pointer to flow split info structure.
4312  * @param[out] error
4313  *   Perform verbose error reporting if not NULL.
4314  * @return
4315  *   0 on success, negative value otherwise
4316  */
4317 static int
4318 flow_create_split_inner(struct rte_eth_dev *dev,
4319                         struct rte_flow *flow,
4320                         struct mlx5_flow **sub_flow,
4321                         const struct rte_flow_attr *attr,
4322                         const struct rte_flow_item items[],
4323                         const struct rte_flow_action actions[],
4324                         struct mlx5_flow_split_info *flow_split_info,
4325                         struct rte_flow_error *error)
4326 {
4327         struct mlx5_flow *dev_flow;
4328
4329         dev_flow = flow_drv_prepare(dev, flow, attr, items, actions,
4330                                     flow_split_info->flow_idx, error);
4331         if (!dev_flow)
4332                 return -rte_errno;
4333         dev_flow->flow = flow;
4334         dev_flow->external = flow_split_info->external;
4335         dev_flow->skip_scale = flow_split_info->skip_scale;
4336         /* Subflow object was created, we must include one in the list. */
4337         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4338                       dev_flow->handle, next);
4339         /*
4340          * If dev_flow is as one of the suffix flow, some actions in suffix
4341          * flow may need some user defined item layer flags, and pass the
4342          * Metadate rxq mark flag to suffix flow as well.
4343          */
4344         if (flow_split_info->prefix_layers)
4345                 dev_flow->handle->layers = flow_split_info->prefix_layers;
4346         if (flow_split_info->prefix_mark)
4347                 dev_flow->handle->mark = 1;
4348         if (sub_flow)
4349                 *sub_flow = dev_flow;
4350         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
4351 }
4352
4353 /**
4354  * Split the meter flow.
4355  *
4356  * As meter flow will split to three sub flow, other than meter
4357  * action, the other actions make sense to only meter accepts
4358  * the packet. If it need to be dropped, no other additional
4359  * actions should be take.
4360  *
4361  * One kind of special action which decapsulates the L3 tunnel
4362  * header will be in the prefix sub flow, as not to take the
4363  * L3 tunnel header into account.
4364  *
4365  * @param dev
4366  *   Pointer to Ethernet device.
4367  * @param[in] items
4368  *   Pattern specification (list terminated by the END pattern item).
4369  * @param[out] sfx_items
4370  *   Suffix flow match items (list terminated by the END pattern item).
4371  * @param[in] actions
4372  *   Associated actions (list terminated by the END action).
4373  * @param[out] actions_sfx
4374  *   Suffix flow actions.
4375  * @param[out] actions_pre
4376  *   Prefix flow actions.
4377  * @param[out] pattern_sfx
4378  *   The pattern items for the suffix flow.
4379  * @param[out] tag_sfx
4380  *   Pointer to suffix flow tag.
4381  *
4382  * @return
4383  *   0 on success.
4384  */
4385 static int
4386 flow_meter_split_prep(struct rte_eth_dev *dev,
4387                  const struct rte_flow_item items[],
4388                  struct rte_flow_item sfx_items[],
4389                  const struct rte_flow_action actions[],
4390                  struct rte_flow_action actions_sfx[],
4391                  struct rte_flow_action actions_pre[])
4392 {
4393         struct mlx5_priv *priv = dev->data->dev_private;
4394         struct rte_flow_action *tag_action = NULL;
4395         struct rte_flow_item *tag_item;
4396         struct mlx5_rte_flow_action_set_tag *set_tag;
4397         struct rte_flow_error error;
4398         const struct rte_flow_action_raw_encap *raw_encap;
4399         const struct rte_flow_action_raw_decap *raw_decap;
4400         struct mlx5_rte_flow_item_tag *tag_spec;
4401         struct mlx5_rte_flow_item_tag *tag_mask;
4402         uint32_t tag_id = 0;
4403         bool copy_vlan = false;
4404
4405         /* Prepare the actions for prefix and suffix flow. */
4406         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4407                 struct rte_flow_action **action_cur = NULL;
4408
4409                 switch (actions->type) {
4410                 case RTE_FLOW_ACTION_TYPE_METER:
4411                         /* Add the extra tag action first. */
4412                         tag_action = actions_pre;
4413                         tag_action->type = (enum rte_flow_action_type)
4414                                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4415                         actions_pre++;
4416                         action_cur = &actions_pre;
4417                         break;
4418                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4419                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4420                         action_cur = &actions_pre;
4421                         break;
4422                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4423                         raw_encap = actions->conf;
4424                         if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
4425                                 action_cur = &actions_pre;
4426                         break;
4427                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4428                         raw_decap = actions->conf;
4429                         if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4430                                 action_cur = &actions_pre;
4431                         break;
4432                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4433                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4434                         copy_vlan = true;
4435                         break;
4436                 default:
4437                         break;
4438                 }
4439                 if (!action_cur)
4440                         action_cur = &actions_sfx;
4441                 memcpy(*action_cur, actions, sizeof(struct rte_flow_action));
4442                 (*action_cur)++;
4443         }
4444         /* Add end action to the actions. */
4445         actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
4446         actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
4447         actions_pre++;
4448         /* Set the tag. */
4449         set_tag = (void *)actions_pre;
4450         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
4451         mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
4452                           &tag_id);
4453         if (tag_id >= (1 << (sizeof(tag_id) * 8 - MLX5_MTR_COLOR_BITS))) {
4454                 DRV_LOG(ERR, "Port %u meter flow id exceed max limit.",
4455                         dev->data->port_id);
4456                 mlx5_ipool_free(priv->sh->ipool
4457                                 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], tag_id);
4458                 return 0;
4459         } else if (!tag_id) {
4460                 return 0;
4461         }
4462         set_tag->data = tag_id << MLX5_MTR_COLOR_BITS;
4463         assert(tag_action);
4464         tag_action->conf = set_tag;
4465         /* Prepare the suffix subflow items. */
4466         tag_item = sfx_items++;
4467         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4468                 int item_type = items->type;
4469
4470                 switch (item_type) {
4471                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4472                         memcpy(sfx_items, items, sizeof(*sfx_items));
4473                         sfx_items++;
4474                         break;
4475                 case RTE_FLOW_ITEM_TYPE_VLAN:
4476                         if (copy_vlan) {
4477                                 memcpy(sfx_items, items, sizeof(*sfx_items));
4478                                 /*
4479                                  * Convert to internal match item, it is used
4480                                  * for vlan push and set vid.
4481                                  */
4482                                 sfx_items->type = (enum rte_flow_item_type)
4483                                                   MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
4484                                 sfx_items++;
4485                         }
4486                         break;
4487                 default:
4488                         break;
4489                 }
4490         }
4491         sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
4492         sfx_items++;
4493         tag_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
4494         tag_spec->data = tag_id << MLX5_MTR_COLOR_BITS;
4495         tag_spec->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
4496         tag_mask = tag_spec + 1;
4497         tag_mask->data = 0xffffff00;
4498         tag_item->type = (enum rte_flow_item_type)
4499                          MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4500         tag_item->spec = tag_spec;
4501         tag_item->last = NULL;
4502         tag_item->mask = tag_mask;
4503         return tag_id;
4504 }
4505
4506 /**
4507  * Split action list having QUEUE/RSS for metadata register copy.
4508  *
4509  * Once Q/RSS action is detected in user's action list, the flow action
4510  * should be split in order to copy metadata registers, which will happen in
4511  * RX_CP_TBL like,
4512  *   - CQE->flow_tag := reg_c[1] (MARK)
4513  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4514  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
4515  * This is because the last action of each flow must be a terminal action
4516  * (QUEUE, RSS or DROP).
4517  *
4518  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
4519  * stored and kept in the mlx5_flow structure per each sub_flow.
4520  *
4521  * The Q/RSS action is replaced with,
4522  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
4523  * And the following JUMP action is added at the end,
4524  *   - JUMP, to RX_CP_TBL.
4525  *
4526  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
4527  * flow_create_split_metadata() routine. The flow will look like,
4528  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
4529  *
4530  * @param dev
4531  *   Pointer to Ethernet device.
4532  * @param[out] split_actions
4533  *   Pointer to store split actions to jump to CP_TBL.
4534  * @param[in] actions
4535  *   Pointer to the list of original flow actions.
4536  * @param[in] qrss
4537  *   Pointer to the Q/RSS action.
4538  * @param[in] actions_n
4539  *   Number of original actions.
4540  * @param[out] error
4541  *   Perform verbose error reporting if not NULL.
4542  *
4543  * @return
4544  *   non-zero unique flow_id on success, otherwise 0 and
4545  *   error/rte_error are set.
4546  */
4547 static uint32_t
4548 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
4549                           struct rte_flow_action *split_actions,
4550                           const struct rte_flow_action *actions,
4551                           const struct rte_flow_action *qrss,
4552                           int actions_n, struct rte_flow_error *error)
4553 {
4554         struct mlx5_priv *priv = dev->data->dev_private;
4555         struct mlx5_rte_flow_action_set_tag *set_tag;
4556         struct rte_flow_action_jump *jump;
4557         const int qrss_idx = qrss - actions;
4558         uint32_t flow_id = 0;
4559         int ret = 0;
4560
4561         /*
4562          * Given actions will be split
4563          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
4564          * - Add jump to mreg CP_TBL.
4565          * As a result, there will be one more action.
4566          */
4567         ++actions_n;
4568         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
4569         set_tag = (void *)(split_actions + actions_n);
4570         /*
4571          * If tag action is not set to void(it means we are not the meter
4572          * suffix flow), add the tag action. Since meter suffix flow already
4573          * has the tag added.
4574          */
4575         if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) {
4576                 /*
4577                  * Allocate the new subflow ID. This one is unique within
4578                  * device and not shared with representors. Otherwise,
4579                  * we would have to resolve multi-thread access synch
4580                  * issue. Each flow on the shared device is appended
4581                  * with source vport identifier, so the resulting
4582                  * flows will be unique in the shared (by master and
4583                  * representors) domain even if they have coinciding
4584                  * IDs.
4585                  */
4586                 mlx5_ipool_malloc(priv->sh->ipool
4587                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id);
4588                 if (!flow_id)
4589                         return rte_flow_error_set(error, ENOMEM,
4590                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4591                                                   NULL, "can't allocate id "
4592                                                   "for split Q/RSS subflow");
4593                 /* Internal SET_TAG action to set flow ID. */
4594                 *set_tag = (struct mlx5_rte_flow_action_set_tag){
4595                         .data = flow_id,
4596                 };
4597                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
4598                 if (ret < 0)
4599                         return ret;
4600                 set_tag->id = ret;
4601                 /* Construct new actions array. */
4602                 /* Replace QUEUE/RSS action. */
4603                 split_actions[qrss_idx] = (struct rte_flow_action){
4604                         .type = (enum rte_flow_action_type)
4605                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
4606                         .conf = set_tag,
4607                 };
4608         }
4609         /* JUMP action to jump to mreg copy table (CP_TBL). */
4610         jump = (void *)(set_tag + 1);
4611         *jump = (struct rte_flow_action_jump){
4612                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
4613         };
4614         split_actions[actions_n - 2] = (struct rte_flow_action){
4615                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
4616                 .conf = jump,
4617         };
4618         split_actions[actions_n - 1] = (struct rte_flow_action){
4619                 .type = RTE_FLOW_ACTION_TYPE_END,
4620         };
4621         return flow_id;
4622 }
4623
4624 /**
4625  * Extend the given action list for Tx metadata copy.
4626  *
4627  * Copy the given action list to the ext_actions and add flow metadata register
4628  * copy action in order to copy reg_a set by WQE to reg_c[0].
4629  *
4630  * @param[out] ext_actions
4631  *   Pointer to the extended action list.
4632  * @param[in] actions
4633  *   Pointer to the list of actions.
4634  * @param[in] actions_n
4635  *   Number of actions in the list.
4636  * @param[out] error
4637  *   Perform verbose error reporting if not NULL.
4638  * @param[in] encap_idx
4639  *   The encap action inndex.
4640  *
4641  * @return
4642  *   0 on success, negative value otherwise
4643  */
4644 static int
4645 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
4646                        struct rte_flow_action *ext_actions,
4647                        const struct rte_flow_action *actions,
4648                        int actions_n, struct rte_flow_error *error,
4649                        int encap_idx)
4650 {
4651         struct mlx5_flow_action_copy_mreg *cp_mreg =
4652                 (struct mlx5_flow_action_copy_mreg *)
4653                         (ext_actions + actions_n + 1);
4654         int ret;
4655
4656         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
4657         if (ret < 0)
4658                 return ret;
4659         cp_mreg->dst = ret;
4660         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
4661         if (ret < 0)
4662                 return ret;
4663         cp_mreg->src = ret;
4664         if (encap_idx != 0)
4665                 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
4666         if (encap_idx == actions_n - 1) {
4667                 ext_actions[actions_n - 1] = (struct rte_flow_action){
4668                         .type = (enum rte_flow_action_type)
4669                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4670                         .conf = cp_mreg,
4671                 };
4672                 ext_actions[actions_n] = (struct rte_flow_action){
4673                         .type = RTE_FLOW_ACTION_TYPE_END,
4674                 };
4675         } else {
4676                 ext_actions[encap_idx] = (struct rte_flow_action){
4677                         .type = (enum rte_flow_action_type)
4678                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4679                         .conf = cp_mreg,
4680                 };
4681                 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
4682                                 sizeof(*ext_actions) * (actions_n - encap_idx));
4683         }
4684         return 0;
4685 }
4686
4687 /**
4688  * Check the match action from the action list.
4689  *
4690  * @param[in] actions
4691  *   Pointer to the list of actions.
4692  * @param[in] attr
4693  *   Flow rule attributes.
4694  * @param[in] action
4695  *   The action to be check if exist.
4696  * @param[out] match_action_pos
4697  *   Pointer to the position of the matched action if exists, otherwise is -1.
4698  * @param[out] qrss_action_pos
4699  *   Pointer to the position of the Queue/RSS action if exists, otherwise is -1.
4700  * @param[out] modify_after_mirror
4701  *   Pointer to the flag of modify action after FDB mirroring.
4702  *
4703  * @return
4704  *   > 0 the total number of actions.
4705  *   0 if not found match action in action list.
4706  */
4707 static int
4708 flow_check_match_action(const struct rte_flow_action actions[],
4709                         const struct rte_flow_attr *attr,
4710                         enum rte_flow_action_type action,
4711                         int *match_action_pos, int *qrss_action_pos,
4712                         int *modify_after_mirror)
4713 {
4714         const struct rte_flow_action_sample *sample;
4715         int actions_n = 0;
4716         uint32_t ratio = 0;
4717         int sub_type = 0;
4718         int flag = 0;
4719         int fdb_mirror = 0;
4720
4721         *match_action_pos = -1;
4722         *qrss_action_pos = -1;
4723         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4724                 if (actions->type == action) {
4725                         flag = 1;
4726                         *match_action_pos = actions_n;
4727                 }
4728                 switch (actions->type) {
4729                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4730                 case RTE_FLOW_ACTION_TYPE_RSS:
4731                         *qrss_action_pos = actions_n;
4732                         break;
4733                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
4734                         sample = actions->conf;
4735                         ratio = sample->ratio;
4736                         sub_type = ((const struct rte_flow_action *)
4737                                         (sample->actions))->type;
4738                         if (ratio == 1 && attr->transfer)
4739                                 fdb_mirror = 1;
4740                         break;
4741                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4742                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4743                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4744                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4745                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4746                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4747                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4748                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4749                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4750                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
4751                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4752                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4753                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4754                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4755                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
4756                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
4757                 case RTE_FLOW_ACTION_TYPE_FLAG:
4758                 case RTE_FLOW_ACTION_TYPE_MARK:
4759                 case RTE_FLOW_ACTION_TYPE_SET_META:
4760                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4761                         if (fdb_mirror)
4762                                 *modify_after_mirror = 1;
4763                         break;
4764                 default:
4765                         break;
4766                 }
4767                 actions_n++;
4768         }
4769         if (flag && fdb_mirror && !*modify_after_mirror) {
4770                 /* FDB mirroring uses the destination array to implement
4771                  * instead of FLOW_SAMPLER object.
4772                  */
4773                 if (sub_type != RTE_FLOW_ACTION_TYPE_END)
4774                         flag = 0;
4775         }
4776         /* Count RTE_FLOW_ACTION_TYPE_END. */
4777         return flag ? actions_n + 1 : 0;
4778 }
4779
4780 #define SAMPLE_SUFFIX_ITEM 2
4781
4782 /**
4783  * Split the sample flow.
4784  *
4785  * As sample flow will split to two sub flow, sample flow with
4786  * sample action, the other actions will move to new suffix flow.
4787  *
4788  * Also add unique tag id with tag action in the sample flow,
4789  * the same tag id will be as match in the suffix flow.
4790  *
4791  * @param dev
4792  *   Pointer to Ethernet device.
4793  * @param[in] add_tag
4794  *   Add extra tag action flag.
4795  * @param[out] sfx_items
4796  *   Suffix flow match items (list terminated by the END pattern item).
4797  * @param[in] actions
4798  *   Associated actions (list terminated by the END action).
4799  * @param[out] actions_sfx
4800  *   Suffix flow actions.
4801  * @param[out] actions_pre
4802  *   Prefix flow actions.
4803  * @param[in] actions_n
4804  *  The total number of actions.
4805  * @param[in] sample_action_pos
4806  *   The sample action position.
4807  * @param[in] qrss_action_pos
4808  *   The Queue/RSS action position.
4809  * @param[in] jump_table
4810  *   Add extra jump action flag.
4811  * @param[out] error
4812  *   Perform verbose error reporting if not NULL.
4813  *
4814  * @return
4815  *   0 on success, or unique flow_id, a negative errno value
4816  *   otherwise and rte_errno is set.
4817  */
4818 static int
4819 flow_sample_split_prep(struct rte_eth_dev *dev,
4820                        int add_tag,
4821                        struct rte_flow_item sfx_items[],
4822                        const struct rte_flow_action actions[],
4823                        struct rte_flow_action actions_sfx[],
4824                        struct rte_flow_action actions_pre[],
4825                        int actions_n,
4826                        int sample_action_pos,
4827                        int qrss_action_pos,
4828                        int jump_table,
4829                        struct rte_flow_error *error)
4830 {
4831         struct mlx5_priv *priv = dev->data->dev_private;
4832         struct mlx5_rte_flow_action_set_tag *set_tag;
4833         struct mlx5_rte_flow_item_tag *tag_spec;
4834         struct mlx5_rte_flow_item_tag *tag_mask;
4835         struct rte_flow_action_jump *jump_action;
4836         uint32_t tag_id = 0;
4837         int index;
4838         int append_index = 0;
4839         int ret;
4840
4841         if (sample_action_pos < 0)
4842                 return rte_flow_error_set(error, EINVAL,
4843                                           RTE_FLOW_ERROR_TYPE_ACTION,
4844                                           NULL, "invalid position of sample "
4845                                           "action in list");
4846         /* Prepare the actions for prefix and suffix flow. */
4847         if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) {
4848                 index = qrss_action_pos;
4849                 /* Put the preceding the Queue/RSS action into prefix flow. */
4850                 if (index != 0)
4851                         memcpy(actions_pre, actions,
4852                                sizeof(struct rte_flow_action) * index);
4853                 /* Put others preceding the sample action into prefix flow. */
4854                 if (sample_action_pos > index + 1)
4855                         memcpy(actions_pre + index, actions + index + 1,
4856                                sizeof(struct rte_flow_action) *
4857                                (sample_action_pos - index - 1));
4858                 index = sample_action_pos - 1;
4859                 /* Put Queue/RSS action into Suffix flow. */
4860                 memcpy(actions_sfx, actions + qrss_action_pos,
4861                        sizeof(struct rte_flow_action));
4862                 actions_sfx++;
4863         } else {
4864                 index = sample_action_pos;
4865                 if (index != 0)
4866                         memcpy(actions_pre, actions,
4867                                sizeof(struct rte_flow_action) * index);
4868         }
4869         /* For CX5, add an extra tag action for NIC-RX and E-Switch ingress.
4870          * For CX6DX and above, metadata registers Cx preserve their value,
4871          * add an extra tag action for NIC-RX and E-Switch Domain.
4872          */
4873         if (add_tag) {
4874                 /* Prepare the prefix tag action. */
4875                 append_index++;
4876                 set_tag = (void *)(actions_pre + actions_n + append_index);
4877                 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error);
4878                 if (ret < 0)
4879                         return ret;
4880                 set_tag->id = ret;
4881                 mlx5_ipool_malloc(priv->sh->ipool
4882                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id);
4883                 set_tag->data = tag_id;
4884                 /* Prepare the suffix subflow items. */
4885                 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM);
4886                 tag_spec->data = tag_id;
4887                 tag_spec->id = set_tag->id;
4888                 tag_mask = tag_spec + 1;
4889                 tag_mask->data = UINT32_MAX;
4890                 sfx_items[0] = (struct rte_flow_item){
4891                         .type = (enum rte_flow_item_type)
4892                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
4893                         .spec = tag_spec,
4894                         .last = NULL,
4895                         .mask = tag_mask,
4896                 };
4897                 sfx_items[1] = (struct rte_flow_item){
4898                         .type = (enum rte_flow_item_type)
4899                                 RTE_FLOW_ITEM_TYPE_END,
4900                 };
4901                 /* Prepare the tag action in prefix subflow. */
4902                 actions_pre[index++] =
4903                         (struct rte_flow_action){
4904                         .type = (enum rte_flow_action_type)
4905                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
4906                         .conf = set_tag,
4907                 };
4908         }
4909         memcpy(actions_pre + index, actions + sample_action_pos,
4910                sizeof(struct rte_flow_action));
4911         index += 1;
4912         /* For the modify action after the sample action in E-Switch mirroring,
4913          * Add the extra jump action in prefix subflow and jump into the next
4914          * table, then do the modify action in the new table.
4915          */
4916         if (jump_table) {
4917                 /* Prepare the prefix jump action. */
4918                 append_index++;
4919                 jump_action = (void *)(actions_pre + actions_n + append_index);
4920                 jump_action->group = jump_table;
4921                 actions_pre[index++] =
4922                         (struct rte_flow_action){
4923                         .type = (enum rte_flow_action_type)
4924                                 RTE_FLOW_ACTION_TYPE_JUMP,
4925                         .conf = jump_action,
4926                 };
4927         }
4928         actions_pre[index] = (struct rte_flow_action){
4929                 .type = (enum rte_flow_action_type)
4930                         RTE_FLOW_ACTION_TYPE_END,
4931         };
4932         /* Put the actions after sample into Suffix flow. */
4933         memcpy(actions_sfx, actions + sample_action_pos + 1,
4934                sizeof(struct rte_flow_action) *
4935                (actions_n - sample_action_pos - 1));
4936         return tag_id;
4937 }
4938
4939 /**
4940  * The splitting for metadata feature.
4941  *
4942  * - Q/RSS action on NIC Rx should be split in order to pass by
4943  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
4944  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
4945  *
4946  * - All the actions on NIC Tx should have a mreg copy action to
4947  *   copy reg_a from WQE to reg_c[0].
4948  *
4949  * @param dev
4950  *   Pointer to Ethernet device.
4951  * @param[in] flow
4952  *   Parent flow structure pointer.
4953  * @param[in] attr
4954  *   Flow rule attributes.
4955  * @param[in] items
4956  *   Pattern specification (list terminated by the END pattern item).
4957  * @param[in] actions
4958  *   Associated actions (list terminated by the END action).
4959  * @param[in] flow_split_info
4960  *   Pointer to flow split info structure.
4961  * @param[out] error
4962  *   Perform verbose error reporting if not NULL.
4963  * @return
4964  *   0 on success, negative value otherwise
4965  */
4966 static int
4967 flow_create_split_metadata(struct rte_eth_dev *dev,
4968                            struct rte_flow *flow,
4969                            const struct rte_flow_attr *attr,
4970                            const struct rte_flow_item items[],
4971                            const struct rte_flow_action actions[],
4972                            struct mlx5_flow_split_info *flow_split_info,
4973                            struct rte_flow_error *error)
4974 {
4975         struct mlx5_priv *priv = dev->data->dev_private;
4976         struct mlx5_dev_config *config = &priv->config;
4977         const struct rte_flow_action *qrss = NULL;
4978         struct rte_flow_action *ext_actions = NULL;
4979         struct mlx5_flow *dev_flow = NULL;
4980         uint32_t qrss_id = 0;
4981         int mtr_sfx = 0;
4982         size_t act_size;
4983         int actions_n;
4984         int encap_idx;
4985         int ret;
4986
4987         /* Check whether extensive metadata feature is engaged. */
4988         if (!config->dv_flow_en ||
4989             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4990             !mlx5_flow_ext_mreg_supported(dev))
4991                 return flow_create_split_inner(dev, flow, NULL, attr, items,
4992                                                actions, flow_split_info, error);
4993         actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
4994                                                            &encap_idx);
4995         if (qrss) {
4996                 /* Exclude hairpin flows from splitting. */
4997                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
4998                         const struct rte_flow_action_queue *queue;
4999
5000                         queue = qrss->conf;
5001                         if (mlx5_rxq_get_type(dev, queue->index) ==
5002                             MLX5_RXQ_TYPE_HAIRPIN)
5003                                 qrss = NULL;
5004                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
5005                         const struct rte_flow_action_rss *rss;
5006
5007                         rss = qrss->conf;
5008                         if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
5009                             MLX5_RXQ_TYPE_HAIRPIN)
5010                                 qrss = NULL;
5011                 }
5012         }
5013         if (qrss) {
5014                 /* Check if it is in meter suffix table. */
5015                 mtr_sfx = attr->group == (attr->transfer ?
5016                           (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
5017                           MLX5_FLOW_TABLE_LEVEL_SUFFIX);
5018                 /*
5019                  * Q/RSS action on NIC Rx should be split in order to pass by
5020                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
5021                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
5022                  */
5023                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5024                            sizeof(struct rte_flow_action_set_tag) +
5025                            sizeof(struct rte_flow_action_jump);
5026                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5027                                           SOCKET_ID_ANY);
5028                 if (!ext_actions)
5029                         return rte_flow_error_set(error, ENOMEM,
5030                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5031                                                   NULL, "no memory to split "
5032                                                   "metadata flow");
5033                 /*
5034                  * If we are the suffix flow of meter, tag already exist.
5035                  * Set the tag action to void.
5036                  */
5037                 if (mtr_sfx)
5038                         ext_actions[qrss - actions].type =
5039                                                 RTE_FLOW_ACTION_TYPE_VOID;
5040                 else
5041                         ext_actions[qrss - actions].type =
5042                                                 (enum rte_flow_action_type)
5043                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5044                 /*
5045                  * Create the new actions list with removed Q/RSS action
5046                  * and appended set tag and jump to register copy table
5047                  * (RX_CP_TBL). We should preallocate unique tag ID here
5048                  * in advance, because it is needed for set tag action.
5049                  */
5050                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
5051                                                     qrss, actions_n, error);
5052                 if (!mtr_sfx && !qrss_id) {
5053                         ret = -rte_errno;
5054                         goto exit;
5055                 }
5056         } else if (attr->egress && !attr->transfer) {
5057                 /*
5058                  * All the actions on NIC Tx should have a metadata register
5059                  * copy action to copy reg_a from WQE to reg_c[meta]
5060                  */
5061                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5062                            sizeof(struct mlx5_flow_action_copy_mreg);
5063                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5064                                           SOCKET_ID_ANY);
5065                 if (!ext_actions)
5066                         return rte_flow_error_set(error, ENOMEM,
5067                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5068                                                   NULL, "no memory to split "
5069                                                   "metadata flow");
5070                 /* Create the action list appended with copy register. */
5071                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
5072                                              actions_n, error, encap_idx);
5073                 if (ret < 0)
5074                         goto exit;
5075         }
5076         /* Add the unmodified original or prefix subflow. */
5077         ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
5078                                       items, ext_actions ? ext_actions :
5079                                       actions, flow_split_info, error);
5080         if (ret < 0)
5081                 goto exit;
5082         MLX5_ASSERT(dev_flow);
5083         if (qrss) {
5084                 const struct rte_flow_attr q_attr = {
5085                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5086                         .ingress = 1,
5087                 };
5088                 /* Internal PMD action to set register. */
5089                 struct mlx5_rte_flow_item_tag q_tag_spec = {
5090                         .data = qrss_id,
5091                         .id = REG_NON,
5092                 };
5093                 struct rte_flow_item q_items[] = {
5094                         {
5095                                 .type = (enum rte_flow_item_type)
5096                                         MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5097                                 .spec = &q_tag_spec,
5098                                 .last = NULL,
5099                                 .mask = NULL,
5100                         },
5101                         {
5102                                 .type = RTE_FLOW_ITEM_TYPE_END,
5103                         },
5104                 };
5105                 struct rte_flow_action q_actions[] = {
5106                         {
5107                                 .type = qrss->type,
5108                                 .conf = qrss->conf,
5109                         },
5110                         {
5111                                 .type = RTE_FLOW_ACTION_TYPE_END,
5112                         },
5113                 };
5114                 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
5115
5116                 /*
5117                  * Configure the tag item only if there is no meter subflow.
5118                  * Since tag is already marked in the meter suffix subflow
5119                  * we can just use the meter suffix items as is.
5120                  */
5121                 if (qrss_id) {
5122                         /* Not meter subflow. */
5123                         MLX5_ASSERT(!mtr_sfx);
5124                         /*
5125                          * Put unique id in prefix flow due to it is destroyed
5126                          * after suffix flow and id will be freed after there
5127                          * is no actual flows with this id and identifier
5128                          * reallocation becomes possible (for example, for
5129                          * other flows in other threads).
5130                          */
5131                         dev_flow->handle->split_flow_id = qrss_id;
5132                         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
5133                                                    error);
5134                         if (ret < 0)
5135                                 goto exit;
5136                         q_tag_spec.id = ret;
5137                 }
5138                 dev_flow = NULL;
5139                 /* Add suffix subflow to execute Q/RSS. */
5140                 flow_split_info->prefix_layers = layers;
5141                 flow_split_info->prefix_mark = 0;
5142                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5143                                               &q_attr, mtr_sfx ? items :
5144                                               q_items, q_actions,
5145                                               flow_split_info, error);
5146                 if (ret < 0)
5147                         goto exit;
5148                 /* qrss ID should be freed if failed. */
5149                 qrss_id = 0;
5150                 MLX5_ASSERT(dev_flow);
5151         }
5152
5153 exit:
5154         /*
5155          * We do not destroy the partially created sub_flows in case of error.
5156          * These ones are included into parent flow list and will be destroyed
5157          * by flow_drv_destroy.
5158          */
5159         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
5160                         qrss_id);
5161         mlx5_free(ext_actions);
5162         return ret;
5163 }
5164
5165 /**
5166  * The splitting for meter feature.
5167  *
5168  * - The meter flow will be split to two flows as prefix and
5169  *   suffix flow. The packets make sense only it pass the prefix
5170  *   meter action.
5171  *
5172  * - Reg_C_5 is used for the packet to match betweend prefix and
5173  *   suffix flow.
5174  *
5175  * @param dev
5176  *   Pointer to Ethernet device.
5177  * @param[in] flow
5178  *   Parent flow structure pointer.
5179  * @param[in] attr
5180  *   Flow rule attributes.
5181  * @param[in] items
5182  *   Pattern specification (list terminated by the END pattern item).
5183  * @param[in] actions
5184  *   Associated actions (list terminated by the END action).
5185  * @param[in] flow_split_info
5186  *   Pointer to flow split info structure.
5187  * @param[out] error
5188  *   Perform verbose error reporting if not NULL.
5189  * @return
5190  *   0 on success, negative value otherwise
5191  */
5192 static int
5193 flow_create_split_meter(struct rte_eth_dev *dev,
5194                         struct rte_flow *flow,
5195                         const struct rte_flow_attr *attr,
5196                         const struct rte_flow_item items[],
5197                         const struct rte_flow_action actions[],
5198                         struct mlx5_flow_split_info *flow_split_info,
5199                         struct rte_flow_error *error)
5200 {
5201         struct mlx5_priv *priv = dev->data->dev_private;
5202         struct rte_flow_action *sfx_actions = NULL;
5203         struct rte_flow_action *pre_actions = NULL;
5204         struct rte_flow_item *sfx_items = NULL;
5205         struct mlx5_flow *dev_flow = NULL;
5206         struct rte_flow_attr sfx_attr = *attr;
5207         uint32_t mtr = 0;
5208         uint32_t mtr_tag_id = 0;
5209         size_t act_size;
5210         size_t item_size;
5211         int actions_n = 0;
5212         int ret;
5213
5214         if (priv->mtr_en)
5215                 actions_n = flow_check_meter_action(actions, &mtr);
5216         if (mtr) {
5217                 /* The five prefix actions: meter, decap, encap, tag, end. */
5218                 act_size = sizeof(struct rte_flow_action) * (actions_n + 5) +
5219                            sizeof(struct mlx5_rte_flow_action_set_tag);
5220                 /* tag, vlan, port id, end. */
5221 #define METER_SUFFIX_ITEM 4
5222                 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
5223                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
5224                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size),
5225                                           0, SOCKET_ID_ANY);
5226                 if (!sfx_actions)
5227                         return rte_flow_error_set(error, ENOMEM,
5228                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5229                                                   NULL, "no memory to split "
5230                                                   "meter flow");
5231                 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
5232                              act_size);
5233                 pre_actions = sfx_actions + actions_n;
5234                 mtr_tag_id = flow_meter_split_prep(dev, items, sfx_items,
5235                                                    actions, sfx_actions,
5236                                                    pre_actions);
5237                 if (!mtr_tag_id) {
5238                         ret = -rte_errno;
5239                         goto exit;
5240                 }
5241                 /* Add the prefix subflow. */
5242                 flow_split_info->prefix_mark = 0;
5243                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5244                                               attr, items, pre_actions,
5245                                               flow_split_info, error);
5246                 if (ret) {
5247                         ret = -rte_errno;
5248                         goto exit;
5249                 }
5250                 dev_flow->handle->split_flow_id = mtr_tag_id;
5251                 /* Setting the sfx group atrr. */
5252                 sfx_attr.group = sfx_attr.transfer ?
5253                                 (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
5254                                  MLX5_FLOW_TABLE_LEVEL_SUFFIX;
5255                 flow_split_info->prefix_layers =
5256                                 flow_get_prefix_layer_flags(dev_flow);
5257                 flow_split_info->prefix_mark = dev_flow->handle->mark;
5258         }
5259         /* Add the prefix subflow. */
5260         ret = flow_create_split_metadata(dev, flow,
5261                                          &sfx_attr, sfx_items ?
5262                                          sfx_items : items,
5263                                          sfx_actions ? sfx_actions : actions,
5264                                          flow_split_info, error);
5265 exit:
5266         if (sfx_actions)
5267                 mlx5_free(sfx_actions);
5268         return ret;
5269 }
5270
5271 /**
5272  * The splitting for sample feature.
5273  *
5274  * Once Sample action is detected in the action list, the flow actions should
5275  * be split into prefix sub flow and suffix sub flow.
5276  *
5277  * The original items remain in the prefix sub flow, all actions preceding the
5278  * sample action and the sample action itself will be copied to the prefix
5279  * sub flow, the actions following the sample action will be copied to the
5280  * suffix sub flow, Queue action always be located in the suffix sub flow.
5281  *
5282  * In order to make the packet from prefix sub flow matches with suffix sub
5283  * flow, an extra tag action be added into prefix sub flow, and the suffix sub
5284  * flow uses tag item with the unique flow id.
5285  *
5286  * @param dev
5287  *   Pointer to Ethernet device.
5288  * @param[in] flow
5289  *   Parent flow structure pointer.
5290  * @param[in] attr
5291  *   Flow rule attributes.
5292  * @param[in] items
5293  *   Pattern specification (list terminated by the END pattern item).
5294  * @param[in] actions
5295  *   Associated actions (list terminated by the END action).
5296  * @param[in] flow_split_info
5297  *   Pointer to flow split info structure.
5298  * @param[out] error
5299  *   Perform verbose error reporting if not NULL.
5300  * @return
5301  *   0 on success, negative value otherwise
5302  */
5303 static int
5304 flow_create_split_sample(struct rte_eth_dev *dev,
5305                          struct rte_flow *flow,
5306                          const struct rte_flow_attr *attr,
5307                          const struct rte_flow_item items[],
5308                          const struct rte_flow_action actions[],
5309                          struct mlx5_flow_split_info *flow_split_info,
5310                          struct rte_flow_error *error)
5311 {
5312         struct mlx5_priv *priv = dev->data->dev_private;
5313         struct rte_flow_action *sfx_actions = NULL;
5314         struct rte_flow_action *pre_actions = NULL;
5315         struct rte_flow_item *sfx_items = NULL;
5316         struct mlx5_flow *dev_flow = NULL;
5317         struct rte_flow_attr sfx_attr = *attr;
5318 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5319         struct mlx5_flow_dv_sample_resource *sample_res;
5320         struct mlx5_flow_tbl_data_entry *sfx_tbl_data;
5321         struct mlx5_flow_tbl_resource *sfx_tbl;
5322 #endif
5323         size_t act_size;
5324         size_t item_size;
5325         uint32_t fdb_tx = 0;
5326         int32_t tag_id = 0;
5327         int actions_n = 0;
5328         int sample_action_pos;
5329         int qrss_action_pos;
5330         int add_tag = 0;
5331         int modify_after_mirror = 0;
5332         uint16_t jump_table = 0;
5333         const uint32_t next_ft_step = 1;
5334         int ret = 0;
5335
5336         if (priv->sampler_en)
5337                 actions_n = flow_check_match_action(actions, attr,
5338                                         RTE_FLOW_ACTION_TYPE_SAMPLE,
5339                                         &sample_action_pos, &qrss_action_pos,
5340                                         &modify_after_mirror);
5341         if (actions_n) {
5342                 /* The prefix actions must includes sample, tag, end. */
5343                 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1)
5344                            + sizeof(struct mlx5_rte_flow_action_set_tag);
5345                 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM +
5346                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
5347                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size +
5348                                           item_size), 0, SOCKET_ID_ANY);
5349                 if (!sfx_actions)
5350                         return rte_flow_error_set(error, ENOMEM,
5351                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5352                                                   NULL, "no memory to split "
5353                                                   "sample flow");
5354                 /* The representor_id is -1 for uplink. */
5355                 fdb_tx = (attr->transfer && priv->representor_id != -1);
5356                 /*
5357                  * When reg_c_preserve is set, metadata registers Cx preserve
5358                  * their value even through packet duplication.
5359                  */
5360                 add_tag = (!fdb_tx || priv->config.hca_attr.reg_c_preserve);
5361                 if (add_tag)
5362                         sfx_items = (struct rte_flow_item *)((char *)sfx_actions
5363                                         + act_size);
5364                 if (modify_after_mirror)
5365                         jump_table = attr->group * MLX5_FLOW_TABLE_FACTOR +
5366                                      next_ft_step;
5367                 pre_actions = sfx_actions + actions_n;
5368                 tag_id = flow_sample_split_prep(dev, add_tag, sfx_items,
5369                                                 actions, sfx_actions,
5370                                                 pre_actions, actions_n,
5371                                                 sample_action_pos,
5372                                                 qrss_action_pos, jump_table,
5373                                                 error);
5374                 if (tag_id < 0 || (add_tag && !tag_id)) {
5375                         ret = -rte_errno;
5376                         goto exit;
5377                 }
5378                 if (modify_after_mirror)
5379                         flow_split_info->skip_scale =
5380                                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
5381                 /* Add the prefix subflow. */
5382                 ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
5383                                               items, pre_actions,
5384                                               flow_split_info, error);
5385                 if (ret) {
5386                         ret = -rte_errno;
5387                         goto exit;
5388                 }
5389                 dev_flow->handle->split_flow_id = tag_id;
5390 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5391                 if (!modify_after_mirror) {
5392                         /* Set the sfx group attr. */
5393                         sample_res = (struct mlx5_flow_dv_sample_resource *)
5394                                                 dev_flow->dv.sample_res;
5395                         sfx_tbl = (struct mlx5_flow_tbl_resource *)
5396                                                 sample_res->normal_path_tbl;
5397                         sfx_tbl_data = container_of(sfx_tbl,
5398                                                 struct mlx5_flow_tbl_data_entry,
5399                                                 tbl);
5400                         sfx_attr.group = sfx_attr.transfer ?
5401                                                 (sfx_tbl_data->table_id - 1) :
5402                                                 sfx_tbl_data->table_id;
5403                 } else {
5404                         MLX5_ASSERT(attr->transfer);
5405                         sfx_attr.group = jump_table;
5406                 }
5407                 flow_split_info->prefix_layers =
5408                                 flow_get_prefix_layer_flags(dev_flow);
5409                 flow_split_info->prefix_mark = dev_flow->handle->mark;
5410                 /* Suffix group level already be scaled with factor, set
5411                  * MLX5_SCALE_FLOW_GROUP_BIT of skip_scale to 1 to avoid scale
5412                  * again in translation.
5413                  */
5414                 flow_split_info->skip_scale = 1 << MLX5_SCALE_FLOW_GROUP_BIT;
5415 #endif
5416         }
5417         /* Add the suffix subflow. */
5418         ret = flow_create_split_meter(dev, flow, &sfx_attr,
5419                                       sfx_items ? sfx_items : items,
5420                                       sfx_actions ? sfx_actions : actions,
5421                                       flow_split_info, error);
5422 exit:
5423         if (sfx_actions)
5424                 mlx5_free(sfx_actions);
5425         return ret;
5426 }
5427
5428 /**
5429  * Split the flow to subflow set. The splitters might be linked
5430  * in the chain, like this:
5431  * flow_create_split_outer() calls:
5432  *   flow_create_split_meter() calls:
5433  *     flow_create_split_metadata(meter_subflow_0) calls:
5434  *       flow_create_split_inner(metadata_subflow_0)
5435  *       flow_create_split_inner(metadata_subflow_1)
5436  *       flow_create_split_inner(metadata_subflow_2)
5437  *     flow_create_split_metadata(meter_subflow_1) calls:
5438  *       flow_create_split_inner(metadata_subflow_0)
5439  *       flow_create_split_inner(metadata_subflow_1)
5440  *       flow_create_split_inner(metadata_subflow_2)
5441  *
5442  * This provide flexible way to add new levels of flow splitting.
5443  * The all of successfully created subflows are included to the
5444  * parent flow dev_flow list.
5445  *
5446  * @param dev
5447  *   Pointer to Ethernet device.
5448  * @param[in] flow
5449  *   Parent flow structure pointer.
5450  * @param[in] attr
5451  *   Flow rule attributes.
5452  * @param[in] items
5453  *   Pattern specification (list terminated by the END pattern item).
5454  * @param[in] actions
5455  *   Associated actions (list terminated by the END action).
5456  * @param[in] flow_split_info
5457  *   Pointer to flow split info structure.
5458  * @param[out] error
5459  *   Perform verbose error reporting if not NULL.
5460  * @return
5461  *   0 on success, negative value otherwise
5462  */
5463 static int
5464 flow_create_split_outer(struct rte_eth_dev *dev,
5465                         struct rte_flow *flow,
5466                         const struct rte_flow_attr *attr,
5467                         const struct rte_flow_item items[],
5468                         const struct rte_flow_action actions[],
5469                         struct mlx5_flow_split_info *flow_split_info,
5470                         struct rte_flow_error *error)
5471 {
5472         int ret;
5473
5474         ret = flow_create_split_sample(dev, flow, attr, items,
5475                                        actions, flow_split_info, error);
5476         MLX5_ASSERT(ret <= 0);
5477         return ret;
5478 }
5479
5480 static struct mlx5_flow_tunnel *
5481 flow_tunnel_from_rule(struct rte_eth_dev *dev,
5482                       const struct rte_flow_attr *attr,
5483                       const struct rte_flow_item items[],
5484                       const struct rte_flow_action actions[])
5485 {
5486         struct mlx5_flow_tunnel *tunnel;
5487
5488 #pragma GCC diagnostic push
5489 #pragma GCC diagnostic ignored "-Wcast-qual"
5490         if (is_flow_tunnel_match_rule(dev, attr, items, actions))
5491                 tunnel = (struct mlx5_flow_tunnel *)items[0].spec;
5492         else if (is_flow_tunnel_steer_rule(dev, attr, items, actions))
5493                 tunnel = (struct mlx5_flow_tunnel *)actions[0].conf;
5494         else
5495                 tunnel = NULL;
5496 #pragma GCC diagnostic pop
5497
5498         return tunnel;
5499 }
5500
5501 /**
5502  * Adjust flow RSS workspace if needed.
5503  *
5504  * @param wks
5505  *   Pointer to thread flow work space.
5506  * @param rss_desc
5507  *   Pointer to RSS descriptor.
5508  * @param[in] nrssq_num
5509  *   New RSS queue number.
5510  *
5511  * @return
5512  *   0 on success, -1 otherwise and rte_errno is set.
5513  */
5514 static int
5515 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks,
5516                           struct mlx5_flow_rss_desc *rss_desc,
5517                           uint32_t nrssq_num)
5518 {
5519         if (likely(nrssq_num <= wks->rssq_num))
5520                 return 0;
5521         rss_desc->queue = realloc(rss_desc->queue,
5522                           sizeof(*rss_desc->queue) * RTE_ALIGN(nrssq_num, 2));
5523         if (!rss_desc->queue) {
5524                 rte_errno = ENOMEM;
5525                 return -1;
5526         }
5527         wks->rssq_num = RTE_ALIGN(nrssq_num, 2);
5528         return 0;
5529 }
5530
5531 /**
5532  * Create a flow and add it to @p list.
5533  *
5534  * @param dev
5535  *   Pointer to Ethernet device.
5536  * @param list
5537  *   Pointer to a TAILQ flow list. If this parameter NULL,
5538  *   no list insertion occurred, flow is just created,
5539  *   this is caller's responsibility to track the
5540  *   created flow.
5541  * @param[in] attr
5542  *   Flow rule attributes.
5543  * @param[in] items
5544  *   Pattern specification (list terminated by the END pattern item).
5545  * @param[in] actions
5546  *   Associated actions (list terminated by the END action).
5547  * @param[in] external
5548  *   This flow rule is created by request external to PMD.
5549  * @param[out] error
5550  *   Perform verbose error reporting if not NULL.
5551  *
5552  * @return
5553  *   A flow index on success, 0 otherwise and rte_errno is set.
5554  */
5555 static uint32_t
5556 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
5557                  const struct rte_flow_attr *attr,
5558                  const struct rte_flow_item items[],
5559                  const struct rte_flow_action original_actions[],
5560                  bool external, struct rte_flow_error *error)
5561 {
5562         struct mlx5_priv *priv = dev->data->dev_private;
5563         struct rte_flow *flow = NULL;
5564         struct mlx5_flow *dev_flow;
5565         const struct rte_flow_action_rss *rss = NULL;
5566         struct mlx5_translated_shared_action
5567                 shared_actions[MLX5_MAX_SHARED_ACTIONS];
5568         int shared_actions_n = MLX5_MAX_SHARED_ACTIONS;
5569         union {
5570                 struct mlx5_flow_expand_rss buf;
5571                 uint8_t buffer[2048];
5572         } expand_buffer;
5573         union {
5574                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
5575                 uint8_t buffer[2048];
5576         } actions_rx;
5577         union {
5578                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
5579                 uint8_t buffer[2048];
5580         } actions_hairpin_tx;
5581         union {
5582                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
5583                 uint8_t buffer[2048];
5584         } items_tx;
5585         struct mlx5_flow_expand_rss *buf = &expand_buffer.buf;
5586         struct mlx5_flow_rss_desc *rss_desc;
5587         const struct rte_flow_action *p_actions_rx;
5588         uint32_t i;
5589         uint32_t idx = 0;
5590         int hairpin_flow;
5591         struct rte_flow_attr attr_tx = { .priority = 0 };
5592         const struct rte_flow_action *actions;
5593         struct rte_flow_action *translated_actions = NULL;
5594         struct mlx5_flow_tunnel *tunnel;
5595         struct tunnel_default_miss_ctx default_miss_ctx = { 0, };
5596         struct mlx5_flow_workspace *wks = mlx5_flow_push_thread_workspace();
5597         struct mlx5_flow_split_info flow_split_info = {
5598                 .external = !!external,
5599                 .skip_scale = 0,
5600                 .flow_idx = 0,
5601                 .prefix_mark = 0,
5602                 .prefix_layers = 0
5603         };
5604         int ret;
5605
5606         MLX5_ASSERT(wks);
5607         rss_desc = &wks->rss_desc;
5608         ret = flow_shared_actions_translate(dev, original_actions,
5609                                             shared_actions,
5610                                             &shared_actions_n,
5611                                             &translated_actions, error);
5612         if (ret < 0) {
5613                 MLX5_ASSERT(translated_actions == NULL);
5614                 return 0;
5615         }
5616         actions = translated_actions ? translated_actions : original_actions;
5617         p_actions_rx = actions;
5618         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
5619         ret = flow_drv_validate(dev, attr, items, p_actions_rx,
5620                                 external, hairpin_flow, error);
5621         if (ret < 0)
5622                 goto error_before_hairpin_split;
5623         flow = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], &idx);
5624         if (!flow) {
5625                 rte_errno = ENOMEM;
5626                 goto error_before_hairpin_split;
5627         }
5628         if (hairpin_flow > 0) {
5629                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
5630                         rte_errno = EINVAL;
5631                         goto error_before_hairpin_split;
5632                 }
5633                 flow_hairpin_split(dev, actions, actions_rx.actions,
5634                                    actions_hairpin_tx.actions, items_tx.items,
5635                                    idx);
5636                 p_actions_rx = actions_rx.actions;
5637         }
5638         flow_split_info.flow_idx = idx;
5639         flow->drv_type = flow_get_drv_type(dev, attr);
5640         MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
5641                     flow->drv_type < MLX5_FLOW_TYPE_MAX);
5642         memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue));
5643         /* RSS Action only works on NIC RX domain */
5644         if (attr->ingress && !attr->transfer)
5645                 rss = flow_get_rss_action(p_actions_rx);
5646         if (rss) {
5647                 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num))
5648                         return 0;
5649                 /*
5650                  * The following information is required by
5651                  * mlx5_flow_hashfields_adjust() in advance.
5652                  */
5653                 rss_desc->level = rss->level;
5654                 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
5655                 rss_desc->types = !rss->types ? ETH_RSS_IP : rss->types;
5656         }
5657         flow->dev_handles = 0;
5658         if (rss && rss->types) {
5659                 unsigned int graph_root;
5660
5661                 graph_root = find_graph_root(items, rss->level);
5662                 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
5663                                            items, rss->types,
5664                                            mlx5_support_expansion, graph_root);
5665                 MLX5_ASSERT(ret > 0 &&
5666                        (unsigned int)ret < sizeof(expand_buffer.buffer));
5667         } else {
5668                 buf->entries = 1;
5669                 buf->entry[0].pattern = (void *)(uintptr_t)items;
5670         }
5671         rss_desc->shared_rss = flow_get_shared_rss_action(dev, shared_actions,
5672                                                       shared_actions_n);
5673         for (i = 0; i < buf->entries; ++i) {
5674                 /* Initialize flow split data. */
5675                 flow_split_info.prefix_layers = 0;
5676                 flow_split_info.prefix_mark = 0;
5677                 flow_split_info.skip_scale = 0;
5678                 /*
5679                  * The splitter may create multiple dev_flows,
5680                  * depending on configuration. In the simplest
5681                  * case it just creates unmodified original flow.
5682                  */
5683                 ret = flow_create_split_outer(dev, flow, attr,
5684                                               buf->entry[i].pattern,
5685                                               p_actions_rx, &flow_split_info,
5686                                               error);
5687                 if (ret < 0)
5688                         goto error;
5689                 if (is_flow_tunnel_steer_rule(dev, attr,
5690                                               buf->entry[i].pattern,
5691                                               p_actions_rx)) {
5692                         ret = flow_tunnel_add_default_miss(dev, flow, attr,
5693                                                            p_actions_rx,
5694                                                            idx,
5695                                                            &default_miss_ctx,
5696                                                            error);
5697                         if (ret < 0) {
5698                                 mlx5_free(default_miss_ctx.queue);
5699                                 goto error;
5700                         }
5701                 }
5702         }
5703         /* Create the tx flow. */
5704         if (hairpin_flow) {
5705                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
5706                 attr_tx.ingress = 0;
5707                 attr_tx.egress = 1;
5708                 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
5709                                          actions_hairpin_tx.actions,
5710                                          idx, error);
5711                 if (!dev_flow)
5712                         goto error;
5713                 dev_flow->flow = flow;
5714                 dev_flow->external = 0;
5715                 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
5716                               dev_flow->handle, next);
5717                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
5718                                          items_tx.items,
5719                                          actions_hairpin_tx.actions, error);
5720                 if (ret < 0)
5721                         goto error;
5722         }
5723         /*
5724          * Update the metadata register copy table. If extensive
5725          * metadata feature is enabled and registers are supported
5726          * we might create the extra rte_flow for each unique
5727          * MARK/FLAG action ID.
5728          *
5729          * The table is updated for ingress Flows only, because
5730          * the egress Flows belong to the different device and
5731          * copy table should be updated in peer NIC Rx domain.
5732          */
5733         if (attr->ingress &&
5734             (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
5735                 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
5736                 if (ret)
5737                         goto error;
5738         }
5739         /*
5740          * If the flow is external (from application) OR device is started,
5741          * OR mreg discover, then apply immediately.
5742          */
5743         if (external || dev->data->dev_started ||
5744             (attr->group == MLX5_FLOW_MREG_CP_TABLE_GROUP &&
5745              attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)) {
5746                 ret = flow_drv_apply(dev, flow, error);
5747                 if (ret < 0)
5748                         goto error;
5749         }
5750         if (list) {
5751                 rte_spinlock_lock(&priv->flow_list_lock);
5752                 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list, idx,
5753                              flow, next);
5754                 rte_spinlock_unlock(&priv->flow_list_lock);
5755         }
5756         flow_rxq_flags_set(dev, flow);
5757         rte_free(translated_actions);
5758         tunnel = flow_tunnel_from_rule(dev, attr, items, actions);
5759         if (tunnel) {
5760                 flow->tunnel = 1;
5761                 flow->tunnel_id = tunnel->tunnel_id;
5762                 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED);
5763                 mlx5_free(default_miss_ctx.queue);
5764         }
5765         mlx5_flow_pop_thread_workspace();
5766         return idx;
5767 error:
5768         MLX5_ASSERT(flow);
5769         ret = rte_errno; /* Save rte_errno before cleanup. */
5770         flow_mreg_del_copy_action(dev, flow);
5771         flow_drv_destroy(dev, flow);
5772         if (rss_desc->shared_rss)
5773                 __atomic_sub_fetch(&((struct mlx5_shared_action_rss *)
5774                         mlx5_ipool_get
5775                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
5776                         rss_desc->shared_rss))->refcnt, 1, __ATOMIC_RELAXED);
5777         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], idx);
5778         rte_errno = ret; /* Restore rte_errno. */
5779         ret = rte_errno;
5780         rte_errno = ret;
5781         mlx5_flow_pop_thread_workspace();
5782 error_before_hairpin_split:
5783         rte_free(translated_actions);
5784         return 0;
5785 }
5786
5787 /**
5788  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
5789  * incoming packets to table 1.
5790  *
5791  * Other flow rules, requested for group n, will be created in
5792  * e-switch table n+1.
5793  * Jump action to e-switch group n will be created to group n+1.
5794  *
5795  * Used when working in switchdev mode, to utilise advantages of table 1
5796  * and above.
5797  *
5798  * @param dev
5799  *   Pointer to Ethernet device.
5800  *
5801  * @return
5802  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
5803  */
5804 struct rte_flow *
5805 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
5806 {
5807         const struct rte_flow_attr attr = {
5808                 .group = 0,
5809                 .priority = 0,
5810                 .ingress = 1,
5811                 .egress = 0,
5812                 .transfer = 1,
5813         };
5814         const struct rte_flow_item pattern = {
5815                 .type = RTE_FLOW_ITEM_TYPE_END,
5816         };
5817         struct rte_flow_action_jump jump = {
5818                 .group = 1,
5819         };
5820         const struct rte_flow_action actions[] = {
5821                 {
5822                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
5823                         .conf = &jump,
5824                 },
5825                 {
5826                         .type = RTE_FLOW_ACTION_TYPE_END,
5827                 },
5828         };
5829         struct mlx5_priv *priv = dev->data->dev_private;
5830         struct rte_flow_error error;
5831
5832         return (void *)(uintptr_t)flow_list_create(dev, &priv->ctrl_flows,
5833                                                    &attr, &pattern,
5834                                                    actions, false, &error);
5835 }
5836
5837 /**
5838  * Validate a flow supported by the NIC.
5839  *
5840  * @see rte_flow_validate()
5841  * @see rte_flow_ops
5842  */
5843 int
5844 mlx5_flow_validate(struct rte_eth_dev *dev,
5845                    const struct rte_flow_attr *attr,
5846                    const struct rte_flow_item items[],
5847                    const struct rte_flow_action original_actions[],
5848                    struct rte_flow_error *error)
5849 {
5850         int hairpin_flow;
5851         struct mlx5_translated_shared_action
5852                 shared_actions[MLX5_MAX_SHARED_ACTIONS];
5853         int shared_actions_n = MLX5_MAX_SHARED_ACTIONS;
5854         const struct rte_flow_action *actions;
5855         struct rte_flow_action *translated_actions = NULL;
5856         int ret = flow_shared_actions_translate(dev, original_actions,
5857                                                 shared_actions,
5858                                                 &shared_actions_n,
5859                                                 &translated_actions, error);
5860
5861         if (ret)
5862                 return ret;
5863         actions = translated_actions ? translated_actions : original_actions;
5864         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
5865         ret = flow_drv_validate(dev, attr, items, actions,
5866                                 true, hairpin_flow, error);
5867         rte_free(translated_actions);
5868         return ret;
5869 }
5870
5871 /**
5872  * Create a flow.
5873  *
5874  * @see rte_flow_create()
5875  * @see rte_flow_ops
5876  */
5877 struct rte_flow *
5878 mlx5_flow_create(struct rte_eth_dev *dev,
5879                  const struct rte_flow_attr *attr,
5880                  const struct rte_flow_item items[],
5881                  const struct rte_flow_action actions[],
5882                  struct rte_flow_error *error)
5883 {
5884         struct mlx5_priv *priv = dev->data->dev_private;
5885
5886         /*
5887          * If the device is not started yet, it is not allowed to created a
5888          * flow from application. PMD default flows and traffic control flows
5889          * are not affected.
5890          */
5891         if (unlikely(!dev->data->dev_started)) {
5892                 DRV_LOG(DEBUG, "port %u is not started when "
5893                         "inserting a flow", dev->data->port_id);
5894                 rte_flow_error_set(error, ENODEV,
5895                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5896                                    NULL,
5897                                    "port not started");
5898                 return NULL;
5899         }
5900
5901         return (void *)(uintptr_t)flow_list_create(dev, &priv->flows,
5902                                   attr, items, actions, true, error);
5903 }
5904
5905 /**
5906  * Destroy a flow in a list.
5907  *
5908  * @param dev
5909  *   Pointer to Ethernet device.
5910  * @param list
5911  *   Pointer to the Indexed flow list. If this parameter NULL,
5912  *   there is no flow removal from the list. Be noted that as
5913  *   flow is add to the indexed list, memory of the indexed
5914  *   list points to maybe changed as flow destroyed.
5915  * @param[in] flow_idx
5916  *   Index of flow to destroy.
5917  */
5918 static void
5919 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
5920                   uint32_t flow_idx)
5921 {
5922         struct mlx5_priv *priv = dev->data->dev_private;
5923         struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
5924                                                [MLX5_IPOOL_RTE_FLOW], flow_idx);
5925
5926         if (!flow)
5927                 return;
5928         /*
5929          * Update RX queue flags only if port is started, otherwise it is
5930          * already clean.
5931          */
5932         if (dev->data->dev_started)
5933                 flow_rxq_flags_trim(dev, flow);
5934         flow_drv_destroy(dev, flow);
5935         if (list) {
5936                 rte_spinlock_lock(&priv->flow_list_lock);
5937                 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list,
5938                              flow_idx, flow, next);
5939                 rte_spinlock_unlock(&priv->flow_list_lock);
5940         }
5941         if (flow->tunnel) {
5942                 struct mlx5_flow_tunnel *tunnel;
5943
5944                 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id);
5945                 RTE_VERIFY(tunnel);
5946                 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
5947                         mlx5_flow_tunnel_free(dev, tunnel);
5948         }
5949         flow_mreg_del_copy_action(dev, flow);
5950         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], flow_idx);
5951 }
5952
5953 /**
5954  * Destroy all flows.
5955  *
5956  * @param dev
5957  *   Pointer to Ethernet device.
5958  * @param list
5959  *   Pointer to the Indexed flow list.
5960  * @param active
5961  *   If flushing is called avtively.
5962  */
5963 void
5964 mlx5_flow_list_flush(struct rte_eth_dev *dev, uint32_t *list, bool active)
5965 {
5966         uint32_t num_flushed = 0;
5967
5968         while (*list) {
5969                 flow_list_destroy(dev, list, *list);
5970                 num_flushed++;
5971         }
5972         if (active) {
5973                 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
5974                         dev->data->port_id, num_flushed);
5975         }
5976 }
5977
5978 /**
5979  * Stop all default actions for flows.
5980  *
5981  * @param dev
5982  *   Pointer to Ethernet device.
5983  */
5984 void
5985 mlx5_flow_stop_default(struct rte_eth_dev *dev)
5986 {
5987         flow_mreg_del_default_copy_action(dev);
5988         flow_rxq_flags_clear(dev);
5989 }
5990
5991 /**
5992  * Start all default actions for flows.
5993  *
5994  * @param dev
5995  *   Pointer to Ethernet device.
5996  * @return
5997  *   0 on success, a negative errno value otherwise and rte_errno is set.
5998  */
5999 int
6000 mlx5_flow_start_default(struct rte_eth_dev *dev)
6001 {
6002         struct rte_flow_error error;
6003
6004         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
6005         return flow_mreg_add_default_copy_action(dev, &error);
6006 }
6007
6008 /**
6009  * Release key of thread specific flow workspace data.
6010  */
6011 void
6012 flow_release_workspace(void *data)
6013 {
6014         struct mlx5_flow_workspace *wks = data;
6015         struct mlx5_flow_workspace *next;
6016
6017         while (wks) {
6018                 next = wks->next;
6019                 free(wks->rss_desc.queue);
6020                 free(wks);
6021                 wks = next;
6022         }
6023 }
6024
6025 /**
6026  * Get thread specific current flow workspace.
6027  *
6028  * @return pointer to thread specific flow workspace data, NULL on error.
6029  */
6030 struct mlx5_flow_workspace*
6031 mlx5_flow_get_thread_workspace(void)
6032 {
6033         struct mlx5_flow_workspace *data;
6034
6035         data = mlx5_flow_os_get_specific_workspace();
6036         MLX5_ASSERT(data && data->inuse);
6037         if (!data || !data->inuse)
6038                 DRV_LOG(ERR, "flow workspace not initialized.");
6039         return data;
6040 }
6041
6042 /**
6043  * Allocate and init new flow workspace.
6044  *
6045  * @return pointer to flow workspace data, NULL on error.
6046  */
6047 static struct mlx5_flow_workspace*
6048 flow_alloc_thread_workspace(void)
6049 {
6050         struct mlx5_flow_workspace *data = calloc(1, sizeof(*data));
6051
6052         if (!data) {
6053                 DRV_LOG(ERR, "Failed to allocate flow workspace "
6054                         "memory.");
6055                 return NULL;
6056         }
6057         data->rss_desc.queue = calloc(1,
6058                         sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM);
6059         if (!data->rss_desc.queue)
6060                 goto err;
6061         data->rssq_num = MLX5_RSSQ_DEFAULT_NUM;
6062         return data;
6063 err:
6064         if (data->rss_desc.queue)
6065                 free(data->rss_desc.queue);
6066         free(data);
6067         return NULL;
6068 }
6069
6070 /**
6071  * Get new thread specific flow workspace.
6072  *
6073  * If current workspace inuse, create new one and set as current.
6074  *
6075  * @return pointer to thread specific flow workspace data, NULL on error.
6076  */
6077 static struct mlx5_flow_workspace*
6078 mlx5_flow_push_thread_workspace(void)
6079 {
6080         struct mlx5_flow_workspace *curr;
6081         struct mlx5_flow_workspace *data;
6082
6083         curr = mlx5_flow_os_get_specific_workspace();
6084         if (!curr) {
6085                 data = flow_alloc_thread_workspace();
6086                 if (!data)
6087                         return NULL;
6088         } else if (!curr->inuse) {
6089                 data = curr;
6090         } else if (curr->next) {
6091                 data = curr->next;
6092         } else {
6093                 data = flow_alloc_thread_workspace();
6094                 if (!data)
6095                         return NULL;
6096                 curr->next = data;
6097                 data->prev = curr;
6098         }
6099         data->inuse = 1;
6100         data->flow_idx = 0;
6101         /* Set as current workspace */
6102         if (mlx5_flow_os_set_specific_workspace(data))
6103                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6104         return data;
6105 }
6106
6107 /**
6108  * Close current thread specific flow workspace.
6109  *
6110  * If previous workspace available, set it as current.
6111  *
6112  * @return pointer to thread specific flow workspace data, NULL on error.
6113  */
6114 static void
6115 mlx5_flow_pop_thread_workspace(void)
6116 {
6117         struct mlx5_flow_workspace *data = mlx5_flow_get_thread_workspace();
6118
6119         if (!data)
6120                 return;
6121         if (!data->inuse) {
6122                 DRV_LOG(ERR, "Failed to close unused flow workspace.");
6123                 return;
6124         }
6125         data->inuse = 0;
6126         if (!data->prev)
6127                 return;
6128         if (mlx5_flow_os_set_specific_workspace(data->prev))
6129                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6130 }
6131
6132 /**
6133  * Verify the flow list is empty
6134  *
6135  * @param dev
6136  *  Pointer to Ethernet device.
6137  *
6138  * @return the number of flows not released.
6139  */
6140 int
6141 mlx5_flow_verify(struct rte_eth_dev *dev)
6142 {
6143         struct mlx5_priv *priv = dev->data->dev_private;
6144         struct rte_flow *flow;
6145         uint32_t idx;
6146         int ret = 0;
6147
6148         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], priv->flows, idx,
6149                       flow, next) {
6150                 DRV_LOG(DEBUG, "port %u flow %p still referenced",
6151                         dev->data->port_id, (void *)flow);
6152                 ++ret;
6153         }
6154         return ret;
6155 }
6156
6157 /**
6158  * Enable default hairpin egress flow.
6159  *
6160  * @param dev
6161  *   Pointer to Ethernet device.
6162  * @param queue
6163  *   The queue index.
6164  *
6165  * @return
6166  *   0 on success, a negative errno value otherwise and rte_errno is set.
6167  */
6168 int
6169 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
6170                             uint32_t queue)
6171 {
6172         struct mlx5_priv *priv = dev->data->dev_private;
6173         const struct rte_flow_attr attr = {
6174                 .egress = 1,
6175                 .priority = 0,
6176         };
6177         struct mlx5_rte_flow_item_tx_queue queue_spec = {
6178                 .queue = queue,
6179         };
6180         struct mlx5_rte_flow_item_tx_queue queue_mask = {
6181                 .queue = UINT32_MAX,
6182         };
6183         struct rte_flow_item items[] = {
6184                 {
6185                         .type = (enum rte_flow_item_type)
6186                                 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
6187                         .spec = &queue_spec,
6188                         .last = NULL,
6189                         .mask = &queue_mask,
6190                 },
6191                 {
6192                         .type = RTE_FLOW_ITEM_TYPE_END,
6193                 },
6194         };
6195         struct rte_flow_action_jump jump = {
6196                 .group = MLX5_HAIRPIN_TX_TABLE,
6197         };
6198         struct rte_flow_action actions[2];
6199         uint32_t flow_idx;
6200         struct rte_flow_error error;
6201
6202         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
6203         actions[0].conf = &jump;
6204         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
6205         flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6206                                 &attr, items, actions, false, &error);
6207         if (!flow_idx) {
6208                 DRV_LOG(DEBUG,
6209                         "Failed to create ctrl flow: rte_errno(%d),"
6210                         " type(%d), message(%s)",
6211                         rte_errno, error.type,
6212                         error.message ? error.message : " (no stated reason)");
6213                 return -rte_errno;
6214         }
6215         return 0;
6216 }
6217
6218 /**
6219  * Enable a control flow configured from the control plane.
6220  *
6221  * @param dev
6222  *   Pointer to Ethernet device.
6223  * @param eth_spec
6224  *   An Ethernet flow spec to apply.
6225  * @param eth_mask
6226  *   An Ethernet flow mask to apply.
6227  * @param vlan_spec
6228  *   A VLAN flow spec to apply.
6229  * @param vlan_mask
6230  *   A VLAN flow mask to apply.
6231  *
6232  * @return
6233  *   0 on success, a negative errno value otherwise and rte_errno is set.
6234  */
6235 int
6236 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
6237                     struct rte_flow_item_eth *eth_spec,
6238                     struct rte_flow_item_eth *eth_mask,
6239                     struct rte_flow_item_vlan *vlan_spec,
6240                     struct rte_flow_item_vlan *vlan_mask)
6241 {
6242         struct mlx5_priv *priv = dev->data->dev_private;
6243         const struct rte_flow_attr attr = {
6244                 .ingress = 1,
6245                 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
6246         };
6247         struct rte_flow_item items[] = {
6248                 {
6249                         .type = RTE_FLOW_ITEM_TYPE_ETH,
6250                         .spec = eth_spec,
6251                         .last = NULL,
6252                         .mask = eth_mask,
6253                 },
6254                 {
6255                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
6256                                               RTE_FLOW_ITEM_TYPE_END,
6257                         .spec = vlan_spec,
6258                         .last = NULL,
6259                         .mask = vlan_mask,
6260                 },
6261                 {
6262                         .type = RTE_FLOW_ITEM_TYPE_END,
6263                 },
6264         };
6265         uint16_t queue[priv->reta_idx_n];
6266         struct rte_flow_action_rss action_rss = {
6267                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
6268                 .level = 0,
6269                 .types = priv->rss_conf.rss_hf,
6270                 .key_len = priv->rss_conf.rss_key_len,
6271                 .queue_num = priv->reta_idx_n,
6272                 .key = priv->rss_conf.rss_key,
6273                 .queue = queue,
6274         };
6275         struct rte_flow_action actions[] = {
6276                 {
6277                         .type = RTE_FLOW_ACTION_TYPE_RSS,
6278                         .conf = &action_rss,
6279                 },
6280                 {
6281                         .type = RTE_FLOW_ACTION_TYPE_END,
6282                 },
6283         };
6284         uint32_t flow_idx;
6285         struct rte_flow_error error;
6286         unsigned int i;
6287
6288         if (!priv->reta_idx_n || !priv->rxqs_n) {
6289                 return 0;
6290         }
6291         if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
6292                 action_rss.types = 0;
6293         for (i = 0; i != priv->reta_idx_n; ++i)
6294                 queue[i] = (*priv->reta_idx)[i];
6295         flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6296                                 &attr, items, actions, false, &error);
6297         if (!flow_idx)
6298                 return -rte_errno;
6299         return 0;
6300 }
6301
6302 /**
6303  * Enable a flow control configured from the control plane.
6304  *
6305  * @param dev
6306  *   Pointer to Ethernet device.
6307  * @param eth_spec
6308  *   An Ethernet flow spec to apply.
6309  * @param eth_mask
6310  *   An Ethernet flow mask to apply.
6311  *
6312  * @return
6313  *   0 on success, a negative errno value otherwise and rte_errno is set.
6314  */
6315 int
6316 mlx5_ctrl_flow(struct rte_eth_dev *dev,
6317                struct rte_flow_item_eth *eth_spec,
6318                struct rte_flow_item_eth *eth_mask)
6319 {
6320         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
6321 }
6322
6323 /**
6324  * Create default miss flow rule matching lacp traffic
6325  *
6326  * @param dev
6327  *   Pointer to Ethernet device.
6328  * @param eth_spec
6329  *   An Ethernet flow spec to apply.
6330  *
6331  * @return
6332  *   0 on success, a negative errno value otherwise and rte_errno is set.
6333  */
6334 int
6335 mlx5_flow_lacp_miss(struct rte_eth_dev *dev)
6336 {
6337         struct mlx5_priv *priv = dev->data->dev_private;
6338         /*
6339          * The LACP matching is done by only using ether type since using
6340          * a multicast dst mac causes kernel to give low priority to this flow.
6341          */
6342         static const struct rte_flow_item_eth lacp_spec = {
6343                 .type = RTE_BE16(0x8809),
6344         };
6345         static const struct rte_flow_item_eth lacp_mask = {
6346                 .type = 0xffff,
6347         };
6348         const struct rte_flow_attr attr = {
6349                 .ingress = 1,
6350         };
6351         struct rte_flow_item items[] = {
6352                 {
6353                         .type = RTE_FLOW_ITEM_TYPE_ETH,
6354                         .spec = &lacp_spec,
6355                         .mask = &lacp_mask,
6356                 },
6357                 {
6358                         .type = RTE_FLOW_ITEM_TYPE_END,
6359                 },
6360         };
6361         struct rte_flow_action actions[] = {
6362                 {
6363                         .type = (enum rte_flow_action_type)
6364                                 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS,
6365                 },
6366                 {
6367                         .type = RTE_FLOW_ACTION_TYPE_END,
6368                 },
6369         };
6370         struct rte_flow_error error;
6371         uint32_t flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6372                                 &attr, items, actions, false, &error);
6373
6374         if (!flow_idx)
6375                 return -rte_errno;
6376         return 0;
6377 }
6378
6379 /**
6380  * Destroy a flow.
6381  *
6382  * @see rte_flow_destroy()
6383  * @see rte_flow_ops
6384  */
6385 int
6386 mlx5_flow_destroy(struct rte_eth_dev *dev,
6387                   struct rte_flow *flow,
6388                   struct rte_flow_error *error __rte_unused)
6389 {
6390         struct mlx5_priv *priv = dev->data->dev_private;
6391
6392         flow_list_destroy(dev, &priv->flows, (uintptr_t)(void *)flow);
6393         return 0;
6394 }
6395
6396 /**
6397  * Destroy all flows.
6398  *
6399  * @see rte_flow_flush()
6400  * @see rte_flow_ops
6401  */
6402 int
6403 mlx5_flow_flush(struct rte_eth_dev *dev,
6404                 struct rte_flow_error *error __rte_unused)
6405 {
6406         struct mlx5_priv *priv = dev->data->dev_private;
6407
6408         mlx5_flow_list_flush(dev, &priv->flows, false);
6409         return 0;
6410 }
6411
6412 /**
6413  * Isolated mode.
6414  *
6415  * @see rte_flow_isolate()
6416  * @see rte_flow_ops
6417  */
6418 int
6419 mlx5_flow_isolate(struct rte_eth_dev *dev,
6420                   int enable,
6421                   struct rte_flow_error *error)
6422 {
6423         struct mlx5_priv *priv = dev->data->dev_private;
6424
6425         if (dev->data->dev_started) {
6426                 rte_flow_error_set(error, EBUSY,
6427                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6428                                    NULL,
6429                                    "port must be stopped first");
6430                 return -rte_errno;
6431         }
6432         priv->isolated = !!enable;
6433         if (enable)
6434                 dev->dev_ops = &mlx5_dev_ops_isolate;
6435         else
6436                 dev->dev_ops = &mlx5_dev_ops;
6437
6438         dev->rx_descriptor_status = mlx5_rx_descriptor_status;
6439         dev->tx_descriptor_status = mlx5_tx_descriptor_status;
6440
6441         return 0;
6442 }
6443
6444 /**
6445  * Query a flow.
6446  *
6447  * @see rte_flow_query()
6448  * @see rte_flow_ops
6449  */
6450 static int
6451 flow_drv_query(struct rte_eth_dev *dev,
6452                uint32_t flow_idx,
6453                const struct rte_flow_action *actions,
6454                void *data,
6455                struct rte_flow_error *error)
6456 {
6457         struct mlx5_priv *priv = dev->data->dev_private;
6458         const struct mlx5_flow_driver_ops *fops;
6459         struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
6460                                                [MLX5_IPOOL_RTE_FLOW],
6461                                                flow_idx);
6462         enum mlx5_flow_drv_type ftype;
6463
6464         if (!flow) {
6465                 return rte_flow_error_set(error, ENOENT,
6466                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6467                           NULL,
6468                           "invalid flow handle");
6469         }
6470         ftype = flow->drv_type;
6471         MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
6472         fops = flow_get_drv_ops(ftype);
6473
6474         return fops->query(dev, flow, actions, data, error);
6475 }
6476
6477 /**
6478  * Query a flow.
6479  *
6480  * @see rte_flow_query()
6481  * @see rte_flow_ops
6482  */
6483 int
6484 mlx5_flow_query(struct rte_eth_dev *dev,
6485                 struct rte_flow *flow,
6486                 const struct rte_flow_action *actions,
6487                 void *data,
6488                 struct rte_flow_error *error)
6489 {
6490         int ret;
6491
6492         ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data,
6493                              error);
6494         if (ret < 0)
6495                 return ret;
6496         return 0;
6497 }
6498
6499 /**
6500  * Get rte_flow callbacks.
6501  *
6502  * @param dev
6503  *   Pointer to Ethernet device structure.
6504  * @param ops
6505  *   Pointer to operation-specific structure.
6506  *
6507  * @return 0
6508  */
6509 int
6510 mlx5_flow_ops_get(struct rte_eth_dev *dev __rte_unused,
6511                   const struct rte_flow_ops **ops)
6512 {
6513         *ops = &mlx5_flow_ops;
6514         return 0;
6515 }
6516
6517 /**
6518  * Create the needed meter and suffix tables.
6519  *
6520  * @param[in] dev
6521  *   Pointer to Ethernet device.
6522  * @param[in] fm
6523  *   Pointer to the flow meter.
6524  *
6525  * @return
6526  *   Pointer to table set on success, NULL otherwise.
6527  */
6528 struct mlx5_meter_domains_infos *
6529 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
6530                           const struct mlx5_flow_meter *fm)
6531 {
6532         const struct mlx5_flow_driver_ops *fops;
6533
6534         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6535         return fops->create_mtr_tbls(dev, fm);
6536 }
6537
6538 /**
6539  * Destroy the meter table set.
6540  *
6541  * @param[in] dev
6542  *   Pointer to Ethernet device.
6543  * @param[in] tbl
6544  *   Pointer to the meter table set.
6545  *
6546  * @return
6547  *   0 on success.
6548  */
6549 int
6550 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
6551                            struct mlx5_meter_domains_infos *tbls)
6552 {
6553         const struct mlx5_flow_driver_ops *fops;
6554
6555         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6556         return fops->destroy_mtr_tbls(dev, tbls);
6557 }
6558
6559 /**
6560  * Create policer rules.
6561  *
6562  * @param[in] dev
6563  *   Pointer to Ethernet device.
6564  * @param[in] fm
6565  *   Pointer to flow meter structure.
6566  * @param[in] attr
6567  *   Pointer to flow attributes.
6568  *
6569  * @return
6570  *   0 on success, -1 otherwise.
6571  */
6572 int
6573 mlx5_flow_create_policer_rules(struct rte_eth_dev *dev,
6574                                struct mlx5_flow_meter *fm,
6575                                const struct rte_flow_attr *attr)
6576 {
6577         const struct mlx5_flow_driver_ops *fops;
6578
6579         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6580         return fops->create_policer_rules(dev, fm, attr);
6581 }
6582
6583 /**
6584  * Destroy policer rules.
6585  *
6586  * @param[in] fm
6587  *   Pointer to flow meter structure.
6588  * @param[in] attr
6589  *   Pointer to flow attributes.
6590  *
6591  * @return
6592  *   0 on success, -1 otherwise.
6593  */
6594 int
6595 mlx5_flow_destroy_policer_rules(struct rte_eth_dev *dev,
6596                                 struct mlx5_flow_meter *fm,
6597                                 const struct rte_flow_attr *attr)
6598 {
6599         const struct mlx5_flow_driver_ops *fops;
6600
6601         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6602         return fops->destroy_policer_rules(dev, fm, attr);
6603 }
6604
6605 /**
6606  * Allocate a counter.
6607  *
6608  * @param[in] dev
6609  *   Pointer to Ethernet device structure.
6610  *
6611  * @return
6612  *   Index to allocated counter  on success, 0 otherwise.
6613  */
6614 uint32_t
6615 mlx5_counter_alloc(struct rte_eth_dev *dev)
6616 {
6617         const struct mlx5_flow_driver_ops *fops;
6618         struct rte_flow_attr attr = { .transfer = 0 };
6619
6620         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
6621                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6622                 return fops->counter_alloc(dev);
6623         }
6624         DRV_LOG(ERR,
6625                 "port %u counter allocate is not supported.",
6626                  dev->data->port_id);
6627         return 0;
6628 }
6629
6630 /**
6631  * Free a counter.
6632  *
6633  * @param[in] dev
6634  *   Pointer to Ethernet device structure.
6635  * @param[in] cnt
6636  *   Index to counter to be free.
6637  */
6638 void
6639 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
6640 {
6641         const struct mlx5_flow_driver_ops *fops;
6642         struct rte_flow_attr attr = { .transfer = 0 };
6643
6644         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
6645                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6646                 fops->counter_free(dev, cnt);
6647                 return;
6648         }
6649         DRV_LOG(ERR,
6650                 "port %u counter free is not supported.",
6651                  dev->data->port_id);
6652 }
6653
6654 /**
6655  * Query counter statistics.
6656  *
6657  * @param[in] dev
6658  *   Pointer to Ethernet device structure.
6659  * @param[in] cnt
6660  *   Index to counter to query.
6661  * @param[in] clear
6662  *   Set to clear counter statistics.
6663  * @param[out] pkts
6664  *   The counter hits packets number to save.
6665  * @param[out] bytes
6666  *   The counter hits bytes number to save.
6667  *
6668  * @return
6669  *   0 on success, a negative errno value otherwise.
6670  */
6671 int
6672 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
6673                    bool clear, uint64_t *pkts, uint64_t *bytes)
6674 {
6675         const struct mlx5_flow_driver_ops *fops;
6676         struct rte_flow_attr attr = { .transfer = 0 };
6677
6678         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
6679                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6680                 return fops->counter_query(dev, cnt, clear, pkts, bytes);
6681         }
6682         DRV_LOG(ERR,
6683                 "port %u counter query is not supported.",
6684                  dev->data->port_id);
6685         return -ENOTSUP;
6686 }
6687
6688 /**
6689  * Allocate a new memory for the counter values wrapped by all the needed
6690  * management.
6691  *
6692  * @param[in] sh
6693  *   Pointer to mlx5_dev_ctx_shared object.
6694  *
6695  * @return
6696  *   0 on success, a negative errno value otherwise.
6697  */
6698 static int
6699 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh)
6700 {
6701         struct mlx5_devx_mkey_attr mkey_attr;
6702         struct mlx5_counter_stats_mem_mng *mem_mng;
6703         volatile struct flow_counter_stats *raw_data;
6704         int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES;
6705         int size = (sizeof(struct flow_counter_stats) *
6706                         MLX5_COUNTERS_PER_POOL +
6707                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
6708                         sizeof(struct mlx5_counter_stats_mem_mng);
6709         size_t pgsize = rte_mem_page_size();
6710         uint8_t *mem;
6711         int i;
6712
6713         if (pgsize == (size_t)-1) {
6714                 DRV_LOG(ERR, "Failed to get mem page size");
6715                 rte_errno = ENOMEM;
6716                 return -ENOMEM;
6717         }
6718         mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY);
6719         if (!mem) {
6720                 rte_errno = ENOMEM;
6721                 return -ENOMEM;
6722         }
6723         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
6724         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
6725         mem_mng->umem = mlx5_os_umem_reg(sh->ctx, mem, size,
6726                                                  IBV_ACCESS_LOCAL_WRITE);
6727         if (!mem_mng->umem) {
6728                 rte_errno = errno;
6729                 mlx5_free(mem);
6730                 return -rte_errno;
6731         }
6732         mkey_attr.addr = (uintptr_t)mem;
6733         mkey_attr.size = size;
6734         mkey_attr.umem_id = mlx5_os_get_umem_id(mem_mng->umem);
6735         mkey_attr.pd = sh->pdn;
6736         mkey_attr.log_entity_size = 0;
6737         mkey_attr.pg_access = 0;
6738         mkey_attr.klm_array = NULL;
6739         mkey_attr.klm_num = 0;
6740         mkey_attr.relaxed_ordering_write = sh->cmng.relaxed_ordering_write;
6741         mkey_attr.relaxed_ordering_read = sh->cmng.relaxed_ordering_read;
6742         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
6743         if (!mem_mng->dm) {
6744                 mlx5_os_umem_dereg(mem_mng->umem);
6745                 rte_errno = errno;
6746                 mlx5_free(mem);
6747                 return -rte_errno;
6748         }
6749         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
6750         raw_data = (volatile struct flow_counter_stats *)mem;
6751         for (i = 0; i < raws_n; ++i) {
6752                 mem_mng->raws[i].mem_mng = mem_mng;
6753                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
6754         }
6755         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
6756                 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws,
6757                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i,
6758                                  next);
6759         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
6760         sh->cmng.mem_mng = mem_mng;
6761         return 0;
6762 }
6763
6764 /**
6765  * Set the statistic memory to the new counter pool.
6766  *
6767  * @param[in] sh
6768  *   Pointer to mlx5_dev_ctx_shared object.
6769  * @param[in] pool
6770  *   Pointer to the pool to set the statistic memory.
6771  *
6772  * @return
6773  *   0 on success, a negative errno value otherwise.
6774  */
6775 static int
6776 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh,
6777                                struct mlx5_flow_counter_pool *pool)
6778 {
6779         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
6780         /* Resize statistic memory once used out. */
6781         if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) &&
6782             mlx5_flow_create_counter_stat_mem_mng(sh)) {
6783                 DRV_LOG(ERR, "Cannot resize counter stat mem.");
6784                 return -1;
6785         }
6786         rte_spinlock_lock(&pool->sl);
6787         pool->raw = cmng->mem_mng->raws + pool->index %
6788                     MLX5_CNT_CONTAINER_RESIZE;
6789         rte_spinlock_unlock(&pool->sl);
6790         pool->raw_hw = NULL;
6791         return 0;
6792 }
6793
6794 #define MLX5_POOL_QUERY_FREQ_US 1000000
6795
6796 /**
6797  * Set the periodic procedure for triggering asynchronous batch queries for all
6798  * the counter pools.
6799  *
6800  * @param[in] sh
6801  *   Pointer to mlx5_dev_ctx_shared object.
6802  */
6803 void
6804 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh)
6805 {
6806         uint32_t pools_n, us;
6807
6808         pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED);
6809         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
6810         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
6811         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
6812                 sh->cmng.query_thread_on = 0;
6813                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
6814         } else {
6815                 sh->cmng.query_thread_on = 1;
6816         }
6817 }
6818
6819 /**
6820  * The periodic procedure for triggering asynchronous batch queries for all the
6821  * counter pools. This function is probably called by the host thread.
6822  *
6823  * @param[in] arg
6824  *   The parameter for the alarm process.
6825  */
6826 void
6827 mlx5_flow_query_alarm(void *arg)
6828 {
6829         struct mlx5_dev_ctx_shared *sh = arg;
6830         int ret;
6831         uint16_t pool_index = sh->cmng.pool_index;
6832         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
6833         struct mlx5_flow_counter_pool *pool;
6834         uint16_t n_valid;
6835
6836         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
6837                 goto set_alarm;
6838         rte_spinlock_lock(&cmng->pool_update_sl);
6839         pool = cmng->pools[pool_index];
6840         n_valid = cmng->n_valid;
6841         rte_spinlock_unlock(&cmng->pool_update_sl);
6842         /* Set the statistic memory to the new created pool. */
6843         if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool)))
6844                 goto set_alarm;
6845         if (pool->raw_hw)
6846                 /* There is a pool query in progress. */
6847                 goto set_alarm;
6848         pool->raw_hw =
6849                 LIST_FIRST(&sh->cmng.free_stat_raws);
6850         if (!pool->raw_hw)
6851                 /* No free counter statistics raw memory. */
6852                 goto set_alarm;
6853         /*
6854          * Identify the counters released between query trigger and query
6855          * handle more efficiently. The counter released in this gap period
6856          * should wait for a new round of query as the new arrived packets
6857          * will not be taken into account.
6858          */
6859         pool->query_gen++;
6860         ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0,
6861                                                MLX5_COUNTERS_PER_POOL,
6862                                                NULL, NULL,
6863                                                pool->raw_hw->mem_mng->dm->id,
6864                                                (void *)(uintptr_t)
6865                                                pool->raw_hw->data,
6866                                                sh->devx_comp,
6867                                                (uint64_t)(uintptr_t)pool);
6868         if (ret) {
6869                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
6870                         " %d", pool->min_dcs->id);
6871                 pool->raw_hw = NULL;
6872                 goto set_alarm;
6873         }
6874         LIST_REMOVE(pool->raw_hw, next);
6875         sh->cmng.pending_queries++;
6876         pool_index++;
6877         if (pool_index >= n_valid)
6878                 pool_index = 0;
6879 set_alarm:
6880         sh->cmng.pool_index = pool_index;
6881         mlx5_set_query_alarm(sh);
6882 }
6883
6884 /**
6885  * Check and callback event for new aged flow in the counter pool
6886  *
6887  * @param[in] sh
6888  *   Pointer to mlx5_dev_ctx_shared object.
6889  * @param[in] pool
6890  *   Pointer to Current counter pool.
6891  */
6892 static void
6893 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh,
6894                    struct mlx5_flow_counter_pool *pool)
6895 {
6896         struct mlx5_priv *priv;
6897         struct mlx5_flow_counter *cnt;
6898         struct mlx5_age_info *age_info;
6899         struct mlx5_age_param *age_param;
6900         struct mlx5_counter_stats_raw *cur = pool->raw_hw;
6901         struct mlx5_counter_stats_raw *prev = pool->raw;
6902         const uint64_t curr_time = MLX5_CURR_TIME_SEC;
6903         const uint32_t time_delta = curr_time - pool->time_of_last_age_check;
6904         uint16_t expected = AGE_CANDIDATE;
6905         uint32_t i;
6906
6907         pool->time_of_last_age_check = curr_time;
6908         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
6909                 cnt = MLX5_POOL_GET_CNT(pool, i);
6910                 age_param = MLX5_CNT_TO_AGE(cnt);
6911                 if (__atomic_load_n(&age_param->state,
6912                                     __ATOMIC_RELAXED) != AGE_CANDIDATE)
6913                         continue;
6914                 if (cur->data[i].hits != prev->data[i].hits) {
6915                         __atomic_store_n(&age_param->sec_since_last_hit, 0,
6916                                          __ATOMIC_RELAXED);
6917                         continue;
6918                 }
6919                 if (__atomic_add_fetch(&age_param->sec_since_last_hit,
6920                                        time_delta,
6921                                        __ATOMIC_RELAXED) <= age_param->timeout)
6922                         continue;
6923                 /**
6924                  * Hold the lock first, or if between the
6925                  * state AGE_TMOUT and tailq operation the
6926                  * release happened, the release procedure
6927                  * may delete a non-existent tailq node.
6928                  */
6929                 priv = rte_eth_devices[age_param->port_id].data->dev_private;
6930                 age_info = GET_PORT_AGE_INFO(priv);
6931                 rte_spinlock_lock(&age_info->aged_sl);
6932                 if (__atomic_compare_exchange_n(&age_param->state, &expected,
6933                                                 AGE_TMOUT, false,
6934                                                 __ATOMIC_RELAXED,
6935                                                 __ATOMIC_RELAXED)) {
6936                         TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next);
6937                         MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW);
6938                 }
6939                 rte_spinlock_unlock(&age_info->aged_sl);
6940         }
6941         mlx5_age_event_prepare(sh);
6942 }
6943
6944 /**
6945  * Handler for the HW respond about ready values from an asynchronous batch
6946  * query. This function is probably called by the host thread.
6947  *
6948  * @param[in] sh
6949  *   The pointer to the shared device context.
6950  * @param[in] async_id
6951  *   The Devx async ID.
6952  * @param[in] status
6953  *   The status of the completion.
6954  */
6955 void
6956 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
6957                                   uint64_t async_id, int status)
6958 {
6959         struct mlx5_flow_counter_pool *pool =
6960                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
6961         struct mlx5_counter_stats_raw *raw_to_free;
6962         uint8_t query_gen = pool->query_gen ^ 1;
6963         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
6964         enum mlx5_counter_type cnt_type =
6965                 pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6966                                 MLX5_COUNTER_TYPE_ORIGIN;
6967
6968         if (unlikely(status)) {
6969                 raw_to_free = pool->raw_hw;
6970         } else {
6971                 raw_to_free = pool->raw;
6972                 if (pool->is_aged)
6973                         mlx5_flow_aging_check(sh, pool);
6974                 rte_spinlock_lock(&pool->sl);
6975                 pool->raw = pool->raw_hw;
6976                 rte_spinlock_unlock(&pool->sl);
6977                 /* Be sure the new raw counters data is updated in memory. */
6978                 rte_io_wmb();
6979                 if (!TAILQ_EMPTY(&pool->counters[query_gen])) {
6980                         rte_spinlock_lock(&cmng->csl[cnt_type]);
6981                         TAILQ_CONCAT(&cmng->counters[cnt_type],
6982                                      &pool->counters[query_gen], next);
6983                         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6984                 }
6985         }
6986         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
6987         pool->raw_hw = NULL;
6988         sh->cmng.pending_queries--;
6989 }
6990
6991 static int
6992 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table,
6993                     const struct flow_grp_info *grp_info,
6994                     struct rte_flow_error *error)
6995 {
6996         if (grp_info->transfer && grp_info->external &&
6997             grp_info->fdb_def_rule) {
6998                 if (group == UINT32_MAX)
6999                         return rte_flow_error_set
7000                                                 (error, EINVAL,
7001                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
7002                                                  NULL,
7003                                                  "group index not supported");
7004                 *table = group + 1;
7005         } else {
7006                 *table = group;
7007         }
7008         DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table);
7009         return 0;
7010 }
7011
7012 /**
7013  * Translate the rte_flow group index to HW table value.
7014  *
7015  * If tunnel offload is disabled, all group ids converted to flow table
7016  * id using the standard method.
7017  * If tunnel offload is enabled, group id can be converted using the
7018  * standard or tunnel conversion method. Group conversion method
7019  * selection depends on flags in `grp_info` parameter:
7020  * - Internal (grp_info.external == 0) groups conversion uses the
7021  *   standard method.
7022  * - Group ids in JUMP action converted with the tunnel conversion.
7023  * - Group id in rule attribute conversion depends on a rule type and
7024  *   group id value:
7025  *   ** non zero group attributes converted with the tunnel method
7026  *   ** zero group attribute in non-tunnel rule is converted using the
7027  *      standard method - there's only one root table
7028  *   ** zero group attribute in steer tunnel rule is converted with the
7029  *      standard method - single root table
7030  *   ** zero group attribute in match tunnel rule is a special OvS
7031  *      case: that value is used for portability reasons. That group
7032  *      id is converted with the tunnel conversion method.
7033  *
7034  * @param[in] dev
7035  *   Port device
7036  * @param[in] tunnel
7037  *   PMD tunnel offload object
7038  * @param[in] group
7039  *   rte_flow group index value.
7040  * @param[out] table
7041  *   HW table value.
7042  * @param[in] grp_info
7043  *   flags used for conversion
7044  * @param[out] error
7045  *   Pointer to error structure.
7046  *
7047  * @return
7048  *   0 on success, a negative errno value otherwise and rte_errno is set.
7049  */
7050 int
7051 mlx5_flow_group_to_table(struct rte_eth_dev *dev,
7052                          const struct mlx5_flow_tunnel *tunnel,
7053                          uint32_t group, uint32_t *table,
7054                          const struct flow_grp_info *grp_info,
7055                          struct rte_flow_error *error)
7056 {
7057         int ret;
7058         bool standard_translation;
7059
7060         if (!grp_info->skip_scale && grp_info->external &&
7061             group < MLX5_MAX_TABLES_EXTERNAL)
7062                 group *= MLX5_FLOW_TABLE_FACTOR;
7063         if (is_tunnel_offload_active(dev)) {
7064                 standard_translation = !grp_info->external ||
7065                                         grp_info->std_tbl_fix;
7066         } else {
7067                 standard_translation = true;
7068         }
7069         DRV_LOG(DEBUG,
7070                 "port %u group=%u transfer=%d external=%d fdb_def_rule=%d translate=%s",
7071                 dev->data->port_id, group, grp_info->transfer,
7072                 grp_info->external, grp_info->fdb_def_rule,
7073                 standard_translation ? "STANDARD" : "TUNNEL");
7074         if (standard_translation)
7075                 ret = flow_group_to_table(dev->data->port_id, group, table,
7076                                           grp_info, error);
7077         else
7078                 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group,
7079                                                       table, error);
7080
7081         return ret;
7082 }
7083
7084 /**
7085  * Discover availability of metadata reg_c's.
7086  *
7087  * Iteratively use test flows to check availability.
7088  *
7089  * @param[in] dev
7090  *   Pointer to the Ethernet device structure.
7091  *
7092  * @return
7093  *   0 on success, a negative errno value otherwise and rte_errno is set.
7094  */
7095 int
7096 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
7097 {
7098         struct mlx5_priv *priv = dev->data->dev_private;
7099         struct mlx5_dev_config *config = &priv->config;
7100         enum modify_reg idx;
7101         int n = 0;
7102
7103         /* reg_c[0] and reg_c[1] are reserved. */
7104         config->flow_mreg_c[n++] = REG_C_0;
7105         config->flow_mreg_c[n++] = REG_C_1;
7106         /* Discover availability of other reg_c's. */
7107         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
7108                 struct rte_flow_attr attr = {
7109                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
7110                         .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
7111                         .ingress = 1,
7112                 };
7113                 struct rte_flow_item items[] = {
7114                         [0] = {
7115                                 .type = RTE_FLOW_ITEM_TYPE_END,
7116                         },
7117                 };
7118                 struct rte_flow_action actions[] = {
7119                         [0] = {
7120                                 .type = (enum rte_flow_action_type)
7121                                         MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
7122                                 .conf = &(struct mlx5_flow_action_copy_mreg){
7123                                         .src = REG_C_1,
7124                                         .dst = idx,
7125                                 },
7126                         },
7127                         [1] = {
7128                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
7129                                 .conf = &(struct rte_flow_action_jump){
7130                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
7131                                 },
7132                         },
7133                         [2] = {
7134                                 .type = RTE_FLOW_ACTION_TYPE_END,
7135                         },
7136                 };
7137                 uint32_t flow_idx;
7138                 struct rte_flow *flow;
7139                 struct rte_flow_error error;
7140
7141                 if (!config->dv_flow_en)
7142                         break;
7143                 /* Create internal flow, validation skips copy action. */
7144                 flow_idx = flow_list_create(dev, NULL, &attr, items,
7145                                             actions, false, &error);
7146                 flow = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW],
7147                                       flow_idx);
7148                 if (!flow)
7149                         continue;
7150                 config->flow_mreg_c[n++] = idx;
7151                 flow_list_destroy(dev, NULL, flow_idx);
7152         }
7153         for (; n < MLX5_MREG_C_NUM; ++n)
7154                 config->flow_mreg_c[n] = REG_NON;
7155         return 0;
7156 }
7157
7158 /**
7159  * Dump flow raw hw data to file
7160  *
7161  * @param[in] dev
7162  *    The pointer to Ethernet device.
7163  * @param[in] file
7164  *   A pointer to a file for output.
7165  * @param[out] error
7166  *   Perform verbose error reporting if not NULL. PMDs initialize this
7167  *   structure in case of error only.
7168  * @return
7169  *   0 on success, a nagative value otherwise.
7170  */
7171 int
7172 mlx5_flow_dev_dump(struct rte_eth_dev *dev,
7173                    FILE *file,
7174                    struct rte_flow_error *error __rte_unused)
7175 {
7176         struct mlx5_priv *priv = dev->data->dev_private;
7177         struct mlx5_dev_ctx_shared *sh = priv->sh;
7178
7179         if (!priv->config.dv_flow_en) {
7180                 if (fputs("device dv flow disabled\n", file) <= 0)
7181                         return -errno;
7182                 return -ENOTSUP;
7183         }
7184         return mlx5_devx_cmd_flow_dump(sh->fdb_domain, sh->rx_domain,
7185                                        sh->tx_domain, file);
7186 }
7187
7188 /**
7189  * Get aged-out flows.
7190  *
7191  * @param[in] dev
7192  *   Pointer to the Ethernet device structure.
7193  * @param[in] context
7194  *   The address of an array of pointers to the aged-out flows contexts.
7195  * @param[in] nb_countexts
7196  *   The length of context array pointers.
7197  * @param[out] error
7198  *   Perform verbose error reporting if not NULL. Initialized in case of
7199  *   error only.
7200  *
7201  * @return
7202  *   how many contexts get in success, otherwise negative errno value.
7203  *   if nb_contexts is 0, return the amount of all aged contexts.
7204  *   if nb_contexts is not 0 , return the amount of aged flows reported
7205  *   in the context array.
7206  */
7207 int
7208 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
7209                         uint32_t nb_contexts, struct rte_flow_error *error)
7210 {
7211         const struct mlx5_flow_driver_ops *fops;
7212         struct rte_flow_attr attr = { .transfer = 0 };
7213
7214         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7215                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7216                 return fops->get_aged_flows(dev, contexts, nb_contexts,
7217                                                     error);
7218         }
7219         DRV_LOG(ERR,
7220                 "port %u get aged flows is not supported.",
7221                  dev->data->port_id);
7222         return -ENOTSUP;
7223 }
7224
7225 /* Wrapper for driver action_validate op callback */
7226 static int
7227 flow_drv_action_validate(struct rte_eth_dev *dev,
7228                          const struct rte_flow_shared_action_conf *conf,
7229                          const struct rte_flow_action *action,
7230                          const struct mlx5_flow_driver_ops *fops,
7231                          struct rte_flow_error *error)
7232 {
7233         static const char err_msg[] = "shared action validation unsupported";
7234
7235         if (!fops->action_validate) {
7236                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7237                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7238                                    NULL, err_msg);
7239                 return -rte_errno;
7240         }
7241         return fops->action_validate(dev, conf, action, error);
7242 }
7243
7244 /**
7245  * Destroys the shared action by handle.
7246  *
7247  * @param dev
7248  *   Pointer to Ethernet device structure.
7249  * @param[in] action
7250  *   Handle for the shared action to be destroyed.
7251  * @param[out] error
7252  *   Perform verbose error reporting if not NULL. PMDs initialize this
7253  *   structure in case of error only.
7254  *
7255  * @return
7256  *   0 on success, a negative errno value otherwise and rte_errno is set.
7257  *
7258  * @note: wrapper for driver action_create op callback.
7259  */
7260 static int
7261 mlx5_shared_action_destroy(struct rte_eth_dev *dev,
7262                            struct rte_flow_shared_action *action,
7263                            struct rte_flow_error *error)
7264 {
7265         static const char err_msg[] = "shared action destruction unsupported";
7266         struct rte_flow_attr attr = { .transfer = 0 };
7267         const struct mlx5_flow_driver_ops *fops =
7268                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7269
7270         if (!fops->action_destroy) {
7271                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7272                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7273                                    NULL, err_msg);
7274                 return -rte_errno;
7275         }
7276         return fops->action_destroy(dev, action, error);
7277 }
7278
7279 /* Wrapper for driver action_destroy op callback */
7280 static int
7281 flow_drv_action_update(struct rte_eth_dev *dev,
7282                        struct rte_flow_shared_action *action,
7283                        const void *action_conf,
7284                        const struct mlx5_flow_driver_ops *fops,
7285                        struct rte_flow_error *error)
7286 {
7287         static const char err_msg[] = "shared action update unsupported";
7288
7289         if (!fops->action_update) {
7290                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7291                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7292                                    NULL, err_msg);
7293                 return -rte_errno;
7294         }
7295         return fops->action_update(dev, action, action_conf, error);
7296 }
7297
7298 /* Wrapper for driver action_destroy op callback */
7299 static int
7300 flow_drv_action_query(struct rte_eth_dev *dev,
7301                       const struct rte_flow_shared_action *action,
7302                       void *data,
7303                       const struct mlx5_flow_driver_ops *fops,
7304                       struct rte_flow_error *error)
7305 {
7306         static const char err_msg[] = "shared action query unsupported";
7307
7308         if (!fops->action_query) {
7309                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7310                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7311                                    NULL, err_msg);
7312                 return -rte_errno;
7313         }
7314         return fops->action_query(dev, action, data, error);
7315 }
7316
7317 /**
7318  * Create shared action for reuse in multiple flow rules.
7319  *
7320  * @param dev
7321  *   Pointer to Ethernet device structure.
7322  * @param[in] action
7323  *   Action configuration for shared action creation.
7324  * @param[out] error
7325  *   Perform verbose error reporting if not NULL. PMDs initialize this
7326  *   structure in case of error only.
7327  * @return
7328  *   A valid handle in case of success, NULL otherwise and rte_errno is set.
7329  */
7330 static struct rte_flow_shared_action *
7331 mlx5_shared_action_create(struct rte_eth_dev *dev,
7332                           const struct rte_flow_shared_action_conf *conf,
7333                           const struct rte_flow_action *action,
7334                           struct rte_flow_error *error)
7335 {
7336         static const char err_msg[] = "shared action creation unsupported";
7337         struct rte_flow_attr attr = { .transfer = 0 };
7338         const struct mlx5_flow_driver_ops *fops =
7339                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7340
7341         if (flow_drv_action_validate(dev, conf, action, fops, error))
7342                 return NULL;
7343         if (!fops->action_create) {
7344                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7345                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7346                                    NULL, err_msg);
7347                 return NULL;
7348         }
7349         return fops->action_create(dev, conf, action, error);
7350 }
7351
7352 /**
7353  * Updates inplace the shared action configuration pointed by *action* handle
7354  * with the configuration provided as *action* argument.
7355  * The update of the shared action configuration effects all flow rules reusing
7356  * the action via handle.
7357  *
7358  * @param dev
7359  *   Pointer to Ethernet device structure.
7360  * @param[in] shared_action
7361  *   Handle for the shared action to be updated.
7362  * @param[in] action
7363  *   Action specification used to modify the action pointed by handle.
7364  *   *action* should be of same type with the action pointed by the *action*
7365  *   handle argument, otherwise considered as invalid.
7366  * @param[out] error
7367  *   Perform verbose error reporting if not NULL. PMDs initialize this
7368  *   structure in case of error only.
7369  *
7370  * @return
7371  *   0 on success, a negative errno value otherwise and rte_errno is set.
7372  */
7373 static int
7374 mlx5_shared_action_update(struct rte_eth_dev *dev,
7375                 struct rte_flow_shared_action *shared_action,
7376                 const struct rte_flow_action *action,
7377                 struct rte_flow_error *error)
7378 {
7379         struct rte_flow_attr attr = { .transfer = 0 };
7380         const struct mlx5_flow_driver_ops *fops =
7381                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7382         int ret;
7383
7384         ret = flow_drv_action_validate(dev, NULL, action, fops, error);
7385         if (ret)
7386                 return ret;
7387         return flow_drv_action_update(dev, shared_action, action->conf, fops,
7388                                       error);
7389 }
7390
7391 /**
7392  * Query the shared action by handle.
7393  *
7394  * This function allows retrieving action-specific data such as counters.
7395  * Data is gathered by special action which may be present/referenced in
7396  * more than one flow rule definition.
7397  *
7398  * \see RTE_FLOW_ACTION_TYPE_COUNT
7399  *
7400  * @param dev
7401  *   Pointer to Ethernet device structure.
7402  * @param[in] action
7403  *   Handle for the shared action to query.
7404  * @param[in, out] data
7405  *   Pointer to storage for the associated query data type.
7406  * @param[out] error
7407  *   Perform verbose error reporting if not NULL. PMDs initialize this
7408  *   structure in case of error only.
7409  *
7410  * @return
7411  *   0 on success, a negative errno value otherwise and rte_errno is set.
7412  */
7413 static int
7414 mlx5_shared_action_query(struct rte_eth_dev *dev,
7415                          const struct rte_flow_shared_action *action,
7416                          void *data,
7417                          struct rte_flow_error *error)
7418 {
7419         struct rte_flow_attr attr = { .transfer = 0 };
7420         const struct mlx5_flow_driver_ops *fops =
7421                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7422
7423         return flow_drv_action_query(dev, action, data, fops, error);
7424 }
7425
7426 /**
7427  * Destroy all shared actions.
7428  *
7429  * @param dev
7430  *   Pointer to Ethernet device.
7431  *
7432  * @return
7433  *   0 on success, a negative errno value otherwise and rte_errno is set.
7434  */
7435 int
7436 mlx5_shared_action_flush(struct rte_eth_dev *dev)
7437 {
7438         struct rte_flow_error error;
7439         struct mlx5_priv *priv = dev->data->dev_private;
7440         struct mlx5_shared_action_rss *shared_rss;
7441         int ret = 0;
7442         uint32_t idx;
7443
7444         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
7445                       priv->rss_shared_actions, idx, shared_rss, next) {
7446                 ret |= mlx5_shared_action_destroy(dev,
7447                        (struct rte_flow_shared_action *)(uintptr_t)idx, &error);
7448         }
7449         return ret;
7450 }
7451
7452 #ifndef HAVE_MLX5DV_DR
7453 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1))
7454 #else
7455 #define MLX5_DOMAIN_SYNC_FLOW \
7456         (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW)
7457 #endif
7458
7459 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
7460 {
7461         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
7462         const struct mlx5_flow_driver_ops *fops;
7463         int ret;
7464         struct rte_flow_attr attr = { .transfer = 0 };
7465
7466         fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7467         ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW);
7468         if (ret > 0)
7469                 ret = -ret;
7470         return ret;
7471 }
7472
7473 /**
7474  * tunnel offload functionalilty is defined for DV environment only
7475  */
7476 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
7477 __extension__
7478 union tunnel_offload_mark {
7479         uint32_t val;
7480         struct {
7481                 uint32_t app_reserve:8;
7482                 uint32_t table_id:15;
7483                 uint32_t transfer:1;
7484                 uint32_t _unused_:8;
7485         };
7486 };
7487
7488 static bool
7489 mlx5_access_tunnel_offload_db
7490         (struct rte_eth_dev *dev,
7491          bool (*match)(struct rte_eth_dev *,
7492                        struct mlx5_flow_tunnel *, const void *),
7493          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
7494          void (*miss)(struct rte_eth_dev *, void *),
7495          void *ctx, bool lock_op);
7496
7497 static int
7498 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
7499                              struct rte_flow *flow,
7500                              const struct rte_flow_attr *attr,
7501                              const struct rte_flow_action *app_actions,
7502                              uint32_t flow_idx,
7503                              struct tunnel_default_miss_ctx *ctx,
7504                              struct rte_flow_error *error)
7505 {
7506         struct mlx5_priv *priv = dev->data->dev_private;
7507         struct mlx5_flow *dev_flow;
7508         struct rte_flow_attr miss_attr = *attr;
7509         const struct mlx5_flow_tunnel *tunnel = app_actions[0].conf;
7510         const struct rte_flow_item miss_items[2] = {
7511                 {
7512                         .type = RTE_FLOW_ITEM_TYPE_ETH,
7513                         .spec = NULL,
7514                         .last = NULL,
7515                         .mask = NULL
7516                 },
7517                 {
7518                         .type = RTE_FLOW_ITEM_TYPE_END,
7519                         .spec = NULL,
7520                         .last = NULL,
7521                         .mask = NULL
7522                 }
7523         };
7524         union tunnel_offload_mark mark_id;
7525         struct rte_flow_action_mark miss_mark;
7526         struct rte_flow_action miss_actions[3] = {
7527                 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark },
7528                 [2] = { .type = RTE_FLOW_ACTION_TYPE_END,  .conf = NULL }
7529         };
7530         const struct rte_flow_action_jump *jump_data;
7531         uint32_t i, flow_table = 0; /* prevent compilation warning */
7532         struct flow_grp_info grp_info = {
7533                 .external = 1,
7534                 .transfer = attr->transfer,
7535                 .fdb_def_rule = !!priv->fdb_def_rule,
7536                 .std_tbl_fix = 0,
7537         };
7538         int ret;
7539
7540         if (!attr->transfer) {
7541                 uint32_t q_size;
7542
7543                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS;
7544                 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]);
7545                 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size,
7546                                          0, SOCKET_ID_ANY);
7547                 if (!ctx->queue)
7548                         return rte_flow_error_set
7549                                 (error, ENOMEM,
7550                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
7551                                 NULL, "invalid default miss RSS");
7552                 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT,
7553                 ctx->action_rss.level = 0,
7554                 ctx->action_rss.types = priv->rss_conf.rss_hf,
7555                 ctx->action_rss.key_len = priv->rss_conf.rss_key_len,
7556                 ctx->action_rss.queue_num = priv->reta_idx_n,
7557                 ctx->action_rss.key = priv->rss_conf.rss_key,
7558                 ctx->action_rss.queue = ctx->queue;
7559                 if (!priv->reta_idx_n || !priv->rxqs_n)
7560                         return rte_flow_error_set
7561                                 (error, EINVAL,
7562                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
7563                                 NULL, "invalid port configuration");
7564                 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
7565                         ctx->action_rss.types = 0;
7566                 for (i = 0; i != priv->reta_idx_n; ++i)
7567                         ctx->queue[i] = (*priv->reta_idx)[i];
7568         } else {
7569                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP;
7570                 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP;
7571         }
7572         miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw;
7573         for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++);
7574         jump_data = app_actions->conf;
7575         miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY;
7576         miss_attr.group = jump_data->group;
7577         ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group,
7578                                        &flow_table, &grp_info, error);
7579         if (ret)
7580                 return rte_flow_error_set(error, EINVAL,
7581                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
7582                                           NULL, "invalid tunnel id");
7583         mark_id.app_reserve = 0;
7584         mark_id.table_id = tunnel_flow_tbl_to_id(flow_table);
7585         mark_id.transfer = !!attr->transfer;
7586         mark_id._unused_ = 0;
7587         miss_mark.id = mark_id.val;
7588         dev_flow = flow_drv_prepare(dev, flow, &miss_attr,
7589                                     miss_items, miss_actions, flow_idx, error);
7590         if (!dev_flow)
7591                 return -rte_errno;
7592         dev_flow->flow = flow;
7593         dev_flow->external = true;
7594         dev_flow->tunnel = tunnel;
7595         /* Subflow object was created, we must include one in the list. */
7596         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
7597                       dev_flow->handle, next);
7598         DRV_LOG(DEBUG,
7599                 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u",
7600                 dev->data->port_id, tunnel->app_tunnel.type,
7601                 tunnel->tunnel_id, miss_attr.priority, miss_attr.group);
7602         ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items,
7603                                   miss_actions, error);
7604         if (!ret)
7605                 ret = flow_mreg_update_copy_table(dev, flow, miss_actions,
7606                                                   error);
7607
7608         return ret;
7609 }
7610
7611 static const struct mlx5_flow_tbl_data_entry  *
7612 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark)
7613 {
7614         struct mlx5_priv *priv = dev->data->dev_private;
7615         struct mlx5_dev_ctx_shared *sh = priv->sh;
7616         struct mlx5_hlist_entry *he;
7617         union tunnel_offload_mark mbits = { .val = mark };
7618         union mlx5_flow_tbl_key table_key = {
7619                 {
7620                         .table_id = tunnel_id_to_flow_tbl(mbits.table_id),
7621                         .dummy = 0,
7622                         .domain = !!mbits.transfer,
7623                         .direction = 0,
7624                 }
7625         };
7626         he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, NULL);
7627         return he ?
7628                container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL;
7629 }
7630
7631 static void
7632 mlx5_flow_tunnel_grp2tbl_remove_cb(struct mlx5_hlist *list,
7633                                    struct mlx5_hlist_entry *entry)
7634 {
7635         struct mlx5_dev_ctx_shared *sh = list->ctx;
7636         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
7637
7638         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
7639                         tunnel_flow_tbl_to_id(tte->flow_table));
7640         mlx5_free(tte);
7641 }
7642
7643 static int
7644 mlx5_flow_tunnel_grp2tbl_match_cb(struct mlx5_hlist *list __rte_unused,
7645                                   struct mlx5_hlist_entry *entry,
7646                                   uint64_t key, void *cb_ctx __rte_unused)
7647 {
7648         union tunnel_tbl_key tbl = {
7649                 .val = key,
7650         };
7651         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
7652
7653         return tbl.tunnel_id != tte->tunnel_id || tbl.group != tte->group;
7654 }
7655
7656 static struct mlx5_hlist_entry *
7657 mlx5_flow_tunnel_grp2tbl_create_cb(struct mlx5_hlist *list, uint64_t key,
7658                                    void *ctx __rte_unused)
7659 {
7660         struct mlx5_dev_ctx_shared *sh = list->ctx;
7661         struct tunnel_tbl_entry *tte;
7662         union tunnel_tbl_key tbl = {
7663                 .val = key,
7664         };
7665
7666         tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
7667                           sizeof(*tte), 0,
7668                           SOCKET_ID_ANY);
7669         if (!tte)
7670                 goto err;
7671         mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
7672                           &tte->flow_table);
7673         if (tte->flow_table >= MLX5_MAX_TABLES) {
7674                 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.",
7675                         tte->flow_table);
7676                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
7677                                 tte->flow_table);
7678                 goto err;
7679         } else if (!tte->flow_table) {
7680                 goto err;
7681         }
7682         tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table);
7683         tte->tunnel_id = tbl.tunnel_id;
7684         tte->group = tbl.group;
7685         return &tte->hash;
7686 err:
7687         if (tte)
7688                 mlx5_free(tte);
7689         return NULL;
7690 }
7691
7692 static uint32_t
7693 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
7694                                 const struct mlx5_flow_tunnel *tunnel,
7695                                 uint32_t group, uint32_t *table,
7696                                 struct rte_flow_error *error)
7697 {
7698         struct mlx5_hlist_entry *he;
7699         struct tunnel_tbl_entry *tte;
7700         union tunnel_tbl_key key = {
7701                 .tunnel_id = tunnel ? tunnel->tunnel_id : 0,
7702                 .group = group
7703         };
7704         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
7705         struct mlx5_hlist *group_hash;
7706
7707         group_hash = tunnel ? tunnel->groups : thub->groups;
7708         he = mlx5_hlist_register(group_hash, key.val, NULL);
7709         if (!he)
7710                 return rte_flow_error_set(error, EINVAL,
7711                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
7712                                           NULL,
7713                                           "tunnel group index not supported");
7714         tte = container_of(he, typeof(*tte), hash);
7715         *table = tte->flow_table;
7716         DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x",
7717                 dev->data->port_id, key.tunnel_id, group, *table);
7718         return 0;
7719 }
7720
7721 static void
7722 mlx5_flow_tunnel_free(struct rte_eth_dev *dev,
7723                       struct mlx5_flow_tunnel *tunnel)
7724 {
7725         struct mlx5_priv *priv = dev->data->dev_private;
7726         struct mlx5_indexed_pool *ipool;
7727
7728         DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x",
7729                 dev->data->port_id, tunnel->tunnel_id);
7730         LIST_REMOVE(tunnel, chain);
7731         mlx5_hlist_destroy(tunnel->groups);
7732         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
7733         mlx5_ipool_free(ipool, tunnel->tunnel_id);
7734 }
7735
7736 static bool
7737 mlx5_access_tunnel_offload_db
7738         (struct rte_eth_dev *dev,
7739          bool (*match)(struct rte_eth_dev *,
7740                        struct mlx5_flow_tunnel *, const void *),
7741          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
7742          void (*miss)(struct rte_eth_dev *, void *),
7743          void *ctx, bool lock_op)
7744 {
7745         bool verdict = false;
7746         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
7747         struct mlx5_flow_tunnel *tunnel;
7748
7749         rte_spinlock_lock(&thub->sl);
7750         LIST_FOREACH(tunnel, &thub->tunnels, chain) {
7751                 verdict = match(dev, tunnel, (const void *)ctx);
7752                 if (verdict)
7753                         break;
7754         }
7755         if (!lock_op)
7756                 rte_spinlock_unlock(&thub->sl);
7757         if (verdict && hit)
7758                 hit(dev, tunnel, ctx);
7759         if (!verdict && miss)
7760                 miss(dev, ctx);
7761         if (lock_op)
7762                 rte_spinlock_unlock(&thub->sl);
7763
7764         return verdict;
7765 }
7766
7767 struct tunnel_db_find_tunnel_id_ctx {
7768         uint32_t tunnel_id;
7769         struct mlx5_flow_tunnel *tunnel;
7770 };
7771
7772 static bool
7773 find_tunnel_id_match(struct rte_eth_dev *dev,
7774                      struct mlx5_flow_tunnel *tunnel, const void *x)
7775 {
7776         const struct tunnel_db_find_tunnel_id_ctx *ctx = x;
7777
7778         RTE_SET_USED(dev);
7779         return tunnel->tunnel_id == ctx->tunnel_id;
7780 }
7781
7782 static void
7783 find_tunnel_id_hit(struct rte_eth_dev *dev,
7784                    struct mlx5_flow_tunnel *tunnel, void *x)
7785 {
7786         struct tunnel_db_find_tunnel_id_ctx *ctx = x;
7787         RTE_SET_USED(dev);
7788         ctx->tunnel = tunnel;
7789 }
7790
7791 static struct mlx5_flow_tunnel *
7792 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id)
7793 {
7794         struct tunnel_db_find_tunnel_id_ctx ctx = {
7795                 .tunnel_id = id,
7796         };
7797
7798         mlx5_access_tunnel_offload_db(dev, find_tunnel_id_match,
7799                                       find_tunnel_id_hit, NULL, &ctx, true);
7800
7801         return ctx.tunnel;
7802 }
7803
7804 static struct mlx5_flow_tunnel *
7805 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev,
7806                           const struct rte_flow_tunnel *app_tunnel)
7807 {
7808         struct mlx5_priv *priv = dev->data->dev_private;
7809         struct mlx5_indexed_pool *ipool;
7810         struct mlx5_flow_tunnel *tunnel;
7811         uint32_t id;
7812
7813         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
7814         tunnel = mlx5_ipool_zmalloc(ipool, &id);
7815         if (!tunnel)
7816                 return NULL;
7817         if (id >= MLX5_MAX_TUNNELS) {
7818                 mlx5_ipool_free(ipool, id);
7819                 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id);
7820                 return NULL;
7821         }
7822         tunnel->groups = mlx5_hlist_create("tunnel groups", 1024, 0, 0,
7823                                            mlx5_flow_tunnel_grp2tbl_create_cb,
7824                                            mlx5_flow_tunnel_grp2tbl_match_cb,
7825                                            mlx5_flow_tunnel_grp2tbl_remove_cb);
7826         if (!tunnel->groups) {
7827                 mlx5_ipool_free(ipool, id);
7828                 return NULL;
7829         }
7830         tunnel->groups->ctx = priv->sh;
7831         /* initiate new PMD tunnel */
7832         memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel));
7833         tunnel->tunnel_id = id;
7834         tunnel->action.type = (typeof(tunnel->action.type))
7835                               MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET;
7836         tunnel->action.conf = tunnel;
7837         tunnel->item.type = (typeof(tunnel->item.type))
7838                             MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL;
7839         tunnel->item.spec = tunnel;
7840         tunnel->item.last = NULL;
7841         tunnel->item.mask = NULL;
7842
7843         DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x",
7844                 dev->data->port_id, tunnel->tunnel_id);
7845
7846         return tunnel;
7847 }
7848
7849 struct tunnel_db_get_tunnel_ctx {
7850         const struct rte_flow_tunnel *app_tunnel;
7851         struct mlx5_flow_tunnel *tunnel;
7852 };
7853
7854 static bool get_tunnel_match(struct rte_eth_dev *dev,
7855                              struct mlx5_flow_tunnel *tunnel, const void *x)
7856 {
7857         const struct tunnel_db_get_tunnel_ctx *ctx = x;
7858
7859         RTE_SET_USED(dev);
7860         return !memcmp(ctx->app_tunnel, &tunnel->app_tunnel,
7861                        sizeof(*ctx->app_tunnel));
7862 }
7863
7864 static void get_tunnel_hit(struct rte_eth_dev *dev,
7865                            struct mlx5_flow_tunnel *tunnel, void *x)
7866 {
7867         /* called under tunnel spinlock protection */
7868         struct tunnel_db_get_tunnel_ctx *ctx = x;
7869
7870         RTE_SET_USED(dev);
7871         tunnel->refctn++;
7872         ctx->tunnel = tunnel;
7873 }
7874
7875 static void get_tunnel_miss(struct rte_eth_dev *dev, void *x)
7876 {
7877         /* called under tunnel spinlock protection */
7878         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
7879         struct tunnel_db_get_tunnel_ctx *ctx = x;
7880
7881         rte_spinlock_unlock(&thub->sl);
7882         ctx->tunnel = mlx5_flow_tunnel_allocate(dev, ctx->app_tunnel);
7883         rte_spinlock_lock(&thub->sl);
7884         if (ctx->tunnel) {
7885                 ctx->tunnel->refctn = 1;
7886                 LIST_INSERT_HEAD(&thub->tunnels, ctx->tunnel, chain);
7887         }
7888 }
7889
7890
7891 static int
7892 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
7893                      const struct rte_flow_tunnel *app_tunnel,
7894                      struct mlx5_flow_tunnel **tunnel)
7895 {
7896         struct tunnel_db_get_tunnel_ctx ctx = {
7897                 .app_tunnel = app_tunnel,
7898         };
7899
7900         mlx5_access_tunnel_offload_db(dev, get_tunnel_match, get_tunnel_hit,
7901                                       get_tunnel_miss, &ctx, true);
7902         *tunnel = ctx.tunnel;
7903         return ctx.tunnel ? 0 : -ENOMEM;
7904 }
7905
7906 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id)
7907 {
7908         struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
7909
7910         if (!thub)
7911                 return;
7912         if (!LIST_EMPTY(&thub->tunnels))
7913                 DRV_LOG(WARNING, "port %u tunnels present", port_id);
7914         mlx5_hlist_destroy(thub->groups);
7915         mlx5_free(thub);
7916 }
7917
7918 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh)
7919 {
7920         int err;
7921         struct mlx5_flow_tunnel_hub *thub;
7922
7923         thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub),
7924                            0, SOCKET_ID_ANY);
7925         if (!thub)
7926                 return -ENOMEM;
7927         LIST_INIT(&thub->tunnels);
7928         rte_spinlock_init(&thub->sl);
7929         thub->groups = mlx5_hlist_create("flow groups",
7930                                          rte_align32pow2(MLX5_MAX_TABLES), 0,
7931                                          0, mlx5_flow_tunnel_grp2tbl_create_cb,
7932                                          mlx5_flow_tunnel_grp2tbl_match_cb,
7933                                          mlx5_flow_tunnel_grp2tbl_remove_cb);
7934         if (!thub->groups) {
7935                 err = -rte_errno;
7936                 goto err;
7937         }
7938         thub->groups->ctx = sh;
7939         sh->tunnel_hub = thub;
7940
7941         return 0;
7942
7943 err:
7944         if (thub->groups)
7945                 mlx5_hlist_destroy(thub->groups);
7946         if (thub)
7947                 mlx5_free(thub);
7948         return err;
7949 }
7950
7951 static inline bool
7952 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev,
7953                           struct rte_flow_tunnel *tunnel,
7954                           const char *err_msg)
7955 {
7956         err_msg = NULL;
7957         if (!is_tunnel_offload_active(dev)) {
7958                 err_msg = "tunnel offload was not activated";
7959                 goto out;
7960         } else if (!tunnel) {
7961                 err_msg = "no application tunnel";
7962                 goto out;
7963         }
7964
7965         switch (tunnel->type) {
7966         default:
7967                 err_msg = "unsupported tunnel type";
7968                 goto out;
7969         case RTE_FLOW_ITEM_TYPE_VXLAN:
7970                 break;
7971         }
7972
7973 out:
7974         return !err_msg;
7975 }
7976
7977 static int
7978 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
7979                     struct rte_flow_tunnel *app_tunnel,
7980                     struct rte_flow_action **actions,
7981                     uint32_t *num_of_actions,
7982                     struct rte_flow_error *error)
7983 {
7984         int ret;
7985         struct mlx5_flow_tunnel *tunnel;
7986         const char *err_msg = NULL;
7987         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
7988
7989         if (!verdict)
7990                 return rte_flow_error_set(error, EINVAL,
7991                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
7992                                           err_msg);
7993         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
7994         if (ret < 0) {
7995                 return rte_flow_error_set(error, ret,
7996                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
7997                                           "failed to initialize pmd tunnel");
7998         }
7999         *actions = &tunnel->action;
8000         *num_of_actions = 1;
8001         return 0;
8002 }
8003
8004 static int
8005 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
8006                        struct rte_flow_tunnel *app_tunnel,
8007                        struct rte_flow_item **items,
8008                        uint32_t *num_of_items,
8009                        struct rte_flow_error *error)
8010 {
8011         int ret;
8012         struct mlx5_flow_tunnel *tunnel;
8013         const char *err_msg = NULL;
8014         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
8015
8016         if (!verdict)
8017                 return rte_flow_error_set(error, EINVAL,
8018                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
8019                                           err_msg);
8020         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
8021         if (ret < 0) {
8022                 return rte_flow_error_set(error, ret,
8023                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
8024                                           "failed to initialize pmd tunnel");
8025         }
8026         *items = &tunnel->item;
8027         *num_of_items = 1;
8028         return 0;
8029 }
8030
8031 struct tunnel_db_element_release_ctx {
8032         struct rte_flow_item *items;
8033         struct rte_flow_action *actions;
8034         uint32_t num_elements;
8035         struct rte_flow_error *error;
8036         int ret;
8037 };
8038
8039 static bool
8040 tunnel_element_release_match(struct rte_eth_dev *dev,
8041                              struct mlx5_flow_tunnel *tunnel, const void *x)
8042 {
8043         const struct tunnel_db_element_release_ctx *ctx = x;
8044
8045         RTE_SET_USED(dev);
8046         if (ctx->num_elements != 1)
8047                 return false;
8048         else if (ctx->items)
8049                 return ctx->items == &tunnel->item;
8050         else if (ctx->actions)
8051                 return ctx->actions == &tunnel->action;
8052
8053         return false;
8054 }
8055
8056 static void
8057 tunnel_element_release_hit(struct rte_eth_dev *dev,
8058                            struct mlx5_flow_tunnel *tunnel, void *x)
8059 {
8060         struct tunnel_db_element_release_ctx *ctx = x;
8061         ctx->ret = 0;
8062         if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
8063                 mlx5_flow_tunnel_free(dev, tunnel);
8064 }
8065
8066 static void
8067 tunnel_element_release_miss(struct rte_eth_dev *dev, void *x)
8068 {
8069         struct tunnel_db_element_release_ctx *ctx = x;
8070         RTE_SET_USED(dev);
8071         ctx->ret = rte_flow_error_set(ctx->error, EINVAL,
8072                                       RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
8073                                       "invalid argument");
8074 }
8075
8076 static int
8077 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
8078                        struct rte_flow_item *pmd_items,
8079                        uint32_t num_items, struct rte_flow_error *err)
8080 {
8081         struct tunnel_db_element_release_ctx ctx = {
8082                 .items = pmd_items,
8083                 .actions = NULL,
8084                 .num_elements = num_items,
8085                 .error = err,
8086         };
8087
8088         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
8089                                       tunnel_element_release_hit,
8090                                       tunnel_element_release_miss, &ctx, false);
8091
8092         return ctx.ret;
8093 }
8094
8095 static int
8096 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
8097                          struct rte_flow_action *pmd_actions,
8098                          uint32_t num_actions, struct rte_flow_error *err)
8099 {
8100         struct tunnel_db_element_release_ctx ctx = {
8101                 .items = NULL,
8102                 .actions = pmd_actions,
8103                 .num_elements = num_actions,
8104                 .error = err,
8105         };
8106
8107         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
8108                                       tunnel_element_release_hit,
8109                                       tunnel_element_release_miss, &ctx, false);
8110
8111         return ctx.ret;
8112 }
8113
8114 static int
8115 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
8116                                   struct rte_mbuf *m,
8117                                   struct rte_flow_restore_info *info,
8118                                   struct rte_flow_error *err)
8119 {
8120         uint64_t ol_flags = m->ol_flags;
8121         const struct mlx5_flow_tbl_data_entry *tble;
8122         const uint64_t mask = PKT_RX_FDIR | PKT_RX_FDIR_ID;
8123
8124         if (!is_tunnel_offload_active(dev)) {
8125                 info->flags = 0;
8126                 return 0;
8127         }
8128
8129         if ((ol_flags & mask) != mask)
8130                 goto err;
8131         tble = tunnel_mark_decode(dev, m->hash.fdir.hi);
8132         if (!tble) {
8133                 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x",
8134                         dev->data->port_id, m->hash.fdir.hi);
8135                 goto err;
8136         }
8137         MLX5_ASSERT(tble->tunnel);
8138         memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel));
8139         info->group_id = tble->group_id;
8140         info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL |
8141                       RTE_FLOW_RESTORE_INFO_GROUP_ID |
8142                       RTE_FLOW_RESTORE_INFO_ENCAPSULATED;
8143
8144         return 0;
8145
8146 err:
8147         return rte_flow_error_set(err, EINVAL,
8148                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8149                                   "failed to get restore info");
8150 }
8151
8152 #else /* HAVE_IBV_FLOW_DV_SUPPORT */
8153 static int
8154 mlx5_flow_tunnel_decap_set(__rte_unused struct rte_eth_dev *dev,
8155                            __rte_unused struct rte_flow_tunnel *app_tunnel,
8156                            __rte_unused struct rte_flow_action **actions,
8157                            __rte_unused uint32_t *num_of_actions,
8158                            __rte_unused struct rte_flow_error *error)
8159 {
8160         return -ENOTSUP;
8161 }
8162
8163 static int
8164 mlx5_flow_tunnel_match(__rte_unused struct rte_eth_dev *dev,
8165                        __rte_unused struct rte_flow_tunnel *app_tunnel,
8166                        __rte_unused struct rte_flow_item **items,
8167                        __rte_unused uint32_t *num_of_items,
8168                        __rte_unused struct rte_flow_error *error)
8169 {
8170         return -ENOTSUP;
8171 }
8172
8173 static int
8174 mlx5_flow_tunnel_item_release(__rte_unused struct rte_eth_dev *dev,
8175                               __rte_unused struct rte_flow_item *pmd_items,
8176                               __rte_unused uint32_t num_items,
8177                               __rte_unused struct rte_flow_error *err)
8178 {
8179         return -ENOTSUP;
8180 }
8181
8182 static int
8183 mlx5_flow_tunnel_action_release(__rte_unused struct rte_eth_dev *dev,
8184                                 __rte_unused struct rte_flow_action *pmd_action,
8185                                 __rte_unused uint32_t num_actions,
8186                                 __rte_unused struct rte_flow_error *err)
8187 {
8188         return -ENOTSUP;
8189 }
8190
8191 static int
8192 mlx5_flow_tunnel_get_restore_info(__rte_unused struct rte_eth_dev *dev,
8193                                   __rte_unused struct rte_mbuf *m,
8194                                   __rte_unused struct rte_flow_restore_info *i,
8195                                   __rte_unused struct rte_flow_error *err)
8196 {
8197         return -ENOTSUP;
8198 }
8199
8200 static int
8201 flow_tunnel_add_default_miss(__rte_unused struct rte_eth_dev *dev,
8202                              __rte_unused struct rte_flow *flow,
8203                              __rte_unused const struct rte_flow_attr *attr,
8204                              __rte_unused const struct rte_flow_action *actions,
8205                              __rte_unused uint32_t flow_idx,
8206                              __rte_unused struct tunnel_default_miss_ctx *ctx,
8207                              __rte_unused struct rte_flow_error *error)
8208 {
8209         return -ENOTSUP;
8210 }
8211
8212 static struct mlx5_flow_tunnel *
8213 mlx5_find_tunnel_id(__rte_unused struct rte_eth_dev *dev,
8214                     __rte_unused uint32_t id)
8215 {
8216         return NULL;
8217 }
8218
8219 static void
8220 mlx5_flow_tunnel_free(__rte_unused struct rte_eth_dev *dev,
8221                       __rte_unused struct mlx5_flow_tunnel *tunnel)
8222 {
8223 }
8224
8225 static uint32_t
8226 tunnel_flow_group_to_flow_table(__rte_unused struct rte_eth_dev *dev,
8227                                 __rte_unused const struct mlx5_flow_tunnel *t,
8228                                 __rte_unused uint32_t group,
8229                                 __rte_unused uint32_t *table,
8230                                 struct rte_flow_error *error)
8231 {
8232         return rte_flow_error_set(error, ENOTSUP,
8233                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8234                                   "tunnel offload requires DV support");
8235 }
8236
8237 void
8238 mlx5_release_tunnel_hub(__rte_unused struct mlx5_dev_ctx_shared *sh,
8239                         __rte_unused  uint16_t port_id)
8240 {
8241 }
8242 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */