drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <netinet/in.h>
   7 #include <sys/queue.h>
   8 #include <stdalign.h>
   9 #include <stdint.h>
  10 #include <string.h>
  11
  12 /* Verbs header. */
  13 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  14 #ifdef PEDANTIC
  15 #pragma GCC diagnostic ignored "-Wpedantic"
  16 #endif
  17 #include <infiniband/verbs.h>
  18 #ifdef PEDANTIC
  19 #pragma GCC diagnostic error "-Wpedantic"
  20 #endif
  21
  22 #include <rte_common.h>
  23 #include <rte_ether.h>
  24 #include <rte_ethdev_driver.h>
  25 #include <rte_flow.h>
  26 #include <rte_flow_driver.h>
  27 #include <rte_malloc.h>
  28 #include <rte_ip.h>
  29
  30 #include "mlx5.h"
  31 #include "mlx5_defs.h"
  32 #include "mlx5_flow.h"
  33 #include "mlx5_glue.h"
  34 #include "mlx5_prm.h"
  35 #include "mlx5_rxtx.h"
  36
  37 /* Dev ops structure defined in mlx5.c */
  38 extern const struct eth_dev_ops mlx5_dev_ops;
  39 extern const struct eth_dev_ops mlx5_dev_ops_isolate;
  40
  41 /** Device flow drivers. */
  42 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  43 extern const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops;
  44 #endif
  45 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  46
  47 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  48
  49 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  50         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  51 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  52         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  53 #endif
  54         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  55         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  56 };
  57
  58 enum mlx5_expansion {
  59         MLX5_EXPANSION_ROOT,
  60         MLX5_EXPANSION_ROOT_OUTER,
  61         MLX5_EXPANSION_ROOT_ETH_VLAN,
  62         MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
  63         MLX5_EXPANSION_OUTER_ETH,
  64         MLX5_EXPANSION_OUTER_ETH_VLAN,
  65         MLX5_EXPANSION_OUTER_VLAN,
  66         MLX5_EXPANSION_OUTER_IPV4,
  67         MLX5_EXPANSION_OUTER_IPV4_UDP,
  68         MLX5_EXPANSION_OUTER_IPV4_TCP,
  69         MLX5_EXPANSION_OUTER_IPV6,
  70         MLX5_EXPANSION_OUTER_IPV6_UDP,
  71         MLX5_EXPANSION_OUTER_IPV6_TCP,
  72         MLX5_EXPANSION_VXLAN,
  73         MLX5_EXPANSION_VXLAN_GPE,
  74         MLX5_EXPANSION_GRE,
  75         MLX5_EXPANSION_MPLS,
  76         MLX5_EXPANSION_ETH,
  77         MLX5_EXPANSION_ETH_VLAN,
  78         MLX5_EXPANSION_VLAN,
  79         MLX5_EXPANSION_IPV4,
  80         MLX5_EXPANSION_IPV4_UDP,
  81         MLX5_EXPANSION_IPV4_TCP,
  82         MLX5_EXPANSION_IPV6,
  83         MLX5_EXPANSION_IPV6_UDP,
  84         MLX5_EXPANSION_IPV6_TCP,
  85 };
  86
  87 /** Supported expansion of items. */
  88 static const struct rte_flow_expand_node mlx5_support_expansion[] = {
  89         [MLX5_EXPANSION_ROOT] = {
  90                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
  91                                                  MLX5_EXPANSION_IPV4,
  92                                                  MLX5_EXPANSION_IPV6),
  93                 .type = RTE_FLOW_ITEM_TYPE_END,
  94         },
  95         [MLX5_EXPANSION_ROOT_OUTER] = {
  96                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
  97                                                  MLX5_EXPANSION_OUTER_IPV4,
  98                                                  MLX5_EXPANSION_OUTER_IPV6),
  99                 .type = RTE_FLOW_ITEM_TYPE_END,
 100         },
 101         [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
 102                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
 103                 .type = RTE_FLOW_ITEM_TYPE_END,
 104         },
 105         [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
 106                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH_VLAN),
 107                 .type = RTE_FLOW_ITEM_TYPE_END,
 108         },
 109         [MLX5_EXPANSION_OUTER_ETH] = {
 110                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 111                                                  MLX5_EXPANSION_OUTER_IPV6,
 112                                                  MLX5_EXPANSION_MPLS),
 113                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 114                 .rss_types = 0,
 115         },
 116         [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
 117                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 118                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 119                 .rss_types = 0,
 120         },
 121         [MLX5_EXPANSION_OUTER_VLAN] = {
 122                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 123                                                  MLX5_EXPANSION_OUTER_IPV6),
 124                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 125         },
 126         [MLX5_EXPANSION_OUTER_IPV4] = {
 127                 .next = RTE_FLOW_EXPAND_RSS_NEXT
 128                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 129                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 130                          MLX5_EXPANSION_GRE),
 131                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 132                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 133                         ETH_RSS_NONFRAG_IPV4_OTHER,
 134         },
 135         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 136                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 137                                                  MLX5_EXPANSION_VXLAN_GPE),
 138                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 139                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 140         },
 141         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 142                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 143                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 144         },
 145         [MLX5_EXPANSION_OUTER_IPV6] = {
 146                 .next = RTE_FLOW_EXPAND_RSS_NEXT
 147                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 148                          MLX5_EXPANSION_OUTER_IPV6_TCP),
 149                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 150                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 151                         ETH_RSS_NONFRAG_IPV6_OTHER,
 152         },
 153         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 154                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 155                                                  MLX5_EXPANSION_VXLAN_GPE),
 156                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 157                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 158         },
 159         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 160                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 161                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 162         },
 163         [MLX5_EXPANSION_VXLAN] = {
 164                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
 165                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 166         },
 167         [MLX5_EXPANSION_VXLAN_GPE] = {
 168                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 169                                                  MLX5_EXPANSION_IPV4,
 170                                                  MLX5_EXPANSION_IPV6),
 171                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 172         },
 173         [MLX5_EXPANSION_GRE] = {
 174                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4),
 175                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 176         },
 177         [MLX5_EXPANSION_MPLS] = {
 178                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 179                                                  MLX5_EXPANSION_IPV6),
 180                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 181         },
 182         [MLX5_EXPANSION_ETH] = {
 183                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 184                                                  MLX5_EXPANSION_IPV6),
 185                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 186         },
 187         [MLX5_EXPANSION_ETH_VLAN] = {
 188                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 189                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 190         },
 191         [MLX5_EXPANSION_VLAN] = {
 192                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 193                                                  MLX5_EXPANSION_IPV6),
 194                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 195         },
 196         [MLX5_EXPANSION_IPV4] = {
 197                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 198                                                  MLX5_EXPANSION_IPV4_TCP),
 199                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 200                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 201                         ETH_RSS_NONFRAG_IPV4_OTHER,
 202         },
 203         [MLX5_EXPANSION_IPV4_UDP] = {
 204                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 205                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 206         },
 207         [MLX5_EXPANSION_IPV4_TCP] = {
 208                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 209                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 210         },
 211         [MLX5_EXPANSION_IPV6] = {
 212                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 213                                                  MLX5_EXPANSION_IPV6_TCP),
 214                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 215                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 216                         ETH_RSS_NONFRAG_IPV6_OTHER,
 217         },
 218         [MLX5_EXPANSION_IPV6_UDP] = {
 219                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 220                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 221         },
 222         [MLX5_EXPANSION_IPV6_TCP] = {
 223                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 224                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 225         },
 226 };
 227
 228 static const struct rte_flow_ops mlx5_flow_ops = {
 229         .validate = mlx5_flow_validate,
 230         .create = mlx5_flow_create,
 231         .destroy = mlx5_flow_destroy,
 232         .flush = mlx5_flow_flush,
 233         .isolate = mlx5_flow_isolate,
 234         .query = mlx5_flow_query,
 235 };
 236
 237 /* Convert FDIR request to Generic flow. */
 238 struct mlx5_fdir {
 239         struct rte_flow_attr attr;
 240         struct rte_flow_item items[4];
 241         struct rte_flow_item_eth l2;
 242         struct rte_flow_item_eth l2_mask;
 243         union {
 244                 struct rte_flow_item_ipv4 ipv4;
 245                 struct rte_flow_item_ipv6 ipv6;
 246         } l3;
 247         union {
 248                 struct rte_flow_item_ipv4 ipv4;
 249                 struct rte_flow_item_ipv6 ipv6;
 250         } l3_mask;
 251         union {
 252                 struct rte_flow_item_udp udp;
 253                 struct rte_flow_item_tcp tcp;
 254         } l4;
 255         union {
 256                 struct rte_flow_item_udp udp;
 257                 struct rte_flow_item_tcp tcp;
 258         } l4_mask;
 259         struct rte_flow_action actions[2];
 260         struct rte_flow_action_queue queue;
 261 };
 262
 263 /* Map of Verbs to Flow priority with 8 Verbs priorities. */
 264 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = {
 265         { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 },
 266 };
 267
 268 /* Map of Verbs to Flow priority with 16 Verbs priorities. */
 269 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = {
 270         { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 },
 271         { 9, 10, 11 }, { 12, 13, 14 },
 272 };
 273
 274 /* Tunnel information. */
 275 struct mlx5_flow_tunnel_info {
 276         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 277         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 278 };
 279
 280 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 281         {
 282                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 283                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 284         },
 285         {
 286                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 287                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 288         },
 289         {
 290                 .tunnel = MLX5_FLOW_LAYER_GRE,
 291                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 292         },
 293         {
 294                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 295                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 296         },
 297         {
 298                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 299                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 300         },
 301         {
 302                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 303                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 304         },
 305 };
 306
 307 /**
 308  * Discover the maximum number of priority available.
 309  *
 310  * @param[in] dev
 311  *   Pointer to the Ethernet device structure.
 312  *
 313  * @return
 314  *   number of supported flow priority on success, a negative errno
 315  *   value otherwise and rte_errno is set.
 316  */
 317 int
 318 mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
 319 {
 320         struct mlx5_priv *priv = dev->data->dev_private;
 321         struct {
 322                 struct ibv_flow_attr attr;
 323                 struct ibv_flow_spec_eth eth;
 324                 struct ibv_flow_spec_action_drop drop;
 325         } flow_attr = {
 326                 .attr = {
 327                         .num_of_specs = 2,
 328                         .port = (uint8_t)priv->ibv_port,
 329                 },
 330                 .eth = {
 331                         .type = IBV_FLOW_SPEC_ETH,
 332                         .size = sizeof(struct ibv_flow_spec_eth),
 333                 },
 334                 .drop = {
 335                         .size = sizeof(struct ibv_flow_spec_action_drop),
 336                         .type = IBV_FLOW_SPEC_ACTION_DROP,
 337                 },
 338         };
 339         struct ibv_flow *flow;
 340         struct mlx5_hrxq *drop = mlx5_hrxq_drop_new(dev);
 341         uint16_t vprio[] = { 8, 16 };
 342         int i;
 343         int priority = 0;
 344
 345         if (!drop) {
 346                 rte_errno = ENOTSUP;
 347                 return -rte_errno;
 348         }
 349         for (i = 0; i != RTE_DIM(vprio); i++) {
 350                 flow_attr.attr.priority = vprio[i] - 1;
 351                 flow = mlx5_glue->create_flow(drop->qp, &flow_attr.attr);
 352                 if (!flow)
 353                         break;
 354                 claim_zero(mlx5_glue->destroy_flow(flow));
 355                 priority = vprio[i];
 356         }
 357         mlx5_hrxq_drop_release(dev);
 358         switch (priority) {
 359         case 8:
 360                 priority = RTE_DIM(priority_map_3);
 361                 break;
 362         case 16:
 363                 priority = RTE_DIM(priority_map_5);
 364                 break;
 365         default:
 366                 rte_errno = ENOTSUP;
 367                 DRV_LOG(ERR,
 368                         "port %u verbs maximum priority: %d expected 8/16",
 369                         dev->data->port_id, priority);
 370                 return -rte_errno;
 371         }
 372         DRV_LOG(INFO, "port %u flow maximum priority: %d",
 373                 dev->data->port_id, priority);
 374         return priority;
 375 }
 376
 377 /**
 378  * Adjust flow priority based on the highest layer and the request priority.
 379  *
 380  * @param[in] dev
 381  *   Pointer to the Ethernet device structure.
 382  * @param[in] priority
 383  *   The rule base priority.
 384  * @param[in] subpriority
 385  *   The priority based on the items.
 386  *
 387  * @return
 388  *   The new priority.
 389  */
 390 uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
 391                                    uint32_t subpriority)
 392 {
 393         uint32_t res = 0;
 394         struct mlx5_priv *priv = dev->data->dev_private;
 395
 396         switch (priv->config.flow_prio) {
 397         case RTE_DIM(priority_map_3):
 398                 res = priority_map_3[priority][subpriority];
 399                 break;
 400         case RTE_DIM(priority_map_5):
 401                 res = priority_map_5[priority][subpriority];
 402                 break;
 403         }
 404         return  res;
 405 }
 406
 407 /**
 408  * Verify the @p item specifications (spec, last, mask) are compatible with the
 409  * NIC capabilities.
 410  *
 411  * @param[in] item
 412  *   Item specification.
 413  * @param[in] mask
 414  *   @p item->mask or flow default bit-masks.
 415  * @param[in] nic_mask
 416  *   Bit-masks covering supported fields by the NIC to compare with user mask.
 417  * @param[in] size
 418  *   Bit-masks size in bytes.
 419  * @param[out] error
 420  *   Pointer to error structure.
 421  *
 422  * @return
 423  *   0 on success, a negative errno value otherwise and rte_errno is set.
 424  */
 425 int
 426 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
 427                           const uint8_t *mask,
 428                           const uint8_t *nic_mask,
 429                           unsigned int size,
 430                           struct rte_flow_error *error)
 431 {
 432         unsigned int i;
 433
 434         assert(nic_mask);
 435         for (i = 0; i < size; ++i)
 436                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
 437                         return rte_flow_error_set(error, ENOTSUP,
 438                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 439                                                   item,
 440                                                   "mask enables non supported"
 441                                                   " bits");
 442         if (!item->spec && (item->mask || item->last))
 443                 return rte_flow_error_set(error, EINVAL,
 444                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
 445                                           "mask/last without a spec is not"
 446                                           " supported");
 447         if (item->spec && item->last) {
 448                 uint8_t spec[size];
 449                 uint8_t last[size];
 450                 unsigned int i;
 451                 int ret;
 452
 453                 for (i = 0; i < size; ++i) {
 454                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
 455                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
 456                 }
 457                 ret = memcmp(spec, last, size);
 458                 if (ret != 0)
 459                         return rte_flow_error_set(error, EINVAL,
 460                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 461                                                   item,
 462                                                   "range is not valid");
 463         }
 464         return 0;
 465 }
 466
 467 /**
 468  * Adjust the hash fields according to the @p flow information.
 469  *
 470  * @param[in] dev_flow.
 471  *   Pointer to the mlx5_flow.
 472  * @param[in] tunnel
 473  *   1 when the hash field is for a tunnel item.
 474  * @param[in] layer_types
 475  *   ETH_RSS_* types.
 476  * @param[in] hash_fields
 477  *   Item hash fields.
 478  *
 479  * @return
 480  *   The hash fields that should be used.
 481  */
 482 uint64_t
 483 mlx5_flow_hashfields_adjust(struct mlx5_flow *dev_flow,
 484                             int tunnel __rte_unused, uint64_t layer_types,
 485                             uint64_t hash_fields)
 486 {
 487         struct rte_flow *flow = dev_flow->flow;
 488 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 489         int rss_request_inner = flow->rss.level >= 2;
 490
 491         /* Check RSS hash level for tunnel. */
 492         if (tunnel && rss_request_inner)
 493                 hash_fields |= IBV_RX_HASH_INNER;
 494         else if (tunnel || rss_request_inner)
 495                 return 0;
 496 #endif
 497         /* Check if requested layer matches RSS hash fields. */
 498         if (!(flow->rss.types & layer_types))
 499                 return 0;
 500         return hash_fields;
 501 }
 502
 503 /**
 504  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
 505  * if several tunnel rules are used on this queue, the tunnel ptype will be
 506  * cleared.
 507  *
 508  * @param rxq_ctrl
 509  *   Rx queue to update.
 510  */
 511 static void
 512 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
 513 {
 514         unsigned int i;
 515         uint32_t tunnel_ptype = 0;
 516
 517         /* Look up for the ptype to use. */
 518         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
 519                 if (!rxq_ctrl->flow_tunnels_n[i])
 520                         continue;
 521                 if (!tunnel_ptype) {
 522                         tunnel_ptype = tunnels_info[i].ptype;
 523                 } else {
 524                         tunnel_ptype = 0;
 525                         break;
 526                 }
 527         }
 528         rxq_ctrl->rxq.tunnel = tunnel_ptype;
 529 }
 530
 531 /**
 532  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
 533  * flow.
 534  *
 535  * @param[in] dev
 536  *   Pointer to the Ethernet device structure.
 537  * @param[in] dev_flow
 538  *   Pointer to device flow structure.
 539  */
 540 static void
 541 flow_drv_rxq_flags_set(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow)
 542 {
 543         struct mlx5_priv *priv = dev->data->dev_private;
 544         struct rte_flow *flow = dev_flow->flow;
 545         const int mark = !!(flow->actions &
 546                             (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK));
 547         const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL);
 548         unsigned int i;
 549
 550         for (i = 0; i != flow->rss.queue_num; ++i) {
 551                 int idx = (*flow->queue)[i];
 552                 struct mlx5_rxq_ctrl *rxq_ctrl =
 553                         container_of((*priv->rxqs)[idx],
 554                                      struct mlx5_rxq_ctrl, rxq);
 555
 556                 if (mark) {
 557                         rxq_ctrl->rxq.mark = 1;
 558                         rxq_ctrl->flow_mark_n++;
 559                 }
 560                 if (tunnel) {
 561                         unsigned int j;
 562
 563                         /* Increase the counter matching the flow. */
 564                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
 565                                 if ((tunnels_info[j].tunnel &
 566                                      dev_flow->layers) ==
 567                                     tunnels_info[j].tunnel) {
 568                                         rxq_ctrl->flow_tunnels_n[j]++;
 569                                         break;
 570                                 }
 571                         }
 572                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
 573                 }
 574         }
 575 }
 576
 577 /**
 578  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
 579  *
 580  * @param[in] dev
 581  *   Pointer to the Ethernet device structure.
 582  * @param[in] flow
 583  *   Pointer to flow structure.
 584  */
 585 static void
 586 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
 587 {
 588         struct mlx5_flow *dev_flow;
 589
 590         LIST_FOREACH(dev_flow, &flow->dev_flows, next)
 591                 flow_drv_rxq_flags_set(dev, dev_flow);
 592 }
 593
 594 /**
 595  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
 596  * device flow if no other flow uses it with the same kind of request.
 597  *
 598  * @param dev
 599  *   Pointer to Ethernet device.
 600  * @param[in] dev_flow
 601  *   Pointer to the device flow.
 602  */
 603 static void
 604 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow)
 605 {
 606         struct mlx5_priv *priv = dev->data->dev_private;
 607         struct rte_flow *flow = dev_flow->flow;
 608         const int mark = !!(flow->actions &
 609                             (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK));
 610         const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL);
 611         unsigned int i;
 612
 613         assert(dev->data->dev_started);
 614         for (i = 0; i != flow->rss.queue_num; ++i) {
 615                 int idx = (*flow->queue)[i];
 616                 struct mlx5_rxq_ctrl *rxq_ctrl =
 617                         container_of((*priv->rxqs)[idx],
 618                                      struct mlx5_rxq_ctrl, rxq);
 619
 620                 if (mark) {
 621                         rxq_ctrl->flow_mark_n--;
 622                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
 623                 }
 624                 if (tunnel) {
 625                         unsigned int j;
 626
 627                         /* Decrease the counter matching the flow. */
 628                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
 629                                 if ((tunnels_info[j].tunnel &
 630                                      dev_flow->layers) ==
 631                                     tunnels_info[j].tunnel) {
 632                                         rxq_ctrl->flow_tunnels_n[j]--;
 633                                         break;
 634                                 }
 635                         }
 636                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
 637                 }
 638         }
 639 }
 640
 641 /**
 642  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
 643  * @p flow if no other flow uses it with the same kind of request.
 644  *
 645  * @param dev
 646  *   Pointer to Ethernet device.
 647  * @param[in] flow
 648  *   Pointer to the flow.
 649  */
 650 static void
 651 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
 652 {
 653         struct mlx5_flow *dev_flow;
 654
 655         LIST_FOREACH(dev_flow, &flow->dev_flows, next)
 656                 flow_drv_rxq_flags_trim(dev, dev_flow);
 657 }
 658
 659 /**
 660  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
 661  *
 662  * @param dev
 663  *   Pointer to Ethernet device.
 664  */
 665 static void
 666 flow_rxq_flags_clear(struct rte_eth_dev *dev)
 667 {
 668         struct mlx5_priv *priv = dev->data->dev_private;
 669         unsigned int i;
 670
 671         for (i = 0; i != priv->rxqs_n; ++i) {
 672                 struct mlx5_rxq_ctrl *rxq_ctrl;
 673                 unsigned int j;
 674
 675                 if (!(*priv->rxqs)[i])
 676                         continue;
 677                 rxq_ctrl = container_of((*priv->rxqs)[i],
 678                                         struct mlx5_rxq_ctrl, rxq);
 679                 rxq_ctrl->flow_mark_n = 0;
 680                 rxq_ctrl->rxq.mark = 0;
 681                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
 682                         rxq_ctrl->flow_tunnels_n[j] = 0;
 683                 rxq_ctrl->rxq.tunnel = 0;
 684         }
 685 }
 686
 687 /*
 688  * Validate the flag action.
 689  *
 690  * @param[in] action_flags
 691  *   Bit-fields that holds the actions detected until now.
 692  * @param[in] attr
 693  *   Attributes of flow that includes this action.
 694  * @param[out] error
 695  *   Pointer to error structure.
 696  *
 697  * @return
 698  *   0 on success, a negative errno value otherwise and rte_errno is set.
 699  */
 700 int
 701 mlx5_flow_validate_action_flag(uint64_t action_flags,
 702                                const struct rte_flow_attr *attr,
 703                                struct rte_flow_error *error)
 704 {
 705
 706         if (action_flags & MLX5_FLOW_ACTION_DROP)
 707                 return rte_flow_error_set(error, EINVAL,
 708                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 709                                           "can't drop and flag in same flow");
 710         if (action_flags & MLX5_FLOW_ACTION_MARK)
 711                 return rte_flow_error_set(error, EINVAL,
 712                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 713                                           "can't mark and flag in same flow");
 714         if (action_flags & MLX5_FLOW_ACTION_FLAG)
 715                 return rte_flow_error_set(error, EINVAL,
 716                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 717                                           "can't have 2 flag"
 718                                           " actions in same flow");
 719         if (attr->egress)
 720                 return rte_flow_error_set(error, ENOTSUP,
 721                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 722                                           "flag action not supported for "
 723                                           "egress");
 724         return 0;
 725 }
 726
 727 /*
 728  * Validate the mark action.
 729  *
 730  * @param[in] action
 731  *   Pointer to the queue action.
 732  * @param[in] action_flags
 733  *   Bit-fields that holds the actions detected until now.
 734  * @param[in] attr
 735  *   Attributes of flow that includes this action.
 736  * @param[out] error
 737  *   Pointer to error structure.
 738  *
 739  * @return
 740  *   0 on success, a negative errno value otherwise and rte_errno is set.
 741  */
 742 int
 743 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
 744                                uint64_t action_flags,
 745                                const struct rte_flow_attr *attr,
 746                                struct rte_flow_error *error)
 747 {
 748         const struct rte_flow_action_mark *mark = action->conf;
 749
 750         if (!mark)
 751                 return rte_flow_error_set(error, EINVAL,
 752                                           RTE_FLOW_ERROR_TYPE_ACTION,
 753                                           action,
 754                                           "configuration cannot be null");
 755         if (mark->id >= MLX5_FLOW_MARK_MAX)
 756                 return rte_flow_error_set(error, EINVAL,
 757                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 758                                           &mark->id,
 759                                           "mark id must in 0 <= id < "
 760                                           RTE_STR(MLX5_FLOW_MARK_MAX));
 761         if (action_flags & MLX5_FLOW_ACTION_DROP)
 762                 return rte_flow_error_set(error, EINVAL,
 763                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 764                                           "can't drop and mark in same flow");
 765         if (action_flags & MLX5_FLOW_ACTION_FLAG)
 766                 return rte_flow_error_set(error, EINVAL,
 767                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 768                                           "can't flag and mark in same flow");
 769         if (action_flags & MLX5_FLOW_ACTION_MARK)
 770                 return rte_flow_error_set(error, EINVAL,
 771                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 772                                           "can't have 2 mark actions in same"
 773                                           " flow");
 774         if (attr->egress)
 775                 return rte_flow_error_set(error, ENOTSUP,
 776                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 777                                           "mark action not supported for "
 778                                           "egress");
 779         return 0;
 780 }
 781
 782 /*
 783  * Validate the drop action.
 784  *
 785  * @param[in] action_flags
 786  *   Bit-fields that holds the actions detected until now.
 787  * @param[in] attr
 788  *   Attributes of flow that includes this action.
 789  * @param[out] error
 790  *   Pointer to error structure.
 791  *
 792  * @return
 793  *   0 on success, a negative errno value otherwise and rte_errno is set.
 794  */
 795 int
 796 mlx5_flow_validate_action_drop(uint64_t action_flags,
 797                                const struct rte_flow_attr *attr,
 798                                struct rte_flow_error *error)
 799 {
 800         if (action_flags & MLX5_FLOW_ACTION_FLAG)
 801                 return rte_flow_error_set(error, EINVAL,
 802                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 803                                           "can't drop and flag in same flow");
 804         if (action_flags & MLX5_FLOW_ACTION_MARK)
 805                 return rte_flow_error_set(error, EINVAL,
 806                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 807                                           "can't drop and mark in same flow");
 808         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
 809                 return rte_flow_error_set(error, EINVAL,
 810                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 811                                           "can't have 2 fate actions in"
 812                                           " same flow");
 813         if (attr->egress)
 814                 return rte_flow_error_set(error, ENOTSUP,
 815                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 816                                           "drop action not supported for "
 817                                           "egress");
 818         return 0;
 819 }
 820
 821 /*
 822  * Validate the queue action.
 823  *
 824  * @param[in] action
 825  *   Pointer to the queue action.
 826  * @param[in] action_flags
 827  *   Bit-fields that holds the actions detected until now.
 828  * @param[in] dev
 829  *   Pointer to the Ethernet device structure.
 830  * @param[in] attr
 831  *   Attributes of flow that includes this action.
 832  * @param[out] error
 833  *   Pointer to error structure.
 834  *
 835  * @return
 836  *   0 on success, a negative errno value otherwise and rte_errno is set.
 837  */
 838 int
 839 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
 840                                 uint64_t action_flags,
 841                                 struct rte_eth_dev *dev,
 842                                 const struct rte_flow_attr *attr,
 843                                 struct rte_flow_error *error)
 844 {
 845         struct mlx5_priv *priv = dev->data->dev_private;
 846         const struct rte_flow_action_queue *queue = action->conf;
 847
 848         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
 849                 return rte_flow_error_set(error, EINVAL,
 850                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 851                                           "can't have 2 fate actions in"
 852                                           " same flow");
 853         if (!priv->rxqs_n)
 854                 return rte_flow_error_set(error, EINVAL,
 855                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 856                                           NULL, "No Rx queues configured");
 857         if (queue->index >= priv->rxqs_n)
 858                 return rte_flow_error_set(error, EINVAL,
 859                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 860                                           &queue->index,
 861                                           "queue index out of range");
 862         if (!(*priv->rxqs)[queue->index])
 863                 return rte_flow_error_set(error, EINVAL,
 864                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 865                                           &queue->index,
 866                                           "queue is not configured");
 867         if (attr->egress)
 868                 return rte_flow_error_set(error, ENOTSUP,
 869                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 870                                           "queue action not supported for "
 871                                           "egress");
 872         return 0;
 873 }
 874
 875 /*
 876  * Validate the rss action.
 877  *
 878  * @param[in] action
 879  *   Pointer to the queue action.
 880  * @param[in] action_flags
 881  *   Bit-fields that holds the actions detected until now.
 882  * @param[in] dev
 883  *   Pointer to the Ethernet device structure.
 884  * @param[in] attr
 885  *   Attributes of flow that includes this action.
 886  * @param[in] item_flags
 887  *   Items that were detected.
 888  * @param[out] error
 889  *   Pointer to error structure.
 890  *
 891  * @return
 892  *   0 on success, a negative errno value otherwise and rte_errno is set.
 893  */
 894 int
 895 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
 896                               uint64_t action_flags,
 897                               struct rte_eth_dev *dev,
 898                               const struct rte_flow_attr *attr,
 899                               uint64_t item_flags,
 900                               struct rte_flow_error *error)
 901 {
 902         struct mlx5_priv *priv = dev->data->dev_private;
 903         const struct rte_flow_action_rss *rss = action->conf;
 904         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
 905         unsigned int i;
 906
 907         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
 908                 return rte_flow_error_set(error, EINVAL,
 909                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 910                                           "can't have 2 fate actions"
 911                                           " in same flow");
 912         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
 913             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
 914                 return rte_flow_error_set(error, ENOTSUP,
 915                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 916                                           &rss->func,
 917                                           "RSS hash function not supported");
 918 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 919         if (rss->level > 2)
 920 #else
 921         if (rss->level > 1)
 922 #endif
 923                 return rte_flow_error_set(error, ENOTSUP,
 924                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 925                                           &rss->level,
 926                                           "tunnel RSS is not supported");
 927         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
 928         if (rss->key_len == 0 && rss->key != NULL)
 929                 return rte_flow_error_set(error, ENOTSUP,
 930                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 931                                           &rss->key_len,
 932                                           "RSS hash key length 0");
 933         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
 934                 return rte_flow_error_set(error, ENOTSUP,
 935                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 936                                           &rss->key_len,
 937                                           "RSS hash key too small");
 938         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
 939                 return rte_flow_error_set(error, ENOTSUP,
 940                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 941                                           &rss->key_len,
 942                                           "RSS hash key too large");
 943         if (rss->queue_num > priv->config.ind_table_max_size)
 944                 return rte_flow_error_set(error, ENOTSUP,
 945                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 946                                           &rss->queue_num,
 947                                           "number of queues too large");
 948         if (rss->types & MLX5_RSS_HF_MASK)
 949                 return rte_flow_error_set(error, ENOTSUP,
 950                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 951                                           &rss->types,
 952                                           "some RSS protocols are not"
 953                                           " supported");
 954         if (!priv->rxqs_n)
 955                 return rte_flow_error_set(error, EINVAL,
 956                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 957                                           NULL, "No Rx queues configured");
 958         if (!rss->queue_num)
 959                 return rte_flow_error_set(error, EINVAL,
 960                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 961                                           NULL, "No queues configured");
 962         for (i = 0; i != rss->queue_num; ++i) {
 963                 if (!(*priv->rxqs)[rss->queue[i]])
 964                         return rte_flow_error_set
 965                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 966                                  &rss->queue[i], "queue is not configured");
 967         }
 968         if (attr->egress)
 969                 return rte_flow_error_set(error, ENOTSUP,
 970                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 971                                           "rss action not supported for "
 972                                           "egress");
 973         if (rss->level > 1 &&  !tunnel)
 974                 return rte_flow_error_set(error, EINVAL,
 975                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
 976                                           "inner RSS is not supported for "
 977                                           "non-tunnel flows");
 978         return 0;
 979 }
 980
 981 /*
 982  * Validate the count action.
 983  *
 984  * @param[in] dev
 985  *   Pointer to the Ethernet device structure.
 986  * @param[in] attr
 987  *   Attributes of flow that includes this action.
 988  * @param[out] error
 989  *   Pointer to error structure.
 990  *
 991  * @return
 992  *   0 on success, a negative errno value otherwise and rte_errno is set.
 993  */
 994 int
 995 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
 996                                 const struct rte_flow_attr *attr,
 997                                 struct rte_flow_error *error)
 998 {
 999         if (attr->egress)
1000                 return rte_flow_error_set(error, ENOTSUP,
1001                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1002                                           "count action not supported for "
1003                                           "egress");
1004         return 0;
1005 }
1006
1007 /**
1008  * Verify the @p attributes will be correctly understood by the NIC and store
1009  * them in the @p flow if everything is correct.
1010  *
1011  * @param[in] dev
1012  *   Pointer to the Ethernet device structure.
1013  * @param[in] attributes
1014  *   Pointer to flow attributes
1015  * @param[out] error
1016  *   Pointer to error structure.
1017  *
1018  * @return
1019  *   0 on success, a negative errno value otherwise and rte_errno is set.
1020  */
1021 int
1022 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1023                               const struct rte_flow_attr *attributes,
1024                               struct rte_flow_error *error)
1025 {
1026         struct mlx5_priv *priv = dev->data->dev_private;
1027         uint32_t priority_max = priv->config.flow_prio - 1;
1028
1029         if (attributes->group)
1030                 return rte_flow_error_set(error, ENOTSUP,
1031                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1032                                           NULL, "groups is not supported");
1033         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
1034             attributes->priority >= priority_max)
1035                 return rte_flow_error_set(error, ENOTSUP,
1036                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1037                                           NULL, "priority out of range");
1038         if (attributes->egress)
1039                 return rte_flow_error_set(error, ENOTSUP,
1040                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1041                                           "egress is not supported");
1042         if (attributes->transfer && !priv->config.dv_esw_en)
1043                 return rte_flow_error_set(error, ENOTSUP,
1044                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1045                                           NULL, "transfer is not supported");
1046         if (!attributes->ingress)
1047                 return rte_flow_error_set(error, EINVAL,
1048                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1049                                           NULL,
1050                                           "ingress attribute is mandatory");
1051         return 0;
1052 }
1053
1054 /**
1055  * Validate ICMP6 item.
1056  *
1057  * @param[in] item
1058  *   Item specification.
1059  * @param[in] item_flags
1060  *   Bit-fields that holds the items detected until now.
1061  * @param[out] error
1062  *   Pointer to error structure.
1063  *
1064  * @return
1065  *   0 on success, a negative errno value otherwise and rte_errno is set.
1066  */
1067 int
1068 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1069                                uint64_t item_flags,
1070                                uint8_t target_protocol,
1071                                struct rte_flow_error *error)
1072 {
1073         const struct rte_flow_item_icmp6 *mask = item->mask;
1074         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1075         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1076                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1077         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1078                                       MLX5_FLOW_LAYER_OUTER_L4;
1079         int ret;
1080
1081         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1082                 return rte_flow_error_set(error, EINVAL,
1083                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1084                                           "protocol filtering not compatible"
1085                                           " with ICMP6 layer");
1086         if (!(item_flags & l3m))
1087                 return rte_flow_error_set(error, EINVAL,
1088                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1089                                           "IPv6 is mandatory to filter on"
1090                                           " ICMP6");
1091         if (item_flags & l4m)
1092                 return rte_flow_error_set(error, EINVAL,
1093                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1094                                           "multiple L4 layers not supported");
1095         if (!mask)
1096                 mask = &rte_flow_item_icmp6_mask;
1097         ret = mlx5_flow_item_acceptable
1098                 (item, (const uint8_t *)mask,
1099                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1100                  sizeof(struct rte_flow_item_icmp6), error);
1101         if (ret < 0)
1102                 return ret;
1103         return 0;
1104 }
1105
1106 /**
1107  * Validate ICMP item.
1108  *
1109  * @param[in] item
1110  *   Item specification.
1111  * @param[in] item_flags
1112  *   Bit-fields that holds the items detected until now.
1113  * @param[out] error
1114  *   Pointer to error structure.
1115  *
1116  * @return
1117  *   0 on success, a negative errno value otherwise and rte_errno is set.
1118  */
1119 int
1120 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1121                              uint64_t item_flags,
1122                              uint8_t target_protocol,
1123                              struct rte_flow_error *error)
1124 {
1125         const struct rte_flow_item_icmp *mask = item->mask;
1126         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1127         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1128                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1129         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1130                                       MLX5_FLOW_LAYER_OUTER_L4;
1131         int ret;
1132
1133         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1134                 return rte_flow_error_set(error, EINVAL,
1135                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1136                                           "protocol filtering not compatible"
1137                                           " with ICMP layer");
1138         if (!(item_flags & l3m))
1139                 return rte_flow_error_set(error, EINVAL,
1140                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1141                                           "IPv4 is mandatory to filter"
1142                                           " on ICMP");
1143         if (item_flags & l4m)
1144                 return rte_flow_error_set(error, EINVAL,
1145                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1146                                           "multiple L4 layers not supported");
1147         if (!mask)
1148                 mask = &rte_flow_item_icmp_mask;
1149         ret = mlx5_flow_item_acceptable
1150                 (item, (const uint8_t *)mask,
1151                  (const uint8_t *)&rte_flow_item_icmp_mask,
1152                  sizeof(struct rte_flow_item_icmp), error);
1153         if (ret < 0)
1154                 return ret;
1155         return 0;
1156 }
1157
1158 /**
1159  * Validate Ethernet item.
1160  *
1161  * @param[in] item
1162  *   Item specification.
1163  * @param[in] item_flags
1164  *   Bit-fields that holds the items detected until now.
1165  * @param[out] error
1166  *   Pointer to error structure.
1167  *
1168  * @return
1169  *   0 on success, a negative errno value otherwise and rte_errno is set.
1170  */
1171 int
1172 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1173                             uint64_t item_flags,
1174                             struct rte_flow_error *error)
1175 {
1176         const struct rte_flow_item_eth *mask = item->mask;
1177         const struct rte_flow_item_eth nic_mask = {
1178                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1179                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1180                 .type = RTE_BE16(0xffff),
1181         };
1182         int ret;
1183         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1184         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1185                                        MLX5_FLOW_LAYER_OUTER_L2;
1186
1187         if (item_flags & ethm)
1188                 return rte_flow_error_set(error, ENOTSUP,
1189                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1190                                           "multiple L2 layers not supported");
1191         if (!mask)
1192                 mask = &rte_flow_item_eth_mask;
1193         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1194                                         (const uint8_t *)&nic_mask,
1195                                         sizeof(struct rte_flow_item_eth),
1196                                         error);
1197         return ret;
1198 }
1199
1200 /**
1201  * Validate VLAN item.
1202  *
1203  * @param[in] item
1204  *   Item specification.
1205  * @param[in] item_flags
1206  *   Bit-fields that holds the items detected until now.
1207  * @param[out] error
1208  *   Pointer to error structure.
1209  *
1210  * @return
1211  *   0 on success, a negative errno value otherwise and rte_errno is set.
1212  */
1213 int
1214 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1215                              uint64_t item_flags,
1216                              struct rte_flow_error *error)
1217 {
1218         const struct rte_flow_item_vlan *spec = item->spec;
1219         const struct rte_flow_item_vlan *mask = item->mask;
1220         const struct rte_flow_item_vlan nic_mask = {
1221                 .tci = RTE_BE16(0x0fff),
1222                 .inner_type = RTE_BE16(0xffff),
1223         };
1224         uint16_t vlan_tag = 0;
1225         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1226         int ret;
1227         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1228                                         MLX5_FLOW_LAYER_INNER_L4) :
1229                                        (MLX5_FLOW_LAYER_OUTER_L3 |
1230                                         MLX5_FLOW_LAYER_OUTER_L4);
1231         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1232                                         MLX5_FLOW_LAYER_OUTER_VLAN;
1233
1234         if (item_flags & vlanm)
1235                 return rte_flow_error_set(error, EINVAL,
1236                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1237                                           "multiple VLAN layers not supported");
1238         else if ((item_flags & l34m) != 0)
1239                 return rte_flow_error_set(error, EINVAL,
1240                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1241                                           "L2 layer cannot follow L3/L4 layer");
1242         if (!mask)
1243                 mask = &rte_flow_item_vlan_mask;
1244         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1245                                         (const uint8_t *)&nic_mask,
1246                                         sizeof(struct rte_flow_item_vlan),
1247                                         error);
1248         if (ret)
1249                 return ret;
1250         if (spec) {
1251                 vlan_tag = spec->tci;
1252                 vlan_tag &= mask->tci;
1253         }
1254         /*
1255          * From verbs perspective an empty VLAN is equivalent
1256          * to a packet without VLAN layer.
1257          */
1258         if (!vlan_tag)
1259                 return rte_flow_error_set(error, EINVAL,
1260                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1261                                           item->spec,
1262                                           "VLAN cannot be empty");
1263         return 0;
1264 }
1265
1266 /**
1267  * Validate IPV4 item.
1268  *
1269  * @param[in] item
1270  *   Item specification.
1271  * @param[in] item_flags
1272  *   Bit-fields that holds the items detected until now.
1273  * @param[in] acc_mask
1274  *   Acceptable mask, if NULL default internal default mask
1275  *   will be used to check whether item fields are supported.
1276  * @param[out] error
1277  *   Pointer to error structure.
1278  *
1279  * @return
1280  *   0 on success, a negative errno value otherwise and rte_errno is set.
1281  */
1282 int
1283 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
1284                              uint64_t item_flags,
1285                              const struct rte_flow_item_ipv4 *acc_mask,
1286                              struct rte_flow_error *error)
1287 {
1288         const struct rte_flow_item_ipv4 *mask = item->mask;
1289         const struct rte_flow_item_ipv4 *spec = item->spec;
1290         const struct rte_flow_item_ipv4 nic_mask = {
1291                 .hdr = {
1292                         .src_addr = RTE_BE32(0xffffffff),
1293                         .dst_addr = RTE_BE32(0xffffffff),
1294                         .type_of_service = 0xff,
1295                         .next_proto_id = 0xff,
1296                 },
1297         };
1298         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1299         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1300                                       MLX5_FLOW_LAYER_OUTER_L3;
1301         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1302                                       MLX5_FLOW_LAYER_OUTER_L4;
1303         int ret;
1304         uint8_t next_proto = 0xFF;
1305
1306         if (item_flags & MLX5_FLOW_LAYER_IPIP) {
1307                 if (mask && spec)
1308                         next_proto = mask->hdr.next_proto_id &
1309                                      spec->hdr.next_proto_id;
1310                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1311                         return rte_flow_error_set(error, EINVAL,
1312                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1313                                                   item,
1314                                                   "multiple tunnel "
1315                                                   "not supported");
1316         }
1317         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
1318                 return rte_flow_error_set(error, EINVAL,
1319                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1320                                           "wrong tunnel type - IPv6 specified "
1321                                           "but IPv4 item provided");
1322         if (item_flags & l3m)
1323                 return rte_flow_error_set(error, ENOTSUP,
1324                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1325                                           "multiple L3 layers not supported");
1326         else if (item_flags & l4m)
1327                 return rte_flow_error_set(error, EINVAL,
1328                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1329                                           "L3 cannot follow an L4 layer.");
1330         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1331                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1332                 return rte_flow_error_set(error, EINVAL,
1333                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1334                                           "L3 cannot follow an NVGRE layer.");
1335         if (!mask)
1336                 mask = &rte_flow_item_ipv4_mask;
1337         else if (mask->hdr.next_proto_id != 0 &&
1338                  mask->hdr.next_proto_id != 0xff)
1339                 return rte_flow_error_set(error, EINVAL,
1340                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
1341                                           "partial mask is not supported"
1342                                           " for protocol");
1343         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1344                                         acc_mask ? (const uint8_t *)acc_mask
1345                                                  : (const uint8_t *)&nic_mask,
1346                                         sizeof(struct rte_flow_item_ipv4),
1347                                         error);
1348         if (ret < 0)
1349                 return ret;
1350         return 0;
1351 }
1352
1353 /**
1354  * Validate IPV6 item.
1355  *
1356  * @param[in] item
1357  *   Item specification.
1358  * @param[in] item_flags
1359  *   Bit-fields that holds the items detected until now.
1360  * @param[in] acc_mask
1361  *   Acceptable mask, if NULL default internal default mask
1362  *   will be used to check whether item fields are supported.
1363  * @param[out] error
1364  *   Pointer to error structure.
1365  *
1366  * @return
1367  *   0 on success, a negative errno value otherwise and rte_errno is set.
1368  */
1369 int
1370 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
1371                              uint64_t item_flags,
1372                              const struct rte_flow_item_ipv6 *acc_mask,
1373                              struct rte_flow_error *error)
1374 {
1375         const struct rte_flow_item_ipv6 *mask = item->mask;
1376         const struct rte_flow_item_ipv6 *spec = item->spec;
1377         const struct rte_flow_item_ipv6 nic_mask = {
1378                 .hdr = {
1379                         .src_addr =
1380                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
1381                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
1382                         .dst_addr =
1383                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
1384                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
1385                         .vtc_flow = RTE_BE32(0xffffffff),
1386                         .proto = 0xff,
1387                         .hop_limits = 0xff,
1388                 },
1389         };
1390         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1391         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1392                                       MLX5_FLOW_LAYER_OUTER_L3;
1393         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1394                                       MLX5_FLOW_LAYER_OUTER_L4;
1395         int ret;
1396         uint8_t next_proto = 0xFF;
1397
1398         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
1399                 if (mask && spec)
1400                         next_proto = mask->hdr.proto & spec->hdr.proto;
1401                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1402                         return rte_flow_error_set(error, EINVAL,
1403                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1404                                                   item,
1405                                                   "multiple tunnel "
1406                                                   "not supported");
1407         }
1408         if (item_flags & MLX5_FLOW_LAYER_IPIP)
1409                 return rte_flow_error_set(error, EINVAL,
1410                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1411                                           "wrong tunnel type - IPv4 specified "
1412                                           "but IPv6 item provided");
1413         if (item_flags & l3m)
1414                 return rte_flow_error_set(error, ENOTSUP,
1415                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1416                                           "multiple L3 layers not supported");
1417         else if (item_flags & l4m)
1418                 return rte_flow_error_set(error, EINVAL,
1419                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1420                                           "L3 cannot follow an L4 layer.");
1421         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1422                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1423                 return rte_flow_error_set(error, EINVAL,
1424                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1425                                           "L3 cannot follow an NVGRE layer.");
1426         if (!mask)
1427                 mask = &rte_flow_item_ipv6_mask;
1428         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1429                                         acc_mask ? (const uint8_t *)acc_mask
1430                                                  : (const uint8_t *)&nic_mask,
1431                                         sizeof(struct rte_flow_item_ipv6),
1432                                         error);
1433         if (ret < 0)
1434                 return ret;
1435         return 0;
1436 }
1437
1438 /**
1439  * Validate UDP item.
1440  *
1441  * @param[in] item
1442  *   Item specification.
1443  * @param[in] item_flags
1444  *   Bit-fields that holds the items detected until now.
1445  * @param[in] target_protocol
1446  *   The next protocol in the previous item.
1447  * @param[in] flow_mask
1448  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
1449  * @param[out] error
1450  *   Pointer to error structure.
1451  *
1452  * @return
1453  *   0 on success, a negative errno value otherwise and rte_errno is set.
1454  */
1455 int
1456 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
1457                             uint64_t item_flags,
1458                             uint8_t target_protocol,
1459                             struct rte_flow_error *error)
1460 {
1461         const struct rte_flow_item_udp *mask = item->mask;
1462         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1463         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1464                                       MLX5_FLOW_LAYER_OUTER_L3;
1465         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1466                                       MLX5_FLOW_LAYER_OUTER_L4;
1467         int ret;
1468
1469         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
1470                 return rte_flow_error_set(error, EINVAL,
1471                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1472                                           "protocol filtering not compatible"
1473                                           " with UDP layer");
1474         if (!(item_flags & l3m))
1475                 return rte_flow_error_set(error, EINVAL,
1476                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1477                                           "L3 is mandatory to filter on L4");
1478         if (item_flags & l4m)
1479                 return rte_flow_error_set(error, EINVAL,
1480                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1481                                           "multiple L4 layers not supported");
1482         if (!mask)
1483                 mask = &rte_flow_item_udp_mask;
1484         ret = mlx5_flow_item_acceptable
1485                 (item, (const uint8_t *)mask,
1486                  (const uint8_t *)&rte_flow_item_udp_mask,
1487                  sizeof(struct rte_flow_item_udp), error);
1488         if (ret < 0)
1489                 return ret;
1490         return 0;
1491 }
1492
1493 /**
1494  * Validate TCP item.
1495  *
1496  * @param[in] item
1497  *   Item specification.
1498  * @param[in] item_flags
1499  *   Bit-fields that holds the items detected until now.
1500  * @param[in] target_protocol
1501  *   The next protocol in the previous item.
1502  * @param[out] error
1503  *   Pointer to error structure.
1504  *
1505  * @return
1506  *   0 on success, a negative errno value otherwise and rte_errno is set.
1507  */
1508 int
1509 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
1510                             uint64_t item_flags,
1511                             uint8_t target_protocol,
1512                             const struct rte_flow_item_tcp *flow_mask,
1513                             struct rte_flow_error *error)
1514 {
1515         const struct rte_flow_item_tcp *mask = item->mask;
1516         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1517         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1518                                       MLX5_FLOW_LAYER_OUTER_L3;
1519         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1520                                       MLX5_FLOW_LAYER_OUTER_L4;
1521         int ret;
1522
1523         assert(flow_mask);
1524         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
1525                 return rte_flow_error_set(error, EINVAL,
1526                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1527                                           "protocol filtering not compatible"
1528                                           " with TCP layer");
1529         if (!(item_flags & l3m))
1530                 return rte_flow_error_set(error, EINVAL,
1531                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1532                                           "L3 is mandatory to filter on L4");
1533         if (item_flags & l4m)
1534                 return rte_flow_error_set(error, EINVAL,
1535                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1536                                           "multiple L4 layers not supported");
1537         if (!mask)
1538                 mask = &rte_flow_item_tcp_mask;
1539         ret = mlx5_flow_item_acceptable
1540                 (item, (const uint8_t *)mask,
1541                  (const uint8_t *)flow_mask,
1542                  sizeof(struct rte_flow_item_tcp), error);
1543         if (ret < 0)
1544                 return ret;
1545         return 0;
1546 }
1547
1548 /**
1549  * Validate VXLAN item.
1550  *
1551  * @param[in] item
1552  *   Item specification.
1553  * @param[in] item_flags
1554  *   Bit-fields that holds the items detected until now.
1555  * @param[in] target_protocol
1556  *   The next protocol in the previous item.
1557  * @param[out] error
1558  *   Pointer to error structure.
1559  *
1560  * @return
1561  *   0 on success, a negative errno value otherwise and rte_errno is set.
1562  */
1563 int
1564 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
1565                               uint64_t item_flags,
1566                               struct rte_flow_error *error)
1567 {
1568         const struct rte_flow_item_vxlan *spec = item->spec;
1569         const struct rte_flow_item_vxlan *mask = item->mask;
1570         int ret;
1571         union vni {
1572                 uint32_t vlan_id;
1573                 uint8_t vni[4];
1574         } id = { .vlan_id = 0, };
1575         uint32_t vlan_id = 0;
1576
1577
1578         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1579                 return rte_flow_error_set(error, ENOTSUP,
1580                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1581                                           "multiple tunnel layers not"
1582                                           " supported");
1583         /*
1584          * Verify only UDPv4 is present as defined in
1585          * https://tools.ietf.org/html/rfc7348
1586          */
1587         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1588                 return rte_flow_error_set(error, EINVAL,
1589                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1590                                           "no outer UDP layer found");
1591         if (!mask)
1592                 mask = &rte_flow_item_vxlan_mask;
1593         ret = mlx5_flow_item_acceptable
1594                 (item, (const uint8_t *)mask,
1595                  (const uint8_t *)&rte_flow_item_vxlan_mask,
1596                  sizeof(struct rte_flow_item_vxlan),
1597                  error);
1598         if (ret < 0)
1599                 return ret;
1600         if (spec) {
1601                 memcpy(&id.vni[1], spec->vni, 3);
1602                 vlan_id = id.vlan_id;
1603                 memcpy(&id.vni[1], mask->vni, 3);
1604                 vlan_id &= id.vlan_id;
1605         }
1606         /*
1607          * Tunnel id 0 is equivalent as not adding a VXLAN layer, if
1608          * only this layer is defined in the Verbs specification it is
1609          * interpreted as wildcard and all packets will match this
1610          * rule, if it follows a full stack layer (ex: eth / ipv4 /
1611          * udp), all packets matching the layers before will also
1612          * match this rule.  To avoid such situation, VNI 0 is
1613          * currently refused.
1614          */
1615         if (!vlan_id)
1616                 return rte_flow_error_set(error, ENOTSUP,
1617                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1618                                           "VXLAN vni cannot be 0");
1619         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1620                 return rte_flow_error_set(error, ENOTSUP,
1621                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1622                                           "VXLAN tunnel must be fully defined");
1623         return 0;
1624 }
1625
1626 /**
1627  * Validate VXLAN_GPE item.
1628  *
1629  * @param[in] item
1630  *   Item specification.
1631  * @param[in] item_flags
1632  *   Bit-fields that holds the items detected until now.
1633  * @param[in] priv
1634  *   Pointer to the private data structure.
1635  * @param[in] target_protocol
1636  *   The next protocol in the previous item.
1637  * @param[out] error
1638  *   Pointer to error structure.
1639  *
1640  * @return
1641  *   0 on success, a negative errno value otherwise and rte_errno is set.
1642  */
1643 int
1644 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
1645                                   uint64_t item_flags,
1646                                   struct rte_eth_dev *dev,
1647                                   struct rte_flow_error *error)
1648 {
1649         struct mlx5_priv *priv = dev->data->dev_private;
1650         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
1651         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
1652         int ret;
1653         union vni {
1654                 uint32_t vlan_id;
1655                 uint8_t vni[4];
1656         } id = { .vlan_id = 0, };
1657         uint32_t vlan_id = 0;
1658
1659         if (!priv->config.l3_vxlan_en)
1660                 return rte_flow_error_set(error, ENOTSUP,
1661                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1662                                           "L3 VXLAN is not enabled by device"
1663                                           " parameter and/or not configured in"
1664                                           " firmware");
1665         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1666                 return rte_flow_error_set(error, ENOTSUP,
1667                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1668                                           "multiple tunnel layers not"
1669                                           " supported");
1670         /*
1671          * Verify only UDPv4 is present as defined in
1672          * https://tools.ietf.org/html/rfc7348
1673          */
1674         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1675                 return rte_flow_error_set(error, EINVAL,
1676                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1677                                           "no outer UDP layer found");
1678         if (!mask)
1679                 mask = &rte_flow_item_vxlan_gpe_mask;
1680         ret = mlx5_flow_item_acceptable
1681                 (item, (const uint8_t *)mask,
1682                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
1683                  sizeof(struct rte_flow_item_vxlan_gpe),
1684                  error);
1685         if (ret < 0)
1686                 return ret;
1687         if (spec) {
1688                 if (spec->protocol)
1689                         return rte_flow_error_set(error, ENOTSUP,
1690                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1691                                                   item,
1692                                                   "VxLAN-GPE protocol"
1693                                                   " not supported");
1694                 memcpy(&id.vni[1], spec->vni, 3);
1695                 vlan_id = id.vlan_id;
1696                 memcpy(&id.vni[1], mask->vni, 3);
1697                 vlan_id &= id.vlan_id;
1698         }
1699         /*
1700          * Tunnel id 0 is equivalent as not adding a VXLAN layer, if only this
1701          * layer is defined in the Verbs specification it is interpreted as
1702          * wildcard and all packets will match this rule, if it follows a full
1703          * stack layer (ex: eth / ipv4 / udp), all packets matching the layers
1704          * before will also match this rule.  To avoid such situation, VNI 0
1705          * is currently refused.
1706          */
1707         if (!vlan_id)
1708                 return rte_flow_error_set(error, ENOTSUP,
1709                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1710                                           "VXLAN-GPE vni cannot be 0");
1711         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1712                 return rte_flow_error_set(error, ENOTSUP,
1713                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1714                                           "VXLAN-GPE tunnel must be fully"
1715                                           " defined");
1716         return 0;
1717 }
1718 /**
1719  * Validate GRE Key item.
1720  *
1721  * @param[in] item
1722  *   Item specification.
1723  * @param[in] item_flags
1724  *   Bit flags to mark detected items.
1725  * @param[in] gre_item
1726  *   Pointer to gre_item
1727  * @param[out] error
1728  *   Pointer to error structure.
1729  *
1730  * @return
1731  *   0 on success, a negative errno value otherwise and rte_errno is set.
1732  */
1733 int
1734 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
1735                                 uint64_t item_flags,
1736                                 const struct rte_flow_item *gre_item,
1737                                 struct rte_flow_error *error)
1738 {
1739         const rte_be32_t *mask = item->mask;
1740         int ret = 0;
1741         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
1742         const struct rte_flow_item_gre *gre_spec = gre_item->spec;
1743         const struct rte_flow_item_gre *gre_mask = gre_item->mask;
1744
1745         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
1746                 return rte_flow_error_set(error, ENOTSUP,
1747                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1748                                           "Multiple GRE key not support");
1749         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
1750                 return rte_flow_error_set(error, ENOTSUP,
1751                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1752                                           "No preceding GRE header");
1753         if (item_flags & MLX5_FLOW_LAYER_INNER)
1754                 return rte_flow_error_set(error, ENOTSUP,
1755                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1756                                           "GRE key following a wrong item");
1757         if (!gre_mask)
1758                 gre_mask = &rte_flow_item_gre_mask;
1759         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
1760                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
1761                 return rte_flow_error_set(error, EINVAL,
1762                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1763                                           "Key bit must be on");
1764
1765         if (!mask)
1766                 mask = &gre_key_default_mask;
1767         ret = mlx5_flow_item_acceptable
1768                 (item, (const uint8_t *)mask,
1769                  (const uint8_t *)&gre_key_default_mask,
1770                  sizeof(rte_be32_t), error);
1771         return ret;
1772 }
1773
1774 /**
1775  * Validate GRE item.
1776  *
1777  * @param[in] item
1778  *   Item specification.
1779  * @param[in] item_flags
1780  *   Bit flags to mark detected items.
1781  * @param[in] target_protocol
1782  *   The next protocol in the previous item.
1783  * @param[out] error
1784  *   Pointer to error structure.
1785  *
1786  * @return
1787  *   0 on success, a negative errno value otherwise and rte_errno is set.
1788  */
1789 int
1790 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
1791                             uint64_t item_flags,
1792                             uint8_t target_protocol,
1793                             struct rte_flow_error *error)
1794 {
1795         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
1796         const struct rte_flow_item_gre *mask = item->mask;
1797         int ret;
1798         const struct rte_flow_item_gre nic_mask = {
1799                 .c_rsvd0_ver = RTE_BE16(0xB000),
1800                 .protocol = RTE_BE16(UINT16_MAX),
1801         };
1802
1803         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
1804                 return rte_flow_error_set(error, EINVAL,
1805                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1806                                           "protocol filtering not compatible"
1807                                           " with this GRE layer");
1808         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1809                 return rte_flow_error_set(error, ENOTSUP,
1810                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1811                                           "multiple tunnel layers not"
1812                                           " supported");
1813         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
1814                 return rte_flow_error_set(error, ENOTSUP,
1815                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1816                                           "L3 Layer is missing");
1817         if (!mask)
1818                 mask = &rte_flow_item_gre_mask;
1819         ret = mlx5_flow_item_acceptable
1820                 (item, (const uint8_t *)mask,
1821                  (const uint8_t *)&nic_mask,
1822                  sizeof(struct rte_flow_item_gre), error);
1823         if (ret < 0)
1824                 return ret;
1825 #ifndef HAVE_MLX5DV_DR
1826 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
1827         if (spec && (spec->protocol & mask->protocol))
1828                 return rte_flow_error_set(error, ENOTSUP,
1829                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1830                                           "without MPLS support the"
1831                                           " specification cannot be used for"
1832                                           " filtering");
1833 #endif
1834 #endif
1835         return 0;
1836 }
1837
1838 /**
1839  * Validate MPLS item.
1840  *
1841  * @param[in] dev
1842  *   Pointer to the rte_eth_dev structure.
1843  * @param[in] item
1844  *   Item specification.
1845  * @param[in] item_flags
1846  *   Bit-fields that holds the items detected until now.
1847  * @param[in] prev_layer
1848  *   The protocol layer indicated in previous item.
1849  * @param[out] error
1850  *   Pointer to error structure.
1851  *
1852  * @return
1853  *   0 on success, a negative errno value otherwise and rte_errno is set.
1854  */
1855 int
1856 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
1857                              const struct rte_flow_item *item __rte_unused,
1858                              uint64_t item_flags __rte_unused,
1859                              uint64_t prev_layer __rte_unused,
1860                              struct rte_flow_error *error)
1861 {
1862 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1863         const struct rte_flow_item_mpls *mask = item->mask;
1864         struct mlx5_priv *priv = dev->data->dev_private;
1865         int ret;
1866
1867         if (!priv->config.mpls_en)
1868                 return rte_flow_error_set(error, ENOTSUP,
1869                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1870                                           "MPLS not supported or"
1871                                           " disabled in firmware"
1872                                           " configuration.");
1873         /* MPLS over IP, UDP, GRE is allowed */
1874         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
1875                             MLX5_FLOW_LAYER_OUTER_L4_UDP |
1876                             MLX5_FLOW_LAYER_GRE)))
1877                 return rte_flow_error_set(error, EINVAL,
1878                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1879                                           "protocol filtering not compatible"
1880                                           " with MPLS layer");
1881         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
1882         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
1883             !(item_flags & MLX5_FLOW_LAYER_GRE))
1884                 return rte_flow_error_set(error, ENOTSUP,
1885                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1886                                           "multiple tunnel layers not"
1887                                           " supported");
1888         if (!mask)
1889                 mask = &rte_flow_item_mpls_mask;
1890         ret = mlx5_flow_item_acceptable
1891                 (item, (const uint8_t *)mask,
1892                  (const uint8_t *)&rte_flow_item_mpls_mask,
1893                  sizeof(struct rte_flow_item_mpls), error);
1894         if (ret < 0)
1895                 return ret;
1896         return 0;
1897 #endif
1898         return rte_flow_error_set(error, ENOTSUP,
1899                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
1900                                   "MPLS is not supported by Verbs, please"
1901                                   " update.");
1902 }
1903
1904 /**
1905  * Validate NVGRE item.
1906  *
1907  * @param[in] item
1908  *   Item specification.
1909  * @param[in] item_flags
1910  *   Bit flags to mark detected items.
1911  * @param[in] target_protocol
1912  *   The next protocol in the previous item.
1913  * @param[out] error
1914  *   Pointer to error structure.
1915  *
1916  * @return
1917  *   0 on success, a negative errno value otherwise and rte_errno is set.
1918  */
1919 int
1920 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
1921                               uint64_t item_flags,
1922                               uint8_t target_protocol,
1923                               struct rte_flow_error *error)
1924 {
1925         const struct rte_flow_item_nvgre *mask = item->mask;
1926         int ret;
1927
1928         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
1929                 return rte_flow_error_set(error, EINVAL,
1930                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1931                                           "protocol filtering not compatible"
1932                                           " with this GRE layer");
1933         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1934                 return rte_flow_error_set(error, ENOTSUP,
1935                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1936                                           "multiple tunnel layers not"
1937                                           " supported");
1938         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
1939                 return rte_flow_error_set(error, ENOTSUP,
1940                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1941                                           "L3 Layer is missing");
1942         if (!mask)
1943                 mask = &rte_flow_item_nvgre_mask;
1944         ret = mlx5_flow_item_acceptable
1945                 (item, (const uint8_t *)mask,
1946                  (const uint8_t *)&rte_flow_item_nvgre_mask,
1947                  sizeof(struct rte_flow_item_nvgre), error);
1948         if (ret < 0)
1949                 return ret;
1950         return 0;
1951 }
1952
1953 static int
1954 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
1955                    const struct rte_flow_attr *attr __rte_unused,
1956                    const struct rte_flow_item items[] __rte_unused,
1957                    const struct rte_flow_action actions[] __rte_unused,
1958                    struct rte_flow_error *error)
1959 {
1960         return rte_flow_error_set(error, ENOTSUP,
1961                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
1962 }
1963
1964 static struct mlx5_flow *
1965 flow_null_prepare(const struct rte_flow_attr *attr __rte_unused,
1966                   const struct rte_flow_item items[] __rte_unused,
1967                   const struct rte_flow_action actions[] __rte_unused,
1968                   struct rte_flow_error *error)
1969 {
1970         rte_flow_error_set(error, ENOTSUP,
1971                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
1972         return NULL;
1973 }
1974
1975 static int
1976 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
1977                     struct mlx5_flow *dev_flow __rte_unused,
1978                     const struct rte_flow_attr *attr __rte_unused,
1979                     const struct rte_flow_item items[] __rte_unused,
1980                     const struct rte_flow_action actions[] __rte_unused,
1981                     struct rte_flow_error *error)
1982 {
1983         return rte_flow_error_set(error, ENOTSUP,
1984                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
1985 }
1986
1987 static int
1988 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
1989                 struct rte_flow *flow __rte_unused,
1990                 struct rte_flow_error *error)
1991 {
1992         return rte_flow_error_set(error, ENOTSUP,
1993                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
1994 }
1995
1996 static void
1997 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
1998                  struct rte_flow *flow __rte_unused)
1999 {
2000 }
2001
2002 static void
2003 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
2004                   struct rte_flow *flow __rte_unused)
2005 {
2006 }
2007
2008 static int
2009 flow_null_query(struct rte_eth_dev *dev __rte_unused,
2010                 struct rte_flow *flow __rte_unused,
2011                 const struct rte_flow_action *actions __rte_unused,
2012                 void *data __rte_unused,
2013                 struct rte_flow_error *error)
2014 {
2015         return rte_flow_error_set(error, ENOTSUP,
2016                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2017 }
2018
2019 /* Void driver to protect from null pointer reference. */
2020 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
2021         .validate = flow_null_validate,
2022         .prepare = flow_null_prepare,
2023         .translate = flow_null_translate,
2024         .apply = flow_null_apply,
2025         .remove = flow_null_remove,
2026         .destroy = flow_null_destroy,
2027         .query = flow_null_query,
2028 };
2029
2030 /**
2031  * Select flow driver type according to flow attributes and device
2032  * configuration.
2033  *
2034  * @param[in] dev
2035  *   Pointer to the dev structure.
2036  * @param[in] attr
2037  *   Pointer to the flow attributes.
2038  *
2039  * @return
2040  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
2041  */
2042 static enum mlx5_flow_drv_type
2043 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
2044 {
2045         struct mlx5_priv *priv = dev->data->dev_private;
2046         enum mlx5_flow_drv_type type = MLX5_FLOW_TYPE_MAX;
2047
2048         if (attr->transfer && priv->config.dv_esw_en)
2049                 type = MLX5_FLOW_TYPE_DV;
2050         if (!attr->transfer)
2051                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
2052                                                  MLX5_FLOW_TYPE_VERBS;
2053         return type;
2054 }
2055
2056 #define flow_get_drv_ops(type) flow_drv_ops[type]
2057
2058 /**
2059  * Flow driver validation API. This abstracts calling driver specific functions.
2060  * The type of flow driver is determined according to flow attributes.
2061  *
2062  * @param[in] dev
2063  *   Pointer to the dev structure.
2064  * @param[in] attr
2065  *   Pointer to the flow attributes.
2066  * @param[in] items
2067  *   Pointer to the list of items.
2068  * @param[in] actions
2069  *   Pointer to the list of actions.
2070  * @param[out] error
2071  *   Pointer to the error structure.
2072  *
2073  * @return
2074  *   0 on success, a negative errno value otherwise and rte_errno is set.
2075  */
2076 static inline int
2077 flow_drv_validate(struct rte_eth_dev *dev,
2078                   const struct rte_flow_attr *attr,
2079                   const struct rte_flow_item items[],
2080                   const struct rte_flow_action actions[],
2081                   struct rte_flow_error *error)
2082 {
2083         const struct mlx5_flow_driver_ops *fops;
2084         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
2085
2086         fops = flow_get_drv_ops(type);
2087         return fops->validate(dev, attr, items, actions, error);
2088 }
2089
2090 /**
2091  * Flow driver preparation API. This abstracts calling driver specific
2092  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2093  * calculates the size of memory required for device flow, allocates the memory,
2094  * initializes the device flow and returns the pointer.
2095  *
2096  * @note
2097  *   This function initializes device flow structure such as dv or verbs in
2098  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
2099  *   rest. For example, adding returning device flow to flow->dev_flow list and
2100  *   setting backward reference to the flow should be done out of this function.
2101  *   layers field is not filled either.
2102  *
2103  * @param[in] attr
2104  *   Pointer to the flow attributes.
2105  * @param[in] items
2106  *   Pointer to the list of items.
2107  * @param[in] actions
2108  *   Pointer to the list of actions.
2109  * @param[out] error
2110  *   Pointer to the error structure.
2111  *
2112  * @return
2113  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
2114  */
2115 static inline struct mlx5_flow *
2116 flow_drv_prepare(const struct rte_flow *flow,
2117                  const struct rte_flow_attr *attr,
2118                  const struct rte_flow_item items[],
2119                  const struct rte_flow_action actions[],
2120                  struct rte_flow_error *error)
2121 {
2122         const struct mlx5_flow_driver_ops *fops;
2123         enum mlx5_flow_drv_type type = flow->drv_type;
2124
2125         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2126         fops = flow_get_drv_ops(type);
2127         return fops->prepare(attr, items, actions, error);
2128 }
2129
2130 /**
2131  * Flow driver translation API. This abstracts calling driver specific
2132  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2133  * translates a generic flow into a driver flow. flow_drv_prepare() must
2134  * precede.
2135  *
2136  * @note
2137  *   dev_flow->layers could be filled as a result of parsing during translation
2138  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
2139  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
2140  *   flow->actions could be overwritten even though all the expanded dev_flows
2141  *   have the same actions.
2142  *
2143  * @param[in] dev
2144  *   Pointer to the rte dev structure.
2145  * @param[in, out] dev_flow
2146  *   Pointer to the mlx5 flow.
2147  * @param[in] attr
2148  *   Pointer to the flow attributes.
2149  * @param[in] items
2150  *   Pointer to the list of items.
2151  * @param[in] actions
2152  *   Pointer to the list of actions.
2153  * @param[out] error
2154  *   Pointer to the error structure.
2155  *
2156  * @return
2157  *   0 on success, a negative errno value otherwise and rte_errno is set.
2158  */
2159 static inline int
2160 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
2161                    const struct rte_flow_attr *attr,
2162                    const struct rte_flow_item items[],
2163                    const struct rte_flow_action actions[],
2164                    struct rte_flow_error *error)
2165 {
2166         const struct mlx5_flow_driver_ops *fops;
2167         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
2168
2169         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2170         fops = flow_get_drv_ops(type);
2171         return fops->translate(dev, dev_flow, attr, items, actions, error);
2172 }
2173
2174 /**
2175  * Flow driver apply API. This abstracts calling driver specific functions.
2176  * Parent flow (rte_flow) should have driver type (drv_type). It applies
2177  * translated driver flows on to device. flow_drv_translate() must precede.
2178  *
2179  * @param[in] dev
2180  *   Pointer to Ethernet device structure.
2181  * @param[in, out] flow
2182  *   Pointer to flow structure.
2183  * @param[out] error
2184  *   Pointer to error structure.
2185  *
2186  * @return
2187  *   0 on success, a negative errno value otherwise and rte_errno is set.
2188  */
2189 static inline int
2190 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
2191                struct rte_flow_error *error)
2192 {
2193         const struct mlx5_flow_driver_ops *fops;
2194         enum mlx5_flow_drv_type type = flow->drv_type;
2195
2196         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2197         fops = flow_get_drv_ops(type);
2198         return fops->apply(dev, flow, error);
2199 }
2200
2201 /**
2202  * Flow driver remove API. This abstracts calling driver specific functions.
2203  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2204  * on device. All the resources of the flow should be freed by calling
2205  * flow_drv_destroy().
2206  *
2207  * @param[in] dev
2208  *   Pointer to Ethernet device.
2209  * @param[in, out] flow
2210  *   Pointer to flow structure.
2211  */
2212 static inline void
2213 flow_drv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
2214 {
2215         const struct mlx5_flow_driver_ops *fops;
2216         enum mlx5_flow_drv_type type = flow->drv_type;
2217
2218         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2219         fops = flow_get_drv_ops(type);
2220         fops->remove(dev, flow);
2221 }
2222
2223 /**
2224  * Flow driver destroy API. This abstracts calling driver specific functions.
2225  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2226  * on device and releases resources of the flow.
2227  *
2228  * @param[in] dev
2229  *   Pointer to Ethernet device.
2230  * @param[in, out] flow
2231  *   Pointer to flow structure.
2232  */
2233 static inline void
2234 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
2235 {
2236         const struct mlx5_flow_driver_ops *fops;
2237         enum mlx5_flow_drv_type type = flow->drv_type;
2238
2239         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2240         fops = flow_get_drv_ops(type);
2241         fops->destroy(dev, flow);
2242 }
2243
2244 /**
2245  * Validate a flow supported by the NIC.
2246  *
2247  * @see rte_flow_validate()
2248  * @see rte_flow_ops
2249  */
2250 int
2251 mlx5_flow_validate(struct rte_eth_dev *dev,
2252                    const struct rte_flow_attr *attr,
2253                    const struct rte_flow_item items[],
2254                    const struct rte_flow_action actions[],
2255                    struct rte_flow_error *error)
2256 {
2257         int ret;
2258
2259         ret = flow_drv_validate(dev, attr, items, actions, error);
2260         if (ret < 0)
2261                 return ret;
2262         return 0;
2263 }
2264
2265 /**
2266  * Get RSS action from the action list.
2267  *
2268  * @param[in] actions
2269  *   Pointer to the list of actions.
2270  *
2271  * @return
2272  *   Pointer to the RSS action if exist, else return NULL.
2273  */
2274 static const struct rte_flow_action_rss*
2275 flow_get_rss_action(const struct rte_flow_action actions[])
2276 {
2277         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2278                 switch (actions->type) {
2279                 case RTE_FLOW_ACTION_TYPE_RSS:
2280                         return (const struct rte_flow_action_rss *)
2281                                actions->conf;
2282                 default:
2283                         break;
2284                 }
2285         }
2286         return NULL;
2287 }
2288
2289 static unsigned int
2290 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
2291 {
2292         const struct rte_flow_item *item;
2293         unsigned int has_vlan = 0;
2294
2295         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
2296                 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
2297                         has_vlan = 1;
2298                         break;
2299                 }
2300         }
2301         if (has_vlan)
2302                 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
2303                                        MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
2304         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
2305                                MLX5_EXPANSION_ROOT_OUTER;
2306 }
2307
2308 /**
2309  * Create a flow and add it to @p list.
2310  *
2311  * @param dev
2312  *   Pointer to Ethernet device.
2313  * @param list
2314  *   Pointer to a TAILQ flow list.
2315  * @param[in] attr
2316  *   Flow rule attributes.
2317  * @param[in] items
2318  *   Pattern specification (list terminated by the END pattern item).
2319  * @param[in] actions
2320  *   Associated actions (list terminated by the END action).
2321  * @param[out] error
2322  *   Perform verbose error reporting if not NULL.
2323  *
2324  * @return
2325  *   A flow on success, NULL otherwise and rte_errno is set.
2326  */
2327 static struct rte_flow *
2328 flow_list_create(struct rte_eth_dev *dev, struct mlx5_flows *list,
2329                  const struct rte_flow_attr *attr,
2330                  const struct rte_flow_item items[],
2331                  const struct rte_flow_action actions[],
2332                  struct rte_flow_error *error)
2333 {
2334         struct rte_flow *flow = NULL;
2335         struct mlx5_flow *dev_flow;
2336         const struct rte_flow_action_rss *rss;
2337         union {
2338                 struct rte_flow_expand_rss buf;
2339                 uint8_t buffer[2048];
2340         } expand_buffer;
2341         struct rte_flow_expand_rss *buf = &expand_buffer.buf;
2342         int ret;
2343         uint32_t i;
2344         uint32_t flow_size;
2345
2346         ret = flow_drv_validate(dev, attr, items, actions, error);
2347         if (ret < 0)
2348                 return NULL;
2349         flow_size = sizeof(struct rte_flow);
2350         rss = flow_get_rss_action(actions);
2351         if (rss)
2352                 flow_size += RTE_ALIGN_CEIL(rss->queue_num * sizeof(uint16_t),
2353                                             sizeof(void *));
2354         else
2355                 flow_size += RTE_ALIGN_CEIL(sizeof(uint16_t), sizeof(void *));
2356         flow = rte_calloc(__func__, 1, flow_size, 0);
2357         if (!flow) {
2358                 rte_errno = ENOMEM;
2359                 return NULL;
2360         }
2361         flow->drv_type = flow_get_drv_type(dev, attr);
2362         flow->ingress = attr->ingress;
2363         flow->transfer = attr->transfer;
2364         assert(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
2365                flow->drv_type < MLX5_FLOW_TYPE_MAX);
2366         flow->queue = (void *)(flow + 1);
2367         LIST_INIT(&flow->dev_flows);
2368         if (rss && rss->types) {
2369                 unsigned int graph_root;
2370
2371                 graph_root = find_graph_root(items, rss->level);
2372                 ret = rte_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
2373                                           items, rss->types,
2374                                           mlx5_support_expansion,
2375                                           graph_root);
2376                 assert(ret > 0 &&
2377                        (unsigned int)ret < sizeof(expand_buffer.buffer));
2378         } else {
2379                 buf->entries = 1;
2380                 buf->entry[0].pattern = (void *)(uintptr_t)items;
2381         }
2382         for (i = 0; i < buf->entries; ++i) {
2383                 dev_flow = flow_drv_prepare(flow, attr, buf->entry[i].pattern,
2384                                             actions, error);
2385                 if (!dev_flow)
2386                         goto error;
2387                 dev_flow->flow = flow;
2388                 LIST_INSERT_HEAD(&flow->dev_flows, dev_flow, next);
2389                 ret = flow_drv_translate(dev, dev_flow, attr,
2390                                          buf->entry[i].pattern,
2391                                          actions, error);
2392                 if (ret < 0)
2393                         goto error;
2394         }
2395         if (dev->data->dev_started) {
2396                 ret = flow_drv_apply(dev, flow, error);
2397                 if (ret < 0)
2398                         goto error;
2399         }
2400         TAILQ_INSERT_TAIL(list, flow, next);
2401         flow_rxq_flags_set(dev, flow);
2402         return flow;
2403 error:
2404         ret = rte_errno; /* Save rte_errno before cleanup. */
2405         assert(flow);
2406         flow_drv_destroy(dev, flow);
2407         rte_free(flow);
2408         rte_errno = ret; /* Restore rte_errno. */
2409         return NULL;
2410 }
2411
2412 /**
2413  * Create a flow.
2414  *
2415  * @see rte_flow_create()
2416  * @see rte_flow_ops
2417  */
2418 struct rte_flow *
2419 mlx5_flow_create(struct rte_eth_dev *dev,
2420                  const struct rte_flow_attr *attr,
2421                  const struct rte_flow_item items[],
2422                  const struct rte_flow_action actions[],
2423                  struct rte_flow_error *error)
2424 {
2425         struct mlx5_priv *priv = dev->data->dev_private;
2426
2427         return flow_list_create(dev, &priv->flows,
2428                                 attr, items, actions, error);
2429 }
2430
2431 /**
2432  * Destroy a flow in a list.
2433  *
2434  * @param dev
2435  *   Pointer to Ethernet device.
2436  * @param list
2437  *   Pointer to a TAILQ flow list.
2438  * @param[in] flow
2439  *   Flow to destroy.
2440  */
2441 static void
2442 flow_list_destroy(struct rte_eth_dev *dev, struct mlx5_flows *list,
2443                   struct rte_flow *flow)
2444 {
2445         /*
2446          * Update RX queue flags only if port is started, otherwise it is
2447          * already clean.
2448          */
2449         if (dev->data->dev_started)
2450                 flow_rxq_flags_trim(dev, flow);
2451         flow_drv_destroy(dev, flow);
2452         TAILQ_REMOVE(list, flow, next);
2453         rte_free(flow->fdir);
2454         rte_free(flow);
2455 }
2456
2457 /**
2458  * Destroy all flows.
2459  *
2460  * @param dev
2461  *   Pointer to Ethernet device.
2462  * @param list
2463  *   Pointer to a TAILQ flow list.
2464  */
2465 void
2466 mlx5_flow_list_flush(struct rte_eth_dev *dev, struct mlx5_flows *list)
2467 {
2468         while (!TAILQ_EMPTY(list)) {
2469                 struct rte_flow *flow;
2470
2471                 flow = TAILQ_FIRST(list);
2472                 flow_list_destroy(dev, list, flow);
2473         }
2474 }
2475
2476 /**
2477  * Remove all flows.
2478  *
2479  * @param dev
2480  *   Pointer to Ethernet device.
2481  * @param list
2482  *   Pointer to a TAILQ flow list.
2483  */
2484 void
2485 mlx5_flow_stop(struct rte_eth_dev *dev, struct mlx5_flows *list)
2486 {
2487         struct rte_flow *flow;
2488
2489         TAILQ_FOREACH_REVERSE(flow, list, mlx5_flows, next)
2490                 flow_drv_remove(dev, flow);
2491         flow_rxq_flags_clear(dev);
2492 }
2493
2494 /**
2495  * Add all flows.
2496  *
2497  * @param dev
2498  *   Pointer to Ethernet device.
2499  * @param list
2500  *   Pointer to a TAILQ flow list.
2501  *
2502  * @return
2503  *   0 on success, a negative errno value otherwise and rte_errno is set.
2504  */
2505 int
2506 mlx5_flow_start(struct rte_eth_dev *dev, struct mlx5_flows *list)
2507 {
2508         struct rte_flow *flow;
2509         struct rte_flow_error error;
2510         int ret = 0;
2511
2512         TAILQ_FOREACH(flow, list, next) {
2513                 ret = flow_drv_apply(dev, flow, &error);
2514                 if (ret < 0)
2515                         goto error;
2516                 flow_rxq_flags_set(dev, flow);
2517         }
2518         return 0;
2519 error:
2520         ret = rte_errno; /* Save rte_errno before cleanup. */
2521         mlx5_flow_stop(dev, list);
2522         rte_errno = ret; /* Restore rte_errno. */
2523         return -rte_errno;
2524 }
2525
2526 /**
2527  * Verify the flow list is empty
2528  *
2529  * @param dev
2530  *  Pointer to Ethernet device.
2531  *
2532  * @return the number of flows not released.
2533  */
2534 int
2535 mlx5_flow_verify(struct rte_eth_dev *dev)
2536 {
2537         struct mlx5_priv *priv = dev->data->dev_private;
2538         struct rte_flow *flow;
2539         int ret = 0;
2540
2541         TAILQ_FOREACH(flow, &priv->flows, next) {
2542                 DRV_LOG(DEBUG, "port %u flow %p still referenced",
2543                         dev->data->port_id, (void *)flow);
2544                 ++ret;
2545         }
2546         return ret;
2547 }
2548
2549 /**
2550  * Enable a control flow configured from the control plane.
2551  *
2552  * @param dev
2553  *   Pointer to Ethernet device.
2554  * @param eth_spec
2555  *   An Ethernet flow spec to apply.
2556  * @param eth_mask
2557  *   An Ethernet flow mask to apply.
2558  * @param vlan_spec
2559  *   A VLAN flow spec to apply.
2560  * @param vlan_mask
2561  *   A VLAN flow mask to apply.
2562  *
2563  * @return
2564  *   0 on success, a negative errno value otherwise and rte_errno is set.
2565  */
2566 int
2567 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
2568                     struct rte_flow_item_eth *eth_spec,
2569                     struct rte_flow_item_eth *eth_mask,
2570                     struct rte_flow_item_vlan *vlan_spec,
2571                     struct rte_flow_item_vlan *vlan_mask)
2572 {
2573         struct mlx5_priv *priv = dev->data->dev_private;
2574         const struct rte_flow_attr attr = {
2575                 .ingress = 1,
2576                 .priority = MLX5_FLOW_PRIO_RSVD,
2577         };
2578         struct rte_flow_item items[] = {
2579                 {
2580                         .type = RTE_FLOW_ITEM_TYPE_ETH,
2581                         .spec = eth_spec,
2582                         .last = NULL,
2583                         .mask = eth_mask,
2584                 },
2585                 {
2586                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
2587                                               RTE_FLOW_ITEM_TYPE_END,
2588                         .spec = vlan_spec,
2589                         .last = NULL,
2590                         .mask = vlan_mask,
2591                 },
2592                 {
2593                         .type = RTE_FLOW_ITEM_TYPE_END,
2594                 },
2595         };
2596         uint16_t queue[priv->reta_idx_n];
2597         struct rte_flow_action_rss action_rss = {
2598                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
2599                 .level = 0,
2600                 .types = priv->rss_conf.rss_hf,
2601                 .key_len = priv->rss_conf.rss_key_len,
2602                 .queue_num = priv->reta_idx_n,
2603                 .key = priv->rss_conf.rss_key,
2604                 .queue = queue,
2605         };
2606         struct rte_flow_action actions[] = {
2607                 {
2608                         .type = RTE_FLOW_ACTION_TYPE_RSS,
2609                         .conf = &action_rss,
2610                 },
2611                 {
2612                         .type = RTE_FLOW_ACTION_TYPE_END,
2613                 },
2614         };
2615         struct rte_flow *flow;
2616         struct rte_flow_error error;
2617         unsigned int i;
2618
2619         if (!priv->reta_idx_n || !priv->rxqs_n) {
2620                 return 0;
2621         }
2622         for (i = 0; i != priv->reta_idx_n; ++i)
2623                 queue[i] = (*priv->reta_idx)[i];
2624         flow = flow_list_create(dev, &priv->ctrl_flows,
2625                                 &attr, items, actions, &error);
2626         if (!flow)
2627                 return -rte_errno;
2628         return 0;
2629 }
2630
2631 /**
2632  * Enable a flow control configured from the control plane.
2633  *
2634  * @param dev
2635  *   Pointer to Ethernet device.
2636  * @param eth_spec
2637  *   An Ethernet flow spec to apply.
2638  * @param eth_mask
2639  *   An Ethernet flow mask to apply.
2640  *
2641  * @return
2642  *   0 on success, a negative errno value otherwise and rte_errno is set.
2643  */
2644 int
2645 mlx5_ctrl_flow(struct rte_eth_dev *dev,
2646                struct rte_flow_item_eth *eth_spec,
2647                struct rte_flow_item_eth *eth_mask)
2648 {
2649         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
2650 }
2651
2652 /**
2653  * Destroy a flow.
2654  *
2655  * @see rte_flow_destroy()
2656  * @see rte_flow_ops
2657  */
2658 int
2659 mlx5_flow_destroy(struct rte_eth_dev *dev,
2660                   struct rte_flow *flow,
2661                   struct rte_flow_error *error __rte_unused)
2662 {
2663         struct mlx5_priv *priv = dev->data->dev_private;
2664
2665         flow_list_destroy(dev, &priv->flows, flow);
2666         return 0;
2667 }
2668
2669 /**
2670  * Destroy all flows.
2671  *
2672  * @see rte_flow_flush()
2673  * @see rte_flow_ops
2674  */
2675 int
2676 mlx5_flow_flush(struct rte_eth_dev *dev,
2677                 struct rte_flow_error *error __rte_unused)
2678 {
2679         struct mlx5_priv *priv = dev->data->dev_private;
2680
2681         mlx5_flow_list_flush(dev, &priv->flows);
2682         return 0;
2683 }
2684
2685 /**
2686  * Isolated mode.
2687  *
2688  * @see rte_flow_isolate()
2689  * @see rte_flow_ops
2690  */
2691 int
2692 mlx5_flow_isolate(struct rte_eth_dev *dev,
2693                   int enable,
2694                   struct rte_flow_error *error)
2695 {
2696         struct mlx5_priv *priv = dev->data->dev_private;
2697
2698         if (dev->data->dev_started) {
2699                 rte_flow_error_set(error, EBUSY,
2700                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2701                                    NULL,
2702                                    "port must be stopped first");
2703                 return -rte_errno;
2704         }
2705         priv->isolated = !!enable;
2706         if (enable)
2707                 dev->dev_ops = &mlx5_dev_ops_isolate;
2708         else
2709                 dev->dev_ops = &mlx5_dev_ops;
2710         return 0;
2711 }
2712
2713 /**
2714  * Query a flow.
2715  *
2716  * @see rte_flow_query()
2717  * @see rte_flow_ops
2718  */
2719 static int
2720 flow_drv_query(struct rte_eth_dev *dev,
2721                struct rte_flow *flow,
2722                const struct rte_flow_action *actions,
2723                void *data,
2724                struct rte_flow_error *error)
2725 {
2726         const struct mlx5_flow_driver_ops *fops;
2727         enum mlx5_flow_drv_type ftype = flow->drv_type;
2728
2729         assert(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
2730         fops = flow_get_drv_ops(ftype);
2731
2732         return fops->query(dev, flow, actions, data, error);
2733 }
2734
2735 /**
2736  * Query a flow.
2737  *
2738  * @see rte_flow_query()
2739  * @see rte_flow_ops
2740  */
2741 int
2742 mlx5_flow_query(struct rte_eth_dev *dev,
2743                 struct rte_flow *flow,
2744                 const struct rte_flow_action *actions,
2745                 void *data,
2746                 struct rte_flow_error *error)
2747 {
2748         int ret;
2749
2750         ret = flow_drv_query(dev, flow, actions, data, error);
2751         if (ret < 0)
2752                 return ret;
2753         return 0;
2754 }
2755
2756 /**
2757  * Convert a flow director filter to a generic flow.
2758  *
2759  * @param dev
2760  *   Pointer to Ethernet device.
2761  * @param fdir_filter
2762  *   Flow director filter to add.
2763  * @param attributes
2764  *   Generic flow parameters structure.
2765  *
2766  * @return
2767  *   0 on success, a negative errno value otherwise and rte_errno is set.
2768  */
2769 static int
2770 flow_fdir_filter_convert(struct rte_eth_dev *dev,
2771                          const struct rte_eth_fdir_filter *fdir_filter,
2772                          struct mlx5_fdir *attributes)
2773 {
2774         struct mlx5_priv *priv = dev->data->dev_private;
2775         const struct rte_eth_fdir_input *input = &fdir_filter->input;
2776         const struct rte_eth_fdir_masks *mask =
2777                 &dev->data->dev_conf.fdir_conf.mask;
2778
2779         /* Validate queue number. */
2780         if (fdir_filter->action.rx_queue >= priv->rxqs_n) {
2781                 DRV_LOG(ERR, "port %u invalid queue number %d",
2782                         dev->data->port_id, fdir_filter->action.rx_queue);
2783                 rte_errno = EINVAL;
2784                 return -rte_errno;
2785         }
2786         attributes->attr.ingress = 1;
2787         attributes->items[0] = (struct rte_flow_item) {
2788                 .type = RTE_FLOW_ITEM_TYPE_ETH,
2789                 .spec = &attributes->l2,
2790                 .mask = &attributes->l2_mask,
2791         };
2792         switch (fdir_filter->action.behavior) {
2793         case RTE_ETH_FDIR_ACCEPT:
2794                 attributes->actions[0] = (struct rte_flow_action){
2795                         .type = RTE_FLOW_ACTION_TYPE_QUEUE,
2796                         .conf = &attributes->queue,
2797                 };
2798                 break;
2799         case RTE_ETH_FDIR_REJECT:
2800                 attributes->actions[0] = (struct rte_flow_action){
2801                         .type = RTE_FLOW_ACTION_TYPE_DROP,
2802                 };
2803                 break;
2804         default:
2805                 DRV_LOG(ERR, "port %u invalid behavior %d",
2806                         dev->data->port_id,
2807                         fdir_filter->action.behavior);
2808                 rte_errno = ENOTSUP;
2809                 return -rte_errno;
2810         }
2811         attributes->queue.index = fdir_filter->action.rx_queue;
2812         /* Handle L3. */
2813         switch (fdir_filter->input.flow_type) {
2814         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
2815         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
2816         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
2817                 attributes->l3.ipv4.hdr = (struct rte_ipv4_hdr){
2818                         .src_addr = input->flow.ip4_flow.src_ip,
2819                         .dst_addr = input->flow.ip4_flow.dst_ip,
2820                         .time_to_live = input->flow.ip4_flow.ttl,
2821                         .type_of_service = input->flow.ip4_flow.tos,
2822                 };
2823                 attributes->l3_mask.ipv4.hdr = (struct rte_ipv4_hdr){
2824                         .src_addr = mask->ipv4_mask.src_ip,
2825                         .dst_addr = mask->ipv4_mask.dst_ip,
2826                         .time_to_live = mask->ipv4_mask.ttl,
2827                         .type_of_service = mask->ipv4_mask.tos,
2828                         .next_proto_id = mask->ipv4_mask.proto,
2829                 };
2830                 attributes->items[1] = (struct rte_flow_item){
2831                         .type = RTE_FLOW_ITEM_TYPE_IPV4,
2832                         .spec = &attributes->l3,
2833                         .mask = &attributes->l3_mask,
2834                 };
2835                 break;
2836         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
2837         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
2838         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
2839                 attributes->l3.ipv6.hdr = (struct rte_ipv6_hdr){
2840                         .hop_limits = input->flow.ipv6_flow.hop_limits,
2841                         .proto = input->flow.ipv6_flow.proto,
2842                 };
2843
2844                 memcpy(attributes->l3.ipv6.hdr.src_addr,
2845                        input->flow.ipv6_flow.src_ip,
2846                        RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
2847                 memcpy(attributes->l3.ipv6.hdr.dst_addr,
2848                        input->flow.ipv6_flow.dst_ip,
2849                        RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
2850                 memcpy(attributes->l3_mask.ipv6.hdr.src_addr,
2851                        mask->ipv6_mask.src_ip,
2852                        RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
2853                 memcpy(attributes->l3_mask.ipv6.hdr.dst_addr,
2854                        mask->ipv6_mask.dst_ip,
2855                        RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
2856                 attributes->items[1] = (struct rte_flow_item){
2857                         .type = RTE_FLOW_ITEM_TYPE_IPV6,
2858                         .spec = &attributes->l3,
2859                         .mask = &attributes->l3_mask,
2860                 };
2861                 break;
2862         default:
2863                 DRV_LOG(ERR, "port %u invalid flow type%d",
2864                         dev->data->port_id, fdir_filter->input.flow_type);
2865                 rte_errno = ENOTSUP;
2866                 return -rte_errno;
2867         }
2868         /* Handle L4. */
2869         switch (fdir_filter->input.flow_type) {
2870         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
2871                 attributes->l4.udp.hdr = (struct rte_udp_hdr){
2872                         .src_port = input->flow.udp4_flow.src_port,
2873                         .dst_port = input->flow.udp4_flow.dst_port,
2874                 };
2875                 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
2876                         .src_port = mask->src_port_mask,
2877                         .dst_port = mask->dst_port_mask,
2878                 };
2879                 attributes->items[2] = (struct rte_flow_item){
2880                         .type = RTE_FLOW_ITEM_TYPE_UDP,
2881                         .spec = &attributes->l4,
2882                         .mask = &attributes->l4_mask,
2883                 };
2884                 break;
2885         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
2886                 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
2887                         .src_port = input->flow.tcp4_flow.src_port,
2888                         .dst_port = input->flow.tcp4_flow.dst_port,
2889                 };
2890                 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
2891                         .src_port = mask->src_port_mask,
2892                         .dst_port = mask->dst_port_mask,
2893                 };
2894                 attributes->items[2] = (struct rte_flow_item){
2895                         .type = RTE_FLOW_ITEM_TYPE_TCP,
2896                         .spec = &attributes->l4,
2897                         .mask = &attributes->l4_mask,
2898                 };
2899                 break;
2900         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
2901                 attributes->l4.udp.hdr = (struct rte_udp_hdr){
2902                         .src_port = input->flow.udp6_flow.src_port,
2903                         .dst_port = input->flow.udp6_flow.dst_port,
2904                 };
2905                 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
2906                         .src_port = mask->src_port_mask,
2907                         .dst_port = mask->dst_port_mask,
2908                 };
2909                 attributes->items[2] = (struct rte_flow_item){
2910                         .type = RTE_FLOW_ITEM_TYPE_UDP,
2911                         .spec = &attributes->l4,
2912                         .mask = &attributes->l4_mask,
2913                 };
2914                 break;
2915         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
2916                 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
2917                         .src_port = input->flow.tcp6_flow.src_port,
2918                         .dst_port = input->flow.tcp6_flow.dst_port,
2919                 };
2920                 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
2921                         .src_port = mask->src_port_mask,
2922                         .dst_port = mask->dst_port_mask,
2923                 };
2924                 attributes->items[2] = (struct rte_flow_item){
2925                         .type = RTE_FLOW_ITEM_TYPE_TCP,
2926                         .spec = &attributes->l4,
2927                         .mask = &attributes->l4_mask,
2928                 };
2929                 break;
2930         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
2931         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
2932                 break;
2933         default:
2934                 DRV_LOG(ERR, "port %u invalid flow type%d",
2935                         dev->data->port_id, fdir_filter->input.flow_type);
2936                 rte_errno = ENOTSUP;
2937                 return -rte_errno;
2938         }
2939         return 0;
2940 }
2941
2942 #define FLOW_FDIR_CMP(f1, f2, fld) \
2943         memcmp(&(f1)->fld, &(f2)->fld, sizeof(f1->fld))
2944
2945 /**
2946  * Compare two FDIR flows. If items and actions are identical, the two flows are
2947  * regarded as same.
2948  *
2949  * @param dev
2950  *   Pointer to Ethernet device.
2951  * @param f1
2952  *   FDIR flow to compare.
2953  * @param f2
2954  *   FDIR flow to compare.
2955  *
2956  * @return
2957  *   Zero on match, 1 otherwise.
2958  */
2959 static int
2960 flow_fdir_cmp(const struct mlx5_fdir *f1, const struct mlx5_fdir *f2)
2961 {
2962         if (FLOW_FDIR_CMP(f1, f2, attr) ||
2963             FLOW_FDIR_CMP(f1, f2, l2) ||
2964             FLOW_FDIR_CMP(f1, f2, l2_mask) ||
2965             FLOW_FDIR_CMP(f1, f2, l3) ||
2966             FLOW_FDIR_CMP(f1, f2, l3_mask) ||
2967             FLOW_FDIR_CMP(f1, f2, l4) ||
2968             FLOW_FDIR_CMP(f1, f2, l4_mask) ||
2969             FLOW_FDIR_CMP(f1, f2, actions[0].type))
2970                 return 1;
2971         if (f1->actions[0].type == RTE_FLOW_ACTION_TYPE_QUEUE &&
2972             FLOW_FDIR_CMP(f1, f2, queue))
2973                 return 1;
2974         return 0;
2975 }
2976
2977 /**
2978  * Search device flow list to find out a matched FDIR flow.
2979  *
2980  * @param dev
2981  *   Pointer to Ethernet device.
2982  * @param fdir_flow
2983  *   FDIR flow to lookup.
2984  *
2985  * @return
2986  *   Pointer of flow if found, NULL otherwise.
2987  */
2988 static struct rte_flow *
2989 flow_fdir_filter_lookup(struct rte_eth_dev *dev, struct mlx5_fdir *fdir_flow)
2990 {
2991         struct mlx5_priv *priv = dev->data->dev_private;
2992         struct rte_flow *flow = NULL;
2993
2994         assert(fdir_flow);
2995         TAILQ_FOREACH(flow, &priv->flows, next) {
2996                 if (flow->fdir && !flow_fdir_cmp(flow->fdir, fdir_flow)) {
2997                         DRV_LOG(DEBUG, "port %u found FDIR flow %p",
2998                                 dev->data->port_id, (void *)flow);
2999                         break;
3000                 }
3001         }
3002         return flow;
3003 }
3004
3005 /**
3006  * Add new flow director filter and store it in list.
3007  *
3008  * @param dev
3009  *   Pointer to Ethernet device.
3010  * @param fdir_filter
3011  *   Flow director filter to add.
3012  *
3013  * @return
3014  *   0 on success, a negative errno value otherwise and rte_errno is set.
3015  */
3016 static int
3017 flow_fdir_filter_add(struct rte_eth_dev *dev,
3018                      const struct rte_eth_fdir_filter *fdir_filter)
3019 {
3020         struct mlx5_priv *priv = dev->data->dev_private;
3021         struct mlx5_fdir *fdir_flow;
3022         struct rte_flow *flow;
3023         int ret;
3024
3025         fdir_flow = rte_zmalloc(__func__, sizeof(*fdir_flow), 0);
3026         if (!fdir_flow) {
3027                 rte_errno = ENOMEM;
3028                 return -rte_errno;
3029         }
3030         ret = flow_fdir_filter_convert(dev, fdir_filter, fdir_flow);
3031         if (ret)
3032                 goto error;
3033         flow = flow_fdir_filter_lookup(dev, fdir_flow);
3034         if (flow) {
3035                 rte_errno = EEXIST;
3036                 goto error;
3037         }
3038         flow = flow_list_create(dev, &priv->flows, &fdir_flow->attr,
3039                                 fdir_flow->items, fdir_flow->actions, NULL);
3040         if (!flow)
3041                 goto error;
3042         assert(!flow->fdir);
3043         flow->fdir = fdir_flow;
3044         DRV_LOG(DEBUG, "port %u created FDIR flow %p",
3045                 dev->data->port_id, (void *)flow);
3046         return 0;
3047 error:
3048         rte_free(fdir_flow);
3049         return -rte_errno;
3050 }
3051
3052 /**
3053  * Delete specific filter.
3054  *
3055  * @param dev
3056  *   Pointer to Ethernet device.
3057  * @param fdir_filter
3058  *   Filter to be deleted.
3059  *
3060  * @return
3061  *   0 on success, a negative errno value otherwise and rte_errno is set.
3062  */
3063 static int
3064 flow_fdir_filter_delete(struct rte_eth_dev *dev,
3065                         const struct rte_eth_fdir_filter *fdir_filter)
3066 {
3067         struct mlx5_priv *priv = dev->data->dev_private;
3068         struct rte_flow *flow;
3069         struct mlx5_fdir fdir_flow = {
3070                 .attr.group = 0,
3071         };
3072         int ret;
3073
3074         ret = flow_fdir_filter_convert(dev, fdir_filter, &fdir_flow);
3075         if (ret)
3076                 return -rte_errno;
3077         flow = flow_fdir_filter_lookup(dev, &fdir_flow);
3078         if (!flow) {
3079                 rte_errno = ENOENT;
3080                 return -rte_errno;
3081         }
3082         flow_list_destroy(dev, &priv->flows, flow);
3083         DRV_LOG(DEBUG, "port %u deleted FDIR flow %p",
3084                 dev->data->port_id, (void *)flow);
3085         return 0;
3086 }
3087
3088 /**
3089  * Update queue for specific filter.
3090  *
3091  * @param dev
3092  *   Pointer to Ethernet device.
3093  * @param fdir_filter
3094  *   Filter to be updated.
3095  *
3096  * @return
3097  *   0 on success, a negative errno value otherwise and rte_errno is set.
3098  */
3099 static int
3100 flow_fdir_filter_update(struct rte_eth_dev *dev,
3101                         const struct rte_eth_fdir_filter *fdir_filter)
3102 {
3103         int ret;
3104
3105         ret = flow_fdir_filter_delete(dev, fdir_filter);
3106         if (ret)
3107                 return ret;
3108         return flow_fdir_filter_add(dev, fdir_filter);
3109 }
3110
3111 /**
3112  * Flush all filters.
3113  *
3114  * @param dev
3115  *   Pointer to Ethernet device.
3116  */
3117 static void
3118 flow_fdir_filter_flush(struct rte_eth_dev *dev)
3119 {
3120         struct mlx5_priv *priv = dev->data->dev_private;
3121
3122         mlx5_flow_list_flush(dev, &priv->flows);
3123 }
3124
3125 /**
3126  * Get flow director information.
3127  *
3128  * @param dev
3129  *   Pointer to Ethernet device.
3130  * @param[out] fdir_info
3131  *   Resulting flow director information.
3132  */
3133 static void
3134 flow_fdir_info_get(struct rte_eth_dev *dev, struct rte_eth_fdir_info *fdir_info)
3135 {
3136         struct rte_eth_fdir_masks *mask =
3137                 &dev->data->dev_conf.fdir_conf.mask;
3138
3139         fdir_info->mode = dev->data->dev_conf.fdir_conf.mode;
3140         fdir_info->guarant_spc = 0;
3141         rte_memcpy(&fdir_info->mask, mask, sizeof(fdir_info->mask));
3142         fdir_info->max_flexpayload = 0;
3143         fdir_info->flow_types_mask[0] = 0;
3144         fdir_info->flex_payload_unit = 0;
3145         fdir_info->max_flex_payload_segment_num = 0;
3146         fdir_info->flex_payload_limit = 0;
3147         memset(&fdir_info->flex_conf, 0, sizeof(fdir_info->flex_conf));
3148 }
3149
3150 /**
3151  * Deal with flow director operations.
3152  *
3153  * @param dev
3154  *   Pointer to Ethernet device.
3155  * @param filter_op
3156  *   Operation to perform.
3157  * @param arg
3158  *   Pointer to operation-specific structure.
3159  *
3160  * @return
3161  *   0 on success, a negative errno value otherwise and rte_errno is set.
3162  */
3163 static int
3164 flow_fdir_ctrl_func(struct rte_eth_dev *dev, enum rte_filter_op filter_op,
3165                     void *arg)
3166 {
3167         enum rte_fdir_mode fdir_mode =
3168                 dev->data->dev_conf.fdir_conf.mode;
3169
3170         if (filter_op == RTE_ETH_FILTER_NOP)
3171                 return 0;
3172         if (fdir_mode != RTE_FDIR_MODE_PERFECT &&
3173             fdir_mode != RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
3174                 DRV_LOG(ERR, "port %u flow director mode %d not supported",
3175                         dev->data->port_id, fdir_mode);
3176                 rte_errno = EINVAL;
3177                 return -rte_errno;
3178         }
3179         switch (filter_op) {
3180         case RTE_ETH_FILTER_ADD:
3181                 return flow_fdir_filter_add(dev, arg);
3182         case RTE_ETH_FILTER_UPDATE:
3183                 return flow_fdir_filter_update(dev, arg);
3184         case RTE_ETH_FILTER_DELETE:
3185                 return flow_fdir_filter_delete(dev, arg);
3186         case RTE_ETH_FILTER_FLUSH:
3187                 flow_fdir_filter_flush(dev);
3188                 break;
3189         case RTE_ETH_FILTER_INFO:
3190                 flow_fdir_info_get(dev, arg);
3191                 break;
3192         default:
3193                 DRV_LOG(DEBUG, "port %u unknown operation %u",
3194                         dev->data->port_id, filter_op);
3195                 rte_errno = EINVAL;
3196                 return -rte_errno;
3197         }
3198         return 0;
3199 }
3200
3201 /**
3202  * Manage filter operations.
3203  *
3204  * @param dev
3205  *   Pointer to Ethernet device structure.
3206  * @param filter_type
3207  *   Filter type.
3208  * @param filter_op
3209  *   Operation to perform.
3210  * @param arg
3211  *   Pointer to operation-specific structure.
3212  *
3213  * @return
3214  *   0 on success, a negative errno value otherwise and rte_errno is set.
3215  */
3216 int
3217 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
3218                      enum rte_filter_type filter_type,
3219                      enum rte_filter_op filter_op,
3220                      void *arg)
3221 {
3222         switch (filter_type) {
3223         case RTE_ETH_FILTER_GENERIC:
3224                 if (filter_op != RTE_ETH_FILTER_GET) {
3225                         rte_errno = EINVAL;
3226                         return -rte_errno;
3227                 }
3228                 *(const void **)arg = &mlx5_flow_ops;
3229                 return 0;
3230         case RTE_ETH_FILTER_FDIR:
3231                 return flow_fdir_ctrl_func(dev, filter_op, arg);
3232         default:
3233                 DRV_LOG(ERR, "port %u filter type (%d) not supported",
3234                         dev->data->port_id, filter_type);
3235                 rte_errno = ENOTSUP;
3236                 return -rte_errno;
3237         }
3238         return 0;
3239 }
3240
3241 #define MLX5_POOL_QUERY_FREQ_US 1000000
3242
3243 /**
3244  * Set the periodic procedure for triggering asynchronous batch queries for all
3245  * the counter pools.
3246  *
3247  * @param[in] sh
3248  *   Pointer to mlx5_ibv_shared object.
3249  */
3250 void
3251 mlx5_set_query_alarm(struct mlx5_ibv_shared *sh)
3252 {
3253         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(sh, 0, 0);
3254         uint32_t pools_n = rte_atomic16_read(&cont->n_valid);
3255         uint32_t us;
3256
3257         cont = MLX5_CNT_CONTAINER(sh, 1, 0);
3258         pools_n += rte_atomic16_read(&cont->n_valid);
3259         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
3260         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us\n", pools_n, us);
3261         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
3262                 sh->cmng.query_thread_on = 0;
3263                 DRV_LOG(ERR, "Cannot reinitialize query alarm\n");
3264         } else {
3265                 sh->cmng.query_thread_on = 1;
3266         }
3267 }
3268
3269 /**
3270  * The periodic procedure for triggering asynchronous batch queries for all the
3271  * counter pools. This function is probably called by the host thread.
3272  *
3273  * @param[in] arg
3274  *   The parameter for the alarm process.
3275  */
3276 void
3277 mlx5_flow_query_alarm(void *arg)
3278 {
3279         struct mlx5_ibv_shared *sh = arg;
3280         struct mlx5_devx_obj *dcs;
3281         uint16_t offset;
3282         int ret;
3283         uint8_t batch = sh->cmng.batch;
3284         uint16_t pool_index = sh->cmng.pool_index;
3285         struct mlx5_pools_container *cont;
3286         struct mlx5_pools_container *mcont;
3287         struct mlx5_flow_counter_pool *pool;
3288
3289         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
3290                 goto set_alarm;
3291 next_container:
3292         cont = MLX5_CNT_CONTAINER(sh, batch, 1);
3293         mcont = MLX5_CNT_CONTAINER(sh, batch, 0);
3294         /* Check if resize was done and need to flip a container. */
3295         if (cont != mcont) {
3296                 if (cont->pools) {
3297                         /* Clean the old container. */
3298                         rte_free(cont->pools);
3299                         memset(cont, 0, sizeof(*cont));
3300                 }
3301                 rte_cio_wmb();
3302                  /* Flip the host container. */
3303                 sh->cmng.mhi[batch] ^= (uint8_t)2;
3304                 cont = mcont;
3305         }
3306         if (!cont->pools) {
3307                 /* 2 empty containers case is unexpected. */
3308                 if (unlikely(batch != sh->cmng.batch))
3309                         goto set_alarm;
3310                 batch ^= 0x1;
3311                 pool_index = 0;
3312                 goto next_container;
3313         }
3314         pool = cont->pools[pool_index];
3315         if (pool->raw_hw)
3316                 /* There is a pool query in progress. */
3317                 goto set_alarm;
3318         pool->raw_hw =
3319                 LIST_FIRST(&sh->cmng.free_stat_raws);
3320         if (!pool->raw_hw)
3321                 /* No free counter statistics raw memory. */
3322                 goto set_alarm;
3323         dcs = (struct mlx5_devx_obj *)(uintptr_t)rte_atomic64_read
3324                                                               (&pool->a64_dcs);
3325         offset = batch ? 0 : dcs->id % MLX5_COUNTERS_PER_POOL;
3326         ret = mlx5_devx_cmd_flow_counter_query(dcs, 0, MLX5_COUNTERS_PER_POOL -
3327                                                offset, NULL, NULL,
3328                                                pool->raw_hw->mem_mng->dm->id,
3329                                                (void *)(uintptr_t)
3330                                                (pool->raw_hw->data + offset),
3331                                                sh->devx_comp,
3332                                                (uint64_t)(uintptr_t)pool);
3333         if (ret) {
3334                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
3335                         " %d\n", pool->min_dcs->id);
3336                 pool->raw_hw = NULL;
3337                 goto set_alarm;
3338         }
3339         pool->raw_hw->min_dcs_id = dcs->id;
3340         LIST_REMOVE(pool->raw_hw, next);
3341         sh->cmng.pending_queries++;
3342         pool_index++;
3343         if (pool_index >= rte_atomic16_read(&cont->n_valid)) {
3344                 batch ^= 0x1;
3345                 pool_index = 0;
3346         }
3347 set_alarm:
3348         sh->cmng.batch = batch;
3349         sh->cmng.pool_index = pool_index;
3350         mlx5_set_query_alarm(sh);
3351 }
3352
3353 /**
3354  * Handler for the HW respond about ready values from an asynchronous batch
3355  * query. This function is probably called by the host thread.
3356  *
3357  * @param[in] sh
3358  *   The pointer to the shared IB device context.
3359  * @param[in] async_id
3360  *   The Devx async ID.
3361  * @param[in] status
3362  *   The status of the completion.
3363  */
3364 void
3365 mlx5_flow_async_pool_query_handle(struct mlx5_ibv_shared *sh,
3366                                   uint64_t async_id, int status)
3367 {
3368         struct mlx5_flow_counter_pool *pool =
3369                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
3370         struct mlx5_counter_stats_raw *raw_to_free;
3371
3372         if (unlikely(status)) {
3373                 raw_to_free = pool->raw_hw;
3374         } else {
3375                 raw_to_free = pool->raw;
3376                 rte_spinlock_lock(&pool->sl);
3377                 pool->raw = pool->raw_hw;
3378                 rte_spinlock_unlock(&pool->sl);
3379                 rte_atomic64_add(&pool->query_gen, 1);
3380                 /* Be sure the new raw counters data is updated in memory. */
3381                 rte_cio_wmb();
3382         }
3383         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
3384         pool->raw_hw = NULL;
3385         sh->cmng.pending_queries--;
3386 }