drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <netinet/in.h>
   7 #include <sys/queue.h>
   8 #include <stdalign.h>
   9 #include <stdint.h>
  10 #include <string.h>
  11 #include <stdbool.h>
  12
  13 #include <rte_common.h>
  14 #include <rte_ether.h>
  15 #include <rte_ethdev_driver.h>
  16 #include <rte_eal_paging.h>
  17 #include <rte_flow.h>
  18 #include <rte_cycles.h>
  19 #include <rte_flow_driver.h>
  20 #include <rte_malloc.h>
  21 #include <rte_ip.h>
  22
  23 #include <mlx5_glue.h>
  24 #include <mlx5_devx_cmds.h>
  25 #include <mlx5_prm.h>
  26 #include <mlx5_malloc.h>
  27
  28 #include "mlx5_defs.h"
  29 #include "mlx5.h"
  30 #include "mlx5_flow.h"
  31 #include "mlx5_flow_os.h"
  32 #include "mlx5_rxtx.h"
  33 #include "mlx5_common_os.h"
  34
  35 static struct mlx5_flow_tunnel *
  36 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id);
  37 static void
  38 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel);
  39 static const struct mlx5_flow_tbl_data_entry  *
  40 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark);
  41 static int
  42 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
  43                      const struct rte_flow_tunnel *app_tunnel,
  44                      struct mlx5_flow_tunnel **tunnel);
  45
  46
  47 /** Device flow drivers. */
  48 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  49
  50 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  51
  52 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  53         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  54 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  55         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  56 #endif
  57         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  58         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  59 };
  60
  61 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */
  62 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \
  63         (const int []){ \
  64                 __VA_ARGS__, 0, \
  65         }
  66
  67 /** Node object of input graph for mlx5_flow_expand_rss(). */
  68 struct mlx5_flow_expand_node {
  69         const int *const next;
  70         /**<
  71          * List of next node indexes. Index 0 is interpreted as a terminator.
  72          */
  73         const enum rte_flow_item_type type;
  74         /**< Pattern item type of current node. */
  75         uint64_t rss_types;
  76         /**<
  77          * RSS types bit-field associated with this node
  78          * (see ETH_RSS_* definitions).
  79          */
  80 };
  81
  82 /** Object returned by mlx5_flow_expand_rss(). */
  83 struct mlx5_flow_expand_rss {
  84         uint32_t entries;
  85         /**< Number of entries @p patterns and @p priorities. */
  86         struct {
  87                 struct rte_flow_item *pattern; /**< Expanded pattern array. */
  88                 uint32_t priority; /**< Priority offset for each expansion. */
  89         } entry[];
  90 };
  91
  92 static enum rte_flow_item_type
  93 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item)
  94 {
  95         enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID;
  96         uint16_t ether_type = 0;
  97         uint16_t ether_type_m;
  98         uint8_t ip_next_proto = 0;
  99         uint8_t ip_next_proto_m;
 100
 101         if (item == NULL || item->spec == NULL)
 102                 return ret;
 103         switch (item->type) {
 104         case RTE_FLOW_ITEM_TYPE_ETH:
 105                 if (item->mask)
 106                         ether_type_m = ((const struct rte_flow_item_eth *)
 107                                                 (item->mask))->type;
 108                 else
 109                         ether_type_m = rte_flow_item_eth_mask.type;
 110                 if (ether_type_m != RTE_BE16(0xFFFF))
 111                         break;
 112                 ether_type = ((const struct rte_flow_item_eth *)
 113                                 (item->spec))->type;
 114                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 115                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 116                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 117                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 118                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 119                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 120                 else
 121                         ret = RTE_FLOW_ITEM_TYPE_END;
 122                 break;
 123         case RTE_FLOW_ITEM_TYPE_VLAN:
 124                 if (item->mask)
 125                         ether_type_m = ((const struct rte_flow_item_vlan *)
 126                                                 (item->mask))->inner_type;
 127                 else
 128                         ether_type_m = rte_flow_item_vlan_mask.inner_type;
 129                 if (ether_type_m != RTE_BE16(0xFFFF))
 130                         break;
 131                 ether_type = ((const struct rte_flow_item_vlan *)
 132                                 (item->spec))->inner_type;
 133                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 134                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 135                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 136                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 137                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 138                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 139                 else
 140                         ret = RTE_FLOW_ITEM_TYPE_END;
 141                 break;
 142         case RTE_FLOW_ITEM_TYPE_IPV4:
 143                 if (item->mask)
 144                         ip_next_proto_m = ((const struct rte_flow_item_ipv4 *)
 145                                         (item->mask))->hdr.next_proto_id;
 146                 else
 147                         ip_next_proto_m =
 148                                 rte_flow_item_ipv4_mask.hdr.next_proto_id;
 149                 if (ip_next_proto_m != 0xFF)
 150                         break;
 151                 ip_next_proto = ((const struct rte_flow_item_ipv4 *)
 152                                 (item->spec))->hdr.next_proto_id;
 153                 if (ip_next_proto == IPPROTO_UDP)
 154                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 155                 else if (ip_next_proto == IPPROTO_TCP)
 156                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 157                 else if (ip_next_proto == IPPROTO_IP)
 158                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 159                 else if (ip_next_proto == IPPROTO_IPV6)
 160                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 161                 else
 162                         ret = RTE_FLOW_ITEM_TYPE_END;
 163                 break;
 164         case RTE_FLOW_ITEM_TYPE_IPV6:
 165                 if (item->mask)
 166                         ip_next_proto_m = ((const struct rte_flow_item_ipv6 *)
 167                                                 (item->mask))->hdr.proto;
 168                 else
 169                         ip_next_proto_m =
 170                                 rte_flow_item_ipv6_mask.hdr.proto;
 171                 if (ip_next_proto_m != 0xFF)
 172                         break;
 173                 ip_next_proto = ((const struct rte_flow_item_ipv6 *)
 174                                 (item->spec))->hdr.proto;
 175                 if (ip_next_proto == IPPROTO_UDP)
 176                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 177                 else if (ip_next_proto == IPPROTO_TCP)
 178                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 179                 else if (ip_next_proto == IPPROTO_IP)
 180                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 181                 else if (ip_next_proto == IPPROTO_IPV6)
 182                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 183                 else
 184                         ret = RTE_FLOW_ITEM_TYPE_END;
 185                 break;
 186         default:
 187                 ret = RTE_FLOW_ITEM_TYPE_VOID;
 188                 break;
 189         }
 190         return ret;
 191 }
 192
 193 /**
 194  * Expand RSS flows into several possible flows according to the RSS hash
 195  * fields requested and the driver capabilities.
 196  *
 197  * @param[out] buf
 198  *   Buffer to store the result expansion.
 199  * @param[in] size
 200  *   Buffer size in bytes. If 0, @p buf can be NULL.
 201  * @param[in] pattern
 202  *   User flow pattern.
 203  * @param[in] types
 204  *   RSS types to expand (see ETH_RSS_* definitions).
 205  * @param[in] graph
 206  *   Input graph to expand @p pattern according to @p types.
 207  * @param[in] graph_root_index
 208  *   Index of root node in @p graph, typically 0.
 209  *
 210  * @return
 211  *   A positive value representing the size of @p buf in bytes regardless of
 212  *   @p size on success, a negative errno value otherwise and rte_errno is
 213  *   set, the following errors are defined:
 214  *
 215  *   -E2BIG: graph-depth @p graph is too deep.
 216  */
 217 static int
 218 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,
 219                      const struct rte_flow_item *pattern, uint64_t types,
 220                      const struct mlx5_flow_expand_node graph[],
 221                      int graph_root_index)
 222 {
 223         const int elt_n = 8;
 224         const struct rte_flow_item *item;
 225         const struct mlx5_flow_expand_node *node = &graph[graph_root_index];
 226         const int *next_node;
 227         const int *stack[elt_n];
 228         int stack_pos = 0;
 229         struct rte_flow_item flow_items[elt_n];
 230         unsigned int i;
 231         size_t lsize;
 232         size_t user_pattern_size = 0;
 233         void *addr = NULL;
 234         const struct mlx5_flow_expand_node *next = NULL;
 235         struct rte_flow_item missed_item;
 236         int missed = 0;
 237         int elt = 0;
 238         const struct rte_flow_item *last_item = NULL;
 239
 240         memset(&missed_item, 0, sizeof(missed_item));
 241         lsize = offsetof(struct mlx5_flow_expand_rss, entry) +
 242                 elt_n * sizeof(buf->entry[0]);
 243         if (lsize <= size) {
 244                 buf->entry[0].priority = 0;
 245                 buf->entry[0].pattern = (void *)&buf->entry[elt_n];
 246                 buf->entries = 0;
 247                 addr = buf->entry[0].pattern;
 248         }
 249         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 250                 if (item->type != RTE_FLOW_ITEM_TYPE_VOID)
 251                         last_item = item;
 252                 for (i = 0; node->next && node->next[i]; ++i) {
 253                         next = &graph[node->next[i]];
 254                         if (next->type == item->type)
 255                                 break;
 256                 }
 257                 if (next)
 258                         node = next;
 259                 user_pattern_size += sizeof(*item);
 260         }
 261         user_pattern_size += sizeof(*item); /* Handle END item. */
 262         lsize += user_pattern_size;
 263         /* Copy the user pattern in the first entry of the buffer. */
 264         if (lsize <= size) {
 265                 rte_memcpy(addr, pattern, user_pattern_size);
 266                 addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 267                 buf->entries = 1;
 268         }
 269         /* Start expanding. */
 270         memset(flow_items, 0, sizeof(flow_items));
 271         user_pattern_size -= sizeof(*item);
 272         /*
 273          * Check if the last valid item has spec set, need complete pattern,
 274          * and the pattern can be used for expansion.
 275          */
 276         missed_item.type = mlx5_flow_expand_rss_item_complete(last_item);
 277         if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) {
 278                 /* Item type END indicates expansion is not required. */
 279                 return lsize;
 280         }
 281         if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) {
 282                 next = NULL;
 283                 missed = 1;
 284                 for (i = 0; node->next && node->next[i]; ++i) {
 285                         next = &graph[node->next[i]];
 286                         if (next->type == missed_item.type) {
 287                                 flow_items[0].type = missed_item.type;
 288                                 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 289                                 break;
 290                         }
 291                         next = NULL;
 292                 }
 293         }
 294         if (next && missed) {
 295                 elt = 2; /* missed item + item end. */
 296                 node = next;
 297                 lsize += elt * sizeof(*item) + user_pattern_size;
 298                 if ((node->rss_types & types) && lsize <= size) {
 299                         buf->entry[buf->entries].priority = 1;
 300                         buf->entry[buf->entries].pattern = addr;
 301                         buf->entries++;
 302                         rte_memcpy(addr, buf->entry[0].pattern,
 303                                    user_pattern_size);
 304                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 305                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 306                         addr = (void *)(((uintptr_t)addr) +
 307                                         elt * sizeof(*item));
 308                 }
 309         }
 310         memset(flow_items, 0, sizeof(flow_items));
 311         next_node = node->next;
 312         stack[stack_pos] = next_node;
 313         node = next_node ? &graph[*next_node] : NULL;
 314         while (node) {
 315                 flow_items[stack_pos].type = node->type;
 316                 if (node->rss_types & types) {
 317                         /*
 318                          * compute the number of items to copy from the
 319                          * expansion and copy it.
 320                          * When the stack_pos is 0, there are 1 element in it,
 321                          * plus the addition END item.
 322                          */
 323                         elt = stack_pos + 2;
 324                         flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END;
 325                         lsize += elt * sizeof(*item) + user_pattern_size;
 326                         if (lsize <= size) {
 327                                 size_t n = elt * sizeof(*item);
 328
 329                                 buf->entry[buf->entries].priority =
 330                                         stack_pos + 1 + missed;
 331                                 buf->entry[buf->entries].pattern = addr;
 332                                 buf->entries++;
 333                                 rte_memcpy(addr, buf->entry[0].pattern,
 334                                            user_pattern_size);
 335                                 addr = (void *)(((uintptr_t)addr) +
 336                                                 user_pattern_size);
 337                                 rte_memcpy(addr, &missed_item,
 338                                            missed * sizeof(*item));
 339                                 addr = (void *)(((uintptr_t)addr) +
 340                                         missed * sizeof(*item));
 341                                 rte_memcpy(addr, flow_items, n);
 342                                 addr = (void *)(((uintptr_t)addr) + n);
 343                         }
 344                 }
 345                 /* Go deeper. */
 346                 if (node->next) {
 347                         next_node = node->next;
 348                         if (stack_pos++ == elt_n) {
 349                                 rte_errno = E2BIG;
 350                                 return -rte_errno;
 351                         }
 352                         stack[stack_pos] = next_node;
 353                 } else if (*(next_node + 1)) {
 354                         /* Follow up with the next possibility. */
 355                         ++next_node;
 356                 } else {
 357                         /* Move to the next path. */
 358                         if (stack_pos)
 359                                 next_node = stack[--stack_pos];
 360                         next_node++;
 361                         stack[stack_pos] = next_node;
 362                 }
 363                 node = *next_node ? &graph[*next_node] : NULL;
 364         };
 365         /* no expanded flows but we have missed item, create one rule for it */
 366         if (buf->entries == 1 && missed != 0) {
 367                 elt = 2;
 368                 lsize += elt * sizeof(*item) + user_pattern_size;
 369                 if (lsize <= size) {
 370                         buf->entry[buf->entries].priority = 1;
 371                         buf->entry[buf->entries].pattern = addr;
 372                         buf->entries++;
 373                         flow_items[0].type = missed_item.type;
 374                         flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 375                         rte_memcpy(addr, buf->entry[0].pattern,
 376                                    user_pattern_size);
 377                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 378                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 379                         addr = (void *)(((uintptr_t)addr) +
 380                                         elt * sizeof(*item));
 381                 }
 382         }
 383         return lsize;
 384 }
 385
 386 enum mlx5_expansion {
 387         MLX5_EXPANSION_ROOT,
 388         MLX5_EXPANSION_ROOT_OUTER,
 389         MLX5_EXPANSION_ROOT_ETH_VLAN,
 390         MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
 391         MLX5_EXPANSION_OUTER_ETH,
 392         MLX5_EXPANSION_OUTER_ETH_VLAN,
 393         MLX5_EXPANSION_OUTER_VLAN,
 394         MLX5_EXPANSION_OUTER_IPV4,
 395         MLX5_EXPANSION_OUTER_IPV4_UDP,
 396         MLX5_EXPANSION_OUTER_IPV4_TCP,
 397         MLX5_EXPANSION_OUTER_IPV6,
 398         MLX5_EXPANSION_OUTER_IPV6_UDP,
 399         MLX5_EXPANSION_OUTER_IPV6_TCP,
 400         MLX5_EXPANSION_VXLAN,
 401         MLX5_EXPANSION_VXLAN_GPE,
 402         MLX5_EXPANSION_GRE,
 403         MLX5_EXPANSION_MPLS,
 404         MLX5_EXPANSION_ETH,
 405         MLX5_EXPANSION_ETH_VLAN,
 406         MLX5_EXPANSION_VLAN,
 407         MLX5_EXPANSION_IPV4,
 408         MLX5_EXPANSION_IPV4_UDP,
 409         MLX5_EXPANSION_IPV4_TCP,
 410         MLX5_EXPANSION_IPV6,
 411         MLX5_EXPANSION_IPV6_UDP,
 412         MLX5_EXPANSION_IPV6_TCP,
 413 };
 414
 415 /** Supported expansion of items. */
 416 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
 417         [MLX5_EXPANSION_ROOT] = {
 418                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 419                                                   MLX5_EXPANSION_IPV4,
 420                                                   MLX5_EXPANSION_IPV6),
 421                 .type = RTE_FLOW_ITEM_TYPE_END,
 422         },
 423         [MLX5_EXPANSION_ROOT_OUTER] = {
 424                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
 425                                                   MLX5_EXPANSION_OUTER_IPV4,
 426                                                   MLX5_EXPANSION_OUTER_IPV6),
 427                 .type = RTE_FLOW_ITEM_TYPE_END,
 428         },
 429         [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
 430                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
 431                 .type = RTE_FLOW_ITEM_TYPE_END,
 432         },
 433         [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
 434                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 435                                                 (MLX5_EXPANSION_OUTER_ETH_VLAN),
 436                 .type = RTE_FLOW_ITEM_TYPE_END,
 437         },
 438         [MLX5_EXPANSION_OUTER_ETH] = {
 439                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 440                                                   MLX5_EXPANSION_OUTER_IPV6,
 441                                                   MLX5_EXPANSION_MPLS),
 442                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 443                 .rss_types = 0,
 444         },
 445         [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
 446                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 447                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 448                 .rss_types = 0,
 449         },
 450         [MLX5_EXPANSION_OUTER_VLAN] = {
 451                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 452                                                   MLX5_EXPANSION_OUTER_IPV6),
 453                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 454         },
 455         [MLX5_EXPANSION_OUTER_IPV4] = {
 456                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 457                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 458                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 459                          MLX5_EXPANSION_GRE,
 460                          MLX5_EXPANSION_IPV4,
 461                          MLX5_EXPANSION_IPV6),
 462                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 463                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 464                         ETH_RSS_NONFRAG_IPV4_OTHER,
 465         },
 466         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 467                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 468                                                   MLX5_EXPANSION_VXLAN_GPE),
 469                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 470                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 471         },
 472         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 473                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 474                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 475         },
 476         [MLX5_EXPANSION_OUTER_IPV6] = {
 477                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 478                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 479                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 480                          MLX5_EXPANSION_IPV4,
 481                          MLX5_EXPANSION_IPV6),
 482                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 483                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 484                         ETH_RSS_NONFRAG_IPV6_OTHER,
 485         },
 486         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 487                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 488                                                   MLX5_EXPANSION_VXLAN_GPE),
 489                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 490                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 491         },
 492         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 493                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 494                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 495         },
 496         [MLX5_EXPANSION_VXLAN] = {
 497                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 498                                                   MLX5_EXPANSION_IPV4,
 499                                                   MLX5_EXPANSION_IPV6),
 500                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 501         },
 502         [MLX5_EXPANSION_VXLAN_GPE] = {
 503                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 504                                                   MLX5_EXPANSION_IPV4,
 505                                                   MLX5_EXPANSION_IPV6),
 506                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 507         },
 508         [MLX5_EXPANSION_GRE] = {
 509                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4),
 510                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 511         },
 512         [MLX5_EXPANSION_MPLS] = {
 513                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 514                                                   MLX5_EXPANSION_IPV6),
 515                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 516         },
 517         [MLX5_EXPANSION_ETH] = {
 518                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 519                                                   MLX5_EXPANSION_IPV6),
 520                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 521         },
 522         [MLX5_EXPANSION_ETH_VLAN] = {
 523                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 524                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 525         },
 526         [MLX5_EXPANSION_VLAN] = {
 527                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 528                                                   MLX5_EXPANSION_IPV6),
 529                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 530         },
 531         [MLX5_EXPANSION_IPV4] = {
 532                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 533                                                   MLX5_EXPANSION_IPV4_TCP),
 534                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 535                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 536                         ETH_RSS_NONFRAG_IPV4_OTHER,
 537         },
 538         [MLX5_EXPANSION_IPV4_UDP] = {
 539                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 540                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 541         },
 542         [MLX5_EXPANSION_IPV4_TCP] = {
 543                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 544                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 545         },
 546         [MLX5_EXPANSION_IPV6] = {
 547                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 548                                                   MLX5_EXPANSION_IPV6_TCP),
 549                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 550                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 551                         ETH_RSS_NONFRAG_IPV6_OTHER,
 552         },
 553         [MLX5_EXPANSION_IPV6_UDP] = {
 554                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 555                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 556         },
 557         [MLX5_EXPANSION_IPV6_TCP] = {
 558                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 559                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 560         },
 561 };
 562
 563 static struct rte_flow_shared_action *
 564 mlx5_shared_action_create(struct rte_eth_dev *dev,
 565                           const struct rte_flow_shared_action_conf *conf,
 566                           const struct rte_flow_action *action,
 567                           struct rte_flow_error *error);
 568 static int mlx5_shared_action_destroy
 569                                 (struct rte_eth_dev *dev,
 570                                  struct rte_flow_shared_action *shared_action,
 571                                  struct rte_flow_error *error);
 572 static int mlx5_shared_action_update
 573                                 (struct rte_eth_dev *dev,
 574                                  struct rte_flow_shared_action *shared_action,
 575                                  const struct rte_flow_action *action,
 576                                  struct rte_flow_error *error);
 577 static int mlx5_shared_action_query
 578                                 (struct rte_eth_dev *dev,
 579                                  const struct rte_flow_shared_action *action,
 580                                  void *data,
 581                                  struct rte_flow_error *error);
 582 static inline bool
 583 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev,
 584                           struct rte_flow_tunnel *tunnel,
 585                           const char *err_msg)
 586 {
 587         err_msg = NULL;
 588         if (!is_tunnel_offload_active(dev)) {
 589                 err_msg = "tunnel offload was not activated";
 590                 goto out;
 591         } else if (!tunnel) {
 592                 err_msg = "no application tunnel";
 593                 goto out;
 594         }
 595
 596         switch (tunnel->type) {
 597         default:
 598                 err_msg = "unsupported tunnel type";
 599                 goto out;
 600         case RTE_FLOW_ITEM_TYPE_VXLAN:
 601                 break;
 602         }
 603
 604 out:
 605         return !err_msg;
 606 }
 607
 608
 609 static int
 610 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
 611                     struct rte_flow_tunnel *app_tunnel,
 612                     struct rte_flow_action **actions,
 613                     uint32_t *num_of_actions,
 614                     struct rte_flow_error *error)
 615 {
 616         int ret;
 617         struct mlx5_flow_tunnel *tunnel;
 618         const char *err_msg = NULL;
 619         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
 620
 621         if (!verdict)
 622                 return rte_flow_error_set(error, EINVAL,
 623                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
 624                                           err_msg);
 625         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
 626         if (ret < 0) {
 627                 return rte_flow_error_set(error, ret,
 628                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
 629                                           "failed to initialize pmd tunnel");
 630         }
 631         *actions = &tunnel->action;
 632         *num_of_actions = 1;
 633         return 0;
 634 }
 635
 636 static int
 637 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
 638                        struct rte_flow_tunnel *app_tunnel,
 639                        struct rte_flow_item **items,
 640                        uint32_t *num_of_items,
 641                        struct rte_flow_error *error)
 642 {
 643         int ret;
 644         struct mlx5_flow_tunnel *tunnel;
 645         const char *err_msg = NULL;
 646         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
 647
 648         if (!verdict)
 649                 return rte_flow_error_set(error, EINVAL,
 650                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
 651                                           err_msg);
 652         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
 653         if (ret < 0) {
 654                 return rte_flow_error_set(error, ret,
 655                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
 656                                           "failed to initialize pmd tunnel");
 657         }
 658         *items = &tunnel->item;
 659         *num_of_items = 1;
 660         return 0;
 661 }
 662
 663 static int
 664 mlx5_flow_item_release(struct rte_eth_dev *dev,
 665                        struct rte_flow_item *pmd_items,
 666                        uint32_t num_items, struct rte_flow_error *err)
 667 {
 668         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
 669         struct mlx5_flow_tunnel *tun;
 670
 671         LIST_FOREACH(tun, &thub->tunnels, chain) {
 672                 if (&tun->item == pmd_items)
 673                         break;
 674         }
 675         if (!tun || num_items != 1)
 676                 return rte_flow_error_set(err, EINVAL,
 677                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
 678                                           "invalid argument");
 679         if (!__atomic_sub_fetch(&tun->refctn, 1, __ATOMIC_RELAXED))
 680                 mlx5_flow_tunnel_free(dev, tun);
 681         return 0;
 682 }
 683
 684 static int
 685 mlx5_flow_action_release(struct rte_eth_dev *dev,
 686                          struct rte_flow_action *pmd_actions,
 687                          uint32_t num_actions, struct rte_flow_error *err)
 688 {
 689         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
 690         struct mlx5_flow_tunnel *tun;
 691
 692         LIST_FOREACH(tun, &thub->tunnels, chain) {
 693                 if (&tun->action == pmd_actions)
 694                         break;
 695         }
 696         if (!tun || num_actions != 1)
 697                 return rte_flow_error_set(err, EINVAL,
 698                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
 699                                           "invalid argument");
 700         if (!__atomic_sub_fetch(&tun->refctn, 1, __ATOMIC_RELAXED))
 701                 mlx5_flow_tunnel_free(dev, tun);
 702
 703         return 0;
 704 }
 705
 706 static int
 707 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
 708                                   struct rte_mbuf *m,
 709                                   struct rte_flow_restore_info *info,
 710                                   struct rte_flow_error *err)
 711 {
 712         uint64_t ol_flags = m->ol_flags;
 713         const struct mlx5_flow_tbl_data_entry *tble;
 714         const uint64_t mask = PKT_RX_FDIR | PKT_RX_FDIR_ID;
 715
 716         if ((ol_flags & mask) != mask)
 717                 goto err;
 718         tble = tunnel_mark_decode(dev, m->hash.fdir.hi);
 719         if (!tble) {
 720                 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x",
 721                         dev->data->port_id, m->hash.fdir.hi);
 722                 goto err;
 723         }
 724         MLX5_ASSERT(tble->tunnel);
 725         memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel));
 726         info->group_id = tble->group_id;
 727         info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL |
 728                       RTE_FLOW_RESTORE_INFO_GROUP_ID |
 729                       RTE_FLOW_RESTORE_INFO_ENCAPSULATED;
 730
 731         return 0;
 732
 733 err:
 734         return rte_flow_error_set(err, EINVAL,
 735                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
 736                                   "failed to get restore info");
 737 }
 738
 739 static const struct rte_flow_ops mlx5_flow_ops = {
 740         .validate = mlx5_flow_validate,
 741         .create = mlx5_flow_create,
 742         .destroy = mlx5_flow_destroy,
 743         .flush = mlx5_flow_flush,
 744         .isolate = mlx5_flow_isolate,
 745         .query = mlx5_flow_query,
 746         .dev_dump = mlx5_flow_dev_dump,
 747         .get_aged_flows = mlx5_flow_get_aged_flows,
 748         .shared_action_create = mlx5_shared_action_create,
 749         .shared_action_destroy = mlx5_shared_action_destroy,
 750         .shared_action_update = mlx5_shared_action_update,
 751         .shared_action_query = mlx5_shared_action_query,
 752         .tunnel_decap_set = mlx5_flow_tunnel_decap_set,
 753         .tunnel_match = mlx5_flow_tunnel_match,
 754         .tunnel_action_decap_release = mlx5_flow_action_release,
 755         .tunnel_item_release = mlx5_flow_item_release,
 756         .get_restore_info = mlx5_flow_tunnel_get_restore_info,
 757 };
 758
 759 /* Convert FDIR request to Generic flow. */
 760 struct mlx5_fdir {
 761         struct rte_flow_attr attr;
 762         struct rte_flow_item items[4];
 763         struct rte_flow_item_eth l2;
 764         struct rte_flow_item_eth l2_mask;
 765         union {
 766                 struct rte_flow_item_ipv4 ipv4;
 767                 struct rte_flow_item_ipv6 ipv6;
 768         } l3;
 769         union {
 770                 struct rte_flow_item_ipv4 ipv4;
 771                 struct rte_flow_item_ipv6 ipv6;
 772         } l3_mask;
 773         union {
 774                 struct rte_flow_item_udp udp;
 775                 struct rte_flow_item_tcp tcp;
 776         } l4;
 777         union {
 778                 struct rte_flow_item_udp udp;
 779                 struct rte_flow_item_tcp tcp;
 780         } l4_mask;
 781         struct rte_flow_action actions[2];
 782         struct rte_flow_action_queue queue;
 783 };
 784
 785 /* Tunnel information. */
 786 struct mlx5_flow_tunnel_info {
 787         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 788         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 789 };
 790
 791 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 792         {
 793                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 794                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 795         },
 796         {
 797                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
 798                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
 799         },
 800         {
 801                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 802                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 803         },
 804         {
 805                 .tunnel = MLX5_FLOW_LAYER_GRE,
 806                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 807         },
 808         {
 809                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 810                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 811         },
 812         {
 813                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 814                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 815         },
 816         {
 817                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 818                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 819         },
 820         {
 821                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 822                 .ptype = RTE_PTYPE_TUNNEL_IP,
 823         },
 824         {
 825                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 826                 .ptype = RTE_PTYPE_TUNNEL_IP,
 827         },
 828         {
 829                 .tunnel = MLX5_FLOW_LAYER_GTP,
 830                 .ptype = RTE_PTYPE_TUNNEL_GTPU,
 831         },
 832 };
 833
 834 /**
 835  * Translate tag ID to register.
 836  *
 837  * @param[in] dev
 838  *   Pointer to the Ethernet device structure.
 839  * @param[in] feature
 840  *   The feature that request the register.
 841  * @param[in] id
 842  *   The request register ID.
 843  * @param[out] error
 844  *   Error description in case of any.
 845  *
 846  * @return
 847  *   The request register on success, a negative errno
 848  *   value otherwise and rte_errno is set.
 849  */
 850 int
 851 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 852                      enum mlx5_feature_name feature,
 853                      uint32_t id,
 854                      struct rte_flow_error *error)
 855 {
 856         struct mlx5_priv *priv = dev->data->dev_private;
 857         struct mlx5_dev_config *config = &priv->config;
 858         enum modify_reg start_reg;
 859         bool skip_mtr_reg = false;
 860
 861         switch (feature) {
 862         case MLX5_HAIRPIN_RX:
 863                 return REG_B;
 864         case MLX5_HAIRPIN_TX:
 865                 return REG_A;
 866         case MLX5_METADATA_RX:
 867                 switch (config->dv_xmeta_en) {
 868                 case MLX5_XMETA_MODE_LEGACY:
 869                         return REG_B;
 870                 case MLX5_XMETA_MODE_META16:
 871                         return REG_C_0;
 872                 case MLX5_XMETA_MODE_META32:
 873                         return REG_C_1;
 874                 }
 875                 break;
 876         case MLX5_METADATA_TX:
 877                 return REG_A;
 878         case MLX5_METADATA_FDB:
 879                 switch (config->dv_xmeta_en) {
 880                 case MLX5_XMETA_MODE_LEGACY:
 881                         return REG_NON;
 882                 case MLX5_XMETA_MODE_META16:
 883                         return REG_C_0;
 884                 case MLX5_XMETA_MODE_META32:
 885                         return REG_C_1;
 886                 }
 887                 break;
 888         case MLX5_FLOW_MARK:
 889                 switch (config->dv_xmeta_en) {
 890                 case MLX5_XMETA_MODE_LEGACY:
 891                         return REG_NON;
 892                 case MLX5_XMETA_MODE_META16:
 893                         return REG_C_1;
 894                 case MLX5_XMETA_MODE_META32:
 895                         return REG_C_0;
 896                 }
 897                 break;
 898         case MLX5_MTR_SFX:
 899                 /*
 900                  * If meter color and flow match share one register, flow match
 901                  * should use the meter color register for match.
 902                  */
 903                 if (priv->mtr_reg_share)
 904                         return priv->mtr_color_reg;
 905                 else
 906                         return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 907                                REG_C_3;
 908         case MLX5_MTR_COLOR:
 909                 MLX5_ASSERT(priv->mtr_color_reg != REG_NON);
 910                 return priv->mtr_color_reg;
 911         case MLX5_COPY_MARK:
 912                 /*
 913                  * Metadata COPY_MARK register using is in meter suffix sub
 914                  * flow while with meter. It's safe to share the same register.
 915                  */
 916                 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
 917         case MLX5_APP_TAG:
 918                 /*
 919                  * If meter is enable, it will engage the register for color
 920                  * match and flow match. If meter color match is not using the
 921                  * REG_C_2, need to skip the REG_C_x be used by meter color
 922                  * match.
 923                  * If meter is disable, free to use all available registers.
 924                  */
 925                 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 926                             (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
 927                 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
 928                 if (id > (REG_C_7 - start_reg))
 929                         return rte_flow_error_set(error, EINVAL,
 930                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 931                                                   NULL, "invalid tag id");
 932                 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON)
 933                         return rte_flow_error_set(error, ENOTSUP,
 934                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 935                                                   NULL, "unsupported tag id");
 936                 /*
 937                  * This case means meter is using the REG_C_x great than 2.
 938                  * Take care not to conflict with meter color REG_C_x.
 939                  * If the available index REG_C_y >= REG_C_x, skip the
 940                  * color register.
 941                  */
 942                 if (skip_mtr_reg && config->flow_mreg_c
 943                     [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
 944                         if (id >= (REG_C_7 - start_reg))
 945                                 return rte_flow_error_set(error, EINVAL,
 946                                                        RTE_FLOW_ERROR_TYPE_ITEM,
 947                                                         NULL, "invalid tag id");
 948                         if (config->flow_mreg_c
 949                             [id + 1 + start_reg - REG_C_0] != REG_NON)
 950                                 return config->flow_mreg_c
 951                                                [id + 1 + start_reg - REG_C_0];
 952                         return rte_flow_error_set(error, ENOTSUP,
 953                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 954                                                   NULL, "unsupported tag id");
 955                 }
 956                 return config->flow_mreg_c[id + start_reg - REG_C_0];
 957         }
 958         MLX5_ASSERT(false);
 959         return rte_flow_error_set(error, EINVAL,
 960                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 961                                   NULL, "invalid feature name");
 962 }
 963
 964 /**
 965  * Check extensive flow metadata register support.
 966  *
 967  * @param dev
 968  *   Pointer to rte_eth_dev structure.
 969  *
 970  * @return
 971  *   True if device supports extensive flow metadata register, otherwise false.
 972  */
 973 bool
 974 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
 975 {
 976         struct mlx5_priv *priv = dev->data->dev_private;
 977         struct mlx5_dev_config *config = &priv->config;
 978
 979         /*
 980          * Having available reg_c can be regarded inclusively as supporting
 981          * extensive flow metadata register, which could mean,
 982          * - metadata register copy action by modify header.
 983          * - 16 modify header actions is supported.
 984          * - reg_c's are preserved across different domain (FDB and NIC) on
 985          *   packet loopback by flow lookup miss.
 986          */
 987         return config->flow_mreg_c[2] != REG_NON;
 988 }
 989
 990 /**
 991  * Verify the @p item specifications (spec, last, mask) are compatible with the
 992  * NIC capabilities.
 993  *
 994  * @param[in] item
 995  *   Item specification.
 996  * @param[in] mask
 997  *   @p item->mask or flow default bit-masks.
 998  * @param[in] nic_mask
 999  *   Bit-masks covering supported fields by the NIC to compare with user mask.
1000  * @param[in] size
1001  *   Bit-masks size in bytes.
1002  * @param[in] range_accepted
1003  *   True if range of values is accepted for specific fields, false otherwise.
1004  * @param[out] error
1005  *   Pointer to error structure.
1006  *
1007  * @return
1008  *   0 on success, a negative errno value otherwise and rte_errno is set.
1009  */
1010 int
1011 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
1012                           const uint8_t *mask,
1013                           const uint8_t *nic_mask,
1014                           unsigned int size,
1015                           bool range_accepted,
1016                           struct rte_flow_error *error)
1017 {
1018         unsigned int i;
1019
1020         MLX5_ASSERT(nic_mask);
1021         for (i = 0; i < size; ++i)
1022                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
1023                         return rte_flow_error_set(error, ENOTSUP,
1024                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1025                                                   item,
1026                                                   "mask enables non supported"
1027                                                   " bits");
1028         if (!item->spec && (item->mask || item->last))
1029                 return rte_flow_error_set(error, EINVAL,
1030                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1031                                           "mask/last without a spec is not"
1032                                           " supported");
1033         if (item->spec && item->last && !range_accepted) {
1034                 uint8_t spec[size];
1035                 uint8_t last[size];
1036                 unsigned int i;
1037                 int ret;
1038
1039                 for (i = 0; i < size; ++i) {
1040                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
1041                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
1042                 }
1043                 ret = memcmp(spec, last, size);
1044                 if (ret != 0)
1045                         return rte_flow_error_set(error, EINVAL,
1046                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1047                                                   item,
1048                                                   "range is not valid");
1049         }
1050         return 0;
1051 }
1052
1053 /**
1054  * Adjust the hash fields according to the @p flow information.
1055  *
1056  * @param[in] dev_flow.
1057  *   Pointer to the mlx5_flow.
1058  * @param[in] tunnel
1059  *   1 when the hash field is for a tunnel item.
1060  * @param[in] layer_types
1061  *   ETH_RSS_* types.
1062  * @param[in] hash_fields
1063  *   Item hash fields.
1064  *
1065  * @return
1066  *   The hash fields that should be used.
1067  */
1068 uint64_t
1069 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc,
1070                             int tunnel __rte_unused, uint64_t layer_types,
1071                             uint64_t hash_fields)
1072 {
1073 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1074         int rss_request_inner = rss_desc->level >= 2;
1075
1076         /* Check RSS hash level for tunnel. */
1077         if (tunnel && rss_request_inner)
1078                 hash_fields |= IBV_RX_HASH_INNER;
1079         else if (tunnel || rss_request_inner)
1080                 return 0;
1081 #endif
1082         /* Check if requested layer matches RSS hash fields. */
1083         if (!(rss_desc->types & layer_types))
1084                 return 0;
1085         return hash_fields;
1086 }
1087
1088 /**
1089  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
1090  * if several tunnel rules are used on this queue, the tunnel ptype will be
1091  * cleared.
1092  *
1093  * @param rxq_ctrl
1094  *   Rx queue to update.
1095  */
1096 static void
1097 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
1098 {
1099         unsigned int i;
1100         uint32_t tunnel_ptype = 0;
1101
1102         /* Look up for the ptype to use. */
1103         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
1104                 if (!rxq_ctrl->flow_tunnels_n[i])
1105                         continue;
1106                 if (!tunnel_ptype) {
1107                         tunnel_ptype = tunnels_info[i].ptype;
1108                 } else {
1109                         tunnel_ptype = 0;
1110                         break;
1111                 }
1112         }
1113         rxq_ctrl->rxq.tunnel = tunnel_ptype;
1114 }
1115
1116 /**
1117  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
1118  * flow.
1119  *
1120  * @param[in] dev
1121  *   Pointer to the Ethernet device structure.
1122  * @param[in] dev_handle
1123  *   Pointer to device flow handle structure.
1124  */
1125 static void
1126 flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
1127                        struct mlx5_flow_handle *dev_handle)
1128 {
1129         struct mlx5_priv *priv = dev->data->dev_private;
1130         const int mark = dev_handle->mark;
1131         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1132         struct mlx5_hrxq *hrxq;
1133         unsigned int i;
1134
1135         if (dev_handle->fate_action != MLX5_FLOW_FATE_QUEUE)
1136                 return;
1137         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1138                               dev_handle->rix_hrxq);
1139         if (!hrxq)
1140                 return;
1141         for (i = 0; i != hrxq->ind_table->queues_n; ++i) {
1142                 int idx = hrxq->ind_table->queues[i];
1143                 struct mlx5_rxq_ctrl *rxq_ctrl =
1144                         container_of((*priv->rxqs)[idx],
1145                                      struct mlx5_rxq_ctrl, rxq);
1146
1147                 /*
1148                  * To support metadata register copy on Tx loopback,
1149                  * this must be always enabled (metadata may arive
1150                  * from other port - not from local flows only.
1151                  */
1152                 if (priv->config.dv_flow_en &&
1153                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1154                     mlx5_flow_ext_mreg_supported(dev)) {
1155                         rxq_ctrl->rxq.mark = 1;
1156                         rxq_ctrl->flow_mark_n = 1;
1157                 } else if (mark) {
1158                         rxq_ctrl->rxq.mark = 1;
1159                         rxq_ctrl->flow_mark_n++;
1160                 }
1161                 if (tunnel) {
1162                         unsigned int j;
1163
1164                         /* Increase the counter matching the flow. */
1165                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1166                                 if ((tunnels_info[j].tunnel &
1167                                      dev_handle->layers) ==
1168                                     tunnels_info[j].tunnel) {
1169                                         rxq_ctrl->flow_tunnels_n[j]++;
1170                                         break;
1171                                 }
1172                         }
1173                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1174                 }
1175         }
1176 }
1177
1178 /**
1179  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
1180  *
1181  * @param[in] dev
1182  *   Pointer to the Ethernet device structure.
1183  * @param[in] flow
1184  *   Pointer to flow structure.
1185  */
1186 static void
1187 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
1188 {
1189         struct mlx5_priv *priv = dev->data->dev_private;
1190         uint32_t handle_idx;
1191         struct mlx5_flow_handle *dev_handle;
1192
1193         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1194                        handle_idx, dev_handle, next)
1195                 flow_drv_rxq_flags_set(dev, dev_handle);
1196 }
1197
1198 /**
1199  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1200  * device flow if no other flow uses it with the same kind of request.
1201  *
1202  * @param dev
1203  *   Pointer to Ethernet device.
1204  * @param[in] dev_handle
1205  *   Pointer to the device flow handle structure.
1206  */
1207 static void
1208 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev,
1209                         struct mlx5_flow_handle *dev_handle)
1210 {
1211         struct mlx5_priv *priv = dev->data->dev_private;
1212         const int mark = dev_handle->mark;
1213         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1214         struct mlx5_hrxq *hrxq;
1215         unsigned int i;
1216
1217         if (dev_handle->fate_action != MLX5_FLOW_FATE_QUEUE)
1218                 return;
1219         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1220                               dev_handle->rix_hrxq);
1221         if (!hrxq)
1222                 return;
1223         MLX5_ASSERT(dev->data->dev_started);
1224         for (i = 0; i != hrxq->ind_table->queues_n; ++i) {
1225                 int idx = hrxq->ind_table->queues[i];
1226                 struct mlx5_rxq_ctrl *rxq_ctrl =
1227                         container_of((*priv->rxqs)[idx],
1228                                      struct mlx5_rxq_ctrl, rxq);
1229
1230                 if (priv->config.dv_flow_en &&
1231                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1232                     mlx5_flow_ext_mreg_supported(dev)) {
1233                         rxq_ctrl->rxq.mark = 1;
1234                         rxq_ctrl->flow_mark_n = 1;
1235                 } else if (mark) {
1236                         rxq_ctrl->flow_mark_n--;
1237                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
1238                 }
1239                 if (tunnel) {
1240                         unsigned int j;
1241
1242                         /* Decrease the counter matching the flow. */
1243                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1244                                 if ((tunnels_info[j].tunnel &
1245                                      dev_handle->layers) ==
1246                                     tunnels_info[j].tunnel) {
1247                                         rxq_ctrl->flow_tunnels_n[j]--;
1248                                         break;
1249                                 }
1250                         }
1251                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1252                 }
1253         }
1254 }
1255
1256 /**
1257  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1258  * @p flow if no other flow uses it with the same kind of request.
1259  *
1260  * @param dev
1261  *   Pointer to Ethernet device.
1262  * @param[in] flow
1263  *   Pointer to the flow.
1264  */
1265 static void
1266 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
1267 {
1268         struct mlx5_priv *priv = dev->data->dev_private;
1269         uint32_t handle_idx;
1270         struct mlx5_flow_handle *dev_handle;
1271
1272         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1273                        handle_idx, dev_handle, next)
1274                 flow_drv_rxq_flags_trim(dev, dev_handle);
1275 }
1276
1277 /**
1278  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
1279  *
1280  * @param dev
1281  *   Pointer to Ethernet device.
1282  */
1283 static void
1284 flow_rxq_flags_clear(struct rte_eth_dev *dev)
1285 {
1286         struct mlx5_priv *priv = dev->data->dev_private;
1287         unsigned int i;
1288
1289         for (i = 0; i != priv->rxqs_n; ++i) {
1290                 struct mlx5_rxq_ctrl *rxq_ctrl;
1291                 unsigned int j;
1292
1293                 if (!(*priv->rxqs)[i])
1294                         continue;
1295                 rxq_ctrl = container_of((*priv->rxqs)[i],
1296                                         struct mlx5_rxq_ctrl, rxq);
1297                 rxq_ctrl->flow_mark_n = 0;
1298                 rxq_ctrl->rxq.mark = 0;
1299                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
1300                         rxq_ctrl->flow_tunnels_n[j] = 0;
1301                 rxq_ctrl->rxq.tunnel = 0;
1302         }
1303 }
1304
1305 /**
1306  * Set the Rx queue dynamic metadata (mask and offset) for a flow
1307  *
1308  * @param[in] dev
1309  *   Pointer to the Ethernet device structure.
1310  */
1311 void
1312 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev)
1313 {
1314         struct mlx5_priv *priv = dev->data->dev_private;
1315         struct mlx5_rxq_data *data;
1316         unsigned int i;
1317
1318         for (i = 0; i != priv->rxqs_n; ++i) {
1319                 if (!(*priv->rxqs)[i])
1320                         continue;
1321                 data = (*priv->rxqs)[i];
1322                 if (!rte_flow_dynf_metadata_avail()) {
1323                         data->dynf_meta = 0;
1324                         data->flow_meta_mask = 0;
1325                         data->flow_meta_offset = -1;
1326                 } else {
1327                         data->dynf_meta = 1;
1328                         data->flow_meta_mask = rte_flow_dynf_metadata_mask;
1329                         data->flow_meta_offset = rte_flow_dynf_metadata_offs;
1330                 }
1331         }
1332 }
1333
1334 /*
1335  * return a pointer to the desired action in the list of actions.
1336  *
1337  * @param[in] actions
1338  *   The list of actions to search the action in.
1339  * @param[in] action
1340  *   The action to find.
1341  *
1342  * @return
1343  *   Pointer to the action in the list, if found. NULL otherwise.
1344  */
1345 const struct rte_flow_action *
1346 mlx5_flow_find_action(const struct rte_flow_action *actions,
1347                       enum rte_flow_action_type action)
1348 {
1349         if (actions == NULL)
1350                 return NULL;
1351         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
1352                 if (actions->type == action)
1353                         return actions;
1354         return NULL;
1355 }
1356
1357 /*
1358  * Validate the flag action.
1359  *
1360  * @param[in] action_flags
1361  *   Bit-fields that holds the actions detected until now.
1362  * @param[in] attr
1363  *   Attributes of flow that includes this action.
1364  * @param[out] error
1365  *   Pointer to error structure.
1366  *
1367  * @return
1368  *   0 on success, a negative errno value otherwise and rte_errno is set.
1369  */
1370 int
1371 mlx5_flow_validate_action_flag(uint64_t action_flags,
1372                                const struct rte_flow_attr *attr,
1373                                struct rte_flow_error *error)
1374 {
1375         if (action_flags & MLX5_FLOW_ACTION_MARK)
1376                 return rte_flow_error_set(error, EINVAL,
1377                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1378                                           "can't mark and flag in same flow");
1379         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1380                 return rte_flow_error_set(error, EINVAL,
1381                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1382                                           "can't have 2 flag"
1383                                           " actions in same flow");
1384         if (attr->egress)
1385                 return rte_flow_error_set(error, ENOTSUP,
1386                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1387                                           "flag action not supported for "
1388                                           "egress");
1389         return 0;
1390 }
1391
1392 /*
1393  * Validate the mark action.
1394  *
1395  * @param[in] action
1396  *   Pointer to the queue action.
1397  * @param[in] action_flags
1398  *   Bit-fields that holds the actions detected until now.
1399  * @param[in] attr
1400  *   Attributes of flow that includes this action.
1401  * @param[out] error
1402  *   Pointer to error structure.
1403  *
1404  * @return
1405  *   0 on success, a negative errno value otherwise and rte_errno is set.
1406  */
1407 int
1408 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
1409                                uint64_t action_flags,
1410                                const struct rte_flow_attr *attr,
1411                                struct rte_flow_error *error)
1412 {
1413         const struct rte_flow_action_mark *mark = action->conf;
1414
1415         if (!mark)
1416                 return rte_flow_error_set(error, EINVAL,
1417                                           RTE_FLOW_ERROR_TYPE_ACTION,
1418                                           action,
1419                                           "configuration cannot be null");
1420         if (mark->id >= MLX5_FLOW_MARK_MAX)
1421                 return rte_flow_error_set(error, EINVAL,
1422                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1423                                           &mark->id,
1424                                           "mark id must in 0 <= id < "
1425                                           RTE_STR(MLX5_FLOW_MARK_MAX));
1426         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1427                 return rte_flow_error_set(error, EINVAL,
1428                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1429                                           "can't flag and mark in same flow");
1430         if (action_flags & MLX5_FLOW_ACTION_MARK)
1431                 return rte_flow_error_set(error, EINVAL,
1432                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1433                                           "can't have 2 mark actions in same"
1434                                           " flow");
1435         if (attr->egress)
1436                 return rte_flow_error_set(error, ENOTSUP,
1437                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1438                                           "mark action not supported for "
1439                                           "egress");
1440         return 0;
1441 }
1442
1443 /*
1444  * Validate the drop action.
1445  *
1446  * @param[in] action_flags
1447  *   Bit-fields that holds the actions detected until now.
1448  * @param[in] attr
1449  *   Attributes of flow that includes this action.
1450  * @param[out] error
1451  *   Pointer to error structure.
1452  *
1453  * @return
1454  *   0 on success, a negative errno value otherwise and rte_errno is set.
1455  */
1456 int
1457 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1458                                const struct rte_flow_attr *attr,
1459                                struct rte_flow_error *error)
1460 {
1461         if (attr->egress)
1462                 return rte_flow_error_set(error, ENOTSUP,
1463                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1464                                           "drop action not supported for "
1465                                           "egress");
1466         return 0;
1467 }
1468
1469 /*
1470  * Validate the queue action.
1471  *
1472  * @param[in] action
1473  *   Pointer to the queue action.
1474  * @param[in] action_flags
1475  *   Bit-fields that holds the actions detected until now.
1476  * @param[in] dev
1477  *   Pointer to the Ethernet device structure.
1478  * @param[in] attr
1479  *   Attributes of flow that includes this action.
1480  * @param[out] error
1481  *   Pointer to error structure.
1482  *
1483  * @return
1484  *   0 on success, a negative errno value otherwise and rte_errno is set.
1485  */
1486 int
1487 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1488                                 uint64_t action_flags,
1489                                 struct rte_eth_dev *dev,
1490                                 const struct rte_flow_attr *attr,
1491                                 struct rte_flow_error *error)
1492 {
1493         struct mlx5_priv *priv = dev->data->dev_private;
1494         const struct rte_flow_action_queue *queue = action->conf;
1495
1496         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1497                 return rte_flow_error_set(error, EINVAL,
1498                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1499                                           "can't have 2 fate actions in"
1500                                           " same flow");
1501         if (!priv->rxqs_n)
1502                 return rte_flow_error_set(error, EINVAL,
1503                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1504                                           NULL, "No Rx queues configured");
1505         if (queue->index >= priv->rxqs_n)
1506                 return rte_flow_error_set(error, EINVAL,
1507                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1508                                           &queue->index,
1509                                           "queue index out of range");
1510         if (!(*priv->rxqs)[queue->index])
1511                 return rte_flow_error_set(error, EINVAL,
1512                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1513                                           &queue->index,
1514                                           "queue is not configured");
1515         if (attr->egress)
1516                 return rte_flow_error_set(error, ENOTSUP,
1517                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1518                                           "queue action not supported for "
1519                                           "egress");
1520         return 0;
1521 }
1522
1523 /*
1524  * Validate the rss action.
1525  *
1526  * @param[in] dev
1527  *   Pointer to the Ethernet device structure.
1528  * @param[in] action
1529  *   Pointer to the queue action.
1530  * @param[out] error
1531  *   Pointer to error structure.
1532  *
1533  * @return
1534  *   0 on success, a negative errno value otherwise and rte_errno is set.
1535  */
1536 int
1537 mlx5_validate_action_rss(struct rte_eth_dev *dev,
1538                          const struct rte_flow_action *action,
1539                          struct rte_flow_error *error)
1540 {
1541         struct mlx5_priv *priv = dev->data->dev_private;
1542         const struct rte_flow_action_rss *rss = action->conf;
1543         unsigned int i;
1544
1545         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1546             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1547                 return rte_flow_error_set(error, ENOTSUP,
1548                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1549                                           &rss->func,
1550                                           "RSS hash function not supported");
1551 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1552         if (rss->level > 2)
1553 #else
1554         if (rss->level > 1)
1555 #endif
1556                 return rte_flow_error_set(error, ENOTSUP,
1557                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1558                                           &rss->level,
1559                                           "tunnel RSS is not supported");
1560         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1561         if (rss->key_len == 0 && rss->key != NULL)
1562                 return rte_flow_error_set(error, ENOTSUP,
1563                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1564                                           &rss->key_len,
1565                                           "RSS hash key length 0");
1566         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1567                 return rte_flow_error_set(error, ENOTSUP,
1568                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1569                                           &rss->key_len,
1570                                           "RSS hash key too small");
1571         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1572                 return rte_flow_error_set(error, ENOTSUP,
1573                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1574                                           &rss->key_len,
1575                                           "RSS hash key too large");
1576         if (rss->queue_num > priv->config.ind_table_max_size)
1577                 return rte_flow_error_set(error, ENOTSUP,
1578                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1579                                           &rss->queue_num,
1580                                           "number of queues too large");
1581         if (rss->types & MLX5_RSS_HF_MASK)
1582                 return rte_flow_error_set(error, ENOTSUP,
1583                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1584                                           &rss->types,
1585                                           "some RSS protocols are not"
1586                                           " supported");
1587         if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) &&
1588             !(rss->types & ETH_RSS_IP))
1589                 return rte_flow_error_set(error, EINVAL,
1590                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1591                                           "L3 partial RSS requested but L3 RSS"
1592                                           " type not specified");
1593         if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) &&
1594             !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP)))
1595                 return rte_flow_error_set(error, EINVAL,
1596                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1597                                           "L4 partial RSS requested but L4 RSS"
1598                                           " type not specified");
1599         if (!priv->rxqs_n)
1600                 return rte_flow_error_set(error, EINVAL,
1601                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1602                                           NULL, "No Rx queues configured");
1603         if (!rss->queue_num)
1604                 return rte_flow_error_set(error, EINVAL,
1605                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1606                                           NULL, "No queues configured");
1607         for (i = 0; i != rss->queue_num; ++i) {
1608                 if (rss->queue[i] >= priv->rxqs_n)
1609                         return rte_flow_error_set
1610                                 (error, EINVAL,
1611                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1612                                  &rss->queue[i], "queue index out of range");
1613                 if (!(*priv->rxqs)[rss->queue[i]])
1614                         return rte_flow_error_set
1615                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1616                                  &rss->queue[i], "queue is not configured");
1617         }
1618         return 0;
1619 }
1620
1621 /*
1622  * Validate the rss action.
1623  *
1624  * @param[in] action
1625  *   Pointer to the queue action.
1626  * @param[in] action_flags
1627  *   Bit-fields that holds the actions detected until now.
1628  * @param[in] dev
1629  *   Pointer to the Ethernet device structure.
1630  * @param[in] attr
1631  *   Attributes of flow that includes this action.
1632  * @param[in] item_flags
1633  *   Items that were detected.
1634  * @param[out] error
1635  *   Pointer to error structure.
1636  *
1637  * @return
1638  *   0 on success, a negative errno value otherwise and rte_errno is set.
1639  */
1640 int
1641 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1642                               uint64_t action_flags,
1643                               struct rte_eth_dev *dev,
1644                               const struct rte_flow_attr *attr,
1645                               uint64_t item_flags,
1646                               struct rte_flow_error *error)
1647 {
1648         const struct rte_flow_action_rss *rss = action->conf;
1649         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1650         int ret;
1651
1652         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1653                 return rte_flow_error_set(error, EINVAL,
1654                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1655                                           "can't have 2 fate actions"
1656                                           " in same flow");
1657         ret = mlx5_validate_action_rss(dev, action, error);
1658         if (ret)
1659                 return ret;
1660         if (attr->egress)
1661                 return rte_flow_error_set(error, ENOTSUP,
1662                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1663                                           "rss action not supported for "
1664                                           "egress");
1665         if (rss->level > 1 && !tunnel)
1666                 return rte_flow_error_set(error, EINVAL,
1667                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1668                                           "inner RSS is not supported for "
1669                                           "non-tunnel flows");
1670         if ((item_flags & MLX5_FLOW_LAYER_ECPRI) &&
1671             !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) {
1672                 return rte_flow_error_set(error, EINVAL,
1673                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1674                                           "RSS on eCPRI is not supported now");
1675         }
1676         return 0;
1677 }
1678
1679 /*
1680  * Validate the default miss action.
1681  *
1682  * @param[in] action_flags
1683  *   Bit-fields that holds the actions detected until now.
1684  * @param[out] error
1685  *   Pointer to error structure.
1686  *
1687  * @return
1688  *   0 on success, a negative errno value otherwise and rte_errno is set.
1689  */
1690 int
1691 mlx5_flow_validate_action_default_miss(uint64_t action_flags,
1692                                 const struct rte_flow_attr *attr,
1693                                 struct rte_flow_error *error)
1694 {
1695         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1696                 return rte_flow_error_set(error, EINVAL,
1697                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1698                                           "can't have 2 fate actions in"
1699                                           " same flow");
1700         if (attr->egress)
1701                 return rte_flow_error_set(error, ENOTSUP,
1702                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1703                                           "default miss action not supported "
1704                                           "for egress");
1705         if (attr->group)
1706                 return rte_flow_error_set(error, ENOTSUP,
1707                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
1708                                           "only group 0 is supported");
1709         if (attr->transfer)
1710                 return rte_flow_error_set(error, ENOTSUP,
1711                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1712                                           NULL, "transfer is not supported");
1713         return 0;
1714 }
1715
1716 /*
1717  * Validate the count action.
1718  *
1719  * @param[in] dev
1720  *   Pointer to the Ethernet device structure.
1721  * @param[in] attr
1722  *   Attributes of flow that includes this action.
1723  * @param[out] error
1724  *   Pointer to error structure.
1725  *
1726  * @return
1727  *   0 on success, a negative errno value otherwise and rte_errno is set.
1728  */
1729 int
1730 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1731                                 const struct rte_flow_attr *attr,
1732                                 struct rte_flow_error *error)
1733 {
1734         if (attr->egress)
1735                 return rte_flow_error_set(error, ENOTSUP,
1736                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1737                                           "count action not supported for "
1738                                           "egress");
1739         return 0;
1740 }
1741
1742 /**
1743  * Verify the @p attributes will be correctly understood by the NIC and store
1744  * them in the @p flow if everything is correct.
1745  *
1746  * @param[in] dev
1747  *   Pointer to the Ethernet device structure.
1748  * @param[in] attributes
1749  *   Pointer to flow attributes
1750  * @param[out] error
1751  *   Pointer to error structure.
1752  *
1753  * @return
1754  *   0 on success, a negative errno value otherwise and rte_errno is set.
1755  */
1756 int
1757 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1758                               const struct rte_flow_attr *attributes,
1759                               struct rte_flow_error *error)
1760 {
1761         struct mlx5_priv *priv = dev->data->dev_private;
1762         uint32_t priority_max = priv->config.flow_prio - 1;
1763
1764         if (attributes->group)
1765                 return rte_flow_error_set(error, ENOTSUP,
1766                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1767                                           NULL, "groups is not supported");
1768         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
1769             attributes->priority >= priority_max)
1770                 return rte_flow_error_set(error, ENOTSUP,
1771                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1772                                           NULL, "priority out of range");
1773         if (attributes->egress)
1774                 return rte_flow_error_set(error, ENOTSUP,
1775                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1776                                           "egress is not supported");
1777         if (attributes->transfer && !priv->config.dv_esw_en)
1778                 return rte_flow_error_set(error, ENOTSUP,
1779                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1780                                           NULL, "transfer is not supported");
1781         if (!attributes->ingress)
1782                 return rte_flow_error_set(error, EINVAL,
1783                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1784                                           NULL,
1785                                           "ingress attribute is mandatory");
1786         return 0;
1787 }
1788
1789 /**
1790  * Validate ICMP6 item.
1791  *
1792  * @param[in] item
1793  *   Item specification.
1794  * @param[in] item_flags
1795  *   Bit-fields that holds the items detected until now.
1796  * @param[out] error
1797  *   Pointer to error structure.
1798  *
1799  * @return
1800  *   0 on success, a negative errno value otherwise and rte_errno is set.
1801  */
1802 int
1803 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1804                                uint64_t item_flags,
1805                                uint8_t target_protocol,
1806                                struct rte_flow_error *error)
1807 {
1808         const struct rte_flow_item_icmp6 *mask = item->mask;
1809         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1810         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1811                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1812         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1813                                       MLX5_FLOW_LAYER_OUTER_L4;
1814         int ret;
1815
1816         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1817                 return rte_flow_error_set(error, EINVAL,
1818                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1819                                           "protocol filtering not compatible"
1820                                           " with ICMP6 layer");
1821         if (!(item_flags & l3m))
1822                 return rte_flow_error_set(error, EINVAL,
1823                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1824                                           "IPv6 is mandatory to filter on"
1825                                           " ICMP6");
1826         if (item_flags & l4m)
1827                 return rte_flow_error_set(error, EINVAL,
1828                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1829                                           "multiple L4 layers not supported");
1830         if (!mask)
1831                 mask = &rte_flow_item_icmp6_mask;
1832         ret = mlx5_flow_item_acceptable
1833                 (item, (const uint8_t *)mask,
1834                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1835                  sizeof(struct rte_flow_item_icmp6),
1836                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1837         if (ret < 0)
1838                 return ret;
1839         return 0;
1840 }
1841
1842 /**
1843  * Validate ICMP item.
1844  *
1845  * @param[in] item
1846  *   Item specification.
1847  * @param[in] item_flags
1848  *   Bit-fields that holds the items detected until now.
1849  * @param[out] error
1850  *   Pointer to error structure.
1851  *
1852  * @return
1853  *   0 on success, a negative errno value otherwise and rte_errno is set.
1854  */
1855 int
1856 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1857                              uint64_t item_flags,
1858                              uint8_t target_protocol,
1859                              struct rte_flow_error *error)
1860 {
1861         const struct rte_flow_item_icmp *mask = item->mask;
1862         const struct rte_flow_item_icmp nic_mask = {
1863                 .hdr.icmp_type = 0xff,
1864                 .hdr.icmp_code = 0xff,
1865                 .hdr.icmp_ident = RTE_BE16(0xffff),
1866                 .hdr.icmp_seq_nb = RTE_BE16(0xffff),
1867         };
1868         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1869         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1870                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1871         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1872                                       MLX5_FLOW_LAYER_OUTER_L4;
1873         int ret;
1874
1875         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1876                 return rte_flow_error_set(error, EINVAL,
1877                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1878                                           "protocol filtering not compatible"
1879                                           " with ICMP layer");
1880         if (!(item_flags & l3m))
1881                 return rte_flow_error_set(error, EINVAL,
1882                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1883                                           "IPv4 is mandatory to filter"
1884                                           " on ICMP");
1885         if (item_flags & l4m)
1886                 return rte_flow_error_set(error, EINVAL,
1887                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1888                                           "multiple L4 layers not supported");
1889         if (!mask)
1890                 mask = &nic_mask;
1891         ret = mlx5_flow_item_acceptable
1892                 (item, (const uint8_t *)mask,
1893                  (const uint8_t *)&nic_mask,
1894                  sizeof(struct rte_flow_item_icmp),
1895                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1896         if (ret < 0)
1897                 return ret;
1898         return 0;
1899 }
1900
1901 /**
1902  * Validate Ethernet item.
1903  *
1904  * @param[in] item
1905  *   Item specification.
1906  * @param[in] item_flags
1907  *   Bit-fields that holds the items detected until now.
1908  * @param[out] error
1909  *   Pointer to error structure.
1910  *
1911  * @return
1912  *   0 on success, a negative errno value otherwise and rte_errno is set.
1913  */
1914 int
1915 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1916                             uint64_t item_flags,
1917                             struct rte_flow_error *error)
1918 {
1919         const struct rte_flow_item_eth *mask = item->mask;
1920         const struct rte_flow_item_eth nic_mask = {
1921                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1922                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1923                 .type = RTE_BE16(0xffff),
1924         };
1925         int ret;
1926         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1927         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1928                                        MLX5_FLOW_LAYER_OUTER_L2;
1929
1930         if (item_flags & ethm)
1931                 return rte_flow_error_set(error, ENOTSUP,
1932                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1933                                           "multiple L2 layers not supported");
1934         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
1935             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
1936                 return rte_flow_error_set(error, EINVAL,
1937                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1938                                           "L2 layer should not follow "
1939                                           "L3 layers");
1940         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
1941             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
1942                 return rte_flow_error_set(error, EINVAL,
1943                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1944                                           "L2 layer should not follow VLAN");
1945         if (!mask)
1946                 mask = &rte_flow_item_eth_mask;
1947         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1948                                         (const uint8_t *)&nic_mask,
1949                                         sizeof(struct rte_flow_item_eth),
1950                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1951         return ret;
1952 }
1953
1954 /**
1955  * Validate VLAN item.
1956  *
1957  * @param[in] item
1958  *   Item specification.
1959  * @param[in] item_flags
1960  *   Bit-fields that holds the items detected until now.
1961  * @param[in] dev
1962  *   Ethernet device flow is being created on.
1963  * @param[out] error
1964  *   Pointer to error structure.
1965  *
1966  * @return
1967  *   0 on success, a negative errno value otherwise and rte_errno is set.
1968  */
1969 int
1970 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1971                              uint64_t item_flags,
1972                              struct rte_eth_dev *dev,
1973                              struct rte_flow_error *error)
1974 {
1975         const struct rte_flow_item_vlan *spec = item->spec;
1976         const struct rte_flow_item_vlan *mask = item->mask;
1977         const struct rte_flow_item_vlan nic_mask = {
1978                 .tci = RTE_BE16(UINT16_MAX),
1979                 .inner_type = RTE_BE16(UINT16_MAX),
1980         };
1981         uint16_t vlan_tag = 0;
1982         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1983         int ret;
1984         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1985                                         MLX5_FLOW_LAYER_INNER_L4) :
1986                                        (MLX5_FLOW_LAYER_OUTER_L3 |
1987                                         MLX5_FLOW_LAYER_OUTER_L4);
1988         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1989                                         MLX5_FLOW_LAYER_OUTER_VLAN;
1990
1991         if (item_flags & vlanm)
1992                 return rte_flow_error_set(error, EINVAL,
1993                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1994                                           "multiple VLAN layers not supported");
1995         else if ((item_flags & l34m) != 0)
1996                 return rte_flow_error_set(error, EINVAL,
1997                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1998                                           "VLAN cannot follow L3/L4 layer");
1999         if (!mask)
2000                 mask = &rte_flow_item_vlan_mask;
2001         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2002                                         (const uint8_t *)&nic_mask,
2003                                         sizeof(struct rte_flow_item_vlan),
2004                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2005         if (ret)
2006                 return ret;
2007         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2008                 struct mlx5_priv *priv = dev->data->dev_private;
2009
2010                 if (priv->vmwa_context) {
2011                         /*
2012                          * Non-NULL context means we have a virtual machine
2013                          * and SR-IOV enabled, we have to create VLAN interface
2014                          * to make hypervisor to setup E-Switch vport
2015                          * context correctly. We avoid creating the multiple
2016                          * VLAN interfaces, so we cannot support VLAN tag mask.
2017                          */
2018                         return rte_flow_error_set(error, EINVAL,
2019                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2020                                                   item,
2021                                                   "VLAN tag mask is not"
2022                                                   " supported in virtual"
2023                                                   " environment");
2024                 }
2025         }
2026         if (spec) {
2027                 vlan_tag = spec->tci;
2028                 vlan_tag &= mask->tci;
2029         }
2030         /*
2031          * From verbs perspective an empty VLAN is equivalent
2032          * to a packet without VLAN layer.
2033          */
2034         if (!vlan_tag)
2035                 return rte_flow_error_set(error, EINVAL,
2036                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2037                                           item->spec,
2038                                           "VLAN cannot be empty");
2039         return 0;
2040 }
2041
2042 /**
2043  * Validate IPV4 item.
2044  *
2045  * @param[in] item
2046  *   Item specification.
2047  * @param[in] item_flags
2048  *   Bit-fields that holds the items detected until now.
2049  * @param[in] last_item
2050  *   Previous validated item in the pattern items.
2051  * @param[in] ether_type
2052  *   Type in the ethernet layer header (including dot1q).
2053  * @param[in] acc_mask
2054  *   Acceptable mask, if NULL default internal default mask
2055  *   will be used to check whether item fields are supported.
2056  * @param[in] range_accepted
2057  *   True if range of values is accepted for specific fields, false otherwise.
2058  * @param[out] error
2059  *   Pointer to error structure.
2060  *
2061  * @return
2062  *   0 on success, a negative errno value otherwise and rte_errno is set.
2063  */
2064 int
2065 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
2066                              uint64_t item_flags,
2067                              uint64_t last_item,
2068                              uint16_t ether_type,
2069                              const struct rte_flow_item_ipv4 *acc_mask,
2070                              bool range_accepted,
2071                              struct rte_flow_error *error)
2072 {
2073         const struct rte_flow_item_ipv4 *mask = item->mask;
2074         const struct rte_flow_item_ipv4 *spec = item->spec;
2075         const struct rte_flow_item_ipv4 nic_mask = {
2076                 .hdr = {
2077                         .src_addr = RTE_BE32(0xffffffff),
2078                         .dst_addr = RTE_BE32(0xffffffff),
2079                         .type_of_service = 0xff,
2080                         .next_proto_id = 0xff,
2081                 },
2082         };
2083         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2084         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2085                                       MLX5_FLOW_LAYER_OUTER_L3;
2086         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2087                                       MLX5_FLOW_LAYER_OUTER_L4;
2088         int ret;
2089         uint8_t next_proto = 0xFF;
2090         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2091                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2092                                   MLX5_FLOW_LAYER_INNER_VLAN);
2093
2094         if ((last_item & l2_vlan) && ether_type &&
2095             ether_type != RTE_ETHER_TYPE_IPV4)
2096                 return rte_flow_error_set(error, EINVAL,
2097                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2098                                           "IPv4 cannot follow L2/VLAN layer "
2099                                           "which ether type is not IPv4");
2100         if (item_flags & MLX5_FLOW_LAYER_IPIP) {
2101                 if (mask && spec)
2102                         next_proto = mask->hdr.next_proto_id &
2103                                      spec->hdr.next_proto_id;
2104                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2105                         return rte_flow_error_set(error, EINVAL,
2106                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2107                                                   item,
2108                                                   "multiple tunnel "
2109                                                   "not supported");
2110         }
2111         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
2112                 return rte_flow_error_set(error, EINVAL,
2113                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2114                                           "wrong tunnel type - IPv6 specified "
2115                                           "but IPv4 item provided");
2116         if (item_flags & l3m)
2117                 return rte_flow_error_set(error, ENOTSUP,
2118                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2119                                           "multiple L3 layers not supported");
2120         else if (item_flags & l4m)
2121                 return rte_flow_error_set(error, EINVAL,
2122                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2123                                           "L3 cannot follow an L4 layer.");
2124         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2125                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2126                 return rte_flow_error_set(error, EINVAL,
2127                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2128                                           "L3 cannot follow an NVGRE layer.");
2129         if (!mask)
2130                 mask = &rte_flow_item_ipv4_mask;
2131         else if (mask->hdr.next_proto_id != 0 &&
2132                  mask->hdr.next_proto_id != 0xff)
2133                 return rte_flow_error_set(error, EINVAL,
2134                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2135                                           "partial mask is not supported"
2136                                           " for protocol");
2137         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2138                                         acc_mask ? (const uint8_t *)acc_mask
2139                                                  : (const uint8_t *)&nic_mask,
2140                                         sizeof(struct rte_flow_item_ipv4),
2141                                         range_accepted, error);
2142         if (ret < 0)
2143                 return ret;
2144         return 0;
2145 }
2146
2147 /**
2148  * Validate IPV6 item.
2149  *
2150  * @param[in] item
2151  *   Item specification.
2152  * @param[in] item_flags
2153  *   Bit-fields that holds the items detected until now.
2154  * @param[in] last_item
2155  *   Previous validated item in the pattern items.
2156  * @param[in] ether_type
2157  *   Type in the ethernet layer header (including dot1q).
2158  * @param[in] acc_mask
2159  *   Acceptable mask, if NULL default internal default mask
2160  *   will be used to check whether item fields are supported.
2161  * @param[out] error
2162  *   Pointer to error structure.
2163  *
2164  * @return
2165  *   0 on success, a negative errno value otherwise and rte_errno is set.
2166  */
2167 int
2168 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
2169                              uint64_t item_flags,
2170                              uint64_t last_item,
2171                              uint16_t ether_type,
2172                              const struct rte_flow_item_ipv6 *acc_mask,
2173                              struct rte_flow_error *error)
2174 {
2175         const struct rte_flow_item_ipv6 *mask = item->mask;
2176         const struct rte_flow_item_ipv6 *spec = item->spec;
2177         const struct rte_flow_item_ipv6 nic_mask = {
2178                 .hdr = {
2179                         .src_addr =
2180                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2181                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2182                         .dst_addr =
2183                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2184                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2185                         .vtc_flow = RTE_BE32(0xffffffff),
2186                         .proto = 0xff,
2187                 },
2188         };
2189         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2190         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2191                                       MLX5_FLOW_LAYER_OUTER_L3;
2192         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2193                                       MLX5_FLOW_LAYER_OUTER_L4;
2194         int ret;
2195         uint8_t next_proto = 0xFF;
2196         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2197                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2198                                   MLX5_FLOW_LAYER_INNER_VLAN);
2199
2200         if ((last_item & l2_vlan) && ether_type &&
2201             ether_type != RTE_ETHER_TYPE_IPV6)
2202                 return rte_flow_error_set(error, EINVAL,
2203                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2204                                           "IPv6 cannot follow L2/VLAN layer "
2205                                           "which ether type is not IPv6");
2206         if (mask && mask->hdr.proto == UINT8_MAX && spec)
2207                 next_proto = spec->hdr.proto;
2208         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
2209                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2210                         return rte_flow_error_set(error, EINVAL,
2211                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2212                                                   item,
2213                                                   "multiple tunnel "
2214                                                   "not supported");
2215         }
2216         if (next_proto == IPPROTO_HOPOPTS  ||
2217             next_proto == IPPROTO_ROUTING  ||
2218             next_proto == IPPROTO_FRAGMENT ||
2219             next_proto == IPPROTO_ESP      ||
2220             next_proto == IPPROTO_AH       ||
2221             next_proto == IPPROTO_DSTOPTS)
2222                 return rte_flow_error_set(error, EINVAL,
2223                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2224                                           "IPv6 proto (next header) should "
2225                                           "not be set as extension header");
2226         if (item_flags & MLX5_FLOW_LAYER_IPIP)
2227                 return rte_flow_error_set(error, EINVAL,
2228                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2229                                           "wrong tunnel type - IPv4 specified "
2230                                           "but IPv6 item provided");
2231         if (item_flags & l3m)
2232                 return rte_flow_error_set(error, ENOTSUP,
2233                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2234                                           "multiple L3 layers not supported");
2235         else if (item_flags & l4m)
2236                 return rte_flow_error_set(error, EINVAL,
2237                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2238                                           "L3 cannot follow an L4 layer.");
2239         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2240                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2241                 return rte_flow_error_set(error, EINVAL,
2242                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2243                                           "L3 cannot follow an NVGRE layer.");
2244         if (!mask)
2245                 mask = &rte_flow_item_ipv6_mask;
2246         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2247                                         acc_mask ? (const uint8_t *)acc_mask
2248                                                  : (const uint8_t *)&nic_mask,
2249                                         sizeof(struct rte_flow_item_ipv6),
2250                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2251         if (ret < 0)
2252                 return ret;
2253         return 0;
2254 }
2255
2256 /**
2257  * Validate UDP item.
2258  *
2259  * @param[in] item
2260  *   Item specification.
2261  * @param[in] item_flags
2262  *   Bit-fields that holds the items detected until now.
2263  * @param[in] target_protocol
2264  *   The next protocol in the previous item.
2265  * @param[in] flow_mask
2266  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
2267  * @param[out] error
2268  *   Pointer to error structure.
2269  *
2270  * @return
2271  *   0 on success, a negative errno value otherwise and rte_errno is set.
2272  */
2273 int
2274 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
2275                             uint64_t item_flags,
2276                             uint8_t target_protocol,
2277                             struct rte_flow_error *error)
2278 {
2279         const struct rte_flow_item_udp *mask = item->mask;
2280         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2281         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2282                                       MLX5_FLOW_LAYER_OUTER_L3;
2283         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2284                                       MLX5_FLOW_LAYER_OUTER_L4;
2285         int ret;
2286
2287         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
2288                 return rte_flow_error_set(error, EINVAL,
2289                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2290                                           "protocol filtering not compatible"
2291                                           " with UDP layer");
2292         if (!(item_flags & l3m))
2293                 return rte_flow_error_set(error, EINVAL,
2294                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2295                                           "L3 is mandatory to filter on L4");
2296         if (item_flags & l4m)
2297                 return rte_flow_error_set(error, EINVAL,
2298                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2299                                           "multiple L4 layers not supported");
2300         if (!mask)
2301                 mask = &rte_flow_item_udp_mask;
2302         ret = mlx5_flow_item_acceptable
2303                 (item, (const uint8_t *)mask,
2304                  (const uint8_t *)&rte_flow_item_udp_mask,
2305                  sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2306                  error);
2307         if (ret < 0)
2308                 return ret;
2309         return 0;
2310 }
2311
2312 /**
2313  * Validate TCP item.
2314  *
2315  * @param[in] item
2316  *   Item specification.
2317  * @param[in] item_flags
2318  *   Bit-fields that holds the items detected until now.
2319  * @param[in] target_protocol
2320  *   The next protocol in the previous item.
2321  * @param[out] error
2322  *   Pointer to error structure.
2323  *
2324  * @return
2325  *   0 on success, a negative errno value otherwise and rte_errno is set.
2326  */
2327 int
2328 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
2329                             uint64_t item_flags,
2330                             uint8_t target_protocol,
2331                             const struct rte_flow_item_tcp *flow_mask,
2332                             struct rte_flow_error *error)
2333 {
2334         const struct rte_flow_item_tcp *mask = item->mask;
2335         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2336         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2337                                       MLX5_FLOW_LAYER_OUTER_L3;
2338         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2339                                       MLX5_FLOW_LAYER_OUTER_L4;
2340         int ret;
2341
2342         MLX5_ASSERT(flow_mask);
2343         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
2344                 return rte_flow_error_set(error, EINVAL,
2345                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2346                                           "protocol filtering not compatible"
2347                                           " with TCP layer");
2348         if (!(item_flags & l3m))
2349                 return rte_flow_error_set(error, EINVAL,
2350                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2351                                           "L3 is mandatory to filter on L4");
2352         if (item_flags & l4m)
2353                 return rte_flow_error_set(error, EINVAL,
2354                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2355                                           "multiple L4 layers not supported");
2356         if (!mask)
2357                 mask = &rte_flow_item_tcp_mask;
2358         ret = mlx5_flow_item_acceptable
2359                 (item, (const uint8_t *)mask,
2360                  (const uint8_t *)flow_mask,
2361                  sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2362                  error);
2363         if (ret < 0)
2364                 return ret;
2365         return 0;
2366 }
2367
2368 /**
2369  * Validate VXLAN item.
2370  *
2371  * @param[in] item
2372  *   Item specification.
2373  * @param[in] item_flags
2374  *   Bit-fields that holds the items detected until now.
2375  * @param[in] target_protocol
2376  *   The next protocol in the previous item.
2377  * @param[out] error
2378  *   Pointer to error structure.
2379  *
2380  * @return
2381  *   0 on success, a negative errno value otherwise and rte_errno is set.
2382  */
2383 int
2384 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
2385                               uint64_t item_flags,
2386                               struct rte_flow_error *error)
2387 {
2388         const struct rte_flow_item_vxlan *spec = item->spec;
2389         const struct rte_flow_item_vxlan *mask = item->mask;
2390         int ret;
2391         union vni {
2392                 uint32_t vlan_id;
2393                 uint8_t vni[4];
2394         } id = { .vlan_id = 0, };
2395
2396
2397         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2398                 return rte_flow_error_set(error, ENOTSUP,
2399                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2400                                           "multiple tunnel layers not"
2401                                           " supported");
2402         /*
2403          * Verify only UDPv4 is present as defined in
2404          * https://tools.ietf.org/html/rfc7348
2405          */
2406         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2407                 return rte_flow_error_set(error, EINVAL,
2408                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2409                                           "no outer UDP layer found");
2410         if (!mask)
2411                 mask = &rte_flow_item_vxlan_mask;
2412         ret = mlx5_flow_item_acceptable
2413                 (item, (const uint8_t *)mask,
2414                  (const uint8_t *)&rte_flow_item_vxlan_mask,
2415                  sizeof(struct rte_flow_item_vxlan),
2416                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2417         if (ret < 0)
2418                 return ret;
2419         if (spec) {
2420                 memcpy(&id.vni[1], spec->vni, 3);
2421                 memcpy(&id.vni[1], mask->vni, 3);
2422         }
2423         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2424                 return rte_flow_error_set(error, ENOTSUP,
2425                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2426                                           "VXLAN tunnel must be fully defined");
2427         return 0;
2428 }
2429
2430 /**
2431  * Validate VXLAN_GPE item.
2432  *
2433  * @param[in] item
2434  *   Item specification.
2435  * @param[in] item_flags
2436  *   Bit-fields that holds the items detected until now.
2437  * @param[in] priv
2438  *   Pointer to the private data structure.
2439  * @param[in] target_protocol
2440  *   The next protocol in the previous item.
2441  * @param[out] error
2442  *   Pointer to error structure.
2443  *
2444  * @return
2445  *   0 on success, a negative errno value otherwise and rte_errno is set.
2446  */
2447 int
2448 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
2449                                   uint64_t item_flags,
2450                                   struct rte_eth_dev *dev,
2451                                   struct rte_flow_error *error)
2452 {
2453         struct mlx5_priv *priv = dev->data->dev_private;
2454         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
2455         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
2456         int ret;
2457         union vni {
2458                 uint32_t vlan_id;
2459                 uint8_t vni[4];
2460         } id = { .vlan_id = 0, };
2461
2462         if (!priv->config.l3_vxlan_en)
2463                 return rte_flow_error_set(error, ENOTSUP,
2464                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2465                                           "L3 VXLAN is not enabled by device"
2466                                           " parameter and/or not configured in"
2467                                           " firmware");
2468         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2469                 return rte_flow_error_set(error, ENOTSUP,
2470                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2471                                           "multiple tunnel layers not"
2472                                           " supported");
2473         /*
2474          * Verify only UDPv4 is present as defined in
2475          * https://tools.ietf.org/html/rfc7348
2476          */
2477         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2478                 return rte_flow_error_set(error, EINVAL,
2479                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2480                                           "no outer UDP layer found");
2481         if (!mask)
2482                 mask = &rte_flow_item_vxlan_gpe_mask;
2483         ret = mlx5_flow_item_acceptable
2484                 (item, (const uint8_t *)mask,
2485                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
2486                  sizeof(struct rte_flow_item_vxlan_gpe),
2487                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2488         if (ret < 0)
2489                 return ret;
2490         if (spec) {
2491                 if (spec->protocol)
2492                         return rte_flow_error_set(error, ENOTSUP,
2493                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2494                                                   item,
2495                                                   "VxLAN-GPE protocol"
2496                                                   " not supported");
2497                 memcpy(&id.vni[1], spec->vni, 3);
2498                 memcpy(&id.vni[1], mask->vni, 3);
2499         }
2500         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2501                 return rte_flow_error_set(error, ENOTSUP,
2502                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2503                                           "VXLAN-GPE tunnel must be fully"
2504                                           " defined");
2505         return 0;
2506 }
2507 /**
2508  * Validate GRE Key item.
2509  *
2510  * @param[in] item
2511  *   Item specification.
2512  * @param[in] item_flags
2513  *   Bit flags to mark detected items.
2514  * @param[in] gre_item
2515  *   Pointer to gre_item
2516  * @param[out] error
2517  *   Pointer to error structure.
2518  *
2519  * @return
2520  *   0 on success, a negative errno value otherwise and rte_errno is set.
2521  */
2522 int
2523 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
2524                                 uint64_t item_flags,
2525                                 const struct rte_flow_item *gre_item,
2526                                 struct rte_flow_error *error)
2527 {
2528         const rte_be32_t *mask = item->mask;
2529         int ret = 0;
2530         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
2531         const struct rte_flow_item_gre *gre_spec;
2532         const struct rte_flow_item_gre *gre_mask;
2533
2534         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
2535                 return rte_flow_error_set(error, ENOTSUP,
2536                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2537                                           "Multiple GRE key not support");
2538         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2539                 return rte_flow_error_set(error, ENOTSUP,
2540                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2541                                           "No preceding GRE header");
2542         if (item_flags & MLX5_FLOW_LAYER_INNER)
2543                 return rte_flow_error_set(error, ENOTSUP,
2544                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2545                                           "GRE key following a wrong item");
2546         gre_mask = gre_item->mask;
2547         if (!gre_mask)
2548                 gre_mask = &rte_flow_item_gre_mask;
2549         gre_spec = gre_item->spec;
2550         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2551                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2552                 return rte_flow_error_set(error, EINVAL,
2553                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2554                                           "Key bit must be on");
2555
2556         if (!mask)
2557                 mask = &gre_key_default_mask;
2558         ret = mlx5_flow_item_acceptable
2559                 (item, (const uint8_t *)mask,
2560                  (const uint8_t *)&gre_key_default_mask,
2561                  sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2562         return ret;
2563 }
2564
2565 /**
2566  * Validate GRE item.
2567  *
2568  * @param[in] item
2569  *   Item specification.
2570  * @param[in] item_flags
2571  *   Bit flags to mark detected items.
2572  * @param[in] target_protocol
2573  *   The next protocol in the previous item.
2574  * @param[out] error
2575  *   Pointer to error structure.
2576  *
2577  * @return
2578  *   0 on success, a negative errno value otherwise and rte_errno is set.
2579  */
2580 int
2581 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2582                             uint64_t item_flags,
2583                             uint8_t target_protocol,
2584                             struct rte_flow_error *error)
2585 {
2586         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2587         const struct rte_flow_item_gre *mask = item->mask;
2588         int ret;
2589         const struct rte_flow_item_gre nic_mask = {
2590                 .c_rsvd0_ver = RTE_BE16(0xB000),
2591                 .protocol = RTE_BE16(UINT16_MAX),
2592         };
2593
2594         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2595                 return rte_flow_error_set(error, EINVAL,
2596                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2597                                           "protocol filtering not compatible"
2598                                           " with this GRE layer");
2599         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2600                 return rte_flow_error_set(error, ENOTSUP,
2601                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2602                                           "multiple tunnel layers not"
2603                                           " supported");
2604         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2605                 return rte_flow_error_set(error, ENOTSUP,
2606                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2607                                           "L3 Layer is missing");
2608         if (!mask)
2609                 mask = &rte_flow_item_gre_mask;
2610         ret = mlx5_flow_item_acceptable
2611                 (item, (const uint8_t *)mask,
2612                  (const uint8_t *)&nic_mask,
2613                  sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2614                  error);
2615         if (ret < 0)
2616                 return ret;
2617 #ifndef HAVE_MLX5DV_DR
2618 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2619         if (spec && (spec->protocol & mask->protocol))
2620                 return rte_flow_error_set(error, ENOTSUP,
2621                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2622                                           "without MPLS support the"
2623                                           " specification cannot be used for"
2624                                           " filtering");
2625 #endif
2626 #endif
2627         return 0;
2628 }
2629
2630 /**
2631  * Validate Geneve item.
2632  *
2633  * @param[in] item
2634  *   Item specification.
2635  * @param[in] itemFlags
2636  *   Bit-fields that holds the items detected until now.
2637  * @param[in] enPriv
2638  *   Pointer to the private data structure.
2639  * @param[out] error
2640  *   Pointer to error structure.
2641  *
2642  * @return
2643  *   0 on success, a negative errno value otherwise and rte_errno is set.
2644  */
2645
2646 int
2647 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2648                                uint64_t item_flags,
2649                                struct rte_eth_dev *dev,
2650                                struct rte_flow_error *error)
2651 {
2652         struct mlx5_priv *priv = dev->data->dev_private;
2653         const struct rte_flow_item_geneve *spec = item->spec;
2654         const struct rte_flow_item_geneve *mask = item->mask;
2655         int ret;
2656         uint16_t gbhdr;
2657         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2658                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2659         const struct rte_flow_item_geneve nic_mask = {
2660                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2661                 .vni = "\xff\xff\xff",
2662                 .protocol = RTE_BE16(UINT16_MAX),
2663         };
2664
2665         if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2666                 return rte_flow_error_set(error, ENOTSUP,
2667                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2668                                           "L3 Geneve is not enabled by device"
2669                                           " parameter and/or not configured in"
2670                                           " firmware");
2671         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2672                 return rte_flow_error_set(error, ENOTSUP,
2673                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2674                                           "multiple tunnel layers not"
2675                                           " supported");
2676         /*
2677          * Verify only UDPv4 is present as defined in
2678          * https://tools.ietf.org/html/rfc7348
2679          */
2680         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2681                 return rte_flow_error_set(error, EINVAL,
2682                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2683                                           "no outer UDP layer found");
2684         if (!mask)
2685                 mask = &rte_flow_item_geneve_mask;
2686         ret = mlx5_flow_item_acceptable
2687                                   (item, (const uint8_t *)mask,
2688                                    (const uint8_t *)&nic_mask,
2689                                    sizeof(struct rte_flow_item_geneve),
2690                                    MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2691         if (ret)
2692                 return ret;
2693         if (spec) {
2694                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2695                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2696                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2697                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2698                         return rte_flow_error_set(error, ENOTSUP,
2699                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2700                                                   item,
2701                                                   "Geneve protocol unsupported"
2702                                                   " fields are being used");
2703                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2704                         return rte_flow_error_set
2705                                         (error, ENOTSUP,
2706                                          RTE_FLOW_ERROR_TYPE_ITEM,
2707                                          item,
2708                                          "Unsupported Geneve options length");
2709         }
2710         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2711                 return rte_flow_error_set
2712                                     (error, ENOTSUP,
2713                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2714                                      "Geneve tunnel must be fully defined");
2715         return 0;
2716 }
2717
2718 /**
2719  * Validate MPLS item.
2720  *
2721  * @param[in] dev
2722  *   Pointer to the rte_eth_dev structure.
2723  * @param[in] item
2724  *   Item specification.
2725  * @param[in] item_flags
2726  *   Bit-fields that holds the items detected until now.
2727  * @param[in] prev_layer
2728  *   The protocol layer indicated in previous item.
2729  * @param[out] error
2730  *   Pointer to error structure.
2731  *
2732  * @return
2733  *   0 on success, a negative errno value otherwise and rte_errno is set.
2734  */
2735 int
2736 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
2737                              const struct rte_flow_item *item __rte_unused,
2738                              uint64_t item_flags __rte_unused,
2739                              uint64_t prev_layer __rte_unused,
2740                              struct rte_flow_error *error)
2741 {
2742 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2743         const struct rte_flow_item_mpls *mask = item->mask;
2744         struct mlx5_priv *priv = dev->data->dev_private;
2745         int ret;
2746
2747         if (!priv->config.mpls_en)
2748                 return rte_flow_error_set(error, ENOTSUP,
2749                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2750                                           "MPLS not supported or"
2751                                           " disabled in firmware"
2752                                           " configuration.");
2753         /* MPLS over IP, UDP, GRE is allowed */
2754         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
2755                             MLX5_FLOW_LAYER_OUTER_L4_UDP |
2756                             MLX5_FLOW_LAYER_GRE)))
2757                 return rte_flow_error_set(error, EINVAL,
2758                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2759                                           "protocol filtering not compatible"
2760                                           " with MPLS layer");
2761         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
2762         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
2763             !(item_flags & MLX5_FLOW_LAYER_GRE))
2764                 return rte_flow_error_set(error, ENOTSUP,
2765                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2766                                           "multiple tunnel layers not"
2767                                           " supported");
2768         if (!mask)
2769                 mask = &rte_flow_item_mpls_mask;
2770         ret = mlx5_flow_item_acceptable
2771                 (item, (const uint8_t *)mask,
2772                  (const uint8_t *)&rte_flow_item_mpls_mask,
2773                  sizeof(struct rte_flow_item_mpls),
2774                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2775         if (ret < 0)
2776                 return ret;
2777         return 0;
2778 #else
2779         return rte_flow_error_set(error, ENOTSUP,
2780                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
2781                                   "MPLS is not supported by Verbs, please"
2782                                   " update.");
2783 #endif
2784 }
2785
2786 /**
2787  * Validate NVGRE item.
2788  *
2789  * @param[in] item
2790  *   Item specification.
2791  * @param[in] item_flags
2792  *   Bit flags to mark detected items.
2793  * @param[in] target_protocol
2794  *   The next protocol in the previous item.
2795  * @param[out] error
2796  *   Pointer to error structure.
2797  *
2798  * @return
2799  *   0 on success, a negative errno value otherwise and rte_errno is set.
2800  */
2801 int
2802 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
2803                               uint64_t item_flags,
2804                               uint8_t target_protocol,
2805                               struct rte_flow_error *error)
2806 {
2807         const struct rte_flow_item_nvgre *mask = item->mask;
2808         int ret;
2809
2810         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2811                 return rte_flow_error_set(error, EINVAL,
2812                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2813                                           "protocol filtering not compatible"
2814                                           " with this GRE layer");
2815         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2816                 return rte_flow_error_set(error, ENOTSUP,
2817                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2818                                           "multiple tunnel layers not"
2819                                           " supported");
2820         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2821                 return rte_flow_error_set(error, ENOTSUP,
2822                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2823                                           "L3 Layer is missing");
2824         if (!mask)
2825                 mask = &rte_flow_item_nvgre_mask;
2826         ret = mlx5_flow_item_acceptable
2827                 (item, (const uint8_t *)mask,
2828                  (const uint8_t *)&rte_flow_item_nvgre_mask,
2829                  sizeof(struct rte_flow_item_nvgre),
2830                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2831         if (ret < 0)
2832                 return ret;
2833         return 0;
2834 }
2835
2836 /**
2837  * Validate eCPRI item.
2838  *
2839  * @param[in] item
2840  *   Item specification.
2841  * @param[in] item_flags
2842  *   Bit-fields that holds the items detected until now.
2843  * @param[in] last_item
2844  *   Previous validated item in the pattern items.
2845  * @param[in] ether_type
2846  *   Type in the ethernet layer header (including dot1q).
2847  * @param[in] acc_mask
2848  *   Acceptable mask, if NULL default internal default mask
2849  *   will be used to check whether item fields are supported.
2850  * @param[out] error
2851  *   Pointer to error structure.
2852  *
2853  * @return
2854  *   0 on success, a negative errno value otherwise and rte_errno is set.
2855  */
2856 int
2857 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item,
2858                               uint64_t item_flags,
2859                               uint64_t last_item,
2860                               uint16_t ether_type,
2861                               const struct rte_flow_item_ecpri *acc_mask,
2862                               struct rte_flow_error *error)
2863 {
2864         const struct rte_flow_item_ecpri *mask = item->mask;
2865         const struct rte_flow_item_ecpri nic_mask = {
2866                 .hdr = {
2867                         .common = {
2868                                 .u32 =
2869                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
2870                                         .type = 0xFF,
2871                                         }).u32),
2872                         },
2873                         .dummy[0] = 0xFFFFFFFF,
2874                 },
2875         };
2876         const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 |
2877                                         MLX5_FLOW_LAYER_OUTER_VLAN);
2878         struct rte_flow_item_ecpri mask_lo;
2879
2880         if ((last_item & outer_l2_vlan) && ether_type &&
2881             ether_type != RTE_ETHER_TYPE_ECPRI)
2882                 return rte_flow_error_set(error, EINVAL,
2883                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2884                                           "eCPRI cannot follow L2/VLAN layer "
2885                                           "which ether type is not 0xAEFE.");
2886         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2887                 return rte_flow_error_set(error, EINVAL,
2888                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2889                                           "eCPRI with tunnel is not supported "
2890                                           "right now.");
2891         if (item_flags & MLX5_FLOW_LAYER_OUTER_L3)
2892                 return rte_flow_error_set(error, ENOTSUP,
2893                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2894                                           "multiple L3 layers not supported");
2895         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP)
2896                 return rte_flow_error_set(error, EINVAL,
2897                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2898                                           "eCPRI cannot follow a TCP layer.");
2899         /* In specification, eCPRI could be over UDP layer. */
2900         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)
2901                 return rte_flow_error_set(error, EINVAL,
2902                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2903                                           "eCPRI over UDP layer is not yet "
2904                                           "supported right now.");
2905         /* Mask for type field in common header could be zero. */
2906         if (!mask)
2907                 mask = &rte_flow_item_ecpri_mask;
2908         mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32);
2909         /* Input mask is in big-endian format. */
2910         if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff)
2911                 return rte_flow_error_set(error, EINVAL,
2912                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2913                                           "partial mask is not supported "
2914                                           "for protocol");
2915         else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0)
2916                 return rte_flow_error_set(error, EINVAL,
2917                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2918                                           "message header mask must be after "
2919                                           "a type mask");
2920         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2921                                          acc_mask ? (const uint8_t *)acc_mask
2922                                                   : (const uint8_t *)&nic_mask,
2923                                          sizeof(struct rte_flow_item_ecpri),
2924                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2925 }
2926
2927 /* Allocate unique ID for the split Q/RSS subflows. */
2928 static uint32_t
2929 flow_qrss_get_id(struct rte_eth_dev *dev)
2930 {
2931         struct mlx5_priv *priv = dev->data->dev_private;
2932         uint32_t qrss_id, ret;
2933
2934         ret = mlx5_flow_id_get(priv->qrss_id_pool, &qrss_id);
2935         if (ret)
2936                 return 0;
2937         MLX5_ASSERT(qrss_id);
2938         return qrss_id;
2939 }
2940
2941 /* Free unique ID for the split Q/RSS subflows. */
2942 static void
2943 flow_qrss_free_id(struct rte_eth_dev *dev,  uint32_t qrss_id)
2944 {
2945         struct mlx5_priv *priv = dev->data->dev_private;
2946
2947         if (qrss_id)
2948                 mlx5_flow_id_release(priv->qrss_id_pool, qrss_id);
2949 }
2950
2951 /**
2952  * Release resource related QUEUE/RSS action split.
2953  *
2954  * @param dev
2955  *   Pointer to Ethernet device.
2956  * @param flow
2957  *   Flow to release id's from.
2958  */
2959 static void
2960 flow_mreg_split_qrss_release(struct rte_eth_dev *dev,
2961                              struct rte_flow *flow)
2962 {
2963         struct mlx5_priv *priv = dev->data->dev_private;
2964         uint32_t handle_idx;
2965         struct mlx5_flow_handle *dev_handle;
2966
2967         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
2968                        handle_idx, dev_handle, next)
2969                 if (dev_handle->split_flow_id)
2970                         flow_qrss_free_id(dev, dev_handle->split_flow_id);
2971 }
2972
2973 static int
2974 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
2975                    const struct rte_flow_attr *attr __rte_unused,
2976                    const struct rte_flow_item items[] __rte_unused,
2977                    const struct rte_flow_action actions[] __rte_unused,
2978                    bool external __rte_unused,
2979                    int hairpin __rte_unused,
2980                    struct rte_flow_error *error)
2981 {
2982         return rte_flow_error_set(error, ENOTSUP,
2983                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2984 }
2985
2986 static struct mlx5_flow *
2987 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
2988                   const struct rte_flow_attr *attr __rte_unused,
2989                   const struct rte_flow_item items[] __rte_unused,
2990                   const struct rte_flow_action actions[] __rte_unused,
2991                   struct rte_flow_error *error)
2992 {
2993         rte_flow_error_set(error, ENOTSUP,
2994                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2995         return NULL;
2996 }
2997
2998 static int
2999 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
3000                     struct mlx5_flow *dev_flow __rte_unused,
3001                     const struct rte_flow_attr *attr __rte_unused,
3002                     const struct rte_flow_item items[] __rte_unused,
3003                     const struct rte_flow_action actions[] __rte_unused,
3004                     struct rte_flow_error *error)
3005 {
3006         return rte_flow_error_set(error, ENOTSUP,
3007                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3008 }
3009
3010 static int
3011 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
3012                 struct rte_flow *flow __rte_unused,
3013                 struct rte_flow_error *error)
3014 {
3015         return rte_flow_error_set(error, ENOTSUP,
3016                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3017 }
3018
3019 static void
3020 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
3021                  struct rte_flow *flow __rte_unused)
3022 {
3023 }
3024
3025 static void
3026 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
3027                   struct rte_flow *flow __rte_unused)
3028 {
3029 }
3030
3031 static int
3032 flow_null_query(struct rte_eth_dev *dev __rte_unused,
3033                 struct rte_flow *flow __rte_unused,
3034                 const struct rte_flow_action *actions __rte_unused,
3035                 void *data __rte_unused,
3036                 struct rte_flow_error *error)
3037 {
3038         return rte_flow_error_set(error, ENOTSUP,
3039                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3040 }
3041
3042 /* Void driver to protect from null pointer reference. */
3043 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
3044         .validate = flow_null_validate,
3045         .prepare = flow_null_prepare,
3046         .translate = flow_null_translate,
3047         .apply = flow_null_apply,
3048         .remove = flow_null_remove,
3049         .destroy = flow_null_destroy,
3050         .query = flow_null_query,
3051 };
3052
3053 /**
3054  * Select flow driver type according to flow attributes and device
3055  * configuration.
3056  *
3057  * @param[in] dev
3058  *   Pointer to the dev structure.
3059  * @param[in] attr
3060  *   Pointer to the flow attributes.
3061  *
3062  * @return
3063  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
3064  */
3065 static enum mlx5_flow_drv_type
3066 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
3067 {
3068         struct mlx5_priv *priv = dev->data->dev_private;
3069         /* The OS can determine first a specific flow type (DV, VERBS) */
3070         enum mlx5_flow_drv_type type = mlx5_flow_os_get_type();
3071
3072         if (type != MLX5_FLOW_TYPE_MAX)
3073                 return type;
3074         /* If no OS specific type - continue with DV/VERBS selection */
3075         if (attr->transfer && priv->config.dv_esw_en)
3076                 type = MLX5_FLOW_TYPE_DV;
3077         if (!attr->transfer)
3078                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
3079                                                  MLX5_FLOW_TYPE_VERBS;
3080         return type;
3081 }
3082
3083 #define flow_get_drv_ops(type) flow_drv_ops[type]
3084
3085 /**
3086  * Flow driver validation API. This abstracts calling driver specific functions.
3087  * The type of flow driver is determined according to flow attributes.
3088  *
3089  * @param[in] dev
3090  *   Pointer to the dev structure.
3091  * @param[in] attr
3092  *   Pointer to the flow attributes.
3093  * @param[in] items
3094  *   Pointer to the list of items.
3095  * @param[in] actions
3096  *   Pointer to the list of actions.
3097  * @param[in] external
3098  *   This flow rule is created by request external to PMD.
3099  * @param[in] hairpin
3100  *   Number of hairpin TX actions, 0 means classic flow.
3101  * @param[out] error
3102  *   Pointer to the error structure.
3103  *
3104  * @return
3105  *   0 on success, a negative errno value otherwise and rte_errno is set.
3106  */
3107 static inline int
3108 flow_drv_validate(struct rte_eth_dev *dev,
3109                   const struct rte_flow_attr *attr,
3110                   const struct rte_flow_item items[],
3111                   const struct rte_flow_action actions[],
3112                   bool external, int hairpin, struct rte_flow_error *error)
3113 {
3114         const struct mlx5_flow_driver_ops *fops;
3115         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
3116
3117         fops = flow_get_drv_ops(type);
3118         return fops->validate(dev, attr, items, actions, external,
3119                               hairpin, error);
3120 }
3121
3122 /**
3123  * Flow driver preparation API. This abstracts calling driver specific
3124  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3125  * calculates the size of memory required for device flow, allocates the memory,
3126  * initializes the device flow and returns the pointer.
3127  *
3128  * @note
3129  *   This function initializes device flow structure such as dv or verbs in
3130  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
3131  *   rest. For example, adding returning device flow to flow->dev_flow list and
3132  *   setting backward reference to the flow should be done out of this function.
3133  *   layers field is not filled either.
3134  *
3135  * @param[in] dev
3136  *   Pointer to the dev structure.
3137  * @param[in] attr
3138  *   Pointer to the flow attributes.
3139  * @param[in] items
3140  *   Pointer to the list of items.
3141  * @param[in] actions
3142  *   Pointer to the list of actions.
3143  * @param[in] flow_idx
3144  *   This memory pool index to the flow.
3145  * @param[out] error
3146  *   Pointer to the error structure.
3147  *
3148  * @return
3149  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
3150  */
3151 static inline struct mlx5_flow *
3152 flow_drv_prepare(struct rte_eth_dev *dev,
3153                  const struct rte_flow *flow,
3154                  const struct rte_flow_attr *attr,
3155                  const struct rte_flow_item items[],
3156                  const struct rte_flow_action actions[],
3157                  uint32_t flow_idx,
3158                  struct rte_flow_error *error)
3159 {
3160         const struct mlx5_flow_driver_ops *fops;
3161         enum mlx5_flow_drv_type type = flow->drv_type;
3162         struct mlx5_flow *mlx5_flow = NULL;
3163
3164         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3165         fops = flow_get_drv_ops(type);
3166         mlx5_flow = fops->prepare(dev, attr, items, actions, error);
3167         if (mlx5_flow)
3168                 mlx5_flow->flow_idx = flow_idx;
3169         return mlx5_flow;
3170 }
3171
3172 /**
3173  * Flow driver translation API. This abstracts calling driver specific
3174  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3175  * translates a generic flow into a driver flow. flow_drv_prepare() must
3176  * precede.
3177  *
3178  * @note
3179  *   dev_flow->layers could be filled as a result of parsing during translation
3180  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
3181  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
3182  *   flow->actions could be overwritten even though all the expanded dev_flows
3183  *   have the same actions.
3184  *
3185  * @param[in] dev
3186  *   Pointer to the rte dev structure.
3187  * @param[in, out] dev_flow
3188  *   Pointer to the mlx5 flow.
3189  * @param[in] attr
3190  *   Pointer to the flow attributes.
3191  * @param[in] items
3192  *   Pointer to the list of items.
3193  * @param[in] actions
3194  *   Pointer to the list of actions.
3195  * @param[out] error
3196  *   Pointer to the error structure.
3197  *
3198  * @return
3199  *   0 on success, a negative errno value otherwise and rte_errno is set.
3200  */
3201 static inline int
3202 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
3203                    const struct rte_flow_attr *attr,
3204                    const struct rte_flow_item items[],
3205                    const struct rte_flow_action actions[],
3206                    struct rte_flow_error *error)
3207 {
3208         const struct mlx5_flow_driver_ops *fops;
3209         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
3210
3211         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3212         fops = flow_get_drv_ops(type);
3213         return fops->translate(dev, dev_flow, attr, items, actions, error);
3214 }
3215
3216 /**
3217  * Flow driver apply API. This abstracts calling driver specific functions.
3218  * Parent flow (rte_flow) should have driver type (drv_type). It applies
3219  * translated driver flows on to device. flow_drv_translate() must precede.
3220  *
3221  * @param[in] dev
3222  *   Pointer to Ethernet device structure.
3223  * @param[in, out] flow
3224  *   Pointer to flow structure.
3225  * @param[out] error
3226  *   Pointer to error structure.
3227  *
3228  * @return
3229  *   0 on success, a negative errno value otherwise and rte_errno is set.
3230  */
3231 static inline int
3232 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
3233                struct rte_flow_error *error)
3234 {
3235         const struct mlx5_flow_driver_ops *fops;
3236         enum mlx5_flow_drv_type type = flow->drv_type;
3237
3238         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3239         fops = flow_get_drv_ops(type);
3240         return fops->apply(dev, flow, error);
3241 }
3242
3243 /**
3244  * Flow driver remove API. This abstracts calling driver specific functions.
3245  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
3246  * on device. All the resources of the flow should be freed by calling
3247  * flow_drv_destroy().
3248  *
3249  * @param[in] dev
3250  *   Pointer to Ethernet device.
3251  * @param[in, out] flow
3252  *   Pointer to flow structure.
3253  */
3254 static inline void
3255 flow_drv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
3256 {
3257         const struct mlx5_flow_driver_ops *fops;
3258         enum mlx5_flow_drv_type type = flow->drv_type;
3259
3260         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3261         fops = flow_get_drv_ops(type);
3262         fops->remove(dev, flow);
3263 }
3264
3265 /**
3266  * Flow driver destroy API. This abstracts calling driver specific functions.
3267  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
3268  * on device and releases resources of the flow.
3269  *
3270  * @param[in] dev
3271  *   Pointer to Ethernet device.
3272  * @param[in, out] flow
3273  *   Pointer to flow structure.
3274  */
3275 static inline void
3276 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
3277 {
3278         const struct mlx5_flow_driver_ops *fops;
3279         enum mlx5_flow_drv_type type = flow->drv_type;
3280
3281         flow_mreg_split_qrss_release(dev, flow);
3282         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3283         fops = flow_get_drv_ops(type);
3284         fops->destroy(dev, flow);
3285 }
3286
3287 /**
3288  * Get RSS action from the action list.
3289  *
3290  * @param[in] actions
3291  *   Pointer to the list of actions.
3292  *
3293  * @return
3294  *   Pointer to the RSS action if exist, else return NULL.
3295  */
3296 static const struct rte_flow_action_rss*
3297 flow_get_rss_action(const struct rte_flow_action actions[])
3298 {
3299         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3300                 switch (actions->type) {
3301                 case RTE_FLOW_ACTION_TYPE_RSS:
3302                         return (const struct rte_flow_action_rss *)
3303                                actions->conf;
3304                 default:
3305                         break;
3306                 }
3307         }
3308         return NULL;
3309 }
3310
3311 /* maps shared action to translated non shared in some actions array */
3312 struct mlx5_translated_shared_action {
3313         struct rte_flow_shared_action *action; /**< Shared action */
3314         int index; /**< Index in related array of rte_flow_action */
3315 };
3316
3317 /**
3318  * Translates actions of type RTE_FLOW_ACTION_TYPE_SHARED to related
3319  * non shared action if translation possible.
3320  * This functionality used to run same execution path for both shared & non
3321  * shared actions on flow create. All necessary preparations for shared
3322  * action handling should be preformed on *shared* actions list returned
3323  * from this call.
3324  *
3325  * @param[in] actions
3326  *   List of actions to translate.
3327  * @param[out] shared
3328  *   List to store translated shared actions.
3329  * @param[in, out] shared_n
3330  *   Size of *shared* array. On return should be updated with number of shared
3331  *   actions retrieved from the *actions* list.
3332  * @param[out] translated_actions
3333  *   List of actions where all shared actions were translated to non shared
3334  *   if possible. NULL if no translation took place.
3335  * @param[out] error
3336  *   Pointer to the error structure.
3337  *
3338  * @return
3339  *   0 on success, a negative errno value otherwise and rte_errno is set.
3340  */
3341 static int
3342 flow_shared_actions_translate(const struct rte_flow_action actions[],
3343         struct mlx5_translated_shared_action *shared,
3344         int *shared_n,
3345         struct rte_flow_action **translated_actions,
3346         struct rte_flow_error *error)
3347 {
3348         struct rte_flow_action *translated = NULL;
3349         size_t actions_size;
3350         int n;
3351         int copied_n = 0;
3352         struct mlx5_translated_shared_action *shared_end = NULL;
3353
3354         for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
3355                 if (actions[n].type != RTE_FLOW_ACTION_TYPE_SHARED)
3356                         continue;
3357                 if (copied_n == *shared_n) {
3358                         return rte_flow_error_set
3359                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
3360                                  NULL, "too many shared actions");
3361                 }
3362                 rte_memcpy(&shared[copied_n].action, &actions[n].conf,
3363                            sizeof(actions[n].conf));
3364                 shared[copied_n].index = n;
3365                 copied_n++;
3366         }
3367         n++;
3368         *shared_n = copied_n;
3369         if (!copied_n)
3370                 return 0;
3371         actions_size = sizeof(struct rte_flow_action) * n;
3372         translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY);
3373         if (!translated) {
3374                 rte_errno = ENOMEM;
3375                 return -ENOMEM;
3376         }
3377         memcpy(translated, actions, actions_size);
3378         for (shared_end = shared + copied_n; shared < shared_end; shared++) {
3379                 const struct rte_flow_shared_action *shared_action;
3380
3381                 shared_action = shared->action;
3382                 switch (shared_action->type) {
3383                 case MLX5_RTE_FLOW_ACTION_TYPE_SHARED_RSS:
3384                         translated[shared->index].type =
3385                                 RTE_FLOW_ACTION_TYPE_RSS;
3386                         translated[shared->index].conf =
3387                                 &shared_action->rss.origin;
3388                         break;
3389                 default:
3390                         mlx5_free(translated);
3391                         return rte_flow_error_set
3392                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
3393                                  NULL, "invalid shared action type");
3394                 }
3395         }
3396         *translated_actions = translated;
3397         return 0;
3398 }
3399
3400 /**
3401  * Get Shared RSS action from the action list.
3402  *
3403  * @param[in] shared
3404  *   Pointer to the list of actions.
3405  * @param[in] shared_n
3406  *   Actions list length.
3407  *
3408  * @return
3409  *   Pointer to the MLX5 RSS action if exists, otherwise return NULL.
3410  */
3411 static struct mlx5_shared_action_rss *
3412 flow_get_shared_rss_action(struct mlx5_translated_shared_action *shared,
3413                            int shared_n)
3414 {
3415         struct mlx5_translated_shared_action *shared_end;
3416
3417         for (shared_end = shared + shared_n; shared < shared_end; shared++) {
3418                 struct rte_flow_shared_action *shared_action;
3419
3420                 shared_action = shared->action;
3421                 switch (shared_action->type) {
3422                 case MLX5_RTE_FLOW_ACTION_TYPE_SHARED_RSS:
3423                         __atomic_add_fetch(&shared_action->refcnt, 1,
3424                                            __ATOMIC_RELAXED);
3425                         return &shared_action->rss;
3426                 default:
3427                         break;
3428                 }
3429         }
3430         return NULL;
3431 }
3432
3433 struct rte_flow_shared_action *
3434 mlx5_flow_get_shared_rss(struct rte_flow *flow)
3435 {
3436         if (flow->shared_rss)
3437                 return container_of(flow->shared_rss,
3438                                     struct rte_flow_shared_action, rss);
3439         else
3440                 return NULL;
3441 }
3442
3443 static unsigned int
3444 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
3445 {
3446         const struct rte_flow_item *item;
3447         unsigned int has_vlan = 0;
3448
3449         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
3450                 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
3451                         has_vlan = 1;
3452                         break;
3453                 }
3454         }
3455         if (has_vlan)
3456                 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
3457                                        MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
3458         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
3459                                MLX5_EXPANSION_ROOT_OUTER;
3460 }
3461
3462 /**
3463  *  Get layer flags from the prefix flow.
3464  *
3465  *  Some flows may be split to several subflows, the prefix subflow gets the
3466  *  match items and the suffix sub flow gets the actions.
3467  *  Some actions need the user defined match item flags to get the detail for
3468  *  the action.
3469  *  This function helps the suffix flow to get the item layer flags from prefix
3470  *  subflow.
3471  *
3472  * @param[in] dev_flow
3473  *   Pointer the created preifx subflow.
3474  *
3475  * @return
3476  *   The layers get from prefix subflow.
3477  */
3478 static inline uint64_t
3479 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
3480 {
3481         uint64_t layers = 0;
3482
3483         /*
3484          * Layers bits could be localization, but usually the compiler will
3485          * help to do the optimization work for source code.
3486          * If no decap actions, use the layers directly.
3487          */
3488         if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP))
3489                 return dev_flow->handle->layers;
3490         /* Convert L3 layers with decap action. */
3491         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
3492                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3493         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
3494                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3495         /* Convert L4 layers with decap action.  */
3496         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
3497                 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
3498         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
3499                 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
3500         return layers;
3501 }
3502
3503 /**
3504  * Get metadata split action information.
3505  *
3506  * @param[in] actions
3507  *   Pointer to the list of actions.
3508  * @param[out] qrss
3509  *   Pointer to the return pointer.
3510  * @param[out] qrss_type
3511  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
3512  *   if no QUEUE/RSS is found.
3513  * @param[out] encap_idx
3514  *   Pointer to the index of the encap action if exists, otherwise the last
3515  *   action index.
3516  *
3517  * @return
3518  *   Total number of actions.
3519  */
3520 static int
3521 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
3522                                        const struct rte_flow_action **qrss,
3523                                        int *encap_idx)
3524 {
3525         const struct rte_flow_action_raw_encap *raw_encap;
3526         int actions_n = 0;
3527         int raw_decap_idx = -1;
3528
3529         *encap_idx = -1;
3530         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3531                 switch (actions->type) {
3532                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3533                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3534                         *encap_idx = actions_n;
3535                         break;
3536                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3537                         raw_decap_idx = actions_n;
3538                         break;
3539                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3540                         raw_encap = actions->conf;
3541                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3542                                 *encap_idx = raw_decap_idx != -1 ?
3543                                                       raw_decap_idx : actions_n;
3544                         break;
3545                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3546                 case RTE_FLOW_ACTION_TYPE_RSS:
3547                         *qrss = actions;
3548                         break;
3549                 default:
3550                         break;
3551                 }
3552                 actions_n++;
3553         }
3554         if (*encap_idx == -1)
3555                 *encap_idx = actions_n;
3556         /* Count RTE_FLOW_ACTION_TYPE_END. */
3557         return actions_n + 1;
3558 }
3559
3560 /**
3561  * Check meter action from the action list.
3562  *
3563  * @param[in] actions
3564  *   Pointer to the list of actions.
3565  * @param[out] mtr
3566  *   Pointer to the meter exist flag.
3567  *
3568  * @return
3569  *   Total number of actions.
3570  */
3571 static int
3572 flow_check_meter_action(const struct rte_flow_action actions[], uint32_t *mtr)
3573 {
3574         int actions_n = 0;
3575
3576         MLX5_ASSERT(mtr);
3577         *mtr = 0;
3578         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3579                 switch (actions->type) {
3580                 case RTE_FLOW_ACTION_TYPE_METER:
3581                         *mtr = 1;
3582                         break;
3583                 default:
3584                         break;
3585                 }
3586                 actions_n++;
3587         }
3588         /* Count RTE_FLOW_ACTION_TYPE_END. */
3589         return actions_n + 1;
3590 }
3591
3592 /**
3593  * Check if the flow should be split due to hairpin.
3594  * The reason for the split is that in current HW we can't
3595  * support encap and push-vlan on Rx, so if a flow contains
3596  * these actions we move it to Tx.
3597  *
3598  * @param dev
3599  *   Pointer to Ethernet device.
3600  * @param[in] attr
3601  *   Flow rule attributes.
3602  * @param[in] actions
3603  *   Associated actions (list terminated by the END action).
3604  *
3605  * @return
3606  *   > 0 the number of actions and the flow should be split,
3607  *   0 when no split required.
3608  */
3609 static int
3610 flow_check_hairpin_split(struct rte_eth_dev *dev,
3611                          const struct rte_flow_attr *attr,
3612                          const struct rte_flow_action actions[])
3613 {
3614         int queue_action = 0;
3615         int action_n = 0;
3616         int split = 0;
3617         const struct rte_flow_action_queue *queue;
3618         const struct rte_flow_action_rss *rss;
3619         const struct rte_flow_action_raw_encap *raw_encap;
3620         const struct rte_eth_hairpin_conf *conf;
3621
3622         if (!attr->ingress)
3623                 return 0;
3624         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3625                 switch (actions->type) {
3626                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3627                         queue = actions->conf;
3628                         if (queue == NULL)
3629                                 return 0;
3630                         conf = mlx5_rxq_get_hairpin_conf(dev, queue->index);
3631                         if (conf != NULL && !!conf->tx_explicit)
3632                                 return 0;
3633                         queue_action = 1;
3634                         action_n++;
3635                         break;
3636                 case RTE_FLOW_ACTION_TYPE_RSS:
3637                         rss = actions->conf;
3638                         if (rss == NULL || rss->queue_num == 0)
3639                                 return 0;
3640                         conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]);
3641                         if (conf != NULL && !!conf->tx_explicit)
3642                                 return 0;
3643                         queue_action = 1;
3644                         action_n++;
3645                         break;
3646                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3647                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3648                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3649                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3650                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
3651                         split++;
3652                         action_n++;
3653                         break;
3654                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3655                         raw_encap = actions->conf;
3656                         if (raw_encap->size >
3657                             (sizeof(struct rte_flow_item_eth) +
3658                              sizeof(struct rte_flow_item_ipv4)))
3659                                 split++;
3660                         action_n++;
3661                         break;
3662                 default:
3663                         action_n++;
3664                         break;
3665                 }
3666         }
3667         if (split && queue_action)
3668                 return action_n;
3669         return 0;
3670 }
3671
3672 /* Declare flow create/destroy prototype in advance. */
3673 static uint32_t
3674 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
3675                  const struct rte_flow_attr *attr,
3676                  const struct rte_flow_item items[],
3677                  const struct rte_flow_action actions[],
3678                  bool external, struct rte_flow_error *error);
3679
3680 static void
3681 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
3682                   uint32_t flow_idx);
3683
3684 /**
3685  * Add a flow of copying flow metadata registers in RX_CP_TBL.
3686  *
3687  * As mark_id is unique, if there's already a registered flow for the mark_id,
3688  * return by increasing the reference counter of the resource. Otherwise, create
3689  * the resource (mcp_res) and flow.
3690  *
3691  * Flow looks like,
3692  *   - If ingress port is ANY and reg_c[1] is mark_id,
3693  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3694  *
3695  * For default flow (zero mark_id), flow is like,
3696  *   - If ingress port is ANY,
3697  *     reg_b := reg_c[0] and jump to RX_ACT_TBL.
3698  *
3699  * @param dev
3700  *   Pointer to Ethernet device.
3701  * @param mark_id
3702  *   ID of MARK action, zero means default flow for META.
3703  * @param[out] error
3704  *   Perform verbose error reporting if not NULL.
3705  *
3706  * @return
3707  *   Associated resource on success, NULL otherwise and rte_errno is set.
3708  */
3709 static struct mlx5_flow_mreg_copy_resource *
3710 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
3711                           struct rte_flow_error *error)
3712 {
3713         struct mlx5_priv *priv = dev->data->dev_private;
3714         struct rte_flow_attr attr = {
3715                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
3716                 .ingress = 1,
3717         };
3718         struct mlx5_rte_flow_item_tag tag_spec = {
3719                 .data = mark_id,
3720         };
3721         struct rte_flow_item items[] = {
3722                 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
3723         };
3724         struct rte_flow_action_mark ftag = {
3725                 .id = mark_id,
3726         };
3727         struct mlx5_flow_action_copy_mreg cp_mreg = {
3728                 .dst = REG_B,
3729                 .src = REG_NON,
3730         };
3731         struct rte_flow_action_jump jump = {
3732                 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
3733         };
3734         struct rte_flow_action actions[] = {
3735                 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
3736         };
3737         struct mlx5_flow_mreg_copy_resource *mcp_res;
3738         uint32_t idx = 0;
3739         int ret;
3740
3741         /* Fill the register fileds in the flow. */
3742         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3743         if (ret < 0)
3744                 return NULL;
3745         tag_spec.id = ret;
3746         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
3747         if (ret < 0)
3748                 return NULL;
3749         cp_mreg.src = ret;
3750         /* Check if already registered. */
3751         MLX5_ASSERT(priv->mreg_cp_tbl);
3752         mcp_res = (void *)mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id);
3753         if (mcp_res) {
3754                 /* For non-default rule. */
3755                 if (mark_id != MLX5_DEFAULT_COPY_ID)
3756                         mcp_res->refcnt++;
3757                 MLX5_ASSERT(mark_id != MLX5_DEFAULT_COPY_ID ||
3758                             mcp_res->refcnt == 1);
3759                 return mcp_res;
3760         }
3761         /* Provide the full width of FLAG specific value. */
3762         if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
3763                 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
3764         /* Build a new flow. */
3765         if (mark_id != MLX5_DEFAULT_COPY_ID) {
3766                 items[0] = (struct rte_flow_item){
3767                         .type = (enum rte_flow_item_type)
3768                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
3769                         .spec = &tag_spec,
3770                 };
3771                 items[1] = (struct rte_flow_item){
3772                         .type = RTE_FLOW_ITEM_TYPE_END,
3773                 };
3774                 actions[0] = (struct rte_flow_action){
3775                         .type = (enum rte_flow_action_type)
3776                                 MLX5_RTE_FLOW_ACTION_TYPE_MARK,
3777                         .conf = &ftag,
3778                 };
3779                 actions[1] = (struct rte_flow_action){
3780                         .type = (enum rte_flow_action_type)
3781                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3782                         .conf = &cp_mreg,
3783                 };
3784                 actions[2] = (struct rte_flow_action){
3785                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
3786                         .conf = &jump,
3787                 };
3788                 actions[3] = (struct rte_flow_action){
3789                         .type = RTE_FLOW_ACTION_TYPE_END,
3790                 };
3791         } else {
3792                 /* Default rule, wildcard match. */
3793                 attr.priority = MLX5_FLOW_PRIO_RSVD;
3794                 items[0] = (struct rte_flow_item){
3795                         .type = RTE_FLOW_ITEM_TYPE_END,
3796                 };
3797                 actions[0] = (struct rte_flow_action){
3798                         .type = (enum rte_flow_action_type)
3799                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3800                         .conf = &cp_mreg,
3801                 };
3802                 actions[1] = (struct rte_flow_action){
3803                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
3804                         .conf = &jump,
3805                 };
3806                 actions[2] = (struct rte_flow_action){
3807                         .type = RTE_FLOW_ACTION_TYPE_END,
3808                 };
3809         }
3810         /* Build a new entry. */
3811         mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
3812         if (!mcp_res) {
3813                 rte_errno = ENOMEM;
3814                 return NULL;
3815         }
3816         mcp_res->idx = idx;
3817         /*
3818          * The copy Flows are not included in any list. There
3819          * ones are referenced from other Flows and can not
3820          * be applied, removed, deleted in ardbitrary order
3821          * by list traversing.
3822          */
3823         mcp_res->rix_flow = flow_list_create(dev, NULL, &attr, items,
3824                                          actions, false, error);
3825         if (!mcp_res->rix_flow)
3826                 goto error;
3827         mcp_res->refcnt++;
3828         mcp_res->hlist_ent.key = mark_id;
3829         ret = mlx5_hlist_insert(priv->mreg_cp_tbl,
3830                                 &mcp_res->hlist_ent);
3831         MLX5_ASSERT(!ret);
3832         if (ret)
3833                 goto error;
3834         return mcp_res;
3835 error:
3836         if (mcp_res->rix_flow)
3837                 flow_list_destroy(dev, NULL, mcp_res->rix_flow);
3838         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
3839         return NULL;
3840 }
3841
3842 /**
3843  * Release flow in RX_CP_TBL.
3844  *
3845  * @param dev
3846  *   Pointer to Ethernet device.
3847  * @flow
3848  *   Parent flow for wich copying is provided.
3849  */
3850 static void
3851 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
3852                           struct rte_flow *flow)
3853 {
3854         struct mlx5_flow_mreg_copy_resource *mcp_res;
3855         struct mlx5_priv *priv = dev->data->dev_private;
3856
3857         if (!flow->rix_mreg_copy)
3858                 return;
3859         mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
3860                                  flow->rix_mreg_copy);
3861         if (!mcp_res || !priv->mreg_cp_tbl)
3862                 return;
3863         if (flow->copy_applied) {
3864                 MLX5_ASSERT(mcp_res->appcnt);
3865                 flow->copy_applied = 0;
3866                 --mcp_res->appcnt;
3867                 if (!mcp_res->appcnt) {
3868                         struct rte_flow *mcp_flow = mlx5_ipool_get
3869                                         (priv->sh->ipool[MLX5_IPOOL_RTE_FLOW],
3870                                         mcp_res->rix_flow);
3871
3872                         if (mcp_flow)
3873                                 flow_drv_remove(dev, mcp_flow);
3874                 }
3875         }
3876         /*
3877          * We do not check availability of metadata registers here,
3878          * because copy resources are not allocated in this case.
3879          */
3880         if (--mcp_res->refcnt)
3881                 return;
3882         MLX5_ASSERT(mcp_res->rix_flow);
3883         flow_list_destroy(dev, NULL, mcp_res->rix_flow);
3884         mlx5_hlist_remove(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
3885         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
3886         flow->rix_mreg_copy = 0;
3887 }
3888
3889 /**
3890  * Start flow in RX_CP_TBL.
3891  *
3892  * @param dev
3893  *   Pointer to Ethernet device.
3894  * @flow
3895  *   Parent flow for wich copying is provided.
3896  *
3897  * @return
3898  *   0 on success, a negative errno value otherwise and rte_errno is set.
3899  */
3900 static int
3901 flow_mreg_start_copy_action(struct rte_eth_dev *dev,
3902                             struct rte_flow *flow)
3903 {
3904         struct mlx5_flow_mreg_copy_resource *mcp_res;
3905         struct mlx5_priv *priv = dev->data->dev_private;
3906         int ret;
3907
3908         if (!flow->rix_mreg_copy || flow->copy_applied)
3909                 return 0;
3910         mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
3911                                  flow->rix_mreg_copy);
3912         if (!mcp_res)
3913                 return 0;
3914         if (!mcp_res->appcnt) {
3915                 struct rte_flow *mcp_flow = mlx5_ipool_get
3916                                 (priv->sh->ipool[MLX5_IPOOL_RTE_FLOW],
3917                                 mcp_res->rix_flow);
3918
3919                 if (mcp_flow) {
3920                         ret = flow_drv_apply(dev, mcp_flow, NULL);
3921                         if (ret)
3922                                 return ret;
3923                 }
3924         }
3925         ++mcp_res->appcnt;
3926         flow->copy_applied = 1;
3927         return 0;
3928 }
3929
3930 /**
3931  * Stop flow in RX_CP_TBL.
3932  *
3933  * @param dev
3934  *   Pointer to Ethernet device.
3935  * @flow
3936  *   Parent flow for wich copying is provided.
3937  */
3938 static void
3939 flow_mreg_stop_copy_action(struct rte_eth_dev *dev,
3940                            struct rte_flow *flow)
3941 {
3942         struct mlx5_flow_mreg_copy_resource *mcp_res;
3943         struct mlx5_priv *priv = dev->data->dev_private;
3944
3945         if (!flow->rix_mreg_copy || !flow->copy_applied)
3946                 return;
3947         mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
3948                                  flow->rix_mreg_copy);
3949         if (!mcp_res)
3950                 return;
3951         MLX5_ASSERT(mcp_res->appcnt);
3952         --mcp_res->appcnt;
3953         flow->copy_applied = 0;
3954         if (!mcp_res->appcnt) {
3955                 struct rte_flow *mcp_flow = mlx5_ipool_get
3956                                 (priv->sh->ipool[MLX5_IPOOL_RTE_FLOW],
3957                                 mcp_res->rix_flow);
3958
3959                 if (mcp_flow)
3960                         flow_drv_remove(dev, mcp_flow);
3961         }
3962 }
3963
3964 /**
3965  * Remove the default copy action from RX_CP_TBL.
3966  *
3967  * @param dev
3968  *   Pointer to Ethernet device.
3969  */
3970 static void
3971 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
3972 {
3973         struct mlx5_flow_mreg_copy_resource *mcp_res;
3974         struct mlx5_priv *priv = dev->data->dev_private;
3975
3976         /* Check if default flow is registered. */
3977         if (!priv->mreg_cp_tbl)
3978                 return;
3979         mcp_res = (void *)mlx5_hlist_lookup(priv->mreg_cp_tbl,
3980                                             MLX5_DEFAULT_COPY_ID);
3981         if (!mcp_res)
3982                 return;
3983         MLX5_ASSERT(mcp_res->rix_flow);
3984         flow_list_destroy(dev, NULL, mcp_res->rix_flow);
3985         mlx5_hlist_remove(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
3986         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
3987 }
3988
3989 /**
3990  * Add the default copy action in in RX_CP_TBL.
3991  *
3992  * @param dev
3993  *   Pointer to Ethernet device.
3994  * @param[out] error
3995  *   Perform verbose error reporting if not NULL.
3996  *
3997  * @return
3998  *   0 for success, negative value otherwise and rte_errno is set.
3999  */
4000 static int
4001 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
4002                                   struct rte_flow_error *error)
4003 {
4004         struct mlx5_priv *priv = dev->data->dev_private;
4005         struct mlx5_flow_mreg_copy_resource *mcp_res;
4006
4007         /* Check whether extensive metadata feature is engaged. */
4008         if (!priv->config.dv_flow_en ||
4009             priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4010             !mlx5_flow_ext_mreg_supported(dev) ||
4011             !priv->sh->dv_regc0_mask)
4012                 return 0;
4013         mcp_res = flow_mreg_add_copy_action(dev, MLX5_DEFAULT_COPY_ID, error);
4014         if (!mcp_res)
4015                 return -rte_errno;
4016         return 0;
4017 }
4018
4019 /**
4020  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4021  *
4022  * All the flow having Q/RSS action should be split by
4023  * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
4024  * performs the following,
4025  *   - CQE->flow_tag := reg_c[1] (MARK)
4026  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4027  * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
4028  * but there should be a flow per each MARK ID set by MARK action.
4029  *
4030  * For the aforementioned reason, if there's a MARK action in flow's action
4031  * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
4032  * the MARK ID to CQE's flow_tag like,
4033  *   - If reg_c[1] is mark_id,
4034  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4035  *
4036  * For SET_META action which stores value in reg_c[0], as the destination is
4037  * also a flow metadata register (reg_b), adding a default flow is enough. Zero
4038  * MARK ID means the default flow. The default flow looks like,
4039  *   - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4040  *
4041  * @param dev
4042  *   Pointer to Ethernet device.
4043  * @param flow
4044  *   Pointer to flow structure.
4045  * @param[in] actions
4046  *   Pointer to the list of actions.
4047  * @param[out] error
4048  *   Perform verbose error reporting if not NULL.
4049  *
4050  * @return
4051  *   0 on success, negative value otherwise and rte_errno is set.
4052  */
4053 static int
4054 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
4055                             struct rte_flow *flow,
4056                             const struct rte_flow_action *actions,
4057                             struct rte_flow_error *error)
4058 {
4059         struct mlx5_priv *priv = dev->data->dev_private;
4060         struct mlx5_dev_config *config = &priv->config;
4061         struct mlx5_flow_mreg_copy_resource *mcp_res;
4062         const struct rte_flow_action_mark *mark;
4063
4064         /* Check whether extensive metadata feature is engaged. */
4065         if (!config->dv_flow_en ||
4066             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4067             !mlx5_flow_ext_mreg_supported(dev) ||
4068             !priv->sh->dv_regc0_mask)
4069                 return 0;
4070         /* Find MARK action. */
4071         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4072                 switch (actions->type) {
4073                 case RTE_FLOW_ACTION_TYPE_FLAG:
4074                         mcp_res = flow_mreg_add_copy_action
4075                                 (dev, MLX5_FLOW_MARK_DEFAULT, error);
4076                         if (!mcp_res)
4077                                 return -rte_errno;
4078                         flow->rix_mreg_copy = mcp_res->idx;
4079                         if (dev->data->dev_started) {
4080                                 mcp_res->appcnt++;
4081                                 flow->copy_applied = 1;
4082                         }
4083                         return 0;
4084                 case RTE_FLOW_ACTION_TYPE_MARK:
4085                         mark = (const struct rte_flow_action_mark *)
4086                                 actions->conf;
4087                         mcp_res =
4088                                 flow_mreg_add_copy_action(dev, mark->id, error);
4089                         if (!mcp_res)
4090                                 return -rte_errno;
4091                         flow->rix_mreg_copy = mcp_res->idx;
4092                         if (dev->data->dev_started) {
4093                                 mcp_res->appcnt++;
4094                                 flow->copy_applied = 1;
4095                         }
4096                         return 0;
4097                 default:
4098                         break;
4099                 }
4100         }
4101         return 0;
4102 }
4103
4104 #define MLX5_MAX_SPLIT_ACTIONS 24
4105 #define MLX5_MAX_SPLIT_ITEMS 24
4106
4107 /**
4108  * Split the hairpin flow.
4109  * Since HW can't support encap and push-vlan on Rx, we move these
4110  * actions to Tx.
4111  * If the count action is after the encap then we also
4112  * move the count action. in this case the count will also measure
4113  * the outer bytes.
4114  *
4115  * @param dev
4116  *   Pointer to Ethernet device.
4117  * @param[in] actions
4118  *   Associated actions (list terminated by the END action).
4119  * @param[out] actions_rx
4120  *   Rx flow actions.
4121  * @param[out] actions_tx
4122  *   Tx flow actions..
4123  * @param[out] pattern_tx
4124  *   The pattern items for the Tx flow.
4125  * @param[out] flow_id
4126  *   The flow ID connected to this flow.
4127  *
4128  * @return
4129  *   0 on success.
4130  */
4131 static int
4132 flow_hairpin_split(struct rte_eth_dev *dev,
4133                    const struct rte_flow_action actions[],
4134                    struct rte_flow_action actions_rx[],
4135                    struct rte_flow_action actions_tx[],
4136                    struct rte_flow_item pattern_tx[],
4137                    uint32_t *flow_id)
4138 {
4139         struct mlx5_priv *priv = dev->data->dev_private;
4140         const struct rte_flow_action_raw_encap *raw_encap;
4141         const struct rte_flow_action_raw_decap *raw_decap;
4142         struct mlx5_rte_flow_action_set_tag *set_tag;
4143         struct rte_flow_action *tag_action;
4144         struct mlx5_rte_flow_item_tag *tag_item;
4145         struct rte_flow_item *item;
4146         char *addr;
4147         int encap = 0;
4148
4149         mlx5_flow_id_get(priv->sh->flow_id_pool, flow_id);
4150         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4151                 switch (actions->type) {
4152                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4153                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4154                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4155                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4156                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4157                         rte_memcpy(actions_tx, actions,
4158                                sizeof(struct rte_flow_action));
4159                         actions_tx++;
4160                         break;
4161                 case RTE_FLOW_ACTION_TYPE_COUNT:
4162                         if (encap) {
4163                                 rte_memcpy(actions_tx, actions,
4164                                            sizeof(struct rte_flow_action));
4165                                 actions_tx++;
4166                         } else {
4167                                 rte_memcpy(actions_rx, actions,
4168                                            sizeof(struct rte_flow_action));
4169                                 actions_rx++;
4170                         }
4171                         break;
4172                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4173                         raw_encap = actions->conf;
4174                         if (raw_encap->size >
4175                             (sizeof(struct rte_flow_item_eth) +
4176                              sizeof(struct rte_flow_item_ipv4))) {
4177                                 memcpy(actions_tx, actions,
4178                                        sizeof(struct rte_flow_action));
4179                                 actions_tx++;
4180                                 encap = 1;
4181                         } else {
4182                                 rte_memcpy(actions_rx, actions,
4183                                            sizeof(struct rte_flow_action));
4184                                 actions_rx++;
4185                         }
4186                         break;
4187                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4188                         raw_decap = actions->conf;
4189                         if (raw_decap->size <
4190                             (sizeof(struct rte_flow_item_eth) +
4191                              sizeof(struct rte_flow_item_ipv4))) {
4192                                 memcpy(actions_tx, actions,
4193                                        sizeof(struct rte_flow_action));
4194                                 actions_tx++;
4195                         } else {
4196                                 rte_memcpy(actions_rx, actions,
4197                                            sizeof(struct rte_flow_action));
4198                                 actions_rx++;
4199                         }
4200                         break;
4201                 default:
4202                         rte_memcpy(actions_rx, actions,
4203                                    sizeof(struct rte_flow_action));
4204                         actions_rx++;
4205                         break;
4206                 }
4207         }
4208         /* Add set meta action and end action for the Rx flow. */
4209         tag_action = actions_rx;
4210         tag_action->type = (enum rte_flow_action_type)
4211                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4212         actions_rx++;
4213         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
4214         actions_rx++;
4215         set_tag = (void *)actions_rx;
4216         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL);
4217         MLX5_ASSERT(set_tag->id > REG_NON);
4218         set_tag->data = *flow_id;
4219         tag_action->conf = set_tag;
4220         /* Create Tx item list. */
4221         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
4222         addr = (void *)&pattern_tx[2];
4223         item = pattern_tx;
4224         item->type = (enum rte_flow_item_type)
4225                      MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4226         tag_item = (void *)addr;
4227         tag_item->data = *flow_id;
4228         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
4229         MLX5_ASSERT(set_tag->id > REG_NON);
4230         item->spec = tag_item;
4231         addr += sizeof(struct mlx5_rte_flow_item_tag);
4232         tag_item = (void *)addr;
4233         tag_item->data = UINT32_MAX;
4234         tag_item->id = UINT16_MAX;
4235         item->mask = tag_item;
4236         item->last = NULL;
4237         item++;
4238         item->type = RTE_FLOW_ITEM_TYPE_END;
4239         return 0;
4240 }
4241
4242 __extension__
4243 union tunnel_offload_mark {
4244         uint32_t val;
4245         struct {
4246                 uint32_t app_reserve:8;
4247                 uint32_t table_id:15;
4248                 uint32_t transfer:1;
4249                 uint32_t _unused_:8;
4250         };
4251 };
4252
4253 struct tunnel_default_miss_ctx {
4254         uint16_t *queue;
4255         __extension__
4256         union {
4257                 struct rte_flow_action_rss action_rss;
4258                 struct rte_flow_action_queue miss_queue;
4259                 struct rte_flow_action_jump miss_jump;
4260                 uint8_t raw[0];
4261         };
4262 };
4263
4264 static int
4265 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
4266                              struct rte_flow *flow,
4267                              const struct rte_flow_attr *attr,
4268                              const struct rte_flow_action *app_actions,
4269                              uint32_t flow_idx,
4270                              struct tunnel_default_miss_ctx *ctx,
4271                              struct rte_flow_error *error)
4272 {
4273         struct mlx5_priv *priv = dev->data->dev_private;
4274         struct mlx5_flow *dev_flow;
4275         struct rte_flow_attr miss_attr = *attr;
4276         const struct mlx5_flow_tunnel *tunnel = app_actions[0].conf;
4277         const struct rte_flow_item miss_items[2] = {
4278                 {
4279                         .type = RTE_FLOW_ITEM_TYPE_ETH,
4280                         .spec = NULL,
4281                         .last = NULL,
4282                         .mask = NULL
4283                 },
4284                 {
4285                         .type = RTE_FLOW_ITEM_TYPE_END,
4286                         .spec = NULL,
4287                         .last = NULL,
4288                         .mask = NULL
4289                 }
4290         };
4291         union tunnel_offload_mark mark_id;
4292         struct rte_flow_action_mark miss_mark;
4293         struct rte_flow_action miss_actions[3] = {
4294                 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark },
4295                 [2] = { .type = RTE_FLOW_ACTION_TYPE_END,  .conf = NULL }
4296         };
4297         const struct rte_flow_action_jump *jump_data;
4298         uint32_t i, flow_table = 0; /* prevent compilation warning */
4299         struct flow_grp_info grp_info = {
4300                 .external = 1,
4301                 .transfer = attr->transfer,
4302                 .fdb_def_rule = !!priv->fdb_def_rule,
4303                 .std_tbl_fix = 0,
4304         };
4305         int ret;
4306
4307         if (!attr->transfer) {
4308                 uint32_t q_size;
4309
4310                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS;
4311                 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]);
4312                 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size,
4313                                          0, SOCKET_ID_ANY);
4314                 if (!ctx->queue)
4315                         return rte_flow_error_set
4316                                 (error, ENOMEM,
4317                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4318                                 NULL, "invalid default miss RSS");
4319                 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT,
4320                 ctx->action_rss.level = 0,
4321                 ctx->action_rss.types = priv->rss_conf.rss_hf,
4322                 ctx->action_rss.key_len = priv->rss_conf.rss_key_len,
4323                 ctx->action_rss.queue_num = priv->reta_idx_n,
4324                 ctx->action_rss.key = priv->rss_conf.rss_key,
4325                 ctx->action_rss.queue = ctx->queue;
4326                 if (!priv->reta_idx_n || !priv->rxqs_n)
4327                         return rte_flow_error_set
4328                                 (error, EINVAL,
4329                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4330                                 NULL, "invalid port configuration");
4331                 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
4332                         ctx->action_rss.types = 0;
4333                 for (i = 0; i != priv->reta_idx_n; ++i)
4334                         ctx->queue[i] = (*priv->reta_idx)[i];
4335         } else {
4336                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP;
4337                 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP;
4338         }
4339         miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw;
4340         for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++);
4341         jump_data = app_actions->conf;
4342         miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY;
4343         miss_attr.group = jump_data->group;
4344         ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group,
4345                                        &flow_table, grp_info, error);
4346         if (ret)
4347                 return rte_flow_error_set(error, EINVAL,
4348                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4349                                           NULL, "invalid tunnel id");
4350         mark_id.app_reserve = 0;
4351         mark_id.table_id = tunnel_flow_tbl_to_id(flow_table);
4352         mark_id.transfer = !!attr->transfer;
4353         mark_id._unused_ = 0;
4354         miss_mark.id = mark_id.val;
4355         dev_flow = flow_drv_prepare(dev, flow, &miss_attr,
4356                                     miss_items, miss_actions, flow_idx, error);
4357         if (!dev_flow)
4358                 return -rte_errno;
4359         dev_flow->flow = flow;
4360         dev_flow->external = true;
4361         dev_flow->tunnel = tunnel;
4362         /* Subflow object was created, we must include one in the list. */
4363         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4364                       dev_flow->handle, next);
4365         DRV_LOG(DEBUG,
4366                 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u",
4367                 dev->data->port_id, tunnel->app_tunnel.type,
4368                 tunnel->tunnel_id, miss_attr.priority, miss_attr.group);
4369         ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items,
4370                                   miss_actions, error);
4371         if (!ret)
4372                 ret = flow_mreg_update_copy_table(dev, flow, miss_actions,
4373                                                   error);
4374
4375         return ret;
4376 }
4377
4378 /**
4379  * The last stage of splitting chain, just creates the subflow
4380  * without any modification.
4381  *
4382  * @param[in] dev
4383  *   Pointer to Ethernet device.
4384  * @param[in] flow
4385  *   Parent flow structure pointer.
4386  * @param[in, out] sub_flow
4387  *   Pointer to return the created subflow, may be NULL.
4388  * @param[in] prefix_layers
4389  *   Prefix subflow layers, may be 0.
4390  * @param[in] prefix_mark
4391  *   Prefix subflow mark flag, may be 0.
4392  * @param[in] attr
4393  *   Flow rule attributes.
4394  * @param[in] items
4395  *   Pattern specification (list terminated by the END pattern item).
4396  * @param[in] actions
4397  *   Associated actions (list terminated by the END action).
4398  * @param[in] external
4399  *   This flow rule is created by request external to PMD.
4400  * @param[in] flow_idx
4401  *   This memory pool index to the flow.
4402  * @param[out] error
4403  *   Perform verbose error reporting if not NULL.
4404  * @return
4405  *   0 on success, negative value otherwise
4406  */
4407 static int
4408 flow_create_split_inner(struct rte_eth_dev *dev,
4409                         struct rte_flow *flow,
4410                         struct mlx5_flow **sub_flow,
4411                         uint64_t prefix_layers,
4412                         uint32_t prefix_mark,
4413                         const struct rte_flow_attr *attr,
4414                         const struct rte_flow_item items[],
4415                         const struct rte_flow_action actions[],
4416                         bool external, uint32_t flow_idx,
4417                         struct rte_flow_error *error)
4418 {
4419         struct mlx5_flow *dev_flow;
4420
4421         dev_flow = flow_drv_prepare(dev, flow, attr, items, actions,
4422                 flow_idx, error);
4423         if (!dev_flow)
4424                 return -rte_errno;
4425         dev_flow->flow = flow;
4426         dev_flow->external = external;
4427         /* Subflow object was created, we must include one in the list. */
4428         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4429                       dev_flow->handle, next);
4430         /*
4431          * If dev_flow is as one of the suffix flow, some actions in suffix
4432          * flow may need some user defined item layer flags, and pass the
4433          * Metadate rxq mark flag to suffix flow as well.
4434          */
4435         if (prefix_layers)
4436                 dev_flow->handle->layers = prefix_layers;
4437         if (prefix_mark)
4438                 dev_flow->handle->mark = 1;
4439         if (sub_flow)
4440                 *sub_flow = dev_flow;
4441         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
4442 }
4443
4444 /**
4445  * Split the meter flow.
4446  *
4447  * As meter flow will split to three sub flow, other than meter
4448  * action, the other actions make sense to only meter accepts
4449  * the packet. If it need to be dropped, no other additional
4450  * actions should be take.
4451  *
4452  * One kind of special action which decapsulates the L3 tunnel
4453  * header will be in the prefix sub flow, as not to take the
4454  * L3 tunnel header into account.
4455  *
4456  * @param dev
4457  *   Pointer to Ethernet device.
4458  * @param[in] items
4459  *   Pattern specification (list terminated by the END pattern item).
4460  * @param[out] sfx_items
4461  *   Suffix flow match items (list terminated by the END pattern item).
4462  * @param[in] actions
4463  *   Associated actions (list terminated by the END action).
4464  * @param[out] actions_sfx
4465  *   Suffix flow actions.
4466  * @param[out] actions_pre
4467  *   Prefix flow actions.
4468  * @param[out] pattern_sfx
4469  *   The pattern items for the suffix flow.
4470  * @param[out] tag_sfx
4471  *   Pointer to suffix flow tag.
4472  *
4473  * @return
4474  *   0 on success.
4475  */
4476 static int
4477 flow_meter_split_prep(struct rte_eth_dev *dev,
4478                  const struct rte_flow_item items[],
4479                  struct rte_flow_item sfx_items[],
4480                  const struct rte_flow_action actions[],
4481                  struct rte_flow_action actions_sfx[],
4482                  struct rte_flow_action actions_pre[])
4483 {
4484         struct rte_flow_action *tag_action = NULL;
4485         struct rte_flow_item *tag_item;
4486         struct mlx5_rte_flow_action_set_tag *set_tag;
4487         struct rte_flow_error error;
4488         const struct rte_flow_action_raw_encap *raw_encap;
4489         const struct rte_flow_action_raw_decap *raw_decap;
4490         struct mlx5_rte_flow_item_tag *tag_spec;
4491         struct mlx5_rte_flow_item_tag *tag_mask;
4492         uint32_t tag_id;
4493         bool copy_vlan = false;
4494
4495         /* Prepare the actions for prefix and suffix flow. */
4496         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4497                 struct rte_flow_action **action_cur = NULL;
4498
4499                 switch (actions->type) {
4500                 case RTE_FLOW_ACTION_TYPE_METER:
4501                         /* Add the extra tag action first. */
4502                         tag_action = actions_pre;
4503                         tag_action->type = (enum rte_flow_action_type)
4504                                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4505                         actions_pre++;
4506                         action_cur = &actions_pre;
4507                         break;
4508                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4509                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4510                         action_cur = &actions_pre;
4511                         break;
4512                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4513                         raw_encap = actions->conf;
4514                         if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
4515                                 action_cur = &actions_pre;
4516                         break;
4517                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4518                         raw_decap = actions->conf;
4519                         if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4520                                 action_cur = &actions_pre;
4521                         break;
4522                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4523                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4524                         copy_vlan = true;
4525                         break;
4526                 default:
4527                         break;
4528                 }
4529                 if (!action_cur)
4530                         action_cur = &actions_sfx;
4531                 memcpy(*action_cur, actions, sizeof(struct rte_flow_action));
4532                 (*action_cur)++;
4533         }
4534         /* Add end action to the actions. */
4535         actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
4536         actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
4537         actions_pre++;
4538         /* Set the tag. */
4539         set_tag = (void *)actions_pre;
4540         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
4541         /*
4542          * Get the id from the qrss_pool to make qrss share the id with meter.
4543          */
4544         tag_id = flow_qrss_get_id(dev);
4545         set_tag->data = tag_id << MLX5_MTR_COLOR_BITS;
4546         assert(tag_action);
4547         tag_action->conf = set_tag;
4548         /* Prepare the suffix subflow items. */
4549         tag_item = sfx_items++;
4550         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4551                 int item_type = items->type;
4552
4553                 switch (item_type) {
4554                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4555                         memcpy(sfx_items, items, sizeof(*sfx_items));
4556                         sfx_items++;
4557                         break;
4558                 case RTE_FLOW_ITEM_TYPE_VLAN:
4559                         if (copy_vlan) {
4560                                 memcpy(sfx_items, items, sizeof(*sfx_items));
4561                                 /*
4562                                  * Convert to internal match item, it is used
4563                                  * for vlan push and set vid.
4564                                  */
4565                                 sfx_items->type = (enum rte_flow_item_type)
4566                                                   MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
4567                                 sfx_items++;
4568                         }
4569                         break;
4570                 default:
4571                         break;
4572                 }
4573         }
4574         sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
4575         sfx_items++;
4576         tag_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
4577         tag_spec->data = tag_id << MLX5_MTR_COLOR_BITS;
4578         tag_spec->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
4579         tag_mask = tag_spec + 1;
4580         tag_mask->data = 0xffffff00;
4581         tag_item->type = (enum rte_flow_item_type)
4582                          MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4583         tag_item->spec = tag_spec;
4584         tag_item->last = NULL;
4585         tag_item->mask = tag_mask;
4586         return tag_id;
4587 }
4588
4589 /**
4590  * Split action list having QUEUE/RSS for metadata register copy.
4591  *
4592  * Once Q/RSS action is detected in user's action list, the flow action
4593  * should be split in order to copy metadata registers, which will happen in
4594  * RX_CP_TBL like,
4595  *   - CQE->flow_tag := reg_c[1] (MARK)
4596  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4597  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
4598  * This is because the last action of each flow must be a terminal action
4599  * (QUEUE, RSS or DROP).
4600  *
4601  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
4602  * stored and kept in the mlx5_flow structure per each sub_flow.
4603  *
4604  * The Q/RSS action is replaced with,
4605  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
4606  * And the following JUMP action is added at the end,
4607  *   - JUMP, to RX_CP_TBL.
4608  *
4609  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
4610  * flow_create_split_metadata() routine. The flow will look like,
4611  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
4612  *
4613  * @param dev
4614  *   Pointer to Ethernet device.
4615  * @param[out] split_actions
4616  *   Pointer to store split actions to jump to CP_TBL.
4617  * @param[in] actions
4618  *   Pointer to the list of original flow actions.
4619  * @param[in] qrss
4620  *   Pointer to the Q/RSS action.
4621  * @param[in] actions_n
4622  *   Number of original actions.
4623  * @param[out] error
4624  *   Perform verbose error reporting if not NULL.
4625  *
4626  * @return
4627  *   non-zero unique flow_id on success, otherwise 0 and
4628  *   error/rte_error are set.
4629  */
4630 static uint32_t
4631 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
4632                           struct rte_flow_action *split_actions,
4633                           const struct rte_flow_action *actions,
4634                           const struct rte_flow_action *qrss,
4635                           int actions_n, struct rte_flow_error *error)
4636 {
4637         struct mlx5_rte_flow_action_set_tag *set_tag;
4638         struct rte_flow_action_jump *jump;
4639         const int qrss_idx = qrss - actions;
4640         uint32_t flow_id = 0;
4641         int ret = 0;
4642
4643         /*
4644          * Given actions will be split
4645          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
4646          * - Add jump to mreg CP_TBL.
4647          * As a result, there will be one more action.
4648          */
4649         ++actions_n;
4650         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
4651         set_tag = (void *)(split_actions + actions_n);
4652         /*
4653          * If tag action is not set to void(it means we are not the meter
4654          * suffix flow), add the tag action. Since meter suffix flow already
4655          * has the tag added.
4656          */
4657         if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) {
4658                 /*
4659                  * Allocate the new subflow ID. This one is unique within
4660                  * device and not shared with representors. Otherwise,
4661                  * we would have to resolve multi-thread access synch
4662                  * issue. Each flow on the shared device is appended
4663                  * with source vport identifier, so the resulting
4664                  * flows will be unique in the shared (by master and
4665                  * representors) domain even if they have coinciding
4666                  * IDs.
4667                  */
4668                 flow_id = flow_qrss_get_id(dev);
4669                 if (!flow_id)
4670                         return rte_flow_error_set(error, ENOMEM,
4671                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4672                                                   NULL, "can't allocate id "
4673                                                   "for split Q/RSS subflow");
4674                 /* Internal SET_TAG action to set flow ID. */
4675                 *set_tag = (struct mlx5_rte_flow_action_set_tag){
4676                         .data = flow_id,
4677                 };
4678                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
4679                 if (ret < 0)
4680                         return ret;
4681                 set_tag->id = ret;
4682                 /* Construct new actions array. */
4683                 /* Replace QUEUE/RSS action. */
4684                 split_actions[qrss_idx] = (struct rte_flow_action){
4685                         .type = (enum rte_flow_action_type)
4686                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
4687                         .conf = set_tag,
4688                 };
4689         }
4690         /* JUMP action to jump to mreg copy table (CP_TBL). */
4691         jump = (void *)(set_tag + 1);
4692         *jump = (struct rte_flow_action_jump){
4693                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
4694         };
4695         split_actions[actions_n - 2] = (struct rte_flow_action){
4696                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
4697                 .conf = jump,
4698         };
4699         split_actions[actions_n - 1] = (struct rte_flow_action){
4700                 .type = RTE_FLOW_ACTION_TYPE_END,
4701         };
4702         return flow_id;
4703 }
4704
4705 /**
4706  * Extend the given action list for Tx metadata copy.
4707  *
4708  * Copy the given action list to the ext_actions and add flow metadata register
4709  * copy action in order to copy reg_a set by WQE to reg_c[0].
4710  *
4711  * @param[out] ext_actions
4712  *   Pointer to the extended action list.
4713  * @param[in] actions
4714  *   Pointer to the list of actions.
4715  * @param[in] actions_n
4716  *   Number of actions in the list.
4717  * @param[out] error
4718  *   Perform verbose error reporting if not NULL.
4719  * @param[in] encap_idx
4720  *   The encap action inndex.
4721  *
4722  * @return
4723  *   0 on success, negative value otherwise
4724  */
4725 static int
4726 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
4727                        struct rte_flow_action *ext_actions,
4728                        const struct rte_flow_action *actions,
4729                        int actions_n, struct rte_flow_error *error,
4730                        int encap_idx)
4731 {
4732         struct mlx5_flow_action_copy_mreg *cp_mreg =
4733                 (struct mlx5_flow_action_copy_mreg *)
4734                         (ext_actions + actions_n + 1);
4735         int ret;
4736
4737         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
4738         if (ret < 0)
4739                 return ret;
4740         cp_mreg->dst = ret;
4741         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
4742         if (ret < 0)
4743                 return ret;
4744         cp_mreg->src = ret;
4745         if (encap_idx != 0)
4746                 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
4747         if (encap_idx == actions_n - 1) {
4748                 ext_actions[actions_n - 1] = (struct rte_flow_action){
4749                         .type = (enum rte_flow_action_type)
4750                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4751                         .conf = cp_mreg,
4752                 };
4753                 ext_actions[actions_n] = (struct rte_flow_action){
4754                         .type = RTE_FLOW_ACTION_TYPE_END,
4755                 };
4756         } else {
4757                 ext_actions[encap_idx] = (struct rte_flow_action){
4758                         .type = (enum rte_flow_action_type)
4759                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4760                         .conf = cp_mreg,
4761                 };
4762                 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
4763                                 sizeof(*ext_actions) * (actions_n - encap_idx));
4764         }
4765         return 0;
4766 }
4767
4768 /**
4769  * Check the match action from the action list.
4770  *
4771  * @param[in] actions
4772  *   Pointer to the list of actions.
4773  * @param[in] attr
4774  *   Flow rule attributes.
4775  * @param[in] action
4776  *   The action to be check if exist.
4777  * @param[out] match_action_pos
4778  *   Pointer to the position of the matched action if exists, otherwise is -1.
4779  * @param[out] qrss_action_pos
4780  *   Pointer to the position of the Queue/RSS action if exists, otherwise is -1.
4781  *
4782  * @return
4783  *   > 0 the total number of actions.
4784  *   0 if not found match action in action list.
4785  */
4786 static int
4787 flow_check_match_action(const struct rte_flow_action actions[],
4788                         const struct rte_flow_attr *attr,
4789                         enum rte_flow_action_type action,
4790                         int *match_action_pos, int *qrss_action_pos)
4791 {
4792         const struct rte_flow_action_sample *sample;
4793         int actions_n = 0;
4794         int jump_flag = 0;
4795         uint32_t ratio = 0;
4796         int sub_type = 0;
4797         int flag = 0;
4798
4799         *match_action_pos = -1;
4800         *qrss_action_pos = -1;
4801         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4802                 if (actions->type == action) {
4803                         flag = 1;
4804                         *match_action_pos = actions_n;
4805                 }
4806                 if (actions->type == RTE_FLOW_ACTION_TYPE_QUEUE ||
4807                     actions->type == RTE_FLOW_ACTION_TYPE_RSS)
4808                         *qrss_action_pos = actions_n;
4809                 if (actions->type == RTE_FLOW_ACTION_TYPE_JUMP)
4810                         jump_flag = 1;
4811                 if (actions->type == RTE_FLOW_ACTION_TYPE_SAMPLE) {
4812                         sample = actions->conf;
4813                         ratio = sample->ratio;
4814                         sub_type = ((const struct rte_flow_action *)
4815                                         (sample->actions))->type;
4816                 }
4817                 actions_n++;
4818         }
4819         if (flag && action == RTE_FLOW_ACTION_TYPE_SAMPLE && attr->transfer) {
4820                 if (ratio == 1) {
4821                         /* JUMP Action not support for Mirroring;
4822                          * Mirroring support multi-destination;
4823                          */
4824                         if (!jump_flag && sub_type != RTE_FLOW_ACTION_TYPE_END)
4825                                 flag = 0;
4826                 }
4827         }
4828         /* Count RTE_FLOW_ACTION_TYPE_END. */
4829         return flag ? actions_n + 1 : 0;
4830 }
4831
4832 #define SAMPLE_SUFFIX_ITEM 2
4833
4834 /**
4835  * Split the sample flow.
4836  *
4837  * As sample flow will split to two sub flow, sample flow with
4838  * sample action, the other actions will move to new suffix flow.
4839  *
4840  * Also add unique tag id with tag action in the sample flow,
4841  * the same tag id will be as match in the suffix flow.
4842  *
4843  * @param dev
4844  *   Pointer to Ethernet device.
4845  * @param[in] fdb_tx
4846  *   FDB egress flow flag.
4847  * @param[out] sfx_items
4848  *   Suffix flow match items (list terminated by the END pattern item).
4849  * @param[in] actions
4850  *   Associated actions (list terminated by the END action).
4851  * @param[out] actions_sfx
4852  *   Suffix flow actions.
4853  * @param[out] actions_pre
4854  *   Prefix flow actions.
4855  * @param[in] actions_n
4856  *  The total number of actions.
4857  * @param[in] sample_action_pos
4858  *   The sample action position.
4859  * @param[in] qrss_action_pos
4860  *   The Queue/RSS action position.
4861  * @param[out] error
4862  *   Perform verbose error reporting if not NULL.
4863  *
4864  * @return
4865  *   0 on success, or unique flow_id, a negative errno value
4866  *   otherwise and rte_errno is set.
4867  */
4868 static int
4869 flow_sample_split_prep(struct rte_eth_dev *dev,
4870                        uint32_t fdb_tx,
4871                        struct rte_flow_item sfx_items[],
4872                        const struct rte_flow_action actions[],
4873                        struct rte_flow_action actions_sfx[],
4874                        struct rte_flow_action actions_pre[],
4875                        int actions_n,
4876                        int sample_action_pos,
4877                        int qrss_action_pos,
4878                        struct rte_flow_error *error)
4879 {
4880         struct mlx5_rte_flow_action_set_tag *set_tag;
4881         struct mlx5_rte_flow_item_tag *tag_spec;
4882         struct mlx5_rte_flow_item_tag *tag_mask;
4883         uint32_t tag_id = 0;
4884         int index;
4885         int ret;
4886
4887         if (sample_action_pos < 0)
4888                 return rte_flow_error_set(error, EINVAL,
4889                                           RTE_FLOW_ERROR_TYPE_ACTION,
4890                                           NULL, "invalid position of sample "
4891                                           "action in list");
4892         if (!fdb_tx) {
4893                 /* Prepare the prefix tag action. */
4894                 set_tag = (void *)(actions_pre + actions_n + 1);
4895                 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error);
4896                 if (ret < 0)
4897                         return ret;
4898                 set_tag->id = ret;
4899                 tag_id = flow_qrss_get_id(dev);
4900                 set_tag->data = tag_id;
4901                 /* Prepare the suffix subflow items. */
4902                 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM);
4903                 tag_spec->data = tag_id;
4904                 tag_spec->id = set_tag->id;
4905                 tag_mask = tag_spec + 1;
4906                 tag_mask->data = UINT32_MAX;
4907                 sfx_items[0] = (struct rte_flow_item){
4908                         .type = (enum rte_flow_item_type)
4909                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
4910                         .spec = tag_spec,
4911                         .last = NULL,
4912                         .mask = tag_mask,
4913                 };
4914                 sfx_items[1] = (struct rte_flow_item){
4915                         .type = (enum rte_flow_item_type)
4916                                 RTE_FLOW_ITEM_TYPE_END,
4917                 };
4918         }
4919         /* Prepare the actions for prefix and suffix flow. */
4920         if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) {
4921                 index = qrss_action_pos;
4922                 /* Put the preceding the Queue/RSS action into prefix flow. */
4923                 if (index != 0)
4924                         memcpy(actions_pre, actions,
4925                                sizeof(struct rte_flow_action) * index);
4926                 /* Put others preceding the sample action into prefix flow. */
4927                 if (sample_action_pos > index + 1)
4928                         memcpy(actions_pre + index, actions + index + 1,
4929                                sizeof(struct rte_flow_action) *
4930                                (sample_action_pos - index - 1));
4931                 index = sample_action_pos - 1;
4932                 /* Put Queue/RSS action into Suffix flow. */
4933                 memcpy(actions_sfx, actions + qrss_action_pos,
4934                        sizeof(struct rte_flow_action));
4935                 actions_sfx++;
4936         } else {
4937                 index = sample_action_pos;
4938                 if (index != 0)
4939                         memcpy(actions_pre, actions,
4940                                sizeof(struct rte_flow_action) * index);
4941         }
4942         /* Add the extra tag action for NIC-RX and E-Switch ingress. */
4943         if (!fdb_tx) {
4944                 actions_pre[index++] =
4945                         (struct rte_flow_action){
4946                         .type = (enum rte_flow_action_type)
4947                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
4948                         .conf = set_tag,
4949                 };
4950         }
4951         memcpy(actions_pre + index, actions + sample_action_pos,
4952                sizeof(struct rte_flow_action));
4953         index += 1;
4954         actions_pre[index] = (struct rte_flow_action){
4955                 .type = (enum rte_flow_action_type)
4956                         RTE_FLOW_ACTION_TYPE_END,
4957         };
4958         /* Put the actions after sample into Suffix flow. */
4959         memcpy(actions_sfx, actions + sample_action_pos + 1,
4960                sizeof(struct rte_flow_action) *
4961                (actions_n - sample_action_pos - 1));
4962         return tag_id;
4963 }
4964
4965 /**
4966  * The splitting for metadata feature.
4967  *
4968  * - Q/RSS action on NIC Rx should be split in order to pass by
4969  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
4970  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
4971  *
4972  * - All the actions on NIC Tx should have a mreg copy action to
4973  *   copy reg_a from WQE to reg_c[0].
4974  *
4975  * @param dev
4976  *   Pointer to Ethernet device.
4977  * @param[in] flow
4978  *   Parent flow structure pointer.
4979  * @param[in] prefix_layers
4980  *   Prefix flow layer flags.
4981  * @param[in] prefix_mark
4982  *   Prefix subflow mark flag, may be 0.
4983  * @param[in] attr
4984  *   Flow rule attributes.
4985  * @param[in] items
4986  *   Pattern specification (list terminated by the END pattern item).
4987  * @param[in] actions
4988  *   Associated actions (list terminated by the END action).
4989  * @param[in] external
4990  *   This flow rule is created by request external to PMD.
4991  * @param[in] flow_idx
4992  *   This memory pool index to the flow.
4993  * @param[out] error
4994  *   Perform verbose error reporting if not NULL.
4995  * @return
4996  *   0 on success, negative value otherwise
4997  */
4998 static int
4999 flow_create_split_metadata(struct rte_eth_dev *dev,
5000                            struct rte_flow *flow,
5001                            uint64_t prefix_layers,
5002                            uint32_t prefix_mark,
5003                            const struct rte_flow_attr *attr,
5004                            const struct rte_flow_item items[],
5005                            const struct rte_flow_action actions[],
5006                            bool external, uint32_t flow_idx,
5007                            struct rte_flow_error *error)
5008 {
5009         struct mlx5_priv *priv = dev->data->dev_private;
5010         struct mlx5_dev_config *config = &priv->config;
5011         const struct rte_flow_action *qrss = NULL;
5012         struct rte_flow_action *ext_actions = NULL;
5013         struct mlx5_flow *dev_flow = NULL;
5014         uint32_t qrss_id = 0;
5015         int mtr_sfx = 0;
5016         size_t act_size;
5017         int actions_n;
5018         int encap_idx;
5019         int ret;
5020
5021         /* Check whether extensive metadata feature is engaged. */
5022         if (!config->dv_flow_en ||
5023             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
5024             !mlx5_flow_ext_mreg_supported(dev))
5025                 return flow_create_split_inner(dev, flow, NULL, prefix_layers,
5026                                                prefix_mark, attr, items,
5027                                                actions, external, flow_idx,
5028                                                error);
5029         actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
5030                                                            &encap_idx);
5031         if (qrss) {
5032                 /* Exclude hairpin flows from splitting. */
5033                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
5034                         const struct rte_flow_action_queue *queue;
5035
5036                         queue = qrss->conf;
5037                         if (mlx5_rxq_get_type(dev, queue->index) ==
5038                             MLX5_RXQ_TYPE_HAIRPIN)
5039                                 qrss = NULL;
5040                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
5041                         const struct rte_flow_action_rss *rss;
5042
5043                         rss = qrss->conf;
5044                         if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
5045                             MLX5_RXQ_TYPE_HAIRPIN)
5046                                 qrss = NULL;
5047                 }
5048         }
5049         if (qrss) {
5050                 /* Check if it is in meter suffix table. */
5051                 mtr_sfx = attr->group == (attr->transfer ?
5052                           (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
5053                           MLX5_FLOW_TABLE_LEVEL_SUFFIX);
5054                 /*
5055                  * Q/RSS action on NIC Rx should be split in order to pass by
5056                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
5057                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
5058                  */
5059                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5060                            sizeof(struct rte_flow_action_set_tag) +
5061                            sizeof(struct rte_flow_action_jump);
5062                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5063                                           SOCKET_ID_ANY);
5064                 if (!ext_actions)
5065                         return rte_flow_error_set(error, ENOMEM,
5066                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5067                                                   NULL, "no memory to split "
5068                                                   "metadata flow");
5069                 /*
5070                  * If we are the suffix flow of meter, tag already exist.
5071                  * Set the tag action to void.
5072                  */
5073                 if (mtr_sfx)
5074                         ext_actions[qrss - actions].type =
5075                                                 RTE_FLOW_ACTION_TYPE_VOID;
5076                 else
5077                         ext_actions[qrss - actions].type =
5078                                                 (enum rte_flow_action_type)
5079                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5080                 /*
5081                  * Create the new actions list with removed Q/RSS action
5082                  * and appended set tag and jump to register copy table
5083                  * (RX_CP_TBL). We should preallocate unique tag ID here
5084                  * in advance, because it is needed for set tag action.
5085                  */
5086                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
5087                                                     qrss, actions_n, error);
5088                 if (!mtr_sfx && !qrss_id) {
5089                         ret = -rte_errno;
5090                         goto exit;
5091                 }
5092         } else if (attr->egress && !attr->transfer) {
5093                 /*
5094                  * All the actions on NIC Tx should have a metadata register
5095                  * copy action to copy reg_a from WQE to reg_c[meta]
5096                  */
5097                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5098                            sizeof(struct mlx5_flow_action_copy_mreg);
5099                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5100                                           SOCKET_ID_ANY);
5101                 if (!ext_actions)
5102                         return rte_flow_error_set(error, ENOMEM,
5103                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5104                                                   NULL, "no memory to split "
5105                                                   "metadata flow");
5106                 /* Create the action list appended with copy register. */
5107                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
5108                                              actions_n, error, encap_idx);
5109                 if (ret < 0)
5110                         goto exit;
5111         }
5112         /* Add the unmodified original or prefix subflow. */
5113         ret = flow_create_split_inner(dev, flow, &dev_flow, prefix_layers,
5114                                       prefix_mark, attr,
5115                                       items, ext_actions ? ext_actions :
5116                                       actions, external, flow_idx, error);
5117         if (ret < 0)
5118                 goto exit;
5119         MLX5_ASSERT(dev_flow);
5120         if (qrss) {
5121                 const struct rte_flow_attr q_attr = {
5122                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5123                         .ingress = 1,
5124                 };
5125                 /* Internal PMD action to set register. */
5126                 struct mlx5_rte_flow_item_tag q_tag_spec = {
5127                         .data = qrss_id,
5128                         .id = REG_NON,
5129                 };
5130                 struct rte_flow_item q_items[] = {
5131                         {
5132                                 .type = (enum rte_flow_item_type)
5133                                         MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5134                                 .spec = &q_tag_spec,
5135                                 .last = NULL,
5136                                 .mask = NULL,
5137                         },
5138                         {
5139                                 .type = RTE_FLOW_ITEM_TYPE_END,
5140                         },
5141                 };
5142                 struct rte_flow_action q_actions[] = {
5143                         {
5144                                 .type = qrss->type,
5145                                 .conf = qrss->conf,
5146                         },
5147                         {
5148                                 .type = RTE_FLOW_ACTION_TYPE_END,
5149                         },
5150                 };
5151                 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
5152
5153                 /*
5154                  * Configure the tag item only if there is no meter subflow.
5155                  * Since tag is already marked in the meter suffix subflow
5156                  * we can just use the meter suffix items as is.
5157                  */
5158                 if (qrss_id) {
5159                         /* Not meter subflow. */
5160                         MLX5_ASSERT(!mtr_sfx);
5161                         /*
5162                          * Put unique id in prefix flow due to it is destroyed
5163                          * after suffix flow and id will be freed after there
5164                          * is no actual flows with this id and identifier
5165                          * reallocation becomes possible (for example, for
5166                          * other flows in other threads).
5167                          */
5168                         dev_flow->handle->split_flow_id = qrss_id;
5169                         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
5170                                                    error);
5171                         if (ret < 0)
5172                                 goto exit;
5173                         q_tag_spec.id = ret;
5174                 }
5175                 dev_flow = NULL;
5176                 /* Add suffix subflow to execute Q/RSS. */
5177                 ret = flow_create_split_inner(dev, flow, &dev_flow, layers, 0,
5178                                               &q_attr, mtr_sfx ? items :
5179                                               q_items, q_actions,
5180                                               external, flow_idx, error);
5181                 if (ret < 0)
5182                         goto exit;
5183                 /* qrss ID should be freed if failed. */
5184                 qrss_id = 0;
5185                 MLX5_ASSERT(dev_flow);
5186         }
5187
5188 exit:
5189         /*
5190          * We do not destroy the partially created sub_flows in case of error.
5191          * These ones are included into parent flow list and will be destroyed
5192          * by flow_drv_destroy.
5193          */
5194         flow_qrss_free_id(dev, qrss_id);
5195         mlx5_free(ext_actions);
5196         return ret;
5197 }
5198
5199 /**
5200  * The splitting for meter feature.
5201  *
5202  * - The meter flow will be split to two flows as prefix and
5203  *   suffix flow. The packets make sense only it pass the prefix
5204  *   meter action.
5205  *
5206  * - Reg_C_5 is used for the packet to match betweend prefix and
5207  *   suffix flow.
5208  *
5209  * @param dev
5210  *   Pointer to Ethernet device.
5211  * @param[in] flow
5212  *   Parent flow structure pointer.
5213  * @param[in] prefix_layers
5214  *   Prefix subflow layers, may be 0.
5215  * @param[in] prefix_mark
5216  *   Prefix subflow mark flag, may be 0.
5217  * @param[in] attr
5218  *   Flow rule attributes.
5219  * @param[in] items
5220  *   Pattern specification (list terminated by the END pattern item).
5221  * @param[in] actions
5222  *   Associated actions (list terminated by the END action).
5223  * @param[in] external
5224  *   This flow rule is created by request external to PMD.
5225  * @param[in] flow_idx
5226  *   This memory pool index to the flow.
5227  * @param[out] error
5228  *   Perform verbose error reporting if not NULL.
5229  * @return
5230  *   0 on success, negative value otherwise
5231  */
5232 static int
5233 flow_create_split_meter(struct rte_eth_dev *dev,
5234                         struct rte_flow *flow,
5235                         uint64_t prefix_layers,
5236                         uint32_t prefix_mark,
5237                         const struct rte_flow_attr *attr,
5238                         const struct rte_flow_item items[],
5239                         const struct rte_flow_action actions[],
5240                         bool external, uint32_t flow_idx,
5241                         struct rte_flow_error *error)
5242 {
5243         struct mlx5_priv *priv = dev->data->dev_private;
5244         struct rte_flow_action *sfx_actions = NULL;
5245         struct rte_flow_action *pre_actions = NULL;
5246         struct rte_flow_item *sfx_items = NULL;
5247         struct mlx5_flow *dev_flow = NULL;
5248         struct rte_flow_attr sfx_attr = *attr;
5249         uint32_t mtr = 0;
5250         uint32_t mtr_tag_id = 0;
5251         size_t act_size;
5252         size_t item_size;
5253         int actions_n = 0;
5254         int ret;
5255
5256         if (priv->mtr_en)
5257                 actions_n = flow_check_meter_action(actions, &mtr);
5258         if (mtr) {
5259                 /* The five prefix actions: meter, decap, encap, tag, end. */
5260                 act_size = sizeof(struct rte_flow_action) * (actions_n + 5) +
5261                            sizeof(struct mlx5_rte_flow_action_set_tag);
5262                 /* tag, vlan, port id, end. */
5263 #define METER_SUFFIX_ITEM 4
5264                 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
5265                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
5266                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size),
5267                                           0, SOCKET_ID_ANY);
5268                 if (!sfx_actions)
5269                         return rte_flow_error_set(error, ENOMEM,
5270                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5271                                                   NULL, "no memory to split "
5272                                                   "meter flow");
5273                 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
5274                              act_size);
5275                 pre_actions = sfx_actions + actions_n;
5276                 mtr_tag_id = flow_meter_split_prep(dev, items, sfx_items,
5277                                                    actions, sfx_actions,
5278                                                    pre_actions);
5279                 if (!mtr_tag_id) {
5280                         ret = -rte_errno;
5281                         goto exit;
5282                 }
5283                 /* Add the prefix subflow. */
5284                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5285                                               prefix_layers, 0,
5286                                               attr, items,
5287                                               pre_actions, external,
5288                                               flow_idx, error);
5289                 if (ret) {
5290                         ret = -rte_errno;
5291                         goto exit;
5292                 }
5293                 dev_flow->handle->split_flow_id = mtr_tag_id;
5294                 /* Setting the sfx group atrr. */
5295                 sfx_attr.group = sfx_attr.transfer ?
5296                                 (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
5297                                  MLX5_FLOW_TABLE_LEVEL_SUFFIX;
5298         }
5299         /* Add the prefix subflow. */
5300         ret = flow_create_split_metadata(dev, flow, dev_flow ?
5301                                          flow_get_prefix_layer_flags(dev_flow) :
5302                                          prefix_layers, dev_flow ?
5303                                          dev_flow->handle->mark : prefix_mark,
5304                                          &sfx_attr, sfx_items ?
5305                                          sfx_items : items,
5306                                          sfx_actions ? sfx_actions : actions,
5307                                          external, flow_idx, error);
5308 exit:
5309         if (sfx_actions)
5310                 mlx5_free(sfx_actions);
5311         return ret;
5312 }
5313
5314 /**
5315  * The splitting for sample feature.
5316  *
5317  * Once Sample action is detected in the action list, the flow actions should
5318  * be split into prefix sub flow and suffix sub flow.
5319  *
5320  * The original items remain in the prefix sub flow, all actions preceding the
5321  * sample action and the sample action itself will be copied to the prefix
5322  * sub flow, the actions following the sample action will be copied to the
5323  * suffix sub flow, Queue action always be located in the suffix sub flow.
5324  *
5325  * In order to make the packet from prefix sub flow matches with suffix sub
5326  * flow, an extra tag action be added into prefix sub flow, and the suffix sub
5327  * flow uses tag item with the unique flow id.
5328  *
5329  * @param dev
5330  *   Pointer to Ethernet device.
5331  * @param[in] flow
5332  *   Parent flow structure pointer.
5333  * @param[in] attr
5334  *   Flow rule attributes.
5335  * @param[in] items
5336  *   Pattern specification (list terminated by the END pattern item).
5337  * @param[in] actions
5338  *   Associated actions (list terminated by the END action).
5339  * @param[in] external
5340  *   This flow rule is created by request external to PMD.
5341  * @param[in] flow_idx
5342  *   This memory pool index to the flow.
5343  * @param[out] error
5344  *   Perform verbose error reporting if not NULL.
5345  * @return
5346  *   0 on success, negative value otherwise
5347  */
5348 static int
5349 flow_create_split_sample(struct rte_eth_dev *dev,
5350                          struct rte_flow *flow,
5351                          const struct rte_flow_attr *attr,
5352                          const struct rte_flow_item items[],
5353                          const struct rte_flow_action actions[],
5354                          bool external, uint32_t flow_idx,
5355                          struct rte_flow_error *error)
5356 {
5357         struct mlx5_priv *priv = dev->data->dev_private;
5358         struct rte_flow_action *sfx_actions = NULL;
5359         struct rte_flow_action *pre_actions = NULL;
5360         struct rte_flow_item *sfx_items = NULL;
5361         struct mlx5_flow *dev_flow = NULL;
5362         struct rte_flow_attr sfx_attr = *attr;
5363 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5364         struct mlx5_flow_dv_sample_resource *sample_res;
5365         struct mlx5_flow_tbl_data_entry *sfx_tbl_data;
5366         struct mlx5_flow_tbl_resource *sfx_tbl;
5367         union mlx5_flow_tbl_key sfx_table_key;
5368 #endif
5369         size_t act_size;
5370         size_t item_size;
5371         uint32_t fdb_tx = 0;
5372         int32_t tag_id = 0;
5373         int actions_n = 0;
5374         int sample_action_pos;
5375         int qrss_action_pos;
5376         int ret = 0;
5377
5378         if (priv->sampler_en)
5379                 actions_n = flow_check_match_action(actions, attr,
5380                                         RTE_FLOW_ACTION_TYPE_SAMPLE,
5381                                         &sample_action_pos, &qrss_action_pos);
5382         if (actions_n) {
5383                 /* The prefix actions must includes sample, tag, end. */
5384                 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1)
5385                            + sizeof(struct mlx5_rte_flow_action_set_tag);
5386                 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM +
5387                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
5388                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size +
5389                                           item_size), 0, SOCKET_ID_ANY);
5390                 if (!sfx_actions)
5391                         return rte_flow_error_set(error, ENOMEM,
5392                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5393                                                   NULL, "no memory to split "
5394                                                   "sample flow");
5395                 /* The representor_id is -1 for uplink. */
5396                 fdb_tx = (attr->transfer && priv->representor_id != -1);
5397                 if (!fdb_tx)
5398                         sfx_items = (struct rte_flow_item *)((char *)sfx_actions
5399                                         + act_size);
5400                 pre_actions = sfx_actions + actions_n;
5401                 tag_id = flow_sample_split_prep(dev, fdb_tx, sfx_items,
5402                                                 actions, sfx_actions,
5403                                                 pre_actions, actions_n,
5404                                                 sample_action_pos,
5405                                                 qrss_action_pos, error);
5406                 if (tag_id < 0 || (!fdb_tx && !tag_id)) {
5407                         ret = -rte_errno;
5408                         goto exit;
5409                 }
5410                 /* Add the prefix subflow. */
5411                 ret = flow_create_split_inner(dev, flow, &dev_flow, 0, 0, attr,
5412                                               items, pre_actions, external,
5413                                               flow_idx, error);
5414                 if (ret) {
5415                         ret = -rte_errno;
5416                         goto exit;
5417                 }
5418                 dev_flow->handle->split_flow_id = tag_id;
5419 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5420                 /* Set the sfx group attr. */
5421                 sample_res = (struct mlx5_flow_dv_sample_resource *)
5422                                         dev_flow->dv.sample_res;
5423                 sfx_tbl = (struct mlx5_flow_tbl_resource *)
5424                                         sample_res->normal_path_tbl;
5425                 sfx_tbl_data = container_of(sfx_tbl,
5426                                         struct mlx5_flow_tbl_data_entry, tbl);
5427                 sfx_table_key.v64 = sfx_tbl_data->entry.key;
5428                 sfx_attr.group = sfx_attr.transfer ?
5429                                         (sfx_table_key.table_id - 1) :
5430                                          sfx_table_key.table_id;
5431 #endif
5432         }
5433         /* Add the suffix subflow. */
5434         ret = flow_create_split_meter(dev, flow, dev_flow ?
5435                                  flow_get_prefix_layer_flags(dev_flow) : 0,
5436                                  dev_flow ? dev_flow->handle->mark : 0,
5437                                  &sfx_attr, sfx_items ? sfx_items : items,
5438                                  sfx_actions ? sfx_actions : actions,
5439                                  external, flow_idx, error);
5440 exit:
5441         if (sfx_actions)
5442                 mlx5_free(sfx_actions);
5443         return ret;
5444 }
5445
5446 /**
5447  * Split the flow to subflow set. The splitters might be linked
5448  * in the chain, like this:
5449  * flow_create_split_outer() calls:
5450  *   flow_create_split_meter() calls:
5451  *     flow_create_split_metadata(meter_subflow_0) calls:
5452  *       flow_create_split_inner(metadata_subflow_0)
5453  *       flow_create_split_inner(metadata_subflow_1)
5454  *       flow_create_split_inner(metadata_subflow_2)
5455  *     flow_create_split_metadata(meter_subflow_1) calls:
5456  *       flow_create_split_inner(metadata_subflow_0)
5457  *       flow_create_split_inner(metadata_subflow_1)
5458  *       flow_create_split_inner(metadata_subflow_2)
5459  *
5460  * This provide flexible way to add new levels of flow splitting.
5461  * The all of successfully created subflows are included to the
5462  * parent flow dev_flow list.
5463  *
5464  * @param dev
5465  *   Pointer to Ethernet device.
5466  * @param[in] flow
5467  *   Parent flow structure pointer.
5468  * @param[in] attr
5469  *   Flow rule attributes.
5470  * @param[in] items
5471  *   Pattern specification (list terminated by the END pattern item).
5472  * @param[in] actions
5473  *   Associated actions (list terminated by the END action).
5474  * @param[in] external
5475  *   This flow rule is created by request external to PMD.
5476  * @param[in] flow_idx
5477  *   This memory pool index to the flow.
5478  * @param[out] error
5479  *   Perform verbose error reporting if not NULL.
5480  * @return
5481  *   0 on success, negative value otherwise
5482  */
5483 static int
5484 flow_create_split_outer(struct rte_eth_dev *dev,
5485                         struct rte_flow *flow,
5486                         const struct rte_flow_attr *attr,
5487                         const struct rte_flow_item items[],
5488                         const struct rte_flow_action actions[],
5489                         bool external, uint32_t flow_idx,
5490                         struct rte_flow_error *error)
5491 {
5492         int ret;
5493
5494         ret = flow_create_split_sample(dev, flow, attr, items,
5495                                        actions, external, flow_idx, error);
5496         MLX5_ASSERT(ret <= 0);
5497         return ret;
5498 }
5499
5500 static struct mlx5_flow_tunnel *
5501 flow_tunnel_from_rule(struct rte_eth_dev *dev,
5502                       const struct rte_flow_attr *attr,
5503                       const struct rte_flow_item items[],
5504                       const struct rte_flow_action actions[])
5505 {
5506         struct mlx5_flow_tunnel *tunnel;
5507
5508 #pragma GCC diagnostic push
5509 #pragma GCC diagnostic ignored "-Wcast-qual"
5510         if (is_flow_tunnel_match_rule(dev, attr, items, actions))
5511                 tunnel = (struct mlx5_flow_tunnel *)items[0].spec;
5512         else if (is_flow_tunnel_steer_rule(dev, attr, items, actions))
5513                 tunnel = (struct mlx5_flow_tunnel *)actions[0].conf;
5514         else
5515                 tunnel = NULL;
5516 #pragma GCC diagnostic pop
5517
5518         return tunnel;
5519 }
5520
5521 /**
5522  * Create a flow and add it to @p list.
5523  *
5524  * @param dev
5525  *   Pointer to Ethernet device.
5526  * @param list
5527  *   Pointer to a TAILQ flow list. If this parameter NULL,
5528  *   no list insertion occurred, flow is just created,
5529  *   this is caller's responsibility to track the
5530  *   created flow.
5531  * @param[in] attr
5532  *   Flow rule attributes.
5533  * @param[in] items
5534  *   Pattern specification (list terminated by the END pattern item).
5535  * @param[in] actions
5536  *   Associated actions (list terminated by the END action).
5537  * @param[in] external
5538  *   This flow rule is created by request external to PMD.
5539  * @param[out] error
5540  *   Perform verbose error reporting if not NULL.
5541  *
5542  * @return
5543  *   A flow index on success, 0 otherwise and rte_errno is set.
5544  */
5545 static uint32_t
5546 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
5547                  const struct rte_flow_attr *attr,
5548                  const struct rte_flow_item items[],
5549                  const struct rte_flow_action original_actions[],
5550                  bool external, struct rte_flow_error *error)
5551 {
5552         struct mlx5_priv *priv = dev->data->dev_private;
5553         struct rte_flow *flow = NULL;
5554         struct mlx5_flow *dev_flow;
5555         const struct rte_flow_action_rss *rss;
5556         struct mlx5_translated_shared_action
5557                 shared_actions[MLX5_MAX_SHARED_ACTIONS];
5558         int shared_actions_n = MLX5_MAX_SHARED_ACTIONS;
5559         union {
5560                 struct mlx5_flow_expand_rss buf;
5561                 uint8_t buffer[2048];
5562         } expand_buffer;
5563         union {
5564                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
5565                 uint8_t buffer[2048];
5566         } actions_rx;
5567         union {
5568                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
5569                 uint8_t buffer[2048];
5570         } actions_hairpin_tx;
5571         union {
5572                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
5573                 uint8_t buffer[2048];
5574         } items_tx;
5575         struct mlx5_flow_expand_rss *buf = &expand_buffer.buf;
5576         struct mlx5_flow_rss_desc *rss_desc = &((struct mlx5_flow_rss_desc *)
5577                                               priv->rss_desc)[!!priv->flow_idx];
5578         const struct rte_flow_action *p_actions_rx;
5579         uint32_t i;
5580         uint32_t idx = 0;
5581         int hairpin_flow;
5582         uint32_t hairpin_id = 0;
5583         struct rte_flow_attr attr_tx = { .priority = 0 };
5584         struct rte_flow_attr attr_factor = {0};
5585         const struct rte_flow_action *actions;
5586         struct rte_flow_action *translated_actions = NULL;
5587         struct mlx5_flow_tunnel *tunnel;
5588         struct tunnel_default_miss_ctx default_miss_ctx = { 0, };
5589         int ret = flow_shared_actions_translate(original_actions,
5590                                                 shared_actions,
5591                                                 &shared_actions_n,
5592                                                 &translated_actions, error);
5593
5594         if (ret < 0) {
5595                 MLX5_ASSERT(translated_actions == NULL);
5596                 return 0;
5597         }
5598         actions = translated_actions ? translated_actions : original_actions;
5599         memcpy((void *)&attr_factor, (const void *)attr, sizeof(*attr));
5600         p_actions_rx = actions;
5601         hairpin_flow = flow_check_hairpin_split(dev, &attr_factor, actions);
5602         ret = flow_drv_validate(dev, &attr_factor, items, p_actions_rx,
5603                                 external, hairpin_flow, error);
5604         if (ret < 0)
5605                 goto error_before_hairpin_split;
5606         if (hairpin_flow > 0) {
5607                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
5608                         rte_errno = EINVAL;
5609                         goto error_before_hairpin_split;
5610                 }
5611                 flow_hairpin_split(dev, actions, actions_rx.actions,
5612                                    actions_hairpin_tx.actions, items_tx.items,
5613                                    &hairpin_id);
5614                 p_actions_rx = actions_rx.actions;
5615         }
5616         flow = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], &idx);
5617         if (!flow) {
5618                 rte_errno = ENOMEM;
5619                 goto error_before_flow;
5620         }
5621         flow->drv_type = flow_get_drv_type(dev, &attr_factor);
5622         if (hairpin_id != 0)
5623                 flow->hairpin_flow_id = hairpin_id;
5624         MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
5625                     flow->drv_type < MLX5_FLOW_TYPE_MAX);
5626         memset(rss_desc, 0, sizeof(*rss_desc));
5627         rss = flow_get_rss_action(p_actions_rx);
5628         if (rss) {
5629                 /*
5630                  * The following information is required by
5631                  * mlx5_flow_hashfields_adjust() in advance.
5632                  */
5633                 rss_desc->level = rss->level;
5634                 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
5635                 rss_desc->types = !rss->types ? ETH_RSS_IP : rss->types;
5636         }
5637         flow->dev_handles = 0;
5638         if (rss && rss->types) {
5639                 unsigned int graph_root;
5640
5641                 graph_root = find_graph_root(items, rss->level);
5642                 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
5643                                            items, rss->types,
5644                                            mlx5_support_expansion, graph_root);
5645                 MLX5_ASSERT(ret > 0 &&
5646                        (unsigned int)ret < sizeof(expand_buffer.buffer));
5647         } else {
5648                 buf->entries = 1;
5649                 buf->entry[0].pattern = (void *)(uintptr_t)items;
5650         }
5651         flow->shared_rss = flow_get_shared_rss_action(shared_actions,
5652                                                       shared_actions_n);
5653         /*
5654          * Record the start index when there is a nested call. All sub-flows
5655          * need to be translated before another calling.
5656          * No need to use ping-pong buffer to save memory here.
5657          */
5658         if (priv->flow_idx) {
5659                 MLX5_ASSERT(!priv->flow_nested_idx);
5660                 priv->flow_nested_idx = priv->flow_idx;
5661         }
5662         for (i = 0; i < buf->entries; ++i) {
5663                 /*
5664                  * The splitter may create multiple dev_flows,
5665                  * depending on configuration. In the simplest
5666                  * case it just creates unmodified original flow.
5667                  */
5668                 ret = flow_create_split_outer(dev, flow, &attr_factor,
5669                                               buf->entry[i].pattern,
5670                                               p_actions_rx, external, idx,
5671                                               error);
5672                 if (ret < 0)
5673                         goto error;
5674                 if (is_flow_tunnel_steer_rule(dev, attr,
5675                                               buf->entry[i].pattern,
5676                                               p_actions_rx)) {
5677                         ret = flow_tunnel_add_default_miss(dev, flow, attr,
5678                                                            p_actions_rx,
5679                                                            idx,
5680                                                            &default_miss_ctx,
5681                                                            error);
5682                         if (ret < 0) {
5683                                 mlx5_free(default_miss_ctx.queue);
5684                                 goto error;
5685                         }
5686                 }
5687         }
5688         /* Create the tx flow. */
5689         if (hairpin_flow) {
5690                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
5691                 attr_tx.ingress = 0;
5692                 attr_tx.egress = 1;
5693                 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
5694                                          actions_hairpin_tx.actions,
5695                                          idx, error);
5696                 if (!dev_flow)
5697                         goto error;
5698                 dev_flow->flow = flow;
5699                 dev_flow->external = 0;
5700                 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
5701                               dev_flow->handle, next);
5702                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
5703                                          items_tx.items,
5704                                          actions_hairpin_tx.actions, error);
5705                 if (ret < 0)
5706                         goto error;
5707         }
5708         /*
5709          * Update the metadata register copy table. If extensive
5710          * metadata feature is enabled and registers are supported
5711          * we might create the extra rte_flow for each unique
5712          * MARK/FLAG action ID.
5713          *
5714          * The table is updated for ingress Flows only, because
5715          * the egress Flows belong to the different device and
5716          * copy table should be updated in peer NIC Rx domain.
5717          */
5718         if (attr_factor.ingress &&
5719             (external || attr_factor.group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
5720                 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
5721                 if (ret)
5722                         goto error;
5723         }
5724         /*
5725          * If the flow is external (from application) OR device is started, then
5726          * the flow will be applied immediately.
5727          */
5728         if (external || dev->data->dev_started) {
5729                 ret = flow_drv_apply(dev, flow, error);
5730                 if (ret < 0)
5731                         goto error;
5732         }
5733         if (list)
5734                 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list, idx,
5735                              flow, next);
5736         flow_rxq_flags_set(dev, flow);
5737         rte_free(translated_actions);
5738         /* Nested flow creation index recovery. */
5739         priv->flow_idx = priv->flow_nested_idx;
5740         if (priv->flow_nested_idx)
5741                 priv->flow_nested_idx = 0;
5742         tunnel = flow_tunnel_from_rule(dev, attr, items, actions);
5743         if (tunnel) {
5744                 flow->tunnel = 1;
5745                 flow->tunnel_id = tunnel->tunnel_id;
5746                 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED);
5747                 mlx5_free(default_miss_ctx.queue);
5748         }
5749         return idx;
5750 error:
5751         MLX5_ASSERT(flow);
5752         ret = rte_errno; /* Save rte_errno before cleanup. */
5753         flow_mreg_del_copy_action(dev, flow);
5754         flow_drv_destroy(dev, flow);
5755         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], idx);
5756         rte_errno = ret; /* Restore rte_errno. */
5757 error_before_flow:
5758         ret = rte_errno;
5759         if (hairpin_id)
5760                 mlx5_flow_id_release(priv->sh->flow_id_pool,
5761                                      hairpin_id);
5762         rte_errno = ret;
5763         priv->flow_idx = priv->flow_nested_idx;
5764         if (priv->flow_nested_idx)
5765                 priv->flow_nested_idx = 0;
5766 error_before_hairpin_split:
5767         rte_free(translated_actions);
5768         return 0;
5769 }
5770
5771 /**
5772  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
5773  * incoming packets to table 1.
5774  *
5775  * Other flow rules, requested for group n, will be created in
5776  * e-switch table n+1.
5777  * Jump action to e-switch group n will be created to group n+1.
5778  *
5779  * Used when working in switchdev mode, to utilise advantages of table 1
5780  * and above.
5781  *
5782  * @param dev
5783  *   Pointer to Ethernet device.
5784  *
5785  * @return
5786  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
5787  */
5788 struct rte_flow *
5789 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
5790 {
5791         const struct rte_flow_attr attr = {
5792                 .group = 0,
5793                 .priority = 0,
5794                 .ingress = 1,
5795                 .egress = 0,
5796                 .transfer = 1,
5797         };
5798         const struct rte_flow_item pattern = {
5799                 .type = RTE_FLOW_ITEM_TYPE_END,
5800         };
5801         struct rte_flow_action_jump jump = {
5802                 .group = 1,
5803         };
5804         const struct rte_flow_action actions[] = {
5805                 {
5806                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
5807                         .conf = &jump,
5808                 },
5809                 {
5810                         .type = RTE_FLOW_ACTION_TYPE_END,
5811                 },
5812         };
5813         struct mlx5_priv *priv = dev->data->dev_private;
5814         struct rte_flow_error error;
5815
5816         return (void *)(uintptr_t)flow_list_create(dev, &priv->ctrl_flows,
5817                                                    &attr, &pattern,
5818                                                    actions, false, &error);
5819 }
5820
5821 /**
5822  * Validate a flow supported by the NIC.
5823  *
5824  * @see rte_flow_validate()
5825  * @see rte_flow_ops
5826  */
5827 int
5828 mlx5_flow_validate(struct rte_eth_dev *dev,
5829                    const struct rte_flow_attr *attr,
5830                    const struct rte_flow_item items[],
5831                    const struct rte_flow_action original_actions[],
5832                    struct rte_flow_error *error)
5833 {
5834         int hairpin_flow;
5835         struct mlx5_translated_shared_action
5836                 shared_actions[MLX5_MAX_SHARED_ACTIONS];
5837         int shared_actions_n = MLX5_MAX_SHARED_ACTIONS;
5838         const struct rte_flow_action *actions;
5839         struct rte_flow_action *translated_actions = NULL;
5840         int ret = flow_shared_actions_translate(original_actions,
5841                                                 shared_actions,
5842                                                 &shared_actions_n,
5843                                                 &translated_actions, error);
5844
5845         if (ret)
5846                 return ret;
5847         actions = translated_actions ? translated_actions : original_actions;
5848         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
5849         ret = flow_drv_validate(dev, attr, items, actions,
5850                                 true, hairpin_flow, error);
5851         rte_free(translated_actions);
5852         return ret;
5853 }
5854
5855 /**
5856  * Create a flow.
5857  *
5858  * @see rte_flow_create()
5859  * @see rte_flow_ops
5860  */
5861 struct rte_flow *
5862 mlx5_flow_create(struct rte_eth_dev *dev,
5863                  const struct rte_flow_attr *attr,
5864                  const struct rte_flow_item items[],
5865                  const struct rte_flow_action actions[],
5866                  struct rte_flow_error *error)
5867 {
5868         struct mlx5_priv *priv = dev->data->dev_private;
5869
5870         /*
5871          * If the device is not started yet, it is not allowed to created a
5872          * flow from application. PMD default flows and traffic control flows
5873          * are not affected.
5874          */
5875         if (unlikely(!dev->data->dev_started)) {
5876                 DRV_LOG(DEBUG, "port %u is not started when "
5877                         "inserting a flow", dev->data->port_id);
5878                 rte_flow_error_set(error, ENODEV,
5879                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5880                                    NULL,
5881                                    "port not started");
5882                 return NULL;
5883         }
5884
5885         return (void *)(uintptr_t)flow_list_create(dev, &priv->flows,
5886                                   attr, items, actions, true, error);
5887 }
5888
5889 /**
5890  * Destroy a flow in a list.
5891  *
5892  * @param dev
5893  *   Pointer to Ethernet device.
5894  * @param list
5895  *   Pointer to the Indexed flow list. If this parameter NULL,
5896  *   there is no flow removal from the list. Be noted that as
5897  *   flow is add to the indexed list, memory of the indexed
5898  *   list points to maybe changed as flow destroyed.
5899  * @param[in] flow_idx
5900  *   Index of flow to destroy.
5901  */
5902 static void
5903 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
5904                   uint32_t flow_idx)
5905 {
5906         struct mlx5_priv *priv = dev->data->dev_private;
5907         struct mlx5_fdir_flow *priv_fdir_flow = NULL;
5908         struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
5909                                                [MLX5_IPOOL_RTE_FLOW], flow_idx);
5910
5911         if (!flow)
5912                 return;
5913         /*
5914          * Update RX queue flags only if port is started, otherwise it is
5915          * already clean.
5916          */
5917         if (dev->data->dev_started)
5918                 flow_rxq_flags_trim(dev, flow);
5919         if (flow->hairpin_flow_id)
5920                 mlx5_flow_id_release(priv->sh->flow_id_pool,
5921                                      flow->hairpin_flow_id);
5922         flow_drv_destroy(dev, flow);
5923         if (list)
5924                 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list,
5925                              flow_idx, flow, next);
5926         flow_mreg_del_copy_action(dev, flow);
5927         if (flow->fdir) {
5928                 LIST_FOREACH(priv_fdir_flow, &priv->fdir_flows, next) {
5929                         if (priv_fdir_flow->rix_flow == flow_idx)
5930                                 break;
5931                 }
5932                 if (priv_fdir_flow) {
5933                         LIST_REMOVE(priv_fdir_flow, next);
5934                         mlx5_free(priv_fdir_flow->fdir);
5935                         mlx5_free(priv_fdir_flow);
5936                 }
5937         }
5938         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], flow_idx);
5939         if (flow->tunnel) {
5940                 struct mlx5_flow_tunnel *tunnel;
5941                 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id);
5942                 RTE_VERIFY(tunnel);
5943                 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
5944                         mlx5_flow_tunnel_free(dev, tunnel);
5945         }
5946 }
5947
5948 /**
5949  * Destroy all flows.
5950  *
5951  * @param dev
5952  *   Pointer to Ethernet device.
5953  * @param list
5954  *   Pointer to the Indexed flow list.
5955  * @param active
5956  *   If flushing is called avtively.
5957  */
5958 void
5959 mlx5_flow_list_flush(struct rte_eth_dev *dev, uint32_t *list, bool active)
5960 {
5961         uint32_t num_flushed = 0;
5962
5963         while (*list) {
5964                 flow_list_destroy(dev, list, *list);
5965                 num_flushed++;
5966         }
5967         if (active) {
5968                 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
5969                         dev->data->port_id, num_flushed);
5970         }
5971 }
5972
5973 /**
5974  * Remove all flows.
5975  *
5976  * @param dev
5977  *   Pointer to Ethernet device.
5978  * @param list
5979  *   Pointer to the Indexed flow list.
5980  */
5981 void
5982 mlx5_flow_stop(struct rte_eth_dev *dev, uint32_t *list)
5983 {
5984         struct mlx5_priv *priv = dev->data->dev_private;
5985         struct rte_flow *flow = NULL;
5986         uint32_t idx;
5987
5988         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], *list, idx,
5989                       flow, next) {
5990                 flow_drv_remove(dev, flow);
5991                 flow_mreg_stop_copy_action(dev, flow);
5992         }
5993         flow_mreg_del_default_copy_action(dev);
5994         flow_rxq_flags_clear(dev);
5995 }
5996
5997 /**
5998  * Add all flows.
5999  *
6000  * @param dev
6001  *   Pointer to Ethernet device.
6002  * @param list
6003  *   Pointer to the Indexed flow list.
6004  *
6005  * @return
6006  *   0 on success, a negative errno value otherwise and rte_errno is set.
6007  */
6008 int
6009 mlx5_flow_start(struct rte_eth_dev *dev, uint32_t *list)
6010 {
6011         struct mlx5_priv *priv = dev->data->dev_private;
6012         struct rte_flow *flow = NULL;
6013         struct rte_flow_error error;
6014         uint32_t idx;
6015         int ret = 0;
6016
6017         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
6018         ret = flow_mreg_add_default_copy_action(dev, &error);
6019         if (ret < 0)
6020                 return -rte_errno;
6021         /* Apply Flows created by application. */
6022         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], *list, idx,
6023                       flow, next) {
6024                 ret = flow_mreg_start_copy_action(dev, flow);
6025                 if (ret < 0)
6026                         goto error;
6027                 ret = flow_drv_apply(dev, flow, &error);
6028                 if (ret < 0)
6029                         goto error;
6030                 flow_rxq_flags_set(dev, flow);
6031         }
6032         return 0;
6033 error:
6034         ret = rte_errno; /* Save rte_errno before cleanup. */
6035         mlx5_flow_stop(dev, list);
6036         rte_errno = ret; /* Restore rte_errno. */
6037         return -rte_errno;
6038 }
6039
6040 /**
6041  * Stop all default actions for flows.
6042  *
6043  * @param dev
6044  *   Pointer to Ethernet device.
6045  */
6046 void
6047 mlx5_flow_stop_default(struct rte_eth_dev *dev)
6048 {
6049         flow_mreg_del_default_copy_action(dev);
6050         flow_rxq_flags_clear(dev);
6051 }
6052
6053 /**
6054  * Start all default actions for flows.
6055  *
6056  * @param dev
6057  *   Pointer to Ethernet device.
6058  * @return
6059  *   0 on success, a negative errno value otherwise and rte_errno is set.
6060  */
6061 int
6062 mlx5_flow_start_default(struct rte_eth_dev *dev)
6063 {
6064         struct rte_flow_error error;
6065
6066         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
6067         return flow_mreg_add_default_copy_action(dev, &error);
6068 }
6069
6070 /**
6071  * Allocate intermediate resources for flow creation.
6072  *
6073  * @param dev
6074  *   Pointer to Ethernet device.
6075  */
6076 void
6077 mlx5_flow_alloc_intermediate(struct rte_eth_dev *dev)
6078 {
6079         struct mlx5_priv *priv = dev->data->dev_private;
6080
6081         if (!priv->inter_flows) {
6082                 priv->inter_flows = mlx5_malloc(MLX5_MEM_ZERO,
6083                                     MLX5_NUM_MAX_DEV_FLOWS *
6084                                     sizeof(struct mlx5_flow) +
6085                                     (sizeof(struct mlx5_flow_rss_desc) +
6086                                     sizeof(uint16_t) * UINT16_MAX) * 2, 0,
6087                                     SOCKET_ID_ANY);
6088                 if (!priv->inter_flows) {
6089                         DRV_LOG(ERR, "can't allocate intermediate memory.");
6090                         return;
6091                 }
6092         }
6093         priv->rss_desc = &((struct mlx5_flow *)priv->inter_flows)
6094                          [MLX5_NUM_MAX_DEV_FLOWS];
6095         /* Reset the index. */
6096         priv->flow_idx = 0;
6097         priv->flow_nested_idx = 0;
6098 }
6099
6100 /**
6101  * Free intermediate resources for flows.
6102  *
6103  * @param dev
6104  *   Pointer to Ethernet device.
6105  */
6106 void
6107 mlx5_flow_free_intermediate(struct rte_eth_dev *dev)
6108 {
6109         struct mlx5_priv *priv = dev->data->dev_private;
6110
6111         mlx5_free(priv->inter_flows);
6112         priv->inter_flows = NULL;
6113 }
6114
6115 /**
6116  * Verify the flow list is empty
6117  *
6118  * @param dev
6119  *  Pointer to Ethernet device.
6120  *
6121  * @return the number of flows not released.
6122  */
6123 int
6124 mlx5_flow_verify(struct rte_eth_dev *dev)
6125 {
6126         struct mlx5_priv *priv = dev->data->dev_private;
6127         struct rte_flow *flow;
6128         uint32_t idx;
6129         int ret = 0;
6130
6131         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], priv->flows, idx,
6132                       flow, next) {
6133                 DRV_LOG(DEBUG, "port %u flow %p still referenced",
6134                         dev->data->port_id, (void *)flow);
6135                 ++ret;
6136         }
6137         return ret;
6138 }
6139
6140 /**
6141  * Enable default hairpin egress flow.
6142  *
6143  * @param dev
6144  *   Pointer to Ethernet device.
6145  * @param queue
6146  *   The queue index.
6147  *
6148  * @return
6149  *   0 on success, a negative errno value otherwise and rte_errno is set.
6150  */
6151 int
6152 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
6153                             uint32_t queue)
6154 {
6155         struct mlx5_priv *priv = dev->data->dev_private;
6156         const struct rte_flow_attr attr = {
6157                 .egress = 1,
6158                 .priority = 0,
6159         };
6160         struct mlx5_rte_flow_item_tx_queue queue_spec = {
6161                 .queue = queue,
6162         };
6163         struct mlx5_rte_flow_item_tx_queue queue_mask = {
6164                 .queue = UINT32_MAX,
6165         };
6166         struct rte_flow_item items[] = {
6167                 {
6168                         .type = (enum rte_flow_item_type)
6169                                 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
6170                         .spec = &queue_spec,
6171                         .last = NULL,
6172                         .mask = &queue_mask,
6173                 },
6174                 {
6175                         .type = RTE_FLOW_ITEM_TYPE_END,
6176                 },
6177         };
6178         struct rte_flow_action_jump jump = {
6179                 .group = MLX5_HAIRPIN_TX_TABLE,
6180         };
6181         struct rte_flow_action actions[2];
6182         uint32_t flow_idx;
6183         struct rte_flow_error error;
6184
6185         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
6186         actions[0].conf = &jump;
6187         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
6188         flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6189                                 &attr, items, actions, false, &error);
6190         if (!flow_idx) {
6191                 DRV_LOG(DEBUG,
6192                         "Failed to create ctrl flow: rte_errno(%d),"
6193                         " type(%d), message(%s)",
6194                         rte_errno, error.type,
6195                         error.message ? error.message : " (no stated reason)");
6196                 return -rte_errno;
6197         }
6198         return 0;
6199 }
6200
6201 /**
6202  * Enable a control flow configured from the control plane.
6203  *
6204  * @param dev
6205  *   Pointer to Ethernet device.
6206  * @param eth_spec
6207  *   An Ethernet flow spec to apply.
6208  * @param eth_mask
6209  *   An Ethernet flow mask to apply.
6210  * @param vlan_spec
6211  *   A VLAN flow spec to apply.
6212  * @param vlan_mask
6213  *   A VLAN flow mask to apply.
6214  *
6215  * @return
6216  *   0 on success, a negative errno value otherwise and rte_errno is set.
6217  */
6218 int
6219 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
6220                     struct rte_flow_item_eth *eth_spec,
6221                     struct rte_flow_item_eth *eth_mask,
6222                     struct rte_flow_item_vlan *vlan_spec,
6223                     struct rte_flow_item_vlan *vlan_mask)
6224 {
6225         struct mlx5_priv *priv = dev->data->dev_private;
6226         const struct rte_flow_attr attr = {
6227                 .ingress = 1,
6228                 .priority = MLX5_FLOW_PRIO_RSVD,
6229         };
6230         struct rte_flow_item items[] = {
6231                 {
6232                         .type = RTE_FLOW_ITEM_TYPE_ETH,
6233                         .spec = eth_spec,
6234                         .last = NULL,
6235                         .mask = eth_mask,
6236                 },
6237                 {
6238                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
6239                                               RTE_FLOW_ITEM_TYPE_END,
6240                         .spec = vlan_spec,
6241                         .last = NULL,
6242                         .mask = vlan_mask,
6243                 },
6244                 {
6245                         .type = RTE_FLOW_ITEM_TYPE_END,
6246                 },
6247         };
6248         uint16_t queue[priv->reta_idx_n];
6249         struct rte_flow_action_rss action_rss = {
6250                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
6251                 .level = 0,
6252                 .types = priv->rss_conf.rss_hf,
6253                 .key_len = priv->rss_conf.rss_key_len,
6254                 .queue_num = priv->reta_idx_n,
6255                 .key = priv->rss_conf.rss_key,
6256                 .queue = queue,
6257         };
6258         struct rte_flow_action actions[] = {
6259                 {
6260                         .type = RTE_FLOW_ACTION_TYPE_RSS,
6261                         .conf = &action_rss,
6262                 },
6263                 {
6264                         .type = RTE_FLOW_ACTION_TYPE_END,
6265                 },
6266         };
6267         uint32_t flow_idx;
6268         struct rte_flow_error error;
6269         unsigned int i;
6270
6271         if (!priv->reta_idx_n || !priv->rxqs_n) {
6272                 return 0;
6273         }
6274         if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
6275                 action_rss.types = 0;
6276         for (i = 0; i != priv->reta_idx_n; ++i)
6277                 queue[i] = (*priv->reta_idx)[i];
6278         flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6279                                 &attr, items, actions, false, &error);
6280         if (!flow_idx)
6281                 return -rte_errno;
6282         return 0;
6283 }
6284
6285 /**
6286  * Enable a flow control configured from the control plane.
6287  *
6288  * @param dev
6289  *   Pointer to Ethernet device.
6290  * @param eth_spec
6291  *   An Ethernet flow spec to apply.
6292  * @param eth_mask
6293  *   An Ethernet flow mask to apply.
6294  *
6295  * @return
6296  *   0 on success, a negative errno value otherwise and rte_errno is set.
6297  */
6298 int
6299 mlx5_ctrl_flow(struct rte_eth_dev *dev,
6300                struct rte_flow_item_eth *eth_spec,
6301                struct rte_flow_item_eth *eth_mask)
6302 {
6303         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
6304 }
6305
6306 /**
6307  * Create default miss flow rule matching lacp traffic
6308  *
6309  * @param dev
6310  *   Pointer to Ethernet device.
6311  * @param eth_spec
6312  *   An Ethernet flow spec to apply.
6313  *
6314  * @return
6315  *   0 on success, a negative errno value otherwise and rte_errno is set.
6316  */
6317 int
6318 mlx5_flow_lacp_miss(struct rte_eth_dev *dev)
6319 {
6320         struct mlx5_priv *priv = dev->data->dev_private;
6321         /*
6322          * The LACP matching is done by only using ether type since using
6323          * a multicast dst mac causes kernel to give low priority to this flow.
6324          */
6325         static const struct rte_flow_item_eth lacp_spec = {
6326                 .type = RTE_BE16(0x8809),
6327         };
6328         static const struct rte_flow_item_eth lacp_mask = {
6329                 .type = 0xffff,
6330         };
6331         const struct rte_flow_attr attr = {
6332                 .ingress = 1,
6333         };
6334         struct rte_flow_item items[] = {
6335                 {
6336                         .type = RTE_FLOW_ITEM_TYPE_ETH,
6337                         .spec = &lacp_spec,
6338                         .mask = &lacp_mask,
6339                 },
6340                 {
6341                         .type = RTE_FLOW_ITEM_TYPE_END,
6342                 },
6343         };
6344         struct rte_flow_action actions[] = {
6345                 {
6346                         .type = (enum rte_flow_action_type)
6347                                 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS,
6348                 },
6349                 {
6350                         .type = RTE_FLOW_ACTION_TYPE_END,
6351                 },
6352         };
6353         struct rte_flow_error error;
6354         uint32_t flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6355                                 &attr, items, actions, false, &error);
6356
6357         if (!flow_idx)
6358                 return -rte_errno;
6359         return 0;
6360 }
6361
6362 /**
6363  * Destroy a flow.
6364  *
6365  * @see rte_flow_destroy()
6366  * @see rte_flow_ops
6367  */
6368 int
6369 mlx5_flow_destroy(struct rte_eth_dev *dev,
6370                   struct rte_flow *flow,
6371                   struct rte_flow_error *error __rte_unused)
6372 {
6373         struct mlx5_priv *priv = dev->data->dev_private;
6374
6375         flow_list_destroy(dev, &priv->flows, (uintptr_t)(void *)flow);
6376         return 0;
6377 }
6378
6379 /**
6380  * Destroy all flows.
6381  *
6382  * @see rte_flow_flush()
6383  * @see rte_flow_ops
6384  */
6385 int
6386 mlx5_flow_flush(struct rte_eth_dev *dev,
6387                 struct rte_flow_error *error __rte_unused)
6388 {
6389         struct mlx5_priv *priv = dev->data->dev_private;
6390
6391         mlx5_flow_list_flush(dev, &priv->flows, false);
6392         return 0;
6393 }
6394
6395 /**
6396  * Isolated mode.
6397  *
6398  * @see rte_flow_isolate()
6399  * @see rte_flow_ops
6400  */
6401 int
6402 mlx5_flow_isolate(struct rte_eth_dev *dev,
6403                   int enable,
6404                   struct rte_flow_error *error)
6405 {
6406         struct mlx5_priv *priv = dev->data->dev_private;
6407
6408         if (dev->data->dev_started) {
6409                 rte_flow_error_set(error, EBUSY,
6410                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6411                                    NULL,
6412                                    "port must be stopped first");
6413                 return -rte_errno;
6414         }
6415         priv->isolated = !!enable;
6416         if (enable)
6417                 dev->dev_ops = &mlx5_os_dev_ops_isolate;
6418         else
6419                 dev->dev_ops = &mlx5_os_dev_ops;
6420
6421         dev->rx_descriptor_status = mlx5_rx_descriptor_status;
6422         dev->tx_descriptor_status = mlx5_tx_descriptor_status;
6423
6424         return 0;
6425 }
6426
6427 /**
6428  * Query a flow.
6429  *
6430  * @see rte_flow_query()
6431  * @see rte_flow_ops
6432  */
6433 static int
6434 flow_drv_query(struct rte_eth_dev *dev,
6435                uint32_t flow_idx,
6436                const struct rte_flow_action *actions,
6437                void *data,
6438                struct rte_flow_error *error)
6439 {
6440         struct mlx5_priv *priv = dev->data->dev_private;
6441         const struct mlx5_flow_driver_ops *fops;
6442         struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
6443                                                [MLX5_IPOOL_RTE_FLOW],
6444                                                flow_idx);
6445         enum mlx5_flow_drv_type ftype;
6446
6447         if (!flow) {
6448                 return rte_flow_error_set(error, ENOENT,
6449                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6450                           NULL,
6451                           "invalid flow handle");
6452         }
6453         ftype = flow->drv_type;
6454         MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
6455         fops = flow_get_drv_ops(ftype);
6456
6457         return fops->query(dev, flow, actions, data, error);
6458 }
6459
6460 /**
6461  * Query a flow.
6462  *
6463  * @see rte_flow_query()
6464  * @see rte_flow_ops
6465  */
6466 int
6467 mlx5_flow_query(struct rte_eth_dev *dev,
6468                 struct rte_flow *flow,
6469                 const struct rte_flow_action *actions,
6470                 void *data,
6471                 struct rte_flow_error *error)
6472 {
6473         int ret;
6474
6475         ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data,
6476                              error);
6477         if (ret < 0)
6478                 return ret;
6479         return 0;
6480 }
6481
6482 /**
6483  * Convert a flow director filter to a generic flow.
6484  *
6485  * @param dev
6486  *   Pointer to Ethernet device.
6487  * @param fdir_filter
6488  *   Flow director filter to add.
6489  * @param attributes
6490  *   Generic flow parameters structure.
6491  *
6492  * @return
6493  *   0 on success, a negative errno value otherwise and rte_errno is set.
6494  */
6495 static int
6496 flow_fdir_filter_convert(struct rte_eth_dev *dev,
6497                          const struct rte_eth_fdir_filter *fdir_filter,
6498                          struct mlx5_fdir *attributes)
6499 {
6500         struct mlx5_priv *priv = dev->data->dev_private;
6501         const struct rte_eth_fdir_input *input = &fdir_filter->input;
6502         const struct rte_eth_fdir_masks *mask =
6503                 &dev->data->dev_conf.fdir_conf.mask;
6504
6505         /* Validate queue number. */
6506         if (fdir_filter->action.rx_queue >= priv->rxqs_n) {
6507                 DRV_LOG(ERR, "port %u invalid queue number %d",
6508                         dev->data->port_id, fdir_filter->action.rx_queue);
6509                 rte_errno = EINVAL;
6510                 return -rte_errno;
6511         }
6512         attributes->attr.ingress = 1;
6513         attributes->items[0] = (struct rte_flow_item) {
6514                 .type = RTE_FLOW_ITEM_TYPE_ETH,
6515                 .spec = &attributes->l2,
6516                 .mask = &attributes->l2_mask,
6517         };
6518         switch (fdir_filter->action.behavior) {
6519         case RTE_ETH_FDIR_ACCEPT:
6520                 attributes->actions[0] = (struct rte_flow_action){
6521                         .type = RTE_FLOW_ACTION_TYPE_QUEUE,
6522                         .conf = &attributes->queue,
6523                 };
6524                 break;
6525         case RTE_ETH_FDIR_REJECT:
6526                 attributes->actions[0] = (struct rte_flow_action){
6527                         .type = RTE_FLOW_ACTION_TYPE_DROP,
6528                 };
6529                 break;
6530         default:
6531                 DRV_LOG(ERR, "port %u invalid behavior %d",
6532                         dev->data->port_id,
6533                         fdir_filter->action.behavior);
6534                 rte_errno = ENOTSUP;
6535                 return -rte_errno;
6536         }
6537         attributes->queue.index = fdir_filter->action.rx_queue;
6538         /* Handle L3. */
6539         switch (fdir_filter->input.flow_type) {
6540         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
6541         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
6542         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
6543                 attributes->l3.ipv4.hdr = (struct rte_ipv4_hdr){
6544                         .src_addr = input->flow.ip4_flow.src_ip,
6545                         .dst_addr = input->flow.ip4_flow.dst_ip,
6546                         .time_to_live = input->flow.ip4_flow.ttl,
6547                         .type_of_service = input->flow.ip4_flow.tos,
6548                 };
6549                 attributes->l3_mask.ipv4.hdr = (struct rte_ipv4_hdr){
6550                         .src_addr = mask->ipv4_mask.src_ip,
6551                         .dst_addr = mask->ipv4_mask.dst_ip,
6552                         .time_to_live = mask->ipv4_mask.ttl,
6553                         .type_of_service = mask->ipv4_mask.tos,
6554                         .next_proto_id = mask->ipv4_mask.proto,
6555                 };
6556                 attributes->items[1] = (struct rte_flow_item){
6557                         .type = RTE_FLOW_ITEM_TYPE_IPV4,
6558                         .spec = &attributes->l3,
6559                         .mask = &attributes->l3_mask,
6560                 };
6561                 break;
6562         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
6563         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
6564         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
6565                 attributes->l3.ipv6.hdr = (struct rte_ipv6_hdr){
6566                         .hop_limits = input->flow.ipv6_flow.hop_limits,
6567                         .proto = input->flow.ipv6_flow.proto,
6568                 };
6569
6570                 memcpy(attributes->l3.ipv6.hdr.src_addr,
6571                        input->flow.ipv6_flow.src_ip,
6572                        RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
6573                 memcpy(attributes->l3.ipv6.hdr.dst_addr,
6574                        input->flow.ipv6_flow.dst_ip,
6575                        RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
6576                 memcpy(attributes->l3_mask.ipv6.hdr.src_addr,
6577                        mask->ipv6_mask.src_ip,
6578                        RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
6579                 memcpy(attributes->l3_mask.ipv6.hdr.dst_addr,
6580                        mask->ipv6_mask.dst_ip,
6581                        RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
6582                 attributes->items[1] = (struct rte_flow_item){
6583                         .type = RTE_FLOW_ITEM_TYPE_IPV6,
6584                         .spec = &attributes->l3,
6585                         .mask = &attributes->l3_mask,
6586                 };
6587                 break;
6588         default:
6589                 DRV_LOG(ERR, "port %u invalid flow type%d",
6590                         dev->data->port_id, fdir_filter->input.flow_type);
6591                 rte_errno = ENOTSUP;
6592                 return -rte_errno;
6593         }
6594         /* Handle L4. */
6595         switch (fdir_filter->input.flow_type) {
6596         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
6597                 attributes->l4.udp.hdr = (struct rte_udp_hdr){
6598                         .src_port = input->flow.udp4_flow.src_port,
6599                         .dst_port = input->flow.udp4_flow.dst_port,
6600                 };
6601                 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
6602                         .src_port = mask->src_port_mask,
6603                         .dst_port = mask->dst_port_mask,
6604                 };
6605                 attributes->items[2] = (struct rte_flow_item){
6606                         .type = RTE_FLOW_ITEM_TYPE_UDP,
6607                         .spec = &attributes->l4,
6608                         .mask = &attributes->l4_mask,
6609                 };
6610                 break;
6611         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
6612                 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
6613                         .src_port = input->flow.tcp4_flow.src_port,
6614                         .dst_port = input->flow.tcp4_flow.dst_port,
6615                 };
6616                 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
6617                         .src_port = mask->src_port_mask,
6618                         .dst_port = mask->dst_port_mask,
6619                 };
6620                 attributes->items[2] = (struct rte_flow_item){
6621                         .type = RTE_FLOW_ITEM_TYPE_TCP,
6622                         .spec = &attributes->l4,
6623                         .mask = &attributes->l4_mask,
6624                 };
6625                 break;
6626         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
6627                 attributes->l4.udp.hdr = (struct rte_udp_hdr){
6628                         .src_port = input->flow.udp6_flow.src_port,
6629                         .dst_port = input->flow.udp6_flow.dst_port,
6630                 };
6631                 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
6632                         .src_port = mask->src_port_mask,
6633                         .dst_port = mask->dst_port_mask,
6634                 };
6635                 attributes->items[2] = (struct rte_flow_item){
6636                         .type = RTE_FLOW_ITEM_TYPE_UDP,
6637                         .spec = &attributes->l4,
6638                         .mask = &attributes->l4_mask,
6639                 };
6640                 break;
6641         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
6642                 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
6643                         .src_port = input->flow.tcp6_flow.src_port,
6644                         .dst_port = input->flow.tcp6_flow.dst_port,
6645                 };
6646                 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
6647                         .src_port = mask->src_port_mask,
6648                         .dst_port = mask->dst_port_mask,
6649                 };
6650                 attributes->items[2] = (struct rte_flow_item){
6651                         .type = RTE_FLOW_ITEM_TYPE_TCP,
6652                         .spec = &attributes->l4,
6653                         .mask = &attributes->l4_mask,
6654                 };
6655                 break;
6656         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
6657         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
6658                 break;
6659         default:
6660                 DRV_LOG(ERR, "port %u invalid flow type%d",
6661                         dev->data->port_id, fdir_filter->input.flow_type);
6662                 rte_errno = ENOTSUP;
6663                 return -rte_errno;
6664         }
6665         return 0;
6666 }
6667
6668 #define FLOW_FDIR_CMP(f1, f2, fld) \
6669         memcmp(&(f1)->fld, &(f2)->fld, sizeof(f1->fld))
6670
6671 /**
6672  * Compare two FDIR flows. If items and actions are identical, the two flows are
6673  * regarded as same.
6674  *
6675  * @param dev
6676  *   Pointer to Ethernet device.
6677  * @param f1
6678  *   FDIR flow to compare.
6679  * @param f2
6680  *   FDIR flow to compare.
6681  *
6682  * @return
6683  *   Zero on match, 1 otherwise.
6684  */
6685 static int
6686 flow_fdir_cmp(const struct mlx5_fdir *f1, const struct mlx5_fdir *f2)
6687 {
6688         if (FLOW_FDIR_CMP(f1, f2, attr) ||
6689             FLOW_FDIR_CMP(f1, f2, l2) ||
6690             FLOW_FDIR_CMP(f1, f2, l2_mask) ||
6691             FLOW_FDIR_CMP(f1, f2, l3) ||
6692             FLOW_FDIR_CMP(f1, f2, l3_mask) ||
6693             FLOW_FDIR_CMP(f1, f2, l4) ||
6694             FLOW_FDIR_CMP(f1, f2, l4_mask) ||
6695             FLOW_FDIR_CMP(f1, f2, actions[0].type))
6696                 return 1;
6697         if (f1->actions[0].type == RTE_FLOW_ACTION_TYPE_QUEUE &&
6698             FLOW_FDIR_CMP(f1, f2, queue))
6699                 return 1;
6700         return 0;
6701 }
6702
6703 /**
6704  * Search device flow list to find out a matched FDIR flow.
6705  *
6706  * @param dev
6707  *   Pointer to Ethernet device.
6708  * @param fdir_flow
6709  *   FDIR flow to lookup.
6710  *
6711  * @return
6712  *   Index of flow if found, 0 otherwise.
6713  */
6714 static uint32_t
6715 flow_fdir_filter_lookup(struct rte_eth_dev *dev, struct mlx5_fdir *fdir_flow)
6716 {
6717         struct mlx5_priv *priv = dev->data->dev_private;
6718         uint32_t flow_idx = 0;
6719         struct mlx5_fdir_flow *priv_fdir_flow = NULL;
6720
6721         MLX5_ASSERT(fdir_flow);
6722         LIST_FOREACH(priv_fdir_flow, &priv->fdir_flows, next) {
6723                 if (!flow_fdir_cmp(priv_fdir_flow->fdir, fdir_flow)) {
6724                         DRV_LOG(DEBUG, "port %u found FDIR flow %u",
6725                                 dev->data->port_id, flow_idx);
6726                         flow_idx = priv_fdir_flow->rix_flow;
6727                         break;
6728                 }
6729         }
6730         return flow_idx;
6731 }
6732
6733 /**
6734  * Add new flow director filter and store it in list.
6735  *
6736  * @param dev
6737  *   Pointer to Ethernet device.
6738  * @param fdir_filter
6739  *   Flow director filter to add.
6740  *
6741  * @return
6742  *   0 on success, a negative errno value otherwise and rte_errno is set.
6743  */
6744 static int
6745 flow_fdir_filter_add(struct rte_eth_dev *dev,
6746                      const struct rte_eth_fdir_filter *fdir_filter)
6747 {
6748         struct mlx5_priv *priv = dev->data->dev_private;
6749         struct mlx5_fdir *fdir_flow;
6750         struct rte_flow *flow;
6751         struct mlx5_fdir_flow *priv_fdir_flow = NULL;
6752         uint32_t flow_idx;
6753         int ret;
6754
6755         fdir_flow = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*fdir_flow), 0,
6756                                 SOCKET_ID_ANY);
6757         if (!fdir_flow) {
6758                 rte_errno = ENOMEM;
6759                 return -rte_errno;
6760         }
6761         ret = flow_fdir_filter_convert(dev, fdir_filter, fdir_flow);
6762         if (ret)
6763                 goto error;
6764         flow_idx = flow_fdir_filter_lookup(dev, fdir_flow);
6765         if (flow_idx) {
6766                 rte_errno = EEXIST;
6767                 goto error;
6768         }
6769         priv_fdir_flow = mlx5_malloc(MLX5_MEM_ZERO,
6770                                      sizeof(struct mlx5_fdir_flow),
6771                                      0, SOCKET_ID_ANY);
6772         if (!priv_fdir_flow) {
6773                 rte_errno = ENOMEM;
6774                 goto error;
6775         }
6776         flow_idx = flow_list_create(dev, &priv->flows, &fdir_flow->attr,
6777                                     fdir_flow->items, fdir_flow->actions, true,
6778                                     NULL);
6779         flow = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], flow_idx);
6780         if (!flow)
6781                 goto error;
6782         flow->fdir = 1;
6783         priv_fdir_flow->fdir = fdir_flow;
6784         priv_fdir_flow->rix_flow = flow_idx;
6785         LIST_INSERT_HEAD(&priv->fdir_flows, priv_fdir_flow, next);
6786         DRV_LOG(DEBUG, "port %u created FDIR flow %p",
6787                 dev->data->port_id, (void *)flow);
6788         return 0;
6789 error:
6790         mlx5_free(priv_fdir_flow);
6791         mlx5_free(fdir_flow);
6792         return -rte_errno;
6793 }
6794
6795 /**
6796  * Delete specific filter.
6797  *
6798  * @param dev
6799  *   Pointer to Ethernet device.
6800  * @param fdir_filter
6801  *   Filter to be deleted.
6802  *
6803  * @return
6804  *   0 on success, a negative errno value otherwise and rte_errno is set.
6805  */
6806 static int
6807 flow_fdir_filter_delete(struct rte_eth_dev *dev,
6808                         const struct rte_eth_fdir_filter *fdir_filter)
6809 {
6810         struct mlx5_priv *priv = dev->data->dev_private;
6811         uint32_t flow_idx;
6812         struct mlx5_fdir fdir_flow = {
6813                 .attr.group = 0,
6814         };
6815         struct mlx5_fdir_flow *priv_fdir_flow = NULL;
6816         int ret;
6817
6818         ret = flow_fdir_filter_convert(dev, fdir_filter, &fdir_flow);
6819         if (ret)
6820                 return -rte_errno;
6821         LIST_FOREACH(priv_fdir_flow, &priv->fdir_flows, next) {
6822                 /* Find the fdir in priv list */
6823                 if (!flow_fdir_cmp(priv_fdir_flow->fdir, &fdir_flow))
6824                         break;
6825         }
6826         if (!priv_fdir_flow)
6827                 return 0;
6828         LIST_REMOVE(priv_fdir_flow, next);
6829         flow_idx = priv_fdir_flow->rix_flow;
6830         flow_list_destroy(dev, &priv->flows, flow_idx);
6831         mlx5_free(priv_fdir_flow->fdir);
6832         mlx5_free(priv_fdir_flow);
6833         DRV_LOG(DEBUG, "port %u deleted FDIR flow %u",
6834                 dev->data->port_id, flow_idx);
6835         return 0;
6836 }
6837
6838 /**
6839  * Update queue for specific filter.
6840  *
6841  * @param dev
6842  *   Pointer to Ethernet device.
6843  * @param fdir_filter
6844  *   Filter to be updated.
6845  *
6846  * @return
6847  *   0 on success, a negative errno value otherwise and rte_errno is set.
6848  */
6849 static int
6850 flow_fdir_filter_update(struct rte_eth_dev *dev,
6851                         const struct rte_eth_fdir_filter *fdir_filter)
6852 {
6853         int ret;
6854
6855         ret = flow_fdir_filter_delete(dev, fdir_filter);
6856         if (ret)
6857                 return ret;
6858         return flow_fdir_filter_add(dev, fdir_filter);
6859 }
6860
6861 /**
6862  * Flush all filters.
6863  *
6864  * @param dev
6865  *   Pointer to Ethernet device.
6866  */
6867 static void
6868 flow_fdir_filter_flush(struct rte_eth_dev *dev)
6869 {
6870         struct mlx5_priv *priv = dev->data->dev_private;
6871         struct mlx5_fdir_flow *priv_fdir_flow = NULL;
6872
6873         while (!LIST_EMPTY(&priv->fdir_flows)) {
6874                 priv_fdir_flow = LIST_FIRST(&priv->fdir_flows);
6875                 LIST_REMOVE(priv_fdir_flow, next);
6876                 flow_list_destroy(dev, &priv->flows, priv_fdir_flow->rix_flow);
6877                 mlx5_free(priv_fdir_flow->fdir);
6878                 mlx5_free(priv_fdir_flow);
6879         }
6880 }
6881
6882 /**
6883  * Get flow director information.
6884  *
6885  * @param dev
6886  *   Pointer to Ethernet device.
6887  * @param[out] fdir_info
6888  *   Resulting flow director information.
6889  */
6890 static void
6891 flow_fdir_info_get(struct rte_eth_dev *dev, struct rte_eth_fdir_info *fdir_info)
6892 {
6893         struct rte_eth_fdir_masks *mask =
6894                 &dev->data->dev_conf.fdir_conf.mask;
6895
6896         fdir_info->mode = dev->data->dev_conf.fdir_conf.mode;
6897         fdir_info->guarant_spc = 0;
6898         rte_memcpy(&fdir_info->mask, mask, sizeof(fdir_info->mask));
6899         fdir_info->max_flexpayload = 0;
6900         fdir_info->flow_types_mask[0] = 0;
6901         fdir_info->flex_payload_unit = 0;
6902         fdir_info->max_flex_payload_segment_num = 0;
6903         fdir_info->flex_payload_limit = 0;
6904         memset(&fdir_info->flex_conf, 0, sizeof(fdir_info->flex_conf));
6905 }
6906
6907 /**
6908  * Deal with flow director operations.
6909  *
6910  * @param dev
6911  *   Pointer to Ethernet device.
6912  * @param filter_op
6913  *   Operation to perform.
6914  * @param arg
6915  *   Pointer to operation-specific structure.
6916  *
6917  * @return
6918  *   0 on success, a negative errno value otherwise and rte_errno is set.
6919  */
6920 static int
6921 flow_fdir_ctrl_func(struct rte_eth_dev *dev, enum rte_filter_op filter_op,
6922                     void *arg)
6923 {
6924         enum rte_fdir_mode fdir_mode =
6925                 dev->data->dev_conf.fdir_conf.mode;
6926
6927         if (filter_op == RTE_ETH_FILTER_NOP)
6928                 return 0;
6929         if (fdir_mode != RTE_FDIR_MODE_PERFECT &&
6930             fdir_mode != RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
6931                 DRV_LOG(ERR, "port %u flow director mode %d not supported",
6932                         dev->data->port_id, fdir_mode);
6933                 rte_errno = EINVAL;
6934                 return -rte_errno;
6935         }
6936         switch (filter_op) {
6937         case RTE_ETH_FILTER_ADD:
6938                 return flow_fdir_filter_add(dev, arg);
6939         case RTE_ETH_FILTER_UPDATE:
6940                 return flow_fdir_filter_update(dev, arg);
6941         case RTE_ETH_FILTER_DELETE:
6942                 return flow_fdir_filter_delete(dev, arg);
6943         case RTE_ETH_FILTER_FLUSH:
6944                 flow_fdir_filter_flush(dev);
6945                 break;
6946         case RTE_ETH_FILTER_INFO:
6947                 flow_fdir_info_get(dev, arg);
6948                 break;
6949         default:
6950                 DRV_LOG(DEBUG, "port %u unknown operation %u",
6951                         dev->data->port_id, filter_op);
6952                 rte_errno = EINVAL;
6953                 return -rte_errno;
6954         }
6955         return 0;
6956 }
6957
6958 /**
6959  * Manage filter operations.
6960  *
6961  * @param dev
6962  *   Pointer to Ethernet device structure.
6963  * @param filter_type
6964  *   Filter type.
6965  * @param filter_op
6966  *   Operation to perform.
6967  * @param arg
6968  *   Pointer to operation-specific structure.
6969  *
6970  * @return
6971  *   0 on success, a negative errno value otherwise and rte_errno is set.
6972  */
6973 int
6974 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
6975                      enum rte_filter_type filter_type,
6976                      enum rte_filter_op filter_op,
6977                      void *arg)
6978 {
6979         switch (filter_type) {
6980         case RTE_ETH_FILTER_GENERIC:
6981                 if (filter_op != RTE_ETH_FILTER_GET) {
6982                         rte_errno = EINVAL;
6983                         return -rte_errno;
6984                 }
6985                 *(const void **)arg = &mlx5_flow_ops;
6986                 return 0;
6987         case RTE_ETH_FILTER_FDIR:
6988                 return flow_fdir_ctrl_func(dev, filter_op, arg);
6989         default:
6990                 DRV_LOG(ERR, "port %u filter type (%d) not supported",
6991                         dev->data->port_id, filter_type);
6992                 rte_errno = ENOTSUP;
6993                 return -rte_errno;
6994         }
6995         return 0;
6996 }
6997
6998 /**
6999  * Create the needed meter and suffix tables.
7000  *
7001  * @param[in] dev
7002  *   Pointer to Ethernet device.
7003  * @param[in] fm
7004  *   Pointer to the flow meter.
7005  *
7006  * @return
7007  *   Pointer to table set on success, NULL otherwise.
7008  */
7009 struct mlx5_meter_domains_infos *
7010 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
7011                           const struct mlx5_flow_meter *fm)
7012 {
7013         const struct mlx5_flow_driver_ops *fops;
7014
7015         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7016         return fops->create_mtr_tbls(dev, fm);
7017 }
7018
7019 /**
7020  * Destroy the meter table set.
7021  *
7022  * @param[in] dev
7023  *   Pointer to Ethernet device.
7024  * @param[in] tbl
7025  *   Pointer to the meter table set.
7026  *
7027  * @return
7028  *   0 on success.
7029  */
7030 int
7031 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
7032                            struct mlx5_meter_domains_infos *tbls)
7033 {
7034         const struct mlx5_flow_driver_ops *fops;
7035
7036         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7037         return fops->destroy_mtr_tbls(dev, tbls);
7038 }
7039
7040 /**
7041  * Create policer rules.
7042  *
7043  * @param[in] dev
7044  *   Pointer to Ethernet device.
7045  * @param[in] fm
7046  *   Pointer to flow meter structure.
7047  * @param[in] attr
7048  *   Pointer to flow attributes.
7049  *
7050  * @return
7051  *   0 on success, -1 otherwise.
7052  */
7053 int
7054 mlx5_flow_create_policer_rules(struct rte_eth_dev *dev,
7055                                struct mlx5_flow_meter *fm,
7056                                const struct rte_flow_attr *attr)
7057 {
7058         const struct mlx5_flow_driver_ops *fops;
7059
7060         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7061         return fops->create_policer_rules(dev, fm, attr);
7062 }
7063
7064 /**
7065  * Destroy policer rules.
7066  *
7067  * @param[in] fm
7068  *   Pointer to flow meter structure.
7069  * @param[in] attr
7070  *   Pointer to flow attributes.
7071  *
7072  * @return
7073  *   0 on success, -1 otherwise.
7074  */
7075 int
7076 mlx5_flow_destroy_policer_rules(struct rte_eth_dev *dev,
7077                                 struct mlx5_flow_meter *fm,
7078                                 const struct rte_flow_attr *attr)
7079 {
7080         const struct mlx5_flow_driver_ops *fops;
7081
7082         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7083         return fops->destroy_policer_rules(dev, fm, attr);
7084 }
7085
7086 /**
7087  * Allocate a counter.
7088  *
7089  * @param[in] dev
7090  *   Pointer to Ethernet device structure.
7091  *
7092  * @return
7093  *   Index to allocated counter  on success, 0 otherwise.
7094  */
7095 uint32_t
7096 mlx5_counter_alloc(struct rte_eth_dev *dev)
7097 {
7098         const struct mlx5_flow_driver_ops *fops;
7099         struct rte_flow_attr attr = { .transfer = 0 };
7100
7101         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7102                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7103                 return fops->counter_alloc(dev);
7104         }
7105         DRV_LOG(ERR,
7106                 "port %u counter allocate is not supported.",
7107                  dev->data->port_id);
7108         return 0;
7109 }
7110
7111 /**
7112  * Free a counter.
7113  *
7114  * @param[in] dev
7115  *   Pointer to Ethernet device structure.
7116  * @param[in] cnt
7117  *   Index to counter to be free.
7118  */
7119 void
7120 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
7121 {
7122         const struct mlx5_flow_driver_ops *fops;
7123         struct rte_flow_attr attr = { .transfer = 0 };
7124
7125         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7126                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7127                 fops->counter_free(dev, cnt);
7128                 return;
7129         }
7130         DRV_LOG(ERR,
7131                 "port %u counter free is not supported.",
7132                  dev->data->port_id);
7133 }
7134
7135 /**
7136  * Query counter statistics.
7137  *
7138  * @param[in] dev
7139  *   Pointer to Ethernet device structure.
7140  * @param[in] cnt
7141  *   Index to counter to query.
7142  * @param[in] clear
7143  *   Set to clear counter statistics.
7144  * @param[out] pkts
7145  *   The counter hits packets number to save.
7146  * @param[out] bytes
7147  *   The counter hits bytes number to save.
7148  *
7149  * @return
7150  *   0 on success, a negative errno value otherwise.
7151  */
7152 int
7153 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
7154                    bool clear, uint64_t *pkts, uint64_t *bytes)
7155 {
7156         const struct mlx5_flow_driver_ops *fops;
7157         struct rte_flow_attr attr = { .transfer = 0 };
7158
7159         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7160                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7161                 return fops->counter_query(dev, cnt, clear, pkts, bytes);
7162         }
7163         DRV_LOG(ERR,
7164                 "port %u counter query is not supported.",
7165                  dev->data->port_id);
7166         return -ENOTSUP;
7167 }
7168
7169 /**
7170  * Allocate a new memory for the counter values wrapped by all the needed
7171  * management.
7172  *
7173  * @param[in] sh
7174  *   Pointer to mlx5_dev_ctx_shared object.
7175  *
7176  * @return
7177  *   0 on success, a negative errno value otherwise.
7178  */
7179 static int
7180 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh)
7181 {
7182         struct mlx5_devx_mkey_attr mkey_attr;
7183         struct mlx5_counter_stats_mem_mng *mem_mng;
7184         volatile struct flow_counter_stats *raw_data;
7185         int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES;
7186         int size = (sizeof(struct flow_counter_stats) *
7187                         MLX5_COUNTERS_PER_POOL +
7188                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
7189                         sizeof(struct mlx5_counter_stats_mem_mng);
7190         size_t pgsize = rte_mem_page_size();
7191         uint8_t *mem;
7192         int i;
7193
7194         if (pgsize == (size_t)-1) {
7195                 DRV_LOG(ERR, "Failed to get mem page size");
7196                 rte_errno = ENOMEM;
7197                 return -ENOMEM;
7198         }
7199         mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY);
7200         if (!mem) {
7201                 rte_errno = ENOMEM;
7202                 return -ENOMEM;
7203         }
7204         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
7205         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
7206         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
7207                                                  IBV_ACCESS_LOCAL_WRITE);
7208         if (!mem_mng->umem) {
7209                 rte_errno = errno;
7210                 mlx5_free(mem);
7211                 return -rte_errno;
7212         }
7213         mkey_attr.addr = (uintptr_t)mem;
7214         mkey_attr.size = size;
7215         mkey_attr.umem_id = mlx5_os_get_umem_id(mem_mng->umem);
7216         mkey_attr.pd = sh->pdn;
7217         mkey_attr.log_entity_size = 0;
7218         mkey_attr.pg_access = 0;
7219         mkey_attr.klm_array = NULL;
7220         mkey_attr.klm_num = 0;
7221         mkey_attr.relaxed_ordering = sh->cmng.relaxed_ordering;
7222         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
7223         if (!mem_mng->dm) {
7224                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
7225                 rte_errno = errno;
7226                 mlx5_free(mem);
7227                 return -rte_errno;
7228         }
7229         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
7230         raw_data = (volatile struct flow_counter_stats *)mem;
7231         for (i = 0; i < raws_n; ++i) {
7232                 mem_mng->raws[i].mem_mng = mem_mng;
7233                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
7234         }
7235         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
7236                 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws,
7237                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i,
7238                                  next);
7239         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
7240         sh->cmng.mem_mng = mem_mng;
7241         return 0;
7242 }
7243
7244 /**
7245  * Set the statistic memory to the new counter pool.
7246  *
7247  * @param[in] sh
7248  *   Pointer to mlx5_dev_ctx_shared object.
7249  * @param[in] pool
7250  *   Pointer to the pool to set the statistic memory.
7251  *
7252  * @return
7253  *   0 on success, a negative errno value otherwise.
7254  */
7255 static int
7256 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh,
7257                                struct mlx5_flow_counter_pool *pool)
7258 {
7259         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7260         /* Resize statistic memory once used out. */
7261         if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) &&
7262             mlx5_flow_create_counter_stat_mem_mng(sh)) {
7263                 DRV_LOG(ERR, "Cannot resize counter stat mem.");
7264                 return -1;
7265         }
7266         rte_spinlock_lock(&pool->sl);
7267         pool->raw = cmng->mem_mng->raws + pool->index %
7268                     MLX5_CNT_CONTAINER_RESIZE;
7269         rte_spinlock_unlock(&pool->sl);
7270         pool->raw_hw = NULL;
7271         return 0;
7272 }
7273
7274 #define MLX5_POOL_QUERY_FREQ_US 1000000
7275
7276 /**
7277  * Set the periodic procedure for triggering asynchronous batch queries for all
7278  * the counter pools.
7279  *
7280  * @param[in] sh
7281  *   Pointer to mlx5_dev_ctx_shared object.
7282  */
7283 void
7284 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh)
7285 {
7286         uint32_t pools_n, us;
7287
7288         pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED);
7289         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
7290         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
7291         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
7292                 sh->cmng.query_thread_on = 0;
7293                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
7294         } else {
7295                 sh->cmng.query_thread_on = 1;
7296         }
7297 }
7298
7299 /**
7300  * The periodic procedure for triggering asynchronous batch queries for all the
7301  * counter pools. This function is probably called by the host thread.
7302  *
7303  * @param[in] arg
7304  *   The parameter for the alarm process.
7305  */
7306 void
7307 mlx5_flow_query_alarm(void *arg)
7308 {
7309         struct mlx5_dev_ctx_shared *sh = arg;
7310         int ret;
7311         uint16_t pool_index = sh->cmng.pool_index;
7312         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7313         struct mlx5_flow_counter_pool *pool;
7314         uint16_t n_valid;
7315
7316         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
7317                 goto set_alarm;
7318         rte_spinlock_lock(&cmng->pool_update_sl);
7319         pool = cmng->pools[pool_index];
7320         n_valid = cmng->n_valid;
7321         rte_spinlock_unlock(&cmng->pool_update_sl);
7322         /* Set the statistic memory to the new created pool. */
7323         if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool)))
7324                 goto set_alarm;
7325         if (pool->raw_hw)
7326                 /* There is a pool query in progress. */
7327                 goto set_alarm;
7328         pool->raw_hw =
7329                 LIST_FIRST(&sh->cmng.free_stat_raws);
7330         if (!pool->raw_hw)
7331                 /* No free counter statistics raw memory. */
7332                 goto set_alarm;
7333         /*
7334          * Identify the counters released between query trigger and query
7335          * handle more efficiently. The counter released in this gap period
7336          * should wait for a new round of query as the new arrived packets
7337          * will not be taken into account.
7338          */
7339         pool->query_gen++;
7340         ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0,
7341                                                MLX5_COUNTERS_PER_POOL,
7342                                                NULL, NULL,
7343                                                pool->raw_hw->mem_mng->dm->id,
7344                                                (void *)(uintptr_t)
7345                                                pool->raw_hw->data,
7346                                                sh->devx_comp,
7347                                                (uint64_t)(uintptr_t)pool);
7348         if (ret) {
7349                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
7350                         " %d", pool->min_dcs->id);
7351                 pool->raw_hw = NULL;
7352                 goto set_alarm;
7353         }
7354         LIST_REMOVE(pool->raw_hw, next);
7355         sh->cmng.pending_queries++;
7356         pool_index++;
7357         if (pool_index >= n_valid)
7358                 pool_index = 0;
7359 set_alarm:
7360         sh->cmng.pool_index = pool_index;
7361         mlx5_set_query_alarm(sh);
7362 }
7363
7364 /**
7365  * Check and callback event for new aged flow in the counter pool
7366  *
7367  * @param[in] sh
7368  *   Pointer to mlx5_dev_ctx_shared object.
7369  * @param[in] pool
7370  *   Pointer to Current counter pool.
7371  */
7372 static void
7373 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh,
7374                    struct mlx5_flow_counter_pool *pool)
7375 {
7376         struct mlx5_priv *priv;
7377         struct mlx5_flow_counter *cnt;
7378         struct mlx5_age_info *age_info;
7379         struct mlx5_age_param *age_param;
7380         struct mlx5_counter_stats_raw *cur = pool->raw_hw;
7381         struct mlx5_counter_stats_raw *prev = pool->raw;
7382         const uint64_t curr_time = MLX5_CURR_TIME_SEC;
7383         const uint32_t time_delta = curr_time - pool->time_of_last_age_check;
7384         uint16_t expected = AGE_CANDIDATE;
7385         uint32_t i;
7386
7387         pool->time_of_last_age_check = curr_time;
7388         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
7389                 cnt = MLX5_POOL_GET_CNT(pool, i);
7390                 age_param = MLX5_CNT_TO_AGE(cnt);
7391                 if (__atomic_load_n(&age_param->state,
7392                                     __ATOMIC_RELAXED) != AGE_CANDIDATE)
7393                         continue;
7394                 if (cur->data[i].hits != prev->data[i].hits) {
7395                         __atomic_store_n(&age_param->sec_since_last_hit, 0,
7396                                          __ATOMIC_RELAXED);
7397                         continue;
7398                 }
7399                 if (__atomic_add_fetch(&age_param->sec_since_last_hit,
7400                                        time_delta,
7401                                        __ATOMIC_RELAXED) <= age_param->timeout)
7402                         continue;
7403                 /**
7404                  * Hold the lock first, or if between the
7405                  * state AGE_TMOUT and tailq operation the
7406                  * release happened, the release procedure
7407                  * may delete a non-existent tailq node.
7408                  */
7409                 priv = rte_eth_devices[age_param->port_id].data->dev_private;
7410                 age_info = GET_PORT_AGE_INFO(priv);
7411                 rte_spinlock_lock(&age_info->aged_sl);
7412                 if (__atomic_compare_exchange_n(&age_param->state, &expected,
7413                                                 AGE_TMOUT, false,
7414                                                 __ATOMIC_RELAXED,
7415                                                 __ATOMIC_RELAXED)) {
7416                         TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next);
7417                         MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW);
7418                 }
7419                 rte_spinlock_unlock(&age_info->aged_sl);
7420         }
7421         for (i = 0; i < sh->max_port; i++) {
7422                 age_info = &sh->port[i].age_info;
7423                 if (!MLX5_AGE_GET(age_info, MLX5_AGE_EVENT_NEW))
7424                         continue;
7425                 if (MLX5_AGE_GET(age_info, MLX5_AGE_TRIGGER))
7426                         rte_eth_dev_callback_process
7427                                 (&rte_eth_devices[sh->port[i].devx_ih_port_id],
7428                                 RTE_ETH_EVENT_FLOW_AGED, NULL);
7429                 age_info->flags = 0;
7430         }
7431 }
7432
7433 /**
7434  * Handler for the HW respond about ready values from an asynchronous batch
7435  * query. This function is probably called by the host thread.
7436  *
7437  * @param[in] sh
7438  *   The pointer to the shared device context.
7439  * @param[in] async_id
7440  *   The Devx async ID.
7441  * @param[in] status
7442  *   The status of the completion.
7443  */
7444 void
7445 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
7446                                   uint64_t async_id, int status)
7447 {
7448         struct mlx5_flow_counter_pool *pool =
7449                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
7450         struct mlx5_counter_stats_raw *raw_to_free;
7451         uint8_t query_gen = pool->query_gen ^ 1;
7452         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7453         enum mlx5_counter_type cnt_type =
7454                 pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
7455                                 MLX5_COUNTER_TYPE_ORIGIN;
7456
7457         if (unlikely(status)) {
7458                 raw_to_free = pool->raw_hw;
7459         } else {
7460                 raw_to_free = pool->raw;
7461                 if (pool->is_aged)
7462                         mlx5_flow_aging_check(sh, pool);
7463                 rte_spinlock_lock(&pool->sl);
7464                 pool->raw = pool->raw_hw;
7465                 rte_spinlock_unlock(&pool->sl);
7466                 /* Be sure the new raw counters data is updated in memory. */
7467                 rte_io_wmb();
7468                 if (!TAILQ_EMPTY(&pool->counters[query_gen])) {
7469                         rte_spinlock_lock(&cmng->csl[cnt_type]);
7470                         TAILQ_CONCAT(&cmng->counters[cnt_type],
7471                                      &pool->counters[query_gen], next);
7472                         rte_spinlock_unlock(&cmng->csl[cnt_type]);
7473                 }
7474         }
7475         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
7476         pool->raw_hw = NULL;
7477         sh->cmng.pending_queries--;
7478 }
7479
7480 static const struct mlx5_flow_tbl_data_entry  *
7481 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark)
7482 {
7483         struct mlx5_priv *priv = dev->data->dev_private;
7484         struct mlx5_dev_ctx_shared *sh = priv->sh;
7485         struct mlx5_hlist_entry *he;
7486         union tunnel_offload_mark mbits = { .val = mark };
7487         union mlx5_flow_tbl_key table_key = {
7488                 {
7489                         .table_id = tunnel_id_to_flow_tbl(mbits.table_id),
7490                         .reserved = 0,
7491                         .domain = !!mbits.transfer,
7492                         .direction = 0,
7493                 }
7494         };
7495         he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64);
7496         return he ?
7497                container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL;
7498 }
7499
7500 static uint32_t
7501 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
7502                                 const struct mlx5_flow_tunnel *tunnel,
7503                                 uint32_t group, uint32_t *table,
7504                                 struct rte_flow_error *error)
7505 {
7506         struct mlx5_hlist_entry *he;
7507         struct tunnel_tbl_entry *tte;
7508         union tunnel_tbl_key key = {
7509                 .tunnel_id = tunnel ? tunnel->tunnel_id : 0,
7510                 .group = group
7511         };
7512         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
7513         struct mlx5_hlist *group_hash;
7514
7515         group_hash = tunnel ? tunnel->groups : thub->groups;
7516         he = mlx5_hlist_lookup(group_hash, key.val);
7517         if (!he) {
7518                 int ret;
7519                 tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
7520                                   sizeof(*tte), 0,
7521                                   SOCKET_ID_ANY);
7522                 if (!tte)
7523                         goto err;
7524                 tte->hash.key = key.val;
7525                 ret = mlx5_flow_id_get(thub->table_ids, &tte->flow_table);
7526                 if (ret) {
7527                         mlx5_free(tte);
7528                         goto err;
7529                 }
7530                 tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table);
7531                 mlx5_hlist_insert(group_hash, &tte->hash);
7532         } else {
7533                 tte = container_of(he, typeof(*tte), hash);
7534         }
7535         *table = tte->flow_table;
7536         DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x",
7537                 dev->data->port_id, key.tunnel_id, group, *table);
7538         return 0;
7539
7540 err:
7541         return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
7542                                   NULL, "tunnel group index not supported");
7543 }
7544
7545 static int
7546 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table,
7547                     struct flow_grp_info grp_info, struct rte_flow_error *error)
7548 {
7549         if (grp_info.transfer && grp_info.external && grp_info.fdb_def_rule) {
7550                 if (group == UINT32_MAX)
7551                         return rte_flow_error_set
7552                                                 (error, EINVAL,
7553                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
7554                                                  NULL,
7555                                                  "group index not supported");
7556                 *table = group + 1;
7557         } else {
7558                 *table = group;
7559         }
7560         DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table);
7561         return 0;
7562 }
7563
7564 /**
7565  * Translate the rte_flow group index to HW table value.
7566  *
7567  * If tunnel offload is disabled, all group ids converted to flow table
7568  * id using the standard method.
7569  * If tunnel offload is enabled, group id can be converted using the
7570  * standard or tunnel conversion method. Group conversion method
7571  * selection depends on flags in `grp_info` parameter:
7572  * - Internal (grp_info.external == 0) groups conversion uses the
7573  *   standard method.
7574  * - Group ids in JUMP action converted with the tunnel conversion.
7575  * - Group id in rule attribute conversion depends on a rule type and
7576  *   group id value:
7577  *   ** non zero group attributes converted with the tunnel method
7578  *   ** zero group attribute in non-tunnel rule is converted using the
7579  *      standard method - there's only one root table
7580  *   ** zero group attribute in steer tunnel rule is converted with the
7581  *      standard method - single root table
7582  *   ** zero group attribute in match tunnel rule is a special OvS
7583  *      case: that value is used for portability reasons. That group
7584  *      id is converted with the tunnel conversion method.
7585  *
7586  * @param[in] dev
7587  *   Port device
7588  * @param[in] tunnel
7589  *   PMD tunnel offload object
7590  * @param[in] group
7591  *   rte_flow group index value.
7592  * @param[out] table
7593  *   HW table value.
7594  * @param[in] grp_info
7595  *   flags used for conversion
7596  * @param[out] error
7597  *   Pointer to error structure.
7598  *
7599  * @return
7600  *   0 on success, a negative errno value otherwise and rte_errno is set.
7601  */
7602 int
7603 mlx5_flow_group_to_table(struct rte_eth_dev *dev,
7604                          const struct mlx5_flow_tunnel *tunnel,
7605                          uint32_t group, uint32_t *table,
7606                          struct flow_grp_info grp_info,
7607                          struct rte_flow_error *error)
7608 {
7609         int ret;
7610         bool standard_translation;
7611
7612         if (grp_info.external && group < MLX5_MAX_TABLES_EXTERNAL)
7613                 group *= MLX5_FLOW_TABLE_FACTOR;
7614         if (is_tunnel_offload_active(dev)) {
7615                 standard_translation = !grp_info.external ||
7616                                         grp_info.std_tbl_fix;
7617         } else {
7618                 standard_translation = true;
7619         }
7620         DRV_LOG(DEBUG,
7621                 "port %u group=%#x transfer=%d external=%d fdb_def_rule=%d translate=%s",
7622                 dev->data->port_id, group, grp_info.transfer,
7623                 grp_info.external, grp_info.fdb_def_rule,
7624                 standard_translation ? "STANDARD" : "TUNNEL");
7625         if (standard_translation)
7626                 ret = flow_group_to_table(dev->data->port_id, group, table,
7627                                           grp_info, error);
7628         else
7629                 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group,
7630                                                       table, error);
7631
7632         return ret;
7633 }
7634
7635 /**
7636  * Discover availability of metadata reg_c's.
7637  *
7638  * Iteratively use test flows to check availability.
7639  *
7640  * @param[in] dev
7641  *   Pointer to the Ethernet device structure.
7642  *
7643  * @return
7644  *   0 on success, a negative errno value otherwise and rte_errno is set.
7645  */
7646 int
7647 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
7648 {
7649         struct mlx5_priv *priv = dev->data->dev_private;
7650         struct mlx5_dev_config *config = &priv->config;
7651         enum modify_reg idx;
7652         int n = 0;
7653
7654         /* reg_c[0] and reg_c[1] are reserved. */
7655         config->flow_mreg_c[n++] = REG_C_0;
7656         config->flow_mreg_c[n++] = REG_C_1;
7657         /* Discover availability of other reg_c's. */
7658         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
7659                 struct rte_flow_attr attr = {
7660                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
7661                         .priority = MLX5_FLOW_PRIO_RSVD,
7662                         .ingress = 1,
7663                 };
7664                 struct rte_flow_item items[] = {
7665                         [0] = {
7666                                 .type = RTE_FLOW_ITEM_TYPE_END,
7667                         },
7668                 };
7669                 struct rte_flow_action actions[] = {
7670                         [0] = {
7671                                 .type = (enum rte_flow_action_type)
7672                                         MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
7673                                 .conf = &(struct mlx5_flow_action_copy_mreg){
7674                                         .src = REG_C_1,
7675                                         .dst = idx,
7676                                 },
7677                         },
7678                         [1] = {
7679                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
7680                                 .conf = &(struct rte_flow_action_jump){
7681                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
7682                                 },
7683                         },
7684                         [2] = {
7685                                 .type = RTE_FLOW_ACTION_TYPE_END,
7686                         },
7687                 };
7688                 uint32_t flow_idx;
7689                 struct rte_flow *flow;
7690                 struct rte_flow_error error;
7691
7692                 if (!config->dv_flow_en)
7693                         break;
7694                 /* Create internal flow, validation skips copy action. */
7695                 flow_idx = flow_list_create(dev, NULL, &attr, items,
7696                                             actions, false, &error);
7697                 flow = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW],
7698                                       flow_idx);
7699                 if (!flow)
7700                         continue;
7701                 if (dev->data->dev_started || !flow_drv_apply(dev, flow, NULL))
7702                         config->flow_mreg_c[n++] = idx;
7703                 flow_list_destroy(dev, NULL, flow_idx);
7704         }
7705         for (; n < MLX5_MREG_C_NUM; ++n)
7706                 config->flow_mreg_c[n] = REG_NON;
7707         return 0;
7708 }
7709
7710 /**
7711  * Dump flow raw hw data to file
7712  *
7713  * @param[in] dev
7714  *    The pointer to Ethernet device.
7715  * @param[in] file
7716  *   A pointer to a file for output.
7717  * @param[out] error
7718  *   Perform verbose error reporting if not NULL. PMDs initialize this
7719  *   structure in case of error only.
7720  * @return
7721  *   0 on success, a nagative value otherwise.
7722  */
7723 int
7724 mlx5_flow_dev_dump(struct rte_eth_dev *dev,
7725                    FILE *file,
7726                    struct rte_flow_error *error __rte_unused)
7727 {
7728         struct mlx5_priv *priv = dev->data->dev_private;
7729         struct mlx5_dev_ctx_shared *sh = priv->sh;
7730
7731         if (!priv->config.dv_flow_en) {
7732                 if (fputs("device dv flow disabled\n", file) <= 0)
7733                         return -errno;
7734                 return -ENOTSUP;
7735         }
7736         return mlx5_devx_cmd_flow_dump(sh->fdb_domain, sh->rx_domain,
7737                                        sh->tx_domain, file);
7738 }
7739
7740 /**
7741  * Get aged-out flows.
7742  *
7743  * @param[in] dev
7744  *   Pointer to the Ethernet device structure.
7745  * @param[in] context
7746  *   The address of an array of pointers to the aged-out flows contexts.
7747  * @param[in] nb_countexts
7748  *   The length of context array pointers.
7749  * @param[out] error
7750  *   Perform verbose error reporting if not NULL. Initialized in case of
7751  *   error only.
7752  *
7753  * @return
7754  *   how many contexts get in success, otherwise negative errno value.
7755  *   if nb_contexts is 0, return the amount of all aged contexts.
7756  *   if nb_contexts is not 0 , return the amount of aged flows reported
7757  *   in the context array.
7758  */
7759 int
7760 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
7761                         uint32_t nb_contexts, struct rte_flow_error *error)
7762 {
7763         const struct mlx5_flow_driver_ops *fops;
7764         struct rte_flow_attr attr = { .transfer = 0 };
7765
7766         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7767                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7768                 return fops->get_aged_flows(dev, contexts, nb_contexts,
7769                                                     error);
7770         }
7771         DRV_LOG(ERR,
7772                 "port %u get aged flows is not supported.",
7773                  dev->data->port_id);
7774         return -ENOTSUP;
7775 }
7776
7777 /* Wrapper for driver action_validate op callback */
7778 static int
7779 flow_drv_action_validate(struct rte_eth_dev *dev,
7780                          const struct rte_flow_shared_action_conf *conf,
7781                          const struct rte_flow_action *action,
7782                          const struct mlx5_flow_driver_ops *fops,
7783                          struct rte_flow_error *error)
7784 {
7785         static const char err_msg[] = "shared action validation unsupported";
7786
7787         if (!fops->action_validate) {
7788                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7789                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7790                                    NULL, err_msg);
7791                 return -rte_errno;
7792         }
7793         return fops->action_validate(dev, conf, action, error);
7794 }
7795
7796 /**
7797  * Destroys the shared action by handle.
7798  *
7799  * @param dev
7800  *   Pointer to Ethernet device structure.
7801  * @param[in] action
7802  *   Handle for the shared action to be destroyed.
7803  * @param[out] error
7804  *   Perform verbose error reporting if not NULL. PMDs initialize this
7805  *   structure in case of error only.
7806  *
7807  * @return
7808  *   0 on success, a negative errno value otherwise and rte_errno is set.
7809  *
7810  * @note: wrapper for driver action_create op callback.
7811  */
7812 static int
7813 mlx5_shared_action_destroy(struct rte_eth_dev *dev,
7814                            struct rte_flow_shared_action *action,
7815                            struct rte_flow_error *error)
7816 {
7817         static const char err_msg[] = "shared action destruction unsupported";
7818         struct rte_flow_attr attr = { .transfer = 0 };
7819         const struct mlx5_flow_driver_ops *fops =
7820                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7821
7822         if (!fops->action_destroy) {
7823                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7824                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7825                                    NULL, err_msg);
7826                 return -rte_errno;
7827         }
7828         return fops->action_destroy(dev, action, error);
7829 }
7830
7831 /* Wrapper for driver action_destroy op callback */
7832 static int
7833 flow_drv_action_update(struct rte_eth_dev *dev,
7834                        struct rte_flow_shared_action *action,
7835                        const void *action_conf,
7836                        const struct mlx5_flow_driver_ops *fops,
7837                        struct rte_flow_error *error)
7838 {
7839         static const char err_msg[] = "shared action update unsupported";
7840
7841         if (!fops->action_update) {
7842                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7843                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7844                                    NULL, err_msg);
7845                 return -rte_errno;
7846         }
7847         return fops->action_update(dev, action, action_conf, error);
7848 }
7849
7850 /**
7851  * Create shared action for reuse in multiple flow rules.
7852  *
7853  * @param dev
7854  *   Pointer to Ethernet device structure.
7855  * @param[in] action
7856  *   Action configuration for shared action creation.
7857  * @param[out] error
7858  *   Perform verbose error reporting if not NULL. PMDs initialize this
7859  *   structure in case of error only.
7860  * @return
7861  *   A valid handle in case of success, NULL otherwise and rte_errno is set.
7862  */
7863 static struct rte_flow_shared_action *
7864 mlx5_shared_action_create(struct rte_eth_dev *dev,
7865                           const struct rte_flow_shared_action_conf *conf,
7866                           const struct rte_flow_action *action,
7867                           struct rte_flow_error *error)
7868 {
7869         static const char err_msg[] = "shared action creation unsupported";
7870         struct rte_flow_attr attr = { .transfer = 0 };
7871         const struct mlx5_flow_driver_ops *fops =
7872                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7873
7874         if (flow_drv_action_validate(dev, conf, action, fops, error))
7875                 return NULL;
7876         if (!fops->action_create) {
7877                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7878                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7879                                    NULL, err_msg);
7880                 return NULL;
7881         }
7882         return fops->action_create(dev, conf, action, error);
7883 }
7884
7885 /**
7886  * Updates inplace the shared action configuration pointed by *action* handle
7887  * with the configuration provided as *action* argument.
7888  * The update of the shared action configuration effects all flow rules reusing
7889  * the action via handle.
7890  *
7891  * @param dev
7892  *   Pointer to Ethernet device structure.
7893  * @param[in] shared_action
7894  *   Handle for the shared action to be updated.
7895  * @param[in] action
7896  *   Action specification used to modify the action pointed by handle.
7897  *   *action* should be of same type with the action pointed by the *action*
7898  *   handle argument, otherwise considered as invalid.
7899  * @param[out] error
7900  *   Perform verbose error reporting if not NULL. PMDs initialize this
7901  *   structure in case of error only.
7902  *
7903  * @return
7904  *   0 on success, a negative errno value otherwise and rte_errno is set.
7905  */
7906 static int
7907 mlx5_shared_action_update(struct rte_eth_dev *dev,
7908                 struct rte_flow_shared_action *shared_action,
7909                 const struct rte_flow_action *action,
7910                 struct rte_flow_error *error)
7911 {
7912         struct rte_flow_attr attr = { .transfer = 0 };
7913         const struct mlx5_flow_driver_ops *fops =
7914                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7915         int ret;
7916
7917         switch (shared_action->type) {
7918         case MLX5_RTE_FLOW_ACTION_TYPE_SHARED_RSS:
7919                 if (action->type != RTE_FLOW_ACTION_TYPE_RSS) {
7920                         return rte_flow_error_set(error, EINVAL,
7921                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7922                                                   NULL,
7923                                                   "update action type invalid");
7924                 }
7925                 ret = flow_drv_action_validate(dev, NULL, action, fops, error);
7926                 if (ret)
7927                         return ret;
7928                 return flow_drv_action_update(dev, shared_action, action->conf,
7929                                               fops, error);
7930         default:
7931                 return rte_flow_error_set(error, ENOTSUP,
7932                                           RTE_FLOW_ERROR_TYPE_ACTION,
7933                                           NULL,
7934                                           "action type not supported");
7935         }
7936 }
7937
7938 /**
7939  * Query the shared action by handle.
7940  *
7941  * This function allows retrieving action-specific data such as counters.
7942  * Data is gathered by special action which may be present/referenced in
7943  * more than one flow rule definition.
7944  *
7945  * \see RTE_FLOW_ACTION_TYPE_COUNT
7946  *
7947  * @param dev
7948  *   Pointer to Ethernet device structure.
7949  * @param[in] action
7950  *   Handle for the shared action to query.
7951  * @param[in, out] data
7952  *   Pointer to storage for the associated query data type.
7953  * @param[out] error
7954  *   Perform verbose error reporting if not NULL. PMDs initialize this
7955  *   structure in case of error only.
7956  *
7957  * @return
7958  *   0 on success, a negative errno value otherwise and rte_errno is set.
7959  */
7960 static int
7961 mlx5_shared_action_query(struct rte_eth_dev *dev,
7962                          const struct rte_flow_shared_action *action,
7963                          void *data,
7964                          struct rte_flow_error *error)
7965 {
7966         (void)dev;
7967         switch (action->type) {
7968         case MLX5_RTE_FLOW_ACTION_TYPE_SHARED_RSS:
7969                 __atomic_load(&action->refcnt, (uint32_t *)data,
7970                               __ATOMIC_RELAXED);
7971                 return 0;
7972         default:
7973                 return rte_flow_error_set(error, ENOTSUP,
7974                                           RTE_FLOW_ERROR_TYPE_ACTION,
7975                                           NULL,
7976                                           "action type not supported");
7977         }
7978 }
7979
7980 /**
7981  * Destroy all shared actions.
7982  *
7983  * @param dev
7984  *   Pointer to Ethernet device.
7985  *
7986  * @return
7987  *   0 on success, a negative errno value otherwise and rte_errno is set.
7988  */
7989 int
7990 mlx5_shared_action_flush(struct rte_eth_dev *dev)
7991 {
7992         struct rte_flow_error error;
7993         struct mlx5_priv *priv = dev->data->dev_private;
7994         struct rte_flow_shared_action *action;
7995         int ret = 0;
7996
7997         while (!LIST_EMPTY(&priv->shared_actions)) {
7998                 action = LIST_FIRST(&priv->shared_actions);
7999                 ret = mlx5_shared_action_destroy(dev, action, &error);
8000         }
8001         return ret;
8002 }
8003
8004 static void
8005 mlx5_flow_tunnel_free(struct rte_eth_dev *dev,
8006                       struct mlx5_flow_tunnel *tunnel)
8007 {
8008         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8009         struct mlx5_flow_id_pool *id_pool = thub->tunnel_ids;
8010
8011         DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x",
8012                 dev->data->port_id, tunnel->tunnel_id);
8013         RTE_VERIFY(!__atomic_load_n(&tunnel->refctn, __ATOMIC_RELAXED));
8014         LIST_REMOVE(tunnel, chain);
8015         mlx5_flow_id_release(id_pool, tunnel->tunnel_id);
8016         mlx5_hlist_destroy(tunnel->groups, NULL, NULL);
8017         mlx5_free(tunnel);
8018 }
8019
8020 static struct mlx5_flow_tunnel *
8021 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id)
8022 {
8023         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8024         struct mlx5_flow_tunnel *tun;
8025
8026         LIST_FOREACH(tun, &thub->tunnels, chain) {
8027                 if (tun->tunnel_id == id)
8028                         break;
8029         }
8030
8031         return tun;
8032 }
8033
8034 static struct mlx5_flow_tunnel *
8035 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev,
8036                           const struct rte_flow_tunnel *app_tunnel)
8037 {
8038         int ret;
8039         struct mlx5_flow_tunnel *tunnel;
8040         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8041         struct mlx5_flow_id_pool *id_pool = thub->tunnel_ids;
8042         uint32_t id;
8043
8044         ret = mlx5_flow_id_get(id_pool, &id);
8045         if (ret)
8046                 return NULL;
8047         /**
8048          * mlx5 flow tunnel is an auxlilary data structure
8049          * It's not part of IO. No need to allocate it from
8050          * huge pages pools dedicated for IO
8051          */
8052         tunnel = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*tunnel),
8053                              0, SOCKET_ID_ANY);
8054         if (!tunnel) {
8055                 mlx5_flow_id_pool_release(id_pool);
8056                 return NULL;
8057         }
8058         tunnel->groups = mlx5_hlist_create("tunnel groups", 1024);
8059         if (!tunnel->groups) {
8060                 mlx5_flow_id_pool_release(id_pool);
8061                 mlx5_free(tunnel);
8062                 return NULL;
8063         }
8064         /* initiate new PMD tunnel */
8065         memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel));
8066         tunnel->tunnel_id = id;
8067         tunnel->action.type = (typeof(tunnel->action.type))
8068                               MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET;
8069         tunnel->action.conf = tunnel;
8070         tunnel->item.type = (typeof(tunnel->item.type))
8071                             MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL;
8072         tunnel->item.spec = tunnel;
8073         tunnel->item.last = NULL;
8074         tunnel->item.mask = NULL;
8075
8076         DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x",
8077                 dev->data->port_id, tunnel->tunnel_id);
8078
8079         return tunnel;
8080 }
8081
8082 static int
8083 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
8084                      const struct rte_flow_tunnel *app_tunnel,
8085                      struct mlx5_flow_tunnel **tunnel)
8086 {
8087         int ret;
8088         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8089         struct mlx5_flow_tunnel *tun;
8090
8091         LIST_FOREACH(tun, &thub->tunnels, chain) {
8092                 if (!memcmp(app_tunnel, &tun->app_tunnel,
8093                             sizeof(*app_tunnel))) {
8094                         *tunnel = tun;
8095                         ret = 0;
8096                         break;
8097                 }
8098         }
8099         if (!tun) {
8100                 tun = mlx5_flow_tunnel_allocate(dev, app_tunnel);
8101                 if (tun) {
8102                         LIST_INSERT_HEAD(&thub->tunnels, tun, chain);
8103                         *tunnel = tun;
8104                 } else {
8105                         ret = -ENOMEM;
8106                 }
8107         }
8108         if (tun)
8109                 __atomic_add_fetch(&tun->refctn, 1, __ATOMIC_RELAXED);
8110
8111         return ret;
8112 }
8113
8114 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id)
8115 {
8116         struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
8117
8118         if (!thub)
8119                 return;
8120         if (!LIST_EMPTY(&thub->tunnels))
8121                 DRV_LOG(WARNING, "port %u tunnels present\n", port_id);
8122         mlx5_flow_id_pool_release(thub->tunnel_ids);
8123         mlx5_flow_id_pool_release(thub->table_ids);
8124         mlx5_hlist_destroy(thub->groups, NULL, NULL);
8125         mlx5_free(thub);
8126 }
8127
8128 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh)
8129 {
8130         int err;
8131         struct mlx5_flow_tunnel_hub *thub;
8132
8133         thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub),
8134                            0, SOCKET_ID_ANY);
8135         if (!thub)
8136                 return -ENOMEM;
8137         LIST_INIT(&thub->tunnels);
8138         thub->tunnel_ids = mlx5_flow_id_pool_alloc(MLX5_MAX_TUNNELS);
8139         if (!thub->tunnel_ids) {
8140                 err = -rte_errno;
8141                 goto err;
8142         }
8143         thub->table_ids = mlx5_flow_id_pool_alloc(MLX5_MAX_TABLES);
8144         if (!thub->table_ids) {
8145                 err = -rte_errno;
8146                 goto err;
8147         }
8148         thub->groups = mlx5_hlist_create("flow groups", MLX5_MAX_TABLES);
8149         if (!thub->groups) {
8150                 err = -rte_errno;
8151                 goto err;
8152         }
8153         sh->tunnel_hub = thub;
8154
8155         return 0;
8156
8157 err:
8158         if (thub->groups)
8159                 mlx5_hlist_destroy(thub->groups, NULL, NULL);
8160         if (thub->table_ids)
8161                 mlx5_flow_id_pool_release(thub->table_ids);
8162         if (thub->tunnel_ids)
8163                 mlx5_flow_id_pool_release(thub->tunnel_ids);
8164         if (thub)
8165                 mlx5_free(thub);
8166         return err;
8167 }