net/mlx5: use meter color register for connection tracking
[dpdk.git] / drivers / net / mlx5 / mlx5_flow.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright 2016 6WIND S.A.
3  * Copyright 2016 Mellanox Technologies, Ltd
4  */
5
6 #include <stdalign.h>
7 #include <stdint.h>
8 #include <string.h>
9 #include <stdbool.h>
10 #include <sys/queue.h>
11
12 #include <rte_common.h>
13 #include <rte_ether.h>
14 #include <ethdev_driver.h>
15 #include <rte_eal_paging.h>
16 #include <rte_flow.h>
17 #include <rte_cycles.h>
18 #include <rte_flow_driver.h>
19 #include <rte_malloc.h>
20 #include <rte_ip.h>
21
22 #include <mlx5_glue.h>
23 #include <mlx5_devx_cmds.h>
24 #include <mlx5_prm.h>
25 #include <mlx5_malloc.h>
26
27 #include "mlx5_defs.h"
28 #include "mlx5.h"
29 #include "mlx5_flow.h"
30 #include "mlx5_flow_os.h"
31 #include "mlx5_rx.h"
32 #include "mlx5_tx.h"
33 #include "mlx5_common_os.h"
34 #include "rte_pmd_mlx5.h"
35
36 struct tunnel_default_miss_ctx {
37         uint16_t *queue;
38         __extension__
39         union {
40                 struct rte_flow_action_rss action_rss;
41                 struct rte_flow_action_queue miss_queue;
42                 struct rte_flow_action_jump miss_jump;
43                 uint8_t raw[0];
44         };
45 };
46
47 static int
48 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
49                              struct rte_flow *flow,
50                              const struct rte_flow_attr *attr,
51                              const struct rte_flow_action *app_actions,
52                              uint32_t flow_idx,
53                              struct tunnel_default_miss_ctx *ctx,
54                              struct rte_flow_error *error);
55 static struct mlx5_flow_tunnel *
56 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id);
57 static void
58 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel);
59 static uint32_t
60 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
61                                 const struct mlx5_flow_tunnel *tunnel,
62                                 uint32_t group, uint32_t *table,
63                                 struct rte_flow_error *error);
64
65 static struct mlx5_flow_workspace *mlx5_flow_push_thread_workspace(void);
66 static void mlx5_flow_pop_thread_workspace(void);
67
68
69 /** Device flow drivers. */
70 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
71
72 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
73
74 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
75         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
76 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
77         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
78 #endif
79         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
80         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
81 };
82
83 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */
84 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \
85         (const int []){ \
86                 __VA_ARGS__, 0, \
87         }
88
89 /** Node object of input graph for mlx5_flow_expand_rss(). */
90 struct mlx5_flow_expand_node {
91         const int *const next;
92         /**<
93          * List of next node indexes. Index 0 is interpreted as a terminator.
94          */
95         const enum rte_flow_item_type type;
96         /**< Pattern item type of current node. */
97         uint64_t rss_types;
98         /**<
99          * RSS types bit-field associated with this node
100          * (see ETH_RSS_* definitions).
101          */
102 };
103
104 /** Object returned by mlx5_flow_expand_rss(). */
105 struct mlx5_flow_expand_rss {
106         uint32_t entries;
107         /**< Number of entries @p patterns and @p priorities. */
108         struct {
109                 struct rte_flow_item *pattern; /**< Expanded pattern array. */
110                 uint32_t priority; /**< Priority offset for each expansion. */
111         } entry[];
112 };
113
114 static enum rte_flow_item_type
115 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item)
116 {
117         enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID;
118         uint16_t ether_type = 0;
119         uint16_t ether_type_m;
120         uint8_t ip_next_proto = 0;
121         uint8_t ip_next_proto_m;
122
123         if (item == NULL || item->spec == NULL)
124                 return ret;
125         switch (item->type) {
126         case RTE_FLOW_ITEM_TYPE_ETH:
127                 if (item->mask)
128                         ether_type_m = ((const struct rte_flow_item_eth *)
129                                                 (item->mask))->type;
130                 else
131                         ether_type_m = rte_flow_item_eth_mask.type;
132                 if (ether_type_m != RTE_BE16(0xFFFF))
133                         break;
134                 ether_type = ((const struct rte_flow_item_eth *)
135                                 (item->spec))->type;
136                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
137                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
138                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
139                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
140                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
141                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
142                 else
143                         ret = RTE_FLOW_ITEM_TYPE_END;
144                 break;
145         case RTE_FLOW_ITEM_TYPE_VLAN:
146                 if (item->mask)
147                         ether_type_m = ((const struct rte_flow_item_vlan *)
148                                                 (item->mask))->inner_type;
149                 else
150                         ether_type_m = rte_flow_item_vlan_mask.inner_type;
151                 if (ether_type_m != RTE_BE16(0xFFFF))
152                         break;
153                 ether_type = ((const struct rte_flow_item_vlan *)
154                                 (item->spec))->inner_type;
155                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
156                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
157                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
158                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
159                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
160                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
161                 else
162                         ret = RTE_FLOW_ITEM_TYPE_END;
163                 break;
164         case RTE_FLOW_ITEM_TYPE_IPV4:
165                 if (item->mask)
166                         ip_next_proto_m = ((const struct rte_flow_item_ipv4 *)
167                                         (item->mask))->hdr.next_proto_id;
168                 else
169                         ip_next_proto_m =
170                                 rte_flow_item_ipv4_mask.hdr.next_proto_id;
171                 if (ip_next_proto_m != 0xFF)
172                         break;
173                 ip_next_proto = ((const struct rte_flow_item_ipv4 *)
174                                 (item->spec))->hdr.next_proto_id;
175                 if (ip_next_proto == IPPROTO_UDP)
176                         ret = RTE_FLOW_ITEM_TYPE_UDP;
177                 else if (ip_next_proto == IPPROTO_TCP)
178                         ret = RTE_FLOW_ITEM_TYPE_TCP;
179                 else if (ip_next_proto == IPPROTO_IP)
180                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
181                 else if (ip_next_proto == IPPROTO_IPV6)
182                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
183                 else
184                         ret = RTE_FLOW_ITEM_TYPE_END;
185                 break;
186         case RTE_FLOW_ITEM_TYPE_IPV6:
187                 if (item->mask)
188                         ip_next_proto_m = ((const struct rte_flow_item_ipv6 *)
189                                                 (item->mask))->hdr.proto;
190                 else
191                         ip_next_proto_m =
192                                 rte_flow_item_ipv6_mask.hdr.proto;
193                 if (ip_next_proto_m != 0xFF)
194                         break;
195                 ip_next_proto = ((const struct rte_flow_item_ipv6 *)
196                                 (item->spec))->hdr.proto;
197                 if (ip_next_proto == IPPROTO_UDP)
198                         ret = RTE_FLOW_ITEM_TYPE_UDP;
199                 else if (ip_next_proto == IPPROTO_TCP)
200                         ret = RTE_FLOW_ITEM_TYPE_TCP;
201                 else if (ip_next_proto == IPPROTO_IP)
202                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
203                 else if (ip_next_proto == IPPROTO_IPV6)
204                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
205                 else
206                         ret = RTE_FLOW_ITEM_TYPE_END;
207                 break;
208         default:
209                 ret = RTE_FLOW_ITEM_TYPE_VOID;
210                 break;
211         }
212         return ret;
213 }
214
215 #define MLX5_RSS_EXP_ELT_N 8
216
217 /**
218  * Expand RSS flows into several possible flows according to the RSS hash
219  * fields requested and the driver capabilities.
220  *
221  * @param[out] buf
222  *   Buffer to store the result expansion.
223  * @param[in] size
224  *   Buffer size in bytes. If 0, @p buf can be NULL.
225  * @param[in] pattern
226  *   User flow pattern.
227  * @param[in] types
228  *   RSS types to expand (see ETH_RSS_* definitions).
229  * @param[in] graph
230  *   Input graph to expand @p pattern according to @p types.
231  * @param[in] graph_root_index
232  *   Index of root node in @p graph, typically 0.
233  *
234  * @return
235  *   A positive value representing the size of @p buf in bytes regardless of
236  *   @p size on success, a negative errno value otherwise and rte_errno is
237  *   set, the following errors are defined:
238  *
239  *   -E2BIG: graph-depth @p graph is too deep.
240  */
241 static int
242 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,
243                      const struct rte_flow_item *pattern, uint64_t types,
244                      const struct mlx5_flow_expand_node graph[],
245                      int graph_root_index)
246 {
247         const struct rte_flow_item *item;
248         const struct mlx5_flow_expand_node *node = &graph[graph_root_index];
249         const int *next_node;
250         const int *stack[MLX5_RSS_EXP_ELT_N];
251         int stack_pos = 0;
252         struct rte_flow_item flow_items[MLX5_RSS_EXP_ELT_N];
253         unsigned int i;
254         size_t lsize;
255         size_t user_pattern_size = 0;
256         void *addr = NULL;
257         const struct mlx5_flow_expand_node *next = NULL;
258         struct rte_flow_item missed_item;
259         int missed = 0;
260         int elt = 0;
261         const struct rte_flow_item *last_item = NULL;
262
263         memset(&missed_item, 0, sizeof(missed_item));
264         lsize = offsetof(struct mlx5_flow_expand_rss, entry) +
265                 MLX5_RSS_EXP_ELT_N * sizeof(buf->entry[0]);
266         if (lsize <= size) {
267                 buf->entry[0].priority = 0;
268                 buf->entry[0].pattern = (void *)&buf->entry[MLX5_RSS_EXP_ELT_N];
269                 buf->entries = 0;
270                 addr = buf->entry[0].pattern;
271         }
272         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
273                 if (item->type != RTE_FLOW_ITEM_TYPE_VOID)
274                         last_item = item;
275                 for (i = 0; node->next && node->next[i]; ++i) {
276                         next = &graph[node->next[i]];
277                         if (next->type == item->type)
278                                 break;
279                 }
280                 if (next)
281                         node = next;
282                 user_pattern_size += sizeof(*item);
283         }
284         user_pattern_size += sizeof(*item); /* Handle END item. */
285         lsize += user_pattern_size;
286         /* Copy the user pattern in the first entry of the buffer. */
287         if (lsize <= size) {
288                 rte_memcpy(addr, pattern, user_pattern_size);
289                 addr = (void *)(((uintptr_t)addr) + user_pattern_size);
290                 buf->entries = 1;
291         }
292         /* Start expanding. */
293         memset(flow_items, 0, sizeof(flow_items));
294         user_pattern_size -= sizeof(*item);
295         /*
296          * Check if the last valid item has spec set, need complete pattern,
297          * and the pattern can be used for expansion.
298          */
299         missed_item.type = mlx5_flow_expand_rss_item_complete(last_item);
300         if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) {
301                 /* Item type END indicates expansion is not required. */
302                 return lsize;
303         }
304         if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) {
305                 next = NULL;
306                 missed = 1;
307                 for (i = 0; node->next && node->next[i]; ++i) {
308                         next = &graph[node->next[i]];
309                         if (next->type == missed_item.type) {
310                                 flow_items[0].type = missed_item.type;
311                                 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
312                                 break;
313                         }
314                         next = NULL;
315                 }
316         }
317         if (next && missed) {
318                 elt = 2; /* missed item + item end. */
319                 node = next;
320                 lsize += elt * sizeof(*item) + user_pattern_size;
321                 if ((node->rss_types & types) && lsize <= size) {
322                         buf->entry[buf->entries].priority = 1;
323                         buf->entry[buf->entries].pattern = addr;
324                         buf->entries++;
325                         rte_memcpy(addr, buf->entry[0].pattern,
326                                    user_pattern_size);
327                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
328                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
329                         addr = (void *)(((uintptr_t)addr) +
330                                         elt * sizeof(*item));
331                 }
332         }
333         memset(flow_items, 0, sizeof(flow_items));
334         next_node = node->next;
335         stack[stack_pos] = next_node;
336         node = next_node ? &graph[*next_node] : NULL;
337         while (node) {
338                 flow_items[stack_pos].type = node->type;
339                 if (node->rss_types & types) {
340                         /*
341                          * compute the number of items to copy from the
342                          * expansion and copy it.
343                          * When the stack_pos is 0, there are 1 element in it,
344                          * plus the addition END item.
345                          */
346                         elt = stack_pos + 2;
347                         flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END;
348                         lsize += elt * sizeof(*item) + user_pattern_size;
349                         if (lsize <= size) {
350                                 size_t n = elt * sizeof(*item);
351
352                                 buf->entry[buf->entries].priority =
353                                         stack_pos + 1 + missed;
354                                 buf->entry[buf->entries].pattern = addr;
355                                 buf->entries++;
356                                 rte_memcpy(addr, buf->entry[0].pattern,
357                                            user_pattern_size);
358                                 addr = (void *)(((uintptr_t)addr) +
359                                                 user_pattern_size);
360                                 rte_memcpy(addr, &missed_item,
361                                            missed * sizeof(*item));
362                                 addr = (void *)(((uintptr_t)addr) +
363                                         missed * sizeof(*item));
364                                 rte_memcpy(addr, flow_items, n);
365                                 addr = (void *)(((uintptr_t)addr) + n);
366                         }
367                 }
368                 /* Go deeper. */
369                 if (node->next) {
370                         next_node = node->next;
371                         if (stack_pos++ == MLX5_RSS_EXP_ELT_N) {
372                                 rte_errno = E2BIG;
373                                 return -rte_errno;
374                         }
375                         stack[stack_pos] = next_node;
376                 } else if (*(next_node + 1)) {
377                         /* Follow up with the next possibility. */
378                         ++next_node;
379                 } else {
380                         /* Move to the next path. */
381                         if (stack_pos)
382                                 next_node = stack[--stack_pos];
383                         next_node++;
384                         stack[stack_pos] = next_node;
385                 }
386                 node = *next_node ? &graph[*next_node] : NULL;
387         };
388         return lsize;
389 }
390
391 enum mlx5_expansion {
392         MLX5_EXPANSION_ROOT,
393         MLX5_EXPANSION_ROOT_OUTER,
394         MLX5_EXPANSION_ROOT_ETH_VLAN,
395         MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
396         MLX5_EXPANSION_OUTER_ETH,
397         MLX5_EXPANSION_OUTER_ETH_VLAN,
398         MLX5_EXPANSION_OUTER_VLAN,
399         MLX5_EXPANSION_OUTER_IPV4,
400         MLX5_EXPANSION_OUTER_IPV4_UDP,
401         MLX5_EXPANSION_OUTER_IPV4_TCP,
402         MLX5_EXPANSION_OUTER_IPV6,
403         MLX5_EXPANSION_OUTER_IPV6_UDP,
404         MLX5_EXPANSION_OUTER_IPV6_TCP,
405         MLX5_EXPANSION_VXLAN,
406         MLX5_EXPANSION_VXLAN_GPE,
407         MLX5_EXPANSION_GRE,
408         MLX5_EXPANSION_MPLS,
409         MLX5_EXPANSION_ETH,
410         MLX5_EXPANSION_ETH_VLAN,
411         MLX5_EXPANSION_VLAN,
412         MLX5_EXPANSION_IPV4,
413         MLX5_EXPANSION_IPV4_UDP,
414         MLX5_EXPANSION_IPV4_TCP,
415         MLX5_EXPANSION_IPV6,
416         MLX5_EXPANSION_IPV6_UDP,
417         MLX5_EXPANSION_IPV6_TCP,
418 };
419
420 /** Supported expansion of items. */
421 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
422         [MLX5_EXPANSION_ROOT] = {
423                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
424                                                   MLX5_EXPANSION_IPV4,
425                                                   MLX5_EXPANSION_IPV6),
426                 .type = RTE_FLOW_ITEM_TYPE_END,
427         },
428         [MLX5_EXPANSION_ROOT_OUTER] = {
429                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
430                                                   MLX5_EXPANSION_OUTER_IPV4,
431                                                   MLX5_EXPANSION_OUTER_IPV6),
432                 .type = RTE_FLOW_ITEM_TYPE_END,
433         },
434         [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
435                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
436                 .type = RTE_FLOW_ITEM_TYPE_END,
437         },
438         [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
439                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
440                                                 (MLX5_EXPANSION_OUTER_ETH_VLAN),
441                 .type = RTE_FLOW_ITEM_TYPE_END,
442         },
443         [MLX5_EXPANSION_OUTER_ETH] = {
444                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
445                                                   MLX5_EXPANSION_OUTER_IPV6,
446                                                   MLX5_EXPANSION_MPLS),
447                 .type = RTE_FLOW_ITEM_TYPE_ETH,
448                 .rss_types = 0,
449         },
450         [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
451                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
452                 .type = RTE_FLOW_ITEM_TYPE_ETH,
453                 .rss_types = 0,
454         },
455         [MLX5_EXPANSION_OUTER_VLAN] = {
456                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
457                                                   MLX5_EXPANSION_OUTER_IPV6),
458                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
459         },
460         [MLX5_EXPANSION_OUTER_IPV4] = {
461                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
462                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
463                          MLX5_EXPANSION_OUTER_IPV4_TCP,
464                          MLX5_EXPANSION_GRE,
465                          MLX5_EXPANSION_IPV4,
466                          MLX5_EXPANSION_IPV6),
467                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
468                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
469                         ETH_RSS_NONFRAG_IPV4_OTHER,
470         },
471         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
472                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
473                                                   MLX5_EXPANSION_VXLAN_GPE),
474                 .type = RTE_FLOW_ITEM_TYPE_UDP,
475                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
476         },
477         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
478                 .type = RTE_FLOW_ITEM_TYPE_TCP,
479                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
480         },
481         [MLX5_EXPANSION_OUTER_IPV6] = {
482                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
483                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
484                          MLX5_EXPANSION_OUTER_IPV6_TCP,
485                          MLX5_EXPANSION_IPV4,
486                          MLX5_EXPANSION_IPV6,
487                          MLX5_EXPANSION_GRE),
488                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
489                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
490                         ETH_RSS_NONFRAG_IPV6_OTHER,
491         },
492         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
493                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
494                                                   MLX5_EXPANSION_VXLAN_GPE),
495                 .type = RTE_FLOW_ITEM_TYPE_UDP,
496                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
497         },
498         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
499                 .type = RTE_FLOW_ITEM_TYPE_TCP,
500                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
501         },
502         [MLX5_EXPANSION_VXLAN] = {
503                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
504                                                   MLX5_EXPANSION_IPV4,
505                                                   MLX5_EXPANSION_IPV6),
506                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
507         },
508         [MLX5_EXPANSION_VXLAN_GPE] = {
509                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
510                                                   MLX5_EXPANSION_IPV4,
511                                                   MLX5_EXPANSION_IPV6),
512                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
513         },
514         [MLX5_EXPANSION_GRE] = {
515                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
516                                                   MLX5_EXPANSION_IPV6),
517                 .type = RTE_FLOW_ITEM_TYPE_GRE,
518         },
519         [MLX5_EXPANSION_MPLS] = {
520                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
521                                                   MLX5_EXPANSION_IPV6),
522                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
523         },
524         [MLX5_EXPANSION_ETH] = {
525                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
526                                                   MLX5_EXPANSION_IPV6),
527                 .type = RTE_FLOW_ITEM_TYPE_ETH,
528         },
529         [MLX5_EXPANSION_ETH_VLAN] = {
530                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
531                 .type = RTE_FLOW_ITEM_TYPE_ETH,
532         },
533         [MLX5_EXPANSION_VLAN] = {
534                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
535                                                   MLX5_EXPANSION_IPV6),
536                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
537         },
538         [MLX5_EXPANSION_IPV4] = {
539                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
540                                                   MLX5_EXPANSION_IPV4_TCP),
541                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
542                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
543                         ETH_RSS_NONFRAG_IPV4_OTHER,
544         },
545         [MLX5_EXPANSION_IPV4_UDP] = {
546                 .type = RTE_FLOW_ITEM_TYPE_UDP,
547                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
548         },
549         [MLX5_EXPANSION_IPV4_TCP] = {
550                 .type = RTE_FLOW_ITEM_TYPE_TCP,
551                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
552         },
553         [MLX5_EXPANSION_IPV6] = {
554                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
555                                                   MLX5_EXPANSION_IPV6_TCP),
556                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
557                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
558                         ETH_RSS_NONFRAG_IPV6_OTHER,
559         },
560         [MLX5_EXPANSION_IPV6_UDP] = {
561                 .type = RTE_FLOW_ITEM_TYPE_UDP,
562                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
563         },
564         [MLX5_EXPANSION_IPV6_TCP] = {
565                 .type = RTE_FLOW_ITEM_TYPE_TCP,
566                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
567         },
568 };
569
570 static struct rte_flow_action_handle *
571 mlx5_action_handle_create(struct rte_eth_dev *dev,
572                           const struct rte_flow_indir_action_conf *conf,
573                           const struct rte_flow_action *action,
574                           struct rte_flow_error *error);
575 static int mlx5_action_handle_destroy
576                                 (struct rte_eth_dev *dev,
577                                  struct rte_flow_action_handle *handle,
578                                  struct rte_flow_error *error);
579 static int mlx5_action_handle_update
580                                 (struct rte_eth_dev *dev,
581                                  struct rte_flow_action_handle *handle,
582                                  const void *update,
583                                  struct rte_flow_error *error);
584 static int mlx5_action_handle_query
585                                 (struct rte_eth_dev *dev,
586                                  const struct rte_flow_action_handle *handle,
587                                  void *data,
588                                  struct rte_flow_error *error);
589 static int
590 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
591                     struct rte_flow_tunnel *app_tunnel,
592                     struct rte_flow_action **actions,
593                     uint32_t *num_of_actions,
594                     struct rte_flow_error *error);
595 static int
596 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
597                        struct rte_flow_tunnel *app_tunnel,
598                        struct rte_flow_item **items,
599                        uint32_t *num_of_items,
600                        struct rte_flow_error *error);
601 static int
602 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
603                               struct rte_flow_item *pmd_items,
604                               uint32_t num_items, struct rte_flow_error *err);
605 static int
606 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
607                                 struct rte_flow_action *pmd_actions,
608                                 uint32_t num_actions,
609                                 struct rte_flow_error *err);
610 static int
611 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
612                                   struct rte_mbuf *m,
613                                   struct rte_flow_restore_info *info,
614                                   struct rte_flow_error *err);
615
616 static const struct rte_flow_ops mlx5_flow_ops = {
617         .validate = mlx5_flow_validate,
618         .create = mlx5_flow_create,
619         .destroy = mlx5_flow_destroy,
620         .flush = mlx5_flow_flush,
621         .isolate = mlx5_flow_isolate,
622         .query = mlx5_flow_query,
623         .dev_dump = mlx5_flow_dev_dump,
624         .get_aged_flows = mlx5_flow_get_aged_flows,
625         .action_handle_create = mlx5_action_handle_create,
626         .action_handle_destroy = mlx5_action_handle_destroy,
627         .action_handle_update = mlx5_action_handle_update,
628         .action_handle_query = mlx5_action_handle_query,
629         .tunnel_decap_set = mlx5_flow_tunnel_decap_set,
630         .tunnel_match = mlx5_flow_tunnel_match,
631         .tunnel_action_decap_release = mlx5_flow_tunnel_action_release,
632         .tunnel_item_release = mlx5_flow_tunnel_item_release,
633         .get_restore_info = mlx5_flow_tunnel_get_restore_info,
634 };
635
636 /* Tunnel information. */
637 struct mlx5_flow_tunnel_info {
638         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
639         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
640 };
641
642 static struct mlx5_flow_tunnel_info tunnels_info[] = {
643         {
644                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
645                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
646         },
647         {
648                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
649                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
650         },
651         {
652                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
653                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
654         },
655         {
656                 .tunnel = MLX5_FLOW_LAYER_GRE,
657                 .ptype = RTE_PTYPE_TUNNEL_GRE,
658         },
659         {
660                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
661                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
662         },
663         {
664                 .tunnel = MLX5_FLOW_LAYER_MPLS,
665                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
666         },
667         {
668                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
669                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
670         },
671         {
672                 .tunnel = MLX5_FLOW_LAYER_IPIP,
673                 .ptype = RTE_PTYPE_TUNNEL_IP,
674         },
675         {
676                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
677                 .ptype = RTE_PTYPE_TUNNEL_IP,
678         },
679         {
680                 .tunnel = MLX5_FLOW_LAYER_GTP,
681                 .ptype = RTE_PTYPE_TUNNEL_GTPU,
682         },
683 };
684
685
686
687 /**
688  * Translate tag ID to register.
689  *
690  * @param[in] dev
691  *   Pointer to the Ethernet device structure.
692  * @param[in] feature
693  *   The feature that request the register.
694  * @param[in] id
695  *   The request register ID.
696  * @param[out] error
697  *   Error description in case of any.
698  *
699  * @return
700  *   The request register on success, a negative errno
701  *   value otherwise and rte_errno is set.
702  */
703 int
704 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
705                      enum mlx5_feature_name feature,
706                      uint32_t id,
707                      struct rte_flow_error *error)
708 {
709         struct mlx5_priv *priv = dev->data->dev_private;
710         struct mlx5_dev_config *config = &priv->config;
711         enum modify_reg start_reg;
712         bool skip_mtr_reg = false;
713
714         switch (feature) {
715         case MLX5_HAIRPIN_RX:
716                 return REG_B;
717         case MLX5_HAIRPIN_TX:
718                 return REG_A;
719         case MLX5_METADATA_RX:
720                 switch (config->dv_xmeta_en) {
721                 case MLX5_XMETA_MODE_LEGACY:
722                         return REG_B;
723                 case MLX5_XMETA_MODE_META16:
724                         return REG_C_0;
725                 case MLX5_XMETA_MODE_META32:
726                         return REG_C_1;
727                 }
728                 break;
729         case MLX5_METADATA_TX:
730                 return REG_A;
731         case MLX5_METADATA_FDB:
732                 switch (config->dv_xmeta_en) {
733                 case MLX5_XMETA_MODE_LEGACY:
734                         return REG_NON;
735                 case MLX5_XMETA_MODE_META16:
736                         return REG_C_0;
737                 case MLX5_XMETA_MODE_META32:
738                         return REG_C_1;
739                 }
740                 break;
741         case MLX5_FLOW_MARK:
742                 switch (config->dv_xmeta_en) {
743                 case MLX5_XMETA_MODE_LEGACY:
744                         return REG_NON;
745                 case MLX5_XMETA_MODE_META16:
746                         return REG_C_1;
747                 case MLX5_XMETA_MODE_META32:
748                         return REG_C_0;
749                 }
750                 break;
751         case MLX5_MTR_ID:
752                 /*
753                  * If meter color and meter id share one register, flow match
754                  * should use the meter color register for match.
755                  */
756                 if (priv->mtr_reg_share)
757                         return priv->mtr_color_reg;
758                 else
759                         return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
760                                REG_C_3;
761         case MLX5_MTR_COLOR:
762         case MLX5_ASO_FLOW_HIT:
763         case MLX5_ASO_CONNTRACK:
764                 /* All features use the same REG_C. */
765                 MLX5_ASSERT(priv->mtr_color_reg != REG_NON);
766                 return priv->mtr_color_reg;
767         case MLX5_COPY_MARK:
768                 /*
769                  * Metadata COPY_MARK register using is in meter suffix sub
770                  * flow while with meter. It's safe to share the same register.
771                  */
772                 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
773         case MLX5_APP_TAG:
774                 /*
775                  * If meter is enable, it will engage the register for color
776                  * match and flow match. If meter color match is not using the
777                  * REG_C_2, need to skip the REG_C_x be used by meter color
778                  * match.
779                  * If meter is disable, free to use all available registers.
780                  */
781                 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
782                             (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
783                 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
784                 if (id > (uint32_t)(REG_C_7 - start_reg))
785                         return rte_flow_error_set(error, EINVAL,
786                                                   RTE_FLOW_ERROR_TYPE_ITEM,
787                                                   NULL, "invalid tag id");
788                 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON)
789                         return rte_flow_error_set(error, ENOTSUP,
790                                                   RTE_FLOW_ERROR_TYPE_ITEM,
791                                                   NULL, "unsupported tag id");
792                 /*
793                  * This case means meter is using the REG_C_x great than 2.
794                  * Take care not to conflict with meter color REG_C_x.
795                  * If the available index REG_C_y >= REG_C_x, skip the
796                  * color register.
797                  */
798                 if (skip_mtr_reg && config->flow_mreg_c
799                     [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
800                         if (id >= (uint32_t)(REG_C_7 - start_reg))
801                                 return rte_flow_error_set(error, EINVAL,
802                                                        RTE_FLOW_ERROR_TYPE_ITEM,
803                                                         NULL, "invalid tag id");
804                         if (config->flow_mreg_c
805                             [id + 1 + start_reg - REG_C_0] != REG_NON)
806                                 return config->flow_mreg_c
807                                                [id + 1 + start_reg - REG_C_0];
808                         return rte_flow_error_set(error, ENOTSUP,
809                                                   RTE_FLOW_ERROR_TYPE_ITEM,
810                                                   NULL, "unsupported tag id");
811                 }
812                 return config->flow_mreg_c[id + start_reg - REG_C_0];
813         }
814         MLX5_ASSERT(false);
815         return rte_flow_error_set(error, EINVAL,
816                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
817                                   NULL, "invalid feature name");
818 }
819
820 /**
821  * Check extensive flow metadata register support.
822  *
823  * @param dev
824  *   Pointer to rte_eth_dev structure.
825  *
826  * @return
827  *   True if device supports extensive flow metadata register, otherwise false.
828  */
829 bool
830 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
831 {
832         struct mlx5_priv *priv = dev->data->dev_private;
833         struct mlx5_dev_config *config = &priv->config;
834
835         /*
836          * Having available reg_c can be regarded inclusively as supporting
837          * extensive flow metadata register, which could mean,
838          * - metadata register copy action by modify header.
839          * - 16 modify header actions is supported.
840          * - reg_c's are preserved across different domain (FDB and NIC) on
841          *   packet loopback by flow lookup miss.
842          */
843         return config->flow_mreg_c[2] != REG_NON;
844 }
845
846 /**
847  * Get the lowest priority.
848  *
849  * @param[in] dev
850  *   Pointer to the Ethernet device structure.
851  * @param[in] attributes
852  *   Pointer to device flow rule attributes.
853  *
854  * @return
855  *   The value of lowest priority of flow.
856  */
857 uint32_t
858 mlx5_get_lowest_priority(struct rte_eth_dev *dev,
859                           const struct rte_flow_attr *attr)
860 {
861         struct mlx5_priv *priv = dev->data->dev_private;
862
863         if (!attr->group && !attr->transfer)
864                 return priv->config.flow_prio - 2;
865         return MLX5_NON_ROOT_FLOW_MAX_PRIO - 1;
866 }
867
868 /**
869  * Calculate matcher priority of the flow.
870  *
871  * @param[in] dev
872  *   Pointer to the Ethernet device structure.
873  * @param[in] attr
874  *   Pointer to device flow rule attributes.
875  * @param[in] subpriority
876  *   The priority based on the items.
877  * @return
878  *   The matcher priority of the flow.
879  */
880 uint16_t
881 mlx5_get_matcher_priority(struct rte_eth_dev *dev,
882                           const struct rte_flow_attr *attr,
883                           uint32_t subpriority)
884 {
885         uint16_t priority = (uint16_t)attr->priority;
886         struct mlx5_priv *priv = dev->data->dev_private;
887
888         if (!attr->group && !attr->transfer) {
889                 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
890                         priority = priv->config.flow_prio - 1;
891                 return mlx5_os_flow_adjust_priority(dev, priority, subpriority);
892         }
893         if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
894                 priority = MLX5_NON_ROOT_FLOW_MAX_PRIO;
895         return priority * 3 + subpriority;
896 }
897
898 /**
899  * Verify the @p item specifications (spec, last, mask) are compatible with the
900  * NIC capabilities.
901  *
902  * @param[in] item
903  *   Item specification.
904  * @param[in] mask
905  *   @p item->mask or flow default bit-masks.
906  * @param[in] nic_mask
907  *   Bit-masks covering supported fields by the NIC to compare with user mask.
908  * @param[in] size
909  *   Bit-masks size in bytes.
910  * @param[in] range_accepted
911  *   True if range of values is accepted for specific fields, false otherwise.
912  * @param[out] error
913  *   Pointer to error structure.
914  *
915  * @return
916  *   0 on success, a negative errno value otherwise and rte_errno is set.
917  */
918 int
919 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
920                           const uint8_t *mask,
921                           const uint8_t *nic_mask,
922                           unsigned int size,
923                           bool range_accepted,
924                           struct rte_flow_error *error)
925 {
926         unsigned int i;
927
928         MLX5_ASSERT(nic_mask);
929         for (i = 0; i < size; ++i)
930                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
931                         return rte_flow_error_set(error, ENOTSUP,
932                                                   RTE_FLOW_ERROR_TYPE_ITEM,
933                                                   item,
934                                                   "mask enables non supported"
935                                                   " bits");
936         if (!item->spec && (item->mask || item->last))
937                 return rte_flow_error_set(error, EINVAL,
938                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
939                                           "mask/last without a spec is not"
940                                           " supported");
941         if (item->spec && item->last && !range_accepted) {
942                 uint8_t spec[size];
943                 uint8_t last[size];
944                 unsigned int i;
945                 int ret;
946
947                 for (i = 0; i < size; ++i) {
948                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
949                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
950                 }
951                 ret = memcmp(spec, last, size);
952                 if (ret != 0)
953                         return rte_flow_error_set(error, EINVAL,
954                                                   RTE_FLOW_ERROR_TYPE_ITEM,
955                                                   item,
956                                                   "range is not valid");
957         }
958         return 0;
959 }
960
961 /**
962  * Adjust the hash fields according to the @p flow information.
963  *
964  * @param[in] dev_flow.
965  *   Pointer to the mlx5_flow.
966  * @param[in] tunnel
967  *   1 when the hash field is for a tunnel item.
968  * @param[in] layer_types
969  *   ETH_RSS_* types.
970  * @param[in] hash_fields
971  *   Item hash fields.
972  *
973  * @return
974  *   The hash fields that should be used.
975  */
976 uint64_t
977 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc,
978                             int tunnel __rte_unused, uint64_t layer_types,
979                             uint64_t hash_fields)
980 {
981 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
982         int rss_request_inner = rss_desc->level >= 2;
983
984         /* Check RSS hash level for tunnel. */
985         if (tunnel && rss_request_inner)
986                 hash_fields |= IBV_RX_HASH_INNER;
987         else if (tunnel || rss_request_inner)
988                 return 0;
989 #endif
990         /* Check if requested layer matches RSS hash fields. */
991         if (!(rss_desc->types & layer_types))
992                 return 0;
993         return hash_fields;
994 }
995
996 /**
997  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
998  * if several tunnel rules are used on this queue, the tunnel ptype will be
999  * cleared.
1000  *
1001  * @param rxq_ctrl
1002  *   Rx queue to update.
1003  */
1004 static void
1005 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
1006 {
1007         unsigned int i;
1008         uint32_t tunnel_ptype = 0;
1009
1010         /* Look up for the ptype to use. */
1011         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
1012                 if (!rxq_ctrl->flow_tunnels_n[i])
1013                         continue;
1014                 if (!tunnel_ptype) {
1015                         tunnel_ptype = tunnels_info[i].ptype;
1016                 } else {
1017                         tunnel_ptype = 0;
1018                         break;
1019                 }
1020         }
1021         rxq_ctrl->rxq.tunnel = tunnel_ptype;
1022 }
1023
1024 /**
1025  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
1026  * flow.
1027  *
1028  * @param[in] dev
1029  *   Pointer to the Ethernet device structure.
1030  * @param[in] dev_handle
1031  *   Pointer to device flow handle structure.
1032  */
1033 void
1034 flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
1035                        struct mlx5_flow_handle *dev_handle)
1036 {
1037         struct mlx5_priv *priv = dev->data->dev_private;
1038         const int mark = dev_handle->mark;
1039         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1040         struct mlx5_ind_table_obj *ind_tbl = NULL;
1041         unsigned int i;
1042
1043         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1044                 struct mlx5_hrxq *hrxq;
1045
1046                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1047                               dev_handle->rix_hrxq);
1048                 if (hrxq)
1049                         ind_tbl = hrxq->ind_table;
1050         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1051                 struct mlx5_shared_action_rss *shared_rss;
1052
1053                 shared_rss = mlx5_ipool_get
1054                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1055                          dev_handle->rix_srss);
1056                 if (shared_rss)
1057                         ind_tbl = shared_rss->ind_tbl;
1058         }
1059         if (!ind_tbl)
1060                 return;
1061         for (i = 0; i != ind_tbl->queues_n; ++i) {
1062                 int idx = ind_tbl->queues[i];
1063                 struct mlx5_rxq_ctrl *rxq_ctrl =
1064                         container_of((*priv->rxqs)[idx],
1065                                      struct mlx5_rxq_ctrl, rxq);
1066
1067                 /*
1068                  * To support metadata register copy on Tx loopback,
1069                  * this must be always enabled (metadata may arive
1070                  * from other port - not from local flows only.
1071                  */
1072                 if (priv->config.dv_flow_en &&
1073                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1074                     mlx5_flow_ext_mreg_supported(dev)) {
1075                         rxq_ctrl->rxq.mark = 1;
1076                         rxq_ctrl->flow_mark_n = 1;
1077                 } else if (mark) {
1078                         rxq_ctrl->rxq.mark = 1;
1079                         rxq_ctrl->flow_mark_n++;
1080                 }
1081                 if (tunnel) {
1082                         unsigned int j;
1083
1084                         /* Increase the counter matching the flow. */
1085                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1086                                 if ((tunnels_info[j].tunnel &
1087                                      dev_handle->layers) ==
1088                                     tunnels_info[j].tunnel) {
1089                                         rxq_ctrl->flow_tunnels_n[j]++;
1090                                         break;
1091                                 }
1092                         }
1093                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1094                 }
1095         }
1096 }
1097
1098 /**
1099  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
1100  *
1101  * @param[in] dev
1102  *   Pointer to the Ethernet device structure.
1103  * @param[in] flow
1104  *   Pointer to flow structure.
1105  */
1106 static void
1107 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
1108 {
1109         struct mlx5_priv *priv = dev->data->dev_private;
1110         uint32_t handle_idx;
1111         struct mlx5_flow_handle *dev_handle;
1112
1113         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1114                        handle_idx, dev_handle, next)
1115                 flow_drv_rxq_flags_set(dev, dev_handle);
1116 }
1117
1118 /**
1119  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1120  * device flow if no other flow uses it with the same kind of request.
1121  *
1122  * @param dev
1123  *   Pointer to Ethernet device.
1124  * @param[in] dev_handle
1125  *   Pointer to the device flow handle structure.
1126  */
1127 static void
1128 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev,
1129                         struct mlx5_flow_handle *dev_handle)
1130 {
1131         struct mlx5_priv *priv = dev->data->dev_private;
1132         const int mark = dev_handle->mark;
1133         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1134         struct mlx5_ind_table_obj *ind_tbl = NULL;
1135         unsigned int i;
1136
1137         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1138                 struct mlx5_hrxq *hrxq;
1139
1140                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1141                               dev_handle->rix_hrxq);
1142                 if (hrxq)
1143                         ind_tbl = hrxq->ind_table;
1144         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1145                 struct mlx5_shared_action_rss *shared_rss;
1146
1147                 shared_rss = mlx5_ipool_get
1148                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1149                          dev_handle->rix_srss);
1150                 if (shared_rss)
1151                         ind_tbl = shared_rss->ind_tbl;
1152         }
1153         if (!ind_tbl)
1154                 return;
1155         MLX5_ASSERT(dev->data->dev_started);
1156         for (i = 0; i != ind_tbl->queues_n; ++i) {
1157                 int idx = ind_tbl->queues[i];
1158                 struct mlx5_rxq_ctrl *rxq_ctrl =
1159                         container_of((*priv->rxqs)[idx],
1160                                      struct mlx5_rxq_ctrl, rxq);
1161
1162                 if (priv->config.dv_flow_en &&
1163                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1164                     mlx5_flow_ext_mreg_supported(dev)) {
1165                         rxq_ctrl->rxq.mark = 1;
1166                         rxq_ctrl->flow_mark_n = 1;
1167                 } else if (mark) {
1168                         rxq_ctrl->flow_mark_n--;
1169                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
1170                 }
1171                 if (tunnel) {
1172                         unsigned int j;
1173
1174                         /* Decrease the counter matching the flow. */
1175                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1176                                 if ((tunnels_info[j].tunnel &
1177                                      dev_handle->layers) ==
1178                                     tunnels_info[j].tunnel) {
1179                                         rxq_ctrl->flow_tunnels_n[j]--;
1180                                         break;
1181                                 }
1182                         }
1183                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1184                 }
1185         }
1186 }
1187
1188 /**
1189  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1190  * @p flow if no other flow uses it with the same kind of request.
1191  *
1192  * @param dev
1193  *   Pointer to Ethernet device.
1194  * @param[in] flow
1195  *   Pointer to the flow.
1196  */
1197 static void
1198 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
1199 {
1200         struct mlx5_priv *priv = dev->data->dev_private;
1201         uint32_t handle_idx;
1202         struct mlx5_flow_handle *dev_handle;
1203
1204         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1205                        handle_idx, dev_handle, next)
1206                 flow_drv_rxq_flags_trim(dev, dev_handle);
1207 }
1208
1209 /**
1210  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
1211  *
1212  * @param dev
1213  *   Pointer to Ethernet device.
1214  */
1215 static void
1216 flow_rxq_flags_clear(struct rte_eth_dev *dev)
1217 {
1218         struct mlx5_priv *priv = dev->data->dev_private;
1219         unsigned int i;
1220
1221         for (i = 0; i != priv->rxqs_n; ++i) {
1222                 struct mlx5_rxq_ctrl *rxq_ctrl;
1223                 unsigned int j;
1224
1225                 if (!(*priv->rxqs)[i])
1226                         continue;
1227                 rxq_ctrl = container_of((*priv->rxqs)[i],
1228                                         struct mlx5_rxq_ctrl, rxq);
1229                 rxq_ctrl->flow_mark_n = 0;
1230                 rxq_ctrl->rxq.mark = 0;
1231                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
1232                         rxq_ctrl->flow_tunnels_n[j] = 0;
1233                 rxq_ctrl->rxq.tunnel = 0;
1234         }
1235 }
1236
1237 /**
1238  * Set the Rx queue dynamic metadata (mask and offset) for a flow
1239  *
1240  * @param[in] dev
1241  *   Pointer to the Ethernet device structure.
1242  */
1243 void
1244 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev)
1245 {
1246         struct mlx5_priv *priv = dev->data->dev_private;
1247         struct mlx5_rxq_data *data;
1248         unsigned int i;
1249
1250         for (i = 0; i != priv->rxqs_n; ++i) {
1251                 if (!(*priv->rxqs)[i])
1252                         continue;
1253                 data = (*priv->rxqs)[i];
1254                 if (!rte_flow_dynf_metadata_avail()) {
1255                         data->dynf_meta = 0;
1256                         data->flow_meta_mask = 0;
1257                         data->flow_meta_offset = -1;
1258                         data->flow_meta_port_mask = 0;
1259                 } else {
1260                         data->dynf_meta = 1;
1261                         data->flow_meta_mask = rte_flow_dynf_metadata_mask;
1262                         data->flow_meta_offset = rte_flow_dynf_metadata_offs;
1263                         data->flow_meta_port_mask = (uint32_t)~0;
1264                         if (priv->config.dv_xmeta_en == MLX5_XMETA_MODE_META16)
1265                                 data->flow_meta_port_mask >>= 16;
1266                 }
1267         }
1268 }
1269
1270 /*
1271  * return a pointer to the desired action in the list of actions.
1272  *
1273  * @param[in] actions
1274  *   The list of actions to search the action in.
1275  * @param[in] action
1276  *   The action to find.
1277  *
1278  * @return
1279  *   Pointer to the action in the list, if found. NULL otherwise.
1280  */
1281 const struct rte_flow_action *
1282 mlx5_flow_find_action(const struct rte_flow_action *actions,
1283                       enum rte_flow_action_type action)
1284 {
1285         if (actions == NULL)
1286                 return NULL;
1287         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
1288                 if (actions->type == action)
1289                         return actions;
1290         return NULL;
1291 }
1292
1293 /*
1294  * Validate the flag action.
1295  *
1296  * @param[in] action_flags
1297  *   Bit-fields that holds the actions detected until now.
1298  * @param[in] attr
1299  *   Attributes of flow that includes this action.
1300  * @param[out] error
1301  *   Pointer to error structure.
1302  *
1303  * @return
1304  *   0 on success, a negative errno value otherwise and rte_errno is set.
1305  */
1306 int
1307 mlx5_flow_validate_action_flag(uint64_t action_flags,
1308                                const struct rte_flow_attr *attr,
1309                                struct rte_flow_error *error)
1310 {
1311         if (action_flags & MLX5_FLOW_ACTION_MARK)
1312                 return rte_flow_error_set(error, EINVAL,
1313                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1314                                           "can't mark and flag in same flow");
1315         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1316                 return rte_flow_error_set(error, EINVAL,
1317                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1318                                           "can't have 2 flag"
1319                                           " actions in same flow");
1320         if (attr->egress)
1321                 return rte_flow_error_set(error, ENOTSUP,
1322                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1323                                           "flag action not supported for "
1324                                           "egress");
1325         return 0;
1326 }
1327
1328 /*
1329  * Validate the mark action.
1330  *
1331  * @param[in] action
1332  *   Pointer to the queue action.
1333  * @param[in] action_flags
1334  *   Bit-fields that holds the actions detected until now.
1335  * @param[in] attr
1336  *   Attributes of flow that includes this action.
1337  * @param[out] error
1338  *   Pointer to error structure.
1339  *
1340  * @return
1341  *   0 on success, a negative errno value otherwise and rte_errno is set.
1342  */
1343 int
1344 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
1345                                uint64_t action_flags,
1346                                const struct rte_flow_attr *attr,
1347                                struct rte_flow_error *error)
1348 {
1349         const struct rte_flow_action_mark *mark = action->conf;
1350
1351         if (!mark)
1352                 return rte_flow_error_set(error, EINVAL,
1353                                           RTE_FLOW_ERROR_TYPE_ACTION,
1354                                           action,
1355                                           "configuration cannot be null");
1356         if (mark->id >= MLX5_FLOW_MARK_MAX)
1357                 return rte_flow_error_set(error, EINVAL,
1358                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1359                                           &mark->id,
1360                                           "mark id must in 0 <= id < "
1361                                           RTE_STR(MLX5_FLOW_MARK_MAX));
1362         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1363                 return rte_flow_error_set(error, EINVAL,
1364                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1365                                           "can't flag and mark in same flow");
1366         if (action_flags & MLX5_FLOW_ACTION_MARK)
1367                 return rte_flow_error_set(error, EINVAL,
1368                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1369                                           "can't have 2 mark actions in same"
1370                                           " flow");
1371         if (attr->egress)
1372                 return rte_flow_error_set(error, ENOTSUP,
1373                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1374                                           "mark action not supported for "
1375                                           "egress");
1376         return 0;
1377 }
1378
1379 /*
1380  * Validate the drop action.
1381  *
1382  * @param[in] action_flags
1383  *   Bit-fields that holds the actions detected until now.
1384  * @param[in] attr
1385  *   Attributes of flow that includes this action.
1386  * @param[out] error
1387  *   Pointer to error structure.
1388  *
1389  * @return
1390  *   0 on success, a negative errno value otherwise and rte_errno is set.
1391  */
1392 int
1393 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1394                                const struct rte_flow_attr *attr,
1395                                struct rte_flow_error *error)
1396 {
1397         if (attr->egress)
1398                 return rte_flow_error_set(error, ENOTSUP,
1399                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1400                                           "drop action not supported for "
1401                                           "egress");
1402         return 0;
1403 }
1404
1405 /*
1406  * Validate the queue action.
1407  *
1408  * @param[in] action
1409  *   Pointer to the queue action.
1410  * @param[in] action_flags
1411  *   Bit-fields that holds the actions detected until now.
1412  * @param[in] dev
1413  *   Pointer to the Ethernet device structure.
1414  * @param[in] attr
1415  *   Attributes of flow that includes this action.
1416  * @param[out] error
1417  *   Pointer to error structure.
1418  *
1419  * @return
1420  *   0 on success, a negative errno value otherwise and rte_errno is set.
1421  */
1422 int
1423 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1424                                 uint64_t action_flags,
1425                                 struct rte_eth_dev *dev,
1426                                 const struct rte_flow_attr *attr,
1427                                 struct rte_flow_error *error)
1428 {
1429         struct mlx5_priv *priv = dev->data->dev_private;
1430         const struct rte_flow_action_queue *queue = action->conf;
1431
1432         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1433                 return rte_flow_error_set(error, EINVAL,
1434                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1435                                           "can't have 2 fate actions in"
1436                                           " same flow");
1437         if (!priv->rxqs_n)
1438                 return rte_flow_error_set(error, EINVAL,
1439                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1440                                           NULL, "No Rx queues configured");
1441         if (queue->index >= priv->rxqs_n)
1442                 return rte_flow_error_set(error, EINVAL,
1443                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1444                                           &queue->index,
1445                                           "queue index out of range");
1446         if (!(*priv->rxqs)[queue->index])
1447                 return rte_flow_error_set(error, EINVAL,
1448                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1449                                           &queue->index,
1450                                           "queue is not configured");
1451         if (attr->egress)
1452                 return rte_flow_error_set(error, ENOTSUP,
1453                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1454                                           "queue action not supported for "
1455                                           "egress");
1456         return 0;
1457 }
1458
1459 /*
1460  * Validate the rss action.
1461  *
1462  * @param[in] dev
1463  *   Pointer to the Ethernet device structure.
1464  * @param[in] action
1465  *   Pointer to the queue action.
1466  * @param[out] error
1467  *   Pointer to error structure.
1468  *
1469  * @return
1470  *   0 on success, a negative errno value otherwise and rte_errno is set.
1471  */
1472 int
1473 mlx5_validate_action_rss(struct rte_eth_dev *dev,
1474                          const struct rte_flow_action *action,
1475                          struct rte_flow_error *error)
1476 {
1477         struct mlx5_priv *priv = dev->data->dev_private;
1478         const struct rte_flow_action_rss *rss = action->conf;
1479         enum mlx5_rxq_type rxq_type = MLX5_RXQ_TYPE_UNDEFINED;
1480         unsigned int i;
1481
1482         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1483             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1484                 return rte_flow_error_set(error, ENOTSUP,
1485                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1486                                           &rss->func,
1487                                           "RSS hash function not supported");
1488 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1489         if (rss->level > 2)
1490 #else
1491         if (rss->level > 1)
1492 #endif
1493                 return rte_flow_error_set(error, ENOTSUP,
1494                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1495                                           &rss->level,
1496                                           "tunnel RSS is not supported");
1497         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1498         if (rss->key_len == 0 && rss->key != NULL)
1499                 return rte_flow_error_set(error, ENOTSUP,
1500                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1501                                           &rss->key_len,
1502                                           "RSS hash key length 0");
1503         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1504                 return rte_flow_error_set(error, ENOTSUP,
1505                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1506                                           &rss->key_len,
1507                                           "RSS hash key too small");
1508         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1509                 return rte_flow_error_set(error, ENOTSUP,
1510                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1511                                           &rss->key_len,
1512                                           "RSS hash key too large");
1513         if (rss->queue_num > priv->config.ind_table_max_size)
1514                 return rte_flow_error_set(error, ENOTSUP,
1515                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1516                                           &rss->queue_num,
1517                                           "number of queues too large");
1518         if (rss->types & MLX5_RSS_HF_MASK)
1519                 return rte_flow_error_set(error, ENOTSUP,
1520                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1521                                           &rss->types,
1522                                           "some RSS protocols are not"
1523                                           " supported");
1524         if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) &&
1525             !(rss->types & ETH_RSS_IP))
1526                 return rte_flow_error_set(error, EINVAL,
1527                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1528                                           "L3 partial RSS requested but L3 RSS"
1529                                           " type not specified");
1530         if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) &&
1531             !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP)))
1532                 return rte_flow_error_set(error, EINVAL,
1533                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1534                                           "L4 partial RSS requested but L4 RSS"
1535                                           " type not specified");
1536         if (!priv->rxqs_n)
1537                 return rte_flow_error_set(error, EINVAL,
1538                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1539                                           NULL, "No Rx queues configured");
1540         if (!rss->queue_num)
1541                 return rte_flow_error_set(error, EINVAL,
1542                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1543                                           NULL, "No queues configured");
1544         for (i = 0; i != rss->queue_num; ++i) {
1545                 struct mlx5_rxq_ctrl *rxq_ctrl;
1546
1547                 if (rss->queue[i] >= priv->rxqs_n)
1548                         return rte_flow_error_set
1549                                 (error, EINVAL,
1550                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1551                                  &rss->queue[i], "queue index out of range");
1552                 if (!(*priv->rxqs)[rss->queue[i]])
1553                         return rte_flow_error_set
1554                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1555                                  &rss->queue[i], "queue is not configured");
1556                 rxq_ctrl = container_of((*priv->rxqs)[rss->queue[i]],
1557                                         struct mlx5_rxq_ctrl, rxq);
1558                 if (i == 0)
1559                         rxq_type = rxq_ctrl->type;
1560                 if (rxq_type != rxq_ctrl->type)
1561                         return rte_flow_error_set
1562                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1563                                  &rss->queue[i],
1564                                  "combining hairpin and regular RSS queues is not supported");
1565         }
1566         return 0;
1567 }
1568
1569 /*
1570  * Validate the rss action.
1571  *
1572  * @param[in] action
1573  *   Pointer to the queue action.
1574  * @param[in] action_flags
1575  *   Bit-fields that holds the actions detected until now.
1576  * @param[in] dev
1577  *   Pointer to the Ethernet device structure.
1578  * @param[in] attr
1579  *   Attributes of flow that includes this action.
1580  * @param[in] item_flags
1581  *   Items that were detected.
1582  * @param[out] error
1583  *   Pointer to error structure.
1584  *
1585  * @return
1586  *   0 on success, a negative errno value otherwise and rte_errno is set.
1587  */
1588 int
1589 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1590                               uint64_t action_flags,
1591                               struct rte_eth_dev *dev,
1592                               const struct rte_flow_attr *attr,
1593                               uint64_t item_flags,
1594                               struct rte_flow_error *error)
1595 {
1596         const struct rte_flow_action_rss *rss = action->conf;
1597         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1598         int ret;
1599
1600         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1601                 return rte_flow_error_set(error, EINVAL,
1602                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1603                                           "can't have 2 fate actions"
1604                                           " in same flow");
1605         ret = mlx5_validate_action_rss(dev, action, error);
1606         if (ret)
1607                 return ret;
1608         if (attr->egress)
1609                 return rte_flow_error_set(error, ENOTSUP,
1610                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1611                                           "rss action not supported for "
1612                                           "egress");
1613         if (rss->level > 1 && !tunnel)
1614                 return rte_flow_error_set(error, EINVAL,
1615                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1616                                           "inner RSS is not supported for "
1617                                           "non-tunnel flows");
1618         if ((item_flags & MLX5_FLOW_LAYER_ECPRI) &&
1619             !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) {
1620                 return rte_flow_error_set(error, EINVAL,
1621                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1622                                           "RSS on eCPRI is not supported now");
1623         }
1624         return 0;
1625 }
1626
1627 /*
1628  * Validate the default miss action.
1629  *
1630  * @param[in] action_flags
1631  *   Bit-fields that holds the actions detected until now.
1632  * @param[out] error
1633  *   Pointer to error structure.
1634  *
1635  * @return
1636  *   0 on success, a negative errno value otherwise and rte_errno is set.
1637  */
1638 int
1639 mlx5_flow_validate_action_default_miss(uint64_t action_flags,
1640                                 const struct rte_flow_attr *attr,
1641                                 struct rte_flow_error *error)
1642 {
1643         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1644                 return rte_flow_error_set(error, EINVAL,
1645                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1646                                           "can't have 2 fate actions in"
1647                                           " same flow");
1648         if (attr->egress)
1649                 return rte_flow_error_set(error, ENOTSUP,
1650                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1651                                           "default miss action not supported "
1652                                           "for egress");
1653         if (attr->group)
1654                 return rte_flow_error_set(error, ENOTSUP,
1655                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
1656                                           "only group 0 is supported");
1657         if (attr->transfer)
1658                 return rte_flow_error_set(error, ENOTSUP,
1659                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1660                                           NULL, "transfer is not supported");
1661         return 0;
1662 }
1663
1664 /*
1665  * Validate the count action.
1666  *
1667  * @param[in] dev
1668  *   Pointer to the Ethernet device structure.
1669  * @param[in] attr
1670  *   Attributes of flow that includes this action.
1671  * @param[out] error
1672  *   Pointer to error structure.
1673  *
1674  * @return
1675  *   0 on success, a negative errno value otherwise and rte_errno is set.
1676  */
1677 int
1678 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1679                                 const struct rte_flow_attr *attr,
1680                                 struct rte_flow_error *error)
1681 {
1682         if (attr->egress)
1683                 return rte_flow_error_set(error, ENOTSUP,
1684                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1685                                           "count action not supported for "
1686                                           "egress");
1687         return 0;
1688 }
1689
1690 /**
1691  * Verify the @p attributes will be correctly understood by the NIC and store
1692  * them in the @p flow if everything is correct.
1693  *
1694  * @param[in] dev
1695  *   Pointer to the Ethernet device structure.
1696  * @param[in] attributes
1697  *   Pointer to flow attributes
1698  * @param[out] error
1699  *   Pointer to error structure.
1700  *
1701  * @return
1702  *   0 on success, a negative errno value otherwise and rte_errno is set.
1703  */
1704 int
1705 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1706                               const struct rte_flow_attr *attributes,
1707                               struct rte_flow_error *error)
1708 {
1709         struct mlx5_priv *priv = dev->data->dev_private;
1710         uint32_t priority_max = priv->config.flow_prio - 1;
1711
1712         if (attributes->group)
1713                 return rte_flow_error_set(error, ENOTSUP,
1714                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1715                                           NULL, "groups is not supported");
1716         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
1717             attributes->priority >= priority_max)
1718                 return rte_flow_error_set(error, ENOTSUP,
1719                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1720                                           NULL, "priority out of range");
1721         if (attributes->egress)
1722                 return rte_flow_error_set(error, ENOTSUP,
1723                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1724                                           "egress is not supported");
1725         if (attributes->transfer && !priv->config.dv_esw_en)
1726                 return rte_flow_error_set(error, ENOTSUP,
1727                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1728                                           NULL, "transfer is not supported");
1729         if (!attributes->ingress)
1730                 return rte_flow_error_set(error, EINVAL,
1731                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1732                                           NULL,
1733                                           "ingress attribute is mandatory");
1734         return 0;
1735 }
1736
1737 /**
1738  * Validate ICMP6 item.
1739  *
1740  * @param[in] item
1741  *   Item specification.
1742  * @param[in] item_flags
1743  *   Bit-fields that holds the items detected until now.
1744  * @param[in] ext_vlan_sup
1745  *   Whether extended VLAN features are supported or not.
1746  * @param[out] error
1747  *   Pointer to error structure.
1748  *
1749  * @return
1750  *   0 on success, a negative errno value otherwise and rte_errno is set.
1751  */
1752 int
1753 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1754                                uint64_t item_flags,
1755                                uint8_t target_protocol,
1756                                struct rte_flow_error *error)
1757 {
1758         const struct rte_flow_item_icmp6 *mask = item->mask;
1759         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1760         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1761                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1762         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1763                                       MLX5_FLOW_LAYER_OUTER_L4;
1764         int ret;
1765
1766         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1767                 return rte_flow_error_set(error, EINVAL,
1768                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1769                                           "protocol filtering not compatible"
1770                                           " with ICMP6 layer");
1771         if (!(item_flags & l3m))
1772                 return rte_flow_error_set(error, EINVAL,
1773                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1774                                           "IPv6 is mandatory to filter on"
1775                                           " ICMP6");
1776         if (item_flags & l4m)
1777                 return rte_flow_error_set(error, EINVAL,
1778                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1779                                           "multiple L4 layers not supported");
1780         if (!mask)
1781                 mask = &rte_flow_item_icmp6_mask;
1782         ret = mlx5_flow_item_acceptable
1783                 (item, (const uint8_t *)mask,
1784                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1785                  sizeof(struct rte_flow_item_icmp6),
1786                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1787         if (ret < 0)
1788                 return ret;
1789         return 0;
1790 }
1791
1792 /**
1793  * Validate ICMP item.
1794  *
1795  * @param[in] item
1796  *   Item specification.
1797  * @param[in] item_flags
1798  *   Bit-fields that holds the items detected until now.
1799  * @param[out] error
1800  *   Pointer to error structure.
1801  *
1802  * @return
1803  *   0 on success, a negative errno value otherwise and rte_errno is set.
1804  */
1805 int
1806 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1807                              uint64_t item_flags,
1808                              uint8_t target_protocol,
1809                              struct rte_flow_error *error)
1810 {
1811         const struct rte_flow_item_icmp *mask = item->mask;
1812         const struct rte_flow_item_icmp nic_mask = {
1813                 .hdr.icmp_type = 0xff,
1814                 .hdr.icmp_code = 0xff,
1815                 .hdr.icmp_ident = RTE_BE16(0xffff),
1816                 .hdr.icmp_seq_nb = RTE_BE16(0xffff),
1817         };
1818         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1819         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1820                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1821         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1822                                       MLX5_FLOW_LAYER_OUTER_L4;
1823         int ret;
1824
1825         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1826                 return rte_flow_error_set(error, EINVAL,
1827                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1828                                           "protocol filtering not compatible"
1829                                           " with ICMP layer");
1830         if (!(item_flags & l3m))
1831                 return rte_flow_error_set(error, EINVAL,
1832                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1833                                           "IPv4 is mandatory to filter"
1834                                           " on ICMP");
1835         if (item_flags & l4m)
1836                 return rte_flow_error_set(error, EINVAL,
1837                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1838                                           "multiple L4 layers not supported");
1839         if (!mask)
1840                 mask = &nic_mask;
1841         ret = mlx5_flow_item_acceptable
1842                 (item, (const uint8_t *)mask,
1843                  (const uint8_t *)&nic_mask,
1844                  sizeof(struct rte_flow_item_icmp),
1845                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1846         if (ret < 0)
1847                 return ret;
1848         return 0;
1849 }
1850
1851 /**
1852  * Validate Ethernet item.
1853  *
1854  * @param[in] item
1855  *   Item specification.
1856  * @param[in] item_flags
1857  *   Bit-fields that holds the items detected until now.
1858  * @param[out] error
1859  *   Pointer to error structure.
1860  *
1861  * @return
1862  *   0 on success, a negative errno value otherwise and rte_errno is set.
1863  */
1864 int
1865 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1866                             uint64_t item_flags, bool ext_vlan_sup,
1867                             struct rte_flow_error *error)
1868 {
1869         const struct rte_flow_item_eth *mask = item->mask;
1870         const struct rte_flow_item_eth nic_mask = {
1871                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1872                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1873                 .type = RTE_BE16(0xffff),
1874                 .has_vlan = ext_vlan_sup ? 1 : 0,
1875         };
1876         int ret;
1877         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1878         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1879                                        MLX5_FLOW_LAYER_OUTER_L2;
1880
1881         if (item_flags & ethm)
1882                 return rte_flow_error_set(error, ENOTSUP,
1883                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1884                                           "multiple L2 layers not supported");
1885         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
1886             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
1887                 return rte_flow_error_set(error, EINVAL,
1888                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1889                                           "L2 layer should not follow "
1890                                           "L3 layers");
1891         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
1892             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
1893                 return rte_flow_error_set(error, EINVAL,
1894                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1895                                           "L2 layer should not follow VLAN");
1896         if (!mask)
1897                 mask = &rte_flow_item_eth_mask;
1898         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1899                                         (const uint8_t *)&nic_mask,
1900                                         sizeof(struct rte_flow_item_eth),
1901                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1902         return ret;
1903 }
1904
1905 /**
1906  * Validate VLAN item.
1907  *
1908  * @param[in] item
1909  *   Item specification.
1910  * @param[in] item_flags
1911  *   Bit-fields that holds the items detected until now.
1912  * @param[in] dev
1913  *   Ethernet device flow is being created on.
1914  * @param[out] error
1915  *   Pointer to error structure.
1916  *
1917  * @return
1918  *   0 on success, a negative errno value otherwise and rte_errno is set.
1919  */
1920 int
1921 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1922                              uint64_t item_flags,
1923                              struct rte_eth_dev *dev,
1924                              struct rte_flow_error *error)
1925 {
1926         const struct rte_flow_item_vlan *spec = item->spec;
1927         const struct rte_flow_item_vlan *mask = item->mask;
1928         const struct rte_flow_item_vlan nic_mask = {
1929                 .tci = RTE_BE16(UINT16_MAX),
1930                 .inner_type = RTE_BE16(UINT16_MAX),
1931         };
1932         uint16_t vlan_tag = 0;
1933         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1934         int ret;
1935         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1936                                         MLX5_FLOW_LAYER_INNER_L4) :
1937                                        (MLX5_FLOW_LAYER_OUTER_L3 |
1938                                         MLX5_FLOW_LAYER_OUTER_L4);
1939         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1940                                         MLX5_FLOW_LAYER_OUTER_VLAN;
1941
1942         if (item_flags & vlanm)
1943                 return rte_flow_error_set(error, EINVAL,
1944                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1945                                           "multiple VLAN layers not supported");
1946         else if ((item_flags & l34m) != 0)
1947                 return rte_flow_error_set(error, EINVAL,
1948                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1949                                           "VLAN cannot follow L3/L4 layer");
1950         if (!mask)
1951                 mask = &rte_flow_item_vlan_mask;
1952         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1953                                         (const uint8_t *)&nic_mask,
1954                                         sizeof(struct rte_flow_item_vlan),
1955                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1956         if (ret)
1957                 return ret;
1958         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
1959                 struct mlx5_priv *priv = dev->data->dev_private;
1960
1961                 if (priv->vmwa_context) {
1962                         /*
1963                          * Non-NULL context means we have a virtual machine
1964                          * and SR-IOV enabled, we have to create VLAN interface
1965                          * to make hypervisor to setup E-Switch vport
1966                          * context correctly. We avoid creating the multiple
1967                          * VLAN interfaces, so we cannot support VLAN tag mask.
1968                          */
1969                         return rte_flow_error_set(error, EINVAL,
1970                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1971                                                   item,
1972                                                   "VLAN tag mask is not"
1973                                                   " supported in virtual"
1974                                                   " environment");
1975                 }
1976         }
1977         if (spec) {
1978                 vlan_tag = spec->tci;
1979                 vlan_tag &= mask->tci;
1980         }
1981         /*
1982          * From verbs perspective an empty VLAN is equivalent
1983          * to a packet without VLAN layer.
1984          */
1985         if (!vlan_tag)
1986                 return rte_flow_error_set(error, EINVAL,
1987                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1988                                           item->spec,
1989                                           "VLAN cannot be empty");
1990         return 0;
1991 }
1992
1993 /**
1994  * Validate IPV4 item.
1995  *
1996  * @param[in] item
1997  *   Item specification.
1998  * @param[in] item_flags
1999  *   Bit-fields that holds the items detected until now.
2000  * @param[in] last_item
2001  *   Previous validated item in the pattern items.
2002  * @param[in] ether_type
2003  *   Type in the ethernet layer header (including dot1q).
2004  * @param[in] acc_mask
2005  *   Acceptable mask, if NULL default internal default mask
2006  *   will be used to check whether item fields are supported.
2007  * @param[in] range_accepted
2008  *   True if range of values is accepted for specific fields, false otherwise.
2009  * @param[out] error
2010  *   Pointer to error structure.
2011  *
2012  * @return
2013  *   0 on success, a negative errno value otherwise and rte_errno is set.
2014  */
2015 int
2016 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
2017                              uint64_t item_flags,
2018                              uint64_t last_item,
2019                              uint16_t ether_type,
2020                              const struct rte_flow_item_ipv4 *acc_mask,
2021                              bool range_accepted,
2022                              struct rte_flow_error *error)
2023 {
2024         const struct rte_flow_item_ipv4 *mask = item->mask;
2025         const struct rte_flow_item_ipv4 *spec = item->spec;
2026         const struct rte_flow_item_ipv4 nic_mask = {
2027                 .hdr = {
2028                         .src_addr = RTE_BE32(0xffffffff),
2029                         .dst_addr = RTE_BE32(0xffffffff),
2030                         .type_of_service = 0xff,
2031                         .next_proto_id = 0xff,
2032                 },
2033         };
2034         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2035         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2036                                       MLX5_FLOW_LAYER_OUTER_L3;
2037         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2038                                       MLX5_FLOW_LAYER_OUTER_L4;
2039         int ret;
2040         uint8_t next_proto = 0xFF;
2041         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2042                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2043                                   MLX5_FLOW_LAYER_INNER_VLAN);
2044
2045         if ((last_item & l2_vlan) && ether_type &&
2046             ether_type != RTE_ETHER_TYPE_IPV4)
2047                 return rte_flow_error_set(error, EINVAL,
2048                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2049                                           "IPv4 cannot follow L2/VLAN layer "
2050                                           "which ether type is not IPv4");
2051         if (item_flags & MLX5_FLOW_LAYER_IPIP) {
2052                 if (mask && spec)
2053                         next_proto = mask->hdr.next_proto_id &
2054                                      spec->hdr.next_proto_id;
2055                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2056                         return rte_flow_error_set(error, EINVAL,
2057                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2058                                                   item,
2059                                                   "multiple tunnel "
2060                                                   "not supported");
2061         }
2062         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
2063                 return rte_flow_error_set(error, EINVAL,
2064                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2065                                           "wrong tunnel type - IPv6 specified "
2066                                           "but IPv4 item provided");
2067         if (item_flags & l3m)
2068                 return rte_flow_error_set(error, ENOTSUP,
2069                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2070                                           "multiple L3 layers not supported");
2071         else if (item_flags & l4m)
2072                 return rte_flow_error_set(error, EINVAL,
2073                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2074                                           "L3 cannot follow an L4 layer.");
2075         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2076                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2077                 return rte_flow_error_set(error, EINVAL,
2078                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2079                                           "L3 cannot follow an NVGRE layer.");
2080         if (!mask)
2081                 mask = &rte_flow_item_ipv4_mask;
2082         else if (mask->hdr.next_proto_id != 0 &&
2083                  mask->hdr.next_proto_id != 0xff)
2084                 return rte_flow_error_set(error, EINVAL,
2085                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2086                                           "partial mask is not supported"
2087                                           " for protocol");
2088         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2089                                         acc_mask ? (const uint8_t *)acc_mask
2090                                                  : (const uint8_t *)&nic_mask,
2091                                         sizeof(struct rte_flow_item_ipv4),
2092                                         range_accepted, error);
2093         if (ret < 0)
2094                 return ret;
2095         return 0;
2096 }
2097
2098 /**
2099  * Validate IPV6 item.
2100  *
2101  * @param[in] item
2102  *   Item specification.
2103  * @param[in] item_flags
2104  *   Bit-fields that holds the items detected until now.
2105  * @param[in] last_item
2106  *   Previous validated item in the pattern items.
2107  * @param[in] ether_type
2108  *   Type in the ethernet layer header (including dot1q).
2109  * @param[in] acc_mask
2110  *   Acceptable mask, if NULL default internal default mask
2111  *   will be used to check whether item fields are supported.
2112  * @param[out] error
2113  *   Pointer to error structure.
2114  *
2115  * @return
2116  *   0 on success, a negative errno value otherwise and rte_errno is set.
2117  */
2118 int
2119 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
2120                              uint64_t item_flags,
2121                              uint64_t last_item,
2122                              uint16_t ether_type,
2123                              const struct rte_flow_item_ipv6 *acc_mask,
2124                              struct rte_flow_error *error)
2125 {
2126         const struct rte_flow_item_ipv6 *mask = item->mask;
2127         const struct rte_flow_item_ipv6 *spec = item->spec;
2128         const struct rte_flow_item_ipv6 nic_mask = {
2129                 .hdr = {
2130                         .src_addr =
2131                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2132                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2133                         .dst_addr =
2134                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2135                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2136                         .vtc_flow = RTE_BE32(0xffffffff),
2137                         .proto = 0xff,
2138                 },
2139         };
2140         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2141         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2142                                       MLX5_FLOW_LAYER_OUTER_L3;
2143         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2144                                       MLX5_FLOW_LAYER_OUTER_L4;
2145         int ret;
2146         uint8_t next_proto = 0xFF;
2147         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2148                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2149                                   MLX5_FLOW_LAYER_INNER_VLAN);
2150
2151         if ((last_item & l2_vlan) && ether_type &&
2152             ether_type != RTE_ETHER_TYPE_IPV6)
2153                 return rte_flow_error_set(error, EINVAL,
2154                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2155                                           "IPv6 cannot follow L2/VLAN layer "
2156                                           "which ether type is not IPv6");
2157         if (mask && mask->hdr.proto == UINT8_MAX && spec)
2158                 next_proto = spec->hdr.proto;
2159         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
2160                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2161                         return rte_flow_error_set(error, EINVAL,
2162                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2163                                                   item,
2164                                                   "multiple tunnel "
2165                                                   "not supported");
2166         }
2167         if (next_proto == IPPROTO_HOPOPTS  ||
2168             next_proto == IPPROTO_ROUTING  ||
2169             next_proto == IPPROTO_FRAGMENT ||
2170             next_proto == IPPROTO_ESP      ||
2171             next_proto == IPPROTO_AH       ||
2172             next_proto == IPPROTO_DSTOPTS)
2173                 return rte_flow_error_set(error, EINVAL,
2174                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2175                                           "IPv6 proto (next header) should "
2176                                           "not be set as extension header");
2177         if (item_flags & MLX5_FLOW_LAYER_IPIP)
2178                 return rte_flow_error_set(error, EINVAL,
2179                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2180                                           "wrong tunnel type - IPv4 specified "
2181                                           "but IPv6 item provided");
2182         if (item_flags & l3m)
2183                 return rte_flow_error_set(error, ENOTSUP,
2184                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2185                                           "multiple L3 layers not supported");
2186         else if (item_flags & l4m)
2187                 return rte_flow_error_set(error, EINVAL,
2188                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2189                                           "L3 cannot follow an L4 layer.");
2190         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2191                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2192                 return rte_flow_error_set(error, EINVAL,
2193                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2194                                           "L3 cannot follow an NVGRE layer.");
2195         if (!mask)
2196                 mask = &rte_flow_item_ipv6_mask;
2197         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2198                                         acc_mask ? (const uint8_t *)acc_mask
2199                                                  : (const uint8_t *)&nic_mask,
2200                                         sizeof(struct rte_flow_item_ipv6),
2201                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2202         if (ret < 0)
2203                 return ret;
2204         return 0;
2205 }
2206
2207 /**
2208  * Validate UDP item.
2209  *
2210  * @param[in] item
2211  *   Item specification.
2212  * @param[in] item_flags
2213  *   Bit-fields that holds the items detected until now.
2214  * @param[in] target_protocol
2215  *   The next protocol in the previous item.
2216  * @param[in] flow_mask
2217  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
2218  * @param[out] error
2219  *   Pointer to error structure.
2220  *
2221  * @return
2222  *   0 on success, a negative errno value otherwise and rte_errno is set.
2223  */
2224 int
2225 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
2226                             uint64_t item_flags,
2227                             uint8_t target_protocol,
2228                             struct rte_flow_error *error)
2229 {
2230         const struct rte_flow_item_udp *mask = item->mask;
2231         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2232         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2233                                       MLX5_FLOW_LAYER_OUTER_L3;
2234         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2235                                       MLX5_FLOW_LAYER_OUTER_L4;
2236         int ret;
2237
2238         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
2239                 return rte_flow_error_set(error, EINVAL,
2240                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2241                                           "protocol filtering not compatible"
2242                                           " with UDP layer");
2243         if (!(item_flags & l3m))
2244                 return rte_flow_error_set(error, EINVAL,
2245                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2246                                           "L3 is mandatory to filter on L4");
2247         if (item_flags & l4m)
2248                 return rte_flow_error_set(error, EINVAL,
2249                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2250                                           "multiple L4 layers not supported");
2251         if (!mask)
2252                 mask = &rte_flow_item_udp_mask;
2253         ret = mlx5_flow_item_acceptable
2254                 (item, (const uint8_t *)mask,
2255                  (const uint8_t *)&rte_flow_item_udp_mask,
2256                  sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2257                  error);
2258         if (ret < 0)
2259                 return ret;
2260         return 0;
2261 }
2262
2263 /**
2264  * Validate TCP item.
2265  *
2266  * @param[in] item
2267  *   Item specification.
2268  * @param[in] item_flags
2269  *   Bit-fields that holds the items detected until now.
2270  * @param[in] target_protocol
2271  *   The next protocol in the previous item.
2272  * @param[out] error
2273  *   Pointer to error structure.
2274  *
2275  * @return
2276  *   0 on success, a negative errno value otherwise and rte_errno is set.
2277  */
2278 int
2279 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
2280                             uint64_t item_flags,
2281                             uint8_t target_protocol,
2282                             const struct rte_flow_item_tcp *flow_mask,
2283                             struct rte_flow_error *error)
2284 {
2285         const struct rte_flow_item_tcp *mask = item->mask;
2286         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2287         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2288                                       MLX5_FLOW_LAYER_OUTER_L3;
2289         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2290                                       MLX5_FLOW_LAYER_OUTER_L4;
2291         int ret;
2292
2293         MLX5_ASSERT(flow_mask);
2294         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
2295                 return rte_flow_error_set(error, EINVAL,
2296                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2297                                           "protocol filtering not compatible"
2298                                           " with TCP layer");
2299         if (!(item_flags & l3m))
2300                 return rte_flow_error_set(error, EINVAL,
2301                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2302                                           "L3 is mandatory to filter on L4");
2303         if (item_flags & l4m)
2304                 return rte_flow_error_set(error, EINVAL,
2305                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2306                                           "multiple L4 layers not supported");
2307         if (!mask)
2308                 mask = &rte_flow_item_tcp_mask;
2309         ret = mlx5_flow_item_acceptable
2310                 (item, (const uint8_t *)mask,
2311                  (const uint8_t *)flow_mask,
2312                  sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2313                  error);
2314         if (ret < 0)
2315                 return ret;
2316         return 0;
2317 }
2318
2319 /**
2320  * Validate VXLAN item.
2321  *
2322  * @param[in] item
2323  *   Item specification.
2324  * @param[in] item_flags
2325  *   Bit-fields that holds the items detected until now.
2326  * @param[in] target_protocol
2327  *   The next protocol in the previous item.
2328  * @param[out] error
2329  *   Pointer to error structure.
2330  *
2331  * @return
2332  *   0 on success, a negative errno value otherwise and rte_errno is set.
2333  */
2334 int
2335 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
2336                               uint64_t item_flags,
2337                               struct rte_flow_error *error)
2338 {
2339         const struct rte_flow_item_vxlan *spec = item->spec;
2340         const struct rte_flow_item_vxlan *mask = item->mask;
2341         int ret;
2342         union vni {
2343                 uint32_t vlan_id;
2344                 uint8_t vni[4];
2345         } id = { .vlan_id = 0, };
2346
2347
2348         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2349                 return rte_flow_error_set(error, ENOTSUP,
2350                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2351                                           "multiple tunnel layers not"
2352                                           " supported");
2353         /*
2354          * Verify only UDPv4 is present as defined in
2355          * https://tools.ietf.org/html/rfc7348
2356          */
2357         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2358                 return rte_flow_error_set(error, EINVAL,
2359                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2360                                           "no outer UDP layer found");
2361         if (!mask)
2362                 mask = &rte_flow_item_vxlan_mask;
2363         ret = mlx5_flow_item_acceptable
2364                 (item, (const uint8_t *)mask,
2365                  (const uint8_t *)&rte_flow_item_vxlan_mask,
2366                  sizeof(struct rte_flow_item_vxlan),
2367                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2368         if (ret < 0)
2369                 return ret;
2370         if (spec) {
2371                 memcpy(&id.vni[1], spec->vni, 3);
2372                 memcpy(&id.vni[1], mask->vni, 3);
2373         }
2374         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2375                 return rte_flow_error_set(error, ENOTSUP,
2376                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2377                                           "VXLAN tunnel must be fully defined");
2378         return 0;
2379 }
2380
2381 /**
2382  * Validate VXLAN_GPE item.
2383  *
2384  * @param[in] item
2385  *   Item specification.
2386  * @param[in] item_flags
2387  *   Bit-fields that holds the items detected until now.
2388  * @param[in] priv
2389  *   Pointer to the private data structure.
2390  * @param[in] target_protocol
2391  *   The next protocol in the previous item.
2392  * @param[out] error
2393  *   Pointer to error structure.
2394  *
2395  * @return
2396  *   0 on success, a negative errno value otherwise and rte_errno is set.
2397  */
2398 int
2399 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
2400                                   uint64_t item_flags,
2401                                   struct rte_eth_dev *dev,
2402                                   struct rte_flow_error *error)
2403 {
2404         struct mlx5_priv *priv = dev->data->dev_private;
2405         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
2406         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
2407         int ret;
2408         union vni {
2409                 uint32_t vlan_id;
2410                 uint8_t vni[4];
2411         } id = { .vlan_id = 0, };
2412
2413         if (!priv->config.l3_vxlan_en)
2414                 return rte_flow_error_set(error, ENOTSUP,
2415                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2416                                           "L3 VXLAN is not enabled by device"
2417                                           " parameter and/or not configured in"
2418                                           " firmware");
2419         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2420                 return rte_flow_error_set(error, ENOTSUP,
2421                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2422                                           "multiple tunnel layers not"
2423                                           " supported");
2424         /*
2425          * Verify only UDPv4 is present as defined in
2426          * https://tools.ietf.org/html/rfc7348
2427          */
2428         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2429                 return rte_flow_error_set(error, EINVAL,
2430                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2431                                           "no outer UDP layer found");
2432         if (!mask)
2433                 mask = &rte_flow_item_vxlan_gpe_mask;
2434         ret = mlx5_flow_item_acceptable
2435                 (item, (const uint8_t *)mask,
2436                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
2437                  sizeof(struct rte_flow_item_vxlan_gpe),
2438                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2439         if (ret < 0)
2440                 return ret;
2441         if (spec) {
2442                 if (spec->protocol)
2443                         return rte_flow_error_set(error, ENOTSUP,
2444                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2445                                                   item,
2446                                                   "VxLAN-GPE protocol"
2447                                                   " not supported");
2448                 memcpy(&id.vni[1], spec->vni, 3);
2449                 memcpy(&id.vni[1], mask->vni, 3);
2450         }
2451         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2452                 return rte_flow_error_set(error, ENOTSUP,
2453                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2454                                           "VXLAN-GPE tunnel must be fully"
2455                                           " defined");
2456         return 0;
2457 }
2458 /**
2459  * Validate GRE Key item.
2460  *
2461  * @param[in] item
2462  *   Item specification.
2463  * @param[in] item_flags
2464  *   Bit flags to mark detected items.
2465  * @param[in] gre_item
2466  *   Pointer to gre_item
2467  * @param[out] error
2468  *   Pointer to error structure.
2469  *
2470  * @return
2471  *   0 on success, a negative errno value otherwise and rte_errno is set.
2472  */
2473 int
2474 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
2475                                 uint64_t item_flags,
2476                                 const struct rte_flow_item *gre_item,
2477                                 struct rte_flow_error *error)
2478 {
2479         const rte_be32_t *mask = item->mask;
2480         int ret = 0;
2481         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
2482         const struct rte_flow_item_gre *gre_spec;
2483         const struct rte_flow_item_gre *gre_mask;
2484
2485         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
2486                 return rte_flow_error_set(error, ENOTSUP,
2487                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2488                                           "Multiple GRE key not support");
2489         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2490                 return rte_flow_error_set(error, ENOTSUP,
2491                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2492                                           "No preceding GRE header");
2493         if (item_flags & MLX5_FLOW_LAYER_INNER)
2494                 return rte_flow_error_set(error, ENOTSUP,
2495                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2496                                           "GRE key following a wrong item");
2497         gre_mask = gre_item->mask;
2498         if (!gre_mask)
2499                 gre_mask = &rte_flow_item_gre_mask;
2500         gre_spec = gre_item->spec;
2501         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2502                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2503                 return rte_flow_error_set(error, EINVAL,
2504                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2505                                           "Key bit must be on");
2506
2507         if (!mask)
2508                 mask = &gre_key_default_mask;
2509         ret = mlx5_flow_item_acceptable
2510                 (item, (const uint8_t *)mask,
2511                  (const uint8_t *)&gre_key_default_mask,
2512                  sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2513         return ret;
2514 }
2515
2516 /**
2517  * Validate GRE item.
2518  *
2519  * @param[in] item
2520  *   Item specification.
2521  * @param[in] item_flags
2522  *   Bit flags to mark detected items.
2523  * @param[in] target_protocol
2524  *   The next protocol in the previous item.
2525  * @param[out] error
2526  *   Pointer to error structure.
2527  *
2528  * @return
2529  *   0 on success, a negative errno value otherwise and rte_errno is set.
2530  */
2531 int
2532 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2533                             uint64_t item_flags,
2534                             uint8_t target_protocol,
2535                             struct rte_flow_error *error)
2536 {
2537         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2538         const struct rte_flow_item_gre *mask = item->mask;
2539         int ret;
2540         const struct rte_flow_item_gre nic_mask = {
2541                 .c_rsvd0_ver = RTE_BE16(0xB000),
2542                 .protocol = RTE_BE16(UINT16_MAX),
2543         };
2544
2545         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2546                 return rte_flow_error_set(error, EINVAL,
2547                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2548                                           "protocol filtering not compatible"
2549                                           " with this GRE layer");
2550         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2551                 return rte_flow_error_set(error, ENOTSUP,
2552                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2553                                           "multiple tunnel layers not"
2554                                           " supported");
2555         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2556                 return rte_flow_error_set(error, ENOTSUP,
2557                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2558                                           "L3 Layer is missing");
2559         if (!mask)
2560                 mask = &rte_flow_item_gre_mask;
2561         ret = mlx5_flow_item_acceptable
2562                 (item, (const uint8_t *)mask,
2563                  (const uint8_t *)&nic_mask,
2564                  sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2565                  error);
2566         if (ret < 0)
2567                 return ret;
2568 #ifndef HAVE_MLX5DV_DR
2569 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2570         if (spec && (spec->protocol & mask->protocol))
2571                 return rte_flow_error_set(error, ENOTSUP,
2572                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2573                                           "without MPLS support the"
2574                                           " specification cannot be used for"
2575                                           " filtering");
2576 #endif
2577 #endif
2578         return 0;
2579 }
2580
2581 /**
2582  * Validate Geneve item.
2583  *
2584  * @param[in] item
2585  *   Item specification.
2586  * @param[in] itemFlags
2587  *   Bit-fields that holds the items detected until now.
2588  * @param[in] enPriv
2589  *   Pointer to the private data structure.
2590  * @param[out] error
2591  *   Pointer to error structure.
2592  *
2593  * @return
2594  *   0 on success, a negative errno value otherwise and rte_errno is set.
2595  */
2596
2597 int
2598 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2599                                uint64_t item_flags,
2600                                struct rte_eth_dev *dev,
2601                                struct rte_flow_error *error)
2602 {
2603         struct mlx5_priv *priv = dev->data->dev_private;
2604         const struct rte_flow_item_geneve *spec = item->spec;
2605         const struct rte_flow_item_geneve *mask = item->mask;
2606         int ret;
2607         uint16_t gbhdr;
2608         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2609                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2610         const struct rte_flow_item_geneve nic_mask = {
2611                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2612                 .vni = "\xff\xff\xff",
2613                 .protocol = RTE_BE16(UINT16_MAX),
2614         };
2615
2616         if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2617                 return rte_flow_error_set(error, ENOTSUP,
2618                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2619                                           "L3 Geneve is not enabled by device"
2620                                           " parameter and/or not configured in"
2621                                           " firmware");
2622         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2623                 return rte_flow_error_set(error, ENOTSUP,
2624                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2625                                           "multiple tunnel layers not"
2626                                           " supported");
2627         /*
2628          * Verify only UDPv4 is present as defined in
2629          * https://tools.ietf.org/html/rfc7348
2630          */
2631         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2632                 return rte_flow_error_set(error, EINVAL,
2633                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2634                                           "no outer UDP layer found");
2635         if (!mask)
2636                 mask = &rte_flow_item_geneve_mask;
2637         ret = mlx5_flow_item_acceptable
2638                                   (item, (const uint8_t *)mask,
2639                                    (const uint8_t *)&nic_mask,
2640                                    sizeof(struct rte_flow_item_geneve),
2641                                    MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2642         if (ret)
2643                 return ret;
2644         if (spec) {
2645                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2646                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2647                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2648                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2649                         return rte_flow_error_set(error, ENOTSUP,
2650                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2651                                                   item,
2652                                                   "Geneve protocol unsupported"
2653                                                   " fields are being used");
2654                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2655                         return rte_flow_error_set
2656                                         (error, ENOTSUP,
2657                                          RTE_FLOW_ERROR_TYPE_ITEM,
2658                                          item,
2659                                          "Unsupported Geneve options length");
2660         }
2661         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2662                 return rte_flow_error_set
2663                                     (error, ENOTSUP,
2664                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2665                                      "Geneve tunnel must be fully defined");
2666         return 0;
2667 }
2668
2669 /**
2670  * Validate Geneve TLV option item.
2671  *
2672  * @param[in] item
2673  *   Item specification.
2674  * @param[in] last_item
2675  *   Previous validated item in the pattern items.
2676  * @param[in] geneve_item
2677  *   Previous GENEVE item specification.
2678  * @param[in] dev
2679  *   Pointer to the rte_eth_dev structure.
2680  * @param[out] error
2681  *   Pointer to error structure.
2682  *
2683  * @return
2684  *   0 on success, a negative errno value otherwise and rte_errno is set.
2685  */
2686 int
2687 mlx5_flow_validate_item_geneve_opt(const struct rte_flow_item *item,
2688                                    uint64_t last_item,
2689                                    const struct rte_flow_item *geneve_item,
2690                                    struct rte_eth_dev *dev,
2691                                    struct rte_flow_error *error)
2692 {
2693         struct mlx5_priv *priv = dev->data->dev_private;
2694         struct mlx5_dev_ctx_shared *sh = priv->sh;
2695         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource;
2696         struct mlx5_hca_attr *hca_attr = &priv->config.hca_attr;
2697         uint8_t data_max_supported =
2698                         hca_attr->max_geneve_tlv_option_data_len * 4;
2699         struct mlx5_dev_config *config = &priv->config;
2700         const struct rte_flow_item_geneve *geneve_spec;
2701         const struct rte_flow_item_geneve *geneve_mask;
2702         const struct rte_flow_item_geneve_opt *spec = item->spec;
2703         const struct rte_flow_item_geneve_opt *mask = item->mask;
2704         unsigned int i;
2705         unsigned int data_len;
2706         uint8_t tlv_option_len;
2707         uint16_t optlen_m, optlen_v;
2708         const struct rte_flow_item_geneve_opt full_mask = {
2709                 .option_class = RTE_BE16(0xffff),
2710                 .option_type = 0xff,
2711                 .option_len = 0x1f,
2712         };
2713
2714         if (!mask)
2715                 mask = &rte_flow_item_geneve_opt_mask;
2716         if (!spec)
2717                 return rte_flow_error_set
2718                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2719                         "Geneve TLV opt class/type/length must be specified");
2720         if ((uint32_t)spec->option_len > MLX5_GENEVE_OPTLEN_MASK)
2721                 return rte_flow_error_set
2722                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2723                         "Geneve TLV opt length exceeeds the limit (31)");
2724         /* Check if class type and length masks are full. */
2725         if (full_mask.option_class != mask->option_class ||
2726             full_mask.option_type != mask->option_type ||
2727             full_mask.option_len != (mask->option_len & full_mask.option_len))
2728                 return rte_flow_error_set
2729                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2730                         "Geneve TLV opt class/type/length masks must be full");
2731         /* Check if length is supported */
2732         if ((uint32_t)spec->option_len >
2733                         config->hca_attr.max_geneve_tlv_option_data_len)
2734                 return rte_flow_error_set
2735                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2736                         "Geneve TLV opt length not supported");
2737         if (config->hca_attr.max_geneve_tlv_options > 1)
2738                 DRV_LOG(DEBUG,
2739                         "max_geneve_tlv_options supports more than 1 option");
2740         /* Check GENEVE item preceding. */
2741         if (!geneve_item || !(last_item & MLX5_FLOW_LAYER_GENEVE))
2742                 return rte_flow_error_set
2743                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2744                         "Geneve opt item must be preceded with Geneve item");
2745         geneve_spec = geneve_item->spec;
2746         geneve_mask = geneve_item->mask ? geneve_item->mask :
2747                                           &rte_flow_item_geneve_mask;
2748         /* Check if GENEVE TLV option size doesn't exceed option length */
2749         if (geneve_spec && (geneve_mask->ver_opt_len_o_c_rsvd0 ||
2750                             geneve_spec->ver_opt_len_o_c_rsvd0)) {
2751                 tlv_option_len = spec->option_len & mask->option_len;
2752                 optlen_v = rte_be_to_cpu_16(geneve_spec->ver_opt_len_o_c_rsvd0);
2753                 optlen_v = MLX5_GENEVE_OPTLEN_VAL(optlen_v);
2754                 optlen_m = rte_be_to_cpu_16(geneve_mask->ver_opt_len_o_c_rsvd0);
2755                 optlen_m = MLX5_GENEVE_OPTLEN_VAL(optlen_m);
2756                 if ((optlen_v & optlen_m) <= tlv_option_len)
2757                         return rte_flow_error_set
2758                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2759                                  "GENEVE TLV option length exceeds optlen");
2760         }
2761         /* Check if length is 0 or data is 0. */
2762         if (spec->data == NULL || spec->option_len == 0)
2763                 return rte_flow_error_set
2764                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2765                         "Geneve TLV opt with zero data/length not supported");
2766         /* Check not all data & mask are 0. */
2767         data_len = spec->option_len * 4;
2768         if (mask->data == NULL) {
2769                 for (i = 0; i < data_len; i++)
2770                         if (spec->data[i])
2771                                 break;
2772                 if (i == data_len)
2773                         return rte_flow_error_set(error, ENOTSUP,
2774                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2775                                 "Can't match on Geneve option data 0");
2776         } else {
2777                 for (i = 0; i < data_len; i++)
2778                         if (spec->data[i] & mask->data[i])
2779                                 break;
2780                 if (i == data_len)
2781                         return rte_flow_error_set(error, ENOTSUP,
2782                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2783                                 "Can't match on Geneve option data and mask 0");
2784                 /* Check data mask supported. */
2785                 for (i = data_max_supported; i < data_len ; i++)
2786                         if (mask->data[i])
2787                                 return rte_flow_error_set(error, ENOTSUP,
2788                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2789                                         "Data mask is of unsupported size");
2790         }
2791         /* Check GENEVE option is supported in NIC. */
2792         if (!config->hca_attr.geneve_tlv_opt)
2793                 return rte_flow_error_set
2794                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2795                         "Geneve TLV opt not supported");
2796         /* Check if we already have geneve option with different type/class. */
2797         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
2798         geneve_opt_resource = sh->geneve_tlv_option_resource;
2799         if (geneve_opt_resource != NULL)
2800                 if (geneve_opt_resource->option_class != spec->option_class ||
2801                     geneve_opt_resource->option_type != spec->option_type ||
2802                     geneve_opt_resource->length != spec->option_len) {
2803                         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
2804                         return rte_flow_error_set(error, ENOTSUP,
2805                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2806                                 "Only one Geneve TLV option supported");
2807                 }
2808         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
2809         return 0;
2810 }
2811
2812 /**
2813  * Validate MPLS item.
2814  *
2815  * @param[in] dev
2816  *   Pointer to the rte_eth_dev structure.
2817  * @param[in] item
2818  *   Item specification.
2819  * @param[in] item_flags
2820  *   Bit-fields that holds the items detected until now.
2821  * @param[in] prev_layer
2822  *   The protocol layer indicated in previous item.
2823  * @param[out] error
2824  *   Pointer to error structure.
2825  *
2826  * @return
2827  *   0 on success, a negative errno value otherwise and rte_errno is set.
2828  */
2829 int
2830 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
2831                              const struct rte_flow_item *item __rte_unused,
2832                              uint64_t item_flags __rte_unused,
2833                              uint64_t prev_layer __rte_unused,
2834                              struct rte_flow_error *error)
2835 {
2836 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2837         const struct rte_flow_item_mpls *mask = item->mask;
2838         struct mlx5_priv *priv = dev->data->dev_private;
2839         int ret;
2840
2841         if (!priv->config.mpls_en)
2842                 return rte_flow_error_set(error, ENOTSUP,
2843                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2844                                           "MPLS not supported or"
2845                                           " disabled in firmware"
2846                                           " configuration.");
2847         /* MPLS over IP, UDP, GRE is allowed */
2848         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
2849                             MLX5_FLOW_LAYER_OUTER_L4_UDP |
2850                             MLX5_FLOW_LAYER_GRE |
2851                             MLX5_FLOW_LAYER_GRE_KEY)))
2852                 return rte_flow_error_set(error, EINVAL,
2853                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2854                                           "protocol filtering not compatible"
2855                                           " with MPLS layer");
2856         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
2857         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
2858             !(item_flags & MLX5_FLOW_LAYER_GRE))
2859                 return rte_flow_error_set(error, ENOTSUP,
2860                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2861                                           "multiple tunnel layers not"
2862                                           " supported");
2863         if (!mask)
2864                 mask = &rte_flow_item_mpls_mask;
2865         ret = mlx5_flow_item_acceptable
2866                 (item, (const uint8_t *)mask,
2867                  (const uint8_t *)&rte_flow_item_mpls_mask,
2868                  sizeof(struct rte_flow_item_mpls),
2869                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2870         if (ret < 0)
2871                 return ret;
2872         return 0;
2873 #else
2874         return rte_flow_error_set(error, ENOTSUP,
2875                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
2876                                   "MPLS is not supported by Verbs, please"
2877                                   " update.");
2878 #endif
2879 }
2880
2881 /**
2882  * Validate NVGRE item.
2883  *
2884  * @param[in] item
2885  *   Item specification.
2886  * @param[in] item_flags
2887  *   Bit flags to mark detected items.
2888  * @param[in] target_protocol
2889  *   The next protocol in the previous item.
2890  * @param[out] error
2891  *   Pointer to error structure.
2892  *
2893  * @return
2894  *   0 on success, a negative errno value otherwise and rte_errno is set.
2895  */
2896 int
2897 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
2898                               uint64_t item_flags,
2899                               uint8_t target_protocol,
2900                               struct rte_flow_error *error)
2901 {
2902         const struct rte_flow_item_nvgre *mask = item->mask;
2903         int ret;
2904
2905         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2906                 return rte_flow_error_set(error, EINVAL,
2907                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2908                                           "protocol filtering not compatible"
2909                                           " with this GRE layer");
2910         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2911                 return rte_flow_error_set(error, ENOTSUP,
2912                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2913                                           "multiple tunnel layers not"
2914                                           " supported");
2915         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2916                 return rte_flow_error_set(error, ENOTSUP,
2917                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2918                                           "L3 Layer is missing");
2919         if (!mask)
2920                 mask = &rte_flow_item_nvgre_mask;
2921         ret = mlx5_flow_item_acceptable
2922                 (item, (const uint8_t *)mask,
2923                  (const uint8_t *)&rte_flow_item_nvgre_mask,
2924                  sizeof(struct rte_flow_item_nvgre),
2925                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2926         if (ret < 0)
2927                 return ret;
2928         return 0;
2929 }
2930
2931 /**
2932  * Validate eCPRI item.
2933  *
2934  * @param[in] item
2935  *   Item specification.
2936  * @param[in] item_flags
2937  *   Bit-fields that holds the items detected until now.
2938  * @param[in] last_item
2939  *   Previous validated item in the pattern items.
2940  * @param[in] ether_type
2941  *   Type in the ethernet layer header (including dot1q).
2942  * @param[in] acc_mask
2943  *   Acceptable mask, if NULL default internal default mask
2944  *   will be used to check whether item fields are supported.
2945  * @param[out] error
2946  *   Pointer to error structure.
2947  *
2948  * @return
2949  *   0 on success, a negative errno value otherwise and rte_errno is set.
2950  */
2951 int
2952 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item,
2953                               uint64_t item_flags,
2954                               uint64_t last_item,
2955                               uint16_t ether_type,
2956                               const struct rte_flow_item_ecpri *acc_mask,
2957                               struct rte_flow_error *error)
2958 {
2959         const struct rte_flow_item_ecpri *mask = item->mask;
2960         const struct rte_flow_item_ecpri nic_mask = {
2961                 .hdr = {
2962                         .common = {
2963                                 .u32 =
2964                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
2965                                         .type = 0xFF,
2966                                         }).u32),
2967                         },
2968                         .dummy[0] = 0xFFFFFFFF,
2969                 },
2970         };
2971         const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 |
2972                                         MLX5_FLOW_LAYER_OUTER_VLAN);
2973         struct rte_flow_item_ecpri mask_lo;
2974
2975         if (!(last_item & outer_l2_vlan) &&
2976             last_item != MLX5_FLOW_LAYER_OUTER_L4_UDP)
2977                 return rte_flow_error_set(error, EINVAL,
2978                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2979                                           "eCPRI can only follow L2/VLAN layer or UDP layer");
2980         if ((last_item & outer_l2_vlan) && ether_type &&
2981             ether_type != RTE_ETHER_TYPE_ECPRI)
2982                 return rte_flow_error_set(error, EINVAL,
2983                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2984                                           "eCPRI cannot follow L2/VLAN layer which ether type is not 0xAEFE");
2985         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2986                 return rte_flow_error_set(error, EINVAL,
2987                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2988                                           "eCPRI with tunnel is not supported right now");
2989         if (item_flags & MLX5_FLOW_LAYER_OUTER_L3)
2990                 return rte_flow_error_set(error, ENOTSUP,
2991                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2992                                           "multiple L3 layers not supported");
2993         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP)
2994                 return rte_flow_error_set(error, EINVAL,
2995                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2996                                           "eCPRI cannot coexist with a TCP layer");
2997         /* In specification, eCPRI could be over UDP layer. */
2998         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)
2999                 return rte_flow_error_set(error, EINVAL,
3000                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3001                                           "eCPRI over UDP layer is not yet supported right now");
3002         /* Mask for type field in common header could be zero. */
3003         if (!mask)
3004                 mask = &rte_flow_item_ecpri_mask;
3005         mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32);
3006         /* Input mask is in big-endian format. */
3007         if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff)
3008                 return rte_flow_error_set(error, EINVAL,
3009                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3010                                           "partial mask is not supported for protocol");
3011         else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0)
3012                 return rte_flow_error_set(error, EINVAL,
3013                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3014                                           "message header mask must be after a type mask");
3015         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
3016                                          acc_mask ? (const uint8_t *)acc_mask
3017                                                   : (const uint8_t *)&nic_mask,
3018                                          sizeof(struct rte_flow_item_ecpri),
3019                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3020 }
3021
3022 /**
3023  * Release resource related QUEUE/RSS action split.
3024  *
3025  * @param dev
3026  *   Pointer to Ethernet device.
3027  * @param flow
3028  *   Flow to release id's from.
3029  */
3030 static void
3031 flow_mreg_split_qrss_release(struct rte_eth_dev *dev,
3032                              struct rte_flow *flow)
3033 {
3034         struct mlx5_priv *priv = dev->data->dev_private;
3035         uint32_t handle_idx;
3036         struct mlx5_flow_handle *dev_handle;
3037
3038         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
3039                        handle_idx, dev_handle, next)
3040                 if (dev_handle->split_flow_id &&
3041                     !dev_handle->is_meter_flow_id)
3042                         mlx5_ipool_free(priv->sh->ipool
3043                                         [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
3044                                         dev_handle->split_flow_id);
3045 }
3046
3047 static int
3048 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
3049                    const struct rte_flow_attr *attr __rte_unused,
3050                    const struct rte_flow_item items[] __rte_unused,
3051                    const struct rte_flow_action actions[] __rte_unused,
3052                    bool external __rte_unused,
3053                    int hairpin __rte_unused,
3054                    struct rte_flow_error *error)
3055 {
3056         return rte_flow_error_set(error, ENOTSUP,
3057                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3058 }
3059
3060 static struct mlx5_flow *
3061 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
3062                   const struct rte_flow_attr *attr __rte_unused,
3063                   const struct rte_flow_item items[] __rte_unused,
3064                   const struct rte_flow_action actions[] __rte_unused,
3065                   struct rte_flow_error *error)
3066 {
3067         rte_flow_error_set(error, ENOTSUP,
3068                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3069         return NULL;
3070 }
3071
3072 static int
3073 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
3074                     struct mlx5_flow *dev_flow __rte_unused,
3075                     const struct rte_flow_attr *attr __rte_unused,
3076                     const struct rte_flow_item items[] __rte_unused,
3077                     const struct rte_flow_action actions[] __rte_unused,
3078                     struct rte_flow_error *error)
3079 {
3080         return rte_flow_error_set(error, ENOTSUP,
3081                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3082 }
3083
3084 static int
3085 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
3086                 struct rte_flow *flow __rte_unused,
3087                 struct rte_flow_error *error)
3088 {
3089         return rte_flow_error_set(error, ENOTSUP,
3090                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3091 }
3092
3093 static void
3094 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
3095                  struct rte_flow *flow __rte_unused)
3096 {
3097 }
3098
3099 static void
3100 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
3101                   struct rte_flow *flow __rte_unused)
3102 {
3103 }
3104
3105 static int
3106 flow_null_query(struct rte_eth_dev *dev __rte_unused,
3107                 struct rte_flow *flow __rte_unused,
3108                 const struct rte_flow_action *actions __rte_unused,
3109                 void *data __rte_unused,
3110                 struct rte_flow_error *error)
3111 {
3112         return rte_flow_error_set(error, ENOTSUP,
3113                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3114 }
3115
3116 static int
3117 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused,
3118                       uint32_t domains __rte_unused,
3119                       uint32_t flags __rte_unused)
3120 {
3121         return 0;
3122 }
3123
3124 /* Void driver to protect from null pointer reference. */
3125 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
3126         .validate = flow_null_validate,
3127         .prepare = flow_null_prepare,
3128         .translate = flow_null_translate,
3129         .apply = flow_null_apply,
3130         .remove = flow_null_remove,
3131         .destroy = flow_null_destroy,
3132         .query = flow_null_query,
3133         .sync_domain = flow_null_sync_domain,
3134 };
3135
3136 /**
3137  * Select flow driver type according to flow attributes and device
3138  * configuration.
3139  *
3140  * @param[in] dev
3141  *   Pointer to the dev structure.
3142  * @param[in] attr
3143  *   Pointer to the flow attributes.
3144  *
3145  * @return
3146  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
3147  */
3148 static enum mlx5_flow_drv_type
3149 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
3150 {
3151         struct mlx5_priv *priv = dev->data->dev_private;
3152         /* The OS can determine first a specific flow type (DV, VERBS) */
3153         enum mlx5_flow_drv_type type = mlx5_flow_os_get_type();
3154
3155         if (type != MLX5_FLOW_TYPE_MAX)
3156                 return type;
3157         /* If no OS specific type - continue with DV/VERBS selection */
3158         if (attr->transfer && priv->config.dv_esw_en)
3159                 type = MLX5_FLOW_TYPE_DV;
3160         if (!attr->transfer)
3161                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
3162                                                  MLX5_FLOW_TYPE_VERBS;
3163         return type;
3164 }
3165
3166 #define flow_get_drv_ops(type) flow_drv_ops[type]
3167
3168 /**
3169  * Flow driver validation API. This abstracts calling driver specific functions.
3170  * The type of flow driver is determined according to flow attributes.
3171  *
3172  * @param[in] dev
3173  *   Pointer to the dev structure.
3174  * @param[in] attr
3175  *   Pointer to the flow attributes.
3176  * @param[in] items
3177  *   Pointer to the list of items.
3178  * @param[in] actions
3179  *   Pointer to the list of actions.
3180  * @param[in] external
3181  *   This flow rule is created by request external to PMD.
3182  * @param[in] hairpin
3183  *   Number of hairpin TX actions, 0 means classic flow.
3184  * @param[out] error
3185  *   Pointer to the error structure.
3186  *
3187  * @return
3188  *   0 on success, a negative errno value otherwise and rte_errno is set.
3189  */
3190 static inline int
3191 flow_drv_validate(struct rte_eth_dev *dev,
3192                   const struct rte_flow_attr *attr,
3193                   const struct rte_flow_item items[],
3194                   const struct rte_flow_action actions[],
3195                   bool external, int hairpin, struct rte_flow_error *error)
3196 {
3197         const struct mlx5_flow_driver_ops *fops;
3198         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
3199
3200         fops = flow_get_drv_ops(type);
3201         return fops->validate(dev, attr, items, actions, external,
3202                               hairpin, error);
3203 }
3204
3205 /**
3206  * Flow driver preparation API. This abstracts calling driver specific
3207  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3208  * calculates the size of memory required for device flow, allocates the memory,
3209  * initializes the device flow and returns the pointer.
3210  *
3211  * @note
3212  *   This function initializes device flow structure such as dv or verbs in
3213  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
3214  *   rest. For example, adding returning device flow to flow->dev_flow list and
3215  *   setting backward reference to the flow should be done out of this function.
3216  *   layers field is not filled either.
3217  *
3218  * @param[in] dev
3219  *   Pointer to the dev structure.
3220  * @param[in] attr
3221  *   Pointer to the flow attributes.
3222  * @param[in] items
3223  *   Pointer to the list of items.
3224  * @param[in] actions
3225  *   Pointer to the list of actions.
3226  * @param[in] flow_idx
3227  *   This memory pool index to the flow.
3228  * @param[out] error
3229  *   Pointer to the error structure.
3230  *
3231  * @return
3232  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
3233  */
3234 static inline struct mlx5_flow *
3235 flow_drv_prepare(struct rte_eth_dev *dev,
3236                  const struct rte_flow *flow,
3237                  const struct rte_flow_attr *attr,
3238                  const struct rte_flow_item items[],
3239                  const struct rte_flow_action actions[],
3240                  uint32_t flow_idx,
3241                  struct rte_flow_error *error)
3242 {
3243         const struct mlx5_flow_driver_ops *fops;
3244         enum mlx5_flow_drv_type type = flow->drv_type;
3245         struct mlx5_flow *mlx5_flow = NULL;
3246
3247         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3248         fops = flow_get_drv_ops(type);
3249         mlx5_flow = fops->prepare(dev, attr, items, actions, error);
3250         if (mlx5_flow)
3251                 mlx5_flow->flow_idx = flow_idx;
3252         return mlx5_flow;
3253 }
3254
3255 /**
3256  * Flow driver translation API. This abstracts calling driver specific
3257  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3258  * translates a generic flow into a driver flow. flow_drv_prepare() must
3259  * precede.
3260  *
3261  * @note
3262  *   dev_flow->layers could be filled as a result of parsing during translation
3263  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
3264  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
3265  *   flow->actions could be overwritten even though all the expanded dev_flows
3266  *   have the same actions.
3267  *
3268  * @param[in] dev
3269  *   Pointer to the rte dev structure.
3270  * @param[in, out] dev_flow
3271  *   Pointer to the mlx5 flow.
3272  * @param[in] attr
3273  *   Pointer to the flow attributes.
3274  * @param[in] items
3275  *   Pointer to the list of items.
3276  * @param[in] actions
3277  *   Pointer to the list of actions.
3278  * @param[out] error
3279  *   Pointer to the error structure.
3280  *
3281  * @return
3282  *   0 on success, a negative errno value otherwise and rte_errno is set.
3283  */
3284 static inline int
3285 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
3286                    const struct rte_flow_attr *attr,
3287                    const struct rte_flow_item items[],
3288                    const struct rte_flow_action actions[],
3289                    struct rte_flow_error *error)
3290 {
3291         const struct mlx5_flow_driver_ops *fops;
3292         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
3293
3294         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3295         fops = flow_get_drv_ops(type);
3296         return fops->translate(dev, dev_flow, attr, items, actions, error);
3297 }
3298
3299 /**
3300  * Flow driver apply API. This abstracts calling driver specific functions.
3301  * Parent flow (rte_flow) should have driver type (drv_type). It applies
3302  * translated driver flows on to device. flow_drv_translate() must precede.
3303  *
3304  * @param[in] dev
3305  *   Pointer to Ethernet device structure.
3306  * @param[in, out] flow
3307  *   Pointer to flow structure.
3308  * @param[out] error
3309  *   Pointer to error structure.
3310  *
3311  * @return
3312  *   0 on success, a negative errno value otherwise and rte_errno is set.
3313  */
3314 static inline int
3315 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
3316                struct rte_flow_error *error)
3317 {
3318         const struct mlx5_flow_driver_ops *fops;
3319         enum mlx5_flow_drv_type type = flow->drv_type;
3320
3321         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3322         fops = flow_get_drv_ops(type);
3323         return fops->apply(dev, flow, error);
3324 }
3325
3326 /**
3327  * Flow driver destroy API. This abstracts calling driver specific functions.
3328  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
3329  * on device and releases resources of the flow.
3330  *
3331  * @param[in] dev
3332  *   Pointer to Ethernet device.
3333  * @param[in, out] flow
3334  *   Pointer to flow structure.
3335  */
3336 static inline void
3337 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
3338 {
3339         const struct mlx5_flow_driver_ops *fops;
3340         enum mlx5_flow_drv_type type = flow->drv_type;
3341
3342         flow_mreg_split_qrss_release(dev, flow);
3343         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3344         fops = flow_get_drv_ops(type);
3345         fops->destroy(dev, flow);
3346 }
3347
3348 /**
3349  * Flow driver find RSS policy tbl API. This abstracts calling driver
3350  * specific functions. Parent flow (rte_flow) should have driver
3351  * type (drv_type). It will find the RSS policy table that has the rss_desc.
3352  *
3353  * @param[in] dev
3354  *   Pointer to Ethernet device.
3355  * @param[in, out] flow
3356  *   Pointer to flow structure.
3357  * @param[in] policy
3358  *   Pointer to meter policy table.
3359  * @param[in] rss_desc
3360  *   Pointer to rss_desc
3361  */
3362 static struct mlx5_flow_meter_sub_policy *
3363 flow_drv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
3364                 struct rte_flow *flow,
3365                 struct mlx5_flow_meter_policy *policy,
3366                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
3367 {
3368         const struct mlx5_flow_driver_ops *fops;
3369         enum mlx5_flow_drv_type type = flow->drv_type;
3370
3371         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3372         fops = flow_get_drv_ops(type);
3373         return fops->meter_sub_policy_rss_prepare(dev, policy, rss_desc);
3374 }
3375
3376 /**
3377  * Get RSS action from the action list.
3378  *
3379  * @param[in] dev
3380  *   Pointer to Ethernet device.
3381  * @param[in] actions
3382  *   Pointer to the list of actions.
3383  * @param[in] flow
3384  *   Parent flow structure pointer.
3385  *
3386  * @return
3387  *   Pointer to the RSS action if exist, else return NULL.
3388  */
3389 static const struct rte_flow_action_rss*
3390 flow_get_rss_action(struct rte_eth_dev *dev,
3391                     const struct rte_flow_action actions[])
3392 {
3393         struct mlx5_priv *priv = dev->data->dev_private;
3394         const struct rte_flow_action_rss *rss = NULL;
3395
3396         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3397                 switch (actions->type) {
3398                 case RTE_FLOW_ACTION_TYPE_RSS:
3399                         rss = actions->conf;
3400                         break;
3401                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
3402                 {
3403                         const struct rte_flow_action_sample *sample =
3404                                                                 actions->conf;
3405                         const struct rte_flow_action *act = sample->actions;
3406                         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++)
3407                                 if (act->type == RTE_FLOW_ACTION_TYPE_RSS)
3408                                         rss = act->conf;
3409                         break;
3410                 }
3411                 case RTE_FLOW_ACTION_TYPE_METER:
3412                 {
3413                         uint32_t mtr_idx;
3414                         struct mlx5_flow_meter_info *fm;
3415                         struct mlx5_flow_meter_policy *policy;
3416                         const struct rte_flow_action_meter *mtr = actions->conf;
3417
3418                         fm = mlx5_flow_meter_find(priv, mtr->mtr_id, &mtr_idx);
3419                         if (fm) {
3420                                 policy = mlx5_flow_meter_policy_find(dev,
3421                                                 fm->policy_id, NULL);
3422                                 if (policy && policy->is_rss)
3423                                         rss =
3424                                 policy->act_cnt[RTE_COLOR_GREEN].rss->conf;
3425                         }
3426                         break;
3427                 }
3428                 default:
3429                         break;
3430                 }
3431         }
3432         return rss;
3433 }
3434
3435 /**
3436  * Get ASO age action by index.
3437  *
3438  * @param[in] dev
3439  *   Pointer to the Ethernet device structure.
3440  * @param[in] age_idx
3441  *   Index to the ASO age action.
3442  *
3443  * @return
3444  *   The specified ASO age action.
3445  */
3446 struct mlx5_aso_age_action*
3447 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx)
3448 {
3449         uint16_t pool_idx = age_idx & UINT16_MAX;
3450         uint16_t offset = (age_idx >> 16) & UINT16_MAX;
3451         struct mlx5_priv *priv = dev->data->dev_private;
3452         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
3453         struct mlx5_aso_age_pool *pool = mng->pools[pool_idx];
3454
3455         return &pool->actions[offset - 1];
3456 }
3457
3458 /* maps indirect action to translated direct in some actions array */
3459 struct mlx5_translated_action_handle {
3460         struct rte_flow_action_handle *action; /**< Indirect action handle. */
3461         int index; /**< Index in related array of rte_flow_action. */
3462 };
3463
3464 /**
3465  * Translates actions of type RTE_FLOW_ACTION_TYPE_INDIRECT to related
3466  * direct action if translation possible.
3467  * This functionality used to run same execution path for both direct and
3468  * indirect actions on flow create. All necessary preparations for indirect
3469  * action handling should be performed on *handle* actions list returned
3470  * from this call.
3471  *
3472  * @param[in] dev
3473  *   Pointer to Ethernet device.
3474  * @param[in] actions
3475  *   List of actions to translate.
3476  * @param[out] handle
3477  *   List to store translated indirect action object handles.
3478  * @param[in, out] indir_n
3479  *   Size of *handle* array. On return should be updated with number of
3480  *   indirect actions retrieved from the *actions* list.
3481  * @param[out] translated_actions
3482  *   List of actions where all indirect actions were translated to direct
3483  *   if possible. NULL if no translation took place.
3484  * @param[out] error
3485  *   Pointer to the error structure.
3486  *
3487  * @return
3488  *   0 on success, a negative errno value otherwise and rte_errno is set.
3489  */
3490 static int
3491 flow_action_handles_translate(struct rte_eth_dev *dev,
3492                               const struct rte_flow_action actions[],
3493                               struct mlx5_translated_action_handle *handle,
3494                               int *indir_n,
3495                               struct rte_flow_action **translated_actions,
3496                               struct rte_flow_error *error)
3497 {
3498         struct mlx5_priv *priv = dev->data->dev_private;
3499         struct rte_flow_action *translated = NULL;
3500         size_t actions_size;
3501         int n;
3502         int copied_n = 0;
3503         struct mlx5_translated_action_handle *handle_end = NULL;
3504
3505         for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
3506                 if (actions[n].type != RTE_FLOW_ACTION_TYPE_INDIRECT)
3507                         continue;
3508                 if (copied_n == *indir_n) {
3509                         return rte_flow_error_set
3510                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
3511                                  NULL, "too many shared actions");
3512                 }
3513                 rte_memcpy(&handle[copied_n].action, &actions[n].conf,
3514                            sizeof(actions[n].conf));
3515                 handle[copied_n].index = n;
3516                 copied_n++;
3517         }
3518         n++;
3519         *indir_n = copied_n;
3520         if (!copied_n)
3521                 return 0;
3522         actions_size = sizeof(struct rte_flow_action) * n;
3523         translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY);
3524         if (!translated) {
3525                 rte_errno = ENOMEM;
3526                 return -ENOMEM;
3527         }
3528         memcpy(translated, actions, actions_size);
3529         for (handle_end = handle + copied_n; handle < handle_end; handle++) {
3530                 struct mlx5_shared_action_rss *shared_rss;
3531                 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
3532                 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
3533                 uint32_t idx = act_idx &
3534                                ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
3535
3536                 switch (type) {
3537                 case MLX5_INDIRECT_ACTION_TYPE_RSS:
3538                         shared_rss = mlx5_ipool_get
3539                           (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
3540                         translated[handle->index].type =
3541                                 RTE_FLOW_ACTION_TYPE_RSS;
3542                         translated[handle->index].conf =
3543                                 &shared_rss->origin;
3544                         break;
3545                 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
3546                         translated[handle->index].type =
3547                                                 (enum rte_flow_action_type)
3548                                                 MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
3549                         translated[handle->index].conf = (void *)(uintptr_t)idx;
3550                         break;
3551                 case MLX5_INDIRECT_ACTION_TYPE_AGE:
3552                         if (priv->sh->flow_hit_aso_en) {
3553                                 translated[handle->index].type =
3554                                         (enum rte_flow_action_type)
3555                                         MLX5_RTE_FLOW_ACTION_TYPE_AGE;
3556                                 translated[handle->index].conf =
3557                                                          (void *)(uintptr_t)idx;
3558                                 break;
3559                         }
3560                         /* Fall-through */
3561                 default:
3562                         mlx5_free(translated);
3563                         return rte_flow_error_set
3564                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
3565                                  NULL, "invalid indirect action type");
3566                 }
3567         }
3568         *translated_actions = translated;
3569         return 0;
3570 }
3571
3572 /**
3573  * Get Shared RSS action from the action list.
3574  *
3575  * @param[in] dev
3576  *   Pointer to Ethernet device.
3577  * @param[in] shared
3578  *   Pointer to the list of actions.
3579  * @param[in] shared_n
3580  *   Actions list length.
3581  *
3582  * @return
3583  *   The MLX5 RSS action ID if exists, otherwise return 0.
3584  */
3585 static uint32_t
3586 flow_get_shared_rss_action(struct rte_eth_dev *dev,
3587                            struct mlx5_translated_action_handle *handle,
3588                            int shared_n)
3589 {
3590         struct mlx5_translated_action_handle *handle_end;
3591         struct mlx5_priv *priv = dev->data->dev_private;
3592         struct mlx5_shared_action_rss *shared_rss;
3593
3594
3595         for (handle_end = handle + shared_n; handle < handle_end; handle++) {
3596                 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
3597                 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
3598                 uint32_t idx = act_idx &
3599                                ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
3600                 switch (type) {
3601                 case MLX5_INDIRECT_ACTION_TYPE_RSS:
3602                         shared_rss = mlx5_ipool_get
3603                                 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
3604                                                                            idx);
3605                         __atomic_add_fetch(&shared_rss->refcnt, 1,
3606                                            __ATOMIC_RELAXED);
3607                         return idx;
3608                 default:
3609                         break;
3610                 }
3611         }
3612         return 0;
3613 }
3614
3615 static unsigned int
3616 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
3617 {
3618         const struct rte_flow_item *item;
3619         unsigned int has_vlan = 0;
3620
3621         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
3622                 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
3623                         has_vlan = 1;
3624                         break;
3625                 }
3626         }
3627         if (has_vlan)
3628                 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
3629                                        MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
3630         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
3631                                MLX5_EXPANSION_ROOT_OUTER;
3632 }
3633
3634 /**
3635  *  Get layer flags from the prefix flow.
3636  *
3637  *  Some flows may be split to several subflows, the prefix subflow gets the
3638  *  match items and the suffix sub flow gets the actions.
3639  *  Some actions need the user defined match item flags to get the detail for
3640  *  the action.
3641  *  This function helps the suffix flow to get the item layer flags from prefix
3642  *  subflow.
3643  *
3644  * @param[in] dev_flow
3645  *   Pointer the created preifx subflow.
3646  *
3647  * @return
3648  *   The layers get from prefix subflow.
3649  */
3650 static inline uint64_t
3651 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
3652 {
3653         uint64_t layers = 0;
3654
3655         /*
3656          * Layers bits could be localization, but usually the compiler will
3657          * help to do the optimization work for source code.
3658          * If no decap actions, use the layers directly.
3659          */
3660         if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP))
3661                 return dev_flow->handle->layers;
3662         /* Convert L3 layers with decap action. */
3663         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
3664                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3665         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
3666                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3667         /* Convert L4 layers with decap action.  */
3668         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
3669                 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
3670         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
3671                 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
3672         return layers;
3673 }
3674
3675 /**
3676  * Get metadata split action information.
3677  *
3678  * @param[in] actions
3679  *   Pointer to the list of actions.
3680  * @param[out] qrss
3681  *   Pointer to the return pointer.
3682  * @param[out] qrss_type
3683  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
3684  *   if no QUEUE/RSS is found.
3685  * @param[out] encap_idx
3686  *   Pointer to the index of the encap action if exists, otherwise the last
3687  *   action index.
3688  *
3689  * @return
3690  *   Total number of actions.
3691  */
3692 static int
3693 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
3694                                        const struct rte_flow_action **qrss,
3695                                        int *encap_idx)
3696 {
3697         const struct rte_flow_action_raw_encap *raw_encap;
3698         int actions_n = 0;
3699         int raw_decap_idx = -1;
3700
3701         *encap_idx = -1;
3702         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3703                 switch (actions->type) {
3704                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3705                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3706                         *encap_idx = actions_n;
3707                         break;
3708                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3709                         raw_decap_idx = actions_n;
3710                         break;
3711                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3712                         raw_encap = actions->conf;
3713                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3714                                 *encap_idx = raw_decap_idx != -1 ?
3715                                                       raw_decap_idx : actions_n;
3716                         break;
3717                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3718                 case RTE_FLOW_ACTION_TYPE_RSS:
3719                         *qrss = actions;
3720                         break;
3721                 default:
3722                         break;
3723                 }
3724                 actions_n++;
3725         }
3726         if (*encap_idx == -1)
3727                 *encap_idx = actions_n;
3728         /* Count RTE_FLOW_ACTION_TYPE_END. */
3729         return actions_n + 1;
3730 }
3731
3732 /**
3733  * Check if the action will change packet.
3734  *
3735  * @param dev
3736  *   Pointer to Ethernet device.
3737  * @param[in] type
3738  *   action type.
3739  *
3740  * @return
3741  *   true if action will change packet, false otherwise.
3742  */
3743 static bool flow_check_modify_action_type(struct rte_eth_dev *dev,
3744                                           enum rte_flow_action_type type)
3745 {
3746         struct mlx5_priv *priv = dev->data->dev_private;
3747
3748         switch (type) {
3749         case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
3750         case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
3751         case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
3752         case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
3753         case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
3754         case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
3755         case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
3756         case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
3757         case RTE_FLOW_ACTION_TYPE_DEC_TTL:
3758         case RTE_FLOW_ACTION_TYPE_SET_TTL:
3759         case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
3760         case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
3761         case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
3762         case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
3763         case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
3764         case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
3765         case RTE_FLOW_ACTION_TYPE_SET_META:
3766         case RTE_FLOW_ACTION_TYPE_SET_TAG:
3767         case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
3768         case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3769         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3770         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
3771         case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3772         case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
3773         case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3774         case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
3775         case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3776         case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3777         case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
3778                 return true;
3779         case RTE_FLOW_ACTION_TYPE_FLAG:
3780         case RTE_FLOW_ACTION_TYPE_MARK:
3781                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
3782                         return true;
3783                 else
3784                         return false;
3785         default:
3786                 return false;
3787         }
3788 }
3789
3790 /**
3791  * Check meter action from the action list.
3792  *
3793  * @param dev
3794  *   Pointer to Ethernet device.
3795  * @param[in] actions
3796  *   Pointer to the list of actions.
3797  * @param[out] has_mtr
3798  *   Pointer to the meter exist flag.
3799  * @param[out] has_modify
3800  *   Pointer to the flag showing there's packet change action.
3801  * @param[out] meter_id
3802  *   Pointer to the meter id.
3803  *
3804  * @return
3805  *   Total number of actions.
3806  */
3807 static int
3808 flow_check_meter_action(struct rte_eth_dev *dev,
3809                         const struct rte_flow_action actions[],
3810                         bool *has_mtr, bool *has_modify, uint32_t *meter_id)
3811 {
3812         const struct rte_flow_action_meter *mtr = NULL;
3813         int actions_n = 0;
3814
3815         MLX5_ASSERT(has_mtr);
3816         *has_mtr = false;
3817         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3818                 switch (actions->type) {
3819                 case RTE_FLOW_ACTION_TYPE_METER:
3820                         mtr = actions->conf;
3821                         *meter_id = mtr->mtr_id;
3822                         *has_mtr = true;
3823                         break;
3824                 default:
3825                         break;
3826                 }
3827                 if (!*has_mtr)
3828                         *has_modify |= flow_check_modify_action_type(dev,
3829                                                                 actions->type);
3830                 actions_n++;
3831         }
3832         /* Count RTE_FLOW_ACTION_TYPE_END. */
3833         return actions_n + 1;
3834 }
3835
3836 /**
3837  * Check if the flow should be split due to hairpin.
3838  * The reason for the split is that in current HW we can't
3839  * support encap and push-vlan on Rx, so if a flow contains
3840  * these actions we move it to Tx.
3841  *
3842  * @param dev
3843  *   Pointer to Ethernet device.
3844  * @param[in] attr
3845  *   Flow rule attributes.
3846  * @param[in] actions
3847  *   Associated actions (list terminated by the END action).
3848  *
3849  * @return
3850  *   > 0 the number of actions and the flow should be split,
3851  *   0 when no split required.
3852  */
3853 static int
3854 flow_check_hairpin_split(struct rte_eth_dev *dev,
3855                          const struct rte_flow_attr *attr,
3856                          const struct rte_flow_action actions[])
3857 {
3858         int queue_action = 0;
3859         int action_n = 0;
3860         int split = 0;
3861         const struct rte_flow_action_queue *queue;
3862         const struct rte_flow_action_rss *rss;
3863         const struct rte_flow_action_raw_encap *raw_encap;
3864         const struct rte_eth_hairpin_conf *conf;
3865
3866         if (!attr->ingress)
3867                 return 0;
3868         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3869                 switch (actions->type) {
3870                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3871                         queue = actions->conf;
3872                         if (queue == NULL)
3873                                 return 0;
3874                         conf = mlx5_rxq_get_hairpin_conf(dev, queue->index);
3875                         if (conf == NULL || conf->tx_explicit != 0)
3876                                 return 0;
3877                         queue_action = 1;
3878                         action_n++;
3879                         break;
3880                 case RTE_FLOW_ACTION_TYPE_RSS:
3881                         rss = actions->conf;
3882                         if (rss == NULL || rss->queue_num == 0)
3883                                 return 0;
3884                         conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]);
3885                         if (conf == NULL || conf->tx_explicit != 0)
3886                                 return 0;
3887                         queue_action = 1;
3888                         action_n++;
3889                         break;
3890                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3891                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3892                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3893                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3894                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
3895                         split++;
3896                         action_n++;
3897                         break;
3898                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3899                         raw_encap = actions->conf;
3900                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3901                                 split++;
3902                         action_n++;
3903                         break;
3904                 default:
3905                         action_n++;
3906                         break;
3907                 }
3908         }
3909         if (split && queue_action)
3910                 return action_n;
3911         return 0;
3912 }
3913
3914 /* Declare flow create/destroy prototype in advance. */
3915 static uint32_t
3916 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
3917                  const struct rte_flow_attr *attr,
3918                  const struct rte_flow_item items[],
3919                  const struct rte_flow_action actions[],
3920                  bool external, struct rte_flow_error *error);
3921
3922 static void
3923 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
3924                   uint32_t flow_idx);
3925
3926 int
3927 flow_dv_mreg_match_cb(struct mlx5_hlist *list __rte_unused,
3928                       struct mlx5_hlist_entry *entry,
3929                       uint64_t key, void *cb_ctx __rte_unused)
3930 {
3931         struct mlx5_flow_mreg_copy_resource *mcp_res =
3932                 container_of(entry, typeof(*mcp_res), hlist_ent);
3933
3934         return mcp_res->mark_id != key;
3935 }
3936
3937 struct mlx5_hlist_entry *
3938 flow_dv_mreg_create_cb(struct mlx5_hlist *list, uint64_t key,
3939                        void *cb_ctx)
3940 {
3941         struct rte_eth_dev *dev = list->ctx;
3942         struct mlx5_priv *priv = dev->data->dev_private;
3943         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3944         struct mlx5_flow_mreg_copy_resource *mcp_res;
3945         struct rte_flow_error *error = ctx->error;
3946         uint32_t idx = 0;
3947         int ret;
3948         uint32_t mark_id = key;
3949         struct rte_flow_attr attr = {
3950                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
3951                 .ingress = 1,
3952         };
3953         struct mlx5_rte_flow_item_tag tag_spec = {
3954                 .data = mark_id,
3955         };
3956         struct rte_flow_item items[] = {
3957                 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
3958         };
3959         struct rte_flow_action_mark ftag = {
3960                 .id = mark_id,
3961         };
3962         struct mlx5_flow_action_copy_mreg cp_mreg = {
3963                 .dst = REG_B,
3964                 .src = REG_NON,
3965         };
3966         struct rte_flow_action_jump jump = {
3967                 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
3968         };
3969         struct rte_flow_action actions[] = {
3970                 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
3971         };
3972
3973         /* Fill the register fileds in the flow. */
3974         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3975         if (ret < 0)
3976                 return NULL;
3977         tag_spec.id = ret;
3978         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
3979         if (ret < 0)
3980                 return NULL;
3981         cp_mreg.src = ret;
3982         /* Provide the full width of FLAG specific value. */
3983         if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
3984                 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
3985         /* Build a new flow. */
3986         if (mark_id != MLX5_DEFAULT_COPY_ID) {
3987                 items[0] = (struct rte_flow_item){
3988                         .type = (enum rte_flow_item_type)
3989                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
3990                         .spec = &tag_spec,
3991                 };
3992                 items[1] = (struct rte_flow_item){
3993                         .type = RTE_FLOW_ITEM_TYPE_END,
3994                 };
3995                 actions[0] = (struct rte_flow_action){
3996                         .type = (enum rte_flow_action_type)
3997                                 MLX5_RTE_FLOW_ACTION_TYPE_MARK,
3998                         .conf = &ftag,
3999                 };
4000                 actions[1] = (struct rte_flow_action){
4001                         .type = (enum rte_flow_action_type)
4002                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4003                         .conf = &cp_mreg,
4004                 };
4005                 actions[2] = (struct rte_flow_action){
4006                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4007                         .conf = &jump,
4008                 };
4009                 actions[3] = (struct rte_flow_action){
4010                         .type = RTE_FLOW_ACTION_TYPE_END,
4011                 };
4012         } else {
4013                 /* Default rule, wildcard match. */
4014                 attr.priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR;
4015                 items[0] = (struct rte_flow_item){
4016                         .type = RTE_FLOW_ITEM_TYPE_END,
4017                 };
4018                 actions[0] = (struct rte_flow_action){
4019                         .type = (enum rte_flow_action_type)
4020                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4021                         .conf = &cp_mreg,
4022                 };
4023                 actions[1] = (struct rte_flow_action){
4024                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4025                         .conf = &jump,
4026                 };
4027                 actions[2] = (struct rte_flow_action){
4028                         .type = RTE_FLOW_ACTION_TYPE_END,
4029                 };
4030         }
4031         /* Build a new entry. */
4032         mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
4033         if (!mcp_res) {
4034                 rte_errno = ENOMEM;
4035                 return NULL;
4036         }
4037         mcp_res->idx = idx;
4038         mcp_res->mark_id = mark_id;
4039         /*
4040          * The copy Flows are not included in any list. There
4041          * ones are referenced from other Flows and can not
4042          * be applied, removed, deleted in ardbitrary order
4043          * by list traversing.
4044          */
4045         mcp_res->rix_flow = flow_list_create(dev, NULL, &attr, items,
4046                                          actions, false, error);
4047         if (!mcp_res->rix_flow) {
4048                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx);
4049                 return NULL;
4050         }
4051         return &mcp_res->hlist_ent;
4052 }
4053
4054 /**
4055  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4056  *
4057  * As mark_id is unique, if there's already a registered flow for the mark_id,
4058  * return by increasing the reference counter of the resource. Otherwise, create
4059  * the resource (mcp_res) and flow.
4060  *
4061  * Flow looks like,
4062  *   - If ingress port is ANY and reg_c[1] is mark_id,
4063  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4064  *
4065  * For default flow (zero mark_id), flow is like,
4066  *   - If ingress port is ANY,
4067  *     reg_b := reg_c[0] and jump to RX_ACT_TBL.
4068  *
4069  * @param dev
4070  *   Pointer to Ethernet device.
4071  * @param mark_id
4072  *   ID of MARK action, zero means default flow for META.
4073  * @param[out] error
4074  *   Perform verbose error reporting if not NULL.
4075  *
4076  * @return
4077  *   Associated resource on success, NULL otherwise and rte_errno is set.
4078  */
4079 static struct mlx5_flow_mreg_copy_resource *
4080 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
4081                           struct rte_flow_error *error)
4082 {
4083         struct mlx5_priv *priv = dev->data->dev_private;
4084         struct mlx5_hlist_entry *entry;
4085         struct mlx5_flow_cb_ctx ctx = {
4086                 .dev = dev,
4087                 .error = error,
4088         };
4089
4090         /* Check if already registered. */
4091         MLX5_ASSERT(priv->mreg_cp_tbl);
4092         entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx);
4093         if (!entry)
4094                 return NULL;
4095         return container_of(entry, struct mlx5_flow_mreg_copy_resource,
4096                             hlist_ent);
4097 }
4098
4099 void
4100 flow_dv_mreg_remove_cb(struct mlx5_hlist *list, struct mlx5_hlist_entry *entry)
4101 {
4102         struct mlx5_flow_mreg_copy_resource *mcp_res =
4103                 container_of(entry, typeof(*mcp_res), hlist_ent);
4104         struct rte_eth_dev *dev = list->ctx;
4105         struct mlx5_priv *priv = dev->data->dev_private;
4106
4107         MLX5_ASSERT(mcp_res->rix_flow);
4108         flow_list_destroy(dev, NULL, mcp_res->rix_flow);
4109         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4110 }
4111
4112 /**
4113  * Release flow in RX_CP_TBL.
4114  *
4115  * @param dev
4116  *   Pointer to Ethernet device.
4117  * @flow
4118  *   Parent flow for wich copying is provided.
4119  */
4120 static void
4121 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
4122                           struct rte_flow *flow)
4123 {
4124         struct mlx5_flow_mreg_copy_resource *mcp_res;
4125         struct mlx5_priv *priv = dev->data->dev_private;
4126
4127         if (!flow->rix_mreg_copy)
4128                 return;
4129         mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
4130                                  flow->rix_mreg_copy);
4131         if (!mcp_res || !priv->mreg_cp_tbl)
4132                 return;
4133         MLX5_ASSERT(mcp_res->rix_flow);
4134         mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
4135         flow->rix_mreg_copy = 0;
4136 }
4137
4138 /**
4139  * Remove the default copy action from RX_CP_TBL.
4140  *
4141  * This functions is called in the mlx5_dev_start(). No thread safe
4142  * is guaranteed.
4143  *
4144  * @param dev
4145  *   Pointer to Ethernet device.
4146  */
4147 static void
4148 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
4149 {
4150         struct mlx5_hlist_entry *entry;
4151         struct mlx5_priv *priv = dev->data->dev_private;
4152
4153         /* Check if default flow is registered. */
4154         if (!priv->mreg_cp_tbl)
4155                 return;
4156         entry = mlx5_hlist_lookup(priv->mreg_cp_tbl,
4157                                   MLX5_DEFAULT_COPY_ID, NULL);
4158         if (!entry)
4159                 return;
4160         mlx5_hlist_unregister(priv->mreg_cp_tbl, entry);
4161 }
4162
4163 /**
4164  * Add the default copy action in in RX_CP_TBL.
4165  *
4166  * This functions is called in the mlx5_dev_start(). No thread safe
4167  * is guaranteed.
4168  *
4169  * @param dev
4170  *   Pointer to Ethernet device.
4171  * @param[out] error
4172  *   Perform verbose error reporting if not NULL.
4173  *
4174  * @return
4175  *   0 for success, negative value otherwise and rte_errno is set.
4176  */
4177 static int
4178 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
4179                                   struct rte_flow_error *error)
4180 {
4181         struct mlx5_priv *priv = dev->data->dev_private;
4182         struct mlx5_flow_mreg_copy_resource *mcp_res;
4183
4184         /* Check whether extensive metadata feature is engaged. */
4185         if (!priv->config.dv_flow_en ||
4186             priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4187             !mlx5_flow_ext_mreg_supported(dev) ||
4188             !priv->sh->dv_regc0_mask)
4189                 return 0;
4190         /*
4191          * Add default mreg copy flow may be called multiple time, but
4192          * only be called once in stop. Avoid register it twice.
4193          */
4194         if (mlx5_hlist_lookup(priv->mreg_cp_tbl, MLX5_DEFAULT_COPY_ID, NULL))
4195                 return 0;
4196         mcp_res = flow_mreg_add_copy_action(dev, MLX5_DEFAULT_COPY_ID, error);
4197         if (!mcp_res)
4198                 return -rte_errno;
4199         return 0;
4200 }
4201
4202 /**
4203  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4204  *
4205  * All the flow having Q/RSS action should be split by
4206  * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
4207  * performs the following,
4208  *   - CQE->flow_tag := reg_c[1] (MARK)
4209  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4210  * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
4211  * but there should be a flow per each MARK ID set by MARK action.
4212  *
4213  * For the aforementioned reason, if there's a MARK action in flow's action
4214  * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
4215  * the MARK ID to CQE's flow_tag like,
4216  *   - If reg_c[1] is mark_id,
4217  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4218  *
4219  * For SET_META action which stores value in reg_c[0], as the destination is
4220  * also a flow metadata register (reg_b), adding a default flow is enough. Zero
4221  * MARK ID means the default flow. The default flow looks like,
4222  *   - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4223  *
4224  * @param dev
4225  *   Pointer to Ethernet device.
4226  * @param flow
4227  *   Pointer to flow structure.
4228  * @param[in] actions
4229  *   Pointer to the list of actions.
4230  * @param[out] error
4231  *   Perform verbose error reporting if not NULL.
4232  *
4233  * @return
4234  *   0 on success, negative value otherwise and rte_errno is set.
4235  */
4236 static int
4237 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
4238                             struct rte_flow *flow,
4239                             const struct rte_flow_action *actions,
4240                             struct rte_flow_error *error)
4241 {
4242         struct mlx5_priv *priv = dev->data->dev_private;
4243         struct mlx5_dev_config *config = &priv->config;
4244         struct mlx5_flow_mreg_copy_resource *mcp_res;
4245         const struct rte_flow_action_mark *mark;
4246
4247         /* Check whether extensive metadata feature is engaged. */
4248         if (!config->dv_flow_en ||
4249             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4250             !mlx5_flow_ext_mreg_supported(dev) ||
4251             !priv->sh->dv_regc0_mask)
4252                 return 0;
4253         /* Find MARK action. */
4254         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4255                 switch (actions->type) {
4256                 case RTE_FLOW_ACTION_TYPE_FLAG:
4257                         mcp_res = flow_mreg_add_copy_action
4258                                 (dev, MLX5_FLOW_MARK_DEFAULT, error);
4259                         if (!mcp_res)
4260                                 return -rte_errno;
4261                         flow->rix_mreg_copy = mcp_res->idx;
4262                         return 0;
4263                 case RTE_FLOW_ACTION_TYPE_MARK:
4264                         mark = (const struct rte_flow_action_mark *)
4265                                 actions->conf;
4266                         mcp_res =
4267                                 flow_mreg_add_copy_action(dev, mark->id, error);
4268                         if (!mcp_res)
4269                                 return -rte_errno;
4270                         flow->rix_mreg_copy = mcp_res->idx;
4271                         return 0;
4272                 default:
4273                         break;
4274                 }
4275         }
4276         return 0;
4277 }
4278
4279 #define MLX5_MAX_SPLIT_ACTIONS 24
4280 #define MLX5_MAX_SPLIT_ITEMS 24
4281
4282 /**
4283  * Split the hairpin flow.
4284  * Since HW can't support encap and push-vlan on Rx, we move these
4285  * actions to Tx.
4286  * If the count action is after the encap then we also
4287  * move the count action. in this case the count will also measure
4288  * the outer bytes.
4289  *
4290  * @param dev
4291  *   Pointer to Ethernet device.
4292  * @param[in] actions
4293  *   Associated actions (list terminated by the END action).
4294  * @param[out] actions_rx
4295  *   Rx flow actions.
4296  * @param[out] actions_tx
4297  *   Tx flow actions..
4298  * @param[out] pattern_tx
4299  *   The pattern items for the Tx flow.
4300  * @param[out] flow_id
4301  *   The flow ID connected to this flow.
4302  *
4303  * @return
4304  *   0 on success.
4305  */
4306 static int
4307 flow_hairpin_split(struct rte_eth_dev *dev,
4308                    const struct rte_flow_action actions[],
4309                    struct rte_flow_action actions_rx[],
4310                    struct rte_flow_action actions_tx[],
4311                    struct rte_flow_item pattern_tx[],
4312                    uint32_t flow_id)
4313 {
4314         const struct rte_flow_action_raw_encap *raw_encap;
4315         const struct rte_flow_action_raw_decap *raw_decap;
4316         struct mlx5_rte_flow_action_set_tag *set_tag;
4317         struct rte_flow_action *tag_action;
4318         struct mlx5_rte_flow_item_tag *tag_item;
4319         struct rte_flow_item *item;
4320         char *addr;
4321         int encap = 0;
4322
4323         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4324                 switch (actions->type) {
4325                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4326                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4327                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4328                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4329                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4330                         rte_memcpy(actions_tx, actions,
4331                                sizeof(struct rte_flow_action));
4332                         actions_tx++;
4333                         break;
4334                 case RTE_FLOW_ACTION_TYPE_COUNT:
4335                         if (encap) {
4336                                 rte_memcpy(actions_tx, actions,
4337                                            sizeof(struct rte_flow_action));
4338                                 actions_tx++;
4339                         } else {
4340                                 rte_memcpy(actions_rx, actions,
4341                                            sizeof(struct rte_flow_action));
4342                                 actions_rx++;
4343                         }
4344                         break;
4345                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4346                         raw_encap = actions->conf;
4347                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
4348                                 memcpy(actions_tx, actions,
4349                                        sizeof(struct rte_flow_action));
4350                                 actions_tx++;
4351                                 encap = 1;
4352                         } else {
4353                                 rte_memcpy(actions_rx, actions,
4354                                            sizeof(struct rte_flow_action));
4355                                 actions_rx++;
4356                         }
4357                         break;
4358                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4359                         raw_decap = actions->conf;
4360                         if (raw_decap->size < MLX5_ENCAPSULATION_DECISION_SIZE) {
4361                                 memcpy(actions_tx, actions,
4362                                        sizeof(struct rte_flow_action));
4363                                 actions_tx++;
4364                         } else {
4365                                 rte_memcpy(actions_rx, actions,
4366                                            sizeof(struct rte_flow_action));
4367                                 actions_rx++;
4368                         }
4369                         break;
4370                 default:
4371                         rte_memcpy(actions_rx, actions,
4372                                    sizeof(struct rte_flow_action));
4373                         actions_rx++;
4374                         break;
4375                 }
4376         }
4377         /* Add set meta action and end action for the Rx flow. */
4378         tag_action = actions_rx;
4379         tag_action->type = (enum rte_flow_action_type)
4380                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4381         actions_rx++;
4382         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
4383         actions_rx++;
4384         set_tag = (void *)actions_rx;
4385         *set_tag = (struct mlx5_rte_flow_action_set_tag) {
4386                 .id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL),
4387                 .data = flow_id,
4388         };
4389         MLX5_ASSERT(set_tag->id > REG_NON);
4390         tag_action->conf = set_tag;
4391         /* Create Tx item list. */
4392         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
4393         addr = (void *)&pattern_tx[2];
4394         item = pattern_tx;
4395         item->type = (enum rte_flow_item_type)
4396                      MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4397         tag_item = (void *)addr;
4398         tag_item->data = flow_id;
4399         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
4400         MLX5_ASSERT(set_tag->id > REG_NON);
4401         item->spec = tag_item;
4402         addr += sizeof(struct mlx5_rte_flow_item_tag);
4403         tag_item = (void *)addr;
4404         tag_item->data = UINT32_MAX;
4405         tag_item->id = UINT16_MAX;
4406         item->mask = tag_item;
4407         item->last = NULL;
4408         item++;
4409         item->type = RTE_FLOW_ITEM_TYPE_END;
4410         return 0;
4411 }
4412
4413 /**
4414  * The last stage of splitting chain, just creates the subflow
4415  * without any modification.
4416  *
4417  * @param[in] dev
4418  *   Pointer to Ethernet device.
4419  * @param[in] flow
4420  *   Parent flow structure pointer.
4421  * @param[in, out] sub_flow
4422  *   Pointer to return the created subflow, may be NULL.
4423  * @param[in] attr
4424  *   Flow rule attributes.
4425  * @param[in] items
4426  *   Pattern specification (list terminated by the END pattern item).
4427  * @param[in] actions
4428  *   Associated actions (list terminated by the END action).
4429  * @param[in] flow_split_info
4430  *   Pointer to flow split info structure.
4431  * @param[out] error
4432  *   Perform verbose error reporting if not NULL.
4433  * @return
4434  *   0 on success, negative value otherwise
4435  */
4436 static int
4437 flow_create_split_inner(struct rte_eth_dev *dev,
4438                         struct rte_flow *flow,
4439                         struct mlx5_flow **sub_flow,
4440                         const struct rte_flow_attr *attr,
4441                         const struct rte_flow_item items[],
4442                         const struct rte_flow_action actions[],
4443                         struct mlx5_flow_split_info *flow_split_info,
4444                         struct rte_flow_error *error)
4445 {
4446         struct mlx5_flow *dev_flow;
4447
4448         dev_flow = flow_drv_prepare(dev, flow, attr, items, actions,
4449                                     flow_split_info->flow_idx, error);
4450         if (!dev_flow)
4451                 return -rte_errno;
4452         dev_flow->flow = flow;
4453         dev_flow->external = flow_split_info->external;
4454         dev_flow->skip_scale = flow_split_info->skip_scale;
4455         /* Subflow object was created, we must include one in the list. */
4456         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4457                       dev_flow->handle, next);
4458         /*
4459          * If dev_flow is as one of the suffix flow, some actions in suffix
4460          * flow may need some user defined item layer flags, and pass the
4461          * Metadate rxq mark flag to suffix flow as well.
4462          */
4463         if (flow_split_info->prefix_layers)
4464                 dev_flow->handle->layers = flow_split_info->prefix_layers;
4465         if (flow_split_info->prefix_mark)
4466                 dev_flow->handle->mark = 1;
4467         if (sub_flow)
4468                 *sub_flow = dev_flow;
4469 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
4470         dev_flow->dv.table_id = flow_split_info->table_id;
4471 #endif
4472         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
4473 }
4474
4475 /**
4476  * Get the sub policy of a meter.
4477  *
4478  * @param[in] dev
4479  *   Pointer to Ethernet device.
4480  * @param[in] flow
4481  *   Parent flow structure pointer.
4482  * @param[in] policy_id;
4483  *   Meter Policy id.
4484  * @param[in] attr
4485  *   Flow rule attributes.
4486  * @param[in] items
4487  *   Pattern specification (list terminated by the END pattern item).
4488  * @param[out] error
4489  *   Perform verbose error reporting if not NULL.
4490  *
4491  * @return
4492  *   Pointer to the meter sub policy, NULL otherwise and rte_errno is set.
4493  */
4494 static struct mlx5_flow_meter_sub_policy *
4495 get_meter_sub_policy(struct rte_eth_dev *dev,
4496                      struct rte_flow *flow,
4497                      uint32_t policy_id,
4498                      const struct rte_flow_attr *attr,
4499                      const struct rte_flow_item items[],
4500                      struct rte_flow_error *error)
4501 {
4502         struct mlx5_flow_meter_policy *policy;
4503         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
4504
4505         policy = mlx5_flow_meter_policy_find(dev, policy_id, NULL);
4506         if (!policy) {
4507                 rte_flow_error_set(error, EINVAL,
4508                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4509                                    "Failed to find Meter Policy.");
4510                 goto exit;
4511         }
4512         if (policy->is_rss) {
4513                 struct mlx5_flow_workspace *wks =
4514                                 mlx5_flow_get_thread_workspace();
4515                 struct mlx5_flow_rss_desc rss_desc_v[MLX5_MTR_RTE_COLORS];
4516                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS] = {0};
4517                 uint32_t i;
4518
4519                 MLX5_ASSERT(wks);
4520                 /**
4521                  * This is a tmp dev_flow,
4522                  * no need to register any matcher for it in translate.
4523                  */
4524                 wks->skip_matcher_reg = 1;
4525                 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
4526                         struct mlx5_flow dev_flow = {0};
4527                         struct mlx5_flow_handle dev_handle = { {0} };
4528                         const void *rss_act = policy->act_cnt[i].rss->conf;
4529                         struct rte_flow_action rss_actions[2] = {
4530                                 [0] = {
4531                                         .type = RTE_FLOW_ACTION_TYPE_RSS,
4532                                         .conf = rss_act
4533                                 },
4534                                 [1] = {
4535                                         .type = RTE_FLOW_ACTION_TYPE_END,
4536                                         .conf = NULL
4537                                 }
4538                         };
4539
4540                         dev_flow.handle = &dev_handle;
4541                         dev_flow.ingress = attr->ingress;
4542                         dev_flow.flow = flow;
4543                         dev_flow.external = 0;
4544 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
4545                         dev_flow.dv.transfer = attr->transfer;
4546 #endif
4547                         /* Translate RSS action to get rss hash fields. */
4548                         if (flow_drv_translate(dev, &dev_flow, attr,
4549                                                 items, rss_actions, error))
4550                                 goto exit;
4551                         rss_desc_v[i] = wks->rss_desc;
4552                         rss_desc_v[i].key_len = MLX5_RSS_HASH_KEY_LEN;
4553                         rss_desc_v[i].hash_fields = dev_flow.hash_fields;
4554                         rss_desc_v[i].queue_num = rss_desc_v[i].hash_fields ?
4555                                                   rss_desc_v[i].queue_num : 1;
4556                         rss_desc[i] = &rss_desc_v[i];
4557                 }
4558                 sub_policy = flow_drv_meter_sub_policy_rss_prepare(dev,
4559                                                 flow, policy, rss_desc);
4560         } else {
4561                 enum mlx5_meter_domain mtr_domain =
4562                         attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
4563                                 attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
4564                                         MLX5_MTR_DOMAIN_INGRESS;
4565                 sub_policy = policy->sub_policys[mtr_domain][0];
4566         }
4567         if (!sub_policy) {
4568                 rte_flow_error_set(error, EINVAL,
4569                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4570                         "Failed to get meter sub-policy.");
4571                 goto exit;
4572         }
4573 exit:
4574         return sub_policy;
4575 }
4576
4577 /**
4578  * Split the meter flow.
4579  *
4580  * As meter flow will split to three sub flow, other than meter
4581  * action, the other actions make sense to only meter accepts
4582  * the packet. If it need to be dropped, no other additional
4583  * actions should be take.
4584  *
4585  * One kind of special action which decapsulates the L3 tunnel
4586  * header will be in the prefix sub flow, as not to take the
4587  * L3 tunnel header into account.
4588  *
4589  * @param[in] dev
4590  *   Pointer to Ethernet device.
4591  * @param[in] flow
4592  *   Parent flow structure pointer.
4593  * @param[in] fm
4594  *   Pointer to flow meter structure.
4595  * @param[in] attr
4596  *   Flow rule attributes.
4597  * @param[in] items
4598  *   Pattern specification (list terminated by the END pattern item).
4599  * @param[out] sfx_items
4600  *   Suffix flow match items (list terminated by the END pattern item).
4601  * @param[in] actions
4602  *   Associated actions (list terminated by the END action).
4603  * @param[out] actions_sfx
4604  *   Suffix flow actions.
4605  * @param[out] actions_pre
4606  *   Prefix flow actions.
4607  * @param[out] mtr_flow_id
4608  *   Pointer to meter flow id.
4609  * @param[out] error
4610  *   Perform verbose error reporting if not NULL.
4611  *
4612  * @return
4613  *   0 on success, a negative errno value otherwise and rte_errno is set.
4614  */
4615 static int
4616 flow_meter_split_prep(struct rte_eth_dev *dev,
4617                       struct rte_flow *flow,
4618                       struct mlx5_flow_meter_info *fm,
4619                       const struct rte_flow_attr *attr,
4620                       const struct rte_flow_item items[],
4621                       struct rte_flow_item sfx_items[],
4622                       const struct rte_flow_action actions[],
4623                       struct rte_flow_action actions_sfx[],
4624                       struct rte_flow_action actions_pre[],
4625                       uint32_t *mtr_flow_id,
4626                       struct rte_flow_error *error)
4627 {
4628         struct mlx5_priv *priv = dev->data->dev_private;
4629         struct rte_flow_action *tag_action = NULL;
4630         struct rte_flow_item *tag_item;
4631         struct mlx5_rte_flow_action_set_tag *set_tag;
4632         const struct rte_flow_action_raw_encap *raw_encap;
4633         const struct rte_flow_action_raw_decap *raw_decap;
4634         struct mlx5_rte_flow_item_tag *tag_item_spec;
4635         struct mlx5_rte_flow_item_tag *tag_item_mask;
4636         uint32_t tag_id = 0;
4637         bool copy_vlan = false;
4638         struct rte_flow_action *hw_mtr_action;
4639         struct rte_flow_action *action_pre_head = NULL;
4640         bool mtr_first = priv->sh->meter_aso_en &&
4641                         (attr->egress ||
4642                         (attr->transfer && priv->representor_id != UINT16_MAX));
4643         uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
4644         uint8_t mtr_reg_bits = priv->mtr_reg_share ?
4645                                 MLX5_MTR_IDLE_BITS_IN_COLOR_REG : MLX5_REG_BITS;
4646         uint32_t flow_id = 0;
4647         uint32_t flow_id_reversed = 0;
4648         uint8_t flow_id_bits = 0;
4649         int shift;
4650
4651         /* For ASO meter, meter must be before tag in TX direction. */
4652         if (mtr_first) {
4653                 action_pre_head = actions_pre++;
4654                 /* Leave space for tag action. */
4655                 tag_action = actions_pre++;
4656         }
4657         /* Prepare the actions for prefix and suffix flow. */
4658         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4659                 struct rte_flow_action *action_cur = NULL;
4660
4661                 switch (actions->type) {
4662                 case RTE_FLOW_ACTION_TYPE_METER:
4663                         if (mtr_first) {
4664                                 action_cur = action_pre_head;
4665                         } else {
4666                                 /* Leave space for tag action. */
4667                                 tag_action = actions_pre++;
4668                                 action_cur = actions_pre++;
4669                         }
4670                         break;
4671                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4672                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4673                         action_cur = actions_pre++;
4674                         break;
4675                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4676                         raw_encap = actions->conf;
4677                         if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
4678                                 action_cur = actions_pre++;
4679                         break;
4680                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4681                         raw_decap = actions->conf;
4682                         if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4683                                 action_cur = actions_pre++;
4684                         break;
4685                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4686                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4687                         copy_vlan = true;
4688                         break;
4689                 default:
4690                         break;
4691                 }
4692                 if (!action_cur)
4693                         action_cur = (fm->def_policy) ?
4694                                         actions_sfx++ : actions_pre++;
4695                 memcpy(action_cur, actions, sizeof(struct rte_flow_action));
4696         }
4697         /* Add end action to the actions. */
4698         actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
4699         if (priv->sh->meter_aso_en) {
4700                 /**
4701                  * For ASO meter, need to add an extra jump action explicitly,
4702                  * to jump from meter to policer table.
4703                  */
4704                 struct mlx5_flow_meter_sub_policy *sub_policy;
4705                 struct mlx5_flow_tbl_data_entry *tbl_data;
4706
4707                 if (!fm->def_policy) {
4708                         sub_policy = get_meter_sub_policy(dev, flow,
4709                                                           fm->policy_id, attr,
4710                                                           items, error);
4711                         if (!sub_policy)
4712                                 return -rte_errno;
4713                 } else {
4714                         enum mlx5_meter_domain mtr_domain =
4715                         attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
4716                                 attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
4717                                         MLX5_MTR_DOMAIN_INGRESS;
4718
4719                         sub_policy =
4720                         &priv->sh->mtrmng->def_policy[mtr_domain]->sub_policy;
4721                 }
4722                 tbl_data = container_of(sub_policy->tbl_rsc,
4723                                         struct mlx5_flow_tbl_data_entry, tbl);
4724                 hw_mtr_action = actions_pre++;
4725                 hw_mtr_action->type = (enum rte_flow_action_type)
4726                                       MLX5_RTE_FLOW_ACTION_TYPE_JUMP;
4727                 hw_mtr_action->conf = tbl_data->jump.action;
4728         }
4729         actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
4730         actions_pre++;
4731         if (!tag_action)
4732                 return rte_flow_error_set(error, ENOMEM,
4733                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4734                                         "No tag action space.");
4735         if (!mtr_flow_id) {
4736                 tag_action->type = RTE_FLOW_ACTION_TYPE_VOID;
4737                 goto exit;
4738         }
4739         /* Only default-policy Meter creates mtr flow id. */
4740         if (fm->def_policy) {
4741                 mlx5_ipool_malloc(fm->flow_ipool, &tag_id);
4742                 if (!tag_id)
4743                         return rte_flow_error_set(error, ENOMEM,
4744                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4745                                         "Failed to allocate meter flow id.");
4746                 flow_id = tag_id - 1;
4747                 flow_id_bits = MLX5_REG_BITS - __builtin_clz(flow_id);
4748                 flow_id_bits = flow_id_bits ? flow_id_bits : 1;
4749                 if ((flow_id_bits + priv->sh->mtrmng->max_mtr_bits) >
4750                     mtr_reg_bits) {
4751                         mlx5_ipool_free(fm->flow_ipool, tag_id);
4752                         return rte_flow_error_set(error, EINVAL,
4753                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4754                                         "Meter flow id exceeds max limit.");
4755                 }
4756                 if (flow_id_bits > priv->sh->mtrmng->max_mtr_flow_bits)
4757                         priv->sh->mtrmng->max_mtr_flow_bits = flow_id_bits;
4758         }
4759         /* Prepare the suffix subflow items. */
4760         tag_item = sfx_items++;
4761         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4762                 int item_type = items->type;
4763
4764                 switch (item_type) {
4765                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4766                         memcpy(sfx_items, items, sizeof(*sfx_items));
4767                         sfx_items++;
4768                         break;
4769                 case RTE_FLOW_ITEM_TYPE_VLAN:
4770                         if (copy_vlan) {
4771                                 memcpy(sfx_items, items, sizeof(*sfx_items));
4772                                 /*
4773                                  * Convert to internal match item, it is used
4774                                  * for vlan push and set vid.
4775                                  */
4776                                 sfx_items->type = (enum rte_flow_item_type)
4777                                                   MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
4778                                 sfx_items++;
4779                         }
4780                         break;
4781                 default:
4782                         break;
4783                 }
4784         }
4785         sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
4786         sfx_items++;
4787         /* Build tag actions and items for meter_id/meter flow_id. */
4788         set_tag = (struct mlx5_rte_flow_action_set_tag *)actions_pre;
4789         tag_item_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
4790         tag_item_mask = tag_item_spec + 1;
4791         /* Both flow_id and meter_id share the same register. */
4792         *set_tag = (struct mlx5_rte_flow_action_set_tag) {
4793                 .id = (enum modify_reg)mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
4794                                                             0, error),
4795                 .offset = mtr_id_offset,
4796                 .length = mtr_reg_bits,
4797                 .data = flow->meter,
4798         };
4799         /*
4800          * The color Reg bits used by flow_id are growing from
4801          * msb to lsb, so must do bit reverse for flow_id val in RegC.
4802          */
4803         for (shift = 0; shift < flow_id_bits; shift++)
4804                 flow_id_reversed = (flow_id_reversed << 1) |
4805                                 ((flow_id >> shift) & 0x1);
4806         set_tag->data |=
4807                 flow_id_reversed << (mtr_reg_bits - flow_id_bits);
4808         tag_item_spec->id = set_tag->id;
4809         tag_item_spec->data = set_tag->data << mtr_id_offset;
4810         tag_item_mask->data = UINT32_MAX << mtr_id_offset;
4811         tag_action->type = (enum rte_flow_action_type)
4812                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4813         tag_action->conf = set_tag;
4814         tag_item->type = (enum rte_flow_item_type)
4815                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4816         tag_item->spec = tag_item_spec;
4817         tag_item->last = NULL;
4818         tag_item->mask = tag_item_mask;
4819 exit:
4820         if (mtr_flow_id)
4821                 *mtr_flow_id = tag_id;
4822         return 0;
4823 }
4824
4825 /**
4826  * Split action list having QUEUE/RSS for metadata register copy.
4827  *
4828  * Once Q/RSS action is detected in user's action list, the flow action
4829  * should be split in order to copy metadata registers, which will happen in
4830  * RX_CP_TBL like,
4831  *   - CQE->flow_tag := reg_c[1] (MARK)
4832  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4833  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
4834  * This is because the last action of each flow must be a terminal action
4835  * (QUEUE, RSS or DROP).
4836  *
4837  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
4838  * stored and kept in the mlx5_flow structure per each sub_flow.
4839  *
4840  * The Q/RSS action is replaced with,
4841  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
4842  * And the following JUMP action is added at the end,
4843  *   - JUMP, to RX_CP_TBL.
4844  *
4845  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
4846  * flow_create_split_metadata() routine. The flow will look like,
4847  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
4848  *
4849  * @param dev
4850  *   Pointer to Ethernet device.
4851  * @param[out] split_actions
4852  *   Pointer to store split actions to jump to CP_TBL.
4853  * @param[in] actions
4854  *   Pointer to the list of original flow actions.
4855  * @param[in] qrss
4856  *   Pointer to the Q/RSS action.
4857  * @param[in] actions_n
4858  *   Number of original actions.
4859  * @param[out] error
4860  *   Perform verbose error reporting if not NULL.
4861  *
4862  * @return
4863  *   non-zero unique flow_id on success, otherwise 0 and
4864  *   error/rte_error are set.
4865  */
4866 static uint32_t
4867 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
4868                           struct rte_flow_action *split_actions,
4869                           const struct rte_flow_action *actions,
4870                           const struct rte_flow_action *qrss,
4871                           int actions_n, struct rte_flow_error *error)
4872 {
4873         struct mlx5_priv *priv = dev->data->dev_private;
4874         struct mlx5_rte_flow_action_set_tag *set_tag;
4875         struct rte_flow_action_jump *jump;
4876         const int qrss_idx = qrss - actions;
4877         uint32_t flow_id = 0;
4878         int ret = 0;
4879
4880         /*
4881          * Given actions will be split
4882          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
4883          * - Add jump to mreg CP_TBL.
4884          * As a result, there will be one more action.
4885          */
4886         ++actions_n;
4887         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
4888         set_tag = (void *)(split_actions + actions_n);
4889         /*
4890          * If tag action is not set to void(it means we are not the meter
4891          * suffix flow), add the tag action. Since meter suffix flow already
4892          * has the tag added.
4893          */
4894         if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) {
4895                 /*
4896                  * Allocate the new subflow ID. This one is unique within
4897                  * device and not shared with representors. Otherwise,
4898                  * we would have to resolve multi-thread access synch
4899                  * issue. Each flow on the shared device is appended
4900                  * with source vport identifier, so the resulting
4901                  * flows will be unique in the shared (by master and
4902                  * representors) domain even if they have coinciding
4903                  * IDs.
4904                  */
4905                 mlx5_ipool_malloc(priv->sh->ipool
4906                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id);
4907                 if (!flow_id)
4908                         return rte_flow_error_set(error, ENOMEM,
4909                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4910                                                   NULL, "can't allocate id "
4911                                                   "for split Q/RSS subflow");
4912                 /* Internal SET_TAG action to set flow ID. */
4913                 *set_tag = (struct mlx5_rte_flow_action_set_tag){
4914                         .data = flow_id,
4915                 };
4916                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
4917                 if (ret < 0)
4918                         return ret;
4919                 set_tag->id = ret;
4920                 /* Construct new actions array. */
4921                 /* Replace QUEUE/RSS action. */
4922                 split_actions[qrss_idx] = (struct rte_flow_action){
4923                         .type = (enum rte_flow_action_type)
4924                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
4925                         .conf = set_tag,
4926                 };
4927         }
4928         /* JUMP action to jump to mreg copy table (CP_TBL). */
4929         jump = (void *)(set_tag + 1);
4930         *jump = (struct rte_flow_action_jump){
4931                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
4932         };
4933         split_actions[actions_n - 2] = (struct rte_flow_action){
4934                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
4935                 .conf = jump,
4936         };
4937         split_actions[actions_n - 1] = (struct rte_flow_action){
4938                 .type = RTE_FLOW_ACTION_TYPE_END,
4939         };
4940         return flow_id;
4941 }
4942
4943 /**
4944  * Extend the given action list for Tx metadata copy.
4945  *
4946  * Copy the given action list to the ext_actions and add flow metadata register
4947  * copy action in order to copy reg_a set by WQE to reg_c[0].
4948  *
4949  * @param[out] ext_actions
4950  *   Pointer to the extended action list.
4951  * @param[in] actions
4952  *   Pointer to the list of actions.
4953  * @param[in] actions_n
4954  *   Number of actions in the list.
4955  * @param[out] error
4956  *   Perform verbose error reporting if not NULL.
4957  * @param[in] encap_idx
4958  *   The encap action inndex.
4959  *
4960  * @return
4961  *   0 on success, negative value otherwise
4962  */
4963 static int
4964 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
4965                        struct rte_flow_action *ext_actions,
4966                        const struct rte_flow_action *actions,
4967                        int actions_n, struct rte_flow_error *error,
4968                        int encap_idx)
4969 {
4970         struct mlx5_flow_action_copy_mreg *cp_mreg =
4971                 (struct mlx5_flow_action_copy_mreg *)
4972                         (ext_actions + actions_n + 1);
4973         int ret;
4974
4975         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
4976         if (ret < 0)
4977                 return ret;
4978         cp_mreg->dst = ret;
4979         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
4980         if (ret < 0)
4981                 return ret;
4982         cp_mreg->src = ret;
4983         if (encap_idx != 0)
4984                 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
4985         if (encap_idx == actions_n - 1) {
4986                 ext_actions[actions_n - 1] = (struct rte_flow_action){
4987                         .type = (enum rte_flow_action_type)
4988                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4989                         .conf = cp_mreg,
4990                 };
4991                 ext_actions[actions_n] = (struct rte_flow_action){
4992                         .type = RTE_FLOW_ACTION_TYPE_END,
4993                 };
4994         } else {
4995                 ext_actions[encap_idx] = (struct rte_flow_action){
4996                         .type = (enum rte_flow_action_type)
4997                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4998                         .conf = cp_mreg,
4999                 };
5000                 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
5001                                 sizeof(*ext_actions) * (actions_n - encap_idx));
5002         }
5003         return 0;
5004 }
5005
5006 /**
5007  * Check the match action from the action list.
5008  *
5009  * @param[in] actions
5010  *   Pointer to the list of actions.
5011  * @param[in] attr
5012  *   Flow rule attributes.
5013  * @param[in] action
5014  *   The action to be check if exist.
5015  * @param[out] match_action_pos
5016  *   Pointer to the position of the matched action if exists, otherwise is -1.
5017  * @param[out] qrss_action_pos
5018  *   Pointer to the position of the Queue/RSS action if exists, otherwise is -1.
5019  * @param[out] modify_after_mirror
5020  *   Pointer to the flag of modify action after FDB mirroring.
5021  *
5022  * @return
5023  *   > 0 the total number of actions.
5024  *   0 if not found match action in action list.
5025  */
5026 static int
5027 flow_check_match_action(const struct rte_flow_action actions[],
5028                         const struct rte_flow_attr *attr,
5029                         enum rte_flow_action_type action,
5030                         int *match_action_pos, int *qrss_action_pos,
5031                         int *modify_after_mirror)
5032 {
5033         const struct rte_flow_action_sample *sample;
5034         int actions_n = 0;
5035         uint32_t ratio = 0;
5036         int sub_type = 0;
5037         int flag = 0;
5038         int fdb_mirror = 0;
5039
5040         *match_action_pos = -1;
5041         *qrss_action_pos = -1;
5042         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5043                 if (actions->type == action) {
5044                         flag = 1;
5045                         *match_action_pos = actions_n;
5046                 }
5047                 switch (actions->type) {
5048                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5049                 case RTE_FLOW_ACTION_TYPE_RSS:
5050                         *qrss_action_pos = actions_n;
5051                         break;
5052                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
5053                         sample = actions->conf;
5054                         ratio = sample->ratio;
5055                         sub_type = ((const struct rte_flow_action *)
5056                                         (sample->actions))->type;
5057                         if (ratio == 1 && attr->transfer)
5058                                 fdb_mirror = 1;
5059                         break;
5060                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
5061                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
5062                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
5063                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
5064                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
5065                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
5066                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
5067                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
5068                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
5069                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
5070                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5071                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5072                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5073                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5074                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5075                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5076                 case RTE_FLOW_ACTION_TYPE_FLAG:
5077                 case RTE_FLOW_ACTION_TYPE_MARK:
5078                 case RTE_FLOW_ACTION_TYPE_SET_META:
5079                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
5080                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
5081                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5082                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5083                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
5084                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5085                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5086                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5087                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
5088                         if (fdb_mirror)
5089                                 *modify_after_mirror = 1;
5090                         break;
5091                 default:
5092                         break;
5093                 }
5094                 actions_n++;
5095         }
5096         if (flag && fdb_mirror && !*modify_after_mirror) {
5097                 /* FDB mirroring uses the destination array to implement
5098                  * instead of FLOW_SAMPLER object.
5099                  */
5100                 if (sub_type != RTE_FLOW_ACTION_TYPE_END)
5101                         flag = 0;
5102         }
5103         /* Count RTE_FLOW_ACTION_TYPE_END. */
5104         return flag ? actions_n + 1 : 0;
5105 }
5106
5107 #define SAMPLE_SUFFIX_ITEM 2
5108
5109 /**
5110  * Split the sample flow.
5111  *
5112  * As sample flow will split to two sub flow, sample flow with
5113  * sample action, the other actions will move to new suffix flow.
5114  *
5115  * Also add unique tag id with tag action in the sample flow,
5116  * the same tag id will be as match in the suffix flow.
5117  *
5118  * @param dev
5119  *   Pointer to Ethernet device.
5120  * @param[in] add_tag
5121  *   Add extra tag action flag.
5122  * @param[out] sfx_items
5123  *   Suffix flow match items (list terminated by the END pattern item).
5124  * @param[in] actions
5125  *   Associated actions (list terminated by the END action).
5126  * @param[out] actions_sfx
5127  *   Suffix flow actions.
5128  * @param[out] actions_pre
5129  *   Prefix flow actions.
5130  * @param[in] actions_n
5131  *  The total number of actions.
5132  * @param[in] sample_action_pos
5133  *   The sample action position.
5134  * @param[in] qrss_action_pos
5135  *   The Queue/RSS action position.
5136  * @param[in] jump_table
5137  *   Add extra jump action flag.
5138  * @param[out] error
5139  *   Perform verbose error reporting if not NULL.
5140  *
5141  * @return
5142  *   0 on success, or unique flow_id, a negative errno value
5143  *   otherwise and rte_errno is set.
5144  */
5145 static int
5146 flow_sample_split_prep(struct rte_eth_dev *dev,
5147                        int add_tag,
5148                        struct rte_flow_item sfx_items[],
5149                        const struct rte_flow_action actions[],
5150                        struct rte_flow_action actions_sfx[],
5151                        struct rte_flow_action actions_pre[],
5152                        int actions_n,
5153                        int sample_action_pos,
5154                        int qrss_action_pos,
5155                        int jump_table,
5156                        struct rte_flow_error *error)
5157 {
5158         struct mlx5_priv *priv = dev->data->dev_private;
5159         struct mlx5_rte_flow_action_set_tag *set_tag;
5160         struct mlx5_rte_flow_item_tag *tag_spec;
5161         struct mlx5_rte_flow_item_tag *tag_mask;
5162         struct rte_flow_action_jump *jump_action;
5163         uint32_t tag_id = 0;
5164         int index;
5165         int append_index = 0;
5166         int ret;
5167
5168         if (sample_action_pos < 0)
5169                 return rte_flow_error_set(error, EINVAL,
5170                                           RTE_FLOW_ERROR_TYPE_ACTION,
5171                                           NULL, "invalid position of sample "
5172                                           "action in list");
5173         /* Prepare the actions for prefix and suffix flow. */
5174         if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) {
5175                 index = qrss_action_pos;
5176                 /* Put the preceding the Queue/RSS action into prefix flow. */
5177                 if (index != 0)
5178                         memcpy(actions_pre, actions,
5179                                sizeof(struct rte_flow_action) * index);
5180                 /* Put others preceding the sample action into prefix flow. */
5181                 if (sample_action_pos > index + 1)
5182                         memcpy(actions_pre + index, actions + index + 1,
5183                                sizeof(struct rte_flow_action) *
5184                                (sample_action_pos - index - 1));
5185                 index = sample_action_pos - 1;
5186                 /* Put Queue/RSS action into Suffix flow. */
5187                 memcpy(actions_sfx, actions + qrss_action_pos,
5188                        sizeof(struct rte_flow_action));
5189                 actions_sfx++;
5190         } else {
5191                 index = sample_action_pos;
5192                 if (index != 0)
5193                         memcpy(actions_pre, actions,
5194                                sizeof(struct rte_flow_action) * index);
5195         }
5196         /* For CX5, add an extra tag action for NIC-RX and E-Switch ingress.
5197          * For CX6DX and above, metadata registers Cx preserve their value,
5198          * add an extra tag action for NIC-RX and E-Switch Domain.
5199          */
5200         if (add_tag) {
5201                 /* Prepare the prefix tag action. */
5202                 append_index++;
5203                 set_tag = (void *)(actions_pre + actions_n + append_index);
5204                 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error);
5205                 if (ret < 0)
5206                         return ret;
5207                 mlx5_ipool_malloc(priv->sh->ipool
5208                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id);
5209                 *set_tag = (struct mlx5_rte_flow_action_set_tag) {
5210                         .id = ret,
5211                         .data = tag_id,
5212                 };
5213                 /* Prepare the suffix subflow items. */
5214                 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM);
5215                 tag_spec->data = tag_id;
5216                 tag_spec->id = set_tag->id;
5217                 tag_mask = tag_spec + 1;
5218                 tag_mask->data = UINT32_MAX;
5219                 sfx_items[0] = (struct rte_flow_item){
5220                         .type = (enum rte_flow_item_type)
5221                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5222                         .spec = tag_spec,
5223                         .last = NULL,
5224                         .mask = tag_mask,
5225                 };
5226                 sfx_items[1] = (struct rte_flow_item){
5227                         .type = (enum rte_flow_item_type)
5228                                 RTE_FLOW_ITEM_TYPE_END,
5229                 };
5230                 /* Prepare the tag action in prefix subflow. */
5231                 actions_pre[index++] =
5232                         (struct rte_flow_action){
5233                         .type = (enum rte_flow_action_type)
5234                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5235                         .conf = set_tag,
5236                 };
5237         }
5238         memcpy(actions_pre + index, actions + sample_action_pos,
5239                sizeof(struct rte_flow_action));
5240         index += 1;
5241         /* For the modify action after the sample action in E-Switch mirroring,
5242          * Add the extra jump action in prefix subflow and jump into the next
5243          * table, then do the modify action in the new table.
5244          */
5245         if (jump_table) {
5246                 /* Prepare the prefix jump action. */
5247                 append_index++;
5248                 jump_action = (void *)(actions_pre + actions_n + append_index);
5249                 jump_action->group = jump_table;
5250                 actions_pre[index++] =
5251                         (struct rte_flow_action){
5252                         .type = (enum rte_flow_action_type)
5253                                 RTE_FLOW_ACTION_TYPE_JUMP,
5254                         .conf = jump_action,
5255                 };
5256         }
5257         actions_pre[index] = (struct rte_flow_action){
5258                 .type = (enum rte_flow_action_type)
5259                         RTE_FLOW_ACTION_TYPE_END,
5260         };
5261         /* Put the actions after sample into Suffix flow. */
5262         memcpy(actions_sfx, actions + sample_action_pos + 1,
5263                sizeof(struct rte_flow_action) *
5264                (actions_n - sample_action_pos - 1));
5265         return tag_id;
5266 }
5267
5268 /**
5269  * The splitting for metadata feature.
5270  *
5271  * - Q/RSS action on NIC Rx should be split in order to pass by
5272  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
5273  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
5274  *
5275  * - All the actions on NIC Tx should have a mreg copy action to
5276  *   copy reg_a from WQE to reg_c[0].
5277  *
5278  * @param dev
5279  *   Pointer to Ethernet device.
5280  * @param[in] flow
5281  *   Parent flow structure pointer.
5282  * @param[in] attr
5283  *   Flow rule attributes.
5284  * @param[in] items
5285  *   Pattern specification (list terminated by the END pattern item).
5286  * @param[in] actions
5287  *   Associated actions (list terminated by the END action).
5288  * @param[in] flow_split_info
5289  *   Pointer to flow split info structure.
5290  * @param[out] error
5291  *   Perform verbose error reporting if not NULL.
5292  * @return
5293  *   0 on success, negative value otherwise
5294  */
5295 static int
5296 flow_create_split_metadata(struct rte_eth_dev *dev,
5297                            struct rte_flow *flow,
5298                            const struct rte_flow_attr *attr,
5299                            const struct rte_flow_item items[],
5300                            const struct rte_flow_action actions[],
5301                            struct mlx5_flow_split_info *flow_split_info,
5302                            struct rte_flow_error *error)
5303 {
5304         struct mlx5_priv *priv = dev->data->dev_private;
5305         struct mlx5_dev_config *config = &priv->config;
5306         const struct rte_flow_action *qrss = NULL;
5307         struct rte_flow_action *ext_actions = NULL;
5308         struct mlx5_flow *dev_flow = NULL;
5309         uint32_t qrss_id = 0;
5310         int mtr_sfx = 0;
5311         size_t act_size;
5312         int actions_n;
5313         int encap_idx;
5314         int ret;
5315
5316         /* Check whether extensive metadata feature is engaged. */
5317         if (!config->dv_flow_en ||
5318             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
5319             !mlx5_flow_ext_mreg_supported(dev))
5320                 return flow_create_split_inner(dev, flow, NULL, attr, items,
5321                                                actions, flow_split_info, error);
5322         actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
5323                                                            &encap_idx);
5324         if (qrss) {
5325                 /* Exclude hairpin flows from splitting. */
5326                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
5327                         const struct rte_flow_action_queue *queue;
5328
5329                         queue = qrss->conf;
5330                         if (mlx5_rxq_get_type(dev, queue->index) ==
5331                             MLX5_RXQ_TYPE_HAIRPIN)
5332                                 qrss = NULL;
5333                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
5334                         const struct rte_flow_action_rss *rss;
5335
5336                         rss = qrss->conf;
5337                         if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
5338                             MLX5_RXQ_TYPE_HAIRPIN)
5339                                 qrss = NULL;
5340                 }
5341         }
5342         if (qrss) {
5343                 /* Check if it is in meter suffix table. */
5344                 mtr_sfx = attr->group == (attr->transfer ?
5345                           (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
5346                           MLX5_FLOW_TABLE_LEVEL_METER);
5347                 /*
5348                  * Q/RSS action on NIC Rx should be split in order to pass by
5349                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
5350                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
5351                  */
5352                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5353                            sizeof(struct rte_flow_action_set_tag) +
5354                            sizeof(struct rte_flow_action_jump);
5355                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5356                                           SOCKET_ID_ANY);
5357                 if (!ext_actions)
5358                         return rte_flow_error_set(error, ENOMEM,
5359                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5360                                                   NULL, "no memory to split "
5361                                                   "metadata flow");
5362                 /*
5363                  * If we are the suffix flow of meter, tag already exist.
5364                  * Set the tag action to void.
5365                  */
5366                 if (mtr_sfx)
5367                         ext_actions[qrss - actions].type =
5368                                                 RTE_FLOW_ACTION_TYPE_VOID;
5369                 else
5370                         ext_actions[qrss - actions].type =
5371                                                 (enum rte_flow_action_type)
5372                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5373                 /*
5374                  * Create the new actions list with removed Q/RSS action
5375                  * and appended set tag and jump to register copy table
5376                  * (RX_CP_TBL). We should preallocate unique tag ID here
5377                  * in advance, because it is needed for set tag action.
5378                  */
5379                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
5380                                                     qrss, actions_n, error);
5381                 if (!mtr_sfx && !qrss_id) {
5382                         ret = -rte_errno;
5383                         goto exit;
5384                 }
5385         } else if (attr->egress && !attr->transfer) {
5386                 /*
5387                  * All the actions on NIC Tx should have a metadata register
5388                  * copy action to copy reg_a from WQE to reg_c[meta]
5389                  */
5390                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5391                            sizeof(struct mlx5_flow_action_copy_mreg);
5392                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5393                                           SOCKET_ID_ANY);
5394                 if (!ext_actions)
5395                         return rte_flow_error_set(error, ENOMEM,
5396                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5397                                                   NULL, "no memory to split "
5398                                                   "metadata flow");
5399                 /* Create the action list appended with copy register. */
5400                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
5401                                              actions_n, error, encap_idx);
5402                 if (ret < 0)
5403                         goto exit;
5404         }
5405         /* Add the unmodified original or prefix subflow. */
5406         ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
5407                                       items, ext_actions ? ext_actions :
5408                                       actions, flow_split_info, error);
5409         if (ret < 0)
5410                 goto exit;
5411         MLX5_ASSERT(dev_flow);
5412         if (qrss) {
5413                 const struct rte_flow_attr q_attr = {
5414                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5415                         .ingress = 1,
5416                 };
5417                 /* Internal PMD action to set register. */
5418                 struct mlx5_rte_flow_item_tag q_tag_spec = {
5419                         .data = qrss_id,
5420                         .id = REG_NON,
5421                 };
5422                 struct rte_flow_item q_items[] = {
5423                         {
5424                                 .type = (enum rte_flow_item_type)
5425                                         MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5426                                 .spec = &q_tag_spec,
5427                                 .last = NULL,
5428                                 .mask = NULL,
5429                         },
5430                         {
5431                                 .type = RTE_FLOW_ITEM_TYPE_END,
5432                         },
5433                 };
5434                 struct rte_flow_action q_actions[] = {
5435                         {
5436                                 .type = qrss->type,
5437                                 .conf = qrss->conf,
5438                         },
5439                         {
5440                                 .type = RTE_FLOW_ACTION_TYPE_END,
5441                         },
5442                 };
5443                 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
5444
5445                 /*
5446                  * Configure the tag item only if there is no meter subflow.
5447                  * Since tag is already marked in the meter suffix subflow
5448                  * we can just use the meter suffix items as is.
5449                  */
5450                 if (qrss_id) {
5451                         /* Not meter subflow. */
5452                         MLX5_ASSERT(!mtr_sfx);
5453                         /*
5454                          * Put unique id in prefix flow due to it is destroyed
5455                          * after suffix flow and id will be freed after there
5456                          * is no actual flows with this id and identifier
5457                          * reallocation becomes possible (for example, for
5458                          * other flows in other threads).
5459                          */
5460                         dev_flow->handle->split_flow_id = qrss_id;
5461                         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
5462                                                    error);
5463                         if (ret < 0)
5464                                 goto exit;
5465                         q_tag_spec.id = ret;
5466                 }
5467                 dev_flow = NULL;
5468                 /* Add suffix subflow to execute Q/RSS. */
5469                 flow_split_info->prefix_layers = layers;
5470                 flow_split_info->prefix_mark = 0;
5471                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5472                                               &q_attr, mtr_sfx ? items :
5473                                               q_items, q_actions,
5474                                               flow_split_info, error);
5475                 if (ret < 0)
5476                         goto exit;
5477                 /* qrss ID should be freed if failed. */
5478                 qrss_id = 0;
5479                 MLX5_ASSERT(dev_flow);
5480         }
5481
5482 exit:
5483         /*
5484          * We do not destroy the partially created sub_flows in case of error.
5485          * These ones are included into parent flow list and will be destroyed
5486          * by flow_drv_destroy.
5487          */
5488         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
5489                         qrss_id);
5490         mlx5_free(ext_actions);
5491         return ret;
5492 }
5493
5494 /**
5495  * Create meter internal drop flow with the original pattern.
5496  *
5497  * @param dev
5498  *   Pointer to Ethernet device.
5499  * @param[in] flow
5500  *   Parent flow structure pointer.
5501  * @param[in] attr
5502  *   Flow rule attributes.
5503  * @param[in] items
5504  *   Pattern specification (list terminated by the END pattern item).
5505  * @param[in] flow_split_info
5506  *   Pointer to flow split info structure.
5507  * @param[in] fm
5508  *   Pointer to flow meter structure.
5509  * @param[out] error
5510  *   Perform verbose error reporting if not NULL.
5511  * @return
5512  *   0 on success, negative value otherwise
5513  */
5514 static uint32_t
5515 flow_meter_create_drop_flow_with_org_pattern(struct rte_eth_dev *dev,
5516                         struct rte_flow *flow,
5517                         const struct rte_flow_attr *attr,
5518                         const struct rte_flow_item items[],
5519                         struct mlx5_flow_split_info *flow_split_info,
5520                         struct mlx5_flow_meter_info *fm,
5521                         struct rte_flow_error *error)
5522 {
5523         struct mlx5_flow *dev_flow = NULL;
5524         struct rte_flow_attr drop_attr = *attr;
5525         struct rte_flow_action drop_actions[3];
5526         struct mlx5_flow_split_info drop_split_info = *flow_split_info;
5527
5528         MLX5_ASSERT(fm->drop_cnt);
5529         drop_actions[0].type =
5530                 (enum rte_flow_action_type)MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
5531         drop_actions[0].conf = (void *)(uintptr_t)fm->drop_cnt;
5532         drop_actions[1].type = RTE_FLOW_ACTION_TYPE_DROP;
5533         drop_actions[1].conf = NULL;
5534         drop_actions[2].type = RTE_FLOW_ACTION_TYPE_END;
5535         drop_actions[2].conf = NULL;
5536         drop_split_info.external = false;
5537         drop_split_info.skip_scale |= 1 << MLX5_SCALE_FLOW_GROUP_BIT;
5538         drop_split_info.table_id = MLX5_MTR_TABLE_ID_DROP;
5539         drop_attr.group = MLX5_FLOW_TABLE_LEVEL_METER;
5540         return flow_create_split_inner(dev, flow, &dev_flow,
5541                                 &drop_attr, items, drop_actions,
5542                                 &drop_split_info, error);
5543 }
5544
5545 /**
5546  * The splitting for meter feature.
5547  *
5548  * - The meter flow will be split to two flows as prefix and
5549  *   suffix flow. The packets make sense only it pass the prefix
5550  *   meter action.
5551  *
5552  * - Reg_C_5 is used for the packet to match betweend prefix and
5553  *   suffix flow.
5554  *
5555  * @param dev
5556  *   Pointer to Ethernet device.
5557  * @param[in] flow
5558  *   Parent flow structure pointer.
5559  * @param[in] attr
5560  *   Flow rule attributes.
5561  * @param[in] items
5562  *   Pattern specification (list terminated by the END pattern item).
5563  * @param[in] actions
5564  *   Associated actions (list terminated by the END action).
5565  * @param[in] flow_split_info
5566  *   Pointer to flow split info structure.
5567  * @param[out] error
5568  *   Perform verbose error reporting if not NULL.
5569  * @return
5570  *   0 on success, negative value otherwise
5571  */
5572 static int
5573 flow_create_split_meter(struct rte_eth_dev *dev,
5574                         struct rte_flow *flow,
5575                         const struct rte_flow_attr *attr,
5576                         const struct rte_flow_item items[],
5577                         const struct rte_flow_action actions[],
5578                         struct mlx5_flow_split_info *flow_split_info,
5579                         struct rte_flow_error *error)
5580 {
5581         struct mlx5_priv *priv = dev->data->dev_private;
5582         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
5583         struct rte_flow_action *sfx_actions = NULL;
5584         struct rte_flow_action *pre_actions = NULL;
5585         struct rte_flow_item *sfx_items = NULL;
5586         struct mlx5_flow *dev_flow = NULL;
5587         struct rte_flow_attr sfx_attr = *attr;
5588         struct mlx5_flow_meter_info *fm = NULL;
5589         uint8_t skip_scale_restore;
5590         bool has_mtr = false;
5591         bool has_modify = false;
5592         bool set_mtr_reg = true;
5593         uint32_t meter_id = 0;
5594         uint32_t mtr_idx = 0;
5595         uint32_t mtr_flow_id = 0;
5596         size_t act_size;
5597         size_t item_size;
5598         int actions_n = 0;
5599         int ret = 0;
5600
5601         if (priv->mtr_en)
5602                 actions_n = flow_check_meter_action(dev, actions, &has_mtr,
5603                                                     &has_modify, &meter_id);
5604         if (has_mtr) {
5605                 if (flow->meter) {
5606                         fm = flow_dv_meter_find_by_idx(priv, flow->meter);
5607                         if (!fm)
5608                                 return rte_flow_error_set(error, EINVAL,
5609                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5610                                                 NULL, "Meter not found.");
5611                 } else {
5612                         fm = mlx5_flow_meter_find(priv, meter_id, &mtr_idx);
5613                         if (!fm)
5614                                 return rte_flow_error_set(error, EINVAL,
5615                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5616                                                 NULL, "Meter not found.");
5617                         ret = mlx5_flow_meter_attach(priv, fm,
5618                                                      &sfx_attr, error);
5619                         if (ret)
5620                                 return -rte_errno;
5621                         flow->meter = mtr_idx;
5622                 }
5623                 MLX5_ASSERT(wks);
5624                 wks->fm = fm;
5625                 /*
5626                  * If it isn't default-policy Meter, and
5627                  * 1. There's no action in flow to change
5628                  *    packet (modify/encap/decap etc.), OR
5629                  * 2. No drop count needed for this meter.
5630                  * no need to use regC to save meter id anymore.
5631                  */
5632                 if (!fm->def_policy && (!has_modify || !fm->drop_cnt))
5633                         set_mtr_reg = false;
5634                 /* Prefix actions: meter, decap, encap, tag, jump, end. */
5635                 act_size = sizeof(struct rte_flow_action) * (actions_n + 6) +
5636                            sizeof(struct mlx5_rte_flow_action_set_tag);
5637                 /* Suffix items: tag, vlan, port id, end. */
5638 #define METER_SUFFIX_ITEM 4
5639                 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
5640                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
5641                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size),
5642                                           0, SOCKET_ID_ANY);
5643                 if (!sfx_actions)
5644                         return rte_flow_error_set(error, ENOMEM,
5645                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5646                                                   NULL, "no memory to split "
5647                                                   "meter flow");
5648                 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
5649                              act_size);
5650                 /* There's no suffix flow for meter of non-default policy. */
5651                 if (!fm->def_policy)
5652                         pre_actions = sfx_actions + 1;
5653                 else
5654                         pre_actions = sfx_actions + actions_n;
5655                 ret = flow_meter_split_prep(dev, flow, fm, &sfx_attr,
5656                                             items, sfx_items, actions,
5657                                             sfx_actions, pre_actions,
5658                                             (set_mtr_reg ? &mtr_flow_id : NULL),
5659                                             error);
5660                 if (ret) {
5661                         ret = -rte_errno;
5662                         goto exit;
5663                 }
5664                 /* Add the prefix subflow. */
5665                 flow_split_info->prefix_mark = 0;
5666                 skip_scale_restore = flow_split_info->skip_scale;
5667                 flow_split_info->skip_scale |=
5668                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
5669                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5670                                               attr, items, pre_actions,
5671                                               flow_split_info, error);
5672                 flow_split_info->skip_scale = skip_scale_restore;
5673                 if (ret) {
5674                         if (mtr_flow_id)
5675                                 mlx5_ipool_free(fm->flow_ipool, mtr_flow_id);
5676                         ret = -rte_errno;
5677                         goto exit;
5678                 }
5679                 if (mtr_flow_id) {
5680                         dev_flow->handle->split_flow_id = mtr_flow_id;
5681                         dev_flow->handle->is_meter_flow_id = 1;
5682                 }
5683                 if (!fm->def_policy) {
5684                         if (!set_mtr_reg && fm->drop_cnt)
5685                                 ret =
5686                         flow_meter_create_drop_flow_with_org_pattern(dev, flow,
5687                                                         &sfx_attr, items,
5688                                                         flow_split_info,
5689                                                         fm, error);
5690                         goto exit;
5691                 }
5692                 /* Setting the sfx group atrr. */
5693                 sfx_attr.group = sfx_attr.transfer ?
5694                                 (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
5695                                  MLX5_FLOW_TABLE_LEVEL_METER;
5696                 flow_split_info->prefix_layers =
5697                                 flow_get_prefix_layer_flags(dev_flow);
5698                 flow_split_info->prefix_mark = dev_flow->handle->mark;
5699                 flow_split_info->table_id = MLX5_MTR_TABLE_ID_SUFFIX;
5700         }
5701         /* Add the prefix subflow. */
5702         ret = flow_create_split_metadata(dev, flow,
5703                                          &sfx_attr, sfx_items ?
5704                                          sfx_items : items,
5705                                          sfx_actions ? sfx_actions : actions,
5706                                          flow_split_info, error);
5707 exit:
5708         if (sfx_actions)
5709                 mlx5_free(sfx_actions);
5710         return ret;
5711 }
5712
5713 /**
5714  * The splitting for sample feature.
5715  *
5716  * Once Sample action is detected in the action list, the flow actions should
5717  * be split into prefix sub flow and suffix sub flow.
5718  *
5719  * The original items remain in the prefix sub flow, all actions preceding the
5720  * sample action and the sample action itself will be copied to the prefix
5721  * sub flow, the actions following the sample action will be copied to the
5722  * suffix sub flow, Queue action always be located in the suffix sub flow.
5723  *
5724  * In order to make the packet from prefix sub flow matches with suffix sub
5725  * flow, an extra tag action be added into prefix sub flow, and the suffix sub
5726  * flow uses tag item with the unique flow id.
5727  *
5728  * @param dev
5729  *   Pointer to Ethernet device.
5730  * @param[in] flow
5731  *   Parent flow structure pointer.
5732  * @param[in] attr
5733  *   Flow rule attributes.
5734  * @param[in] items
5735  *   Pattern specification (list terminated by the END pattern item).
5736  * @param[in] actions
5737  *   Associated actions (list terminated by the END action).
5738  * @param[in] flow_split_info
5739  *   Pointer to flow split info structure.
5740  * @param[out] error
5741  *   Perform verbose error reporting if not NULL.
5742  * @return
5743  *   0 on success, negative value otherwise
5744  */
5745 static int
5746 flow_create_split_sample(struct rte_eth_dev *dev,
5747                          struct rte_flow *flow,
5748                          const struct rte_flow_attr *attr,
5749                          const struct rte_flow_item items[],
5750                          const struct rte_flow_action actions[],
5751                          struct mlx5_flow_split_info *flow_split_info,
5752                          struct rte_flow_error *error)
5753 {
5754         struct mlx5_priv *priv = dev->data->dev_private;
5755         struct rte_flow_action *sfx_actions = NULL;
5756         struct rte_flow_action *pre_actions = NULL;
5757         struct rte_flow_item *sfx_items = NULL;
5758         struct mlx5_flow *dev_flow = NULL;
5759         struct rte_flow_attr sfx_attr = *attr;
5760 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5761         struct mlx5_flow_dv_sample_resource *sample_res;
5762         struct mlx5_flow_tbl_data_entry *sfx_tbl_data;
5763         struct mlx5_flow_tbl_resource *sfx_tbl;
5764 #endif
5765         size_t act_size;
5766         size_t item_size;
5767         uint32_t fdb_tx = 0;
5768         int32_t tag_id = 0;
5769         int actions_n = 0;
5770         int sample_action_pos;
5771         int qrss_action_pos;
5772         int add_tag = 0;
5773         int modify_after_mirror = 0;
5774         uint16_t jump_table = 0;
5775         const uint32_t next_ft_step = 1;
5776         int ret = 0;
5777
5778         if (priv->sampler_en)
5779                 actions_n = flow_check_match_action(actions, attr,
5780                                         RTE_FLOW_ACTION_TYPE_SAMPLE,
5781                                         &sample_action_pos, &qrss_action_pos,
5782                                         &modify_after_mirror);
5783         if (actions_n) {
5784                 /* The prefix actions must includes sample, tag, end. */
5785                 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1)
5786                            + sizeof(struct mlx5_rte_flow_action_set_tag);
5787                 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM +
5788                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
5789                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size +
5790                                           item_size), 0, SOCKET_ID_ANY);
5791                 if (!sfx_actions)
5792                         return rte_flow_error_set(error, ENOMEM,
5793                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5794                                                   NULL, "no memory to split "
5795                                                   "sample flow");
5796                 /* The representor_id is -1 for uplink. */
5797                 fdb_tx = (attr->transfer && priv->representor_id != -1);
5798                 /*
5799                  * When reg_c_preserve is set, metadata registers Cx preserve
5800                  * their value even through packet duplication.
5801                  */
5802                 add_tag = (!fdb_tx || priv->config.hca_attr.reg_c_preserve);
5803                 if (add_tag)
5804                         sfx_items = (struct rte_flow_item *)((char *)sfx_actions
5805                                         + act_size);
5806                 if (modify_after_mirror)
5807                         jump_table = attr->group * MLX5_FLOW_TABLE_FACTOR +
5808                                      next_ft_step;
5809                 pre_actions = sfx_actions + actions_n;
5810                 tag_id = flow_sample_split_prep(dev, add_tag, sfx_items,
5811                                                 actions, sfx_actions,
5812                                                 pre_actions, actions_n,
5813                                                 sample_action_pos,
5814                                                 qrss_action_pos, jump_table,
5815                                                 error);
5816                 if (tag_id < 0 || (add_tag && !tag_id)) {
5817                         ret = -rte_errno;
5818                         goto exit;
5819                 }
5820                 if (modify_after_mirror)
5821                         flow_split_info->skip_scale =
5822                                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
5823                 /* Add the prefix subflow. */
5824                 ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
5825                                               items, pre_actions,
5826                                               flow_split_info, error);
5827                 if (ret) {
5828                         ret = -rte_errno;
5829                         goto exit;
5830                 }
5831                 dev_flow->handle->split_flow_id = tag_id;
5832 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5833                 if (!modify_after_mirror) {
5834                         /* Set the sfx group attr. */
5835                         sample_res = (struct mlx5_flow_dv_sample_resource *)
5836                                                 dev_flow->dv.sample_res;
5837                         sfx_tbl = (struct mlx5_flow_tbl_resource *)
5838                                                 sample_res->normal_path_tbl;
5839                         sfx_tbl_data = container_of(sfx_tbl,
5840                                                 struct mlx5_flow_tbl_data_entry,
5841                                                 tbl);
5842                         sfx_attr.group = sfx_attr.transfer ?
5843                         (sfx_tbl_data->level - 1) : sfx_tbl_data->level;
5844                 } else {
5845                         MLX5_ASSERT(attr->transfer);
5846                         sfx_attr.group = jump_table;
5847                 }
5848                 flow_split_info->prefix_layers =
5849                                 flow_get_prefix_layer_flags(dev_flow);
5850                 flow_split_info->prefix_mark = dev_flow->handle->mark;
5851                 /* Suffix group level already be scaled with factor, set
5852                  * MLX5_SCALE_FLOW_GROUP_BIT of skip_scale to 1 to avoid scale
5853                  * again in translation.
5854                  */
5855                 flow_split_info->skip_scale = 1 << MLX5_SCALE_FLOW_GROUP_BIT;
5856 #endif
5857         }
5858         /* Add the suffix subflow. */
5859         ret = flow_create_split_meter(dev, flow, &sfx_attr,
5860                                       sfx_items ? sfx_items : items,
5861                                       sfx_actions ? sfx_actions : actions,
5862                                       flow_split_info, error);
5863 exit:
5864         if (sfx_actions)
5865                 mlx5_free(sfx_actions);
5866         return ret;
5867 }
5868
5869 /**
5870  * Split the flow to subflow set. The splitters might be linked
5871  * in the chain, like this:
5872  * flow_create_split_outer() calls:
5873  *   flow_create_split_meter() calls:
5874  *     flow_create_split_metadata(meter_subflow_0) calls:
5875  *       flow_create_split_inner(metadata_subflow_0)
5876  *       flow_create_split_inner(metadata_subflow_1)
5877  *       flow_create_split_inner(metadata_subflow_2)
5878  *     flow_create_split_metadata(meter_subflow_1) calls:
5879  *       flow_create_split_inner(metadata_subflow_0)
5880  *       flow_create_split_inner(metadata_subflow_1)
5881  *       flow_create_split_inner(metadata_subflow_2)
5882  *
5883  * This provide flexible way to add new levels of flow splitting.
5884  * The all of successfully created subflows are included to the
5885  * parent flow dev_flow list.
5886  *
5887  * @param dev
5888  *   Pointer to Ethernet device.
5889  * @param[in] flow
5890  *   Parent flow structure pointer.
5891  * @param[in] attr
5892  *   Flow rule attributes.
5893  * @param[in] items
5894  *   Pattern specification (list terminated by the END pattern item).
5895  * @param[in] actions
5896  *   Associated actions (list terminated by the END action).
5897  * @param[in] flow_split_info
5898  *   Pointer to flow split info structure.
5899  * @param[out] error
5900  *   Perform verbose error reporting if not NULL.
5901  * @return
5902  *   0 on success, negative value otherwise
5903  */
5904 static int
5905 flow_create_split_outer(struct rte_eth_dev *dev,
5906                         struct rte_flow *flow,
5907                         const struct rte_flow_attr *attr,
5908                         const struct rte_flow_item items[],
5909                         const struct rte_flow_action actions[],
5910                         struct mlx5_flow_split_info *flow_split_info,
5911                         struct rte_flow_error *error)
5912 {
5913         int ret;
5914
5915         ret = flow_create_split_sample(dev, flow, attr, items,
5916                                        actions, flow_split_info, error);
5917         MLX5_ASSERT(ret <= 0);
5918         return ret;
5919 }
5920
5921 static struct mlx5_flow_tunnel *
5922 flow_tunnel_from_rule(struct rte_eth_dev *dev,
5923                       const struct rte_flow_attr *attr,
5924                       const struct rte_flow_item items[],
5925                       const struct rte_flow_action actions[])
5926 {
5927         struct mlx5_flow_tunnel *tunnel;
5928
5929 #pragma GCC diagnostic push
5930 #pragma GCC diagnostic ignored "-Wcast-qual"
5931         if (is_flow_tunnel_match_rule(dev, attr, items, actions))
5932                 tunnel = (struct mlx5_flow_tunnel *)items[0].spec;
5933         else if (is_flow_tunnel_steer_rule(dev, attr, items, actions))
5934                 tunnel = (struct mlx5_flow_tunnel *)actions[0].conf;
5935         else
5936                 tunnel = NULL;
5937 #pragma GCC diagnostic pop
5938
5939         return tunnel;
5940 }
5941
5942 /**
5943  * Adjust flow RSS workspace if needed.
5944  *
5945  * @param wks
5946  *   Pointer to thread flow work space.
5947  * @param rss_desc
5948  *   Pointer to RSS descriptor.
5949  * @param[in] nrssq_num
5950  *   New RSS queue number.
5951  *
5952  * @return
5953  *   0 on success, -1 otherwise and rte_errno is set.
5954  */
5955 static int
5956 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks,
5957                           struct mlx5_flow_rss_desc *rss_desc,
5958                           uint32_t nrssq_num)
5959 {
5960         if (likely(nrssq_num <= wks->rssq_num))
5961                 return 0;
5962         rss_desc->queue = realloc(rss_desc->queue,
5963                           sizeof(*rss_desc->queue) * RTE_ALIGN(nrssq_num, 2));
5964         if (!rss_desc->queue) {
5965                 rte_errno = ENOMEM;
5966                 return -1;
5967         }
5968         wks->rssq_num = RTE_ALIGN(nrssq_num, 2);
5969         return 0;
5970 }
5971
5972 /**
5973  * Create a flow and add it to @p list.
5974  *
5975  * @param dev
5976  *   Pointer to Ethernet device.
5977  * @param list
5978  *   Pointer to a TAILQ flow list. If this parameter NULL,
5979  *   no list insertion occurred, flow is just created,
5980  *   this is caller's responsibility to track the
5981  *   created flow.
5982  * @param[in] attr
5983  *   Flow rule attributes.
5984  * @param[in] items
5985  *   Pattern specification (list terminated by the END pattern item).
5986  * @param[in] actions
5987  *   Associated actions (list terminated by the END action).
5988  * @param[in] external
5989  *   This flow rule is created by request external to PMD.
5990  * @param[out] error
5991  *   Perform verbose error reporting if not NULL.
5992  *
5993  * @return
5994  *   A flow index on success, 0 otherwise and rte_errno is set.
5995  */
5996 static uint32_t
5997 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
5998                  const struct rte_flow_attr *attr,
5999                  const struct rte_flow_item items[],
6000                  const struct rte_flow_action original_actions[],
6001                  bool external, struct rte_flow_error *error)
6002 {
6003         struct mlx5_priv *priv = dev->data->dev_private;
6004         struct rte_flow *flow = NULL;
6005         struct mlx5_flow *dev_flow;
6006         const struct rte_flow_action_rss *rss = NULL;
6007         struct mlx5_translated_action_handle
6008                 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6009         int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6010         union {
6011                 struct mlx5_flow_expand_rss buf;
6012                 uint8_t buffer[2048];
6013         } expand_buffer;
6014         union {
6015                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6016                 uint8_t buffer[2048];
6017         } actions_rx;
6018         union {
6019                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6020                 uint8_t buffer[2048];
6021         } actions_hairpin_tx;
6022         union {
6023                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
6024                 uint8_t buffer[2048];
6025         } items_tx;
6026         struct mlx5_flow_expand_rss *buf = &expand_buffer.buf;
6027         struct mlx5_flow_rss_desc *rss_desc;
6028         const struct rte_flow_action *p_actions_rx;
6029         uint32_t i;
6030         uint32_t idx = 0;
6031         int hairpin_flow;
6032         struct rte_flow_attr attr_tx = { .priority = 0 };
6033         const struct rte_flow_action *actions;
6034         struct rte_flow_action *translated_actions = NULL;
6035         struct mlx5_flow_tunnel *tunnel;
6036         struct tunnel_default_miss_ctx default_miss_ctx = { 0, };
6037         struct mlx5_flow_workspace *wks = mlx5_flow_push_thread_workspace();
6038         struct mlx5_flow_split_info flow_split_info = {
6039                 .external = !!external,
6040                 .skip_scale = 0,
6041                 .flow_idx = 0,
6042                 .prefix_mark = 0,
6043                 .prefix_layers = 0,
6044                 .table_id = 0
6045         };
6046         int ret;
6047
6048         MLX5_ASSERT(wks);
6049         rss_desc = &wks->rss_desc;
6050         ret = flow_action_handles_translate(dev, original_actions,
6051                                             indir_actions,
6052                                             &indir_actions_n,
6053                                             &translated_actions, error);
6054         if (ret < 0) {
6055                 MLX5_ASSERT(translated_actions == NULL);
6056                 return 0;
6057         }
6058         actions = translated_actions ? translated_actions : original_actions;
6059         p_actions_rx = actions;
6060         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6061         ret = flow_drv_validate(dev, attr, items, p_actions_rx,
6062                                 external, hairpin_flow, error);
6063         if (ret < 0)
6064                 goto error_before_hairpin_split;
6065         flow = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], &idx);
6066         if (!flow) {
6067                 rte_errno = ENOMEM;
6068                 goto error_before_hairpin_split;
6069         }
6070         if (hairpin_flow > 0) {
6071                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
6072                         rte_errno = EINVAL;
6073                         goto error_before_hairpin_split;
6074                 }
6075                 flow_hairpin_split(dev, actions, actions_rx.actions,
6076                                    actions_hairpin_tx.actions, items_tx.items,
6077                                    idx);
6078                 p_actions_rx = actions_rx.actions;
6079         }
6080         flow_split_info.flow_idx = idx;
6081         flow->drv_type = flow_get_drv_type(dev, attr);
6082         MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
6083                     flow->drv_type < MLX5_FLOW_TYPE_MAX);
6084         memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue));
6085         /* RSS Action only works on NIC RX domain */
6086         if (attr->ingress && !attr->transfer)
6087                 rss = flow_get_rss_action(dev, p_actions_rx);
6088         if (rss) {
6089                 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num))
6090                         return 0;
6091                 /*
6092                  * The following information is required by
6093                  * mlx5_flow_hashfields_adjust() in advance.
6094                  */
6095                 rss_desc->level = rss->level;
6096                 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
6097                 rss_desc->types = !rss->types ? ETH_RSS_IP : rss->types;
6098         }
6099         flow->dev_handles = 0;
6100         if (rss && rss->types) {
6101                 unsigned int graph_root;
6102
6103                 graph_root = find_graph_root(items, rss->level);
6104                 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
6105                                            items, rss->types,
6106                                            mlx5_support_expansion, graph_root);
6107                 MLX5_ASSERT(ret > 0 &&
6108                        (unsigned int)ret < sizeof(expand_buffer.buffer));
6109         } else {
6110                 buf->entries = 1;
6111                 buf->entry[0].pattern = (void *)(uintptr_t)items;
6112         }
6113         rss_desc->shared_rss = flow_get_shared_rss_action(dev, indir_actions,
6114                                                       indir_actions_n);
6115         for (i = 0; i < buf->entries; ++i) {
6116                 /* Initialize flow split data. */
6117                 flow_split_info.prefix_layers = 0;
6118                 flow_split_info.prefix_mark = 0;
6119                 flow_split_info.skip_scale = 0;
6120                 /*
6121                  * The splitter may create multiple dev_flows,
6122                  * depending on configuration. In the simplest
6123                  * case it just creates unmodified original flow.
6124                  */
6125                 ret = flow_create_split_outer(dev, flow, attr,
6126                                               buf->entry[i].pattern,
6127                                               p_actions_rx, &flow_split_info,
6128                                               error);
6129                 if (ret < 0)
6130                         goto error;
6131                 if (is_flow_tunnel_steer_rule(dev, attr,
6132                                               buf->entry[i].pattern,
6133                                               p_actions_rx)) {
6134                         ret = flow_tunnel_add_default_miss(dev, flow, attr,
6135                                                            p_actions_rx,
6136                                                            idx,
6137                                                            &default_miss_ctx,
6138                                                            error);
6139                         if (ret < 0) {
6140                                 mlx5_free(default_miss_ctx.queue);
6141                                 goto error;
6142                         }
6143                 }
6144         }
6145         /* Create the tx flow. */
6146         if (hairpin_flow) {
6147                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
6148                 attr_tx.ingress = 0;
6149                 attr_tx.egress = 1;
6150                 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
6151                                          actions_hairpin_tx.actions,
6152                                          idx, error);
6153                 if (!dev_flow)
6154                         goto error;
6155                 dev_flow->flow = flow;
6156                 dev_flow->external = 0;
6157                 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
6158                               dev_flow->handle, next);
6159                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
6160                                          items_tx.items,
6161                                          actions_hairpin_tx.actions, error);
6162                 if (ret < 0)
6163                         goto error;
6164         }
6165         /*
6166          * Update the metadata register copy table. If extensive
6167          * metadata feature is enabled and registers are supported
6168          * we might create the extra rte_flow for each unique
6169          * MARK/FLAG action ID.
6170          *
6171          * The table is updated for ingress Flows only, because
6172          * the egress Flows belong to the different device and
6173          * copy table should be updated in peer NIC Rx domain.
6174          */
6175         if (attr->ingress &&
6176             (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
6177                 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
6178                 if (ret)
6179                         goto error;
6180         }
6181         /*
6182          * If the flow is external (from application) OR device is started,
6183          * OR mreg discover, then apply immediately.
6184          */
6185         if (external || dev->data->dev_started ||
6186             (attr->group == MLX5_FLOW_MREG_CP_TABLE_GROUP &&
6187              attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)) {
6188                 ret = flow_drv_apply(dev, flow, error);
6189                 if (ret < 0)
6190                         goto error;
6191         }
6192         if (list) {
6193                 rte_spinlock_lock(&priv->flow_list_lock);
6194                 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list, idx,
6195                              flow, next);
6196                 rte_spinlock_unlock(&priv->flow_list_lock);
6197         }
6198         flow_rxq_flags_set(dev, flow);
6199         rte_free(translated_actions);
6200         tunnel = flow_tunnel_from_rule(dev, attr, items, actions);
6201         if (tunnel) {
6202                 flow->tunnel = 1;
6203                 flow->tunnel_id = tunnel->tunnel_id;
6204                 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED);
6205                 mlx5_free(default_miss_ctx.queue);
6206         }
6207         mlx5_flow_pop_thread_workspace();
6208         return idx;
6209 error:
6210         MLX5_ASSERT(flow);
6211         ret = rte_errno; /* Save rte_errno before cleanup. */
6212         flow_mreg_del_copy_action(dev, flow);
6213         flow_drv_destroy(dev, flow);
6214         if (rss_desc->shared_rss)
6215                 __atomic_sub_fetch(&((struct mlx5_shared_action_rss *)
6216                         mlx5_ipool_get
6217                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
6218                         rss_desc->shared_rss))->refcnt, 1, __ATOMIC_RELAXED);
6219         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], idx);
6220         rte_errno = ret; /* Restore rte_errno. */
6221         ret = rte_errno;
6222         rte_errno = ret;
6223         mlx5_flow_pop_thread_workspace();
6224 error_before_hairpin_split:
6225         rte_free(translated_actions);
6226         return 0;
6227 }
6228
6229 /**
6230  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
6231  * incoming packets to table 1.
6232  *
6233  * Other flow rules, requested for group n, will be created in
6234  * e-switch table n+1.
6235  * Jump action to e-switch group n will be created to group n+1.
6236  *
6237  * Used when working in switchdev mode, to utilise advantages of table 1
6238  * and above.
6239  *
6240  * @param dev
6241  *   Pointer to Ethernet device.
6242  *
6243  * @return
6244  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
6245  */
6246 struct rte_flow *
6247 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
6248 {
6249         const struct rte_flow_attr attr = {
6250                 .group = 0,
6251                 .priority = 0,
6252                 .ingress = 1,
6253                 .egress = 0,
6254                 .transfer = 1,
6255         };
6256         const struct rte_flow_item pattern = {
6257                 .type = RTE_FLOW_ITEM_TYPE_END,
6258         };
6259         struct rte_flow_action_jump jump = {
6260                 .group = 1,
6261         };
6262         const struct rte_flow_action actions[] = {
6263                 {
6264                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
6265                         .conf = &jump,
6266                 },
6267                 {
6268                         .type = RTE_FLOW_ACTION_TYPE_END,
6269                 },
6270         };
6271         struct mlx5_priv *priv = dev->data->dev_private;
6272         struct rte_flow_error error;
6273
6274         return (void *)(uintptr_t)flow_list_create(dev, &priv->ctrl_flows,
6275                                                    &attr, &pattern,
6276                                                    actions, false, &error);
6277 }
6278
6279 /**
6280  * Validate a flow supported by the NIC.
6281  *
6282  * @see rte_flow_validate()
6283  * @see rte_flow_ops
6284  */
6285 int
6286 mlx5_flow_validate(struct rte_eth_dev *dev,
6287                    const struct rte_flow_attr *attr,
6288                    const struct rte_flow_item items[],
6289                    const struct rte_flow_action original_actions[],
6290                    struct rte_flow_error *error)
6291 {
6292         int hairpin_flow;
6293         struct mlx5_translated_action_handle
6294                 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6295         int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6296         const struct rte_flow_action *actions;
6297         struct rte_flow_action *translated_actions = NULL;
6298         int ret = flow_action_handles_translate(dev, original_actions,
6299                                                 indir_actions,
6300                                                 &indir_actions_n,
6301                                                 &translated_actions, error);
6302
6303         if (ret)
6304                 return ret;
6305         actions = translated_actions ? translated_actions : original_actions;
6306         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6307         ret = flow_drv_validate(dev, attr, items, actions,
6308                                 true, hairpin_flow, error);
6309         rte_free(translated_actions);
6310         return ret;
6311 }
6312
6313 /**
6314  * Create a flow.
6315  *
6316  * @see rte_flow_create()
6317  * @see rte_flow_ops
6318  */
6319 struct rte_flow *
6320 mlx5_flow_create(struct rte_eth_dev *dev,
6321                  const struct rte_flow_attr *attr,
6322                  const struct rte_flow_item items[],
6323                  const struct rte_flow_action actions[],
6324                  struct rte_flow_error *error)
6325 {
6326         struct mlx5_priv *priv = dev->data->dev_private;
6327
6328         /*
6329          * If the device is not started yet, it is not allowed to created a
6330          * flow from application. PMD default flows and traffic control flows
6331          * are not affected.
6332          */
6333         if (unlikely(!dev->data->dev_started)) {
6334                 DRV_LOG(DEBUG, "port %u is not started when "
6335                         "inserting a flow", dev->data->port_id);
6336                 rte_flow_error_set(error, ENODEV,
6337                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6338                                    NULL,
6339                                    "port not started");
6340                 return NULL;
6341         }
6342
6343         return (void *)(uintptr_t)flow_list_create(dev, &priv->flows,
6344                                   attr, items, actions, true, error);
6345 }
6346
6347 /**
6348  * Destroy a flow in a list.
6349  *
6350  * @param dev
6351  *   Pointer to Ethernet device.
6352  * @param list
6353  *   Pointer to the Indexed flow list. If this parameter NULL,
6354  *   there is no flow removal from the list. Be noted that as
6355  *   flow is add to the indexed list, memory of the indexed
6356  *   list points to maybe changed as flow destroyed.
6357  * @param[in] flow_idx
6358  *   Index of flow to destroy.
6359  */
6360 static void
6361 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
6362                   uint32_t flow_idx)
6363 {
6364         struct mlx5_priv *priv = dev->data->dev_private;
6365         struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
6366                                                [MLX5_IPOOL_RTE_FLOW], flow_idx);
6367
6368         if (!flow)
6369                 return;
6370         /*
6371          * Update RX queue flags only if port is started, otherwise it is
6372          * already clean.
6373          */
6374         if (dev->data->dev_started)
6375                 flow_rxq_flags_trim(dev, flow);
6376         flow_drv_destroy(dev, flow);
6377         if (list) {
6378                 rte_spinlock_lock(&priv->flow_list_lock);
6379                 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list,
6380                              flow_idx, flow, next);
6381                 rte_spinlock_unlock(&priv->flow_list_lock);
6382         }
6383         if (flow->tunnel) {
6384                 struct mlx5_flow_tunnel *tunnel;
6385
6386                 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id);
6387                 RTE_VERIFY(tunnel);
6388                 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
6389                         mlx5_flow_tunnel_free(dev, tunnel);
6390         }
6391         flow_mreg_del_copy_action(dev, flow);
6392         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], flow_idx);
6393 }
6394
6395 /**
6396  * Destroy all flows.
6397  *
6398  * @param dev
6399  *   Pointer to Ethernet device.
6400  * @param list
6401  *   Pointer to the Indexed flow list.
6402  * @param active
6403  *   If flushing is called avtively.
6404  */
6405 void
6406 mlx5_flow_list_flush(struct rte_eth_dev *dev, uint32_t *list, bool active)
6407 {
6408         uint32_t num_flushed = 0;
6409
6410         while (*list) {
6411                 flow_list_destroy(dev, list, *list);
6412                 num_flushed++;
6413         }
6414         if (active) {
6415                 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
6416                         dev->data->port_id, num_flushed);
6417         }
6418 }
6419
6420 /**
6421  * Stop all default actions for flows.
6422  *
6423  * @param dev
6424  *   Pointer to Ethernet device.
6425  */
6426 void
6427 mlx5_flow_stop_default(struct rte_eth_dev *dev)
6428 {
6429         flow_mreg_del_default_copy_action(dev);
6430         flow_rxq_flags_clear(dev);
6431 }
6432
6433 /**
6434  * Start all default actions for flows.
6435  *
6436  * @param dev
6437  *   Pointer to Ethernet device.
6438  * @return
6439  *   0 on success, a negative errno value otherwise and rte_errno is set.
6440  */
6441 int
6442 mlx5_flow_start_default(struct rte_eth_dev *dev)
6443 {
6444         struct rte_flow_error error;
6445
6446         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
6447         return flow_mreg_add_default_copy_action(dev, &error);
6448 }
6449
6450 /**
6451  * Release key of thread specific flow workspace data.
6452  */
6453 void
6454 flow_release_workspace(void *data)
6455 {
6456         struct mlx5_flow_workspace *wks = data;
6457         struct mlx5_flow_workspace *next;
6458
6459         while (wks) {
6460                 next = wks->next;
6461                 free(wks->rss_desc.queue);
6462                 free(wks);
6463                 wks = next;
6464         }
6465 }
6466
6467 /**
6468  * Get thread specific current flow workspace.
6469  *
6470  * @return pointer to thread specific flow workspace data, NULL on error.
6471  */
6472 struct mlx5_flow_workspace*
6473 mlx5_flow_get_thread_workspace(void)
6474 {
6475         struct mlx5_flow_workspace *data;
6476
6477         data = mlx5_flow_os_get_specific_workspace();
6478         MLX5_ASSERT(data && data->inuse);
6479         if (!data || !data->inuse)
6480                 DRV_LOG(ERR, "flow workspace not initialized.");
6481         return data;
6482 }
6483
6484 /**
6485  * Allocate and init new flow workspace.
6486  *
6487  * @return pointer to flow workspace data, NULL on error.
6488  */
6489 static struct mlx5_flow_workspace*
6490 flow_alloc_thread_workspace(void)
6491 {
6492         struct mlx5_flow_workspace *data = calloc(1, sizeof(*data));
6493
6494         if (!data) {
6495                 DRV_LOG(ERR, "Failed to allocate flow workspace "
6496                         "memory.");
6497                 return NULL;
6498         }
6499         data->rss_desc.queue = calloc(1,
6500                         sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM);
6501         if (!data->rss_desc.queue)
6502                 goto err;
6503         data->rssq_num = MLX5_RSSQ_DEFAULT_NUM;
6504         return data;
6505 err:
6506         if (data->rss_desc.queue)
6507                 free(data->rss_desc.queue);
6508         free(data);
6509         return NULL;
6510 }
6511
6512 /**
6513  * Get new thread specific flow workspace.
6514  *
6515  * If current workspace inuse, create new one and set as current.
6516  *
6517  * @return pointer to thread specific flow workspace data, NULL on error.
6518  */
6519 static struct mlx5_flow_workspace*
6520 mlx5_flow_push_thread_workspace(void)
6521 {
6522         struct mlx5_flow_workspace *curr;
6523         struct mlx5_flow_workspace *data;
6524
6525         curr = mlx5_flow_os_get_specific_workspace();
6526         if (!curr) {
6527                 data = flow_alloc_thread_workspace();
6528                 if (!data)
6529                         return NULL;
6530         } else if (!curr->inuse) {
6531                 data = curr;
6532         } else if (curr->next) {
6533                 data = curr->next;
6534         } else {
6535                 data = flow_alloc_thread_workspace();
6536                 if (!data)
6537                         return NULL;
6538                 curr->next = data;
6539                 data->prev = curr;
6540         }
6541         data->inuse = 1;
6542         data->flow_idx = 0;
6543         /* Set as current workspace */
6544         if (mlx5_flow_os_set_specific_workspace(data))
6545                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6546         return data;
6547 }
6548
6549 /**
6550  * Close current thread specific flow workspace.
6551  *
6552  * If previous workspace available, set it as current.
6553  *
6554  * @return pointer to thread specific flow workspace data, NULL on error.
6555  */
6556 static void
6557 mlx5_flow_pop_thread_workspace(void)
6558 {
6559         struct mlx5_flow_workspace *data = mlx5_flow_get_thread_workspace();
6560
6561         if (!data)
6562                 return;
6563         if (!data->inuse) {
6564                 DRV_LOG(ERR, "Failed to close unused flow workspace.");
6565                 return;
6566         }
6567         data->inuse = 0;
6568         if (!data->prev)
6569                 return;
6570         if (mlx5_flow_os_set_specific_workspace(data->prev))
6571                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6572 }
6573
6574 /**
6575  * Verify the flow list is empty
6576  *
6577  * @param dev
6578  *  Pointer to Ethernet device.
6579  *
6580  * @return the number of flows not released.
6581  */
6582 int
6583 mlx5_flow_verify(struct rte_eth_dev *dev)
6584 {
6585         struct mlx5_priv *priv = dev->data->dev_private;
6586         struct rte_flow *flow;
6587         uint32_t idx;
6588         int ret = 0;
6589
6590         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], priv->flows, idx,
6591                       flow, next) {
6592                 DRV_LOG(DEBUG, "port %u flow %p still referenced",
6593                         dev->data->port_id, (void *)flow);
6594                 ++ret;
6595         }
6596         return ret;
6597 }
6598
6599 /**
6600  * Enable default hairpin egress flow.
6601  *
6602  * @param dev
6603  *   Pointer to Ethernet device.
6604  * @param queue
6605  *   The queue index.
6606  *
6607  * @return
6608  *   0 on success, a negative errno value otherwise and rte_errno is set.
6609  */
6610 int
6611 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
6612                             uint32_t queue)
6613 {
6614         struct mlx5_priv *priv = dev->data->dev_private;
6615         const struct rte_flow_attr attr = {
6616                 .egress = 1,
6617                 .priority = 0,
6618         };
6619         struct mlx5_rte_flow_item_tx_queue queue_spec = {
6620                 .queue = queue,
6621         };
6622         struct mlx5_rte_flow_item_tx_queue queue_mask = {
6623                 .queue = UINT32_MAX,
6624         };
6625         struct rte_flow_item items[] = {
6626                 {
6627                         .type = (enum rte_flow_item_type)
6628                                 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
6629                         .spec = &queue_spec,
6630                         .last = NULL,
6631                         .mask = &queue_mask,
6632                 },
6633                 {
6634                         .type = RTE_FLOW_ITEM_TYPE_END,
6635                 },
6636         };
6637         struct rte_flow_action_jump jump = {
6638                 .group = MLX5_HAIRPIN_TX_TABLE,
6639         };
6640         struct rte_flow_action actions[2];
6641         uint32_t flow_idx;
6642         struct rte_flow_error error;
6643
6644         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
6645         actions[0].conf = &jump;
6646         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
6647         flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6648                                 &attr, items, actions, false, &error);
6649         if (!flow_idx) {
6650                 DRV_LOG(DEBUG,
6651                         "Failed to create ctrl flow: rte_errno(%d),"
6652                         " type(%d), message(%s)",
6653                         rte_errno, error.type,
6654                         error.message ? error.message : " (no stated reason)");
6655                 return -rte_errno;
6656         }
6657         return 0;
6658 }
6659
6660 /**
6661  * Enable a control flow configured from the control plane.
6662  *
6663  * @param dev
6664  *   Pointer to Ethernet device.
6665  * @param eth_spec
6666  *   An Ethernet flow spec to apply.
6667  * @param eth_mask
6668  *   An Ethernet flow mask to apply.
6669  * @param vlan_spec
6670  *   A VLAN flow spec to apply.
6671  * @param vlan_mask
6672  *   A VLAN flow mask to apply.
6673  *
6674  * @return
6675  *   0 on success, a negative errno value otherwise and rte_errno is set.
6676  */
6677 int
6678 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
6679                     struct rte_flow_item_eth *eth_spec,
6680                     struct rte_flow_item_eth *eth_mask,
6681                     struct rte_flow_item_vlan *vlan_spec,
6682                     struct rte_flow_item_vlan *vlan_mask)
6683 {
6684         struct mlx5_priv *priv = dev->data->dev_private;
6685         const struct rte_flow_attr attr = {
6686                 .ingress = 1,
6687                 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
6688         };
6689         struct rte_flow_item items[] = {
6690                 {
6691                         .type = RTE_FLOW_ITEM_TYPE_ETH,
6692                         .spec = eth_spec,
6693                         .last = NULL,
6694                         .mask = eth_mask,
6695                 },
6696                 {
6697                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
6698                                               RTE_FLOW_ITEM_TYPE_END,
6699                         .spec = vlan_spec,
6700                         .last = NULL,
6701                         .mask = vlan_mask,
6702                 },
6703                 {
6704                         .type = RTE_FLOW_ITEM_TYPE_END,
6705                 },
6706         };
6707         uint16_t queue[priv->reta_idx_n];
6708         struct rte_flow_action_rss action_rss = {
6709                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
6710                 .level = 0,
6711                 .types = priv->rss_conf.rss_hf,
6712                 .key_len = priv->rss_conf.rss_key_len,
6713                 .queue_num = priv->reta_idx_n,
6714                 .key = priv->rss_conf.rss_key,
6715                 .queue = queue,
6716         };
6717         struct rte_flow_action actions[] = {
6718                 {
6719                         .type = RTE_FLOW_ACTION_TYPE_RSS,
6720                         .conf = &action_rss,
6721                 },
6722                 {
6723                         .type = RTE_FLOW_ACTION_TYPE_END,
6724                 },
6725         };
6726         uint32_t flow_idx;
6727         struct rte_flow_error error;
6728         unsigned int i;
6729
6730         if (!priv->reta_idx_n || !priv->rxqs_n) {
6731                 return 0;
6732         }
6733         if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
6734                 action_rss.types = 0;
6735         for (i = 0; i != priv->reta_idx_n; ++i)
6736                 queue[i] = (*priv->reta_idx)[i];
6737         flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6738                                 &attr, items, actions, false, &error);
6739         if (!flow_idx)
6740                 return -rte_errno;
6741         return 0;
6742 }
6743
6744 /**
6745  * Enable a flow control configured from the control plane.
6746  *
6747  * @param dev
6748  *   Pointer to Ethernet device.
6749  * @param eth_spec
6750  *   An Ethernet flow spec to apply.
6751  * @param eth_mask
6752  *   An Ethernet flow mask to apply.
6753  *
6754  * @return
6755  *   0 on success, a negative errno value otherwise and rte_errno is set.
6756  */
6757 int
6758 mlx5_ctrl_flow(struct rte_eth_dev *dev,
6759                struct rte_flow_item_eth *eth_spec,
6760                struct rte_flow_item_eth *eth_mask)
6761 {
6762         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
6763 }
6764
6765 /**
6766  * Create default miss flow rule matching lacp traffic
6767  *
6768  * @param dev
6769  *   Pointer to Ethernet device.
6770  * @param eth_spec
6771  *   An Ethernet flow spec to apply.
6772  *
6773  * @return
6774  *   0 on success, a negative errno value otherwise and rte_errno is set.
6775  */
6776 int
6777 mlx5_flow_lacp_miss(struct rte_eth_dev *dev)
6778 {
6779         struct mlx5_priv *priv = dev->data->dev_private;
6780         /*
6781          * The LACP matching is done by only using ether type since using
6782          * a multicast dst mac causes kernel to give low priority to this flow.
6783          */
6784         static const struct rte_flow_item_eth lacp_spec = {
6785                 .type = RTE_BE16(0x8809),
6786         };
6787         static const struct rte_flow_item_eth lacp_mask = {
6788                 .type = 0xffff,
6789         };
6790         const struct rte_flow_attr attr = {
6791                 .ingress = 1,
6792         };
6793         struct rte_flow_item items[] = {
6794                 {
6795                         .type = RTE_FLOW_ITEM_TYPE_ETH,
6796                         .spec = &lacp_spec,
6797                         .mask = &lacp_mask,
6798                 },
6799                 {
6800                         .type = RTE_FLOW_ITEM_TYPE_END,
6801                 },
6802         };
6803         struct rte_flow_action actions[] = {
6804                 {
6805                         .type = (enum rte_flow_action_type)
6806                                 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS,
6807                 },
6808                 {
6809                         .type = RTE_FLOW_ACTION_TYPE_END,
6810                 },
6811         };
6812         struct rte_flow_error error;
6813         uint32_t flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6814                                 &attr, items, actions, false, &error);
6815
6816         if (!flow_idx)
6817                 return -rte_errno;
6818         return 0;
6819 }
6820
6821 /**
6822  * Destroy a flow.
6823  *
6824  * @see rte_flow_destroy()
6825  * @see rte_flow_ops
6826  */
6827 int
6828 mlx5_flow_destroy(struct rte_eth_dev *dev,
6829                   struct rte_flow *flow,
6830                   struct rte_flow_error *error __rte_unused)
6831 {
6832         struct mlx5_priv *priv = dev->data->dev_private;
6833
6834         flow_list_destroy(dev, &priv->flows, (uintptr_t)(void *)flow);
6835         return 0;
6836 }
6837
6838 /**
6839  * Destroy all flows.
6840  *
6841  * @see rte_flow_flush()
6842  * @see rte_flow_ops
6843  */
6844 int
6845 mlx5_flow_flush(struct rte_eth_dev *dev,
6846                 struct rte_flow_error *error __rte_unused)
6847 {
6848         struct mlx5_priv *priv = dev->data->dev_private;
6849
6850         mlx5_flow_list_flush(dev, &priv->flows, false);
6851         return 0;
6852 }
6853
6854 /**
6855  * Isolated mode.
6856  *
6857  * @see rte_flow_isolate()
6858  * @see rte_flow_ops
6859  */
6860 int
6861 mlx5_flow_isolate(struct rte_eth_dev *dev,
6862                   int enable,
6863                   struct rte_flow_error *error)
6864 {
6865         struct mlx5_priv *priv = dev->data->dev_private;
6866
6867         if (dev->data->dev_started) {
6868                 rte_flow_error_set(error, EBUSY,
6869                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6870                                    NULL,
6871                                    "port must be stopped first");
6872                 return -rte_errno;
6873         }
6874         priv->isolated = !!enable;
6875         if (enable)
6876                 dev->dev_ops = &mlx5_dev_ops_isolate;
6877         else
6878                 dev->dev_ops = &mlx5_dev_ops;
6879
6880         dev->rx_descriptor_status = mlx5_rx_descriptor_status;
6881         dev->tx_descriptor_status = mlx5_tx_descriptor_status;
6882
6883         return 0;
6884 }
6885
6886 /**
6887  * Query a flow.
6888  *
6889  * @see rte_flow_query()
6890  * @see rte_flow_ops
6891  */
6892 static int
6893 flow_drv_query(struct rte_eth_dev *dev,
6894                uint32_t flow_idx,
6895                const struct rte_flow_action *actions,
6896                void *data,
6897                struct rte_flow_error *error)
6898 {
6899         struct mlx5_priv *priv = dev->data->dev_private;
6900         const struct mlx5_flow_driver_ops *fops;
6901         struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
6902                                                [MLX5_IPOOL_RTE_FLOW],
6903                                                flow_idx);
6904         enum mlx5_flow_drv_type ftype;
6905
6906         if (!flow) {
6907                 return rte_flow_error_set(error, ENOENT,
6908                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6909                           NULL,
6910                           "invalid flow handle");
6911         }
6912         ftype = flow->drv_type;
6913         MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
6914         fops = flow_get_drv_ops(ftype);
6915
6916         return fops->query(dev, flow, actions, data, error);
6917 }
6918
6919 /**
6920  * Query a flow.
6921  *
6922  * @see rte_flow_query()
6923  * @see rte_flow_ops
6924  */
6925 int
6926 mlx5_flow_query(struct rte_eth_dev *dev,
6927                 struct rte_flow *flow,
6928                 const struct rte_flow_action *actions,
6929                 void *data,
6930                 struct rte_flow_error *error)
6931 {
6932         int ret;
6933
6934         ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data,
6935                              error);
6936         if (ret < 0)
6937                 return ret;
6938         return 0;
6939 }
6940
6941 /**
6942  * Get rte_flow callbacks.
6943  *
6944  * @param dev
6945  *   Pointer to Ethernet device structure.
6946  * @param ops
6947  *   Pointer to operation-specific structure.
6948  *
6949  * @return 0
6950  */
6951 int
6952 mlx5_flow_ops_get(struct rte_eth_dev *dev __rte_unused,
6953                   const struct rte_flow_ops **ops)
6954 {
6955         *ops = &mlx5_flow_ops;
6956         return 0;
6957 }
6958
6959 /**
6960  * Validate meter policy actions.
6961  * Dispatcher for action type specific validation.
6962  *
6963  * @param[in] dev
6964  *   Pointer to the Ethernet device structure.
6965  * @param[in] action
6966  *   The meter policy action object to validate.
6967  * @param[in] attr
6968  *   Attributes of flow to determine steering domain.
6969  * @param[out] is_rss
6970  *   Is RSS or not.
6971  * @param[out] domain_bitmap
6972  *   Domain bitmap.
6973  * @param[out] is_def_policy
6974  *   Is default policy or not.
6975  * @param[out] error
6976  *   Perform verbose error reporting if not NULL. Initialized in case of
6977  *   error only.
6978  *
6979  * @return
6980  *   0 on success, otherwise negative errno value.
6981  */
6982 int
6983 mlx5_flow_validate_mtr_acts(struct rte_eth_dev *dev,
6984                         const struct rte_flow_action *actions[RTE_COLORS],
6985                         struct rte_flow_attr *attr,
6986                         bool *is_rss,
6987                         uint8_t *domain_bitmap,
6988                         bool *is_def_policy,
6989                         struct rte_mtr_error *error)
6990 {
6991         const struct mlx5_flow_driver_ops *fops;
6992
6993         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6994         return fops->validate_mtr_acts(dev, actions, attr,
6995                         is_rss, domain_bitmap, is_def_policy, error);
6996 }
6997
6998 /**
6999  * Destroy the meter table set.
7000  *
7001  * @param[in] dev
7002  *   Pointer to Ethernet device.
7003  * @param[in] mtr_policy
7004  *   Meter policy struct.
7005  */
7006 void
7007 mlx5_flow_destroy_mtr_acts(struct rte_eth_dev *dev,
7008                       struct mlx5_flow_meter_policy *mtr_policy)
7009 {
7010         const struct mlx5_flow_driver_ops *fops;
7011
7012         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7013         fops->destroy_mtr_acts(dev, mtr_policy);
7014 }
7015
7016 /**
7017  * Create policy action, lock free,
7018  * (mutex should be acquired by caller).
7019  * Dispatcher for action type specific call.
7020  *
7021  * @param[in] dev
7022  *   Pointer to the Ethernet device structure.
7023  * @param[in] mtr_policy
7024  *   Meter policy struct.
7025  * @param[in] action
7026  *   Action specification used to create meter actions.
7027  * @param[out] error
7028  *   Perform verbose error reporting if not NULL. Initialized in case of
7029  *   error only.
7030  *
7031  * @return
7032  *   0 on success, otherwise negative errno value.
7033  */
7034 int
7035 mlx5_flow_create_mtr_acts(struct rte_eth_dev *dev,
7036                       struct mlx5_flow_meter_policy *mtr_policy,
7037                       const struct rte_flow_action *actions[RTE_COLORS],
7038                       struct rte_mtr_error *error)
7039 {
7040         const struct mlx5_flow_driver_ops *fops;
7041
7042         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7043         return fops->create_mtr_acts(dev, mtr_policy, actions, error);
7044 }
7045
7046 /**
7047  * Create policy rules, lock free,
7048  * (mutex should be acquired by caller).
7049  * Dispatcher for action type specific call.
7050  *
7051  * @param[in] dev
7052  *   Pointer to the Ethernet device structure.
7053  * @param[in] mtr_policy
7054  *   Meter policy struct.
7055  *
7056  * @return
7057  *   0 on success, -1 otherwise.
7058  */
7059 int
7060 mlx5_flow_create_policy_rules(struct rte_eth_dev *dev,
7061                              struct mlx5_flow_meter_policy *mtr_policy)
7062 {
7063         const struct mlx5_flow_driver_ops *fops;
7064
7065         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7066         return fops->create_policy_rules(dev, mtr_policy);
7067 }
7068
7069 /**
7070  * Destroy policy rules, lock free,
7071  * (mutex should be acquired by caller).
7072  * Dispatcher for action type specific call.
7073  *
7074  * @param[in] dev
7075  *   Pointer to the Ethernet device structure.
7076  * @param[in] mtr_policy
7077  *   Meter policy struct.
7078  */
7079 void
7080 mlx5_flow_destroy_policy_rules(struct rte_eth_dev *dev,
7081                              struct mlx5_flow_meter_policy *mtr_policy)
7082 {
7083         const struct mlx5_flow_driver_ops *fops;
7084
7085         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7086         fops->destroy_policy_rules(dev, mtr_policy);
7087 }
7088
7089 /**
7090  * Destroy the default policy table set.
7091  *
7092  * @param[in] dev
7093  *   Pointer to Ethernet device.
7094  */
7095 void
7096 mlx5_flow_destroy_def_policy(struct rte_eth_dev *dev)
7097 {
7098         const struct mlx5_flow_driver_ops *fops;
7099
7100         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7101         fops->destroy_def_policy(dev);
7102 }
7103
7104 /**
7105  * Destroy the default policy table set.
7106  *
7107  * @param[in] dev
7108  *   Pointer to Ethernet device.
7109  *
7110  * @return
7111  *   0 on success, -1 otherwise.
7112  */
7113 int
7114 mlx5_flow_create_def_policy(struct rte_eth_dev *dev)
7115 {
7116         const struct mlx5_flow_driver_ops *fops;
7117
7118         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7119         return fops->create_def_policy(dev);
7120 }
7121
7122 /**
7123  * Create the needed meter and suffix tables.
7124  *
7125  * @param[in] dev
7126  *   Pointer to Ethernet device.
7127  *
7128  * @return
7129  *   0 on success, -1 otherwise.
7130  */
7131 int
7132 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
7133                         struct mlx5_flow_meter_info *fm,
7134                         uint32_t mtr_idx,
7135                         uint8_t domain_bitmap)
7136 {
7137         const struct mlx5_flow_driver_ops *fops;
7138
7139         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7140         return fops->create_mtr_tbls(dev, fm, mtr_idx, domain_bitmap);
7141 }
7142
7143 /**
7144  * Destroy the meter table set.
7145  *
7146  * @param[in] dev
7147  *   Pointer to Ethernet device.
7148  * @param[in] tbl
7149  *   Pointer to the meter table set.
7150  */
7151 void
7152 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
7153                            struct mlx5_flow_meter_info *fm)
7154 {
7155         const struct mlx5_flow_driver_ops *fops;
7156
7157         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7158         fops->destroy_mtr_tbls(dev, fm);
7159 }
7160
7161 /**
7162  * Destroy the global meter drop table.
7163  *
7164  * @param[in] dev
7165  *   Pointer to Ethernet device.
7166  */
7167 void
7168 mlx5_flow_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
7169 {
7170         const struct mlx5_flow_driver_ops *fops;
7171
7172         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7173         fops->destroy_mtr_drop_tbls(dev);
7174 }
7175
7176 /**
7177  * Allocate the needed aso flow meter id.
7178  *
7179  * @param[in] dev
7180  *   Pointer to Ethernet device.
7181  *
7182  * @return
7183  *   Index to aso flow meter on success, NULL otherwise.
7184  */
7185 uint32_t
7186 mlx5_flow_mtr_alloc(struct rte_eth_dev *dev)
7187 {
7188         const struct mlx5_flow_driver_ops *fops;
7189
7190         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7191         return fops->create_meter(dev);
7192 }
7193
7194 /**
7195  * Free the aso flow meter id.
7196  *
7197  * @param[in] dev
7198  *   Pointer to Ethernet device.
7199  * @param[in] mtr_idx
7200  *  Index to aso flow meter to be free.
7201  *
7202  * @return
7203  *   0 on success.
7204  */
7205 void
7206 mlx5_flow_mtr_free(struct rte_eth_dev *dev, uint32_t mtr_idx)
7207 {
7208         const struct mlx5_flow_driver_ops *fops;
7209
7210         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7211         fops->free_meter(dev, mtr_idx);
7212 }
7213
7214 /**
7215  * Allocate a counter.
7216  *
7217  * @param[in] dev
7218  *   Pointer to Ethernet device structure.
7219  *
7220  * @return
7221  *   Index to allocated counter  on success, 0 otherwise.
7222  */
7223 uint32_t
7224 mlx5_counter_alloc(struct rte_eth_dev *dev)
7225 {
7226         const struct mlx5_flow_driver_ops *fops;
7227         struct rte_flow_attr attr = { .transfer = 0 };
7228
7229         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7230                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7231                 return fops->counter_alloc(dev);
7232         }
7233         DRV_LOG(ERR,
7234                 "port %u counter allocate is not supported.",
7235                  dev->data->port_id);
7236         return 0;
7237 }
7238
7239 /**
7240  * Free a counter.
7241  *
7242  * @param[in] dev
7243  *   Pointer to Ethernet device structure.
7244  * @param[in] cnt
7245  *   Index to counter to be free.
7246  */
7247 void
7248 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
7249 {
7250         const struct mlx5_flow_driver_ops *fops;
7251         struct rte_flow_attr attr = { .transfer = 0 };
7252
7253         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7254                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7255                 fops->counter_free(dev, cnt);
7256                 return;
7257         }
7258         DRV_LOG(ERR,
7259                 "port %u counter free is not supported.",
7260                  dev->data->port_id);
7261 }
7262
7263 /**
7264  * Query counter statistics.
7265  *
7266  * @param[in] dev
7267  *   Pointer to Ethernet device structure.
7268  * @param[in] cnt
7269  *   Index to counter to query.
7270  * @param[in] clear
7271  *   Set to clear counter statistics.
7272  * @param[out] pkts
7273  *   The counter hits packets number to save.
7274  * @param[out] bytes
7275  *   The counter hits bytes number to save.
7276  *
7277  * @return
7278  *   0 on success, a negative errno value otherwise.
7279  */
7280 int
7281 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
7282                    bool clear, uint64_t *pkts, uint64_t *bytes)
7283 {
7284         const struct mlx5_flow_driver_ops *fops;
7285         struct rte_flow_attr attr = { .transfer = 0 };
7286
7287         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7288                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7289                 return fops->counter_query(dev, cnt, clear, pkts, bytes);
7290         }
7291         DRV_LOG(ERR,
7292                 "port %u counter query is not supported.",
7293                  dev->data->port_id);
7294         return -ENOTSUP;
7295 }
7296
7297 /**
7298  * Allocate a new memory for the counter values wrapped by all the needed
7299  * management.
7300  *
7301  * @param[in] sh
7302  *   Pointer to mlx5_dev_ctx_shared object.
7303  *
7304  * @return
7305  *   0 on success, a negative errno value otherwise.
7306  */
7307 static int
7308 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh)
7309 {
7310         struct mlx5_devx_mkey_attr mkey_attr;
7311         struct mlx5_counter_stats_mem_mng *mem_mng;
7312         volatile struct flow_counter_stats *raw_data;
7313         int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES;
7314         int size = (sizeof(struct flow_counter_stats) *
7315                         MLX5_COUNTERS_PER_POOL +
7316                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
7317                         sizeof(struct mlx5_counter_stats_mem_mng);
7318         size_t pgsize = rte_mem_page_size();
7319         uint8_t *mem;
7320         int i;
7321
7322         if (pgsize == (size_t)-1) {
7323                 DRV_LOG(ERR, "Failed to get mem page size");
7324                 rte_errno = ENOMEM;
7325                 return -ENOMEM;
7326         }
7327         mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY);
7328         if (!mem) {
7329                 rte_errno = ENOMEM;
7330                 return -ENOMEM;
7331         }
7332         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
7333         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
7334         mem_mng->umem = mlx5_os_umem_reg(sh->ctx, mem, size,
7335                                                  IBV_ACCESS_LOCAL_WRITE);
7336         if (!mem_mng->umem) {
7337                 rte_errno = errno;
7338                 mlx5_free(mem);
7339                 return -rte_errno;
7340         }
7341         mkey_attr.addr = (uintptr_t)mem;
7342         mkey_attr.size = size;
7343         mkey_attr.umem_id = mlx5_os_get_umem_id(mem_mng->umem);
7344         mkey_attr.pd = sh->pdn;
7345         mkey_attr.log_entity_size = 0;
7346         mkey_attr.pg_access = 0;
7347         mkey_attr.klm_array = NULL;
7348         mkey_attr.klm_num = 0;
7349         mkey_attr.relaxed_ordering_write = sh->cmng.relaxed_ordering_write;
7350         mkey_attr.relaxed_ordering_read = sh->cmng.relaxed_ordering_read;
7351         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
7352         if (!mem_mng->dm) {
7353                 mlx5_os_umem_dereg(mem_mng->umem);
7354                 rte_errno = errno;
7355                 mlx5_free(mem);
7356                 return -rte_errno;
7357         }
7358         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
7359         raw_data = (volatile struct flow_counter_stats *)mem;
7360         for (i = 0; i < raws_n; ++i) {
7361                 mem_mng->raws[i].mem_mng = mem_mng;
7362                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
7363         }
7364         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
7365                 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws,
7366                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i,
7367                                  next);
7368         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
7369         sh->cmng.mem_mng = mem_mng;
7370         return 0;
7371 }
7372
7373 /**
7374  * Set the statistic memory to the new counter pool.
7375  *
7376  * @param[in] sh
7377  *   Pointer to mlx5_dev_ctx_shared object.
7378  * @param[in] pool
7379  *   Pointer to the pool to set the statistic memory.
7380  *
7381  * @return
7382  *   0 on success, a negative errno value otherwise.
7383  */
7384 static int
7385 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh,
7386                                struct mlx5_flow_counter_pool *pool)
7387 {
7388         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7389         /* Resize statistic memory once used out. */
7390         if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) &&
7391             mlx5_flow_create_counter_stat_mem_mng(sh)) {
7392                 DRV_LOG(ERR, "Cannot resize counter stat mem.");
7393                 return -1;
7394         }
7395         rte_spinlock_lock(&pool->sl);
7396         pool->raw = cmng->mem_mng->raws + pool->index %
7397                     MLX5_CNT_CONTAINER_RESIZE;
7398         rte_spinlock_unlock(&pool->sl);
7399         pool->raw_hw = NULL;
7400         return 0;
7401 }
7402
7403 #define MLX5_POOL_QUERY_FREQ_US 1000000
7404
7405 /**
7406  * Set the periodic procedure for triggering asynchronous batch queries for all
7407  * the counter pools.
7408  *
7409  * @param[in] sh
7410  *   Pointer to mlx5_dev_ctx_shared object.
7411  */
7412 void
7413 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh)
7414 {
7415         uint32_t pools_n, us;
7416
7417         pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED);
7418         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
7419         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
7420         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
7421                 sh->cmng.query_thread_on = 0;
7422                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
7423         } else {
7424                 sh->cmng.query_thread_on = 1;
7425         }
7426 }
7427
7428 /**
7429  * The periodic procedure for triggering asynchronous batch queries for all the
7430  * counter pools. This function is probably called by the host thread.
7431  *
7432  * @param[in] arg
7433  *   The parameter for the alarm process.
7434  */
7435 void
7436 mlx5_flow_query_alarm(void *arg)
7437 {
7438         struct mlx5_dev_ctx_shared *sh = arg;
7439         int ret;
7440         uint16_t pool_index = sh->cmng.pool_index;
7441         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7442         struct mlx5_flow_counter_pool *pool;
7443         uint16_t n_valid;
7444
7445         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
7446                 goto set_alarm;
7447         rte_spinlock_lock(&cmng->pool_update_sl);
7448         pool = cmng->pools[pool_index];
7449         n_valid = cmng->n_valid;
7450         rte_spinlock_unlock(&cmng->pool_update_sl);
7451         /* Set the statistic memory to the new created pool. */
7452         if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool)))
7453                 goto set_alarm;
7454         if (pool->raw_hw)
7455                 /* There is a pool query in progress. */
7456                 goto set_alarm;
7457         pool->raw_hw =
7458                 LIST_FIRST(&sh->cmng.free_stat_raws);
7459         if (!pool->raw_hw)
7460                 /* No free counter statistics raw memory. */
7461                 goto set_alarm;
7462         /*
7463          * Identify the counters released between query trigger and query
7464          * handle more efficiently. The counter released in this gap period
7465          * should wait for a new round of query as the new arrived packets
7466          * will not be taken into account.
7467          */
7468         pool->query_gen++;
7469         ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0,
7470                                                MLX5_COUNTERS_PER_POOL,
7471                                                NULL, NULL,
7472                                                pool->raw_hw->mem_mng->dm->id,
7473                                                (void *)(uintptr_t)
7474                                                pool->raw_hw->data,
7475                                                sh->devx_comp,
7476                                                (uint64_t)(uintptr_t)pool);
7477         if (ret) {
7478                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
7479                         " %d", pool->min_dcs->id);
7480                 pool->raw_hw = NULL;
7481                 goto set_alarm;
7482         }
7483         LIST_REMOVE(pool->raw_hw, next);
7484         sh->cmng.pending_queries++;
7485         pool_index++;
7486         if (pool_index >= n_valid)
7487                 pool_index = 0;
7488 set_alarm:
7489         sh->cmng.pool_index = pool_index;
7490         mlx5_set_query_alarm(sh);
7491 }
7492
7493 /**
7494  * Check and callback event for new aged flow in the counter pool
7495  *
7496  * @param[in] sh
7497  *   Pointer to mlx5_dev_ctx_shared object.
7498  * @param[in] pool
7499  *   Pointer to Current counter pool.
7500  */
7501 static void
7502 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh,
7503                    struct mlx5_flow_counter_pool *pool)
7504 {
7505         struct mlx5_priv *priv;
7506         struct mlx5_flow_counter *cnt;
7507         struct mlx5_age_info *age_info;
7508         struct mlx5_age_param *age_param;
7509         struct mlx5_counter_stats_raw *cur = pool->raw_hw;
7510         struct mlx5_counter_stats_raw *prev = pool->raw;
7511         const uint64_t curr_time = MLX5_CURR_TIME_SEC;
7512         const uint32_t time_delta = curr_time - pool->time_of_last_age_check;
7513         uint16_t expected = AGE_CANDIDATE;
7514         uint32_t i;
7515
7516         pool->time_of_last_age_check = curr_time;
7517         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
7518                 cnt = MLX5_POOL_GET_CNT(pool, i);
7519                 age_param = MLX5_CNT_TO_AGE(cnt);
7520                 if (__atomic_load_n(&age_param->state,
7521                                     __ATOMIC_RELAXED) != AGE_CANDIDATE)
7522                         continue;
7523                 if (cur->data[i].hits != prev->data[i].hits) {
7524                         __atomic_store_n(&age_param->sec_since_last_hit, 0,
7525                                          __ATOMIC_RELAXED);
7526                         continue;
7527                 }
7528                 if (__atomic_add_fetch(&age_param->sec_since_last_hit,
7529                                        time_delta,
7530                                        __ATOMIC_RELAXED) <= age_param->timeout)
7531                         continue;
7532                 /**
7533                  * Hold the lock first, or if between the
7534                  * state AGE_TMOUT and tailq operation the
7535                  * release happened, the release procedure
7536                  * may delete a non-existent tailq node.
7537                  */
7538                 priv = rte_eth_devices[age_param->port_id].data->dev_private;
7539                 age_info = GET_PORT_AGE_INFO(priv);
7540                 rte_spinlock_lock(&age_info->aged_sl);
7541                 if (__atomic_compare_exchange_n(&age_param->state, &expected,
7542                                                 AGE_TMOUT, false,
7543                                                 __ATOMIC_RELAXED,
7544                                                 __ATOMIC_RELAXED)) {
7545                         TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next);
7546                         MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW);
7547                 }
7548                 rte_spinlock_unlock(&age_info->aged_sl);
7549         }
7550         mlx5_age_event_prepare(sh);
7551 }
7552
7553 /**
7554  * Handler for the HW respond about ready values from an asynchronous batch
7555  * query. This function is probably called by the host thread.
7556  *
7557  * @param[in] sh
7558  *   The pointer to the shared device context.
7559  * @param[in] async_id
7560  *   The Devx async ID.
7561  * @param[in] status
7562  *   The status of the completion.
7563  */
7564 void
7565 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
7566                                   uint64_t async_id, int status)
7567 {
7568         struct mlx5_flow_counter_pool *pool =
7569                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
7570         struct mlx5_counter_stats_raw *raw_to_free;
7571         uint8_t query_gen = pool->query_gen ^ 1;
7572         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7573         enum mlx5_counter_type cnt_type =
7574                 pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
7575                                 MLX5_COUNTER_TYPE_ORIGIN;
7576
7577         if (unlikely(status)) {
7578                 raw_to_free = pool->raw_hw;
7579         } else {
7580                 raw_to_free = pool->raw;
7581                 if (pool->is_aged)
7582                         mlx5_flow_aging_check(sh, pool);
7583                 rte_spinlock_lock(&pool->sl);
7584                 pool->raw = pool->raw_hw;
7585                 rte_spinlock_unlock(&pool->sl);
7586                 /* Be sure the new raw counters data is updated in memory. */
7587                 rte_io_wmb();
7588                 if (!TAILQ_EMPTY(&pool->counters[query_gen])) {
7589                         rte_spinlock_lock(&cmng->csl[cnt_type]);
7590                         TAILQ_CONCAT(&cmng->counters[cnt_type],
7591                                      &pool->counters[query_gen], next);
7592                         rte_spinlock_unlock(&cmng->csl[cnt_type]);
7593                 }
7594         }
7595         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
7596         pool->raw_hw = NULL;
7597         sh->cmng.pending_queries--;
7598 }
7599
7600 static int
7601 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table,
7602                     const struct flow_grp_info *grp_info,
7603                     struct rte_flow_error *error)
7604 {
7605         if (grp_info->transfer && grp_info->external &&
7606             grp_info->fdb_def_rule) {
7607                 if (group == UINT32_MAX)
7608                         return rte_flow_error_set
7609                                                 (error, EINVAL,
7610                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
7611                                                  NULL,
7612                                                  "group index not supported");
7613                 *table = group + 1;
7614         } else {
7615                 *table = group;
7616         }
7617         DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table);
7618         return 0;
7619 }
7620
7621 /**
7622  * Translate the rte_flow group index to HW table value.
7623  *
7624  * If tunnel offload is disabled, all group ids converted to flow table
7625  * id using the standard method.
7626  * If tunnel offload is enabled, group id can be converted using the
7627  * standard or tunnel conversion method. Group conversion method
7628  * selection depends on flags in `grp_info` parameter:
7629  * - Internal (grp_info.external == 0) groups conversion uses the
7630  *   standard method.
7631  * - Group ids in JUMP action converted with the tunnel conversion.
7632  * - Group id in rule attribute conversion depends on a rule type and
7633  *   group id value:
7634  *   ** non zero group attributes converted with the tunnel method
7635  *   ** zero group attribute in non-tunnel rule is converted using the
7636  *      standard method - there's only one root table
7637  *   ** zero group attribute in steer tunnel rule is converted with the
7638  *      standard method - single root table
7639  *   ** zero group attribute in match tunnel rule is a special OvS
7640  *      case: that value is used for portability reasons. That group
7641  *      id is converted with the tunnel conversion method.
7642  *
7643  * @param[in] dev
7644  *   Port device
7645  * @param[in] tunnel
7646  *   PMD tunnel offload object
7647  * @param[in] group
7648  *   rte_flow group index value.
7649  * @param[out] table
7650  *   HW table value.
7651  * @param[in] grp_info
7652  *   flags used for conversion
7653  * @param[out] error
7654  *   Pointer to error structure.
7655  *
7656  * @return
7657  *   0 on success, a negative errno value otherwise and rte_errno is set.
7658  */
7659 int
7660 mlx5_flow_group_to_table(struct rte_eth_dev *dev,
7661                          const struct mlx5_flow_tunnel *tunnel,
7662                          uint32_t group, uint32_t *table,
7663                          const struct flow_grp_info *grp_info,
7664                          struct rte_flow_error *error)
7665 {
7666         int ret;
7667         bool standard_translation;
7668
7669         if (!grp_info->skip_scale && grp_info->external &&
7670             group < MLX5_MAX_TABLES_EXTERNAL)
7671                 group *= MLX5_FLOW_TABLE_FACTOR;
7672         if (is_tunnel_offload_active(dev)) {
7673                 standard_translation = !grp_info->external ||
7674                                         grp_info->std_tbl_fix;
7675         } else {
7676                 standard_translation = true;
7677         }
7678         DRV_LOG(DEBUG,
7679                 "port %u group=%u transfer=%d external=%d fdb_def_rule=%d translate=%s",
7680                 dev->data->port_id, group, grp_info->transfer,
7681                 grp_info->external, grp_info->fdb_def_rule,
7682                 standard_translation ? "STANDARD" : "TUNNEL");
7683         if (standard_translation)
7684                 ret = flow_group_to_table(dev->data->port_id, group, table,
7685                                           grp_info, error);
7686         else
7687                 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group,
7688                                                       table, error);
7689
7690         return ret;
7691 }
7692
7693 /**
7694  * Discover availability of metadata reg_c's.
7695  *
7696  * Iteratively use test flows to check availability.
7697  *
7698  * @param[in] dev
7699  *   Pointer to the Ethernet device structure.
7700  *
7701  * @return
7702  *   0 on success, a negative errno value otherwise and rte_errno is set.
7703  */
7704 int
7705 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
7706 {
7707         struct mlx5_priv *priv = dev->data->dev_private;
7708         struct mlx5_dev_config *config = &priv->config;
7709         enum modify_reg idx;
7710         int n = 0;
7711
7712         /* reg_c[0] and reg_c[1] are reserved. */
7713         config->flow_mreg_c[n++] = REG_C_0;
7714         config->flow_mreg_c[n++] = REG_C_1;
7715         /* Discover availability of other reg_c's. */
7716         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
7717                 struct rte_flow_attr attr = {
7718                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
7719                         .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
7720                         .ingress = 1,
7721                 };
7722                 struct rte_flow_item items[] = {
7723                         [0] = {
7724                                 .type = RTE_FLOW_ITEM_TYPE_END,
7725                         },
7726                 };
7727                 struct rte_flow_action actions[] = {
7728                         [0] = {
7729                                 .type = (enum rte_flow_action_type)
7730                                         MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
7731                                 .conf = &(struct mlx5_flow_action_copy_mreg){
7732                                         .src = REG_C_1,
7733                                         .dst = idx,
7734                                 },
7735                         },
7736                         [1] = {
7737                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
7738                                 .conf = &(struct rte_flow_action_jump){
7739                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
7740                                 },
7741                         },
7742                         [2] = {
7743                                 .type = RTE_FLOW_ACTION_TYPE_END,
7744                         },
7745                 };
7746                 uint32_t flow_idx;
7747                 struct rte_flow *flow;
7748                 struct rte_flow_error error;
7749
7750                 if (!config->dv_flow_en)
7751                         break;
7752                 /* Create internal flow, validation skips copy action. */
7753                 flow_idx = flow_list_create(dev, NULL, &attr, items,
7754                                             actions, false, &error);
7755                 flow = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW],
7756                                       flow_idx);
7757                 if (!flow)
7758                         continue;
7759                 config->flow_mreg_c[n++] = idx;
7760                 flow_list_destroy(dev, NULL, flow_idx);
7761         }
7762         for (; n < MLX5_MREG_C_NUM; ++n)
7763                 config->flow_mreg_c[n] = REG_NON;
7764         return 0;
7765 }
7766
7767 /**
7768  * Dump flow raw hw data to file
7769  *
7770  * @param[in] dev
7771  *    The pointer to Ethernet device.
7772  * @param[in] file
7773  *   A pointer to a file for output.
7774  * @param[out] error
7775  *   Perform verbose error reporting if not NULL. PMDs initialize this
7776  *   structure in case of error only.
7777  * @return
7778  *   0 on success, a nagative value otherwise.
7779  */
7780 int
7781 mlx5_flow_dev_dump(struct rte_eth_dev *dev, struct rte_flow *flow_idx,
7782                    FILE *file,
7783                    struct rte_flow_error *error __rte_unused)
7784 {
7785         struct mlx5_priv *priv = dev->data->dev_private;
7786         struct mlx5_dev_ctx_shared *sh = priv->sh;
7787         uint32_t handle_idx;
7788         int ret;
7789         struct mlx5_flow_handle *dh;
7790         struct rte_flow *flow;
7791
7792         if (!priv->config.dv_flow_en) {
7793                 if (fputs("device dv flow disabled\n", file) <= 0)
7794                         return -errno;
7795                 return -ENOTSUP;
7796         }
7797
7798         /* dump all */
7799         if (!flow_idx)
7800                 return mlx5_devx_cmd_flow_dump(sh->fdb_domain,
7801                                         sh->rx_domain,
7802                                         sh->tx_domain, file);
7803         /* dump one */
7804         flow = mlx5_ipool_get(priv->sh->ipool
7805                         [MLX5_IPOOL_RTE_FLOW], (uintptr_t)(void *)flow_idx);
7806         if (!flow)
7807                 return -ENOENT;
7808
7809         handle_idx = flow->dev_handles;
7810         while (handle_idx) {
7811                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
7812                                 handle_idx);
7813                 if (!dh)
7814                         return -ENOENT;
7815                 if (dh->drv_flow) {
7816                         ret = mlx5_devx_cmd_flow_single_dump(dh->drv_flow,
7817                                         file);
7818                         if (ret)
7819                                 return -ENOENT;
7820                 }
7821                 handle_idx = dh->next.next;
7822         }
7823         return 0;
7824 }
7825
7826 /**
7827  * Get aged-out flows.
7828  *
7829  * @param[in] dev
7830  *   Pointer to the Ethernet device structure.
7831  * @param[in] context
7832  *   The address of an array of pointers to the aged-out flows contexts.
7833  * @param[in] nb_countexts
7834  *   The length of context array pointers.
7835  * @param[out] error
7836  *   Perform verbose error reporting if not NULL. Initialized in case of
7837  *   error only.
7838  *
7839  * @return
7840  *   how many contexts get in success, otherwise negative errno value.
7841  *   if nb_contexts is 0, return the amount of all aged contexts.
7842  *   if nb_contexts is not 0 , return the amount of aged flows reported
7843  *   in the context array.
7844  */
7845 int
7846 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
7847                         uint32_t nb_contexts, struct rte_flow_error *error)
7848 {
7849         const struct mlx5_flow_driver_ops *fops;
7850         struct rte_flow_attr attr = { .transfer = 0 };
7851
7852         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7853                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7854                 return fops->get_aged_flows(dev, contexts, nb_contexts,
7855                                                     error);
7856         }
7857         DRV_LOG(ERR,
7858                 "port %u get aged flows is not supported.",
7859                  dev->data->port_id);
7860         return -ENOTSUP;
7861 }
7862
7863 /* Wrapper for driver action_validate op callback */
7864 static int
7865 flow_drv_action_validate(struct rte_eth_dev *dev,
7866                          const struct rte_flow_indir_action_conf *conf,
7867                          const struct rte_flow_action *action,
7868                          const struct mlx5_flow_driver_ops *fops,
7869                          struct rte_flow_error *error)
7870 {
7871         static const char err_msg[] = "indirect action validation unsupported";
7872
7873         if (!fops->action_validate) {
7874                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7875                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7876                                    NULL, err_msg);
7877                 return -rte_errno;
7878         }
7879         return fops->action_validate(dev, conf, action, error);
7880 }
7881
7882 /**
7883  * Destroys the shared action by handle.
7884  *
7885  * @param dev
7886  *   Pointer to Ethernet device structure.
7887  * @param[in] handle
7888  *   Handle for the indirect action object to be destroyed.
7889  * @param[out] error
7890  *   Perform verbose error reporting if not NULL. PMDs initialize this
7891  *   structure in case of error only.
7892  *
7893  * @return
7894  *   0 on success, a negative errno value otherwise and rte_errno is set.
7895  *
7896  * @note: wrapper for driver action_create op callback.
7897  */
7898 static int
7899 mlx5_action_handle_destroy(struct rte_eth_dev *dev,
7900                            struct rte_flow_action_handle *handle,
7901                            struct rte_flow_error *error)
7902 {
7903         static const char err_msg[] = "indirect action destruction unsupported";
7904         struct rte_flow_attr attr = { .transfer = 0 };
7905         const struct mlx5_flow_driver_ops *fops =
7906                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7907
7908         if (!fops->action_destroy) {
7909                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7910                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7911                                    NULL, err_msg);
7912                 return -rte_errno;
7913         }
7914         return fops->action_destroy(dev, handle, error);
7915 }
7916
7917 /* Wrapper for driver action_destroy op callback */
7918 static int
7919 flow_drv_action_update(struct rte_eth_dev *dev,
7920                        struct rte_flow_action_handle *handle,
7921                        const void *update,
7922                        const struct mlx5_flow_driver_ops *fops,
7923                        struct rte_flow_error *error)
7924 {
7925         static const char err_msg[] = "indirect action update unsupported";
7926
7927         if (!fops->action_update) {
7928                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7929                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7930                                    NULL, err_msg);
7931                 return -rte_errno;
7932         }
7933         return fops->action_update(dev, handle, update, error);
7934 }
7935
7936 /* Wrapper for driver action_destroy op callback */
7937 static int
7938 flow_drv_action_query(struct rte_eth_dev *dev,
7939                       const struct rte_flow_action_handle *handle,
7940                       void *data,
7941                       const struct mlx5_flow_driver_ops *fops,
7942                       struct rte_flow_error *error)
7943 {
7944         static const char err_msg[] = "indirect action query unsupported";
7945
7946         if (!fops->action_query) {
7947                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7948                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7949                                    NULL, err_msg);
7950                 return -rte_errno;
7951         }
7952         return fops->action_query(dev, handle, data, error);
7953 }
7954
7955 /**
7956  * Create indirect action for reuse in multiple flow rules.
7957  *
7958  * @param dev
7959  *   Pointer to Ethernet device structure.
7960  * @param conf
7961  *   Pointer to indirect action object configuration.
7962  * @param[in] action
7963  *   Action configuration for indirect action object creation.
7964  * @param[out] error
7965  *   Perform verbose error reporting if not NULL. PMDs initialize this
7966  *   structure in case of error only.
7967  * @return
7968  *   A valid handle in case of success, NULL otherwise and rte_errno is set.
7969  */
7970 static struct rte_flow_action_handle *
7971 mlx5_action_handle_create(struct rte_eth_dev *dev,
7972                           const struct rte_flow_indir_action_conf *conf,
7973                           const struct rte_flow_action *action,
7974                           struct rte_flow_error *error)
7975 {
7976         static const char err_msg[] = "indirect action creation unsupported";
7977         struct rte_flow_attr attr = { .transfer = 0 };
7978         const struct mlx5_flow_driver_ops *fops =
7979                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7980
7981         if (flow_drv_action_validate(dev, conf, action, fops, error))
7982                 return NULL;
7983         if (!fops->action_create) {
7984                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7985                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7986                                    NULL, err_msg);
7987                 return NULL;
7988         }
7989         return fops->action_create(dev, conf, action, error);
7990 }
7991
7992 /**
7993  * Updates inplace the indirect action configuration pointed by *handle*
7994  * with the configuration provided as *update* argument.
7995  * The update of the indirect action configuration effects all flow rules
7996  * reusing the action via handle.
7997  *
7998  * @param dev
7999  *   Pointer to Ethernet device structure.
8000  * @param[in] handle
8001  *   Handle for the indirect action to be updated.
8002  * @param[in] update
8003  *   Action specification used to modify the action pointed by handle.
8004  *   *update* could be of same type with the action pointed by the *handle*
8005  *   handle argument, or some other structures like a wrapper, depending on
8006  *   the indirect action type.
8007  * @param[out] error
8008  *   Perform verbose error reporting if not NULL. PMDs initialize this
8009  *   structure in case of error only.
8010  *
8011  * @return
8012  *   0 on success, a negative errno value otherwise and rte_errno is set.
8013  */
8014 static int
8015 mlx5_action_handle_update(struct rte_eth_dev *dev,
8016                 struct rte_flow_action_handle *handle,
8017                 const void *update,
8018                 struct rte_flow_error *error)
8019 {
8020         struct rte_flow_attr attr = { .transfer = 0 };
8021         const struct mlx5_flow_driver_ops *fops =
8022                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8023         int ret;
8024
8025         ret = flow_drv_action_validate(dev, NULL,
8026                         (const struct rte_flow_action *)update, fops, error);
8027         if (ret)
8028                 return ret;
8029         return flow_drv_action_update(dev, handle, update, fops,
8030                                       error);
8031 }
8032
8033 /**
8034  * Query the indirect action by handle.
8035  *
8036  * This function allows retrieving action-specific data such as counters.
8037  * Data is gathered by special action which may be present/referenced in
8038  * more than one flow rule definition.
8039  *
8040  * see @RTE_FLOW_ACTION_TYPE_COUNT
8041  *
8042  * @param dev
8043  *   Pointer to Ethernet device structure.
8044  * @param[in] handle
8045  *   Handle for the indirect action to query.
8046  * @param[in, out] data
8047  *   Pointer to storage for the associated query data type.
8048  * @param[out] error
8049  *   Perform verbose error reporting if not NULL. PMDs initialize this
8050  *   structure in case of error only.
8051  *
8052  * @return
8053  *   0 on success, a negative errno value otherwise and rte_errno is set.
8054  */
8055 static int
8056 mlx5_action_handle_query(struct rte_eth_dev *dev,
8057                          const struct rte_flow_action_handle *handle,
8058                          void *data,
8059                          struct rte_flow_error *error)
8060 {
8061         struct rte_flow_attr attr = { .transfer = 0 };
8062         const struct mlx5_flow_driver_ops *fops =
8063                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8064
8065         return flow_drv_action_query(dev, handle, data, fops, error);
8066 }
8067
8068 /**
8069  * Destroy all indirect actions (shared RSS).
8070  *
8071  * @param dev
8072  *   Pointer to Ethernet device.
8073  *
8074  * @return
8075  *   0 on success, a negative errno value otherwise and rte_errno is set.
8076  */
8077 int
8078 mlx5_action_handle_flush(struct rte_eth_dev *dev)
8079 {
8080         struct rte_flow_error error;
8081         struct mlx5_priv *priv = dev->data->dev_private;
8082         struct mlx5_shared_action_rss *shared_rss;
8083         int ret = 0;
8084         uint32_t idx;
8085
8086         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
8087                       priv->rss_shared_actions, idx, shared_rss, next) {
8088                 ret |= mlx5_action_handle_destroy(dev,
8089                        (struct rte_flow_action_handle *)(uintptr_t)idx, &error);
8090         }
8091         return ret;
8092 }
8093
8094 #ifndef HAVE_MLX5DV_DR
8095 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1))
8096 #else
8097 #define MLX5_DOMAIN_SYNC_FLOW \
8098         (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW)
8099 #endif
8100
8101 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
8102 {
8103         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
8104         const struct mlx5_flow_driver_ops *fops;
8105         int ret;
8106         struct rte_flow_attr attr = { .transfer = 0 };
8107
8108         fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8109         ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW);
8110         if (ret > 0)
8111                 ret = -ret;
8112         return ret;
8113 }
8114
8115 /**
8116  * tunnel offload functionalilty is defined for DV environment only
8117  */
8118 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8119 __extension__
8120 union tunnel_offload_mark {
8121         uint32_t val;
8122         struct {
8123                 uint32_t app_reserve:8;
8124                 uint32_t table_id:15;
8125                 uint32_t transfer:1;
8126                 uint32_t _unused_:8;
8127         };
8128 };
8129
8130 static bool
8131 mlx5_access_tunnel_offload_db
8132         (struct rte_eth_dev *dev,
8133          bool (*match)(struct rte_eth_dev *,
8134                        struct mlx5_flow_tunnel *, const void *),
8135          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
8136          void (*miss)(struct rte_eth_dev *, void *),
8137          void *ctx, bool lock_op);
8138
8139 static int
8140 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
8141                              struct rte_flow *flow,
8142                              const struct rte_flow_attr *attr,
8143                              const struct rte_flow_action *app_actions,
8144                              uint32_t flow_idx,
8145                              struct tunnel_default_miss_ctx *ctx,
8146                              struct rte_flow_error *error)
8147 {
8148         struct mlx5_priv *priv = dev->data->dev_private;
8149         struct mlx5_flow *dev_flow;
8150         struct rte_flow_attr miss_attr = *attr;
8151         const struct mlx5_flow_tunnel *tunnel = app_actions[0].conf;
8152         const struct rte_flow_item miss_items[2] = {
8153                 {
8154                         .type = RTE_FLOW_ITEM_TYPE_ETH,
8155                         .spec = NULL,
8156                         .last = NULL,
8157                         .mask = NULL
8158                 },
8159                 {
8160                         .type = RTE_FLOW_ITEM_TYPE_END,
8161                         .spec = NULL,
8162                         .last = NULL,
8163                         .mask = NULL
8164                 }
8165         };
8166         union tunnel_offload_mark mark_id;
8167         struct rte_flow_action_mark miss_mark;
8168         struct rte_flow_action miss_actions[3] = {
8169                 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark },
8170                 [2] = { .type = RTE_FLOW_ACTION_TYPE_END,  .conf = NULL }
8171         };
8172         const struct rte_flow_action_jump *jump_data;
8173         uint32_t i, flow_table = 0; /* prevent compilation warning */
8174         struct flow_grp_info grp_info = {
8175                 .external = 1,
8176                 .transfer = attr->transfer,
8177                 .fdb_def_rule = !!priv->fdb_def_rule,
8178                 .std_tbl_fix = 0,
8179         };
8180         int ret;
8181
8182         if (!attr->transfer) {
8183                 uint32_t q_size;
8184
8185                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS;
8186                 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]);
8187                 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size,
8188                                          0, SOCKET_ID_ANY);
8189                 if (!ctx->queue)
8190                         return rte_flow_error_set
8191                                 (error, ENOMEM,
8192                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
8193                                 NULL, "invalid default miss RSS");
8194                 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT,
8195                 ctx->action_rss.level = 0,
8196                 ctx->action_rss.types = priv->rss_conf.rss_hf,
8197                 ctx->action_rss.key_len = priv->rss_conf.rss_key_len,
8198                 ctx->action_rss.queue_num = priv->reta_idx_n,
8199                 ctx->action_rss.key = priv->rss_conf.rss_key,
8200                 ctx->action_rss.queue = ctx->queue;
8201                 if (!priv->reta_idx_n || !priv->rxqs_n)
8202                         return rte_flow_error_set
8203                                 (error, EINVAL,
8204                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
8205                                 NULL, "invalid port configuration");
8206                 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
8207                         ctx->action_rss.types = 0;
8208                 for (i = 0; i != priv->reta_idx_n; ++i)
8209                         ctx->queue[i] = (*priv->reta_idx)[i];
8210         } else {
8211                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP;
8212                 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP;
8213         }
8214         miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw;
8215         for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++);
8216         jump_data = app_actions->conf;
8217         miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY;
8218         miss_attr.group = jump_data->group;
8219         ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group,
8220                                        &flow_table, &grp_info, error);
8221         if (ret)
8222                 return rte_flow_error_set(error, EINVAL,
8223                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
8224                                           NULL, "invalid tunnel id");
8225         mark_id.app_reserve = 0;
8226         mark_id.table_id = tunnel_flow_tbl_to_id(flow_table);
8227         mark_id.transfer = !!attr->transfer;
8228         mark_id._unused_ = 0;
8229         miss_mark.id = mark_id.val;
8230         dev_flow = flow_drv_prepare(dev, flow, &miss_attr,
8231                                     miss_items, miss_actions, flow_idx, error);
8232         if (!dev_flow)
8233                 return -rte_errno;
8234         dev_flow->flow = flow;
8235         dev_flow->external = true;
8236         dev_flow->tunnel = tunnel;
8237         /* Subflow object was created, we must include one in the list. */
8238         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
8239                       dev_flow->handle, next);
8240         DRV_LOG(DEBUG,
8241                 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u",
8242                 dev->data->port_id, tunnel->app_tunnel.type,
8243                 tunnel->tunnel_id, miss_attr.priority, miss_attr.group);
8244         ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items,
8245                                   miss_actions, error);
8246         if (!ret)
8247                 ret = flow_mreg_update_copy_table(dev, flow, miss_actions,
8248                                                   error);
8249
8250         return ret;
8251 }
8252
8253 static const struct mlx5_flow_tbl_data_entry  *
8254 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark)
8255 {
8256         struct mlx5_priv *priv = dev->data->dev_private;
8257         struct mlx5_dev_ctx_shared *sh = priv->sh;
8258         struct mlx5_hlist_entry *he;
8259         union tunnel_offload_mark mbits = { .val = mark };
8260         union mlx5_flow_tbl_key table_key = {
8261                 {
8262                         .level = tunnel_id_to_flow_tbl(mbits.table_id),
8263                         .id = 0,
8264                         .reserved = 0,
8265                         .dummy = 0,
8266                         .is_fdb = !!mbits.transfer,
8267                         .is_egress = 0,
8268                 }
8269         };
8270         he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, NULL);
8271         return he ?
8272                container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL;
8273 }
8274
8275 static void
8276 mlx5_flow_tunnel_grp2tbl_remove_cb(struct mlx5_hlist *list,
8277                                    struct mlx5_hlist_entry *entry)
8278 {
8279         struct mlx5_dev_ctx_shared *sh = list->ctx;
8280         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
8281
8282         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
8283                         tunnel_flow_tbl_to_id(tte->flow_table));
8284         mlx5_free(tte);
8285 }
8286
8287 static int
8288 mlx5_flow_tunnel_grp2tbl_match_cb(struct mlx5_hlist *list __rte_unused,
8289                                   struct mlx5_hlist_entry *entry,
8290                                   uint64_t key, void *cb_ctx __rte_unused)
8291 {
8292         union tunnel_tbl_key tbl = {
8293                 .val = key,
8294         };
8295         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
8296
8297         return tbl.tunnel_id != tte->tunnel_id || tbl.group != tte->group;
8298 }
8299
8300 static struct mlx5_hlist_entry *
8301 mlx5_flow_tunnel_grp2tbl_create_cb(struct mlx5_hlist *list, uint64_t key,
8302                                    void *ctx __rte_unused)
8303 {
8304         struct mlx5_dev_ctx_shared *sh = list->ctx;
8305         struct tunnel_tbl_entry *tte;
8306         union tunnel_tbl_key tbl = {
8307                 .val = key,
8308         };
8309
8310         tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
8311                           sizeof(*tte), 0,
8312                           SOCKET_ID_ANY);
8313         if (!tte)
8314                 goto err;
8315         mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
8316                           &tte->flow_table);
8317         if (tte->flow_table >= MLX5_MAX_TABLES) {
8318                 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.",
8319                         tte->flow_table);
8320                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
8321                                 tte->flow_table);
8322                 goto err;
8323         } else if (!tte->flow_table) {
8324                 goto err;
8325         }
8326         tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table);
8327         tte->tunnel_id = tbl.tunnel_id;
8328         tte->group = tbl.group;
8329         return &tte->hash;
8330 err:
8331         if (tte)
8332                 mlx5_free(tte);
8333         return NULL;
8334 }
8335
8336 static uint32_t
8337 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
8338                                 const struct mlx5_flow_tunnel *tunnel,
8339                                 uint32_t group, uint32_t *table,
8340                                 struct rte_flow_error *error)
8341 {
8342         struct mlx5_hlist_entry *he;
8343         struct tunnel_tbl_entry *tte;
8344         union tunnel_tbl_key key = {
8345                 .tunnel_id = tunnel ? tunnel->tunnel_id : 0,
8346                 .group = group
8347         };
8348         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8349         struct mlx5_hlist *group_hash;
8350
8351         group_hash = tunnel ? tunnel->groups : thub->groups;
8352         he = mlx5_hlist_register(group_hash, key.val, NULL);
8353         if (!he)
8354                 return rte_flow_error_set(error, EINVAL,
8355                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
8356                                           NULL,
8357                                           "tunnel group index not supported");
8358         tte = container_of(he, typeof(*tte), hash);
8359         *table = tte->flow_table;
8360         DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x",
8361                 dev->data->port_id, key.tunnel_id, group, *table);
8362         return 0;
8363 }
8364
8365 static void
8366 mlx5_flow_tunnel_free(struct rte_eth_dev *dev,
8367                       struct mlx5_flow_tunnel *tunnel)
8368 {
8369         struct mlx5_priv *priv = dev->data->dev_private;
8370         struct mlx5_indexed_pool *ipool;
8371
8372         DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x",
8373                 dev->data->port_id, tunnel->tunnel_id);
8374         LIST_REMOVE(tunnel, chain);
8375         mlx5_hlist_destroy(tunnel->groups);
8376         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
8377         mlx5_ipool_free(ipool, tunnel->tunnel_id);
8378 }
8379
8380 static bool
8381 mlx5_access_tunnel_offload_db
8382         (struct rte_eth_dev *dev,
8383          bool (*match)(struct rte_eth_dev *,
8384                        struct mlx5_flow_tunnel *, const void *),
8385          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
8386          void (*miss)(struct rte_eth_dev *, void *),
8387          void *ctx, bool lock_op)
8388 {
8389         bool verdict = false;
8390         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8391         struct mlx5_flow_tunnel *tunnel;
8392
8393         rte_spinlock_lock(&thub->sl);
8394         LIST_FOREACH(tunnel, &thub->tunnels, chain) {
8395                 verdict = match(dev, tunnel, (const void *)ctx);
8396                 if (verdict)
8397                         break;
8398         }
8399         if (!lock_op)
8400                 rte_spinlock_unlock(&thub->sl);
8401         if (verdict && hit)
8402                 hit(dev, tunnel, ctx);
8403         if (!verdict && miss)
8404                 miss(dev, ctx);
8405         if (lock_op)
8406                 rte_spinlock_unlock(&thub->sl);
8407
8408         return verdict;
8409 }
8410
8411 struct tunnel_db_find_tunnel_id_ctx {
8412         uint32_t tunnel_id;
8413         struct mlx5_flow_tunnel *tunnel;
8414 };
8415
8416 static bool
8417 find_tunnel_id_match(struct rte_eth_dev *dev,
8418                      struct mlx5_flow_tunnel *tunnel, const void *x)
8419 {
8420         const struct tunnel_db_find_tunnel_id_ctx *ctx = x;
8421
8422         RTE_SET_USED(dev);
8423         return tunnel->tunnel_id == ctx->tunnel_id;
8424 }
8425
8426 static void
8427 find_tunnel_id_hit(struct rte_eth_dev *dev,
8428                    struct mlx5_flow_tunnel *tunnel, void *x)
8429 {
8430         struct tunnel_db_find_tunnel_id_ctx *ctx = x;
8431         RTE_SET_USED(dev);
8432         ctx->tunnel = tunnel;
8433 }
8434
8435 static struct mlx5_flow_tunnel *
8436 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id)
8437 {
8438         struct tunnel_db_find_tunnel_id_ctx ctx = {
8439                 .tunnel_id = id,
8440         };
8441
8442         mlx5_access_tunnel_offload_db(dev, find_tunnel_id_match,
8443                                       find_tunnel_id_hit, NULL, &ctx, true);
8444
8445         return ctx.tunnel;
8446 }
8447
8448 static struct mlx5_flow_tunnel *
8449 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev,
8450                           const struct rte_flow_tunnel *app_tunnel)
8451 {
8452         struct mlx5_priv *priv = dev->data->dev_private;
8453         struct mlx5_indexed_pool *ipool;
8454         struct mlx5_flow_tunnel *tunnel;
8455         uint32_t id;
8456
8457         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
8458         tunnel = mlx5_ipool_zmalloc(ipool, &id);
8459         if (!tunnel)
8460                 return NULL;
8461         if (id >= MLX5_MAX_TUNNELS) {
8462                 mlx5_ipool_free(ipool, id);
8463                 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id);
8464                 return NULL;
8465         }
8466         tunnel->groups = mlx5_hlist_create("tunnel groups", 1024, 0, 0,
8467                                            mlx5_flow_tunnel_grp2tbl_create_cb,
8468                                            mlx5_flow_tunnel_grp2tbl_match_cb,
8469                                            mlx5_flow_tunnel_grp2tbl_remove_cb);
8470         if (!tunnel->groups) {
8471                 mlx5_ipool_free(ipool, id);
8472                 return NULL;
8473         }
8474         tunnel->groups->ctx = priv->sh;
8475         /* initiate new PMD tunnel */
8476         memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel));
8477         tunnel->tunnel_id = id;
8478         tunnel->action.type = (typeof(tunnel->action.type))
8479                               MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET;
8480         tunnel->action.conf = tunnel;
8481         tunnel->item.type = (typeof(tunnel->item.type))
8482                             MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL;
8483         tunnel->item.spec = tunnel;
8484         tunnel->item.last = NULL;
8485         tunnel->item.mask = NULL;
8486
8487         DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x",
8488                 dev->data->port_id, tunnel->tunnel_id);
8489
8490         return tunnel;
8491 }
8492
8493 struct tunnel_db_get_tunnel_ctx {
8494         const struct rte_flow_tunnel *app_tunnel;
8495         struct mlx5_flow_tunnel *tunnel;
8496 };
8497
8498 static bool get_tunnel_match(struct rte_eth_dev *dev,
8499                              struct mlx5_flow_tunnel *tunnel, const void *x)
8500 {
8501         const struct tunnel_db_get_tunnel_ctx *ctx = x;
8502
8503         RTE_SET_USED(dev);
8504         return !memcmp(ctx->app_tunnel, &tunnel->app_tunnel,
8505                        sizeof(*ctx->app_tunnel));
8506 }
8507
8508 static void get_tunnel_hit(struct rte_eth_dev *dev,
8509                            struct mlx5_flow_tunnel *tunnel, void *x)
8510 {
8511         /* called under tunnel spinlock protection */
8512         struct tunnel_db_get_tunnel_ctx *ctx = x;
8513
8514         RTE_SET_USED(dev);
8515         tunnel->refctn++;
8516         ctx->tunnel = tunnel;
8517 }
8518
8519 static void get_tunnel_miss(struct rte_eth_dev *dev, void *x)
8520 {
8521         /* called under tunnel spinlock protection */
8522         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8523         struct tunnel_db_get_tunnel_ctx *ctx = x;
8524
8525         rte_spinlock_unlock(&thub->sl);
8526         ctx->tunnel = mlx5_flow_tunnel_allocate(dev, ctx->app_tunnel);
8527         rte_spinlock_lock(&thub->sl);
8528         if (ctx->tunnel) {
8529                 ctx->tunnel->refctn = 1;
8530                 LIST_INSERT_HEAD(&thub->tunnels, ctx->tunnel, chain);
8531         }
8532 }
8533
8534
8535 static int
8536 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
8537                      const struct rte_flow_tunnel *app_tunnel,
8538                      struct mlx5_flow_tunnel **tunnel)
8539 {
8540         struct tunnel_db_get_tunnel_ctx ctx = {
8541                 .app_tunnel = app_tunnel,
8542         };
8543
8544         mlx5_access_tunnel_offload_db(dev, get_tunnel_match, get_tunnel_hit,
8545                                       get_tunnel_miss, &ctx, true);
8546         *tunnel = ctx.tunnel;
8547         return ctx.tunnel ? 0 : -ENOMEM;
8548 }
8549
8550 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id)
8551 {
8552         struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
8553
8554         if (!thub)
8555                 return;
8556         if (!LIST_EMPTY(&thub->tunnels))
8557                 DRV_LOG(WARNING, "port %u tunnels present", port_id);
8558         mlx5_hlist_destroy(thub->groups);
8559         mlx5_free(thub);
8560 }
8561
8562 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh)
8563 {
8564         int err;
8565         struct mlx5_flow_tunnel_hub *thub;
8566
8567         thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub),
8568                            0, SOCKET_ID_ANY);
8569         if (!thub)
8570                 return -ENOMEM;
8571         LIST_INIT(&thub->tunnels);
8572         rte_spinlock_init(&thub->sl);
8573         thub->groups = mlx5_hlist_create("flow groups",
8574                                          rte_align32pow2(MLX5_MAX_TABLES), 0,
8575                                          0, mlx5_flow_tunnel_grp2tbl_create_cb,
8576                                          mlx5_flow_tunnel_grp2tbl_match_cb,
8577                                          mlx5_flow_tunnel_grp2tbl_remove_cb);
8578         if (!thub->groups) {
8579                 err = -rte_errno;
8580                 goto err;
8581         }
8582         thub->groups->ctx = sh;
8583         sh->tunnel_hub = thub;
8584
8585         return 0;
8586
8587 err:
8588         if (thub->groups)
8589                 mlx5_hlist_destroy(thub->groups);
8590         if (thub)
8591                 mlx5_free(thub);
8592         return err;
8593 }
8594
8595 static inline bool
8596 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev,
8597                           struct rte_flow_tunnel *tunnel,
8598                           const char *err_msg)
8599 {
8600         err_msg = NULL;
8601         if (!is_tunnel_offload_active(dev)) {
8602                 err_msg = "tunnel offload was not activated";
8603                 goto out;
8604         } else if (!tunnel) {
8605                 err_msg = "no application tunnel";
8606                 goto out;
8607         }
8608
8609         switch (tunnel->type) {
8610         default:
8611                 err_msg = "unsupported tunnel type";
8612                 goto out;
8613         case RTE_FLOW_ITEM_TYPE_VXLAN:
8614                 break;
8615         }
8616
8617 out:
8618         return !err_msg;
8619 }
8620
8621 static int
8622 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
8623                     struct rte_flow_tunnel *app_tunnel,
8624                     struct rte_flow_action **actions,
8625                     uint32_t *num_of_actions,
8626                     struct rte_flow_error *error)
8627 {
8628         int ret;
8629         struct mlx5_flow_tunnel *tunnel;
8630         const char *err_msg = NULL;
8631         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
8632
8633         if (!verdict)
8634                 return rte_flow_error_set(error, EINVAL,
8635                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
8636                                           err_msg);
8637         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
8638         if (ret < 0) {
8639                 return rte_flow_error_set(error, ret,
8640                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
8641                                           "failed to initialize pmd tunnel");
8642         }
8643         *actions = &tunnel->action;
8644         *num_of_actions = 1;
8645         return 0;
8646 }
8647
8648 static int
8649 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
8650                        struct rte_flow_tunnel *app_tunnel,
8651                        struct rte_flow_item **items,
8652                        uint32_t *num_of_items,
8653                        struct rte_flow_error *error)
8654 {
8655         int ret;
8656         struct mlx5_flow_tunnel *tunnel;
8657         const char *err_msg = NULL;
8658         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
8659
8660         if (!verdict)
8661                 return rte_flow_error_set(error, EINVAL,
8662                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
8663                                           err_msg);
8664         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
8665         if (ret < 0) {
8666                 return rte_flow_error_set(error, ret,
8667                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
8668                                           "failed to initialize pmd tunnel");
8669         }
8670         *items = &tunnel->item;
8671         *num_of_items = 1;
8672         return 0;
8673 }
8674
8675 struct tunnel_db_element_release_ctx {
8676         struct rte_flow_item *items;
8677         struct rte_flow_action *actions;
8678         uint32_t num_elements;
8679         struct rte_flow_error *error;
8680         int ret;
8681 };
8682
8683 static bool
8684 tunnel_element_release_match(struct rte_eth_dev *dev,
8685                              struct mlx5_flow_tunnel *tunnel, const void *x)
8686 {
8687         const struct tunnel_db_element_release_ctx *ctx = x;
8688
8689         RTE_SET_USED(dev);
8690         if (ctx->num_elements != 1)
8691                 return false;
8692         else if (ctx->items)
8693                 return ctx->items == &tunnel->item;
8694         else if (ctx->actions)
8695                 return ctx->actions == &tunnel->action;
8696
8697         return false;
8698 }
8699
8700 static void
8701 tunnel_element_release_hit(struct rte_eth_dev *dev,
8702                            struct mlx5_flow_tunnel *tunnel, void *x)
8703 {
8704         struct tunnel_db_element_release_ctx *ctx = x;
8705         ctx->ret = 0;
8706         if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
8707                 mlx5_flow_tunnel_free(dev, tunnel);
8708 }
8709
8710 static void
8711 tunnel_element_release_miss(struct rte_eth_dev *dev, void *x)
8712 {
8713         struct tunnel_db_element_release_ctx *ctx = x;
8714         RTE_SET_USED(dev);
8715         ctx->ret = rte_flow_error_set(ctx->error, EINVAL,
8716                                       RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
8717                                       "invalid argument");
8718 }
8719
8720 static int
8721 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
8722                        struct rte_flow_item *pmd_items,
8723                        uint32_t num_items, struct rte_flow_error *err)
8724 {
8725         struct tunnel_db_element_release_ctx ctx = {
8726                 .items = pmd_items,
8727                 .actions = NULL,
8728                 .num_elements = num_items,
8729                 .error = err,
8730         };
8731
8732         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
8733                                       tunnel_element_release_hit,
8734                                       tunnel_element_release_miss, &ctx, false);
8735
8736         return ctx.ret;
8737 }
8738
8739 static int
8740 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
8741                          struct rte_flow_action *pmd_actions,
8742                          uint32_t num_actions, struct rte_flow_error *err)
8743 {
8744         struct tunnel_db_element_release_ctx ctx = {
8745                 .items = NULL,
8746                 .actions = pmd_actions,
8747                 .num_elements = num_actions,
8748                 .error = err,
8749         };
8750
8751         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
8752                                       tunnel_element_release_hit,
8753                                       tunnel_element_release_miss, &ctx, false);
8754
8755         return ctx.ret;
8756 }
8757
8758 static int
8759 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
8760                                   struct rte_mbuf *m,
8761                                   struct rte_flow_restore_info *info,
8762                                   struct rte_flow_error *err)
8763 {
8764         uint64_t ol_flags = m->ol_flags;
8765         const struct mlx5_flow_tbl_data_entry *tble;
8766         const uint64_t mask = PKT_RX_FDIR | PKT_RX_FDIR_ID;
8767
8768         if (!is_tunnel_offload_active(dev)) {
8769                 info->flags = 0;
8770                 return 0;
8771         }
8772
8773         if ((ol_flags & mask) != mask)
8774                 goto err;
8775         tble = tunnel_mark_decode(dev, m->hash.fdir.hi);
8776         if (!tble) {
8777                 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x",
8778                         dev->data->port_id, m->hash.fdir.hi);
8779                 goto err;
8780         }
8781         MLX5_ASSERT(tble->tunnel);
8782         memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel));
8783         info->group_id = tble->group_id;
8784         info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL |
8785                       RTE_FLOW_RESTORE_INFO_GROUP_ID |
8786                       RTE_FLOW_RESTORE_INFO_ENCAPSULATED;
8787
8788         return 0;
8789
8790 err:
8791         return rte_flow_error_set(err, EINVAL,
8792                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8793                                   "failed to get restore info");
8794 }
8795
8796 #else /* HAVE_IBV_FLOW_DV_SUPPORT */
8797 static int
8798 mlx5_flow_tunnel_decap_set(__rte_unused struct rte_eth_dev *dev,
8799                            __rte_unused struct rte_flow_tunnel *app_tunnel,
8800                            __rte_unused struct rte_flow_action **actions,
8801                            __rte_unused uint32_t *num_of_actions,
8802                            __rte_unused struct rte_flow_error *error)
8803 {
8804         return -ENOTSUP;
8805 }
8806
8807 static int
8808 mlx5_flow_tunnel_match(__rte_unused struct rte_eth_dev *dev,
8809                        __rte_unused struct rte_flow_tunnel *app_tunnel,
8810                        __rte_unused struct rte_flow_item **items,
8811                        __rte_unused uint32_t *num_of_items,
8812                        __rte_unused struct rte_flow_error *error)
8813 {
8814         return -ENOTSUP;
8815 }
8816
8817 static int
8818 mlx5_flow_tunnel_item_release(__rte_unused struct rte_eth_dev *dev,
8819                               __rte_unused struct rte_flow_item *pmd_items,
8820                               __rte_unused uint32_t num_items,
8821                               __rte_unused struct rte_flow_error *err)
8822 {
8823         return -ENOTSUP;
8824 }
8825
8826 static int
8827 mlx5_flow_tunnel_action_release(__rte_unused struct rte_eth_dev *dev,
8828                                 __rte_unused struct rte_flow_action *pmd_action,
8829                                 __rte_unused uint32_t num_actions,
8830                                 __rte_unused struct rte_flow_error *err)
8831 {
8832         return -ENOTSUP;
8833 }
8834
8835 static int
8836 mlx5_flow_tunnel_get_restore_info(__rte_unused struct rte_eth_dev *dev,
8837                                   __rte_unused struct rte_mbuf *m,
8838                                   __rte_unused struct rte_flow_restore_info *i,
8839                                   __rte_unused struct rte_flow_error *err)
8840 {
8841         return -ENOTSUP;
8842 }
8843
8844 static int
8845 flow_tunnel_add_default_miss(__rte_unused struct rte_eth_dev *dev,
8846                              __rte_unused struct rte_flow *flow,
8847                              __rte_unused const struct rte_flow_attr *attr,
8848                              __rte_unused const struct rte_flow_action *actions,
8849                              __rte_unused uint32_t flow_idx,
8850                              __rte_unused struct tunnel_default_miss_ctx *ctx,
8851                              __rte_unused struct rte_flow_error *error)
8852 {
8853         return -ENOTSUP;
8854 }
8855
8856 static struct mlx5_flow_tunnel *
8857 mlx5_find_tunnel_id(__rte_unused struct rte_eth_dev *dev,
8858                     __rte_unused uint32_t id)
8859 {
8860         return NULL;
8861 }
8862
8863 static void
8864 mlx5_flow_tunnel_free(__rte_unused struct rte_eth_dev *dev,
8865                       __rte_unused struct mlx5_flow_tunnel *tunnel)
8866 {
8867 }
8868
8869 static uint32_t
8870 tunnel_flow_group_to_flow_table(__rte_unused struct rte_eth_dev *dev,
8871                                 __rte_unused const struct mlx5_flow_tunnel *t,
8872                                 __rte_unused uint32_t group,
8873                                 __rte_unused uint32_t *table,
8874                                 struct rte_flow_error *error)
8875 {
8876         return rte_flow_error_set(error, ENOTSUP,
8877                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8878                                   "tunnel offload requires DV support");
8879 }
8880
8881 void
8882 mlx5_release_tunnel_hub(__rte_unused struct mlx5_dev_ctx_shared *sh,
8883                         __rte_unused  uint16_t port_id)
8884 {
8885 }
8886 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */