drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <netinet/in.h>
   7 #include <sys/queue.h>
   8 #include <stdalign.h>
   9 #include <stdint.h>
  10 #include <string.h>
  11
  12 /* Verbs header. */
  13 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  14 #ifdef PEDANTIC
  15 #pragma GCC diagnostic ignored "-Wpedantic"
  16 #endif
  17 #include <infiniband/verbs.h>
  18 #ifdef PEDANTIC
  19 #pragma GCC diagnostic error "-Wpedantic"
  20 #endif
  21
  22 #include <rte_common.h>
  23 #include <rte_ether.h>
  24 #include <rte_ethdev_driver.h>
  25 #include <rte_flow.h>
  26 #include <rte_flow_driver.h>
  27 #include <rte_malloc.h>
  28 #include <rte_ip.h>
  29
  30 #include "mlx5.h"
  31 #include "mlx5_defs.h"
  32 #include "mlx5_flow.h"
  33 #include "mlx5_glue.h"
  34 #include "mlx5_prm.h"
  35 #include "mlx5_rxtx.h"
  36
  37 /* Dev ops structure defined in mlx5.c */
  38 extern const struct eth_dev_ops mlx5_dev_ops;
  39 extern const struct eth_dev_ops mlx5_dev_ops_isolate;
  40
  41 /** Device flow drivers. */
  42 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  43 extern const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops;
  44 #endif
  45 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  46
  47 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  48
  49 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  50         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  51 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  52         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  53 #endif
  54         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  55         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  56 };
  57
  58 enum mlx5_expansion {
  59         MLX5_EXPANSION_ROOT,
  60         MLX5_EXPANSION_ROOT_OUTER,
  61         MLX5_EXPANSION_ROOT_ETH_VLAN,
  62         MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
  63         MLX5_EXPANSION_OUTER_ETH,
  64         MLX5_EXPANSION_OUTER_ETH_VLAN,
  65         MLX5_EXPANSION_OUTER_VLAN,
  66         MLX5_EXPANSION_OUTER_IPV4,
  67         MLX5_EXPANSION_OUTER_IPV4_UDP,
  68         MLX5_EXPANSION_OUTER_IPV4_TCP,
  69         MLX5_EXPANSION_OUTER_IPV6,
  70         MLX5_EXPANSION_OUTER_IPV6_UDP,
  71         MLX5_EXPANSION_OUTER_IPV6_TCP,
  72         MLX5_EXPANSION_VXLAN,
  73         MLX5_EXPANSION_VXLAN_GPE,
  74         MLX5_EXPANSION_GRE,
  75         MLX5_EXPANSION_MPLS,
  76         MLX5_EXPANSION_ETH,
  77         MLX5_EXPANSION_ETH_VLAN,
  78         MLX5_EXPANSION_VLAN,
  79         MLX5_EXPANSION_IPV4,
  80         MLX5_EXPANSION_IPV4_UDP,
  81         MLX5_EXPANSION_IPV4_TCP,
  82         MLX5_EXPANSION_IPV6,
  83         MLX5_EXPANSION_IPV6_UDP,
  84         MLX5_EXPANSION_IPV6_TCP,
  85 };
  86
  87 /** Supported expansion of items. */
  88 static const struct rte_flow_expand_node mlx5_support_expansion[] = {
  89         [MLX5_EXPANSION_ROOT] = {
  90                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
  91                                                  MLX5_EXPANSION_IPV4,
  92                                                  MLX5_EXPANSION_IPV6),
  93                 .type = RTE_FLOW_ITEM_TYPE_END,
  94         },
  95         [MLX5_EXPANSION_ROOT_OUTER] = {
  96                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
  97                                                  MLX5_EXPANSION_OUTER_IPV4,
  98                                                  MLX5_EXPANSION_OUTER_IPV6),
  99                 .type = RTE_FLOW_ITEM_TYPE_END,
 100         },
 101         [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
 102                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
 103                 .type = RTE_FLOW_ITEM_TYPE_END,
 104         },
 105         [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
 106                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH_VLAN),
 107                 .type = RTE_FLOW_ITEM_TYPE_END,
 108         },
 109         [MLX5_EXPANSION_OUTER_ETH] = {
 110                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 111                                                  MLX5_EXPANSION_OUTER_IPV6,
 112                                                  MLX5_EXPANSION_MPLS),
 113                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 114                 .rss_types = 0,
 115         },
 116         [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
 117                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 118                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 119                 .rss_types = 0,
 120         },
 121         [MLX5_EXPANSION_OUTER_VLAN] = {
 122                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 123                                                  MLX5_EXPANSION_OUTER_IPV6),
 124                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 125         },
 126         [MLX5_EXPANSION_OUTER_IPV4] = {
 127                 .next = RTE_FLOW_EXPAND_RSS_NEXT
 128                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 129                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 130                          MLX5_EXPANSION_GRE,
 131                          MLX5_EXPANSION_IPV4,
 132                          MLX5_EXPANSION_IPV6),
 133                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 134                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 135                         ETH_RSS_NONFRAG_IPV4_OTHER,
 136         },
 137         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 138                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 139                                                  MLX5_EXPANSION_VXLAN_GPE),
 140                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 141                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 142         },
 143         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 144                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 145                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 146         },
 147         [MLX5_EXPANSION_OUTER_IPV6] = {
 148                 .next = RTE_FLOW_EXPAND_RSS_NEXT
 149                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 150                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 151                          MLX5_EXPANSION_IPV4,
 152                          MLX5_EXPANSION_IPV6),
 153                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 154                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 155                         ETH_RSS_NONFRAG_IPV6_OTHER,
 156         },
 157         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 158                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 159                                                  MLX5_EXPANSION_VXLAN_GPE),
 160                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 161                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 162         },
 163         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 164                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 165                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 166         },
 167         [MLX5_EXPANSION_VXLAN] = {
 168                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
 169                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 170         },
 171         [MLX5_EXPANSION_VXLAN_GPE] = {
 172                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 173                                                  MLX5_EXPANSION_IPV4,
 174                                                  MLX5_EXPANSION_IPV6),
 175                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 176         },
 177         [MLX5_EXPANSION_GRE] = {
 178                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4),
 179                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 180         },
 181         [MLX5_EXPANSION_MPLS] = {
 182                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 183                                                  MLX5_EXPANSION_IPV6),
 184                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 185         },
 186         [MLX5_EXPANSION_ETH] = {
 187                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 188                                                  MLX5_EXPANSION_IPV6),
 189                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 190         },
 191         [MLX5_EXPANSION_ETH_VLAN] = {
 192                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 193                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 194         },
 195         [MLX5_EXPANSION_VLAN] = {
 196                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 197                                                  MLX5_EXPANSION_IPV6),
 198                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 199         },
 200         [MLX5_EXPANSION_IPV4] = {
 201                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 202                                                  MLX5_EXPANSION_IPV4_TCP),
 203                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 204                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 205                         ETH_RSS_NONFRAG_IPV4_OTHER,
 206         },
 207         [MLX5_EXPANSION_IPV4_UDP] = {
 208                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 209                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 210         },
 211         [MLX5_EXPANSION_IPV4_TCP] = {
 212                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 213                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 214         },
 215         [MLX5_EXPANSION_IPV6] = {
 216                 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 217                                                  MLX5_EXPANSION_IPV6_TCP),
 218                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 219                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 220                         ETH_RSS_NONFRAG_IPV6_OTHER,
 221         },
 222         [MLX5_EXPANSION_IPV6_UDP] = {
 223                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 224                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 225         },
 226         [MLX5_EXPANSION_IPV6_TCP] = {
 227                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 228                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 229         },
 230 };
 231
 232 static const struct rte_flow_ops mlx5_flow_ops = {
 233         .validate = mlx5_flow_validate,
 234         .create = mlx5_flow_create,
 235         .destroy = mlx5_flow_destroy,
 236         .flush = mlx5_flow_flush,
 237         .isolate = mlx5_flow_isolate,
 238         .query = mlx5_flow_query,
 239 };
 240
 241 /* Convert FDIR request to Generic flow. */
 242 struct mlx5_fdir {
 243         struct rte_flow_attr attr;
 244         struct rte_flow_item items[4];
 245         struct rte_flow_item_eth l2;
 246         struct rte_flow_item_eth l2_mask;
 247         union {
 248                 struct rte_flow_item_ipv4 ipv4;
 249                 struct rte_flow_item_ipv6 ipv6;
 250         } l3;
 251         union {
 252                 struct rte_flow_item_ipv4 ipv4;
 253                 struct rte_flow_item_ipv6 ipv6;
 254         } l3_mask;
 255         union {
 256                 struct rte_flow_item_udp udp;
 257                 struct rte_flow_item_tcp tcp;
 258         } l4;
 259         union {
 260                 struct rte_flow_item_udp udp;
 261                 struct rte_flow_item_tcp tcp;
 262         } l4_mask;
 263         struct rte_flow_action actions[2];
 264         struct rte_flow_action_queue queue;
 265 };
 266
 267 /* Map of Verbs to Flow priority with 8 Verbs priorities. */
 268 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = {
 269         { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 },
 270 };
 271
 272 /* Map of Verbs to Flow priority with 16 Verbs priorities. */
 273 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = {
 274         { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 },
 275         { 9, 10, 11 }, { 12, 13, 14 },
 276 };
 277
 278 /* Tunnel information. */
 279 struct mlx5_flow_tunnel_info {
 280         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 281         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 282 };
 283
 284 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 285         {
 286                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 287                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 288         },
 289         {
 290                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
 291                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
 292         },
 293         {
 294                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 295                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 296         },
 297         {
 298                 .tunnel = MLX5_FLOW_LAYER_GRE,
 299                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 300         },
 301         {
 302                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 303                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 304         },
 305         {
 306                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 307                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 308         },
 309         {
 310                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 311                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 312         },
 313         {
 314                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 315                 .ptype = RTE_PTYPE_TUNNEL_IP,
 316         },
 317         {
 318                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 319                 .ptype = RTE_PTYPE_TUNNEL_IP,
 320         },
 321 };
 322
 323 /**
 324  * Translate tag ID to register.
 325  *
 326  * @param[in] dev
 327  *   Pointer to the Ethernet device structure.
 328  * @param[in] feature
 329  *   The feature that request the register.
 330  * @param[in] id
 331  *   The request register ID.
 332  * @param[out] error
 333  *   Error description in case of any.
 334  *
 335  * @return
 336  *   The request register on success, a negative errno
 337  *   value otherwise and rte_errno is set.
 338  */
 339 enum modify_reg
 340 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 341                      enum mlx5_feature_name feature,
 342                      uint32_t id,
 343                      struct rte_flow_error *error)
 344 {
 345         struct mlx5_priv *priv = dev->data->dev_private;
 346         struct mlx5_dev_config *config = &priv->config;
 347         enum modify_reg start_reg;
 348
 349         switch (feature) {
 350         case MLX5_HAIRPIN_RX:
 351                 return REG_B;
 352         case MLX5_HAIRPIN_TX:
 353                 return REG_A;
 354         case MLX5_METADATA_RX:
 355                 switch (config->dv_xmeta_en) {
 356                 case MLX5_XMETA_MODE_LEGACY:
 357                         return REG_B;
 358                 case MLX5_XMETA_MODE_META16:
 359                         return REG_C_0;
 360                 case MLX5_XMETA_MODE_META32:
 361                         return REG_C_1;
 362                 }
 363                 break;
 364         case MLX5_METADATA_TX:
 365                 return REG_A;
 366         case MLX5_METADATA_FDB:
 367                 return REG_C_0;
 368         case MLX5_FLOW_MARK:
 369                 switch (config->dv_xmeta_en) {
 370                 case MLX5_XMETA_MODE_LEGACY:
 371                         return REG_NONE;
 372                 case MLX5_XMETA_MODE_META16:
 373                         return REG_C_1;
 374                 case MLX5_XMETA_MODE_META32:
 375                         return REG_C_0;
 376                 }
 377                 break;
 378         case MLX5_COPY_MARK:
 379         case MLX5_MTR_SFX:
 380                 /*
 381                  * Metadata COPY_MARK register using is in meter suffix sub
 382                  * flow while with meter. It's safe to share the same register.
 383                  */
 384                 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
 385         case MLX5_MTR_COLOR:
 386                 RTE_ASSERT(priv->mtr_color_reg != REG_NONE);
 387                 return priv->mtr_color_reg;
 388         case MLX5_APP_TAG:
 389                 /*
 390                  * If meter is enable, it will engage two registers for color
 391                  * match and flow match. If meter color match is not using the
 392                  * REG_C_2, need to skip the REG_C_x be used by meter color
 393                  * match.
 394                  * If meter is disable, free to use all available registers.
 395                  */
 396                 if (priv->mtr_color_reg != REG_NONE)
 397                         start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_3 :
 398                                     REG_C_4;
 399                 else
 400                         start_reg = REG_C_2;
 401                 if (id > (REG_C_7 - start_reg))
 402                         return rte_flow_error_set(error, EINVAL,
 403                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 404                                                   NULL, "invalid tag id");
 405                 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NONE)
 406                         return rte_flow_error_set(error, ENOTSUP,
 407                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 408                                                   NULL, "unsupported tag id");
 409                 /*
 410                  * This case means meter is using the REG_C_x great than 2.
 411                  * Take care not to conflict with meter color REG_C_x.
 412                  * If the available index REG_C_y >= REG_C_x, skip the
 413                  * color register.
 414                  */
 415                 if (start_reg == REG_C_3 && config->flow_mreg_c
 416                     [id + REG_C_3 - REG_C_0] >= priv->mtr_color_reg) {
 417                         if (config->flow_mreg_c[id + 1 + REG_C_3 - REG_C_0] !=
 418                             REG_NONE)
 419                                 return config->flow_mreg_c
 420                                                 [id + 1 + REG_C_3 - REG_C_0];
 421                         return rte_flow_error_set(error, ENOTSUP,
 422                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 423                                                   NULL, "unsupported tag id");
 424                 }
 425                 return config->flow_mreg_c[id + start_reg - REG_C_0];
 426         }
 427         assert(false);
 428         return rte_flow_error_set(error, EINVAL,
 429                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 430                                   NULL, "invalid feature name");
 431 }
 432
 433 /**
 434  * Check extensive flow metadata register support.
 435  *
 436  * @param dev
 437  *   Pointer to rte_eth_dev structure.
 438  *
 439  * @return
 440  *   True if device supports extensive flow metadata register, otherwise false.
 441  */
 442 bool
 443 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
 444 {
 445         struct mlx5_priv *priv = dev->data->dev_private;
 446         struct mlx5_dev_config *config = &priv->config;
 447
 448         /*
 449          * Having available reg_c can be regarded inclusively as supporting
 450          * extensive flow metadata register, which could mean,
 451          * - metadata register copy action by modify header.
 452          * - 16 modify header actions is supported.
 453          * - reg_c's are preserved across different domain (FDB and NIC) on
 454          *   packet loopback by flow lookup miss.
 455          */
 456         return config->flow_mreg_c[2] != REG_NONE;
 457 }
 458
 459 /**
 460  * Discover the maximum number of priority available.
 461  *
 462  * @param[in] dev
 463  *   Pointer to the Ethernet device structure.
 464  *
 465  * @return
 466  *   number of supported flow priority on success, a negative errno
 467  *   value otherwise and rte_errno is set.
 468  */
 469 int
 470 mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
 471 {
 472         struct mlx5_priv *priv = dev->data->dev_private;
 473         struct {
 474                 struct ibv_flow_attr attr;
 475                 struct ibv_flow_spec_eth eth;
 476                 struct ibv_flow_spec_action_drop drop;
 477         } flow_attr = {
 478                 .attr = {
 479                         .num_of_specs = 2,
 480                         .port = (uint8_t)priv->ibv_port,
 481                 },
 482                 .eth = {
 483                         .type = IBV_FLOW_SPEC_ETH,
 484                         .size = sizeof(struct ibv_flow_spec_eth),
 485                 },
 486                 .drop = {
 487                         .size = sizeof(struct ibv_flow_spec_action_drop),
 488                         .type = IBV_FLOW_SPEC_ACTION_DROP,
 489                 },
 490         };
 491         struct ibv_flow *flow;
 492         struct mlx5_hrxq *drop = mlx5_hrxq_drop_new(dev);
 493         uint16_t vprio[] = { 8, 16 };
 494         int i;
 495         int priority = 0;
 496
 497         if (!drop) {
 498                 rte_errno = ENOTSUP;
 499                 return -rte_errno;
 500         }
 501         for (i = 0; i != RTE_DIM(vprio); i++) {
 502                 flow_attr.attr.priority = vprio[i] - 1;
 503                 flow = mlx5_glue->create_flow(drop->qp, &flow_attr.attr);
 504                 if (!flow)
 505                         break;
 506                 claim_zero(mlx5_glue->destroy_flow(flow));
 507                 priority = vprio[i];
 508         }
 509         mlx5_hrxq_drop_release(dev);
 510         switch (priority) {
 511         case 8:
 512                 priority = RTE_DIM(priority_map_3);
 513                 break;
 514         case 16:
 515                 priority = RTE_DIM(priority_map_5);
 516                 break;
 517         default:
 518                 rte_errno = ENOTSUP;
 519                 DRV_LOG(ERR,
 520                         "port %u verbs maximum priority: %d expected 8/16",
 521                         dev->data->port_id, priority);
 522                 return -rte_errno;
 523         }
 524         DRV_LOG(INFO, "port %u flow maximum priority: %d",
 525                 dev->data->port_id, priority);
 526         return priority;
 527 }
 528
 529 /**
 530  * Adjust flow priority based on the highest layer and the request priority.
 531  *
 532  * @param[in] dev
 533  *   Pointer to the Ethernet device structure.
 534  * @param[in] priority
 535  *   The rule base priority.
 536  * @param[in] subpriority
 537  *   The priority based on the items.
 538  *
 539  * @return
 540  *   The new priority.
 541  */
 542 uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
 543                                    uint32_t subpriority)
 544 {
 545         uint32_t res = 0;
 546         struct mlx5_priv *priv = dev->data->dev_private;
 547
 548         switch (priv->config.flow_prio) {
 549         case RTE_DIM(priority_map_3):
 550                 res = priority_map_3[priority][subpriority];
 551                 break;
 552         case RTE_DIM(priority_map_5):
 553                 res = priority_map_5[priority][subpriority];
 554                 break;
 555         }
 556         return  res;
 557 }
 558
 559 /**
 560  * Verify the @p item specifications (spec, last, mask) are compatible with the
 561  * NIC capabilities.
 562  *
 563  * @param[in] item
 564  *   Item specification.
 565  * @param[in] mask
 566  *   @p item->mask or flow default bit-masks.
 567  * @param[in] nic_mask
 568  *   Bit-masks covering supported fields by the NIC to compare with user mask.
 569  * @param[in] size
 570  *   Bit-masks size in bytes.
 571  * @param[out] error
 572  *   Pointer to error structure.
 573  *
 574  * @return
 575  *   0 on success, a negative errno value otherwise and rte_errno is set.
 576  */
 577 int
 578 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
 579                           const uint8_t *mask,
 580                           const uint8_t *nic_mask,
 581                           unsigned int size,
 582                           struct rte_flow_error *error)
 583 {
 584         unsigned int i;
 585
 586         assert(nic_mask);
 587         for (i = 0; i < size; ++i)
 588                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
 589                         return rte_flow_error_set(error, ENOTSUP,
 590                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 591                                                   item,
 592                                                   "mask enables non supported"
 593                                                   " bits");
 594         if (!item->spec && (item->mask || item->last))
 595                 return rte_flow_error_set(error, EINVAL,
 596                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
 597                                           "mask/last without a spec is not"
 598                                           " supported");
 599         if (item->spec && item->last) {
 600                 uint8_t spec[size];
 601                 uint8_t last[size];
 602                 unsigned int i;
 603                 int ret;
 604
 605                 for (i = 0; i < size; ++i) {
 606                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
 607                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
 608                 }
 609                 ret = memcmp(spec, last, size);
 610                 if (ret != 0)
 611                         return rte_flow_error_set(error, EINVAL,
 612                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 613                                                   item,
 614                                                   "range is not valid");
 615         }
 616         return 0;
 617 }
 618
 619 /**
 620  * Adjust the hash fields according to the @p flow information.
 621  *
 622  * @param[in] dev_flow.
 623  *   Pointer to the mlx5_flow.
 624  * @param[in] tunnel
 625  *   1 when the hash field is for a tunnel item.
 626  * @param[in] layer_types
 627  *   ETH_RSS_* types.
 628  * @param[in] hash_fields
 629  *   Item hash fields.
 630  *
 631  * @return
 632  *   The hash fields that should be used.
 633  */
 634 uint64_t
 635 mlx5_flow_hashfields_adjust(struct mlx5_flow *dev_flow,
 636                             int tunnel __rte_unused, uint64_t layer_types,
 637                             uint64_t hash_fields)
 638 {
 639         struct rte_flow *flow = dev_flow->flow;
 640 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 641         int rss_request_inner = flow->rss.level >= 2;
 642
 643         /* Check RSS hash level for tunnel. */
 644         if (tunnel && rss_request_inner)
 645                 hash_fields |= IBV_RX_HASH_INNER;
 646         else if (tunnel || rss_request_inner)
 647                 return 0;
 648 #endif
 649         /* Check if requested layer matches RSS hash fields. */
 650         if (!(flow->rss.types & layer_types))
 651                 return 0;
 652         return hash_fields;
 653 }
 654
 655 /**
 656  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
 657  * if several tunnel rules are used on this queue, the tunnel ptype will be
 658  * cleared.
 659  *
 660  * @param rxq_ctrl
 661  *   Rx queue to update.
 662  */
 663 static void
 664 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
 665 {
 666         unsigned int i;
 667         uint32_t tunnel_ptype = 0;
 668
 669         /* Look up for the ptype to use. */
 670         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
 671                 if (!rxq_ctrl->flow_tunnels_n[i])
 672                         continue;
 673                 if (!tunnel_ptype) {
 674                         tunnel_ptype = tunnels_info[i].ptype;
 675                 } else {
 676                         tunnel_ptype = 0;
 677                         break;
 678                 }
 679         }
 680         rxq_ctrl->rxq.tunnel = tunnel_ptype;
 681 }
 682
 683 /**
 684  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
 685  * flow.
 686  *
 687  * @param[in] dev
 688  *   Pointer to the Ethernet device structure.
 689  * @param[in] dev_flow
 690  *   Pointer to device flow structure.
 691  */
 692 static void
 693 flow_drv_rxq_flags_set(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow)
 694 {
 695         struct mlx5_priv *priv = dev->data->dev_private;
 696         struct rte_flow *flow = dev_flow->flow;
 697         const int mark = !!(dev_flow->actions &
 698                             (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK));
 699         const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL);
 700         unsigned int i;
 701
 702         for (i = 0; i != flow->rss.queue_num; ++i) {
 703                 int idx = (*flow->rss.queue)[i];
 704                 struct mlx5_rxq_ctrl *rxq_ctrl =
 705                         container_of((*priv->rxqs)[idx],
 706                                      struct mlx5_rxq_ctrl, rxq);
 707
 708                 /*
 709                  * To support metadata register copy on Tx loopback,
 710                  * this must be always enabled (metadata may arive
 711                  * from other port - not from local flows only.
 712                  */
 713                 if (priv->config.dv_flow_en &&
 714                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
 715                     mlx5_flow_ext_mreg_supported(dev)) {
 716                         rxq_ctrl->rxq.mark = 1;
 717                         rxq_ctrl->flow_mark_n = 1;
 718                 } else if (mark) {
 719                         rxq_ctrl->rxq.mark = 1;
 720                         rxq_ctrl->flow_mark_n++;
 721                 }
 722                 if (tunnel) {
 723                         unsigned int j;
 724
 725                         /* Increase the counter matching the flow. */
 726                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
 727                                 if ((tunnels_info[j].tunnel &
 728                                      dev_flow->layers) ==
 729                                     tunnels_info[j].tunnel) {
 730                                         rxq_ctrl->flow_tunnels_n[j]++;
 731                                         break;
 732                                 }
 733                         }
 734                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
 735                 }
 736         }
 737 }
 738
 739 /**
 740  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
 741  *
 742  * @param[in] dev
 743  *   Pointer to the Ethernet device structure.
 744  * @param[in] flow
 745  *   Pointer to flow structure.
 746  */
 747 static void
 748 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
 749 {
 750         struct mlx5_flow *dev_flow;
 751
 752         LIST_FOREACH(dev_flow, &flow->dev_flows, next)
 753                 flow_drv_rxq_flags_set(dev, dev_flow);
 754 }
 755
 756 /**
 757  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
 758  * device flow if no other flow uses it with the same kind of request.
 759  *
 760  * @param dev
 761  *   Pointer to Ethernet device.
 762  * @param[in] dev_flow
 763  *   Pointer to the device flow.
 764  */
 765 static void
 766 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow)
 767 {
 768         struct mlx5_priv *priv = dev->data->dev_private;
 769         struct rte_flow *flow = dev_flow->flow;
 770         const int mark = !!(dev_flow->actions &
 771                             (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK));
 772         const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL);
 773         unsigned int i;
 774
 775         assert(dev->data->dev_started);
 776         for (i = 0; i != flow->rss.queue_num; ++i) {
 777                 int idx = (*flow->rss.queue)[i];
 778                 struct mlx5_rxq_ctrl *rxq_ctrl =
 779                         container_of((*priv->rxqs)[idx],
 780                                      struct mlx5_rxq_ctrl, rxq);
 781
 782                 if (priv->config.dv_flow_en &&
 783                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
 784                     mlx5_flow_ext_mreg_supported(dev)) {
 785                         rxq_ctrl->rxq.mark = 1;
 786                         rxq_ctrl->flow_mark_n = 1;
 787                 } else if (mark) {
 788                         rxq_ctrl->flow_mark_n--;
 789                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
 790                 }
 791                 if (tunnel) {
 792                         unsigned int j;
 793
 794                         /* Decrease the counter matching the flow. */
 795                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
 796                                 if ((tunnels_info[j].tunnel &
 797                                      dev_flow->layers) ==
 798                                     tunnels_info[j].tunnel) {
 799                                         rxq_ctrl->flow_tunnels_n[j]--;
 800                                         break;
 801                                 }
 802                         }
 803                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
 804                 }
 805         }
 806 }
 807
 808 /**
 809  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
 810  * @p flow if no other flow uses it with the same kind of request.
 811  *
 812  * @param dev
 813  *   Pointer to Ethernet device.
 814  * @param[in] flow
 815  *   Pointer to the flow.
 816  */
 817 static void
 818 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
 819 {
 820         struct mlx5_flow *dev_flow;
 821
 822         LIST_FOREACH(dev_flow, &flow->dev_flows, next)
 823                 flow_drv_rxq_flags_trim(dev, dev_flow);
 824 }
 825
 826 /**
 827  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
 828  *
 829  * @param dev
 830  *   Pointer to Ethernet device.
 831  */
 832 static void
 833 flow_rxq_flags_clear(struct rte_eth_dev *dev)
 834 {
 835         struct mlx5_priv *priv = dev->data->dev_private;
 836         unsigned int i;
 837
 838         for (i = 0; i != priv->rxqs_n; ++i) {
 839                 struct mlx5_rxq_ctrl *rxq_ctrl;
 840                 unsigned int j;
 841
 842                 if (!(*priv->rxqs)[i])
 843                         continue;
 844                 rxq_ctrl = container_of((*priv->rxqs)[i],
 845                                         struct mlx5_rxq_ctrl, rxq);
 846                 rxq_ctrl->flow_mark_n = 0;
 847                 rxq_ctrl->rxq.mark = 0;
 848                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
 849                         rxq_ctrl->flow_tunnels_n[j] = 0;
 850                 rxq_ctrl->rxq.tunnel = 0;
 851         }
 852 }
 853
 854 /*
 855  * return a pointer to the desired action in the list of actions.
 856  *
 857  * @param[in] actions
 858  *   The list of actions to search the action in.
 859  * @param[in] action
 860  *   The action to find.
 861  *
 862  * @return
 863  *   Pointer to the action in the list, if found. NULL otherwise.
 864  */
 865 const struct rte_flow_action *
 866 mlx5_flow_find_action(const struct rte_flow_action *actions,
 867                       enum rte_flow_action_type action)
 868 {
 869         if (actions == NULL)
 870                 return NULL;
 871         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
 872                 if (actions->type == action)
 873                         return actions;
 874         return NULL;
 875 }
 876
 877 /*
 878  * Validate the flag action.
 879  *
 880  * @param[in] action_flags
 881  *   Bit-fields that holds the actions detected until now.
 882  * @param[in] attr
 883  *   Attributes of flow that includes this action.
 884  * @param[out] error
 885  *   Pointer to error structure.
 886  *
 887  * @return
 888  *   0 on success, a negative errno value otherwise and rte_errno is set.
 889  */
 890 int
 891 mlx5_flow_validate_action_flag(uint64_t action_flags,
 892                                const struct rte_flow_attr *attr,
 893                                struct rte_flow_error *error)
 894 {
 895
 896         if (action_flags & MLX5_FLOW_ACTION_DROP)
 897                 return rte_flow_error_set(error, EINVAL,
 898                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 899                                           "can't drop and flag in same flow");
 900         if (action_flags & MLX5_FLOW_ACTION_MARK)
 901                 return rte_flow_error_set(error, EINVAL,
 902                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 903                                           "can't mark and flag in same flow");
 904         if (action_flags & MLX5_FLOW_ACTION_FLAG)
 905                 return rte_flow_error_set(error, EINVAL,
 906                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 907                                           "can't have 2 flag"
 908                                           " actions in same flow");
 909         if (attr->egress)
 910                 return rte_flow_error_set(error, ENOTSUP,
 911                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 912                                           "flag action not supported for "
 913                                           "egress");
 914         return 0;
 915 }
 916
 917 /*
 918  * Validate the mark action.
 919  *
 920  * @param[in] action
 921  *   Pointer to the queue action.
 922  * @param[in] action_flags
 923  *   Bit-fields that holds the actions detected until now.
 924  * @param[in] attr
 925  *   Attributes of flow that includes this action.
 926  * @param[out] error
 927  *   Pointer to error structure.
 928  *
 929  * @return
 930  *   0 on success, a negative errno value otherwise and rte_errno is set.
 931  */
 932 int
 933 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
 934                                uint64_t action_flags,
 935                                const struct rte_flow_attr *attr,
 936                                struct rte_flow_error *error)
 937 {
 938         const struct rte_flow_action_mark *mark = action->conf;
 939
 940         if (!mark)
 941                 return rte_flow_error_set(error, EINVAL,
 942                                           RTE_FLOW_ERROR_TYPE_ACTION,
 943                                           action,
 944                                           "configuration cannot be null");
 945         if (mark->id >= MLX5_FLOW_MARK_MAX)
 946                 return rte_flow_error_set(error, EINVAL,
 947                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
 948                                           &mark->id,
 949                                           "mark id must in 0 <= id < "
 950                                           RTE_STR(MLX5_FLOW_MARK_MAX));
 951         if (action_flags & MLX5_FLOW_ACTION_DROP)
 952                 return rte_flow_error_set(error, EINVAL,
 953                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 954                                           "can't drop and mark in same flow");
 955         if (action_flags & MLX5_FLOW_ACTION_FLAG)
 956                 return rte_flow_error_set(error, EINVAL,
 957                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 958                                           "can't flag and mark in same flow");
 959         if (action_flags & MLX5_FLOW_ACTION_MARK)
 960                 return rte_flow_error_set(error, EINVAL,
 961                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 962                                           "can't have 2 mark actions in same"
 963                                           " flow");
 964         if (attr->egress)
 965                 return rte_flow_error_set(error, ENOTSUP,
 966                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
 967                                           "mark action not supported for "
 968                                           "egress");
 969         return 0;
 970 }
 971
 972 /*
 973  * Validate the drop action.
 974  *
 975  * @param[in] action_flags
 976  *   Bit-fields that holds the actions detected until now.
 977  * @param[in] attr
 978  *   Attributes of flow that includes this action.
 979  * @param[out] error
 980  *   Pointer to error structure.
 981  *
 982  * @return
 983  *   0 on success, a negative errno value otherwise and rte_errno is set.
 984  */
 985 int
 986 mlx5_flow_validate_action_drop(uint64_t action_flags,
 987                                const struct rte_flow_attr *attr,
 988                                struct rte_flow_error *error)
 989 {
 990         if (action_flags & MLX5_FLOW_ACTION_FLAG)
 991                 return rte_flow_error_set(error, EINVAL,
 992                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 993                                           "can't drop and flag in same flow");
 994         if (action_flags & MLX5_FLOW_ACTION_MARK)
 995                 return rte_flow_error_set(error, EINVAL,
 996                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 997                                           "can't drop and mark in same flow");
 998         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
 999                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
1000                 return rte_flow_error_set(error, EINVAL,
1001                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1002                                           "can't have 2 fate actions in"
1003                                           " same flow");
1004         if (attr->egress)
1005                 return rte_flow_error_set(error, ENOTSUP,
1006                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1007                                           "drop action not supported for "
1008                                           "egress");
1009         return 0;
1010 }
1011
1012 /*
1013  * Validate the queue action.
1014  *
1015  * @param[in] action
1016  *   Pointer to the queue action.
1017  * @param[in] action_flags
1018  *   Bit-fields that holds the actions detected until now.
1019  * @param[in] dev
1020  *   Pointer to the Ethernet device structure.
1021  * @param[in] attr
1022  *   Attributes of flow that includes this action.
1023  * @param[out] error
1024  *   Pointer to error structure.
1025  *
1026  * @return
1027  *   0 on success, a negative errno value otherwise and rte_errno is set.
1028  */
1029 int
1030 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1031                                 uint64_t action_flags,
1032                                 struct rte_eth_dev *dev,
1033                                 const struct rte_flow_attr *attr,
1034                                 struct rte_flow_error *error)
1035 {
1036         struct mlx5_priv *priv = dev->data->dev_private;
1037         const struct rte_flow_action_queue *queue = action->conf;
1038
1039         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1040                 return rte_flow_error_set(error, EINVAL,
1041                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1042                                           "can't have 2 fate actions in"
1043                                           " same flow");
1044         if (!priv->rxqs_n)
1045                 return rte_flow_error_set(error, EINVAL,
1046                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1047                                           NULL, "No Rx queues configured");
1048         if (queue->index >= priv->rxqs_n)
1049                 return rte_flow_error_set(error, EINVAL,
1050                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1051                                           &queue->index,
1052                                           "queue index out of range");
1053         if (!(*priv->rxqs)[queue->index])
1054                 return rte_flow_error_set(error, EINVAL,
1055                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1056                                           &queue->index,
1057                                           "queue is not configured");
1058         if (attr->egress)
1059                 return rte_flow_error_set(error, ENOTSUP,
1060                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1061                                           "queue action not supported for "
1062                                           "egress");
1063         return 0;
1064 }
1065
1066 /*
1067  * Validate the rss action.
1068  *
1069  * @param[in] action
1070  *   Pointer to the queue action.
1071  * @param[in] action_flags
1072  *   Bit-fields that holds the actions detected until now.
1073  * @param[in] dev
1074  *   Pointer to the Ethernet device structure.
1075  * @param[in] attr
1076  *   Attributes of flow that includes this action.
1077  * @param[in] item_flags
1078  *   Items that were detected.
1079  * @param[out] error
1080  *   Pointer to error structure.
1081  *
1082  * @return
1083  *   0 on success, a negative errno value otherwise and rte_errno is set.
1084  */
1085 int
1086 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1087                               uint64_t action_flags,
1088                               struct rte_eth_dev *dev,
1089                               const struct rte_flow_attr *attr,
1090                               uint64_t item_flags,
1091                               struct rte_flow_error *error)
1092 {
1093         struct mlx5_priv *priv = dev->data->dev_private;
1094         const struct rte_flow_action_rss *rss = action->conf;
1095         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1096         unsigned int i;
1097
1098         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1099                 return rte_flow_error_set(error, EINVAL,
1100                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1101                                           "can't have 2 fate actions"
1102                                           " in same flow");
1103         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1104             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1105                 return rte_flow_error_set(error, ENOTSUP,
1106                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1107                                           &rss->func,
1108                                           "RSS hash function not supported");
1109 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1110         if (rss->level > 2)
1111 #else
1112         if (rss->level > 1)
1113 #endif
1114                 return rte_flow_error_set(error, ENOTSUP,
1115                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1116                                           &rss->level,
1117                                           "tunnel RSS is not supported");
1118         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1119         if (rss->key_len == 0 && rss->key != NULL)
1120                 return rte_flow_error_set(error, ENOTSUP,
1121                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1122                                           &rss->key_len,
1123                                           "RSS hash key length 0");
1124         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1125                 return rte_flow_error_set(error, ENOTSUP,
1126                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1127                                           &rss->key_len,
1128                                           "RSS hash key too small");
1129         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1130                 return rte_flow_error_set(error, ENOTSUP,
1131                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1132                                           &rss->key_len,
1133                                           "RSS hash key too large");
1134         if (rss->queue_num > priv->config.ind_table_max_size)
1135                 return rte_flow_error_set(error, ENOTSUP,
1136                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1137                                           &rss->queue_num,
1138                                           "number of queues too large");
1139         if (rss->types & MLX5_RSS_HF_MASK)
1140                 return rte_flow_error_set(error, ENOTSUP,
1141                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1142                                           &rss->types,
1143                                           "some RSS protocols are not"
1144                                           " supported");
1145         if (!priv->rxqs_n)
1146                 return rte_flow_error_set(error, EINVAL,
1147                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1148                                           NULL, "No Rx queues configured");
1149         if (!rss->queue_num)
1150                 return rte_flow_error_set(error, EINVAL,
1151                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1152                                           NULL, "No queues configured");
1153         for (i = 0; i != rss->queue_num; ++i) {
1154                 if (!(*priv->rxqs)[rss->queue[i]])
1155                         return rte_flow_error_set
1156                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1157                                  &rss->queue[i], "queue is not configured");
1158         }
1159         if (attr->egress)
1160                 return rte_flow_error_set(error, ENOTSUP,
1161                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1162                                           "rss action not supported for "
1163                                           "egress");
1164         if (rss->level > 1 &&  !tunnel)
1165                 return rte_flow_error_set(error, EINVAL,
1166                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1167                                           "inner RSS is not supported for "
1168                                           "non-tunnel flows");
1169         return 0;
1170 }
1171
1172 /*
1173  * Validate the count action.
1174  *
1175  * @param[in] dev
1176  *   Pointer to the Ethernet device structure.
1177  * @param[in] attr
1178  *   Attributes of flow that includes this action.
1179  * @param[out] error
1180  *   Pointer to error structure.
1181  *
1182  * @return
1183  *   0 on success, a negative errno value otherwise and rte_errno is set.
1184  */
1185 int
1186 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1187                                 const struct rte_flow_attr *attr,
1188                                 struct rte_flow_error *error)
1189 {
1190         if (attr->egress)
1191                 return rte_flow_error_set(error, ENOTSUP,
1192                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1193                                           "count action not supported for "
1194                                           "egress");
1195         return 0;
1196 }
1197
1198 /**
1199  * Verify the @p attributes will be correctly understood by the NIC and store
1200  * them in the @p flow if everything is correct.
1201  *
1202  * @param[in] dev
1203  *   Pointer to the Ethernet device structure.
1204  * @param[in] attributes
1205  *   Pointer to flow attributes
1206  * @param[out] error
1207  *   Pointer to error structure.
1208  *
1209  * @return
1210  *   0 on success, a negative errno value otherwise and rte_errno is set.
1211  */
1212 int
1213 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1214                               const struct rte_flow_attr *attributes,
1215                               struct rte_flow_error *error)
1216 {
1217         struct mlx5_priv *priv = dev->data->dev_private;
1218         uint32_t priority_max = priv->config.flow_prio - 1;
1219
1220         if (attributes->group)
1221                 return rte_flow_error_set(error, ENOTSUP,
1222                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1223                                           NULL, "groups is not supported");
1224         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
1225             attributes->priority >= priority_max)
1226                 return rte_flow_error_set(error, ENOTSUP,
1227                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1228                                           NULL, "priority out of range");
1229         if (attributes->egress)
1230                 return rte_flow_error_set(error, ENOTSUP,
1231                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1232                                           "egress is not supported");
1233         if (attributes->transfer && !priv->config.dv_esw_en)
1234                 return rte_flow_error_set(error, ENOTSUP,
1235                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1236                                           NULL, "transfer is not supported");
1237         if (!attributes->ingress)
1238                 return rte_flow_error_set(error, EINVAL,
1239                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1240                                           NULL,
1241                                           "ingress attribute is mandatory");
1242         return 0;
1243 }
1244
1245 /**
1246  * Validate ICMP6 item.
1247  *
1248  * @param[in] item
1249  *   Item specification.
1250  * @param[in] item_flags
1251  *   Bit-fields that holds the items detected until now.
1252  * @param[out] error
1253  *   Pointer to error structure.
1254  *
1255  * @return
1256  *   0 on success, a negative errno value otherwise and rte_errno is set.
1257  */
1258 int
1259 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1260                                uint64_t item_flags,
1261                                uint8_t target_protocol,
1262                                struct rte_flow_error *error)
1263 {
1264         const struct rte_flow_item_icmp6 *mask = item->mask;
1265         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1266         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1267                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1268         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1269                                       MLX5_FLOW_LAYER_OUTER_L4;
1270         int ret;
1271
1272         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1273                 return rte_flow_error_set(error, EINVAL,
1274                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1275                                           "protocol filtering not compatible"
1276                                           " with ICMP6 layer");
1277         if (!(item_flags & l3m))
1278                 return rte_flow_error_set(error, EINVAL,
1279                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1280                                           "IPv6 is mandatory to filter on"
1281                                           " ICMP6");
1282         if (item_flags & l4m)
1283                 return rte_flow_error_set(error, EINVAL,
1284                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1285                                           "multiple L4 layers not supported");
1286         if (!mask)
1287                 mask = &rte_flow_item_icmp6_mask;
1288         ret = mlx5_flow_item_acceptable
1289                 (item, (const uint8_t *)mask,
1290                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1291                  sizeof(struct rte_flow_item_icmp6), error);
1292         if (ret < 0)
1293                 return ret;
1294         return 0;
1295 }
1296
1297 /**
1298  * Validate ICMP item.
1299  *
1300  * @param[in] item
1301  *   Item specification.
1302  * @param[in] item_flags
1303  *   Bit-fields that holds the items detected until now.
1304  * @param[out] error
1305  *   Pointer to error structure.
1306  *
1307  * @return
1308  *   0 on success, a negative errno value otherwise and rte_errno is set.
1309  */
1310 int
1311 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1312                              uint64_t item_flags,
1313                              uint8_t target_protocol,
1314                              struct rte_flow_error *error)
1315 {
1316         const struct rte_flow_item_icmp *mask = item->mask;
1317         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1318         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1319                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1320         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1321                                       MLX5_FLOW_LAYER_OUTER_L4;
1322         int ret;
1323
1324         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1325                 return rte_flow_error_set(error, EINVAL,
1326                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1327                                           "protocol filtering not compatible"
1328                                           " with ICMP layer");
1329         if (!(item_flags & l3m))
1330                 return rte_flow_error_set(error, EINVAL,
1331                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1332                                           "IPv4 is mandatory to filter"
1333                                           " on ICMP");
1334         if (item_flags & l4m)
1335                 return rte_flow_error_set(error, EINVAL,
1336                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1337                                           "multiple L4 layers not supported");
1338         if (!mask)
1339                 mask = &rte_flow_item_icmp_mask;
1340         ret = mlx5_flow_item_acceptable
1341                 (item, (const uint8_t *)mask,
1342                  (const uint8_t *)&rte_flow_item_icmp_mask,
1343                  sizeof(struct rte_flow_item_icmp), error);
1344         if (ret < 0)
1345                 return ret;
1346         return 0;
1347 }
1348
1349 /**
1350  * Validate Ethernet item.
1351  *
1352  * @param[in] item
1353  *   Item specification.
1354  * @param[in] item_flags
1355  *   Bit-fields that holds the items detected until now.
1356  * @param[out] error
1357  *   Pointer to error structure.
1358  *
1359  * @return
1360  *   0 on success, a negative errno value otherwise and rte_errno is set.
1361  */
1362 int
1363 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1364                             uint64_t item_flags,
1365                             struct rte_flow_error *error)
1366 {
1367         const struct rte_flow_item_eth *mask = item->mask;
1368         const struct rte_flow_item_eth nic_mask = {
1369                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1370                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1371                 .type = RTE_BE16(0xffff),
1372         };
1373         int ret;
1374         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1375         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1376                                        MLX5_FLOW_LAYER_OUTER_L2;
1377
1378         if (item_flags & ethm)
1379                 return rte_flow_error_set(error, ENOTSUP,
1380                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1381                                           "multiple L2 layers not supported");
1382         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
1383             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
1384                 return rte_flow_error_set(error, EINVAL,
1385                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1386                                           "L2 layer should not follow "
1387                                           "L3 layers");
1388         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
1389             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
1390                 return rte_flow_error_set(error, EINVAL,
1391                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1392                                           "L2 layer should not follow VLAN");
1393         if (!mask)
1394                 mask = &rte_flow_item_eth_mask;
1395         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1396                                         (const uint8_t *)&nic_mask,
1397                                         sizeof(struct rte_flow_item_eth),
1398                                         error);
1399         return ret;
1400 }
1401
1402 /**
1403  * Validate VLAN item.
1404  *
1405  * @param[in] item
1406  *   Item specification.
1407  * @param[in] item_flags
1408  *   Bit-fields that holds the items detected until now.
1409  * @param[in] dev
1410  *   Ethernet device flow is being created on.
1411  * @param[out] error
1412  *   Pointer to error structure.
1413  *
1414  * @return
1415  *   0 on success, a negative errno value otherwise and rte_errno is set.
1416  */
1417 int
1418 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1419                              uint64_t item_flags,
1420                              struct rte_eth_dev *dev,
1421                              struct rte_flow_error *error)
1422 {
1423         const struct rte_flow_item_vlan *spec = item->spec;
1424         const struct rte_flow_item_vlan *mask = item->mask;
1425         const struct rte_flow_item_vlan nic_mask = {
1426                 .tci = RTE_BE16(UINT16_MAX),
1427                 .inner_type = RTE_BE16(UINT16_MAX),
1428         };
1429         uint16_t vlan_tag = 0;
1430         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1431         int ret;
1432         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1433                                         MLX5_FLOW_LAYER_INNER_L4) :
1434                                        (MLX5_FLOW_LAYER_OUTER_L3 |
1435                                         MLX5_FLOW_LAYER_OUTER_L4);
1436         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1437                                         MLX5_FLOW_LAYER_OUTER_VLAN;
1438
1439         if (item_flags & vlanm)
1440                 return rte_flow_error_set(error, EINVAL,
1441                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1442                                           "multiple VLAN layers not supported");
1443         else if ((item_flags & l34m) != 0)
1444                 return rte_flow_error_set(error, EINVAL,
1445                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1446                                           "VLAN cannot follow L3/L4 layer");
1447         if (!mask)
1448                 mask = &rte_flow_item_vlan_mask;
1449         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1450                                         (const uint8_t *)&nic_mask,
1451                                         sizeof(struct rte_flow_item_vlan),
1452                                         error);
1453         if (ret)
1454                 return ret;
1455         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
1456                 struct mlx5_priv *priv = dev->data->dev_private;
1457
1458                 if (priv->vmwa_context) {
1459                         /*
1460                          * Non-NULL context means we have a virtual machine
1461                          * and SR-IOV enabled, we have to create VLAN interface
1462                          * to make hypervisor to setup E-Switch vport
1463                          * context correctly. We avoid creating the multiple
1464                          * VLAN interfaces, so we cannot support VLAN tag mask.
1465                          */
1466                         return rte_flow_error_set(error, EINVAL,
1467                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1468                                                   item,
1469                                                   "VLAN tag mask is not"
1470                                                   " supported in virtual"
1471                                                   " environment");
1472                 }
1473         }
1474         if (spec) {
1475                 vlan_tag = spec->tci;
1476                 vlan_tag &= mask->tci;
1477         }
1478         /*
1479          * From verbs perspective an empty VLAN is equivalent
1480          * to a packet without VLAN layer.
1481          */
1482         if (!vlan_tag)
1483                 return rte_flow_error_set(error, EINVAL,
1484                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1485                                           item->spec,
1486                                           "VLAN cannot be empty");
1487         return 0;
1488 }
1489
1490 /**
1491  * Validate IPV4 item.
1492  *
1493  * @param[in] item
1494  *   Item specification.
1495  * @param[in] item_flags
1496  *   Bit-fields that holds the items detected until now.
1497  * @param[in] acc_mask
1498  *   Acceptable mask, if NULL default internal default mask
1499  *   will be used to check whether item fields are supported.
1500  * @param[out] error
1501  *   Pointer to error structure.
1502  *
1503  * @return
1504  *   0 on success, a negative errno value otherwise and rte_errno is set.
1505  */
1506 int
1507 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
1508                              uint64_t item_flags,
1509                              uint64_t last_item,
1510                              uint16_t ether_type,
1511                              const struct rte_flow_item_ipv4 *acc_mask,
1512                              struct rte_flow_error *error)
1513 {
1514         const struct rte_flow_item_ipv4 *mask = item->mask;
1515         const struct rte_flow_item_ipv4 *spec = item->spec;
1516         const struct rte_flow_item_ipv4 nic_mask = {
1517                 .hdr = {
1518                         .src_addr = RTE_BE32(0xffffffff),
1519                         .dst_addr = RTE_BE32(0xffffffff),
1520                         .type_of_service = 0xff,
1521                         .next_proto_id = 0xff,
1522                 },
1523         };
1524         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1525         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1526                                       MLX5_FLOW_LAYER_OUTER_L3;
1527         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1528                                       MLX5_FLOW_LAYER_OUTER_L4;
1529         int ret;
1530         uint8_t next_proto = 0xFF;
1531         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
1532                                   MLX5_FLOW_LAYER_OUTER_VLAN |
1533                                   MLX5_FLOW_LAYER_INNER_VLAN);
1534
1535         if ((last_item & l2_vlan) && ether_type &&
1536             ether_type != RTE_ETHER_TYPE_IPV4)
1537                 return rte_flow_error_set(error, EINVAL,
1538                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1539                                           "IPv4 cannot follow L2/VLAN layer "
1540                                           "which ether type is not IPv4");
1541         if (item_flags & MLX5_FLOW_LAYER_IPIP) {
1542                 if (mask && spec)
1543                         next_proto = mask->hdr.next_proto_id &
1544                                      spec->hdr.next_proto_id;
1545                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1546                         return rte_flow_error_set(error, EINVAL,
1547                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1548                                                   item,
1549                                                   "multiple tunnel "
1550                                                   "not supported");
1551         }
1552         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
1553                 return rte_flow_error_set(error, EINVAL,
1554                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1555                                           "wrong tunnel type - IPv6 specified "
1556                                           "but IPv4 item provided");
1557         if (item_flags & l3m)
1558                 return rte_flow_error_set(error, ENOTSUP,
1559                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1560                                           "multiple L3 layers not supported");
1561         else if (item_flags & l4m)
1562                 return rte_flow_error_set(error, EINVAL,
1563                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1564                                           "L3 cannot follow an L4 layer.");
1565         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1566                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1567                 return rte_flow_error_set(error, EINVAL,
1568                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1569                                           "L3 cannot follow an NVGRE layer.");
1570         if (!mask)
1571                 mask = &rte_flow_item_ipv4_mask;
1572         else if (mask->hdr.next_proto_id != 0 &&
1573                  mask->hdr.next_proto_id != 0xff)
1574                 return rte_flow_error_set(error, EINVAL,
1575                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
1576                                           "partial mask is not supported"
1577                                           " for protocol");
1578         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1579                                         acc_mask ? (const uint8_t *)acc_mask
1580                                                  : (const uint8_t *)&nic_mask,
1581                                         sizeof(struct rte_flow_item_ipv4),
1582                                         error);
1583         if (ret < 0)
1584                 return ret;
1585         return 0;
1586 }
1587
1588 /**
1589  * Validate IPV6 item.
1590  *
1591  * @param[in] item
1592  *   Item specification.
1593  * @param[in] item_flags
1594  *   Bit-fields that holds the items detected until now.
1595  * @param[in] acc_mask
1596  *   Acceptable mask, if NULL default internal default mask
1597  *   will be used to check whether item fields are supported.
1598  * @param[out] error
1599  *   Pointer to error structure.
1600  *
1601  * @return
1602  *   0 on success, a negative errno value otherwise and rte_errno is set.
1603  */
1604 int
1605 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
1606                              uint64_t item_flags,
1607                              uint64_t last_item,
1608                              uint16_t ether_type,
1609                              const struct rte_flow_item_ipv6 *acc_mask,
1610                              struct rte_flow_error *error)
1611 {
1612         const struct rte_flow_item_ipv6 *mask = item->mask;
1613         const struct rte_flow_item_ipv6 *spec = item->spec;
1614         const struct rte_flow_item_ipv6 nic_mask = {
1615                 .hdr = {
1616                         .src_addr =
1617                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
1618                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
1619                         .dst_addr =
1620                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
1621                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
1622                         .vtc_flow = RTE_BE32(0xffffffff),
1623                         .proto = 0xff,
1624                         .hop_limits = 0xff,
1625                 },
1626         };
1627         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1628         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1629                                       MLX5_FLOW_LAYER_OUTER_L3;
1630         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1631                                       MLX5_FLOW_LAYER_OUTER_L4;
1632         int ret;
1633         uint8_t next_proto = 0xFF;
1634         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
1635                                   MLX5_FLOW_LAYER_OUTER_VLAN |
1636                                   MLX5_FLOW_LAYER_INNER_VLAN);
1637
1638         if ((last_item & l2_vlan) && ether_type &&
1639             ether_type != RTE_ETHER_TYPE_IPV6)
1640                 return rte_flow_error_set(error, EINVAL,
1641                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1642                                           "IPv6 cannot follow L2/VLAN layer "
1643                                           "which ether type is not IPv6");
1644         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
1645                 if (mask && spec)
1646                         next_proto = mask->hdr.proto & spec->hdr.proto;
1647                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1648                         return rte_flow_error_set(error, EINVAL,
1649                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1650                                                   item,
1651                                                   "multiple tunnel "
1652                                                   "not supported");
1653         }
1654         if (item_flags & MLX5_FLOW_LAYER_IPIP)
1655                 return rte_flow_error_set(error, EINVAL,
1656                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1657                                           "wrong tunnel type - IPv4 specified "
1658                                           "but IPv6 item provided");
1659         if (item_flags & l3m)
1660                 return rte_flow_error_set(error, ENOTSUP,
1661                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1662                                           "multiple L3 layers not supported");
1663         else if (item_flags & l4m)
1664                 return rte_flow_error_set(error, EINVAL,
1665                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1666                                           "L3 cannot follow an L4 layer.");
1667         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1668                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1669                 return rte_flow_error_set(error, EINVAL,
1670                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1671                                           "L3 cannot follow an NVGRE layer.");
1672         if (!mask)
1673                 mask = &rte_flow_item_ipv6_mask;
1674         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1675                                         acc_mask ? (const uint8_t *)acc_mask
1676                                                  : (const uint8_t *)&nic_mask,
1677                                         sizeof(struct rte_flow_item_ipv6),
1678                                         error);
1679         if (ret < 0)
1680                 return ret;
1681         return 0;
1682 }
1683
1684 /**
1685  * Validate UDP item.
1686  *
1687  * @param[in] item
1688  *   Item specification.
1689  * @param[in] item_flags
1690  *   Bit-fields that holds the items detected until now.
1691  * @param[in] target_protocol
1692  *   The next protocol in the previous item.
1693  * @param[in] flow_mask
1694  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
1695  * @param[out] error
1696  *   Pointer to error structure.
1697  *
1698  * @return
1699  *   0 on success, a negative errno value otherwise and rte_errno is set.
1700  */
1701 int
1702 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
1703                             uint64_t item_flags,
1704                             uint8_t target_protocol,
1705                             struct rte_flow_error *error)
1706 {
1707         const struct rte_flow_item_udp *mask = item->mask;
1708         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1709         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1710                                       MLX5_FLOW_LAYER_OUTER_L3;
1711         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1712                                       MLX5_FLOW_LAYER_OUTER_L4;
1713         int ret;
1714
1715         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
1716                 return rte_flow_error_set(error, EINVAL,
1717                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1718                                           "protocol filtering not compatible"
1719                                           " with UDP layer");
1720         if (!(item_flags & l3m))
1721                 return rte_flow_error_set(error, EINVAL,
1722                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1723                                           "L3 is mandatory to filter on L4");
1724         if (item_flags & l4m)
1725                 return rte_flow_error_set(error, EINVAL,
1726                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1727                                           "multiple L4 layers not supported");
1728         if (!mask)
1729                 mask = &rte_flow_item_udp_mask;
1730         ret = mlx5_flow_item_acceptable
1731                 (item, (const uint8_t *)mask,
1732                  (const uint8_t *)&rte_flow_item_udp_mask,
1733                  sizeof(struct rte_flow_item_udp), error);
1734         if (ret < 0)
1735                 return ret;
1736         return 0;
1737 }
1738
1739 /**
1740  * Validate TCP item.
1741  *
1742  * @param[in] item
1743  *   Item specification.
1744  * @param[in] item_flags
1745  *   Bit-fields that holds the items detected until now.
1746  * @param[in] target_protocol
1747  *   The next protocol in the previous item.
1748  * @param[out] error
1749  *   Pointer to error structure.
1750  *
1751  * @return
1752  *   0 on success, a negative errno value otherwise and rte_errno is set.
1753  */
1754 int
1755 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
1756                             uint64_t item_flags,
1757                             uint8_t target_protocol,
1758                             const struct rte_flow_item_tcp *flow_mask,
1759                             struct rte_flow_error *error)
1760 {
1761         const struct rte_flow_item_tcp *mask = item->mask;
1762         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1763         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1764                                       MLX5_FLOW_LAYER_OUTER_L3;
1765         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1766                                       MLX5_FLOW_LAYER_OUTER_L4;
1767         int ret;
1768
1769         assert(flow_mask);
1770         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
1771                 return rte_flow_error_set(error, EINVAL,
1772                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1773                                           "protocol filtering not compatible"
1774                                           " with TCP layer");
1775         if (!(item_flags & l3m))
1776                 return rte_flow_error_set(error, EINVAL,
1777                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1778                                           "L3 is mandatory to filter on L4");
1779         if (item_flags & l4m)
1780                 return rte_flow_error_set(error, EINVAL,
1781                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1782                                           "multiple L4 layers not supported");
1783         if (!mask)
1784                 mask = &rte_flow_item_tcp_mask;
1785         ret = mlx5_flow_item_acceptable
1786                 (item, (const uint8_t *)mask,
1787                  (const uint8_t *)flow_mask,
1788                  sizeof(struct rte_flow_item_tcp), error);
1789         if (ret < 0)
1790                 return ret;
1791         return 0;
1792 }
1793
1794 /**
1795  * Validate VXLAN item.
1796  *
1797  * @param[in] item
1798  *   Item specification.
1799  * @param[in] item_flags
1800  *   Bit-fields that holds the items detected until now.
1801  * @param[in] target_protocol
1802  *   The next protocol in the previous item.
1803  * @param[out] error
1804  *   Pointer to error structure.
1805  *
1806  * @return
1807  *   0 on success, a negative errno value otherwise and rte_errno is set.
1808  */
1809 int
1810 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
1811                               uint64_t item_flags,
1812                               struct rte_flow_error *error)
1813 {
1814         const struct rte_flow_item_vxlan *spec = item->spec;
1815         const struct rte_flow_item_vxlan *mask = item->mask;
1816         int ret;
1817         union vni {
1818                 uint32_t vlan_id;
1819                 uint8_t vni[4];
1820         } id = { .vlan_id = 0, };
1821         uint32_t vlan_id = 0;
1822
1823
1824         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1825                 return rte_flow_error_set(error, ENOTSUP,
1826                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1827                                           "multiple tunnel layers not"
1828                                           " supported");
1829         /*
1830          * Verify only UDPv4 is present as defined in
1831          * https://tools.ietf.org/html/rfc7348
1832          */
1833         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1834                 return rte_flow_error_set(error, EINVAL,
1835                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1836                                           "no outer UDP layer found");
1837         if (!mask)
1838                 mask = &rte_flow_item_vxlan_mask;
1839         ret = mlx5_flow_item_acceptable
1840                 (item, (const uint8_t *)mask,
1841                  (const uint8_t *)&rte_flow_item_vxlan_mask,
1842                  sizeof(struct rte_flow_item_vxlan),
1843                  error);
1844         if (ret < 0)
1845                 return ret;
1846         if (spec) {
1847                 memcpy(&id.vni[1], spec->vni, 3);
1848                 vlan_id = id.vlan_id;
1849                 memcpy(&id.vni[1], mask->vni, 3);
1850                 vlan_id &= id.vlan_id;
1851         }
1852         /*
1853          * Tunnel id 0 is equivalent as not adding a VXLAN layer, if
1854          * only this layer is defined in the Verbs specification it is
1855          * interpreted as wildcard and all packets will match this
1856          * rule, if it follows a full stack layer (ex: eth / ipv4 /
1857          * udp), all packets matching the layers before will also
1858          * match this rule.  To avoid such situation, VNI 0 is
1859          * currently refused.
1860          */
1861         if (!vlan_id)
1862                 return rte_flow_error_set(error, ENOTSUP,
1863                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1864                                           "VXLAN vni cannot be 0");
1865         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1866                 return rte_flow_error_set(error, ENOTSUP,
1867                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1868                                           "VXLAN tunnel must be fully defined");
1869         return 0;
1870 }
1871
1872 /**
1873  * Validate VXLAN_GPE item.
1874  *
1875  * @param[in] item
1876  *   Item specification.
1877  * @param[in] item_flags
1878  *   Bit-fields that holds the items detected until now.
1879  * @param[in] priv
1880  *   Pointer to the private data structure.
1881  * @param[in] target_protocol
1882  *   The next protocol in the previous item.
1883  * @param[out] error
1884  *   Pointer to error structure.
1885  *
1886  * @return
1887  *   0 on success, a negative errno value otherwise and rte_errno is set.
1888  */
1889 int
1890 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
1891                                   uint64_t item_flags,
1892                                   struct rte_eth_dev *dev,
1893                                   struct rte_flow_error *error)
1894 {
1895         struct mlx5_priv *priv = dev->data->dev_private;
1896         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
1897         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
1898         int ret;
1899         union vni {
1900                 uint32_t vlan_id;
1901                 uint8_t vni[4];
1902         } id = { .vlan_id = 0, };
1903         uint32_t vlan_id = 0;
1904
1905         if (!priv->config.l3_vxlan_en)
1906                 return rte_flow_error_set(error, ENOTSUP,
1907                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1908                                           "L3 VXLAN is not enabled by device"
1909                                           " parameter and/or not configured in"
1910                                           " firmware");
1911         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1912                 return rte_flow_error_set(error, ENOTSUP,
1913                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1914                                           "multiple tunnel layers not"
1915                                           " supported");
1916         /*
1917          * Verify only UDPv4 is present as defined in
1918          * https://tools.ietf.org/html/rfc7348
1919          */
1920         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1921                 return rte_flow_error_set(error, EINVAL,
1922                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1923                                           "no outer UDP layer found");
1924         if (!mask)
1925                 mask = &rte_flow_item_vxlan_gpe_mask;
1926         ret = mlx5_flow_item_acceptable
1927                 (item, (const uint8_t *)mask,
1928                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
1929                  sizeof(struct rte_flow_item_vxlan_gpe),
1930                  error);
1931         if (ret < 0)
1932                 return ret;
1933         if (spec) {
1934                 if (spec->protocol)
1935                         return rte_flow_error_set(error, ENOTSUP,
1936                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1937                                                   item,
1938                                                   "VxLAN-GPE protocol"
1939                                                   " not supported");
1940                 memcpy(&id.vni[1], spec->vni, 3);
1941                 vlan_id = id.vlan_id;
1942                 memcpy(&id.vni[1], mask->vni, 3);
1943                 vlan_id &= id.vlan_id;
1944         }
1945         /*
1946          * Tunnel id 0 is equivalent as not adding a VXLAN layer, if only this
1947          * layer is defined in the Verbs specification it is interpreted as
1948          * wildcard and all packets will match this rule, if it follows a full
1949          * stack layer (ex: eth / ipv4 / udp), all packets matching the layers
1950          * before will also match this rule.  To avoid such situation, VNI 0
1951          * is currently refused.
1952          */
1953         if (!vlan_id)
1954                 return rte_flow_error_set(error, ENOTSUP,
1955                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1956                                           "VXLAN-GPE vni cannot be 0");
1957         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1958                 return rte_flow_error_set(error, ENOTSUP,
1959                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1960                                           "VXLAN-GPE tunnel must be fully"
1961                                           " defined");
1962         return 0;
1963 }
1964 /**
1965  * Validate GRE Key item.
1966  *
1967  * @param[in] item
1968  *   Item specification.
1969  * @param[in] item_flags
1970  *   Bit flags to mark detected items.
1971  * @param[in] gre_item
1972  *   Pointer to gre_item
1973  * @param[out] error
1974  *   Pointer to error structure.
1975  *
1976  * @return
1977  *   0 on success, a negative errno value otherwise and rte_errno is set.
1978  */
1979 int
1980 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
1981                                 uint64_t item_flags,
1982                                 const struct rte_flow_item *gre_item,
1983                                 struct rte_flow_error *error)
1984 {
1985         const rte_be32_t *mask = item->mask;
1986         int ret = 0;
1987         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
1988         const struct rte_flow_item_gre *gre_spec = gre_item->spec;
1989         const struct rte_flow_item_gre *gre_mask = gre_item->mask;
1990
1991         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
1992                 return rte_flow_error_set(error, ENOTSUP,
1993                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1994                                           "Multiple GRE key not support");
1995         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
1996                 return rte_flow_error_set(error, ENOTSUP,
1997                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1998                                           "No preceding GRE header");
1999         if (item_flags & MLX5_FLOW_LAYER_INNER)
2000                 return rte_flow_error_set(error, ENOTSUP,
2001                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2002                                           "GRE key following a wrong item");
2003         if (!gre_mask)
2004                 gre_mask = &rte_flow_item_gre_mask;
2005         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2006                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2007                 return rte_flow_error_set(error, EINVAL,
2008                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2009                                           "Key bit must be on");
2010
2011         if (!mask)
2012                 mask = &gre_key_default_mask;
2013         ret = mlx5_flow_item_acceptable
2014                 (item, (const uint8_t *)mask,
2015                  (const uint8_t *)&gre_key_default_mask,
2016                  sizeof(rte_be32_t), error);
2017         return ret;
2018 }
2019
2020 /**
2021  * Validate GRE item.
2022  *
2023  * @param[in] item
2024  *   Item specification.
2025  * @param[in] item_flags
2026  *   Bit flags to mark detected items.
2027  * @param[in] target_protocol
2028  *   The next protocol in the previous item.
2029  * @param[out] error
2030  *   Pointer to error structure.
2031  *
2032  * @return
2033  *   0 on success, a negative errno value otherwise and rte_errno is set.
2034  */
2035 int
2036 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2037                             uint64_t item_flags,
2038                             uint8_t target_protocol,
2039                             struct rte_flow_error *error)
2040 {
2041         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2042         const struct rte_flow_item_gre *mask = item->mask;
2043         int ret;
2044         const struct rte_flow_item_gre nic_mask = {
2045                 .c_rsvd0_ver = RTE_BE16(0xB000),
2046                 .protocol = RTE_BE16(UINT16_MAX),
2047         };
2048
2049         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2050                 return rte_flow_error_set(error, EINVAL,
2051                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2052                                           "protocol filtering not compatible"
2053                                           " with this GRE layer");
2054         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2055                 return rte_flow_error_set(error, ENOTSUP,
2056                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2057                                           "multiple tunnel layers not"
2058                                           " supported");
2059         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2060                 return rte_flow_error_set(error, ENOTSUP,
2061                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2062                                           "L3 Layer is missing");
2063         if (!mask)
2064                 mask = &rte_flow_item_gre_mask;
2065         ret = mlx5_flow_item_acceptable
2066                 (item, (const uint8_t *)mask,
2067                  (const uint8_t *)&nic_mask,
2068                  sizeof(struct rte_flow_item_gre), error);
2069         if (ret < 0)
2070                 return ret;
2071 #ifndef HAVE_MLX5DV_DR
2072 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2073         if (spec && (spec->protocol & mask->protocol))
2074                 return rte_flow_error_set(error, ENOTSUP,
2075                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2076                                           "without MPLS support the"
2077                                           " specification cannot be used for"
2078                                           " filtering");
2079 #endif
2080 #endif
2081         return 0;
2082 }
2083
2084 /**
2085  * Validate Geneve item.
2086  *
2087  * @param[in] item
2088  *   Item specification.
2089  * @param[in] itemFlags
2090  *   Bit-fields that holds the items detected until now.
2091  * @param[in] enPriv
2092  *   Pointer to the private data structure.
2093  * @param[out] error
2094  *   Pointer to error structure.
2095  *
2096  * @return
2097  *   0 on success, a negative errno value otherwise and rte_errno is set.
2098  */
2099
2100 int
2101 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2102                                uint64_t item_flags,
2103                                struct rte_eth_dev *dev,
2104                                struct rte_flow_error *error)
2105 {
2106         struct mlx5_priv *priv = dev->data->dev_private;
2107         const struct rte_flow_item_geneve *spec = item->spec;
2108         const struct rte_flow_item_geneve *mask = item->mask;
2109         int ret;
2110         uint16_t gbhdr;
2111         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2112                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2113         const struct rte_flow_item_geneve nic_mask = {
2114                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2115                 .vni = "\xff\xff\xff",
2116                 .protocol = RTE_BE16(UINT16_MAX),
2117         };
2118
2119         if (!(priv->config.hca_attr.flex_parser_protocols &
2120               MLX5_HCA_FLEX_GENEVE_ENABLED) ||
2121             !priv->config.hca_attr.tunnel_stateless_geneve_rx)
2122                 return rte_flow_error_set(error, ENOTSUP,
2123                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2124                                           "L3 Geneve is not enabled by device"
2125                                           " parameter and/or not configured in"
2126                                           " firmware");
2127         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2128                 return rte_flow_error_set(error, ENOTSUP,
2129                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2130                                           "multiple tunnel layers not"
2131                                           " supported");
2132         /*
2133          * Verify only UDPv4 is present as defined in
2134          * https://tools.ietf.org/html/rfc7348
2135          */
2136         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2137                 return rte_flow_error_set(error, EINVAL,
2138                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2139                                           "no outer UDP layer found");
2140         if (!mask)
2141                 mask = &rte_flow_item_geneve_mask;
2142         ret = mlx5_flow_item_acceptable
2143                                   (item, (const uint8_t *)mask,
2144                                    (const uint8_t *)&nic_mask,
2145                                    sizeof(struct rte_flow_item_geneve), error);
2146         if (ret)
2147                 return ret;
2148         if (spec) {
2149                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2150                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2151                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2152                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2153                         return rte_flow_error_set(error, ENOTSUP,
2154                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2155                                                   item,
2156                                                   "Geneve protocol unsupported"
2157                                                   " fields are being used");
2158                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2159                         return rte_flow_error_set
2160                                         (error, ENOTSUP,
2161                                          RTE_FLOW_ERROR_TYPE_ITEM,
2162                                          item,
2163                                          "Unsupported Geneve options length");
2164         }
2165         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2166                 return rte_flow_error_set
2167                                     (error, ENOTSUP,
2168                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2169                                      "Geneve tunnel must be fully defined");
2170         return 0;
2171 }
2172
2173 /**
2174  * Validate MPLS item.
2175  *
2176  * @param[in] dev
2177  *   Pointer to the rte_eth_dev structure.
2178  * @param[in] item
2179  *   Item specification.
2180  * @param[in] item_flags
2181  *   Bit-fields that holds the items detected until now.
2182  * @param[in] prev_layer
2183  *   The protocol layer indicated in previous item.
2184  * @param[out] error
2185  *   Pointer to error structure.
2186  *
2187  * @return
2188  *   0 on success, a negative errno value otherwise and rte_errno is set.
2189  */
2190 int
2191 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
2192                              const struct rte_flow_item *item __rte_unused,
2193                              uint64_t item_flags __rte_unused,
2194                              uint64_t prev_layer __rte_unused,
2195                              struct rte_flow_error *error)
2196 {
2197 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2198         const struct rte_flow_item_mpls *mask = item->mask;
2199         struct mlx5_priv *priv = dev->data->dev_private;
2200         int ret;
2201
2202         if (!priv->config.mpls_en)
2203                 return rte_flow_error_set(error, ENOTSUP,
2204                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2205                                           "MPLS not supported or"
2206                                           " disabled in firmware"
2207                                           " configuration.");
2208         /* MPLS over IP, UDP, GRE is allowed */
2209         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
2210                             MLX5_FLOW_LAYER_OUTER_L4_UDP |
2211                             MLX5_FLOW_LAYER_GRE)))
2212                 return rte_flow_error_set(error, EINVAL,
2213                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2214                                           "protocol filtering not compatible"
2215                                           " with MPLS layer");
2216         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
2217         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
2218             !(item_flags & MLX5_FLOW_LAYER_GRE))
2219                 return rte_flow_error_set(error, ENOTSUP,
2220                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2221                                           "multiple tunnel layers not"
2222                                           " supported");
2223         if (!mask)
2224                 mask = &rte_flow_item_mpls_mask;
2225         ret = mlx5_flow_item_acceptable
2226                 (item, (const uint8_t *)mask,
2227                  (const uint8_t *)&rte_flow_item_mpls_mask,
2228                  sizeof(struct rte_flow_item_mpls), error);
2229         if (ret < 0)
2230                 return ret;
2231         return 0;
2232 #endif
2233         return rte_flow_error_set(error, ENOTSUP,
2234                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
2235                                   "MPLS is not supported by Verbs, please"
2236                                   " update.");
2237 }
2238
2239 /**
2240  * Validate NVGRE item.
2241  *
2242  * @param[in] item
2243  *   Item specification.
2244  * @param[in] item_flags
2245  *   Bit flags to mark detected items.
2246  * @param[in] target_protocol
2247  *   The next protocol in the previous item.
2248  * @param[out] error
2249  *   Pointer to error structure.
2250  *
2251  * @return
2252  *   0 on success, a negative errno value otherwise and rte_errno is set.
2253  */
2254 int
2255 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
2256                               uint64_t item_flags,
2257                               uint8_t target_protocol,
2258                               struct rte_flow_error *error)
2259 {
2260         const struct rte_flow_item_nvgre *mask = item->mask;
2261         int ret;
2262
2263         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2264                 return rte_flow_error_set(error, EINVAL,
2265                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2266                                           "protocol filtering not compatible"
2267                                           " with this GRE layer");
2268         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2269                 return rte_flow_error_set(error, ENOTSUP,
2270                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2271                                           "multiple tunnel layers not"
2272                                           " supported");
2273         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2274                 return rte_flow_error_set(error, ENOTSUP,
2275                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2276                                           "L3 Layer is missing");
2277         if (!mask)
2278                 mask = &rte_flow_item_nvgre_mask;
2279         ret = mlx5_flow_item_acceptable
2280                 (item, (const uint8_t *)mask,
2281                  (const uint8_t *)&rte_flow_item_nvgre_mask,
2282                  sizeof(struct rte_flow_item_nvgre), error);
2283         if (ret < 0)
2284                 return ret;
2285         return 0;
2286 }
2287
2288 /* Allocate unique ID for the split Q/RSS subflows. */
2289 static uint32_t
2290 flow_qrss_get_id(struct rte_eth_dev *dev)
2291 {
2292         struct mlx5_priv *priv = dev->data->dev_private;
2293         uint32_t qrss_id, ret;
2294
2295         ret = mlx5_flow_id_get(priv->qrss_id_pool, &qrss_id);
2296         if (ret)
2297                 return 0;
2298         assert(qrss_id);
2299         return qrss_id;
2300 }
2301
2302 /* Free unique ID for the split Q/RSS subflows. */
2303 static void
2304 flow_qrss_free_id(struct rte_eth_dev *dev,  uint32_t qrss_id)
2305 {
2306         struct mlx5_priv *priv = dev->data->dev_private;
2307
2308         if (qrss_id)
2309                 mlx5_flow_id_release(priv->qrss_id_pool, qrss_id);
2310 }
2311
2312 /**
2313  * Release resource related QUEUE/RSS action split.
2314  *
2315  * @param dev
2316  *   Pointer to Ethernet device.
2317  * @param flow
2318  *   Flow to release id's from.
2319  */
2320 static void
2321 flow_mreg_split_qrss_release(struct rte_eth_dev *dev,
2322                              struct rte_flow *flow)
2323 {
2324         struct mlx5_flow *dev_flow;
2325
2326         LIST_FOREACH(dev_flow, &flow->dev_flows, next)
2327                 if (dev_flow->qrss_id)
2328                         flow_qrss_free_id(dev, dev_flow->qrss_id);
2329 }
2330
2331 /**
2332  * Release meter prefix suffix flow match id.
2333  *
2334  * @param dev
2335  *   Pointer to Ethernet device.
2336  * @param flow
2337  *   Flow to release id's from.
2338  */
2339 static void
2340 flow_meter_split_id_release(struct rte_eth_dev *dev,
2341                             struct rte_flow *flow)
2342 {
2343         struct mlx5_flow *dev_flow;
2344         struct mlx5_priv *priv = dev->data->dev_private;
2345
2346         LIST_FOREACH(dev_flow, &flow->dev_flows, next)
2347                 if (dev_flow->qrss_id)
2348                         mlx5_flow_id_release(priv->sh->flow_id_pool,
2349                                              dev_flow->mtr_flow_id);
2350 }
2351
2352 static int
2353 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
2354                    const struct rte_flow_attr *attr __rte_unused,
2355                    const struct rte_flow_item items[] __rte_unused,
2356                    const struct rte_flow_action actions[] __rte_unused,
2357                    bool external __rte_unused,
2358                    struct rte_flow_error *error)
2359 {
2360         return rte_flow_error_set(error, ENOTSUP,
2361                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2362 }
2363
2364 static struct mlx5_flow *
2365 flow_null_prepare(const struct rte_flow_attr *attr __rte_unused,
2366                   const struct rte_flow_item items[] __rte_unused,
2367                   const struct rte_flow_action actions[] __rte_unused,
2368                   struct rte_flow_error *error)
2369 {
2370         rte_flow_error_set(error, ENOTSUP,
2371                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2372         return NULL;
2373 }
2374
2375 static int
2376 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
2377                     struct mlx5_flow *dev_flow __rte_unused,
2378                     const struct rte_flow_attr *attr __rte_unused,
2379                     const struct rte_flow_item items[] __rte_unused,
2380                     const struct rte_flow_action actions[] __rte_unused,
2381                     struct rte_flow_error *error)
2382 {
2383         return rte_flow_error_set(error, ENOTSUP,
2384                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2385 }
2386
2387 static int
2388 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
2389                 struct rte_flow *flow __rte_unused,
2390                 struct rte_flow_error *error)
2391 {
2392         return rte_flow_error_set(error, ENOTSUP,
2393                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2394 }
2395
2396 static void
2397 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
2398                  struct rte_flow *flow __rte_unused)
2399 {
2400 }
2401
2402 static void
2403 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
2404                   struct rte_flow *flow __rte_unused)
2405 {
2406 }
2407
2408 static int
2409 flow_null_query(struct rte_eth_dev *dev __rte_unused,
2410                 struct rte_flow *flow __rte_unused,
2411                 const struct rte_flow_action *actions __rte_unused,
2412                 void *data __rte_unused,
2413                 struct rte_flow_error *error)
2414 {
2415         return rte_flow_error_set(error, ENOTSUP,
2416                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2417 }
2418
2419 /* Void driver to protect from null pointer reference. */
2420 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
2421         .validate = flow_null_validate,
2422         .prepare = flow_null_prepare,
2423         .translate = flow_null_translate,
2424         .apply = flow_null_apply,
2425         .remove = flow_null_remove,
2426         .destroy = flow_null_destroy,
2427         .query = flow_null_query,
2428 };
2429
2430 /**
2431  * Select flow driver type according to flow attributes and device
2432  * configuration.
2433  *
2434  * @param[in] dev
2435  *   Pointer to the dev structure.
2436  * @param[in] attr
2437  *   Pointer to the flow attributes.
2438  *
2439  * @return
2440  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
2441  */
2442 static enum mlx5_flow_drv_type
2443 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
2444 {
2445         struct mlx5_priv *priv = dev->data->dev_private;
2446         enum mlx5_flow_drv_type type = MLX5_FLOW_TYPE_MAX;
2447
2448         if (attr->transfer && priv->config.dv_esw_en)
2449                 type = MLX5_FLOW_TYPE_DV;
2450         if (!attr->transfer)
2451                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
2452                                                  MLX5_FLOW_TYPE_VERBS;
2453         return type;
2454 }
2455
2456 #define flow_get_drv_ops(type) flow_drv_ops[type]
2457
2458 /**
2459  * Flow driver validation API. This abstracts calling driver specific functions.
2460  * The type of flow driver is determined according to flow attributes.
2461  *
2462  * @param[in] dev
2463  *   Pointer to the dev structure.
2464  * @param[in] attr
2465  *   Pointer to the flow attributes.
2466  * @param[in] items
2467  *   Pointer to the list of items.
2468  * @param[in] actions
2469  *   Pointer to the list of actions.
2470  * @param[in] external
2471  *   This flow rule is created by request external to PMD.
2472  * @param[out] error
2473  *   Pointer to the error structure.
2474  *
2475  * @return
2476  *   0 on success, a negative errno value otherwise and rte_errno is set.
2477  */
2478 static inline int
2479 flow_drv_validate(struct rte_eth_dev *dev,
2480                   const struct rte_flow_attr *attr,
2481                   const struct rte_flow_item items[],
2482                   const struct rte_flow_action actions[],
2483                   bool external, struct rte_flow_error *error)
2484 {
2485         const struct mlx5_flow_driver_ops *fops;
2486         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
2487
2488         fops = flow_get_drv_ops(type);
2489         return fops->validate(dev, attr, items, actions, external, error);
2490 }
2491
2492 /**
2493  * Flow driver preparation API. This abstracts calling driver specific
2494  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2495  * calculates the size of memory required for device flow, allocates the memory,
2496  * initializes the device flow and returns the pointer.
2497  *
2498  * @note
2499  *   This function initializes device flow structure such as dv or verbs in
2500  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
2501  *   rest. For example, adding returning device flow to flow->dev_flow list and
2502  *   setting backward reference to the flow should be done out of this function.
2503  *   layers field is not filled either.
2504  *
2505  * @param[in] attr
2506  *   Pointer to the flow attributes.
2507  * @param[in] items
2508  *   Pointer to the list of items.
2509  * @param[in] actions
2510  *   Pointer to the list of actions.
2511  * @param[out] error
2512  *   Pointer to the error structure.
2513  *
2514  * @return
2515  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
2516  */
2517 static inline struct mlx5_flow *
2518 flow_drv_prepare(const struct rte_flow *flow,
2519                  const struct rte_flow_attr *attr,
2520                  const struct rte_flow_item items[],
2521                  const struct rte_flow_action actions[],
2522                  struct rte_flow_error *error)
2523 {
2524         const struct mlx5_flow_driver_ops *fops;
2525         enum mlx5_flow_drv_type type = flow->drv_type;
2526
2527         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2528         fops = flow_get_drv_ops(type);
2529         return fops->prepare(attr, items, actions, error);
2530 }
2531
2532 /**
2533  * Flow driver translation API. This abstracts calling driver specific
2534  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2535  * translates a generic flow into a driver flow. flow_drv_prepare() must
2536  * precede.
2537  *
2538  * @note
2539  *   dev_flow->layers could be filled as a result of parsing during translation
2540  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
2541  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
2542  *   flow->actions could be overwritten even though all the expanded dev_flows
2543  *   have the same actions.
2544  *
2545  * @param[in] dev
2546  *   Pointer to the rte dev structure.
2547  * @param[in, out] dev_flow
2548  *   Pointer to the mlx5 flow.
2549  * @param[in] attr
2550  *   Pointer to the flow attributes.
2551  * @param[in] items
2552  *   Pointer to the list of items.
2553  * @param[in] actions
2554  *   Pointer to the list of actions.
2555  * @param[out] error
2556  *   Pointer to the error structure.
2557  *
2558  * @return
2559  *   0 on success, a negative errno value otherwise and rte_errno is set.
2560  */
2561 static inline int
2562 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
2563                    const struct rte_flow_attr *attr,
2564                    const struct rte_flow_item items[],
2565                    const struct rte_flow_action actions[],
2566                    struct rte_flow_error *error)
2567 {
2568         const struct mlx5_flow_driver_ops *fops;
2569         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
2570
2571         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2572         fops = flow_get_drv_ops(type);
2573         return fops->translate(dev, dev_flow, attr, items, actions, error);
2574 }
2575
2576 /**
2577  * Flow driver apply API. This abstracts calling driver specific functions.
2578  * Parent flow (rte_flow) should have driver type (drv_type). It applies
2579  * translated driver flows on to device. flow_drv_translate() must precede.
2580  *
2581  * @param[in] dev
2582  *   Pointer to Ethernet device structure.
2583  * @param[in, out] flow
2584  *   Pointer to flow structure.
2585  * @param[out] error
2586  *   Pointer to error structure.
2587  *
2588  * @return
2589  *   0 on success, a negative errno value otherwise and rte_errno is set.
2590  */
2591 static inline int
2592 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
2593                struct rte_flow_error *error)
2594 {
2595         const struct mlx5_flow_driver_ops *fops;
2596         enum mlx5_flow_drv_type type = flow->drv_type;
2597
2598         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2599         fops = flow_get_drv_ops(type);
2600         return fops->apply(dev, flow, error);
2601 }
2602
2603 /**
2604  * Flow driver remove API. This abstracts calling driver specific functions.
2605  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2606  * on device. All the resources of the flow should be freed by calling
2607  * flow_drv_destroy().
2608  *
2609  * @param[in] dev
2610  *   Pointer to Ethernet device.
2611  * @param[in, out] flow
2612  *   Pointer to flow structure.
2613  */
2614 static inline void
2615 flow_drv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
2616 {
2617         const struct mlx5_flow_driver_ops *fops;
2618         enum mlx5_flow_drv_type type = flow->drv_type;
2619
2620         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2621         fops = flow_get_drv_ops(type);
2622         fops->remove(dev, flow);
2623 }
2624
2625 /**
2626  * Flow driver destroy API. This abstracts calling driver specific functions.
2627  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2628  * on device and releases resources of the flow.
2629  *
2630  * @param[in] dev
2631  *   Pointer to Ethernet device.
2632  * @param[in, out] flow
2633  *   Pointer to flow structure.
2634  */
2635 static inline void
2636 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
2637 {
2638         const struct mlx5_flow_driver_ops *fops;
2639         enum mlx5_flow_drv_type type = flow->drv_type;
2640
2641         flow_mreg_split_qrss_release(dev, flow);
2642         flow_meter_split_id_release(dev, flow);
2643         assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2644         fops = flow_get_drv_ops(type);
2645         fops->destroy(dev, flow);
2646 }
2647
2648 /**
2649  * Validate a flow supported by the NIC.
2650  *
2651  * @see rte_flow_validate()
2652  * @see rte_flow_ops
2653  */
2654 int
2655 mlx5_flow_validate(struct rte_eth_dev *dev,
2656                    const struct rte_flow_attr *attr,
2657                    const struct rte_flow_item items[],
2658                    const struct rte_flow_action actions[],
2659                    struct rte_flow_error *error)
2660 {
2661         int ret;
2662
2663         ret = flow_drv_validate(dev, attr, items, actions, true, error);
2664         if (ret < 0)
2665                 return ret;
2666         return 0;
2667 }
2668
2669 /**
2670  * Get port id item from the item list.
2671  *
2672  * @param[in] item
2673  *   Pointer to the list of items.
2674  *
2675  * @return
2676  *   Pointer to the port id item if exist, else return NULL.
2677  */
2678 static const struct rte_flow_item *
2679 find_port_id_item(const struct rte_flow_item *item)
2680 {
2681         assert(item);
2682         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
2683                 if (item->type == RTE_FLOW_ITEM_TYPE_PORT_ID)
2684                         return item;
2685         }
2686         return NULL;
2687 }
2688
2689 /**
2690  * Get RSS action from the action list.
2691  *
2692  * @param[in] actions
2693  *   Pointer to the list of actions.
2694  *
2695  * @return
2696  *   Pointer to the RSS action if exist, else return NULL.
2697  */
2698 static const struct rte_flow_action_rss*
2699 flow_get_rss_action(const struct rte_flow_action actions[])
2700 {
2701         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2702                 switch (actions->type) {
2703                 case RTE_FLOW_ACTION_TYPE_RSS:
2704                         return (const struct rte_flow_action_rss *)
2705                                actions->conf;
2706                 default:
2707                         break;
2708                 }
2709         }
2710         return NULL;
2711 }
2712
2713 static unsigned int
2714 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
2715 {
2716         const struct rte_flow_item *item;
2717         unsigned int has_vlan = 0;
2718
2719         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
2720                 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
2721                         has_vlan = 1;
2722                         break;
2723                 }
2724         }
2725         if (has_vlan)
2726                 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
2727                                        MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
2728         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
2729                                MLX5_EXPANSION_ROOT_OUTER;
2730 }
2731
2732 /**
2733  * Get QUEUE/RSS action from the action list.
2734  *
2735  * @param[in] actions
2736  *   Pointer to the list of actions.
2737  * @param[out] qrss
2738  *   Pointer to the return pointer.
2739  * @param[out] qrss_type
2740  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
2741  *   if no QUEUE/RSS is found.
2742  *
2743  * @return
2744  *   Total number of actions.
2745  */
2746 static int
2747 flow_parse_qrss_action(const struct rte_flow_action actions[],
2748                        const struct rte_flow_action **qrss)
2749 {
2750         int actions_n = 0;
2751
2752         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2753                 switch (actions->type) {
2754                 case RTE_FLOW_ACTION_TYPE_QUEUE:
2755                 case RTE_FLOW_ACTION_TYPE_RSS:
2756                         *qrss = actions;
2757                         break;
2758                 default:
2759                         break;
2760                 }
2761                 actions_n++;
2762         }
2763         /* Count RTE_FLOW_ACTION_TYPE_END. */
2764         return actions_n + 1;
2765 }
2766
2767 /**
2768  * Check meter action from the action list.
2769  *
2770  * @param[in] actions
2771  *   Pointer to the list of actions.
2772  * @param[out] mtr
2773  *   Pointer to the meter exist flag.
2774  *
2775  * @return
2776  *   Total number of actions.
2777  */
2778 static int
2779 flow_check_meter_action(const struct rte_flow_action actions[], uint32_t *mtr)
2780 {
2781         int actions_n = 0;
2782
2783         assert(mtr);
2784         *mtr = 0;
2785         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2786                 switch (actions->type) {
2787                 case RTE_FLOW_ACTION_TYPE_METER:
2788                         *mtr = 1;
2789                         break;
2790                 default:
2791                         break;
2792                 }
2793                 actions_n++;
2794         }
2795         /* Count RTE_FLOW_ACTION_TYPE_END. */
2796         return actions_n + 1;
2797 }
2798
2799 /**
2800  * Check if the flow should be splited due to hairpin.
2801  * The reason for the split is that in current HW we can't
2802  * support encap on Rx, so if a flow have encap we move it
2803  * to Tx.
2804  *
2805  * @param dev
2806  *   Pointer to Ethernet device.
2807  * @param[in] attr
2808  *   Flow rule attributes.
2809  * @param[in] actions
2810  *   Associated actions (list terminated by the END action).
2811  *
2812  * @return
2813  *   > 0 the number of actions and the flow should be split,
2814  *   0 when no split required.
2815  */
2816 static int
2817 flow_check_hairpin_split(struct rte_eth_dev *dev,
2818                          const struct rte_flow_attr *attr,
2819                          const struct rte_flow_action actions[])
2820 {
2821         int queue_action = 0;
2822         int action_n = 0;
2823         int encap = 0;
2824         const struct rte_flow_action_queue *queue;
2825         const struct rte_flow_action_rss *rss;
2826         const struct rte_flow_action_raw_encap *raw_encap;
2827
2828         if (!attr->ingress)
2829                 return 0;
2830         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2831                 switch (actions->type) {
2832                 case RTE_FLOW_ACTION_TYPE_QUEUE:
2833                         queue = actions->conf;
2834                         if (mlx5_rxq_get_type(dev, queue->index) !=
2835                             MLX5_RXQ_TYPE_HAIRPIN)
2836                                 return 0;
2837                         queue_action = 1;
2838                         action_n++;
2839                         break;
2840                 case RTE_FLOW_ACTION_TYPE_RSS:
2841                         rss = actions->conf;
2842                         if (mlx5_rxq_get_type(dev, rss->queue[0]) !=
2843                             MLX5_RXQ_TYPE_HAIRPIN)
2844                                 return 0;
2845                         queue_action = 1;
2846                         action_n++;
2847                         break;
2848                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
2849                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
2850                         encap = 1;
2851                         action_n++;
2852                         break;
2853                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
2854                         raw_encap = actions->conf;
2855                         if (raw_encap->size >
2856                             (sizeof(struct rte_flow_item_eth) +
2857                              sizeof(struct rte_flow_item_ipv4)))
2858                                 encap = 1;
2859                         action_n++;
2860                         break;
2861                 default:
2862                         action_n++;
2863                         break;
2864                 }
2865         }
2866         if (encap == 1 && queue_action)
2867                 return action_n;
2868         return 0;
2869 }
2870
2871 /* Declare flow create/destroy prototype in advance. */
2872 static struct rte_flow *
2873 flow_list_create(struct rte_eth_dev *dev, struct mlx5_flows *list,
2874                  const struct rte_flow_attr *attr,
2875                  const struct rte_flow_item items[],
2876                  const struct rte_flow_action actions[],
2877                  bool external, struct rte_flow_error *error);
2878
2879 static void
2880 flow_list_destroy(struct rte_eth_dev *dev, struct mlx5_flows *list,
2881                   struct rte_flow *flow);
2882
2883 /**
2884  * Add a flow of copying flow metadata registers in RX_CP_TBL.
2885  *
2886  * As mark_id is unique, if there's already a registered flow for the mark_id,
2887  * return by increasing the reference counter of the resource. Otherwise, create
2888  * the resource (mcp_res) and flow.
2889  *
2890  * Flow looks like,
2891  *   - If ingress port is ANY and reg_c[1] is mark_id,
2892  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
2893  *
2894  * For default flow (zero mark_id), flow is like,
2895  *   - If ingress port is ANY,
2896  *     reg_b := reg_c[0] and jump to RX_ACT_TBL.
2897  *
2898  * @param dev
2899  *   Pointer to Ethernet device.
2900  * @param mark_id
2901  *   ID of MARK action, zero means default flow for META.
2902  * @param[out] error
2903  *   Perform verbose error reporting if not NULL.
2904  *
2905  * @return
2906  *   Associated resource on success, NULL otherwise and rte_errno is set.
2907  */
2908 static struct mlx5_flow_mreg_copy_resource *
2909 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
2910                           struct rte_flow_error *error)
2911 {
2912         struct mlx5_priv *priv = dev->data->dev_private;
2913         struct rte_flow_attr attr = {
2914                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
2915                 .ingress = 1,
2916         };
2917         struct mlx5_rte_flow_item_tag tag_spec = {
2918                 .data = mark_id,
2919         };
2920         struct rte_flow_item items[] = {
2921                 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
2922         };
2923         struct rte_flow_action_mark ftag = {
2924                 .id = mark_id,
2925         };
2926         struct mlx5_flow_action_copy_mreg cp_mreg = {
2927                 .dst = REG_B,
2928                 .src = 0,
2929         };
2930         struct rte_flow_action_jump jump = {
2931                 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
2932         };
2933         struct rte_flow_action actions[] = {
2934                 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
2935         };
2936         struct mlx5_flow_mreg_copy_resource *mcp_res;
2937         int ret;
2938
2939         /* Fill the register fileds in the flow. */
2940         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
2941         if (ret < 0)
2942                 return NULL;
2943         tag_spec.id = ret;
2944         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
2945         if (ret < 0)
2946                 return NULL;
2947         cp_mreg.src = ret;
2948         /* Check if already registered. */
2949         assert(priv->mreg_cp_tbl);
2950         mcp_res = (void *)mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id);
2951         if (mcp_res) {
2952                 /* For non-default rule. */
2953                 if (mark_id)
2954                         mcp_res->refcnt++;
2955                 assert(mark_id || mcp_res->refcnt == 1);
2956                 return mcp_res;
2957         }
2958         /* Provide the full width of FLAG specific value. */
2959         if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
2960                 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
2961         /* Build a new flow. */
2962         if (mark_id) {
2963                 items[0] = (struct rte_flow_item){
2964                         .type = MLX5_RTE_FLOW_ITEM_TYPE_TAG,
2965                         .spec = &tag_spec,
2966                 };
2967                 items[1] = (struct rte_flow_item){
2968                         .type = RTE_FLOW_ITEM_TYPE_END,
2969                 };
2970                 actions[0] = (struct rte_flow_action){
2971                         .type = MLX5_RTE_FLOW_ACTION_TYPE_MARK,
2972                         .conf = &ftag,
2973                 };
2974                 actions[1] = (struct rte_flow_action){
2975                         .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
2976                         .conf = &cp_mreg,
2977                 };
2978                 actions[2] = (struct rte_flow_action){
2979                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
2980                         .conf = &jump,
2981                 };
2982                 actions[3] = (struct rte_flow_action){
2983                         .type = RTE_FLOW_ACTION_TYPE_END,
2984                 };
2985         } else {
2986                 /* Default rule, wildcard match. */
2987                 attr.priority = MLX5_FLOW_PRIO_RSVD;
2988                 items[0] = (struct rte_flow_item){
2989                         .type = RTE_FLOW_ITEM_TYPE_END,
2990                 };
2991                 actions[0] = (struct rte_flow_action){
2992                         .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
2993                         .conf = &cp_mreg,
2994                 };
2995                 actions[1] = (struct rte_flow_action){
2996                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
2997                         .conf = &jump,
2998                 };
2999                 actions[2] = (struct rte_flow_action){
3000                         .type = RTE_FLOW_ACTION_TYPE_END,
3001                 };
3002         }
3003         /* Build a new entry. */
3004         mcp_res = rte_zmalloc(__func__, sizeof(*mcp_res), 0);
3005         if (!mcp_res) {
3006                 rte_errno = ENOMEM;
3007                 return NULL;
3008         }
3009         /*
3010          * The copy Flows are not included in any list. There
3011          * ones are referenced from other Flows and can not
3012          * be applied, removed, deleted in ardbitrary order
3013          * by list traversing.
3014          */
3015         mcp_res->flow = flow_list_create(dev, NULL, &attr, items,
3016                                          actions, false, error);
3017         if (!mcp_res->flow)
3018                 goto error;
3019         mcp_res->refcnt++;
3020         mcp_res->hlist_ent.key = mark_id;
3021         ret = mlx5_hlist_insert(priv->mreg_cp_tbl,
3022                                 &mcp_res->hlist_ent);
3023         assert(!ret);
3024         if (ret)
3025                 goto error;
3026         return mcp_res;
3027 error:
3028         if (mcp_res->flow)
3029                 flow_list_destroy(dev, NULL, mcp_res->flow);
3030         rte_free(mcp_res);
3031         return NULL;
3032 }
3033
3034 /**
3035  * Release flow in RX_CP_TBL.
3036  *
3037  * @param dev
3038  *   Pointer to Ethernet device.
3039  * @flow
3040  *   Parent flow for wich copying is provided.
3041  */
3042 static void
3043 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
3044                           struct rte_flow *flow)
3045 {
3046         struct mlx5_flow_mreg_copy_resource *mcp_res = flow->mreg_copy;
3047         struct mlx5_priv *priv = dev->data->dev_private;
3048
3049         if (!mcp_res || !priv->mreg_cp_tbl)
3050                 return;
3051         if (flow->copy_applied) {
3052                 assert(mcp_res->appcnt);
3053                 flow->copy_applied = 0;
3054                 --mcp_res->appcnt;
3055                 if (!mcp_res->appcnt)
3056                         flow_drv_remove(dev, mcp_res->flow);
3057         }
3058         /*
3059          * We do not check availability of metadata registers here,
3060          * because copy resources are allocated in this case.
3061          */
3062         if (--mcp_res->refcnt)
3063                 return;
3064         assert(mcp_res->flow);
3065         flow_list_destroy(dev, NULL, mcp_res->flow);
3066         mlx5_hlist_remove(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
3067         rte_free(mcp_res);
3068         flow->mreg_copy = NULL;
3069 }
3070
3071 /**
3072  * Start flow in RX_CP_TBL.
3073  *
3074  * @param dev
3075  *   Pointer to Ethernet device.
3076  * @flow
3077  *   Parent flow for wich copying is provided.
3078  *
3079  * @return
3080  *   0 on success, a negative errno value otherwise and rte_errno is set.
3081  */
3082 static int
3083 flow_mreg_start_copy_action(struct rte_eth_dev *dev,
3084                             struct rte_flow *flow)
3085 {
3086         struct mlx5_flow_mreg_copy_resource *mcp_res = flow->mreg_copy;
3087         int ret;
3088
3089         if (!mcp_res || flow->copy_applied)
3090                 return 0;
3091         if (!mcp_res->appcnt) {
3092                 ret = flow_drv_apply(dev, mcp_res->flow, NULL);
3093                 if (ret)
3094                         return ret;
3095         }
3096         ++mcp_res->appcnt;
3097         flow->copy_applied = 1;
3098         return 0;
3099 }
3100
3101 /**
3102  * Stop flow in RX_CP_TBL.
3103  *
3104  * @param dev
3105  *   Pointer to Ethernet device.
3106  * @flow
3107  *   Parent flow for wich copying is provided.
3108  */
3109 static void
3110 flow_mreg_stop_copy_action(struct rte_eth_dev *dev,
3111                            struct rte_flow *flow)
3112 {
3113         struct mlx5_flow_mreg_copy_resource *mcp_res = flow->mreg_copy;
3114
3115         if (!mcp_res || !flow->copy_applied)
3116                 return;
3117         assert(mcp_res->appcnt);
3118         --mcp_res->appcnt;
3119         flow->copy_applied = 0;
3120         if (!mcp_res->appcnt)
3121                 flow_drv_remove(dev, mcp_res->flow);
3122 }
3123
3124 /**
3125  * Remove the default copy action from RX_CP_TBL.
3126  *
3127  * @param dev
3128  *   Pointer to Ethernet device.
3129  */
3130 static void
3131 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
3132 {
3133         struct mlx5_flow_mreg_copy_resource *mcp_res;
3134         struct mlx5_priv *priv = dev->data->dev_private;
3135
3136         /* Check if default flow is registered. */
3137         if (!priv->mreg_cp_tbl)
3138                 return;
3139         mcp_res = (void *)mlx5_hlist_lookup(priv->mreg_cp_tbl, 0ULL);
3140         if (!mcp_res)
3141                 return;
3142         assert(mcp_res->flow);
3143         flow_list_destroy(dev, NULL, mcp_res->flow);
3144         mlx5_hlist_remove(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
3145         rte_free(mcp_res);
3146 }
3147
3148 /**
3149  * Add the default copy action in in RX_CP_TBL.
3150  *
3151  * @param dev
3152  *   Pointer to Ethernet device.
3153  * @param[out] error
3154  *   Perform verbose error reporting if not NULL.
3155  *
3156  * @return
3157  *   0 for success, negative value otherwise and rte_errno is set.
3158  */
3159 static int
3160 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
3161                                   struct rte_flow_error *error)
3162 {
3163         struct mlx5_priv *priv = dev->data->dev_private;
3164         struct mlx5_flow_mreg_copy_resource *mcp_res;
3165
3166         /* Check whether extensive metadata feature is engaged. */
3167         if (!priv->config.dv_flow_en ||
3168             priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3169             !mlx5_flow_ext_mreg_supported(dev) ||
3170             !priv->sh->dv_regc0_mask)
3171                 return 0;
3172         mcp_res = flow_mreg_add_copy_action(dev, 0, error);
3173         if (!mcp_res)
3174                 return -rte_errno;
3175         return 0;
3176 }
3177
3178 /**
3179  * Add a flow of copying flow metadata registers in RX_CP_TBL.
3180  *
3181  * All the flow having Q/RSS action should be split by
3182  * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
3183  * performs the following,
3184  *   - CQE->flow_tag := reg_c[1] (MARK)
3185  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
3186  * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
3187  * but there should be a flow per each MARK ID set by MARK action.
3188  *
3189  * For the aforementioned reason, if there's a MARK action in flow's action
3190  * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
3191  * the MARK ID to CQE's flow_tag like,
3192  *   - If reg_c[1] is mark_id,
3193  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3194  *
3195  * For SET_META action which stores value in reg_c[0], as the destination is
3196  * also a flow metadata register (reg_b), adding a default flow is enough. Zero
3197  * MARK ID means the default flow. The default flow looks like,
3198  *   - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3199  *
3200  * @param dev
3201  *   Pointer to Ethernet device.
3202  * @param flow
3203  *   Pointer to flow structure.
3204  * @param[in] actions
3205  *   Pointer to the list of actions.
3206  * @param[out] error
3207  *   Perform verbose error reporting if not NULL.
3208  *
3209  * @return
3210  *   0 on success, negative value otherwise and rte_errno is set.
3211  */
3212 static int
3213 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
3214                             struct rte_flow *flow,
3215                             const struct rte_flow_action *actions,
3216                             struct rte_flow_error *error)
3217 {
3218         struct mlx5_priv *priv = dev->data->dev_private;
3219         struct mlx5_dev_config *config = &priv->config;
3220         struct mlx5_flow_mreg_copy_resource *mcp_res;
3221         const struct rte_flow_action_mark *mark;
3222
3223         /* Check whether extensive metadata feature is engaged. */
3224         if (!config->dv_flow_en ||
3225             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3226             !mlx5_flow_ext_mreg_supported(dev) ||
3227             !priv->sh->dv_regc0_mask)
3228                 return 0;
3229         /* Find MARK action. */
3230         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3231                 switch (actions->type) {
3232                 case RTE_FLOW_ACTION_TYPE_FLAG:
3233                         mcp_res = flow_mreg_add_copy_action
3234                                 (dev, MLX5_FLOW_MARK_DEFAULT, error);
3235                         if (!mcp_res)
3236                                 return -rte_errno;
3237                         flow->mreg_copy = mcp_res;
3238                         if (dev->data->dev_started) {
3239                                 mcp_res->appcnt++;
3240                                 flow->copy_applied = 1;
3241                         }
3242                         return 0;
3243                 case RTE_FLOW_ACTION_TYPE_MARK:
3244                         mark = (const struct rte_flow_action_mark *)
3245                                 actions->conf;
3246                         mcp_res =
3247                                 flow_mreg_add_copy_action(dev, mark->id, error);
3248                         if (!mcp_res)
3249                                 return -rte_errno;
3250                         flow->mreg_copy = mcp_res;
3251                         if (dev->data->dev_started) {
3252                                 mcp_res->appcnt++;
3253                                 flow->copy_applied = 1;
3254                         }
3255                         return 0;
3256                 default:
3257                         break;
3258                 }
3259         }
3260         return 0;
3261 }
3262
3263 #define MLX5_MAX_SPLIT_ACTIONS 24
3264 #define MLX5_MAX_SPLIT_ITEMS 24
3265
3266 /**
3267  * Split the hairpin flow.
3268  * Since HW can't support encap on Rx we move the encap to Tx.
3269  * If the count action is after the encap then we also
3270  * move the count action. in this case the count will also measure
3271  * the outer bytes.
3272  *
3273  * @param dev
3274  *   Pointer to Ethernet device.
3275  * @param[in] actions
3276  *   Associated actions (list terminated by the END action).
3277  * @param[out] actions_rx
3278  *   Rx flow actions.
3279  * @param[out] actions_tx
3280  *   Tx flow actions..
3281  * @param[out] pattern_tx
3282  *   The pattern items for the Tx flow.
3283  * @param[out] flow_id
3284  *   The flow ID connected to this flow.
3285  *
3286  * @return
3287  *   0 on success.
3288  */
3289 static int
3290 flow_hairpin_split(struct rte_eth_dev *dev,
3291                    const struct rte_flow_action actions[],
3292                    struct rte_flow_action actions_rx[],
3293                    struct rte_flow_action actions_tx[],
3294                    struct rte_flow_item pattern_tx[],
3295                    uint32_t *flow_id)
3296 {
3297         struct mlx5_priv *priv = dev->data->dev_private;
3298         const struct rte_flow_action_raw_encap *raw_encap;
3299         const struct rte_flow_action_raw_decap *raw_decap;
3300         struct mlx5_rte_flow_action_set_tag *set_tag;
3301         struct rte_flow_action *tag_action;
3302         struct mlx5_rte_flow_item_tag *tag_item;
3303         struct rte_flow_item *item;
3304         char *addr;
3305         int encap = 0;
3306
3307         mlx5_flow_id_get(priv->sh->flow_id_pool, flow_id);
3308         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3309                 switch (actions->type) {
3310                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3311                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3312                         rte_memcpy(actions_tx, actions,
3313                                sizeof(struct rte_flow_action));
3314                         actions_tx++;
3315                         break;
3316                 case RTE_FLOW_ACTION_TYPE_COUNT:
3317                         if (encap) {
3318                                 rte_memcpy(actions_tx, actions,
3319                                            sizeof(struct rte_flow_action));
3320                                 actions_tx++;
3321                         } else {
3322                                 rte_memcpy(actions_rx, actions,
3323                                            sizeof(struct rte_flow_action));
3324                                 actions_rx++;
3325                         }
3326                         break;
3327                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3328                         raw_encap = actions->conf;
3329                         if (raw_encap->size >
3330                             (sizeof(struct rte_flow_item_eth) +
3331                              sizeof(struct rte_flow_item_ipv4))) {
3332                                 memcpy(actions_tx, actions,
3333                                        sizeof(struct rte_flow_action));
3334                                 actions_tx++;
3335                                 encap = 1;
3336                         } else {
3337                                 rte_memcpy(actions_rx, actions,
3338                                            sizeof(struct rte_flow_action));
3339                                 actions_rx++;
3340                         }
3341                         break;
3342                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3343                         raw_decap = actions->conf;
3344                         if (raw_decap->size <
3345                             (sizeof(struct rte_flow_item_eth) +
3346                              sizeof(struct rte_flow_item_ipv4))) {
3347                                 memcpy(actions_tx, actions,
3348                                        sizeof(struct rte_flow_action));
3349                                 actions_tx++;
3350                         } else {
3351                                 rte_memcpy(actions_rx, actions,
3352                                            sizeof(struct rte_flow_action));
3353                                 actions_rx++;
3354                         }
3355                         break;
3356                 default:
3357                         rte_memcpy(actions_rx, actions,
3358                                    sizeof(struct rte_flow_action));
3359                         actions_rx++;
3360                         break;
3361                 }
3362         }
3363         /* Add set meta action and end action for the Rx flow. */
3364         tag_action = actions_rx;
3365         tag_action->type = MLX5_RTE_FLOW_ACTION_TYPE_TAG;
3366         actions_rx++;
3367         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
3368         actions_rx++;
3369         set_tag = (void *)actions_rx;
3370         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL);
3371         assert(set_tag->id > REG_NONE);
3372         set_tag->data = *flow_id;
3373         tag_action->conf = set_tag;
3374         /* Create Tx item list. */
3375         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
3376         addr = (void *)&pattern_tx[2];
3377         item = pattern_tx;
3378         item->type = MLX5_RTE_FLOW_ITEM_TYPE_TAG;
3379         tag_item = (void *)addr;
3380         tag_item->data = *flow_id;
3381         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
3382         assert(set_tag->id > REG_NONE);
3383         item->spec = tag_item;
3384         addr += sizeof(struct mlx5_rte_flow_item_tag);
3385         tag_item = (void *)addr;
3386         tag_item->data = UINT32_MAX;
3387         tag_item->id = UINT16_MAX;
3388         item->mask = tag_item;
3389         addr += sizeof(struct mlx5_rte_flow_item_tag);
3390         item->last = NULL;
3391         item++;
3392         item->type = RTE_FLOW_ITEM_TYPE_END;
3393         return 0;
3394 }
3395
3396 /**
3397  * The last stage of splitting chain, just creates the subflow
3398  * without any modification.
3399  *
3400  * @param dev
3401  *   Pointer to Ethernet device.
3402  * @param[in] flow
3403  *   Parent flow structure pointer.
3404  * @param[in, out] sub_flow
3405  *   Pointer to return the created subflow, may be NULL.
3406  * @param[in] attr
3407  *   Flow rule attributes.
3408  * @param[in] items
3409  *   Pattern specification (list terminated by the END pattern item).
3410  * @param[in] actions
3411  *   Associated actions (list terminated by the END action).
3412  * @param[in] external
3413  *   This flow rule is created by request external to PMD.
3414  * @param[out] error
3415  *   Perform verbose error reporting if not NULL.
3416  * @return
3417  *   0 on success, negative value otherwise
3418  */
3419 static int
3420 flow_create_split_inner(struct rte_eth_dev *dev,
3421                         struct rte_flow *flow,
3422                         struct mlx5_flow **sub_flow,
3423                         const struct rte_flow_attr *attr,
3424                         const struct rte_flow_item items[],
3425                         const struct rte_flow_action actions[],
3426                         bool external, struct rte_flow_error *error)
3427 {
3428         struct mlx5_flow *dev_flow;
3429
3430         dev_flow = flow_drv_prepare(flow, attr, items, actions, error);
3431         if (!dev_flow)
3432                 return -rte_errno;
3433         dev_flow->flow = flow;
3434         dev_flow->external = external;
3435         /* Subflow object was created, we must include one in the list. */
3436         LIST_INSERT_HEAD(&flow->dev_flows, dev_flow, next);
3437         if (sub_flow)
3438                 *sub_flow = dev_flow;
3439         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
3440 }
3441
3442 /**
3443  * Split the meter flow.
3444  *
3445  * As meter flow will split to three sub flow, other than meter
3446  * action, the other actions make sense to only meter accepts
3447  * the packet. If it need to be dropped, no other additional
3448  * actions should be take.
3449  *
3450  * One kind of special action which decapsulates the L3 tunnel
3451  * header will be in the prefix sub flow, as not to take the
3452  * L3 tunnel header into account.
3453  *
3454  * @param dev
3455  *   Pointer to Ethernet device.
3456  * @param[in] actions
3457  *   Associated actions (list terminated by the END action).
3458  * @param[out] actions_sfx
3459  *   Suffix flow actions.
3460  * @param[out] actions_pre
3461  *   Prefix flow actions.
3462  * @param[out] pattern_sfx
3463  *   The pattern items for the suffix flow.
3464  * @param[out] tag_sfx
3465  *   Pointer to suffix flow tag.
3466  *
3467  * @return
3468  *   0 on success.
3469  */
3470 static int
3471 flow_meter_split_prep(struct rte_eth_dev *dev,
3472                  const struct rte_flow_action actions[],
3473                  struct rte_flow_action actions_sfx[],
3474                  struct rte_flow_action actions_pre[])
3475 {
3476         struct mlx5_priv *priv = dev->data->dev_private;
3477         struct rte_flow_action *tag_action;
3478         struct mlx5_rte_flow_action_set_tag *set_tag;
3479         struct rte_flow_error error;
3480         const struct rte_flow_action_raw_encap *raw_encap;
3481         const struct rte_flow_action_raw_decap *raw_decap;
3482         uint32_t tag_id;
3483
3484         /* Add the extra tag action first. */
3485         tag_action = actions_pre;
3486         tag_action->type = MLX5_RTE_FLOW_ACTION_TYPE_TAG;
3487         actions_pre++;
3488         /* Prepare the actions for prefix and suffix flow. */
3489         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3490                 switch (actions->type) {
3491                 case RTE_FLOW_ACTION_TYPE_METER:
3492                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
3493                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
3494                         memcpy(actions_pre, actions,
3495                                sizeof(struct rte_flow_action));
3496                         actions_pre++;
3497                         break;
3498                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3499                         raw_encap = actions->conf;
3500                         if (raw_encap->size >
3501                             (sizeof(struct rte_flow_item_eth) +
3502                              sizeof(struct rte_flow_item_ipv4))) {
3503                                 memcpy(actions_sfx, actions,
3504                                        sizeof(struct rte_flow_action));
3505                                 actions_sfx++;
3506                         } else {
3507                                 rte_memcpy(actions_pre, actions,
3508                                            sizeof(struct rte_flow_action));
3509                                 actions_pre++;
3510                         }
3511                         break;
3512                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3513                         raw_decap = actions->conf;
3514                         /* Size 0 decap means 50 bytes as vxlan decap. */
3515                         if (raw_decap->size && (raw_decap->size <
3516                             (sizeof(struct rte_flow_item_eth) +
3517                              sizeof(struct rte_flow_item_ipv4)))) {
3518                                 memcpy(actions_sfx, actions,
3519                                        sizeof(struct rte_flow_action));
3520                                 actions_sfx++;
3521                         } else {
3522                                 rte_memcpy(actions_pre, actions,
3523                                            sizeof(struct rte_flow_action));
3524                                 actions_pre++;
3525                         }
3526                         break;
3527                 default:
3528                         memcpy(actions_sfx, actions,
3529                                 sizeof(struct rte_flow_action));
3530                         actions_sfx++;
3531                         break;
3532                 }
3533         }
3534         /* Add end action to the actions. */
3535         actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
3536         actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
3537         actions_pre++;
3538         /* Set the tag. */
3539         set_tag = (void *)actions_pre;
3540         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
3541         mlx5_flow_id_get(priv->sh->flow_id_pool, &tag_id);
3542         set_tag->data = rte_cpu_to_be_32(tag_id);
3543         tag_action->conf = set_tag;
3544         return tag_id;
3545 }
3546
3547 /**
3548  * Split action list having QUEUE/RSS for metadata register copy.
3549  *
3550  * Once Q/RSS action is detected in user's action list, the flow action
3551  * should be split in order to copy metadata registers, which will happen in
3552  * RX_CP_TBL like,
3553  *   - CQE->flow_tag := reg_c[1] (MARK)
3554  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
3555  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
3556  * This is because the last action of each flow must be a terminal action
3557  * (QUEUE, RSS or DROP).
3558  *
3559  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
3560  * stored and kept in the mlx5_flow structure per each sub_flow.
3561  *
3562  * The Q/RSS action is replaced with,
3563  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
3564  * And the following JUMP action is added at the end,
3565  *   - JUMP, to RX_CP_TBL.
3566  *
3567  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
3568  * flow_create_split_metadata() routine. The flow will look like,
3569  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
3570  *
3571  * @param dev
3572  *   Pointer to Ethernet device.
3573  * @param[out] split_actions
3574  *   Pointer to store split actions to jump to CP_TBL.
3575  * @param[in] actions
3576  *   Pointer to the list of original flow actions.
3577  * @param[in] qrss
3578  *   Pointer to the Q/RSS action.
3579  * @param[in] actions_n
3580  *   Number of original actions.
3581  * @param[out] error
3582  *   Perform verbose error reporting if not NULL.
3583  *
3584  * @return
3585  *   non-zero unique flow_id on success, otherwise 0 and
3586  *   error/rte_error are set.
3587  */
3588 static uint32_t
3589 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
3590                           struct rte_flow_action *split_actions,
3591                           const struct rte_flow_action *actions,
3592                           const struct rte_flow_action *qrss,
3593                           int actions_n, struct rte_flow_error *error)
3594 {
3595         struct mlx5_rte_flow_action_set_tag *set_tag;
3596         struct rte_flow_action_jump *jump;
3597         const int qrss_idx = qrss - actions;
3598         uint32_t flow_id;
3599         int ret = 0;
3600
3601         /*
3602          * Given actions will be split
3603          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
3604          * - Add jump to mreg CP_TBL.
3605          * As a result, there will be one more action.
3606          */
3607         ++actions_n;
3608         /*
3609          * Allocate the new subflow ID. This one is unique within
3610          * device and not shared with representors. Otherwise,
3611          * we would have to resolve multi-thread access synch
3612          * issue. Each flow on the shared device is appended
3613          * with source vport identifier, so the resulting
3614          * flows will be unique in the shared (by master and
3615          * representors) domain even if they have coinciding
3616          * IDs.
3617          */
3618         flow_id = flow_qrss_get_id(dev);
3619         if (!flow_id)
3620                 return rte_flow_error_set(error, ENOMEM,
3621                                           RTE_FLOW_ERROR_TYPE_ACTION,
3622                                           NULL, "can't allocate id "
3623                                           "for split Q/RSS subflow");
3624         /* Internal SET_TAG action to set flow ID. */
3625         set_tag = (void *)(split_actions + actions_n);
3626         *set_tag = (struct mlx5_rte_flow_action_set_tag){
3627                 .data = flow_id,
3628         };
3629         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
3630         if (ret < 0)
3631                 return ret;
3632         set_tag->id = ret;
3633         /* JUMP action to jump to mreg copy table (CP_TBL). */
3634         jump = (void *)(set_tag + 1);
3635         *jump = (struct rte_flow_action_jump){
3636                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
3637         };
3638         /* Construct new actions array. */
3639         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
3640         /* Replace QUEUE/RSS action. */
3641         split_actions[qrss_idx] = (struct rte_flow_action){
3642                 .type = MLX5_RTE_FLOW_ACTION_TYPE_TAG,
3643                 .conf = set_tag,
3644         };
3645         split_actions[actions_n - 2] = (struct rte_flow_action){
3646                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
3647                 .conf = jump,
3648         };
3649         split_actions[actions_n - 1] = (struct rte_flow_action){
3650                 .type = RTE_FLOW_ACTION_TYPE_END,
3651         };
3652         return flow_id;
3653 }
3654
3655 /**
3656  * Extend the given action list for Tx metadata copy.
3657  *
3658  * Copy the given action list to the ext_actions and add flow metadata register
3659  * copy action in order to copy reg_a set by WQE to reg_c[0].
3660  *
3661  * @param[out] ext_actions
3662  *   Pointer to the extended action list.
3663  * @param[in] actions
3664  *   Pointer to the list of actions.
3665  * @param[in] actions_n
3666  *   Number of actions in the list.
3667  * @param[out] error
3668  *   Perform verbose error reporting if not NULL.
3669  *
3670  * @return
3671  *   0 on success, negative value otherwise
3672  */
3673 static int
3674 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
3675                        struct rte_flow_action *ext_actions,
3676                        const struct rte_flow_action *actions,
3677                        int actions_n, struct rte_flow_error *error)
3678 {
3679         struct mlx5_flow_action_copy_mreg *cp_mreg =
3680                 (struct mlx5_flow_action_copy_mreg *)
3681                         (ext_actions + actions_n + 1);
3682         int ret;
3683
3684         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
3685         if (ret < 0)
3686                 return ret;
3687         cp_mreg->dst = ret;
3688         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
3689         if (ret < 0)
3690                 return ret;
3691         cp_mreg->src = ret;
3692         memcpy(ext_actions, actions,
3693                         sizeof(*ext_actions) * actions_n);
3694         ext_actions[actions_n - 1] = (struct rte_flow_action){
3695                 .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3696                 .conf = cp_mreg,
3697         };
3698         ext_actions[actions_n] = (struct rte_flow_action){
3699                 .type = RTE_FLOW_ACTION_TYPE_END,
3700         };
3701         return 0;
3702 }
3703
3704 /**
3705  * The splitting for metadata feature.
3706  *
3707  * - Q/RSS action on NIC Rx should be split in order to pass by
3708  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
3709  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
3710  *
3711  * - All the actions on NIC Tx should have a mreg copy action to
3712  *   copy reg_a from WQE to reg_c[0].
3713  *
3714  * @param dev
3715  *   Pointer to Ethernet device.
3716  * @param[in] flow
3717  *   Parent flow structure pointer.
3718  * @param[in] attr
3719  *   Flow rule attributes.
3720  * @param[in] items
3721  *   Pattern specification (list terminated by the END pattern item).
3722  * @param[in] actions
3723  *   Associated actions (list terminated by the END action).
3724  * @param[in] external
3725  *   This flow rule is created by request external to PMD.
3726  * @param[out] error
3727  *   Perform verbose error reporting if not NULL.
3728  * @return
3729  *   0 on success, negative value otherwise
3730  */
3731 static int
3732 flow_create_split_metadata(struct rte_eth_dev *dev,
3733                            struct rte_flow *flow,
3734                            const struct rte_flow_attr *attr,
3735                            const struct rte_flow_item items[],
3736                            const struct rte_flow_action actions[],
3737                            bool external, struct rte_flow_error *error)
3738 {
3739         struct mlx5_priv *priv = dev->data->dev_private;
3740         struct mlx5_dev_config *config = &priv->config;
3741         const struct rte_flow_action *qrss = NULL;
3742         struct rte_flow_action *ext_actions = NULL;
3743         struct mlx5_flow *dev_flow = NULL;
3744         uint32_t qrss_id = 0;
3745         size_t act_size;
3746         int actions_n;
3747         int ret;
3748
3749         /* Check whether extensive metadata feature is engaged. */
3750         if (!config->dv_flow_en ||
3751             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3752             !mlx5_flow_ext_mreg_supported(dev))
3753                 return flow_create_split_inner(dev, flow, NULL, attr, items,
3754                                                actions, external, error);
3755         actions_n = flow_parse_qrss_action(actions, &qrss);
3756         if (qrss) {
3757                 /* Exclude hairpin flows from splitting. */
3758                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
3759                         const struct rte_flow_action_queue *queue;
3760
3761                         queue = qrss->conf;
3762                         if (mlx5_rxq_get_type(dev, queue->index) ==
3763                             MLX5_RXQ_TYPE_HAIRPIN)
3764                                 qrss = NULL;
3765                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
3766                         const struct rte_flow_action_rss *rss;
3767
3768                         rss = qrss->conf;
3769                         if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
3770                             MLX5_RXQ_TYPE_HAIRPIN)
3771                                 qrss = NULL;
3772                 }
3773         }
3774         if (qrss) {
3775                 /*
3776                  * Q/RSS action on NIC Rx should be split in order to pass by
3777                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
3778                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
3779                  */
3780                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
3781                            sizeof(struct rte_flow_action_set_tag) +
3782                            sizeof(struct rte_flow_action_jump);
3783                 ext_actions = rte_zmalloc(__func__, act_size, 0);
3784                 if (!ext_actions)
3785                         return rte_flow_error_set(error, ENOMEM,
3786                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3787                                                   NULL, "no memory to split "
3788                                                   "metadata flow");
3789                 /*
3790                  * Create the new actions list with removed Q/RSS action
3791                  * and appended set tag and jump to register copy table
3792                  * (RX_CP_TBL). We should preallocate unique tag ID here
3793                  * in advance, because it is needed for set tag action.
3794                  */
3795                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
3796                                                     qrss, actions_n, error);
3797                 if (!qrss_id) {
3798                         ret = -rte_errno;
3799                         goto exit;
3800                 }
3801         } else if (attr->egress && !attr->transfer) {
3802                 /*
3803                  * All the actions on NIC Tx should have a metadata register
3804                  * copy action to copy reg_a from WQE to reg_c[meta]
3805                  */
3806                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
3807                            sizeof(struct mlx5_flow_action_copy_mreg);
3808                 ext_actions = rte_zmalloc(__func__, act_size, 0);
3809                 if (!ext_actions)
3810                         return rte_flow_error_set(error, ENOMEM,
3811                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3812                                                   NULL, "no memory to split "
3813                                                   "metadata flow");
3814                 /* Create the action list appended with copy register. */
3815                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
3816                                              actions_n, error);
3817                 if (ret < 0)
3818                         goto exit;
3819         }
3820         /* Add the unmodified original or prefix subflow. */
3821         ret = flow_create_split_inner(dev, flow, &dev_flow, attr, items,
3822                                       ext_actions ? ext_actions : actions,
3823                                       external, error);
3824         if (ret < 0)
3825                 goto exit;
3826         assert(dev_flow);
3827         if (qrss_id) {
3828                 const struct rte_flow_attr q_attr = {
3829                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
3830                         .ingress = 1,
3831                 };
3832                 /* Internal PMD action to set register. */
3833                 struct mlx5_rte_flow_item_tag q_tag_spec = {
3834                         .data = qrss_id,
3835                         .id = 0,
3836                 };
3837                 struct rte_flow_item q_items[] = {
3838                         {
3839                                 .type = MLX5_RTE_FLOW_ITEM_TYPE_TAG,
3840                                 .spec = &q_tag_spec,
3841                                 .last = NULL,
3842                                 .mask = NULL,
3843                         },
3844                         {
3845                                 .type = RTE_FLOW_ITEM_TYPE_END,
3846                         },
3847                 };
3848                 struct rte_flow_action q_actions[] = {
3849                         {
3850                                 .type = qrss->type,
3851                                 .conf = qrss->conf,
3852                         },
3853                         {
3854                                 .type = RTE_FLOW_ACTION_TYPE_END,
3855                         },
3856                 };
3857                 uint64_t hash_fields = dev_flow->hash_fields;
3858                 /*
3859                  * Put unique id in prefix flow due to it is destroyed after
3860                  * prefix flow and id will be freed after there is no actual
3861                  * flows with this id and identifier reallocation becomes
3862                  * possible (for example, for other flows in other threads).
3863                  */
3864                 dev_flow->qrss_id = qrss_id;
3865                 qrss_id = 0;
3866                 dev_flow = NULL;
3867                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
3868                 if (ret < 0)
3869                         goto exit;
3870                 q_tag_spec.id = ret;
3871                 /* Add suffix subflow to execute Q/RSS. */
3872                 ret = flow_create_split_inner(dev, flow, &dev_flow,
3873                                               &q_attr, q_items, q_actions,
3874                                               external, error);
3875                 if (ret < 0)
3876                         goto exit;
3877                 assert(dev_flow);
3878                 dev_flow->hash_fields = hash_fields;
3879         }
3880
3881 exit:
3882         /*
3883          * We do not destroy the partially created sub_flows in case of error.
3884          * These ones are included into parent flow list and will be destroyed
3885          * by flow_drv_destroy.
3886          */
3887         flow_qrss_free_id(dev, qrss_id);
3888         rte_free(ext_actions);
3889         return ret;
3890 }
3891
3892 /**
3893  * The splitting for meter feature.
3894  *
3895  * - The meter flow will be split to two flows as prefix and
3896  *   suffix flow. The packets make sense only it pass the prefix
3897  *   meter action.
3898  *
3899  * - Reg_C_5 is used for the packet to match betweend prefix and
3900  *   suffix flow.
3901  *
3902  * @param dev
3903  *   Pointer to Ethernet device.
3904  * @param[in] flow
3905  *   Parent flow structure pointer.
3906  * @param[in] attr
3907  *   Flow rule attributes.
3908  * @param[in] items
3909  *   Pattern specification (list terminated by the END pattern item).
3910  * @param[in] actions
3911  *   Associated actions (list terminated by the END action).
3912  * @param[in] external
3913  *   This flow rule is created by request external to PMD.
3914  * @param[out] error
3915  *   Perform verbose error reporting if not NULL.
3916  * @return
3917  *   0 on success, negative value otherwise
3918  */
3919 static int
3920 flow_create_split_meter(struct rte_eth_dev *dev,
3921                            struct rte_flow *flow,
3922                            const struct rte_flow_attr *attr,
3923                            const struct rte_flow_item items[],
3924                            const struct rte_flow_action actions[],
3925                            bool external, struct rte_flow_error *error)
3926 {
3927         struct mlx5_priv *priv = dev->data->dev_private;
3928         struct rte_flow_action *sfx_actions = NULL;
3929         struct rte_flow_action *pre_actions = NULL;
3930         struct rte_flow_item *sfx_items = NULL;
3931         const  struct rte_flow_item *sfx_port_id_item;
3932         struct mlx5_flow *dev_flow = NULL;
3933         struct rte_flow_attr sfx_attr = *attr;
3934         uint32_t mtr = 0;
3935         uint32_t mtr_tag_id = 0;
3936         size_t act_size;
3937         size_t item_size;
3938         int actions_n = 0;
3939         int ret;
3940
3941         if (priv->mtr_en)
3942                 actions_n = flow_check_meter_action(actions, &mtr);
3943         if (mtr) {
3944                 struct mlx5_rte_flow_item_tag *tag_spec;
3945                 /* The five prefix actions: meter, decap, encap, tag, end. */
3946                 act_size = sizeof(struct rte_flow_action) * (actions_n + 5) +
3947                            sizeof(struct rte_flow_action_set_tag);
3948                 /* tag, end. */
3949 #define METER_SUFFIX_ITEM 3
3950                 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
3951                             sizeof(struct mlx5_rte_flow_item_tag);
3952                 sfx_actions = rte_zmalloc(__func__, (act_size + item_size), 0);
3953                 if (!sfx_actions)
3954                         return rte_flow_error_set(error, ENOMEM,
3955                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3956                                                   NULL, "no memory to split "
3957                                                   "meter flow");
3958                 pre_actions = sfx_actions + actions_n;
3959                 mtr_tag_id = flow_meter_split_prep(dev, actions, sfx_actions,
3960                                                      pre_actions);
3961                 if (!mtr_tag_id) {
3962                         ret = -rte_errno;
3963                         goto exit;
3964                 }
3965                 /* Add the prefix subflow. */
3966                 ret = flow_create_split_inner(dev, flow, &dev_flow, attr, items,
3967                                                   pre_actions, external, error);
3968                 if (ret) {
3969                         ret = -rte_errno;
3970                         goto exit;
3971                 }
3972                 dev_flow->mtr_flow_id = mtr_tag_id;
3973                 /* Prepare the suffix flow match pattern. */
3974                 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
3975                              act_size);
3976                 tag_spec = (struct mlx5_rte_flow_item_tag *)(sfx_items +
3977                             METER_SUFFIX_ITEM);
3978                 tag_spec->data = rte_cpu_to_be_32(dev_flow->mtr_flow_id);
3979                 tag_spec->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0,
3980                                                     error);
3981                 sfx_items->type = MLX5_RTE_FLOW_ITEM_TYPE_TAG;
3982                 sfx_items->spec = tag_spec;
3983                 sfx_items->last = NULL;
3984                 sfx_items->mask = NULL;
3985                 sfx_items++;
3986                 sfx_port_id_item = find_port_id_item(items);
3987                 if (sfx_port_id_item) {
3988                         memcpy(sfx_items, sfx_port_id_item,
3989                                sizeof(*sfx_items));
3990                         sfx_items++;
3991                 }
3992                 sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
3993                 sfx_items -= METER_SUFFIX_ITEM;
3994                 /* Setting the sfx group atrr. */
3995                 sfx_attr.group = sfx_attr.transfer ?
3996                                 (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
3997                                  MLX5_FLOW_TABLE_LEVEL_SUFFIX;
3998         }
3999         /* Add the prefix subflow. */
4000         ret = flow_create_split_metadata(dev, flow, &sfx_attr,
4001                                          sfx_items ? sfx_items : items,
4002                                          sfx_actions ? sfx_actions : actions,
4003                                          external, error);
4004 exit:
4005         if (sfx_actions)
4006                 rte_free(sfx_actions);
4007         return ret;
4008 }
4009
4010 /**
4011  * Split the flow to subflow set. The splitters might be linked
4012  * in the chain, like this:
4013  * flow_create_split_outer() calls:
4014  *   flow_create_split_meter() calls:
4015  *     flow_create_split_metadata(meter_subflow_0) calls:
4016  *       flow_create_split_inner(metadata_subflow_0)
4017  *       flow_create_split_inner(metadata_subflow_1)
4018  *       flow_create_split_inner(metadata_subflow_2)
4019  *     flow_create_split_metadata(meter_subflow_1) calls:
4020  *       flow_create_split_inner(metadata_subflow_0)
4021  *       flow_create_split_inner(metadata_subflow_1)
4022  *       flow_create_split_inner(metadata_subflow_2)
4023  *
4024  * This provide flexible way to add new levels of flow splitting.
4025  * The all of successfully created subflows are included to the
4026  * parent flow dev_flow list.
4027  *
4028  * @param dev
4029  *   Pointer to Ethernet device.
4030  * @param[in] flow
4031  *   Parent flow structure pointer.
4032  * @param[in] attr
4033  *   Flow rule attributes.
4034  * @param[in] items
4035  *   Pattern specification (list terminated by the END pattern item).
4036  * @param[in] actions
4037  *   Associated actions (list terminated by the END action).
4038  * @param[in] external
4039  *   This flow rule is created by request external to PMD.
4040  * @param[out] error
4041  *   Perform verbose error reporting if not NULL.
4042  * @return
4043  *   0 on success, negative value otherwise
4044  */
4045 static int
4046 flow_create_split_outer(struct rte_eth_dev *dev,
4047                         struct rte_flow *flow,
4048                         const struct rte_flow_attr *attr,
4049                         const struct rte_flow_item items[],
4050                         const struct rte_flow_action actions[],
4051                         bool external, struct rte_flow_error *error)
4052 {
4053         int ret;
4054
4055         ret = flow_create_split_meter(dev, flow, attr, items,
4056                                          actions, external, error);
4057         assert(ret <= 0);
4058         return ret;
4059 }
4060
4061 /**
4062  * Create a flow and add it to @p list.
4063  *
4064  * @param dev
4065  *   Pointer to Ethernet device.
4066  * @param list
4067  *   Pointer to a TAILQ flow list. If this parameter NULL,
4068  *   no list insertion occurred, flow is just created,
4069  *   this is caller's responsibility to track the
4070  *   created flow.
4071  * @param[in] attr
4072  *   Flow rule attributes.
4073  * @param[in] items
4074  *   Pattern specification (list terminated by the END pattern item).
4075  * @param[in] actions
4076  *   Associated actions (list terminated by the END action).
4077  * @param[in] external
4078  *   This flow rule is created by request external to PMD.
4079  * @param[out] error
4080  *   Perform verbose error reporting if not NULL.
4081  *
4082  * @return
4083  *   A flow on success, NULL otherwise and rte_errno is set.
4084  */
4085 static struct rte_flow *
4086 flow_list_create(struct rte_eth_dev *dev, struct mlx5_flows *list,
4087                  const struct rte_flow_attr *attr,
4088                  const struct rte_flow_item items[],
4089                  const struct rte_flow_action actions[],
4090                  bool external, struct rte_flow_error *error)
4091 {
4092         struct mlx5_priv *priv = dev->data->dev_private;
4093         struct rte_flow *flow = NULL;
4094         struct mlx5_flow *dev_flow;
4095         const struct rte_flow_action_rss *rss;
4096         union {
4097                 struct rte_flow_expand_rss buf;
4098                 uint8_t buffer[2048];
4099         } expand_buffer;
4100         union {
4101                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
4102                 uint8_t buffer[2048];
4103         } actions_rx;
4104         union {
4105                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
4106                 uint8_t buffer[2048];
4107         } actions_hairpin_tx;
4108         union {
4109                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
4110                 uint8_t buffer[2048];
4111         } items_tx;
4112         struct rte_flow_expand_rss *buf = &expand_buffer.buf;
4113         const struct rte_flow_action *p_actions_rx = actions;
4114         int ret;
4115         uint32_t i;
4116         uint32_t flow_size;
4117         int hairpin_flow = 0;
4118         uint32_t hairpin_id = 0;
4119         struct rte_flow_attr attr_tx = { .priority = 0 };
4120
4121         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
4122         if (hairpin_flow > 0) {
4123                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
4124                         rte_errno = EINVAL;
4125                         return NULL;
4126                 }
4127                 flow_hairpin_split(dev, actions, actions_rx.actions,
4128                                    actions_hairpin_tx.actions, items_tx.items,
4129                                    &hairpin_id);
4130                 p_actions_rx = actions_rx.actions;
4131         }
4132         ret = flow_drv_validate(dev, attr, items, p_actions_rx, external,
4133                                 error);
4134         if (ret < 0)
4135                 goto error_before_flow;
4136         flow_size = sizeof(struct rte_flow);
4137         rss = flow_get_rss_action(p_actions_rx);
4138         if (rss)
4139                 flow_size += RTE_ALIGN_CEIL(rss->queue_num * sizeof(uint16_t),
4140                                             sizeof(void *));
4141         else
4142                 flow_size += RTE_ALIGN_CEIL(sizeof(uint16_t), sizeof(void *));
4143         flow = rte_calloc(__func__, 1, flow_size, 0);
4144         if (!flow) {
4145                 rte_errno = ENOMEM;
4146                 goto error_before_flow;
4147         }
4148         flow->drv_type = flow_get_drv_type(dev, attr);
4149         if (hairpin_id != 0)
4150                 flow->hairpin_flow_id = hairpin_id;
4151         assert(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
4152                flow->drv_type < MLX5_FLOW_TYPE_MAX);
4153         flow->rss.queue = (void *)(flow + 1);
4154         if (rss) {
4155                 /*
4156                  * The following information is required by
4157                  * mlx5_flow_hashfields_adjust() in advance.
4158                  */
4159                 flow->rss.level = rss->level;
4160                 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
4161                 flow->rss.types = !rss->types ? ETH_RSS_IP : rss->types;
4162         }
4163         LIST_INIT(&flow->dev_flows);
4164         if (rss && rss->types) {
4165                 unsigned int graph_root;
4166
4167                 graph_root = find_graph_root(items, rss->level);
4168                 ret = rte_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
4169                                           items, rss->types,
4170                                           mlx5_support_expansion,
4171                                           graph_root);
4172                 assert(ret > 0 &&
4173                        (unsigned int)ret < sizeof(expand_buffer.buffer));
4174         } else {
4175                 buf->entries = 1;
4176                 buf->entry[0].pattern = (void *)(uintptr_t)items;
4177         }
4178         for (i = 0; i < buf->entries; ++i) {
4179                 /*
4180                  * The splitter may create multiple dev_flows,
4181                  * depending on configuration. In the simplest
4182                  * case it just creates unmodified original flow.
4183                  */
4184                 ret = flow_create_split_outer(dev, flow, attr,
4185                                               buf->entry[i].pattern,
4186                                               p_actions_rx, external,
4187                                               error);
4188                 if (ret < 0)
4189                         goto error;
4190         }
4191         /* Create the tx flow. */
4192         if (hairpin_flow) {
4193                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
4194                 attr_tx.ingress = 0;
4195                 attr_tx.egress = 1;
4196                 dev_flow = flow_drv_prepare(flow, &attr_tx, items_tx.items,
4197                                             actions_hairpin_tx.actions, error);
4198                 if (!dev_flow)
4199                         goto error;
4200                 dev_flow->flow = flow;
4201                 dev_flow->external = 0;
4202                 LIST_INSERT_HEAD(&flow->dev_flows, dev_flow, next);
4203                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
4204                                          items_tx.items,
4205                                          actions_hairpin_tx.actions, error);
4206                 if (ret < 0)
4207                         goto error;
4208         }
4209         /*
4210          * Update the metadata register copy table. If extensive
4211          * metadata feature is enabled and registers are supported
4212          * we might create the extra rte_flow for each unique
4213          * MARK/FLAG action ID.
4214          *
4215          * The table is updated for ingress Flows only, because
4216          * the egress Flows belong to the different device and
4217          * copy table should be updated in peer NIC Rx domain.
4218          */
4219         if (attr->ingress &&
4220             (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
4221                 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
4222                 if (ret)
4223                         goto error;
4224         }
4225         if (dev->data->dev_started) {
4226                 ret = flow_drv_apply(dev, flow, error);
4227                 if (ret < 0)
4228                         goto error;
4229         }
4230         if (list)
4231                 TAILQ_INSERT_TAIL(list, flow, next);
4232         flow_rxq_flags_set(dev, flow);
4233         return flow;
4234 error_before_flow:
4235         if (hairpin_id)
4236                 mlx5_flow_id_release(priv->sh->flow_id_pool,
4237                                      hairpin_id);
4238         return NULL;
4239 error:
4240         assert(flow);
4241         flow_mreg_del_copy_action(dev, flow);
4242         ret = rte_errno; /* Save rte_errno before cleanup. */
4243         if (flow->hairpin_flow_id)
4244                 mlx5_flow_id_release(priv->sh->flow_id_pool,
4245                                      flow->hairpin_flow_id);
4246         assert(flow);
4247         flow_drv_destroy(dev, flow);
4248         rte_free(flow);
4249         rte_errno = ret; /* Restore rte_errno. */
4250         return NULL;
4251 }
4252
4253 /**
4254  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
4255  * incoming packets to table 1.
4256  *
4257  * Other flow rules, requested for group n, will be created in
4258  * e-switch table n+1.
4259  * Jump action to e-switch group n will be created to group n+1.
4260  *
4261  * Used when working in switchdev mode, to utilise advantages of table 1
4262  * and above.
4263  *
4264  * @param dev
4265  *   Pointer to Ethernet device.
4266  *
4267  * @return
4268  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
4269  */
4270 struct rte_flow *
4271 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
4272 {
4273         const struct rte_flow_attr attr = {
4274                 .group = 0,
4275                 .priority = 0,
4276                 .ingress = 1,
4277                 .egress = 0,
4278                 .transfer = 1,
4279         };
4280         const struct rte_flow_item pattern = {
4281                 .type = RTE_FLOW_ITEM_TYPE_END,
4282         };
4283         struct rte_flow_action_jump jump = {
4284                 .group = 1,
4285         };
4286         const struct rte_flow_action actions[] = {
4287                 {
4288                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4289                         .conf = &jump,
4290                 },
4291                 {
4292                         .type = RTE_FLOW_ACTION_TYPE_END,
4293                 },
4294         };
4295         struct mlx5_priv *priv = dev->data->dev_private;
4296         struct rte_flow_error error;
4297
4298         return flow_list_create(dev, &priv->ctrl_flows, &attr, &pattern,
4299                                 actions, false, &error);
4300 }
4301
4302 /**
4303  * Create a flow.
4304  *
4305  * @see rte_flow_create()
4306  * @see rte_flow_ops
4307  */
4308 struct rte_flow *
4309 mlx5_flow_create(struct rte_eth_dev *dev,
4310                  const struct rte_flow_attr *attr,
4311                  const struct rte_flow_item items[],
4312                  const struct rte_flow_action actions[],
4313                  struct rte_flow_error *error)
4314 {
4315         struct mlx5_priv *priv = dev->data->dev_private;
4316
4317         return flow_list_create(dev, &priv->flows,
4318                                 attr, items, actions, true, error);
4319 }
4320
4321 /**
4322  * Destroy a flow in a list.
4323  *
4324  * @param dev
4325  *   Pointer to Ethernet device.
4326  * @param list
4327  *   Pointer to a TAILQ flow list. If this parameter NULL,
4328  *   there is no flow removal from the list.
4329  * @param[in] flow
4330  *   Flow to destroy.
4331  */
4332 static void
4333 flow_list_destroy(struct rte_eth_dev *dev, struct mlx5_flows *list,
4334                   struct rte_flow *flow)
4335 {
4336         struct mlx5_priv *priv = dev->data->dev_private;
4337
4338         /*
4339          * Update RX queue flags only if port is started, otherwise it is
4340          * already clean.
4341          */
4342         if (dev->data->dev_started)
4343                 flow_rxq_flags_trim(dev, flow);
4344         if (flow->hairpin_flow_id)
4345                 mlx5_flow_id_release(priv->sh->flow_id_pool,
4346                                      flow->hairpin_flow_id);
4347         flow_drv_destroy(dev, flow);
4348         if (list)
4349                 TAILQ_REMOVE(list, flow, next);
4350         flow_mreg_del_copy_action(dev, flow);
4351         rte_free(flow->fdir);
4352         rte_free(flow);
4353 }
4354
4355 /**
4356  * Destroy all flows.
4357  *
4358  * @param dev
4359  *   Pointer to Ethernet device.
4360  * @param list
4361  *   Pointer to a TAILQ flow list.
4362  */
4363 void
4364 mlx5_flow_list_flush(struct rte_eth_dev *dev, struct mlx5_flows *list)
4365 {
4366         while (!TAILQ_EMPTY(list)) {
4367                 struct rte_flow *flow;
4368
4369                 flow = TAILQ_FIRST(list);
4370                 flow_list_destroy(dev, list, flow);
4371         }
4372 }
4373
4374 /**
4375  * Remove all flows.
4376  *
4377  * @param dev
4378  *   Pointer to Ethernet device.
4379  * @param list
4380  *   Pointer to a TAILQ flow list.
4381  */
4382 void
4383 mlx5_flow_stop(struct rte_eth_dev *dev, struct mlx5_flows *list)
4384 {
4385         struct rte_flow *flow;
4386
4387         TAILQ_FOREACH_REVERSE(flow, list, mlx5_flows, next) {
4388                 flow_drv_remove(dev, flow);
4389                 flow_mreg_stop_copy_action(dev, flow);
4390         }
4391         flow_mreg_del_default_copy_action(dev);
4392         flow_rxq_flags_clear(dev);
4393 }
4394
4395 /**
4396  * Add all flows.
4397  *
4398  * @param dev
4399  *   Pointer to Ethernet device.
4400  * @param list
4401  *   Pointer to a TAILQ flow list.
4402  *
4403  * @return
4404  *   0 on success, a negative errno value otherwise and rte_errno is set.
4405  */
4406 int
4407 mlx5_flow_start(struct rte_eth_dev *dev, struct mlx5_flows *list)
4408 {
4409         struct rte_flow *flow;
4410         struct rte_flow_error error;
4411         int ret = 0;
4412
4413         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
4414         ret = flow_mreg_add_default_copy_action(dev, &error);
4415         if (ret < 0)
4416                 return -rte_errno;
4417         /* Apply Flows created by application. */
4418         TAILQ_FOREACH(flow, list, next) {
4419                 ret = flow_mreg_start_copy_action(dev, flow);
4420                 if (ret < 0)
4421                         goto error;
4422                 ret = flow_drv_apply(dev, flow, &error);
4423                 if (ret < 0)
4424                         goto error;
4425                 flow_rxq_flags_set(dev, flow);
4426         }
4427         return 0;
4428 error:
4429         ret = rte_errno; /* Save rte_errno before cleanup. */
4430         mlx5_flow_stop(dev, list);
4431         rte_errno = ret; /* Restore rte_errno. */
4432         return -rte_errno;
4433 }
4434
4435 /**
4436  * Verify the flow list is empty
4437  *
4438  * @param dev
4439  *  Pointer to Ethernet device.
4440  *
4441  * @return the number of flows not released.
4442  */
4443 int
4444 mlx5_flow_verify(struct rte_eth_dev *dev)
4445 {
4446         struct mlx5_priv *priv = dev->data->dev_private;
4447         struct rte_flow *flow;
4448         int ret = 0;
4449
4450         TAILQ_FOREACH(flow, &priv->flows, next) {
4451                 DRV_LOG(DEBUG, "port %u flow %p still referenced",
4452                         dev->data->port_id, (void *)flow);
4453                 ++ret;
4454         }
4455         return ret;
4456 }
4457
4458 /**
4459  * Enable default hairpin egress flow.
4460  *
4461  * @param dev
4462  *   Pointer to Ethernet device.
4463  * @param queue
4464  *   The queue index.
4465  *
4466  * @return
4467  *   0 on success, a negative errno value otherwise and rte_errno is set.
4468  */
4469 int
4470 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
4471                             uint32_t queue)
4472 {
4473         struct mlx5_priv *priv = dev->data->dev_private;
4474         const struct rte_flow_attr attr = {
4475                 .egress = 1,
4476                 .priority = 0,
4477         };
4478         struct mlx5_rte_flow_item_tx_queue queue_spec = {
4479                 .queue = queue,
4480         };
4481         struct mlx5_rte_flow_item_tx_queue queue_mask = {
4482                 .queue = UINT32_MAX,
4483         };
4484         struct rte_flow_item items[] = {
4485                 {
4486                         .type = MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
4487                         .spec = &queue_spec,
4488                         .last = NULL,
4489                         .mask = &queue_mask,
4490                 },
4491                 {
4492                         .type = RTE_FLOW_ITEM_TYPE_END,
4493                 },
4494         };
4495         struct rte_flow_action_jump jump = {
4496                 .group = MLX5_HAIRPIN_TX_TABLE,
4497         };
4498         struct rte_flow_action actions[2];
4499         struct rte_flow *flow;
4500         struct rte_flow_error error;
4501
4502         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
4503         actions[0].conf = &jump;
4504         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
4505         flow = flow_list_create(dev, &priv->ctrl_flows,
4506                                 &attr, items, actions, false, &error);
4507         if (!flow) {
4508                 DRV_LOG(DEBUG,
4509                         "Failed to create ctrl flow: rte_errno(%d),"
4510                         " type(%d), message(%s)",
4511                         rte_errno, error.type,
4512                         error.message ? error.message : " (no stated reason)");
4513                 return -rte_errno;
4514         }
4515         return 0;
4516 }
4517
4518 /**
4519  * Enable a control flow configured from the control plane.
4520  *
4521  * @param dev
4522  *   Pointer to Ethernet device.
4523  * @param eth_spec
4524  *   An Ethernet flow spec to apply.
4525  * @param eth_mask
4526  *   An Ethernet flow mask to apply.
4527  * @param vlan_spec
4528  *   A VLAN flow spec to apply.
4529  * @param vlan_mask
4530  *   A VLAN flow mask to apply.
4531  *
4532  * @return
4533  *   0 on success, a negative errno value otherwise and rte_errno is set.
4534  */
4535 int
4536 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
4537                     struct rte_flow_item_eth *eth_spec,
4538                     struct rte_flow_item_eth *eth_mask,
4539                     struct rte_flow_item_vlan *vlan_spec,
4540                     struct rte_flow_item_vlan *vlan_mask)
4541 {
4542         struct mlx5_priv *priv = dev->data->dev_private;
4543         const struct rte_flow_attr attr = {
4544                 .ingress = 1,
4545                 .priority = MLX5_FLOW_PRIO_RSVD,
4546         };
4547         struct rte_flow_item items[] = {
4548                 {
4549                         .type = RTE_FLOW_ITEM_TYPE_ETH,
4550                         .spec = eth_spec,
4551                         .last = NULL,
4552                         .mask = eth_mask,
4553                 },
4554                 {
4555                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
4556                                               RTE_FLOW_ITEM_TYPE_END,
4557                         .spec = vlan_spec,
4558                         .last = NULL,
4559                         .mask = vlan_mask,
4560                 },
4561                 {
4562                         .type = RTE_FLOW_ITEM_TYPE_END,
4563                 },
4564         };
4565         uint16_t queue[priv->reta_idx_n];
4566         struct rte_flow_action_rss action_rss = {
4567                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
4568                 .level = 0,
4569                 .types = priv->rss_conf.rss_hf,
4570                 .key_len = priv->rss_conf.rss_key_len,
4571                 .queue_num = priv->reta_idx_n,
4572                 .key = priv->rss_conf.rss_key,
4573                 .queue = queue,
4574         };
4575         struct rte_flow_action actions[] = {
4576                 {
4577                         .type = RTE_FLOW_ACTION_TYPE_RSS,
4578                         .conf = &action_rss,
4579                 },
4580                 {
4581                         .type = RTE_FLOW_ACTION_TYPE_END,
4582                 },
4583         };
4584         struct rte_flow *flow;
4585         struct rte_flow_error error;
4586         unsigned int i;
4587
4588         if (!priv->reta_idx_n || !priv->rxqs_n) {
4589                 return 0;
4590         }
4591         for (i = 0; i != priv->reta_idx_n; ++i)
4592                 queue[i] = (*priv->reta_idx)[i];
4593         flow = flow_list_create(dev, &priv->ctrl_flows,
4594                                 &attr, items, actions, false, &error);
4595         if (!flow)
4596                 return -rte_errno;
4597         return 0;
4598 }
4599
4600 /**
4601  * Enable a flow control configured from the control plane.
4602  *
4603  * @param dev
4604  *   Pointer to Ethernet device.
4605  * @param eth_spec
4606  *   An Ethernet flow spec to apply.
4607  * @param eth_mask
4608  *   An Ethernet flow mask to apply.
4609  *
4610  * @return
4611  *   0 on success, a negative errno value otherwise and rte_errno is set.
4612  */
4613 int
4614 mlx5_ctrl_flow(struct rte_eth_dev *dev,
4615                struct rte_flow_item_eth *eth_spec,
4616                struct rte_flow_item_eth *eth_mask)
4617 {
4618         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
4619 }
4620
4621 /**
4622  * Destroy a flow.
4623  *
4624  * @see rte_flow_destroy()
4625  * @see rte_flow_ops
4626  */
4627 int
4628 mlx5_flow_destroy(struct rte_eth_dev *dev,
4629                   struct rte_flow *flow,
4630                   struct rte_flow_error *error __rte_unused)
4631 {
4632         struct mlx5_priv *priv = dev->data->dev_private;
4633
4634         flow_list_destroy(dev, &priv->flows, flow);
4635         return 0;
4636 }
4637
4638 /**
4639  * Destroy all flows.
4640  *
4641  * @see rte_flow_flush()
4642  * @see rte_flow_ops
4643  */
4644 int
4645 mlx5_flow_flush(struct rte_eth_dev *dev,
4646                 struct rte_flow_error *error __rte_unused)
4647 {
4648         struct mlx5_priv *priv = dev->data->dev_private;
4649
4650         mlx5_flow_list_flush(dev, &priv->flows);
4651         return 0;
4652 }
4653
4654 /**
4655  * Isolated mode.
4656  *
4657  * @see rte_flow_isolate()
4658  * @see rte_flow_ops
4659  */
4660 int
4661 mlx5_flow_isolate(struct rte_eth_dev *dev,
4662                   int enable,
4663                   struct rte_flow_error *error)
4664 {
4665         struct mlx5_priv *priv = dev->data->dev_private;
4666
4667         if (dev->data->dev_started) {
4668                 rte_flow_error_set(error, EBUSY,
4669                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4670                                    NULL,
4671                                    "port must be stopped first");
4672                 return -rte_errno;
4673         }
4674         priv->isolated = !!enable;
4675         if (enable)
4676                 dev->dev_ops = &mlx5_dev_ops_isolate;
4677         else
4678                 dev->dev_ops = &mlx5_dev_ops;
4679         return 0;
4680 }
4681
4682 /**
4683  * Query a flow.
4684  *
4685  * @see rte_flow_query()
4686  * @see rte_flow_ops
4687  */
4688 static int
4689 flow_drv_query(struct rte_eth_dev *dev,
4690                struct rte_flow *flow,
4691                const struct rte_flow_action *actions,
4692                void *data,
4693                struct rte_flow_error *error)
4694 {
4695         const struct mlx5_flow_driver_ops *fops;
4696         enum mlx5_flow_drv_type ftype = flow->drv_type;
4697
4698         assert(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
4699         fops = flow_get_drv_ops(ftype);
4700
4701         return fops->query(dev, flow, actions, data, error);
4702 }
4703
4704 /**
4705  * Query a flow.
4706  *
4707  * @see rte_flow_query()
4708  * @see rte_flow_ops
4709  */
4710 int
4711 mlx5_flow_query(struct rte_eth_dev *dev,
4712                 struct rte_flow *flow,
4713                 const struct rte_flow_action *actions,
4714                 void *data,
4715                 struct rte_flow_error *error)
4716 {
4717         int ret;
4718
4719         ret = flow_drv_query(dev, flow, actions, data, error);
4720         if (ret < 0)
4721                 return ret;
4722         return 0;
4723 }
4724
4725 /**
4726  * Convert a flow director filter to a generic flow.
4727  *
4728  * @param dev
4729  *   Pointer to Ethernet device.
4730  * @param fdir_filter
4731  *   Flow director filter to add.
4732  * @param attributes
4733  *   Generic flow parameters structure.
4734  *
4735  * @return
4736  *   0 on success, a negative errno value otherwise and rte_errno is set.
4737  */
4738 static int
4739 flow_fdir_filter_convert(struct rte_eth_dev *dev,
4740                          const struct rte_eth_fdir_filter *fdir_filter,
4741                          struct mlx5_fdir *attributes)
4742 {
4743         struct mlx5_priv *priv = dev->data->dev_private;
4744         const struct rte_eth_fdir_input *input = &fdir_filter->input;
4745         const struct rte_eth_fdir_masks *mask =
4746                 &dev->data->dev_conf.fdir_conf.mask;
4747
4748         /* Validate queue number. */
4749         if (fdir_filter->action.rx_queue >= priv->rxqs_n) {
4750                 DRV_LOG(ERR, "port %u invalid queue number %d",
4751                         dev->data->port_id, fdir_filter->action.rx_queue);
4752                 rte_errno = EINVAL;
4753                 return -rte_errno;
4754         }
4755         attributes->attr.ingress = 1;
4756         attributes->items[0] = (struct rte_flow_item) {
4757                 .type = RTE_FLOW_ITEM_TYPE_ETH,
4758                 .spec = &attributes->l2,
4759                 .mask = &attributes->l2_mask,
4760         };
4761         switch (fdir_filter->action.behavior) {
4762         case RTE_ETH_FDIR_ACCEPT:
4763                 attributes->actions[0] = (struct rte_flow_action){
4764                         .type = RTE_FLOW_ACTION_TYPE_QUEUE,
4765                         .conf = &attributes->queue,
4766                 };
4767                 break;
4768         case RTE_ETH_FDIR_REJECT:
4769                 attributes->actions[0] = (struct rte_flow_action){
4770                         .type = RTE_FLOW_ACTION_TYPE_DROP,
4771                 };
4772                 break;
4773         default:
4774                 DRV_LOG(ERR, "port %u invalid behavior %d",
4775                         dev->data->port_id,
4776                         fdir_filter->action.behavior);
4777                 rte_errno = ENOTSUP;
4778                 return -rte_errno;
4779         }
4780         attributes->queue.index = fdir_filter->action.rx_queue;
4781         /* Handle L3. */
4782         switch (fdir_filter->input.flow_type) {
4783         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
4784         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
4785         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
4786                 attributes->l3.ipv4.hdr = (struct rte_ipv4_hdr){
4787                         .src_addr = input->flow.ip4_flow.src_ip,
4788                         .dst_addr = input->flow.ip4_flow.dst_ip,
4789                         .time_to_live = input->flow.ip4_flow.ttl,
4790                         .type_of_service = input->flow.ip4_flow.tos,
4791                 };
4792                 attributes->l3_mask.ipv4.hdr = (struct rte_ipv4_hdr){
4793                         .src_addr = mask->ipv4_mask.src_ip,
4794                         .dst_addr = mask->ipv4_mask.dst_ip,
4795                         .time_to_live = mask->ipv4_mask.ttl,
4796                         .type_of_service = mask->ipv4_mask.tos,
4797                         .next_proto_id = mask->ipv4_mask.proto,
4798                 };
4799                 attributes->items[1] = (struct rte_flow_item){
4800                         .type = RTE_FLOW_ITEM_TYPE_IPV4,
4801                         .spec = &attributes->l3,
4802                         .mask = &attributes->l3_mask,
4803                 };
4804                 break;
4805         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
4806         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
4807         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
4808                 attributes->l3.ipv6.hdr = (struct rte_ipv6_hdr){
4809                         .hop_limits = input->flow.ipv6_flow.hop_limits,
4810                         .proto = input->flow.ipv6_flow.proto,
4811                 };
4812
4813                 memcpy(attributes->l3.ipv6.hdr.src_addr,
4814                        input->flow.ipv6_flow.src_ip,
4815                        RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
4816                 memcpy(attributes->l3.ipv6.hdr.dst_addr,
4817                        input->flow.ipv6_flow.dst_ip,
4818                        RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
4819                 memcpy(attributes->l3_mask.ipv6.hdr.src_addr,
4820                        mask->ipv6_mask.src_ip,
4821                        RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
4822                 memcpy(attributes->l3_mask.ipv6.hdr.dst_addr,
4823                        mask->ipv6_mask.dst_ip,
4824                        RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
4825                 attributes->items[1] = (struct rte_flow_item){
4826                         .type = RTE_FLOW_ITEM_TYPE_IPV6,
4827                         .spec = &attributes->l3,
4828                         .mask = &attributes->l3_mask,
4829                 };
4830                 break;
4831         default:
4832                 DRV_LOG(ERR, "port %u invalid flow type%d",
4833                         dev->data->port_id, fdir_filter->input.flow_type);
4834                 rte_errno = ENOTSUP;
4835                 return -rte_errno;
4836         }
4837         /* Handle L4. */
4838         switch (fdir_filter->input.flow_type) {
4839         case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
4840                 attributes->l4.udp.hdr = (struct rte_udp_hdr){
4841                         .src_port = input->flow.udp4_flow.src_port,
4842                         .dst_port = input->flow.udp4_flow.dst_port,
4843                 };
4844                 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
4845                         .src_port = mask->src_port_mask,
4846                         .dst_port = mask->dst_port_mask,
4847                 };
4848                 attributes->items[2] = (struct rte_flow_item){
4849                         .type = RTE_FLOW_ITEM_TYPE_UDP,
4850                         .spec = &attributes->l4,
4851                         .mask = &attributes->l4_mask,
4852                 };
4853                 break;
4854         case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
4855                 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
4856                         .src_port = input->flow.tcp4_flow.src_port,
4857                         .dst_port = input->flow.tcp4_flow.dst_port,
4858                 };
4859                 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
4860                         .src_port = mask->src_port_mask,
4861                         .dst_port = mask->dst_port_mask,
4862                 };
4863                 attributes->items[2] = (struct rte_flow_item){
4864                         .type = RTE_FLOW_ITEM_TYPE_TCP,
4865                         .spec = &attributes->l4,
4866                         .mask = &attributes->l4_mask,
4867                 };
4868                 break;
4869         case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
4870                 attributes->l4.udp.hdr = (struct rte_udp_hdr){
4871                         .src_port = input->flow.udp6_flow.src_port,
4872                         .dst_port = input->flow.udp6_flow.dst_port,
4873                 };
4874                 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
4875                         .src_port = mask->src_port_mask,
4876                         .dst_port = mask->dst_port_mask,
4877                 };
4878                 attributes->items[2] = (struct rte_flow_item){
4879                         .type = RTE_FLOW_ITEM_TYPE_UDP,
4880                         .spec = &attributes->l4,
4881                         .mask = &attributes->l4_mask,
4882                 };
4883                 break;
4884         case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
4885                 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
4886                         .src_port = input->flow.tcp6_flow.src_port,
4887                         .dst_port = input->flow.tcp6_flow.dst_port,
4888                 };
4889                 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
4890                         .src_port = mask->src_port_mask,
4891                         .dst_port = mask->dst_port_mask,
4892                 };
4893                 attributes->items[2] = (struct rte_flow_item){
4894                         .type = RTE_FLOW_ITEM_TYPE_TCP,
4895                         .spec = &attributes->l4,
4896                         .mask = &attributes->l4_mask,
4897                 };
4898                 break;
4899         case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
4900         case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
4901                 break;
4902         default:
4903                 DRV_LOG(ERR, "port %u invalid flow type%d",
4904                         dev->data->port_id, fdir_filter->input.flow_type);
4905                 rte_errno = ENOTSUP;
4906                 return -rte_errno;
4907         }
4908         return 0;
4909 }
4910
4911 #define FLOW_FDIR_CMP(f1, f2, fld) \
4912         memcmp(&(f1)->fld, &(f2)->fld, sizeof(f1->fld))
4913
4914 /**
4915  * Compare two FDIR flows. If items and actions are identical, the two flows are
4916  * regarded as same.
4917  *
4918  * @param dev
4919  *   Pointer to Ethernet device.
4920  * @param f1
4921  *   FDIR flow to compare.
4922  * @param f2
4923  *   FDIR flow to compare.
4924  *
4925  * @return
4926  *   Zero on match, 1 otherwise.
4927  */
4928 static int
4929 flow_fdir_cmp(const struct mlx5_fdir *f1, const struct mlx5_fdir *f2)
4930 {
4931         if (FLOW_FDIR_CMP(f1, f2, attr) ||
4932             FLOW_FDIR_CMP(f1, f2, l2) ||
4933             FLOW_FDIR_CMP(f1, f2, l2_mask) ||
4934             FLOW_FDIR_CMP(f1, f2, l3) ||
4935             FLOW_FDIR_CMP(f1, f2, l3_mask) ||
4936             FLOW_FDIR_CMP(f1, f2, l4) ||
4937             FLOW_FDIR_CMP(f1, f2, l4_mask) ||
4938             FLOW_FDIR_CMP(f1, f2, actions[0].type))
4939                 return 1;
4940         if (f1->actions[0].type == RTE_FLOW_ACTION_TYPE_QUEUE &&
4941             FLOW_FDIR_CMP(f1, f2, queue))
4942                 return 1;
4943         return 0;
4944 }
4945
4946 /**
4947  * Search device flow list to find out a matched FDIR flow.
4948  *
4949  * @param dev
4950  *   Pointer to Ethernet device.
4951  * @param fdir_flow
4952  *   FDIR flow to lookup.
4953  *
4954  * @return
4955  *   Pointer of flow if found, NULL otherwise.
4956  */
4957 static struct rte_flow *
4958 flow_fdir_filter_lookup(struct rte_eth_dev *dev, struct mlx5_fdir *fdir_flow)
4959 {
4960         struct mlx5_priv *priv = dev->data->dev_private;
4961         struct rte_flow *flow = NULL;
4962
4963         assert(fdir_flow);
4964         TAILQ_FOREACH(flow, &priv->flows, next) {
4965                 if (flow->fdir && !flow_fdir_cmp(flow->fdir, fdir_flow)) {
4966                         DRV_LOG(DEBUG, "port %u found FDIR flow %p",
4967                                 dev->data->port_id, (void *)flow);
4968                         break;
4969                 }
4970         }
4971         return flow;
4972 }
4973
4974 /**
4975  * Add new flow director filter and store it in list.
4976  *
4977  * @param dev
4978  *   Pointer to Ethernet device.
4979  * @param fdir_filter
4980  *   Flow director filter to add.
4981  *
4982  * @return
4983  *   0 on success, a negative errno value otherwise and rte_errno is set.
4984  */
4985 static int
4986 flow_fdir_filter_add(struct rte_eth_dev *dev,
4987                      const struct rte_eth_fdir_filter *fdir_filter)
4988 {
4989         struct mlx5_priv *priv = dev->data->dev_private;
4990         struct mlx5_fdir *fdir_flow;
4991         struct rte_flow *flow;
4992         int ret;
4993
4994         fdir_flow = rte_zmalloc(__func__, sizeof(*fdir_flow), 0);
4995         if (!fdir_flow) {
4996                 rte_errno = ENOMEM;
4997                 return -rte_errno;
4998         }
4999         ret = flow_fdir_filter_convert(dev, fdir_filter, fdir_flow);
5000         if (ret)
5001                 goto error;
5002         flow = flow_fdir_filter_lookup(dev, fdir_flow);
5003         if (flow) {
5004                 rte_errno = EEXIST;
5005                 goto error;
5006         }
5007         flow = flow_list_create(dev, &priv->flows, &fdir_flow->attr,
5008                                 fdir_flow->items, fdir_flow->actions, true,
5009                                 NULL);
5010         if (!flow)
5011                 goto error;
5012         assert(!flow->fdir);
5013         flow->fdir = fdir_flow;
5014         DRV_LOG(DEBUG, "port %u created FDIR flow %p",
5015                 dev->data->port_id, (void *)flow);
5016         return 0;
5017 error:
5018         rte_free(fdir_flow);
5019         return -rte_errno;
5020 }
5021
5022 /**
5023  * Delete specific filter.
5024  *
5025  * @param dev
5026  *   Pointer to Ethernet device.
5027  * @param fdir_filter
5028  *   Filter to be deleted.
5029  *
5030  * @return
5031  *   0 on success, a negative errno value otherwise and rte_errno is set.
5032  */
5033 static int
5034 flow_fdir_filter_delete(struct rte_eth_dev *dev,
5035                         const struct rte_eth_fdir_filter *fdir_filter)
5036 {
5037         struct mlx5_priv *priv = dev->data->dev_private;
5038         struct rte_flow *flow;
5039         struct mlx5_fdir fdir_flow = {
5040                 .attr.group = 0,
5041         };
5042         int ret;
5043
5044         ret = flow_fdir_filter_convert(dev, fdir_filter, &fdir_flow);
5045         if (ret)
5046                 return -rte_errno;
5047         flow = flow_fdir_filter_lookup(dev, &fdir_flow);
5048         if (!flow) {
5049                 rte_errno = ENOENT;
5050                 return -rte_errno;
5051         }
5052         flow_list_destroy(dev, &priv->flows, flow);
5053         DRV_LOG(DEBUG, "port %u deleted FDIR flow %p",
5054                 dev->data->port_id, (void *)flow);
5055         return 0;
5056 }
5057
5058 /**
5059  * Update queue for specific filter.
5060  *
5061  * @param dev
5062  *   Pointer to Ethernet device.
5063  * @param fdir_filter
5064  *   Filter to be updated.
5065  *
5066  * @return
5067  *   0 on success, a negative errno value otherwise and rte_errno is set.
5068  */
5069 static int
5070 flow_fdir_filter_update(struct rte_eth_dev *dev,
5071                         const struct rte_eth_fdir_filter *fdir_filter)
5072 {
5073         int ret;
5074
5075         ret = flow_fdir_filter_delete(dev, fdir_filter);
5076         if (ret)
5077                 return ret;
5078         return flow_fdir_filter_add(dev, fdir_filter);
5079 }
5080
5081 /**
5082  * Flush all filters.
5083  *
5084  * @param dev
5085  *   Pointer to Ethernet device.
5086  */
5087 static void
5088 flow_fdir_filter_flush(struct rte_eth_dev *dev)
5089 {
5090         struct mlx5_priv *priv = dev->data->dev_private;
5091
5092         mlx5_flow_list_flush(dev, &priv->flows);
5093 }
5094
5095 /**
5096  * Get flow director information.
5097  *
5098  * @param dev
5099  *   Pointer to Ethernet device.
5100  * @param[out] fdir_info
5101  *   Resulting flow director information.
5102  */
5103 static void
5104 flow_fdir_info_get(struct rte_eth_dev *dev, struct rte_eth_fdir_info *fdir_info)
5105 {
5106         struct rte_eth_fdir_masks *mask =
5107                 &dev->data->dev_conf.fdir_conf.mask;
5108
5109         fdir_info->mode = dev->data->dev_conf.fdir_conf.mode;
5110         fdir_info->guarant_spc = 0;
5111         rte_memcpy(&fdir_info->mask, mask, sizeof(fdir_info->mask));
5112         fdir_info->max_flexpayload = 0;
5113         fdir_info->flow_types_mask[0] = 0;
5114         fdir_info->flex_payload_unit = 0;
5115         fdir_info->max_flex_payload_segment_num = 0;
5116         fdir_info->flex_payload_limit = 0;
5117         memset(&fdir_info->flex_conf, 0, sizeof(fdir_info->flex_conf));
5118 }
5119
5120 /**
5121  * Deal with flow director operations.
5122  *
5123  * @param dev
5124  *   Pointer to Ethernet device.
5125  * @param filter_op
5126  *   Operation to perform.
5127  * @param arg
5128  *   Pointer to operation-specific structure.
5129  *
5130  * @return
5131  *   0 on success, a negative errno value otherwise and rte_errno is set.
5132  */
5133 static int
5134 flow_fdir_ctrl_func(struct rte_eth_dev *dev, enum rte_filter_op filter_op,
5135                     void *arg)
5136 {
5137         enum rte_fdir_mode fdir_mode =
5138                 dev->data->dev_conf.fdir_conf.mode;
5139
5140         if (filter_op == RTE_ETH_FILTER_NOP)
5141                 return 0;
5142         if (fdir_mode != RTE_FDIR_MODE_PERFECT &&
5143             fdir_mode != RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
5144                 DRV_LOG(ERR, "port %u flow director mode %d not supported",
5145                         dev->data->port_id, fdir_mode);
5146                 rte_errno = EINVAL;
5147                 return -rte_errno;
5148         }
5149         switch (filter_op) {
5150         case RTE_ETH_FILTER_ADD:
5151                 return flow_fdir_filter_add(dev, arg);
5152         case RTE_ETH_FILTER_UPDATE:
5153                 return flow_fdir_filter_update(dev, arg);
5154         case RTE_ETH_FILTER_DELETE:
5155                 return flow_fdir_filter_delete(dev, arg);
5156         case RTE_ETH_FILTER_FLUSH:
5157                 flow_fdir_filter_flush(dev);
5158                 break;
5159         case RTE_ETH_FILTER_INFO:
5160                 flow_fdir_info_get(dev, arg);
5161                 break;
5162         default:
5163                 DRV_LOG(DEBUG, "port %u unknown operation %u",
5164                         dev->data->port_id, filter_op);
5165                 rte_errno = EINVAL;
5166                 return -rte_errno;
5167         }
5168         return 0;
5169 }
5170
5171 /**
5172  * Manage filter operations.
5173  *
5174  * @param dev
5175  *   Pointer to Ethernet device structure.
5176  * @param filter_type
5177  *   Filter type.
5178  * @param filter_op
5179  *   Operation to perform.
5180  * @param arg
5181  *   Pointer to operation-specific structure.
5182  *
5183  * @return
5184  *   0 on success, a negative errno value otherwise and rte_errno is set.
5185  */
5186 int
5187 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
5188                      enum rte_filter_type filter_type,
5189                      enum rte_filter_op filter_op,
5190                      void *arg)
5191 {
5192         switch (filter_type) {
5193         case RTE_ETH_FILTER_GENERIC:
5194                 if (filter_op != RTE_ETH_FILTER_GET) {
5195                         rte_errno = EINVAL;
5196                         return -rte_errno;
5197                 }
5198                 *(const void **)arg = &mlx5_flow_ops;
5199                 return 0;
5200         case RTE_ETH_FILTER_FDIR:
5201                 return flow_fdir_ctrl_func(dev, filter_op, arg);
5202         default:
5203                 DRV_LOG(ERR, "port %u filter type (%d) not supported",
5204                         dev->data->port_id, filter_type);
5205                 rte_errno = ENOTSUP;
5206                 return -rte_errno;
5207         }
5208         return 0;
5209 }
5210
5211 /**
5212  * Create the needed meter and suffix tables.
5213  *
5214  * @param[in] dev
5215  *   Pointer to Ethernet device.
5216  * @param[in] fm
5217  *   Pointer to the flow meter.
5218  *
5219  * @return
5220  *   Pointer to table set on success, NULL otherwise.
5221  */
5222 struct mlx5_meter_domains_infos *
5223 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
5224                           const struct mlx5_flow_meter *fm)
5225 {
5226         const struct mlx5_flow_driver_ops *fops;
5227
5228         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5229         return fops->create_mtr_tbls(dev, fm);
5230 }
5231
5232 /**
5233  * Destroy the meter table set.
5234  *
5235  * @param[in] dev
5236  *   Pointer to Ethernet device.
5237  * @param[in] tbl
5238  *   Pointer to the meter table set.
5239  *
5240  * @return
5241  *   0 on success.
5242  */
5243 int
5244 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
5245                            struct mlx5_meter_domains_infos *tbls)
5246 {
5247         const struct mlx5_flow_driver_ops *fops;
5248
5249         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5250         return fops->destroy_mtr_tbls(dev, tbls);
5251 }
5252
5253 /**
5254  * Create policer rules.
5255  *
5256  * @param[in] dev
5257  *   Pointer to Ethernet device.
5258  * @param[in] fm
5259  *   Pointer to flow meter structure.
5260  * @param[in] attr
5261  *   Pointer to flow attributes.
5262  *
5263  * @return
5264  *   0 on success, -1 otherwise.
5265  */
5266 int
5267 mlx5_flow_create_policer_rules(struct rte_eth_dev *dev,
5268                                struct mlx5_flow_meter *fm,
5269                                const struct rte_flow_attr *attr)
5270 {
5271         const struct mlx5_flow_driver_ops *fops;
5272
5273         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5274         return fops->create_policer_rules(dev, fm, attr);
5275 }
5276
5277 /**
5278  * Destroy policer rules.
5279  *
5280  * @param[in] fm
5281  *   Pointer to flow meter structure.
5282  * @param[in] attr
5283  *   Pointer to flow attributes.
5284  *
5285  * @return
5286  *   0 on success, -1 otherwise.
5287  */
5288 int
5289 mlx5_flow_destroy_policer_rules(struct rte_eth_dev *dev,
5290                                 struct mlx5_flow_meter *fm,
5291                                 const struct rte_flow_attr *attr)
5292 {
5293         const struct mlx5_flow_driver_ops *fops;
5294
5295         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5296         return fops->destroy_policer_rules(dev, fm, attr);
5297 }
5298
5299 /**
5300  * Allocate a counter.
5301  *
5302  * @param[in] dev
5303  *   Pointer to Ethernet device structure.
5304  *
5305  * @return
5306  *   Pointer to allocated counter  on success, NULL otherwise.
5307  */
5308 struct mlx5_flow_counter *
5309 mlx5_counter_alloc(struct rte_eth_dev *dev)
5310 {
5311         const struct mlx5_flow_driver_ops *fops;
5312         struct rte_flow_attr attr = { .transfer = 0 };
5313
5314         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
5315                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5316                 return fops->counter_alloc(dev);
5317         }
5318         DRV_LOG(ERR,
5319                 "port %u counter allocate is not supported.",
5320                  dev->data->port_id);
5321         return NULL;
5322 }
5323
5324 /**
5325  * Free a counter.
5326  *
5327  * @param[in] dev
5328  *   Pointer to Ethernet device structure.
5329  * @param[in] cnt
5330  *   Pointer to counter to be free.
5331  */
5332 void
5333 mlx5_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt)
5334 {
5335         const struct mlx5_flow_driver_ops *fops;
5336         struct rte_flow_attr attr = { .transfer = 0 };
5337
5338         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
5339                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5340                 fops->counter_free(dev, cnt);
5341                 return;
5342         }
5343         DRV_LOG(ERR,
5344                 "port %u counter free is not supported.",
5345                  dev->data->port_id);
5346 }
5347
5348 /**
5349  * Query counter statistics.
5350  *
5351  * @param[in] dev
5352  *   Pointer to Ethernet device structure.
5353  * @param[in] cnt
5354  *   Pointer to counter to query.
5355  * @param[in] clear
5356  *   Set to clear counter statistics.
5357  * @param[out] pkts
5358  *   The counter hits packets number to save.
5359  * @param[out] bytes
5360  *   The counter hits bytes number to save.
5361  *
5362  * @return
5363  *   0 on success, a negative errno value otherwise.
5364  */
5365 int
5366 mlx5_counter_query(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt,
5367                    bool clear, uint64_t *pkts, uint64_t *bytes)
5368 {
5369         const struct mlx5_flow_driver_ops *fops;
5370         struct rte_flow_attr attr = { .transfer = 0 };
5371
5372         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
5373                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
5374                 return fops->counter_query(dev, cnt, clear, pkts, bytes);
5375         }
5376         DRV_LOG(ERR,
5377                 "port %u counter query is not supported.",
5378                  dev->data->port_id);
5379         return -ENOTSUP;
5380 }
5381
5382 #define MLX5_POOL_QUERY_FREQ_US 1000000
5383
5384 /**
5385  * Set the periodic procedure for triggering asynchronous batch queries for all
5386  * the counter pools.
5387  *
5388  * @param[in] sh
5389  *   Pointer to mlx5_ibv_shared object.
5390  */
5391 void
5392 mlx5_set_query_alarm(struct mlx5_ibv_shared *sh)
5393 {
5394         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(sh, 0, 0);
5395         uint32_t pools_n = rte_atomic16_read(&cont->n_valid);
5396         uint32_t us;
5397
5398         cont = MLX5_CNT_CONTAINER(sh, 1, 0);
5399         pools_n += rte_atomic16_read(&cont->n_valid);
5400         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
5401         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
5402         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
5403                 sh->cmng.query_thread_on = 0;
5404                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
5405         } else {
5406                 sh->cmng.query_thread_on = 1;
5407         }
5408 }
5409
5410 /**
5411  * The periodic procedure for triggering asynchronous batch queries for all the
5412  * counter pools. This function is probably called by the host thread.
5413  *
5414  * @param[in] arg
5415  *   The parameter for the alarm process.
5416  */
5417 void
5418 mlx5_flow_query_alarm(void *arg)
5419 {
5420         struct mlx5_ibv_shared *sh = arg;
5421         struct mlx5_devx_obj *dcs;
5422         uint16_t offset;
5423         int ret;
5424         uint8_t batch = sh->cmng.batch;
5425         uint16_t pool_index = sh->cmng.pool_index;
5426         struct mlx5_pools_container *cont;
5427         struct mlx5_pools_container *mcont;
5428         struct mlx5_flow_counter_pool *pool;
5429
5430         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
5431                 goto set_alarm;
5432 next_container:
5433         cont = MLX5_CNT_CONTAINER(sh, batch, 1);
5434         mcont = MLX5_CNT_CONTAINER(sh, batch, 0);
5435         /* Check if resize was done and need to flip a container. */
5436         if (cont != mcont) {
5437                 if (cont->pools) {
5438                         /* Clean the old container. */
5439                         rte_free(cont->pools);
5440                         memset(cont, 0, sizeof(*cont));
5441                 }
5442                 rte_cio_wmb();
5443                  /* Flip the host container. */
5444                 sh->cmng.mhi[batch] ^= (uint8_t)2;
5445                 cont = mcont;
5446         }
5447         if (!cont->pools) {
5448                 /* 2 empty containers case is unexpected. */
5449                 if (unlikely(batch != sh->cmng.batch))
5450                         goto set_alarm;
5451                 batch ^= 0x1;
5452                 pool_index = 0;
5453                 goto next_container;
5454         }
5455         pool = cont->pools[pool_index];
5456         if (pool->raw_hw)
5457                 /* There is a pool query in progress. */
5458                 goto set_alarm;
5459         pool->raw_hw =
5460                 LIST_FIRST(&sh->cmng.free_stat_raws);
5461         if (!pool->raw_hw)
5462                 /* No free counter statistics raw memory. */
5463                 goto set_alarm;
5464         dcs = (struct mlx5_devx_obj *)(uintptr_t)rte_atomic64_read
5465                                                               (&pool->a64_dcs);
5466         offset = batch ? 0 : dcs->id % MLX5_COUNTERS_PER_POOL;
5467         ret = mlx5_devx_cmd_flow_counter_query(dcs, 0, MLX5_COUNTERS_PER_POOL -
5468                                                offset, NULL, NULL,
5469                                                pool->raw_hw->mem_mng->dm->id,
5470                                                (void *)(uintptr_t)
5471                                                (pool->raw_hw->data + offset),
5472                                                sh->devx_comp,
5473                                                (uint64_t)(uintptr_t)pool);
5474         if (ret) {
5475                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
5476                         " %d", pool->min_dcs->id);
5477                 pool->raw_hw = NULL;
5478                 goto set_alarm;
5479         }
5480         pool->raw_hw->min_dcs_id = dcs->id;
5481         LIST_REMOVE(pool->raw_hw, next);
5482         sh->cmng.pending_queries++;
5483         pool_index++;
5484         if (pool_index >= rte_atomic16_read(&cont->n_valid)) {
5485                 batch ^= 0x1;
5486                 pool_index = 0;
5487         }
5488 set_alarm:
5489         sh->cmng.batch = batch;
5490         sh->cmng.pool_index = pool_index;
5491         mlx5_set_query_alarm(sh);
5492 }
5493
5494 /**
5495  * Handler for the HW respond about ready values from an asynchronous batch
5496  * query. This function is probably called by the host thread.
5497  *
5498  * @param[in] sh
5499  *   The pointer to the shared IB device context.
5500  * @param[in] async_id
5501  *   The Devx async ID.
5502  * @param[in] status
5503  *   The status of the completion.
5504  */
5505 void
5506 mlx5_flow_async_pool_query_handle(struct mlx5_ibv_shared *sh,
5507                                   uint64_t async_id, int status)
5508 {
5509         struct mlx5_flow_counter_pool *pool =
5510                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
5511         struct mlx5_counter_stats_raw *raw_to_free;
5512
5513         if (unlikely(status)) {
5514                 raw_to_free = pool->raw_hw;
5515         } else {
5516                 raw_to_free = pool->raw;
5517                 rte_spinlock_lock(&pool->sl);
5518                 pool->raw = pool->raw_hw;
5519                 rte_spinlock_unlock(&pool->sl);
5520                 rte_atomic64_add(&pool->query_gen, 1);
5521                 /* Be sure the new raw counters data is updated in memory. */
5522                 rte_cio_wmb();
5523         }
5524         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
5525         pool->raw_hw = NULL;
5526         sh->cmng.pending_queries--;
5527 }
5528
5529 /**
5530  * Translate the rte_flow group index to HW table value.
5531  *
5532  * @param[in] attributes
5533  *   Pointer to flow attributes
5534  * @param[in] external
5535  *   Value is part of flow rule created by request external to PMD.
5536  * @param[in] group
5537  *   rte_flow group index value.
5538  * @param[out] table
5539  *   HW table value.
5540  * @param[out] error
5541  *   Pointer to error structure.
5542  *
5543  * @return
5544  *   0 on success, a negative errno value otherwise and rte_errno is set.
5545  */
5546 int
5547 mlx5_flow_group_to_table(const struct rte_flow_attr *attributes, bool external,
5548                          uint32_t group, uint32_t *table,
5549                          struct rte_flow_error *error)
5550 {
5551         if (attributes->transfer && external) {
5552                 if (group == UINT32_MAX)
5553                         return rte_flow_error_set
5554                                                 (error, EINVAL,
5555                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
5556                                                  NULL,
5557                                                  "group index not supported");
5558                 *table = group + 1;
5559         } else {
5560                 *table = group;
5561         }
5562         return 0;
5563 }
5564
5565 /**
5566  * Discover availability of metadata reg_c's.
5567  *
5568  * Iteratively use test flows to check availability.
5569  *
5570  * @param[in] dev
5571  *   Pointer to the Ethernet device structure.
5572  *
5573  * @return
5574  *   0 on success, a negative errno value otherwise and rte_errno is set.
5575  */
5576 int
5577 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
5578 {
5579         struct mlx5_priv *priv = dev->data->dev_private;
5580         struct mlx5_dev_config *config = &priv->config;
5581         enum modify_reg idx;
5582         int n = 0;
5583
5584         /* reg_c[0] and reg_c[1] are reserved. */
5585         config->flow_mreg_c[n++] = REG_C_0;
5586         config->flow_mreg_c[n++] = REG_C_1;
5587         /* Discover availability of other reg_c's. */
5588         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
5589                 struct rte_flow_attr attr = {
5590                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
5591                         .priority = MLX5_FLOW_PRIO_RSVD,
5592                         .ingress = 1,
5593                 };
5594                 struct rte_flow_item items[] = {
5595                         [0] = {
5596                                 .type = RTE_FLOW_ITEM_TYPE_END,
5597                         },
5598                 };
5599                 struct rte_flow_action actions[] = {
5600                         [0] = {
5601                                 .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5602                                 .conf = &(struct mlx5_flow_action_copy_mreg){
5603                                         .src = REG_C_1,
5604                                         .dst = idx,
5605                                 },
5606                         },
5607                         [1] = {
5608                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
5609                                 .conf = &(struct rte_flow_action_jump){
5610                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5611                                 },
5612                         },
5613                         [2] = {
5614                                 .type = RTE_FLOW_ACTION_TYPE_END,
5615                         },
5616                 };
5617                 struct rte_flow *flow;
5618                 struct rte_flow_error error;
5619
5620                 if (!config->dv_flow_en)
5621                         break;
5622                 /* Create internal flow, validation skips copy action. */
5623                 flow = flow_list_create(dev, NULL, &attr, items,
5624                                         actions, false, &error);
5625                 if (!flow)
5626                         continue;
5627                 if (dev->data->dev_started || !flow_drv_apply(dev, flow, NULL))
5628                         config->flow_mreg_c[n++] = idx;
5629                 flow_list_destroy(dev, NULL, flow);
5630         }
5631         for (; n < MLX5_MREG_C_NUM; ++n)
5632                 config->flow_mreg_c[n] = REG_NONE;
5633         return 0;
5634 }