drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <netinet/in.h>
   7 #include <sys/queue.h>
   8 #include <stdalign.h>
   9 #include <stdint.h>
  10 #include <string.h>
  11 #include <stdbool.h>
  12
  13 #include <rte_common.h>
  14 #include <rte_ether.h>
  15 #include <rte_ethdev_driver.h>
  16 #include <rte_eal_paging.h>
  17 #include <rte_flow.h>
  18 #include <rte_cycles.h>
  19 #include <rte_flow_driver.h>
  20 #include <rte_malloc.h>
  21 #include <rte_ip.h>
  22
  23 #include <mlx5_glue.h>
  24 #include <mlx5_devx_cmds.h>
  25 #include <mlx5_prm.h>
  26 #include <mlx5_malloc.h>
  27
  28 #include "mlx5_defs.h"
  29 #include "mlx5.h"
  30 #include "mlx5_flow.h"
  31 #include "mlx5_flow_os.h"
  32 #include "mlx5_rxtx.h"
  33 #include "mlx5_common_os.h"
  34 #include "rte_pmd_mlx5.h"
  35
  36 static struct mlx5_flow_tunnel *
  37 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id);
  38 static void
  39 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel);
  40 static const struct mlx5_flow_tbl_data_entry  *
  41 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark);
  42 static int
  43 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
  44                      const struct rte_flow_tunnel *app_tunnel,
  45                      struct mlx5_flow_tunnel **tunnel);
  46 static struct mlx5_flow_workspace *mlx5_flow_push_thread_workspace(void);
  47 static void mlx5_flow_pop_thread_workspace(void);
  48
  49
  50 /** Device flow drivers. */
  51 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  52
  53 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  54
  55 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  56         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  57 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  58         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  59 #endif
  60         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  61         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  62 };
  63
  64 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */
  65 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \
  66         (const int []){ \
  67                 __VA_ARGS__, 0, \
  68         }
  69
  70 /** Node object of input graph for mlx5_flow_expand_rss(). */
  71 struct mlx5_flow_expand_node {
  72         const int *const next;
  73         /**<
  74          * List of next node indexes. Index 0 is interpreted as a terminator.
  75          */
  76         const enum rte_flow_item_type type;
  77         /**< Pattern item type of current node. */
  78         uint64_t rss_types;
  79         /**<
  80          * RSS types bit-field associated with this node
  81          * (see ETH_RSS_* definitions).
  82          */
  83 };
  84
  85 /** Object returned by mlx5_flow_expand_rss(). */
  86 struct mlx5_flow_expand_rss {
  87         uint32_t entries;
  88         /**< Number of entries @p patterns and @p priorities. */
  89         struct {
  90                 struct rte_flow_item *pattern; /**< Expanded pattern array. */
  91                 uint32_t priority; /**< Priority offset for each expansion. */
  92         } entry[];
  93 };
  94
  95 static enum rte_flow_item_type
  96 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item)
  97 {
  98         enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID;
  99         uint16_t ether_type = 0;
 100         uint16_t ether_type_m;
 101         uint8_t ip_next_proto = 0;
 102         uint8_t ip_next_proto_m;
 103
 104         if (item == NULL || item->spec == NULL)
 105                 return ret;
 106         switch (item->type) {
 107         case RTE_FLOW_ITEM_TYPE_ETH:
 108                 if (item->mask)
 109                         ether_type_m = ((const struct rte_flow_item_eth *)
 110                                                 (item->mask))->type;
 111                 else
 112                         ether_type_m = rte_flow_item_eth_mask.type;
 113                 if (ether_type_m != RTE_BE16(0xFFFF))
 114                         break;
 115                 ether_type = ((const struct rte_flow_item_eth *)
 116                                 (item->spec))->type;
 117                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 118                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 119                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 120                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 121                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 122                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 123                 else
 124                         ret = RTE_FLOW_ITEM_TYPE_END;
 125                 break;
 126         case RTE_FLOW_ITEM_TYPE_VLAN:
 127                 if (item->mask)
 128                         ether_type_m = ((const struct rte_flow_item_vlan *)
 129                                                 (item->mask))->inner_type;
 130                 else
 131                         ether_type_m = rte_flow_item_vlan_mask.inner_type;
 132                 if (ether_type_m != RTE_BE16(0xFFFF))
 133                         break;
 134                 ether_type = ((const struct rte_flow_item_vlan *)
 135                                 (item->spec))->inner_type;
 136                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 137                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 138                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 139                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 140                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 141                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 142                 else
 143                         ret = RTE_FLOW_ITEM_TYPE_END;
 144                 break;
 145         case RTE_FLOW_ITEM_TYPE_IPV4:
 146                 if (item->mask)
 147                         ip_next_proto_m = ((const struct rte_flow_item_ipv4 *)
 148                                         (item->mask))->hdr.next_proto_id;
 149                 else
 150                         ip_next_proto_m =
 151                                 rte_flow_item_ipv4_mask.hdr.next_proto_id;
 152                 if (ip_next_proto_m != 0xFF)
 153                         break;
 154                 ip_next_proto = ((const struct rte_flow_item_ipv4 *)
 155                                 (item->spec))->hdr.next_proto_id;
 156                 if (ip_next_proto == IPPROTO_UDP)
 157                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 158                 else if (ip_next_proto == IPPROTO_TCP)
 159                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 160                 else if (ip_next_proto == IPPROTO_IP)
 161                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 162                 else if (ip_next_proto == IPPROTO_IPV6)
 163                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 164                 else
 165                         ret = RTE_FLOW_ITEM_TYPE_END;
 166                 break;
 167         case RTE_FLOW_ITEM_TYPE_IPV6:
 168                 if (item->mask)
 169                         ip_next_proto_m = ((const struct rte_flow_item_ipv6 *)
 170                                                 (item->mask))->hdr.proto;
 171                 else
 172                         ip_next_proto_m =
 173                                 rte_flow_item_ipv6_mask.hdr.proto;
 174                 if (ip_next_proto_m != 0xFF)
 175                         break;
 176                 ip_next_proto = ((const struct rte_flow_item_ipv6 *)
 177                                 (item->spec))->hdr.proto;
 178                 if (ip_next_proto == IPPROTO_UDP)
 179                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 180                 else if (ip_next_proto == IPPROTO_TCP)
 181                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 182                 else if (ip_next_proto == IPPROTO_IP)
 183                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 184                 else if (ip_next_proto == IPPROTO_IPV6)
 185                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 186                 else
 187                         ret = RTE_FLOW_ITEM_TYPE_END;
 188                 break;
 189         default:
 190                 ret = RTE_FLOW_ITEM_TYPE_VOID;
 191                 break;
 192         }
 193         return ret;
 194 }
 195
 196 /**
 197  * Expand RSS flows into several possible flows according to the RSS hash
 198  * fields requested and the driver capabilities.
 199  *
 200  * @param[out] buf
 201  *   Buffer to store the result expansion.
 202  * @param[in] size
 203  *   Buffer size in bytes. If 0, @p buf can be NULL.
 204  * @param[in] pattern
 205  *   User flow pattern.
 206  * @param[in] types
 207  *   RSS types to expand (see ETH_RSS_* definitions).
 208  * @param[in] graph
 209  *   Input graph to expand @p pattern according to @p types.
 210  * @param[in] graph_root_index
 211  *   Index of root node in @p graph, typically 0.
 212  *
 213  * @return
 214  *   A positive value representing the size of @p buf in bytes regardless of
 215  *   @p size on success, a negative errno value otherwise and rte_errno is
 216  *   set, the following errors are defined:
 217  *
 218  *   -E2BIG: graph-depth @p graph is too deep.
 219  */
 220 static int
 221 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,
 222                      const struct rte_flow_item *pattern, uint64_t types,
 223                      const struct mlx5_flow_expand_node graph[],
 224                      int graph_root_index)
 225 {
 226         const int elt_n = 8;
 227         const struct rte_flow_item *item;
 228         const struct mlx5_flow_expand_node *node = &graph[graph_root_index];
 229         const int *next_node;
 230         const int *stack[elt_n];
 231         int stack_pos = 0;
 232         struct rte_flow_item flow_items[elt_n];
 233         unsigned int i;
 234         size_t lsize;
 235         size_t user_pattern_size = 0;
 236         void *addr = NULL;
 237         const struct mlx5_flow_expand_node *next = NULL;
 238         struct rte_flow_item missed_item;
 239         int missed = 0;
 240         int elt = 0;
 241         const struct rte_flow_item *last_item = NULL;
 242
 243         memset(&missed_item, 0, sizeof(missed_item));
 244         lsize = offsetof(struct mlx5_flow_expand_rss, entry) +
 245                 elt_n * sizeof(buf->entry[0]);
 246         if (lsize <= size) {
 247                 buf->entry[0].priority = 0;
 248                 buf->entry[0].pattern = (void *)&buf->entry[elt_n];
 249                 buf->entries = 0;
 250                 addr = buf->entry[0].pattern;
 251         }
 252         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 253                 if (item->type != RTE_FLOW_ITEM_TYPE_VOID)
 254                         last_item = item;
 255                 for (i = 0; node->next && node->next[i]; ++i) {
 256                         next = &graph[node->next[i]];
 257                         if (next->type == item->type)
 258                                 break;
 259                 }
 260                 if (next)
 261                         node = next;
 262                 user_pattern_size += sizeof(*item);
 263         }
 264         user_pattern_size += sizeof(*item); /* Handle END item. */
 265         lsize += user_pattern_size;
 266         /* Copy the user pattern in the first entry of the buffer. */
 267         if (lsize <= size) {
 268                 rte_memcpy(addr, pattern, user_pattern_size);
 269                 addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 270                 buf->entries = 1;
 271         }
 272         /* Start expanding. */
 273         memset(flow_items, 0, sizeof(flow_items));
 274         user_pattern_size -= sizeof(*item);
 275         /*
 276          * Check if the last valid item has spec set, need complete pattern,
 277          * and the pattern can be used for expansion.
 278          */
 279         missed_item.type = mlx5_flow_expand_rss_item_complete(last_item);
 280         if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) {
 281                 /* Item type END indicates expansion is not required. */
 282                 return lsize;
 283         }
 284         if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) {
 285                 next = NULL;
 286                 missed = 1;
 287                 for (i = 0; node->next && node->next[i]; ++i) {
 288                         next = &graph[node->next[i]];
 289                         if (next->type == missed_item.type) {
 290                                 flow_items[0].type = missed_item.type;
 291                                 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 292                                 break;
 293                         }
 294                         next = NULL;
 295                 }
 296         }
 297         if (next && missed) {
 298                 elt = 2; /* missed item + item end. */
 299                 node = next;
 300                 lsize += elt * sizeof(*item) + user_pattern_size;
 301                 if ((node->rss_types & types) && lsize <= size) {
 302                         buf->entry[buf->entries].priority = 1;
 303                         buf->entry[buf->entries].pattern = addr;
 304                         buf->entries++;
 305                         rte_memcpy(addr, buf->entry[0].pattern,
 306                                    user_pattern_size);
 307                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 308                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 309                         addr = (void *)(((uintptr_t)addr) +
 310                                         elt * sizeof(*item));
 311                 }
 312         }
 313         memset(flow_items, 0, sizeof(flow_items));
 314         next_node = node->next;
 315         stack[stack_pos] = next_node;
 316         node = next_node ? &graph[*next_node] : NULL;
 317         while (node) {
 318                 flow_items[stack_pos].type = node->type;
 319                 if (node->rss_types & types) {
 320                         /*
 321                          * compute the number of items to copy from the
 322                          * expansion and copy it.
 323                          * When the stack_pos is 0, there are 1 element in it,
 324                          * plus the addition END item.
 325                          */
 326                         elt = stack_pos + 2;
 327                         flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END;
 328                         lsize += elt * sizeof(*item) + user_pattern_size;
 329                         if (lsize <= size) {
 330                                 size_t n = elt * sizeof(*item);
 331
 332                                 buf->entry[buf->entries].priority =
 333                                         stack_pos + 1 + missed;
 334                                 buf->entry[buf->entries].pattern = addr;
 335                                 buf->entries++;
 336                                 rte_memcpy(addr, buf->entry[0].pattern,
 337                                            user_pattern_size);
 338                                 addr = (void *)(((uintptr_t)addr) +
 339                                                 user_pattern_size);
 340                                 rte_memcpy(addr, &missed_item,
 341                                            missed * sizeof(*item));
 342                                 addr = (void *)(((uintptr_t)addr) +
 343                                         missed * sizeof(*item));
 344                                 rte_memcpy(addr, flow_items, n);
 345                                 addr = (void *)(((uintptr_t)addr) + n);
 346                         }
 347                 }
 348                 /* Go deeper. */
 349                 if (node->next) {
 350                         next_node = node->next;
 351                         if (stack_pos++ == elt_n) {
 352                                 rte_errno = E2BIG;
 353                                 return -rte_errno;
 354                         }
 355                         stack[stack_pos] = next_node;
 356                 } else if (*(next_node + 1)) {
 357                         /* Follow up with the next possibility. */
 358                         ++next_node;
 359                 } else {
 360                         /* Move to the next path. */
 361                         if (stack_pos)
 362                                 next_node = stack[--stack_pos];
 363                         next_node++;
 364                         stack[stack_pos] = next_node;
 365                 }
 366                 node = *next_node ? &graph[*next_node] : NULL;
 367         };
 368         /* no expanded flows but we have missed item, create one rule for it */
 369         if (buf->entries == 1 && missed != 0) {
 370                 elt = 2;
 371                 lsize += elt * sizeof(*item) + user_pattern_size;
 372                 if (lsize <= size) {
 373                         buf->entry[buf->entries].priority = 1;
 374                         buf->entry[buf->entries].pattern = addr;
 375                         buf->entries++;
 376                         flow_items[0].type = missed_item.type;
 377                         flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 378                         rte_memcpy(addr, buf->entry[0].pattern,
 379                                    user_pattern_size);
 380                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 381                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 382                         addr = (void *)(((uintptr_t)addr) +
 383                                         elt * sizeof(*item));
 384                 }
 385         }
 386         return lsize;
 387 }
 388
 389 enum mlx5_expansion {
 390         MLX5_EXPANSION_ROOT,
 391         MLX5_EXPANSION_ROOT_OUTER,
 392         MLX5_EXPANSION_ROOT_ETH_VLAN,
 393         MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
 394         MLX5_EXPANSION_OUTER_ETH,
 395         MLX5_EXPANSION_OUTER_ETH_VLAN,
 396         MLX5_EXPANSION_OUTER_VLAN,
 397         MLX5_EXPANSION_OUTER_IPV4,
 398         MLX5_EXPANSION_OUTER_IPV4_UDP,
 399         MLX5_EXPANSION_OUTER_IPV4_TCP,
 400         MLX5_EXPANSION_OUTER_IPV6,
 401         MLX5_EXPANSION_OUTER_IPV6_UDP,
 402         MLX5_EXPANSION_OUTER_IPV6_TCP,
 403         MLX5_EXPANSION_VXLAN,
 404         MLX5_EXPANSION_VXLAN_GPE,
 405         MLX5_EXPANSION_GRE,
 406         MLX5_EXPANSION_MPLS,
 407         MLX5_EXPANSION_ETH,
 408         MLX5_EXPANSION_ETH_VLAN,
 409         MLX5_EXPANSION_VLAN,
 410         MLX5_EXPANSION_IPV4,
 411         MLX5_EXPANSION_IPV4_UDP,
 412         MLX5_EXPANSION_IPV4_TCP,
 413         MLX5_EXPANSION_IPV6,
 414         MLX5_EXPANSION_IPV6_UDP,
 415         MLX5_EXPANSION_IPV6_TCP,
 416 };
 417
 418 /** Supported expansion of items. */
 419 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
 420         [MLX5_EXPANSION_ROOT] = {
 421                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 422                                                   MLX5_EXPANSION_IPV4,
 423                                                   MLX5_EXPANSION_IPV6),
 424                 .type = RTE_FLOW_ITEM_TYPE_END,
 425         },
 426         [MLX5_EXPANSION_ROOT_OUTER] = {
 427                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
 428                                                   MLX5_EXPANSION_OUTER_IPV4,
 429                                                   MLX5_EXPANSION_OUTER_IPV6),
 430                 .type = RTE_FLOW_ITEM_TYPE_END,
 431         },
 432         [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
 433                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
 434                 .type = RTE_FLOW_ITEM_TYPE_END,
 435         },
 436         [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
 437                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 438                                                 (MLX5_EXPANSION_OUTER_ETH_VLAN),
 439                 .type = RTE_FLOW_ITEM_TYPE_END,
 440         },
 441         [MLX5_EXPANSION_OUTER_ETH] = {
 442                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 443                                                   MLX5_EXPANSION_OUTER_IPV6,
 444                                                   MLX5_EXPANSION_MPLS),
 445                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 446                 .rss_types = 0,
 447         },
 448         [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
 449                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 450                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 451                 .rss_types = 0,
 452         },
 453         [MLX5_EXPANSION_OUTER_VLAN] = {
 454                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 455                                                   MLX5_EXPANSION_OUTER_IPV6),
 456                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 457         },
 458         [MLX5_EXPANSION_OUTER_IPV4] = {
 459                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 460                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 461                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 462                          MLX5_EXPANSION_GRE,
 463                          MLX5_EXPANSION_IPV4,
 464                          MLX5_EXPANSION_IPV6),
 465                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 466                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 467                         ETH_RSS_NONFRAG_IPV4_OTHER,
 468         },
 469         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 470                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 471                                                   MLX5_EXPANSION_VXLAN_GPE),
 472                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 473                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 474         },
 475         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 476                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 477                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 478         },
 479         [MLX5_EXPANSION_OUTER_IPV6] = {
 480                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 481                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 482                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 483                          MLX5_EXPANSION_IPV4,
 484                          MLX5_EXPANSION_IPV6),
 485                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 486                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 487                         ETH_RSS_NONFRAG_IPV6_OTHER,
 488         },
 489         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 490                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 491                                                   MLX5_EXPANSION_VXLAN_GPE),
 492                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 493                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 494         },
 495         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 496                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 497                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 498         },
 499         [MLX5_EXPANSION_VXLAN] = {
 500                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 501                                                   MLX5_EXPANSION_IPV4,
 502                                                   MLX5_EXPANSION_IPV6),
 503                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 504         },
 505         [MLX5_EXPANSION_VXLAN_GPE] = {
 506                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 507                                                   MLX5_EXPANSION_IPV4,
 508                                                   MLX5_EXPANSION_IPV6),
 509                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 510         },
 511         [MLX5_EXPANSION_GRE] = {
 512                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4),
 513                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 514         },
 515         [MLX5_EXPANSION_MPLS] = {
 516                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 517                                                   MLX5_EXPANSION_IPV6),
 518                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 519         },
 520         [MLX5_EXPANSION_ETH] = {
 521                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 522                                                   MLX5_EXPANSION_IPV6),
 523                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 524         },
 525         [MLX5_EXPANSION_ETH_VLAN] = {
 526                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 527                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 528         },
 529         [MLX5_EXPANSION_VLAN] = {
 530                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 531                                                   MLX5_EXPANSION_IPV6),
 532                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 533         },
 534         [MLX5_EXPANSION_IPV4] = {
 535                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 536                                                   MLX5_EXPANSION_IPV4_TCP),
 537                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 538                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 539                         ETH_RSS_NONFRAG_IPV4_OTHER,
 540         },
 541         [MLX5_EXPANSION_IPV4_UDP] = {
 542                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 543                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 544         },
 545         [MLX5_EXPANSION_IPV4_TCP] = {
 546                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 547                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 548         },
 549         [MLX5_EXPANSION_IPV6] = {
 550                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 551                                                   MLX5_EXPANSION_IPV6_TCP),
 552                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 553                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 554                         ETH_RSS_NONFRAG_IPV6_OTHER,
 555         },
 556         [MLX5_EXPANSION_IPV6_UDP] = {
 557                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 558                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 559         },
 560         [MLX5_EXPANSION_IPV6_TCP] = {
 561                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 562                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 563         },
 564 };
 565
 566 static struct rte_flow_shared_action *
 567 mlx5_shared_action_create(struct rte_eth_dev *dev,
 568                           const struct rte_flow_shared_action_conf *conf,
 569                           const struct rte_flow_action *action,
 570                           struct rte_flow_error *error);
 571 static int mlx5_shared_action_destroy
 572                                 (struct rte_eth_dev *dev,
 573                                  struct rte_flow_shared_action *shared_action,
 574                                  struct rte_flow_error *error);
 575 static int mlx5_shared_action_update
 576                                 (struct rte_eth_dev *dev,
 577                                  struct rte_flow_shared_action *shared_action,
 578                                  const struct rte_flow_action *action,
 579                                  struct rte_flow_error *error);
 580 static int mlx5_shared_action_query
 581                                 (struct rte_eth_dev *dev,
 582                                  const struct rte_flow_shared_action *action,
 583                                  void *data,
 584                                  struct rte_flow_error *error);
 585 static inline bool
 586 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev,
 587                           struct rte_flow_tunnel *tunnel,
 588                           const char *err_msg)
 589 {
 590         err_msg = NULL;
 591         if (!is_tunnel_offload_active(dev)) {
 592                 err_msg = "tunnel offload was not activated";
 593                 goto out;
 594         } else if (!tunnel) {
 595                 err_msg = "no application tunnel";
 596                 goto out;
 597         }
 598
 599         switch (tunnel->type) {
 600         default:
 601                 err_msg = "unsupported tunnel type";
 602                 goto out;
 603         case RTE_FLOW_ITEM_TYPE_VXLAN:
 604                 break;
 605         }
 606
 607 out:
 608         return !err_msg;
 609 }
 610
 611
 612 static int
 613 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
 614                     struct rte_flow_tunnel *app_tunnel,
 615                     struct rte_flow_action **actions,
 616                     uint32_t *num_of_actions,
 617                     struct rte_flow_error *error)
 618 {
 619         int ret;
 620         struct mlx5_flow_tunnel *tunnel;
 621         const char *err_msg = NULL;
 622         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
 623
 624         if (!verdict)
 625                 return rte_flow_error_set(error, EINVAL,
 626                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
 627                                           err_msg);
 628         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
 629         if (ret < 0) {
 630                 return rte_flow_error_set(error, ret,
 631                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
 632                                           "failed to initialize pmd tunnel");
 633         }
 634         *actions = &tunnel->action;
 635         *num_of_actions = 1;
 636         return 0;
 637 }
 638
 639 static int
 640 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
 641                        struct rte_flow_tunnel *app_tunnel,
 642                        struct rte_flow_item **items,
 643                        uint32_t *num_of_items,
 644                        struct rte_flow_error *error)
 645 {
 646         int ret;
 647         struct mlx5_flow_tunnel *tunnel;
 648         const char *err_msg = NULL;
 649         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
 650
 651         if (!verdict)
 652                 return rte_flow_error_set(error, EINVAL,
 653                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
 654                                           err_msg);
 655         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
 656         if (ret < 0) {
 657                 return rte_flow_error_set(error, ret,
 658                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
 659                                           "failed to initialize pmd tunnel");
 660         }
 661         *items = &tunnel->item;
 662         *num_of_items = 1;
 663         return 0;
 664 }
 665
 666 static int
 667 mlx5_flow_item_release(struct rte_eth_dev *dev,
 668                        struct rte_flow_item *pmd_items,
 669                        uint32_t num_items, struct rte_flow_error *err)
 670 {
 671         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
 672         struct mlx5_flow_tunnel *tun;
 673
 674         rte_spinlock_lock(&thub->sl);
 675         LIST_FOREACH(tun, &thub->tunnels, chain) {
 676                 if (&tun->item == pmd_items) {
 677                         LIST_REMOVE(tun, chain);
 678                         break;
 679                 }
 680         }
 681         rte_spinlock_unlock(&thub->sl);
 682         if (!tun || num_items != 1)
 683                 return rte_flow_error_set(err, EINVAL,
 684                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
 685                                           "invalid argument");
 686         if (!__atomic_sub_fetch(&tun->refctn, 1, __ATOMIC_RELAXED))
 687                 mlx5_flow_tunnel_free(dev, tun);
 688         return 0;
 689 }
 690
 691 static int
 692 mlx5_flow_action_release(struct rte_eth_dev *dev,
 693                          struct rte_flow_action *pmd_actions,
 694                          uint32_t num_actions, struct rte_flow_error *err)
 695 {
 696         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
 697         struct mlx5_flow_tunnel *tun;
 698
 699         rte_spinlock_lock(&thub->sl);
 700         LIST_FOREACH(tun, &thub->tunnels, chain) {
 701                 if (&tun->action == pmd_actions) {
 702                         LIST_REMOVE(tun, chain);
 703                         break;
 704                 }
 705         }
 706         rte_spinlock_unlock(&thub->sl);
 707         if (!tun || num_actions != 1)
 708                 return rte_flow_error_set(err, EINVAL,
 709                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
 710                                           "invalid argument");
 711         if (!__atomic_sub_fetch(&tun->refctn, 1, __ATOMIC_RELAXED))
 712                 mlx5_flow_tunnel_free(dev, tun);
 713
 714         return 0;
 715 }
 716
 717 static int
 718 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
 719                                   struct rte_mbuf *m,
 720                                   struct rte_flow_restore_info *info,
 721                                   struct rte_flow_error *err)
 722 {
 723         uint64_t ol_flags = m->ol_flags;
 724         const struct mlx5_flow_tbl_data_entry *tble;
 725         const uint64_t mask = PKT_RX_FDIR | PKT_RX_FDIR_ID;
 726
 727         if ((ol_flags & mask) != mask)
 728                 goto err;
 729         tble = tunnel_mark_decode(dev, m->hash.fdir.hi);
 730         if (!tble) {
 731                 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x",
 732                         dev->data->port_id, m->hash.fdir.hi);
 733                 goto err;
 734         }
 735         MLX5_ASSERT(tble->tunnel);
 736         memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel));
 737         info->group_id = tble->group_id;
 738         info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL |
 739                       RTE_FLOW_RESTORE_INFO_GROUP_ID |
 740                       RTE_FLOW_RESTORE_INFO_ENCAPSULATED;
 741
 742         return 0;
 743
 744 err:
 745         return rte_flow_error_set(err, EINVAL,
 746                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
 747                                   "failed to get restore info");
 748 }
 749
 750 static const struct rte_flow_ops mlx5_flow_ops = {
 751         .validate = mlx5_flow_validate,
 752         .create = mlx5_flow_create,
 753         .destroy = mlx5_flow_destroy,
 754         .flush = mlx5_flow_flush,
 755         .isolate = mlx5_flow_isolate,
 756         .query = mlx5_flow_query,
 757         .dev_dump = mlx5_flow_dev_dump,
 758         .get_aged_flows = mlx5_flow_get_aged_flows,
 759         .shared_action_create = mlx5_shared_action_create,
 760         .shared_action_destroy = mlx5_shared_action_destroy,
 761         .shared_action_update = mlx5_shared_action_update,
 762         .shared_action_query = mlx5_shared_action_query,
 763         .tunnel_decap_set = mlx5_flow_tunnel_decap_set,
 764         .tunnel_match = mlx5_flow_tunnel_match,
 765         .tunnel_action_decap_release = mlx5_flow_action_release,
 766         .tunnel_item_release = mlx5_flow_item_release,
 767         .get_restore_info = mlx5_flow_tunnel_get_restore_info,
 768 };
 769
 770 /* Tunnel information. */
 771 struct mlx5_flow_tunnel_info {
 772         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 773         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 774 };
 775
 776 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 777         {
 778                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 779                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 780         },
 781         {
 782                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
 783                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
 784         },
 785         {
 786                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 787                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 788         },
 789         {
 790                 .tunnel = MLX5_FLOW_LAYER_GRE,
 791                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 792         },
 793         {
 794                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 795                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 796         },
 797         {
 798                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 799                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 800         },
 801         {
 802                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 803                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 804         },
 805         {
 806                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 807                 .ptype = RTE_PTYPE_TUNNEL_IP,
 808         },
 809         {
 810                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 811                 .ptype = RTE_PTYPE_TUNNEL_IP,
 812         },
 813         {
 814                 .tunnel = MLX5_FLOW_LAYER_GTP,
 815                 .ptype = RTE_PTYPE_TUNNEL_GTPU,
 816         },
 817 };
 818
 819 /* Key of thread specific flow workspace data. */
 820 static pthread_key_t key_workspace;
 821
 822 /* Thread specific flow workspace data once initialization data. */
 823 static pthread_once_t key_workspace_init;
 824
 825
 826 /**
 827  * Translate tag ID to register.
 828  *
 829  * @param[in] dev
 830  *   Pointer to the Ethernet device structure.
 831  * @param[in] feature
 832  *   The feature that request the register.
 833  * @param[in] id
 834  *   The request register ID.
 835  * @param[out] error
 836  *   Error description in case of any.
 837  *
 838  * @return
 839  *   The request register on success, a negative errno
 840  *   value otherwise and rte_errno is set.
 841  */
 842 int
 843 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 844                      enum mlx5_feature_name feature,
 845                      uint32_t id,
 846                      struct rte_flow_error *error)
 847 {
 848         struct mlx5_priv *priv = dev->data->dev_private;
 849         struct mlx5_dev_config *config = &priv->config;
 850         enum modify_reg start_reg;
 851         bool skip_mtr_reg = false;
 852
 853         switch (feature) {
 854         case MLX5_HAIRPIN_RX:
 855                 return REG_B;
 856         case MLX5_HAIRPIN_TX:
 857                 return REG_A;
 858         case MLX5_METADATA_RX:
 859                 switch (config->dv_xmeta_en) {
 860                 case MLX5_XMETA_MODE_LEGACY:
 861                         return REG_B;
 862                 case MLX5_XMETA_MODE_META16:
 863                         return REG_C_0;
 864                 case MLX5_XMETA_MODE_META32:
 865                         return REG_C_1;
 866                 }
 867                 break;
 868         case MLX5_METADATA_TX:
 869                 return REG_A;
 870         case MLX5_METADATA_FDB:
 871                 switch (config->dv_xmeta_en) {
 872                 case MLX5_XMETA_MODE_LEGACY:
 873                         return REG_NON;
 874                 case MLX5_XMETA_MODE_META16:
 875                         return REG_C_0;
 876                 case MLX5_XMETA_MODE_META32:
 877                         return REG_C_1;
 878                 }
 879                 break;
 880         case MLX5_FLOW_MARK:
 881                 switch (config->dv_xmeta_en) {
 882                 case MLX5_XMETA_MODE_LEGACY:
 883                         return REG_NON;
 884                 case MLX5_XMETA_MODE_META16:
 885                         return REG_C_1;
 886                 case MLX5_XMETA_MODE_META32:
 887                         return REG_C_0;
 888                 }
 889                 break;
 890         case MLX5_MTR_SFX:
 891                 /*
 892                  * If meter color and flow match share one register, flow match
 893                  * should use the meter color register for match.
 894                  */
 895                 if (priv->mtr_reg_share)
 896                         return priv->mtr_color_reg;
 897                 else
 898                         return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 899                                REG_C_3;
 900         case MLX5_MTR_COLOR:
 901                 MLX5_ASSERT(priv->mtr_color_reg != REG_NON);
 902                 return priv->mtr_color_reg;
 903         case MLX5_COPY_MARK:
 904                 /*
 905                  * Metadata COPY_MARK register using is in meter suffix sub
 906                  * flow while with meter. It's safe to share the same register.
 907                  */
 908                 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
 909         case MLX5_APP_TAG:
 910                 /*
 911                  * If meter is enable, it will engage the register for color
 912                  * match and flow match. If meter color match is not using the
 913                  * REG_C_2, need to skip the REG_C_x be used by meter color
 914                  * match.
 915                  * If meter is disable, free to use all available registers.
 916                  */
 917                 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 918                             (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
 919                 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
 920                 if (id > (REG_C_7 - start_reg))
 921                         return rte_flow_error_set(error, EINVAL,
 922                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 923                                                   NULL, "invalid tag id");
 924                 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON)
 925                         return rte_flow_error_set(error, ENOTSUP,
 926                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 927                                                   NULL, "unsupported tag id");
 928                 /*
 929                  * This case means meter is using the REG_C_x great than 2.
 930                  * Take care not to conflict with meter color REG_C_x.
 931                  * If the available index REG_C_y >= REG_C_x, skip the
 932                  * color register.
 933                  */
 934                 if (skip_mtr_reg && config->flow_mreg_c
 935                     [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
 936                         if (id >= (REG_C_7 - start_reg))
 937                                 return rte_flow_error_set(error, EINVAL,
 938                                                        RTE_FLOW_ERROR_TYPE_ITEM,
 939                                                         NULL, "invalid tag id");
 940                         if (config->flow_mreg_c
 941                             [id + 1 + start_reg - REG_C_0] != REG_NON)
 942                                 return config->flow_mreg_c
 943                                                [id + 1 + start_reg - REG_C_0];
 944                         return rte_flow_error_set(error, ENOTSUP,
 945                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 946                                                   NULL, "unsupported tag id");
 947                 }
 948                 return config->flow_mreg_c[id + start_reg - REG_C_0];
 949         }
 950         MLX5_ASSERT(false);
 951         return rte_flow_error_set(error, EINVAL,
 952                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 953                                   NULL, "invalid feature name");
 954 }
 955
 956 /**
 957  * Check extensive flow metadata register support.
 958  *
 959  * @param dev
 960  *   Pointer to rte_eth_dev structure.
 961  *
 962  * @return
 963  *   True if device supports extensive flow metadata register, otherwise false.
 964  */
 965 bool
 966 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
 967 {
 968         struct mlx5_priv *priv = dev->data->dev_private;
 969         struct mlx5_dev_config *config = &priv->config;
 970
 971         /*
 972          * Having available reg_c can be regarded inclusively as supporting
 973          * extensive flow metadata register, which could mean,
 974          * - metadata register copy action by modify header.
 975          * - 16 modify header actions is supported.
 976          * - reg_c's are preserved across different domain (FDB and NIC) on
 977          *   packet loopback by flow lookup miss.
 978          */
 979         return config->flow_mreg_c[2] != REG_NON;
 980 }
 981
 982 /**
 983  * Verify the @p item specifications (spec, last, mask) are compatible with the
 984  * NIC capabilities.
 985  *
 986  * @param[in] item
 987  *   Item specification.
 988  * @param[in] mask
 989  *   @p item->mask or flow default bit-masks.
 990  * @param[in] nic_mask
 991  *   Bit-masks covering supported fields by the NIC to compare with user mask.
 992  * @param[in] size
 993  *   Bit-masks size in bytes.
 994  * @param[in] range_accepted
 995  *   True if range of values is accepted for specific fields, false otherwise.
 996  * @param[out] error
 997  *   Pointer to error structure.
 998  *
 999  * @return
1000  *   0 on success, a negative errno value otherwise and rte_errno is set.
1001  */
1002 int
1003 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
1004                           const uint8_t *mask,
1005                           const uint8_t *nic_mask,
1006                           unsigned int size,
1007                           bool range_accepted,
1008                           struct rte_flow_error *error)
1009 {
1010         unsigned int i;
1011
1012         MLX5_ASSERT(nic_mask);
1013         for (i = 0; i < size; ++i)
1014                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
1015                         return rte_flow_error_set(error, ENOTSUP,
1016                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1017                                                   item,
1018                                                   "mask enables non supported"
1019                                                   " bits");
1020         if (!item->spec && (item->mask || item->last))
1021                 return rte_flow_error_set(error, EINVAL,
1022                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1023                                           "mask/last without a spec is not"
1024                                           " supported");
1025         if (item->spec && item->last && !range_accepted) {
1026                 uint8_t spec[size];
1027                 uint8_t last[size];
1028                 unsigned int i;
1029                 int ret;
1030
1031                 for (i = 0; i < size; ++i) {
1032                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
1033                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
1034                 }
1035                 ret = memcmp(spec, last, size);
1036                 if (ret != 0)
1037                         return rte_flow_error_set(error, EINVAL,
1038                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1039                                                   item,
1040                                                   "range is not valid");
1041         }
1042         return 0;
1043 }
1044
1045 /**
1046  * Adjust the hash fields according to the @p flow information.
1047  *
1048  * @param[in] dev_flow.
1049  *   Pointer to the mlx5_flow.
1050  * @param[in] tunnel
1051  *   1 when the hash field is for a tunnel item.
1052  * @param[in] layer_types
1053  *   ETH_RSS_* types.
1054  * @param[in] hash_fields
1055  *   Item hash fields.
1056  *
1057  * @return
1058  *   The hash fields that should be used.
1059  */
1060 uint64_t
1061 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc,
1062                             int tunnel __rte_unused, uint64_t layer_types,
1063                             uint64_t hash_fields)
1064 {
1065 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1066         int rss_request_inner = rss_desc->level >= 2;
1067
1068         /* Check RSS hash level for tunnel. */
1069         if (tunnel && rss_request_inner)
1070                 hash_fields |= IBV_RX_HASH_INNER;
1071         else if (tunnel || rss_request_inner)
1072                 return 0;
1073 #endif
1074         /* Check if requested layer matches RSS hash fields. */
1075         if (!(rss_desc->types & layer_types))
1076                 return 0;
1077         return hash_fields;
1078 }
1079
1080 /**
1081  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
1082  * if several tunnel rules are used on this queue, the tunnel ptype will be
1083  * cleared.
1084  *
1085  * @param rxq_ctrl
1086  *   Rx queue to update.
1087  */
1088 static void
1089 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
1090 {
1091         unsigned int i;
1092         uint32_t tunnel_ptype = 0;
1093
1094         /* Look up for the ptype to use. */
1095         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
1096                 if (!rxq_ctrl->flow_tunnels_n[i])
1097                         continue;
1098                 if (!tunnel_ptype) {
1099                         tunnel_ptype = tunnels_info[i].ptype;
1100                 } else {
1101                         tunnel_ptype = 0;
1102                         break;
1103                 }
1104         }
1105         rxq_ctrl->rxq.tunnel = tunnel_ptype;
1106 }
1107
1108 /**
1109  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
1110  * flow.
1111  *
1112  * @param[in] dev
1113  *   Pointer to the Ethernet device structure.
1114  * @param[in] dev_handle
1115  *   Pointer to device flow handle structure.
1116  */
1117 static void
1118 flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
1119                        struct mlx5_flow_handle *dev_handle)
1120 {
1121         struct mlx5_priv *priv = dev->data->dev_private;
1122         const int mark = dev_handle->mark;
1123         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1124         struct mlx5_hrxq *hrxq;
1125         unsigned int i;
1126
1127         if (dev_handle->fate_action != MLX5_FLOW_FATE_QUEUE)
1128                 return;
1129         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1130                               dev_handle->rix_hrxq);
1131         if (!hrxq)
1132                 return;
1133         for (i = 0; i != hrxq->ind_table->queues_n; ++i) {
1134                 int idx = hrxq->ind_table->queues[i];
1135                 struct mlx5_rxq_ctrl *rxq_ctrl =
1136                         container_of((*priv->rxqs)[idx],
1137                                      struct mlx5_rxq_ctrl, rxq);
1138
1139                 /*
1140                  * To support metadata register copy on Tx loopback,
1141                  * this must be always enabled (metadata may arive
1142                  * from other port - not from local flows only.
1143                  */
1144                 if (priv->config.dv_flow_en &&
1145                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1146                     mlx5_flow_ext_mreg_supported(dev)) {
1147                         rxq_ctrl->rxq.mark = 1;
1148                         rxq_ctrl->flow_mark_n = 1;
1149                 } else if (mark) {
1150                         rxq_ctrl->rxq.mark = 1;
1151                         rxq_ctrl->flow_mark_n++;
1152                 }
1153                 if (tunnel) {
1154                         unsigned int j;
1155
1156                         /* Increase the counter matching the flow. */
1157                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1158                                 if ((tunnels_info[j].tunnel &
1159                                      dev_handle->layers) ==
1160                                     tunnels_info[j].tunnel) {
1161                                         rxq_ctrl->flow_tunnels_n[j]++;
1162                                         break;
1163                                 }
1164                         }
1165                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1166                 }
1167         }
1168 }
1169
1170 /**
1171  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
1172  *
1173  * @param[in] dev
1174  *   Pointer to the Ethernet device structure.
1175  * @param[in] flow
1176  *   Pointer to flow structure.
1177  */
1178 static void
1179 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
1180 {
1181         struct mlx5_priv *priv = dev->data->dev_private;
1182         uint32_t handle_idx;
1183         struct mlx5_flow_handle *dev_handle;
1184
1185         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1186                        handle_idx, dev_handle, next)
1187                 flow_drv_rxq_flags_set(dev, dev_handle);
1188 }
1189
1190 /**
1191  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1192  * device flow if no other flow uses it with the same kind of request.
1193  *
1194  * @param dev
1195  *   Pointer to Ethernet device.
1196  * @param[in] dev_handle
1197  *   Pointer to the device flow handle structure.
1198  */
1199 static void
1200 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev,
1201                         struct mlx5_flow_handle *dev_handle)
1202 {
1203         struct mlx5_priv *priv = dev->data->dev_private;
1204         const int mark = dev_handle->mark;
1205         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1206         struct mlx5_hrxq *hrxq;
1207         unsigned int i;
1208
1209         if (dev_handle->fate_action != MLX5_FLOW_FATE_QUEUE)
1210                 return;
1211         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1212                               dev_handle->rix_hrxq);
1213         if (!hrxq)
1214                 return;
1215         MLX5_ASSERT(dev->data->dev_started);
1216         for (i = 0; i != hrxq->ind_table->queues_n; ++i) {
1217                 int idx = hrxq->ind_table->queues[i];
1218                 struct mlx5_rxq_ctrl *rxq_ctrl =
1219                         container_of((*priv->rxqs)[idx],
1220                                      struct mlx5_rxq_ctrl, rxq);
1221
1222                 if (priv->config.dv_flow_en &&
1223                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1224                     mlx5_flow_ext_mreg_supported(dev)) {
1225                         rxq_ctrl->rxq.mark = 1;
1226                         rxq_ctrl->flow_mark_n = 1;
1227                 } else if (mark) {
1228                         rxq_ctrl->flow_mark_n--;
1229                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
1230                 }
1231                 if (tunnel) {
1232                         unsigned int j;
1233
1234                         /* Decrease the counter matching the flow. */
1235                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1236                                 if ((tunnels_info[j].tunnel &
1237                                      dev_handle->layers) ==
1238                                     tunnels_info[j].tunnel) {
1239                                         rxq_ctrl->flow_tunnels_n[j]--;
1240                                         break;
1241                                 }
1242                         }
1243                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1244                 }
1245         }
1246 }
1247
1248 /**
1249  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1250  * @p flow if no other flow uses it with the same kind of request.
1251  *
1252  * @param dev
1253  *   Pointer to Ethernet device.
1254  * @param[in] flow
1255  *   Pointer to the flow.
1256  */
1257 static void
1258 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
1259 {
1260         struct mlx5_priv *priv = dev->data->dev_private;
1261         uint32_t handle_idx;
1262         struct mlx5_flow_handle *dev_handle;
1263
1264         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1265                        handle_idx, dev_handle, next)
1266                 flow_drv_rxq_flags_trim(dev, dev_handle);
1267 }
1268
1269 /**
1270  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
1271  *
1272  * @param dev
1273  *   Pointer to Ethernet device.
1274  */
1275 static void
1276 flow_rxq_flags_clear(struct rte_eth_dev *dev)
1277 {
1278         struct mlx5_priv *priv = dev->data->dev_private;
1279         unsigned int i;
1280
1281         for (i = 0; i != priv->rxqs_n; ++i) {
1282                 struct mlx5_rxq_ctrl *rxq_ctrl;
1283                 unsigned int j;
1284
1285                 if (!(*priv->rxqs)[i])
1286                         continue;
1287                 rxq_ctrl = container_of((*priv->rxqs)[i],
1288                                         struct mlx5_rxq_ctrl, rxq);
1289                 rxq_ctrl->flow_mark_n = 0;
1290                 rxq_ctrl->rxq.mark = 0;
1291                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
1292                         rxq_ctrl->flow_tunnels_n[j] = 0;
1293                 rxq_ctrl->rxq.tunnel = 0;
1294         }
1295 }
1296
1297 /**
1298  * Set the Rx queue dynamic metadata (mask and offset) for a flow
1299  *
1300  * @param[in] dev
1301  *   Pointer to the Ethernet device structure.
1302  */
1303 void
1304 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev)
1305 {
1306         struct mlx5_priv *priv = dev->data->dev_private;
1307         struct mlx5_rxq_data *data;
1308         unsigned int i;
1309
1310         for (i = 0; i != priv->rxqs_n; ++i) {
1311                 if (!(*priv->rxqs)[i])
1312                         continue;
1313                 data = (*priv->rxqs)[i];
1314                 if (!rte_flow_dynf_metadata_avail()) {
1315                         data->dynf_meta = 0;
1316                         data->flow_meta_mask = 0;
1317                         data->flow_meta_offset = -1;
1318                 } else {
1319                         data->dynf_meta = 1;
1320                         data->flow_meta_mask = rte_flow_dynf_metadata_mask;
1321                         data->flow_meta_offset = rte_flow_dynf_metadata_offs;
1322                 }
1323         }
1324 }
1325
1326 /*
1327  * return a pointer to the desired action in the list of actions.
1328  *
1329  * @param[in] actions
1330  *   The list of actions to search the action in.
1331  * @param[in] action
1332  *   The action to find.
1333  *
1334  * @return
1335  *   Pointer to the action in the list, if found. NULL otherwise.
1336  */
1337 const struct rte_flow_action *
1338 mlx5_flow_find_action(const struct rte_flow_action *actions,
1339                       enum rte_flow_action_type action)
1340 {
1341         if (actions == NULL)
1342                 return NULL;
1343         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
1344                 if (actions->type == action)
1345                         return actions;
1346         return NULL;
1347 }
1348
1349 /*
1350  * Validate the flag action.
1351  *
1352  * @param[in] action_flags
1353  *   Bit-fields that holds the actions detected until now.
1354  * @param[in] attr
1355  *   Attributes of flow that includes this action.
1356  * @param[out] error
1357  *   Pointer to error structure.
1358  *
1359  * @return
1360  *   0 on success, a negative errno value otherwise and rte_errno is set.
1361  */
1362 int
1363 mlx5_flow_validate_action_flag(uint64_t action_flags,
1364                                const struct rte_flow_attr *attr,
1365                                struct rte_flow_error *error)
1366 {
1367         if (action_flags & MLX5_FLOW_ACTION_MARK)
1368                 return rte_flow_error_set(error, EINVAL,
1369                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1370                                           "can't mark and flag in same flow");
1371         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1372                 return rte_flow_error_set(error, EINVAL,
1373                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1374                                           "can't have 2 flag"
1375                                           " actions in same flow");
1376         if (attr->egress)
1377                 return rte_flow_error_set(error, ENOTSUP,
1378                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1379                                           "flag action not supported for "
1380                                           "egress");
1381         return 0;
1382 }
1383
1384 /*
1385  * Validate the mark action.
1386  *
1387  * @param[in] action
1388  *   Pointer to the queue action.
1389  * @param[in] action_flags
1390  *   Bit-fields that holds the actions detected until now.
1391  * @param[in] attr
1392  *   Attributes of flow that includes this action.
1393  * @param[out] error
1394  *   Pointer to error structure.
1395  *
1396  * @return
1397  *   0 on success, a negative errno value otherwise and rte_errno is set.
1398  */
1399 int
1400 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
1401                                uint64_t action_flags,
1402                                const struct rte_flow_attr *attr,
1403                                struct rte_flow_error *error)
1404 {
1405         const struct rte_flow_action_mark *mark = action->conf;
1406
1407         if (!mark)
1408                 return rte_flow_error_set(error, EINVAL,
1409                                           RTE_FLOW_ERROR_TYPE_ACTION,
1410                                           action,
1411                                           "configuration cannot be null");
1412         if (mark->id >= MLX5_FLOW_MARK_MAX)
1413                 return rte_flow_error_set(error, EINVAL,
1414                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1415                                           &mark->id,
1416                                           "mark id must in 0 <= id < "
1417                                           RTE_STR(MLX5_FLOW_MARK_MAX));
1418         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1419                 return rte_flow_error_set(error, EINVAL,
1420                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1421                                           "can't flag and mark in same flow");
1422         if (action_flags & MLX5_FLOW_ACTION_MARK)
1423                 return rte_flow_error_set(error, EINVAL,
1424                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1425                                           "can't have 2 mark actions in same"
1426                                           " flow");
1427         if (attr->egress)
1428                 return rte_flow_error_set(error, ENOTSUP,
1429                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1430                                           "mark action not supported for "
1431                                           "egress");
1432         return 0;
1433 }
1434
1435 /*
1436  * Validate the drop action.
1437  *
1438  * @param[in] action_flags
1439  *   Bit-fields that holds the actions detected until now.
1440  * @param[in] attr
1441  *   Attributes of flow that includes this action.
1442  * @param[out] error
1443  *   Pointer to error structure.
1444  *
1445  * @return
1446  *   0 on success, a negative errno value otherwise and rte_errno is set.
1447  */
1448 int
1449 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1450                                const struct rte_flow_attr *attr,
1451                                struct rte_flow_error *error)
1452 {
1453         if (attr->egress)
1454                 return rte_flow_error_set(error, ENOTSUP,
1455                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1456                                           "drop action not supported for "
1457                                           "egress");
1458         return 0;
1459 }
1460
1461 /*
1462  * Validate the queue action.
1463  *
1464  * @param[in] action
1465  *   Pointer to the queue action.
1466  * @param[in] action_flags
1467  *   Bit-fields that holds the actions detected until now.
1468  * @param[in] dev
1469  *   Pointer to the Ethernet device structure.
1470  * @param[in] attr
1471  *   Attributes of flow that includes this action.
1472  * @param[out] error
1473  *   Pointer to error structure.
1474  *
1475  * @return
1476  *   0 on success, a negative errno value otherwise and rte_errno is set.
1477  */
1478 int
1479 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1480                                 uint64_t action_flags,
1481                                 struct rte_eth_dev *dev,
1482                                 const struct rte_flow_attr *attr,
1483                                 struct rte_flow_error *error)
1484 {
1485         struct mlx5_priv *priv = dev->data->dev_private;
1486         const struct rte_flow_action_queue *queue = action->conf;
1487
1488         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1489                 return rte_flow_error_set(error, EINVAL,
1490                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1491                                           "can't have 2 fate actions in"
1492                                           " same flow");
1493         if (!priv->rxqs_n)
1494                 return rte_flow_error_set(error, EINVAL,
1495                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1496                                           NULL, "No Rx queues configured");
1497         if (queue->index >= priv->rxqs_n)
1498                 return rte_flow_error_set(error, EINVAL,
1499                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1500                                           &queue->index,
1501                                           "queue index out of range");
1502         if (!(*priv->rxqs)[queue->index])
1503                 return rte_flow_error_set(error, EINVAL,
1504                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1505                                           &queue->index,
1506                                           "queue is not configured");
1507         if (attr->egress)
1508                 return rte_flow_error_set(error, ENOTSUP,
1509                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1510                                           "queue action not supported for "
1511                                           "egress");
1512         return 0;
1513 }
1514
1515 /*
1516  * Validate the rss action.
1517  *
1518  * @param[in] dev
1519  *   Pointer to the Ethernet device structure.
1520  * @param[in] action
1521  *   Pointer to the queue action.
1522  * @param[out] error
1523  *   Pointer to error structure.
1524  *
1525  * @return
1526  *   0 on success, a negative errno value otherwise and rte_errno is set.
1527  */
1528 int
1529 mlx5_validate_action_rss(struct rte_eth_dev *dev,
1530                          const struct rte_flow_action *action,
1531                          struct rte_flow_error *error)
1532 {
1533         struct mlx5_priv *priv = dev->data->dev_private;
1534         const struct rte_flow_action_rss *rss = action->conf;
1535         unsigned int i;
1536
1537         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1538             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1539                 return rte_flow_error_set(error, ENOTSUP,
1540                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1541                                           &rss->func,
1542                                           "RSS hash function not supported");
1543 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1544         if (rss->level > 2)
1545 #else
1546         if (rss->level > 1)
1547 #endif
1548                 return rte_flow_error_set(error, ENOTSUP,
1549                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1550                                           &rss->level,
1551                                           "tunnel RSS is not supported");
1552         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1553         if (rss->key_len == 0 && rss->key != NULL)
1554                 return rte_flow_error_set(error, ENOTSUP,
1555                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1556                                           &rss->key_len,
1557                                           "RSS hash key length 0");
1558         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1559                 return rte_flow_error_set(error, ENOTSUP,
1560                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1561                                           &rss->key_len,
1562                                           "RSS hash key too small");
1563         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1564                 return rte_flow_error_set(error, ENOTSUP,
1565                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1566                                           &rss->key_len,
1567                                           "RSS hash key too large");
1568         if (rss->queue_num > priv->config.ind_table_max_size)
1569                 return rte_flow_error_set(error, ENOTSUP,
1570                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1571                                           &rss->queue_num,
1572                                           "number of queues too large");
1573         if (rss->types & MLX5_RSS_HF_MASK)
1574                 return rte_flow_error_set(error, ENOTSUP,
1575                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1576                                           &rss->types,
1577                                           "some RSS protocols are not"
1578                                           " supported");
1579         if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) &&
1580             !(rss->types & ETH_RSS_IP))
1581                 return rte_flow_error_set(error, EINVAL,
1582                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1583                                           "L3 partial RSS requested but L3 RSS"
1584                                           " type not specified");
1585         if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) &&
1586             !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP)))
1587                 return rte_flow_error_set(error, EINVAL,
1588                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1589                                           "L4 partial RSS requested but L4 RSS"
1590                                           " type not specified");
1591         if (!priv->rxqs_n)
1592                 return rte_flow_error_set(error, EINVAL,
1593                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1594                                           NULL, "No Rx queues configured");
1595         if (!rss->queue_num)
1596                 return rte_flow_error_set(error, EINVAL,
1597                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1598                                           NULL, "No queues configured");
1599         for (i = 0; i != rss->queue_num; ++i) {
1600                 if (rss->queue[i] >= priv->rxqs_n)
1601                         return rte_flow_error_set
1602                                 (error, EINVAL,
1603                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1604                                  &rss->queue[i], "queue index out of range");
1605                 if (!(*priv->rxqs)[rss->queue[i]])
1606                         return rte_flow_error_set
1607                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1608                                  &rss->queue[i], "queue is not configured");
1609         }
1610         return 0;
1611 }
1612
1613 /*
1614  * Validate the rss action.
1615  *
1616  * @param[in] action
1617  *   Pointer to the queue action.
1618  * @param[in] action_flags
1619  *   Bit-fields that holds the actions detected until now.
1620  * @param[in] dev
1621  *   Pointer to the Ethernet device structure.
1622  * @param[in] attr
1623  *   Attributes of flow that includes this action.
1624  * @param[in] item_flags
1625  *   Items that were detected.
1626  * @param[out] error
1627  *   Pointer to error structure.
1628  *
1629  * @return
1630  *   0 on success, a negative errno value otherwise and rte_errno is set.
1631  */
1632 int
1633 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1634                               uint64_t action_flags,
1635                               struct rte_eth_dev *dev,
1636                               const struct rte_flow_attr *attr,
1637                               uint64_t item_flags,
1638                               struct rte_flow_error *error)
1639 {
1640         const struct rte_flow_action_rss *rss = action->conf;
1641         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1642         int ret;
1643
1644         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1645                 return rte_flow_error_set(error, EINVAL,
1646                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1647                                           "can't have 2 fate actions"
1648                                           " in same flow");
1649         ret = mlx5_validate_action_rss(dev, action, error);
1650         if (ret)
1651                 return ret;
1652         if (attr->egress)
1653                 return rte_flow_error_set(error, ENOTSUP,
1654                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1655                                           "rss action not supported for "
1656                                           "egress");
1657         if (rss->level > 1 && !tunnel)
1658                 return rte_flow_error_set(error, EINVAL,
1659                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1660                                           "inner RSS is not supported for "
1661                                           "non-tunnel flows");
1662         if ((item_flags & MLX5_FLOW_LAYER_ECPRI) &&
1663             !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) {
1664                 return rte_flow_error_set(error, EINVAL,
1665                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1666                                           "RSS on eCPRI is not supported now");
1667         }
1668         return 0;
1669 }
1670
1671 /*
1672  * Validate the default miss action.
1673  *
1674  * @param[in] action_flags
1675  *   Bit-fields that holds the actions detected until now.
1676  * @param[out] error
1677  *   Pointer to error structure.
1678  *
1679  * @return
1680  *   0 on success, a negative errno value otherwise and rte_errno is set.
1681  */
1682 int
1683 mlx5_flow_validate_action_default_miss(uint64_t action_flags,
1684                                 const struct rte_flow_attr *attr,
1685                                 struct rte_flow_error *error)
1686 {
1687         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1688                 return rte_flow_error_set(error, EINVAL,
1689                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1690                                           "can't have 2 fate actions in"
1691                                           " same flow");
1692         if (attr->egress)
1693                 return rte_flow_error_set(error, ENOTSUP,
1694                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1695                                           "default miss action not supported "
1696                                           "for egress");
1697         if (attr->group)
1698                 return rte_flow_error_set(error, ENOTSUP,
1699                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
1700                                           "only group 0 is supported");
1701         if (attr->transfer)
1702                 return rte_flow_error_set(error, ENOTSUP,
1703                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1704                                           NULL, "transfer is not supported");
1705         return 0;
1706 }
1707
1708 /*
1709  * Validate the count action.
1710  *
1711  * @param[in] dev
1712  *   Pointer to the Ethernet device structure.
1713  * @param[in] attr
1714  *   Attributes of flow that includes this action.
1715  * @param[out] error
1716  *   Pointer to error structure.
1717  *
1718  * @return
1719  *   0 on success, a negative errno value otherwise and rte_errno is set.
1720  */
1721 int
1722 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1723                                 const struct rte_flow_attr *attr,
1724                                 struct rte_flow_error *error)
1725 {
1726         if (attr->egress)
1727                 return rte_flow_error_set(error, ENOTSUP,
1728                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1729                                           "count action not supported for "
1730                                           "egress");
1731         return 0;
1732 }
1733
1734 /**
1735  * Verify the @p attributes will be correctly understood by the NIC and store
1736  * them in the @p flow if everything is correct.
1737  *
1738  * @param[in] dev
1739  *   Pointer to the Ethernet device structure.
1740  * @param[in] attributes
1741  *   Pointer to flow attributes
1742  * @param[out] error
1743  *   Pointer to error structure.
1744  *
1745  * @return
1746  *   0 on success, a negative errno value otherwise and rte_errno is set.
1747  */
1748 int
1749 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1750                               const struct rte_flow_attr *attributes,
1751                               struct rte_flow_error *error)
1752 {
1753         struct mlx5_priv *priv = dev->data->dev_private;
1754         uint32_t priority_max = priv->config.flow_prio - 1;
1755
1756         if (attributes->group)
1757                 return rte_flow_error_set(error, ENOTSUP,
1758                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1759                                           NULL, "groups is not supported");
1760         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
1761             attributes->priority >= priority_max)
1762                 return rte_flow_error_set(error, ENOTSUP,
1763                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1764                                           NULL, "priority out of range");
1765         if (attributes->egress)
1766                 return rte_flow_error_set(error, ENOTSUP,
1767                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1768                                           "egress is not supported");
1769         if (attributes->transfer && !priv->config.dv_esw_en)
1770                 return rte_flow_error_set(error, ENOTSUP,
1771                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1772                                           NULL, "transfer is not supported");
1773         if (!attributes->ingress)
1774                 return rte_flow_error_set(error, EINVAL,
1775                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1776                                           NULL,
1777                                           "ingress attribute is mandatory");
1778         return 0;
1779 }
1780
1781 /**
1782  * Validate ICMP6 item.
1783  *
1784  * @param[in] item
1785  *   Item specification.
1786  * @param[in] item_flags
1787  *   Bit-fields that holds the items detected until now.
1788  * @param[in] ext_vlan_sup
1789  *   Whether extended VLAN features are supported or not.
1790  * @param[out] error
1791  *   Pointer to error structure.
1792  *
1793  * @return
1794  *   0 on success, a negative errno value otherwise and rte_errno is set.
1795  */
1796 int
1797 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1798                                uint64_t item_flags,
1799                                uint8_t target_protocol,
1800                                struct rte_flow_error *error)
1801 {
1802         const struct rte_flow_item_icmp6 *mask = item->mask;
1803         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1804         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1805                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1806         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1807                                       MLX5_FLOW_LAYER_OUTER_L4;
1808         int ret;
1809
1810         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1811                 return rte_flow_error_set(error, EINVAL,
1812                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1813                                           "protocol filtering not compatible"
1814                                           " with ICMP6 layer");
1815         if (!(item_flags & l3m))
1816                 return rte_flow_error_set(error, EINVAL,
1817                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1818                                           "IPv6 is mandatory to filter on"
1819                                           " ICMP6");
1820         if (item_flags & l4m)
1821                 return rte_flow_error_set(error, EINVAL,
1822                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1823                                           "multiple L4 layers not supported");
1824         if (!mask)
1825                 mask = &rte_flow_item_icmp6_mask;
1826         ret = mlx5_flow_item_acceptable
1827                 (item, (const uint8_t *)mask,
1828                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1829                  sizeof(struct rte_flow_item_icmp6),
1830                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1831         if (ret < 0)
1832                 return ret;
1833         return 0;
1834 }
1835
1836 /**
1837  * Validate ICMP item.
1838  *
1839  * @param[in] item
1840  *   Item specification.
1841  * @param[in] item_flags
1842  *   Bit-fields that holds the items detected until now.
1843  * @param[out] error
1844  *   Pointer to error structure.
1845  *
1846  * @return
1847  *   0 on success, a negative errno value otherwise and rte_errno is set.
1848  */
1849 int
1850 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1851                              uint64_t item_flags,
1852                              uint8_t target_protocol,
1853                              struct rte_flow_error *error)
1854 {
1855         const struct rte_flow_item_icmp *mask = item->mask;
1856         const struct rte_flow_item_icmp nic_mask = {
1857                 .hdr.icmp_type = 0xff,
1858                 .hdr.icmp_code = 0xff,
1859                 .hdr.icmp_ident = RTE_BE16(0xffff),
1860                 .hdr.icmp_seq_nb = RTE_BE16(0xffff),
1861         };
1862         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1863         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1864                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1865         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1866                                       MLX5_FLOW_LAYER_OUTER_L4;
1867         int ret;
1868
1869         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1870                 return rte_flow_error_set(error, EINVAL,
1871                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1872                                           "protocol filtering not compatible"
1873                                           " with ICMP layer");
1874         if (!(item_flags & l3m))
1875                 return rte_flow_error_set(error, EINVAL,
1876                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1877                                           "IPv4 is mandatory to filter"
1878                                           " on ICMP");
1879         if (item_flags & l4m)
1880                 return rte_flow_error_set(error, EINVAL,
1881                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1882                                           "multiple L4 layers not supported");
1883         if (!mask)
1884                 mask = &nic_mask;
1885         ret = mlx5_flow_item_acceptable
1886                 (item, (const uint8_t *)mask,
1887                  (const uint8_t *)&nic_mask,
1888                  sizeof(struct rte_flow_item_icmp),
1889                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1890         if (ret < 0)
1891                 return ret;
1892         return 0;
1893 }
1894
1895 /**
1896  * Validate Ethernet item.
1897  *
1898  * @param[in] item
1899  *   Item specification.
1900  * @param[in] item_flags
1901  *   Bit-fields that holds the items detected until now.
1902  * @param[out] error
1903  *   Pointer to error structure.
1904  *
1905  * @return
1906  *   0 on success, a negative errno value otherwise and rte_errno is set.
1907  */
1908 int
1909 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1910                             uint64_t item_flags, bool ext_vlan_sup,
1911                             struct rte_flow_error *error)
1912 {
1913         const struct rte_flow_item_eth *mask = item->mask;
1914         const struct rte_flow_item_eth nic_mask = {
1915                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1916                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1917                 .type = RTE_BE16(0xffff),
1918                 .has_vlan = ext_vlan_sup ? 1 : 0,
1919         };
1920         int ret;
1921         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1922         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1923                                        MLX5_FLOW_LAYER_OUTER_L2;
1924
1925         if (item_flags & ethm)
1926                 return rte_flow_error_set(error, ENOTSUP,
1927                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1928                                           "multiple L2 layers not supported");
1929         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
1930             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
1931                 return rte_flow_error_set(error, EINVAL,
1932                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1933                                           "L2 layer should not follow "
1934                                           "L3 layers");
1935         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
1936             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
1937                 return rte_flow_error_set(error, EINVAL,
1938                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1939                                           "L2 layer should not follow VLAN");
1940         if (!mask)
1941                 mask = &rte_flow_item_eth_mask;
1942         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1943                                         (const uint8_t *)&nic_mask,
1944                                         sizeof(struct rte_flow_item_eth),
1945                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1946         return ret;
1947 }
1948
1949 /**
1950  * Validate VLAN item.
1951  *
1952  * @param[in] item
1953  *   Item specification.
1954  * @param[in] item_flags
1955  *   Bit-fields that holds the items detected until now.
1956  * @param[in] dev
1957  *   Ethernet device flow is being created on.
1958  * @param[out] error
1959  *   Pointer to error structure.
1960  *
1961  * @return
1962  *   0 on success, a negative errno value otherwise and rte_errno is set.
1963  */
1964 int
1965 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1966                              uint64_t item_flags,
1967                              struct rte_eth_dev *dev,
1968                              struct rte_flow_error *error)
1969 {
1970         const struct rte_flow_item_vlan *spec = item->spec;
1971         const struct rte_flow_item_vlan *mask = item->mask;
1972         const struct rte_flow_item_vlan nic_mask = {
1973                 .tci = RTE_BE16(UINT16_MAX),
1974                 .inner_type = RTE_BE16(UINT16_MAX),
1975         };
1976         uint16_t vlan_tag = 0;
1977         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1978         int ret;
1979         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1980                                         MLX5_FLOW_LAYER_INNER_L4) :
1981                                        (MLX5_FLOW_LAYER_OUTER_L3 |
1982                                         MLX5_FLOW_LAYER_OUTER_L4);
1983         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1984                                         MLX5_FLOW_LAYER_OUTER_VLAN;
1985
1986         if (item_flags & vlanm)
1987                 return rte_flow_error_set(error, EINVAL,
1988                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1989                                           "multiple VLAN layers not supported");
1990         else if ((item_flags & l34m) != 0)
1991                 return rte_flow_error_set(error, EINVAL,
1992                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1993                                           "VLAN cannot follow L3/L4 layer");
1994         if (!mask)
1995                 mask = &rte_flow_item_vlan_mask;
1996         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1997                                         (const uint8_t *)&nic_mask,
1998                                         sizeof(struct rte_flow_item_vlan),
1999                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2000         if (ret)
2001                 return ret;
2002         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2003                 struct mlx5_priv *priv = dev->data->dev_private;
2004
2005                 if (priv->vmwa_context) {
2006                         /*
2007                          * Non-NULL context means we have a virtual machine
2008                          * and SR-IOV enabled, we have to create VLAN interface
2009                          * to make hypervisor to setup E-Switch vport
2010                          * context correctly. We avoid creating the multiple
2011                          * VLAN interfaces, so we cannot support VLAN tag mask.
2012                          */
2013                         return rte_flow_error_set(error, EINVAL,
2014                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2015                                                   item,
2016                                                   "VLAN tag mask is not"
2017                                                   " supported in virtual"
2018                                                   " environment");
2019                 }
2020         }
2021         if (spec) {
2022                 vlan_tag = spec->tci;
2023                 vlan_tag &= mask->tci;
2024         }
2025         /*
2026          * From verbs perspective an empty VLAN is equivalent
2027          * to a packet without VLAN layer.
2028          */
2029         if (!vlan_tag)
2030                 return rte_flow_error_set(error, EINVAL,
2031                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2032                                           item->spec,
2033                                           "VLAN cannot be empty");
2034         return 0;
2035 }
2036
2037 /**
2038  * Validate IPV4 item.
2039  *
2040  * @param[in] item
2041  *   Item specification.
2042  * @param[in] item_flags
2043  *   Bit-fields that holds the items detected until now.
2044  * @param[in] last_item
2045  *   Previous validated item in the pattern items.
2046  * @param[in] ether_type
2047  *   Type in the ethernet layer header (including dot1q).
2048  * @param[in] acc_mask
2049  *   Acceptable mask, if NULL default internal default mask
2050  *   will be used to check whether item fields are supported.
2051  * @param[in] range_accepted
2052  *   True if range of values is accepted for specific fields, false otherwise.
2053  * @param[out] error
2054  *   Pointer to error structure.
2055  *
2056  * @return
2057  *   0 on success, a negative errno value otherwise and rte_errno is set.
2058  */
2059 int
2060 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
2061                              uint64_t item_flags,
2062                              uint64_t last_item,
2063                              uint16_t ether_type,
2064                              const struct rte_flow_item_ipv4 *acc_mask,
2065                              bool range_accepted,
2066                              struct rte_flow_error *error)
2067 {
2068         const struct rte_flow_item_ipv4 *mask = item->mask;
2069         const struct rte_flow_item_ipv4 *spec = item->spec;
2070         const struct rte_flow_item_ipv4 nic_mask = {
2071                 .hdr = {
2072                         .src_addr = RTE_BE32(0xffffffff),
2073                         .dst_addr = RTE_BE32(0xffffffff),
2074                         .type_of_service = 0xff,
2075                         .next_proto_id = 0xff,
2076                 },
2077         };
2078         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2079         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2080                                       MLX5_FLOW_LAYER_OUTER_L3;
2081         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2082                                       MLX5_FLOW_LAYER_OUTER_L4;
2083         int ret;
2084         uint8_t next_proto = 0xFF;
2085         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2086                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2087                                   MLX5_FLOW_LAYER_INNER_VLAN);
2088
2089         if ((last_item & l2_vlan) && ether_type &&
2090             ether_type != RTE_ETHER_TYPE_IPV4)
2091                 return rte_flow_error_set(error, EINVAL,
2092                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2093                                           "IPv4 cannot follow L2/VLAN layer "
2094                                           "which ether type is not IPv4");
2095         if (item_flags & MLX5_FLOW_LAYER_IPIP) {
2096                 if (mask && spec)
2097                         next_proto = mask->hdr.next_proto_id &
2098                                      spec->hdr.next_proto_id;
2099                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2100                         return rte_flow_error_set(error, EINVAL,
2101                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2102                                                   item,
2103                                                   "multiple tunnel "
2104                                                   "not supported");
2105         }
2106         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
2107                 return rte_flow_error_set(error, EINVAL,
2108                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2109                                           "wrong tunnel type - IPv6 specified "
2110                                           "but IPv4 item provided");
2111         if (item_flags & l3m)
2112                 return rte_flow_error_set(error, ENOTSUP,
2113                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2114                                           "multiple L3 layers not supported");
2115         else if (item_flags & l4m)
2116                 return rte_flow_error_set(error, EINVAL,
2117                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2118                                           "L3 cannot follow an L4 layer.");
2119         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2120                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2121                 return rte_flow_error_set(error, EINVAL,
2122                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2123                                           "L3 cannot follow an NVGRE layer.");
2124         if (!mask)
2125                 mask = &rte_flow_item_ipv4_mask;
2126         else if (mask->hdr.next_proto_id != 0 &&
2127                  mask->hdr.next_proto_id != 0xff)
2128                 return rte_flow_error_set(error, EINVAL,
2129                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2130                                           "partial mask is not supported"
2131                                           " for protocol");
2132         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2133                                         acc_mask ? (const uint8_t *)acc_mask
2134                                                  : (const uint8_t *)&nic_mask,
2135                                         sizeof(struct rte_flow_item_ipv4),
2136                                         range_accepted, error);
2137         if (ret < 0)
2138                 return ret;
2139         return 0;
2140 }
2141
2142 /**
2143  * Validate IPV6 item.
2144  *
2145  * @param[in] item
2146  *   Item specification.
2147  * @param[in] item_flags
2148  *   Bit-fields that holds the items detected until now.
2149  * @param[in] last_item
2150  *   Previous validated item in the pattern items.
2151  * @param[in] ether_type
2152  *   Type in the ethernet layer header (including dot1q).
2153  * @param[in] acc_mask
2154  *   Acceptable mask, if NULL default internal default mask
2155  *   will be used to check whether item fields are supported.
2156  * @param[out] error
2157  *   Pointer to error structure.
2158  *
2159  * @return
2160  *   0 on success, a negative errno value otherwise and rte_errno is set.
2161  */
2162 int
2163 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
2164                              uint64_t item_flags,
2165                              uint64_t last_item,
2166                              uint16_t ether_type,
2167                              const struct rte_flow_item_ipv6 *acc_mask,
2168                              struct rte_flow_error *error)
2169 {
2170         const struct rte_flow_item_ipv6 *mask = item->mask;
2171         const struct rte_flow_item_ipv6 *spec = item->spec;
2172         const struct rte_flow_item_ipv6 nic_mask = {
2173                 .hdr = {
2174                         .src_addr =
2175                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2176                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2177                         .dst_addr =
2178                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2179                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2180                         .vtc_flow = RTE_BE32(0xffffffff),
2181                         .proto = 0xff,
2182                 },
2183         };
2184         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2185         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2186                                       MLX5_FLOW_LAYER_OUTER_L3;
2187         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2188                                       MLX5_FLOW_LAYER_OUTER_L4;
2189         int ret;
2190         uint8_t next_proto = 0xFF;
2191         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2192                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2193                                   MLX5_FLOW_LAYER_INNER_VLAN);
2194
2195         if ((last_item & l2_vlan) && ether_type &&
2196             ether_type != RTE_ETHER_TYPE_IPV6)
2197                 return rte_flow_error_set(error, EINVAL,
2198                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2199                                           "IPv6 cannot follow L2/VLAN layer "
2200                                           "which ether type is not IPv6");
2201         if (mask && mask->hdr.proto == UINT8_MAX && spec)
2202                 next_proto = spec->hdr.proto;
2203         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
2204                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2205                         return rte_flow_error_set(error, EINVAL,
2206                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2207                                                   item,
2208                                                   "multiple tunnel "
2209                                                   "not supported");
2210         }
2211         if (next_proto == IPPROTO_HOPOPTS  ||
2212             next_proto == IPPROTO_ROUTING  ||
2213             next_proto == IPPROTO_FRAGMENT ||
2214             next_proto == IPPROTO_ESP      ||
2215             next_proto == IPPROTO_AH       ||
2216             next_proto == IPPROTO_DSTOPTS)
2217                 return rte_flow_error_set(error, EINVAL,
2218                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2219                                           "IPv6 proto (next header) should "
2220                                           "not be set as extension header");
2221         if (item_flags & MLX5_FLOW_LAYER_IPIP)
2222                 return rte_flow_error_set(error, EINVAL,
2223                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2224                                           "wrong tunnel type - IPv4 specified "
2225                                           "but IPv6 item provided");
2226         if (item_flags & l3m)
2227                 return rte_flow_error_set(error, ENOTSUP,
2228                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2229                                           "multiple L3 layers not supported");
2230         else if (item_flags & l4m)
2231                 return rte_flow_error_set(error, EINVAL,
2232                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2233                                           "L3 cannot follow an L4 layer.");
2234         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2235                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2236                 return rte_flow_error_set(error, EINVAL,
2237                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2238                                           "L3 cannot follow an NVGRE layer.");
2239         if (!mask)
2240                 mask = &rte_flow_item_ipv6_mask;
2241         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2242                                         acc_mask ? (const uint8_t *)acc_mask
2243                                                  : (const uint8_t *)&nic_mask,
2244                                         sizeof(struct rte_flow_item_ipv6),
2245                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2246         if (ret < 0)
2247                 return ret;
2248         return 0;
2249 }
2250
2251 /**
2252  * Validate UDP item.
2253  *
2254  * @param[in] item
2255  *   Item specification.
2256  * @param[in] item_flags
2257  *   Bit-fields that holds the items detected until now.
2258  * @param[in] target_protocol
2259  *   The next protocol in the previous item.
2260  * @param[in] flow_mask
2261  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
2262  * @param[out] error
2263  *   Pointer to error structure.
2264  *
2265  * @return
2266  *   0 on success, a negative errno value otherwise and rte_errno is set.
2267  */
2268 int
2269 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
2270                             uint64_t item_flags,
2271                             uint8_t target_protocol,
2272                             struct rte_flow_error *error)
2273 {
2274         const struct rte_flow_item_udp *mask = item->mask;
2275         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2276         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2277                                       MLX5_FLOW_LAYER_OUTER_L3;
2278         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2279                                       MLX5_FLOW_LAYER_OUTER_L4;
2280         int ret;
2281
2282         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
2283                 return rte_flow_error_set(error, EINVAL,
2284                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2285                                           "protocol filtering not compatible"
2286                                           " with UDP layer");
2287         if (!(item_flags & l3m))
2288                 return rte_flow_error_set(error, EINVAL,
2289                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2290                                           "L3 is mandatory to filter on L4");
2291         if (item_flags & l4m)
2292                 return rte_flow_error_set(error, EINVAL,
2293                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2294                                           "multiple L4 layers not supported");
2295         if (!mask)
2296                 mask = &rte_flow_item_udp_mask;
2297         ret = mlx5_flow_item_acceptable
2298                 (item, (const uint8_t *)mask,
2299                  (const uint8_t *)&rte_flow_item_udp_mask,
2300                  sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2301                  error);
2302         if (ret < 0)
2303                 return ret;
2304         return 0;
2305 }
2306
2307 /**
2308  * Validate TCP item.
2309  *
2310  * @param[in] item
2311  *   Item specification.
2312  * @param[in] item_flags
2313  *   Bit-fields that holds the items detected until now.
2314  * @param[in] target_protocol
2315  *   The next protocol in the previous item.
2316  * @param[out] error
2317  *   Pointer to error structure.
2318  *
2319  * @return
2320  *   0 on success, a negative errno value otherwise and rte_errno is set.
2321  */
2322 int
2323 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
2324                             uint64_t item_flags,
2325                             uint8_t target_protocol,
2326                             const struct rte_flow_item_tcp *flow_mask,
2327                             struct rte_flow_error *error)
2328 {
2329         const struct rte_flow_item_tcp *mask = item->mask;
2330         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2331         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2332                                       MLX5_FLOW_LAYER_OUTER_L3;
2333         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2334                                       MLX5_FLOW_LAYER_OUTER_L4;
2335         int ret;
2336
2337         MLX5_ASSERT(flow_mask);
2338         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
2339                 return rte_flow_error_set(error, EINVAL,
2340                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2341                                           "protocol filtering not compatible"
2342                                           " with TCP layer");
2343         if (!(item_flags & l3m))
2344                 return rte_flow_error_set(error, EINVAL,
2345                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2346                                           "L3 is mandatory to filter on L4");
2347         if (item_flags & l4m)
2348                 return rte_flow_error_set(error, EINVAL,
2349                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2350                                           "multiple L4 layers not supported");
2351         if (!mask)
2352                 mask = &rte_flow_item_tcp_mask;
2353         ret = mlx5_flow_item_acceptable
2354                 (item, (const uint8_t *)mask,
2355                  (const uint8_t *)flow_mask,
2356                  sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2357                  error);
2358         if (ret < 0)
2359                 return ret;
2360         return 0;
2361 }
2362
2363 /**
2364  * Validate VXLAN item.
2365  *
2366  * @param[in] item
2367  *   Item specification.
2368  * @param[in] item_flags
2369  *   Bit-fields that holds the items detected until now.
2370  * @param[in] target_protocol
2371  *   The next protocol in the previous item.
2372  * @param[out] error
2373  *   Pointer to error structure.
2374  *
2375  * @return
2376  *   0 on success, a negative errno value otherwise and rte_errno is set.
2377  */
2378 int
2379 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
2380                               uint64_t item_flags,
2381                               struct rte_flow_error *error)
2382 {
2383         const struct rte_flow_item_vxlan *spec = item->spec;
2384         const struct rte_flow_item_vxlan *mask = item->mask;
2385         int ret;
2386         union vni {
2387                 uint32_t vlan_id;
2388                 uint8_t vni[4];
2389         } id = { .vlan_id = 0, };
2390
2391
2392         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2393                 return rte_flow_error_set(error, ENOTSUP,
2394                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2395                                           "multiple tunnel layers not"
2396                                           " supported");
2397         /*
2398          * Verify only UDPv4 is present as defined in
2399          * https://tools.ietf.org/html/rfc7348
2400          */
2401         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2402                 return rte_flow_error_set(error, EINVAL,
2403                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2404                                           "no outer UDP layer found");
2405         if (!mask)
2406                 mask = &rte_flow_item_vxlan_mask;
2407         ret = mlx5_flow_item_acceptable
2408                 (item, (const uint8_t *)mask,
2409                  (const uint8_t *)&rte_flow_item_vxlan_mask,
2410                  sizeof(struct rte_flow_item_vxlan),
2411                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2412         if (ret < 0)
2413                 return ret;
2414         if (spec) {
2415                 memcpy(&id.vni[1], spec->vni, 3);
2416                 memcpy(&id.vni[1], mask->vni, 3);
2417         }
2418         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2419                 return rte_flow_error_set(error, ENOTSUP,
2420                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2421                                           "VXLAN tunnel must be fully defined");
2422         return 0;
2423 }
2424
2425 /**
2426  * Validate VXLAN_GPE item.
2427  *
2428  * @param[in] item
2429  *   Item specification.
2430  * @param[in] item_flags
2431  *   Bit-fields that holds the items detected until now.
2432  * @param[in] priv
2433  *   Pointer to the private data structure.
2434  * @param[in] target_protocol
2435  *   The next protocol in the previous item.
2436  * @param[out] error
2437  *   Pointer to error structure.
2438  *
2439  * @return
2440  *   0 on success, a negative errno value otherwise and rte_errno is set.
2441  */
2442 int
2443 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
2444                                   uint64_t item_flags,
2445                                   struct rte_eth_dev *dev,
2446                                   struct rte_flow_error *error)
2447 {
2448         struct mlx5_priv *priv = dev->data->dev_private;
2449         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
2450         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
2451         int ret;
2452         union vni {
2453                 uint32_t vlan_id;
2454                 uint8_t vni[4];
2455         } id = { .vlan_id = 0, };
2456
2457         if (!priv->config.l3_vxlan_en)
2458                 return rte_flow_error_set(error, ENOTSUP,
2459                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2460                                           "L3 VXLAN is not enabled by device"
2461                                           " parameter and/or not configured in"
2462                                           " firmware");
2463         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2464                 return rte_flow_error_set(error, ENOTSUP,
2465                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2466                                           "multiple tunnel layers not"
2467                                           " supported");
2468         /*
2469          * Verify only UDPv4 is present as defined in
2470          * https://tools.ietf.org/html/rfc7348
2471          */
2472         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2473                 return rte_flow_error_set(error, EINVAL,
2474                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2475                                           "no outer UDP layer found");
2476         if (!mask)
2477                 mask = &rte_flow_item_vxlan_gpe_mask;
2478         ret = mlx5_flow_item_acceptable
2479                 (item, (const uint8_t *)mask,
2480                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
2481                  sizeof(struct rte_flow_item_vxlan_gpe),
2482                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2483         if (ret < 0)
2484                 return ret;
2485         if (spec) {
2486                 if (spec->protocol)
2487                         return rte_flow_error_set(error, ENOTSUP,
2488                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2489                                                   item,
2490                                                   "VxLAN-GPE protocol"
2491                                                   " not supported");
2492                 memcpy(&id.vni[1], spec->vni, 3);
2493                 memcpy(&id.vni[1], mask->vni, 3);
2494         }
2495         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2496                 return rte_flow_error_set(error, ENOTSUP,
2497                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2498                                           "VXLAN-GPE tunnel must be fully"
2499                                           " defined");
2500         return 0;
2501 }
2502 /**
2503  * Validate GRE Key item.
2504  *
2505  * @param[in] item
2506  *   Item specification.
2507  * @param[in] item_flags
2508  *   Bit flags to mark detected items.
2509  * @param[in] gre_item
2510  *   Pointer to gre_item
2511  * @param[out] error
2512  *   Pointer to error structure.
2513  *
2514  * @return
2515  *   0 on success, a negative errno value otherwise and rte_errno is set.
2516  */
2517 int
2518 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
2519                                 uint64_t item_flags,
2520                                 const struct rte_flow_item *gre_item,
2521                                 struct rte_flow_error *error)
2522 {
2523         const rte_be32_t *mask = item->mask;
2524         int ret = 0;
2525         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
2526         const struct rte_flow_item_gre *gre_spec;
2527         const struct rte_flow_item_gre *gre_mask;
2528
2529         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
2530                 return rte_flow_error_set(error, ENOTSUP,
2531                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2532                                           "Multiple GRE key not support");
2533         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2534                 return rte_flow_error_set(error, ENOTSUP,
2535                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2536                                           "No preceding GRE header");
2537         if (item_flags & MLX5_FLOW_LAYER_INNER)
2538                 return rte_flow_error_set(error, ENOTSUP,
2539                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2540                                           "GRE key following a wrong item");
2541         gre_mask = gre_item->mask;
2542         if (!gre_mask)
2543                 gre_mask = &rte_flow_item_gre_mask;
2544         gre_spec = gre_item->spec;
2545         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2546                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2547                 return rte_flow_error_set(error, EINVAL,
2548                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2549                                           "Key bit must be on");
2550
2551         if (!mask)
2552                 mask = &gre_key_default_mask;
2553         ret = mlx5_flow_item_acceptable
2554                 (item, (const uint8_t *)mask,
2555                  (const uint8_t *)&gre_key_default_mask,
2556                  sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2557         return ret;
2558 }
2559
2560 /**
2561  * Validate GRE item.
2562  *
2563  * @param[in] item
2564  *   Item specification.
2565  * @param[in] item_flags
2566  *   Bit flags to mark detected items.
2567  * @param[in] target_protocol
2568  *   The next protocol in the previous item.
2569  * @param[out] error
2570  *   Pointer to error structure.
2571  *
2572  * @return
2573  *   0 on success, a negative errno value otherwise and rte_errno is set.
2574  */
2575 int
2576 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2577                             uint64_t item_flags,
2578                             uint8_t target_protocol,
2579                             struct rte_flow_error *error)
2580 {
2581         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2582         const struct rte_flow_item_gre *mask = item->mask;
2583         int ret;
2584         const struct rte_flow_item_gre nic_mask = {
2585                 .c_rsvd0_ver = RTE_BE16(0xB000),
2586                 .protocol = RTE_BE16(UINT16_MAX),
2587         };
2588
2589         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2590                 return rte_flow_error_set(error, EINVAL,
2591                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2592                                           "protocol filtering not compatible"
2593                                           " with this GRE layer");
2594         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2595                 return rte_flow_error_set(error, ENOTSUP,
2596                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2597                                           "multiple tunnel layers not"
2598                                           " supported");
2599         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2600                 return rte_flow_error_set(error, ENOTSUP,
2601                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2602                                           "L3 Layer is missing");
2603         if (!mask)
2604                 mask = &rte_flow_item_gre_mask;
2605         ret = mlx5_flow_item_acceptable
2606                 (item, (const uint8_t *)mask,
2607                  (const uint8_t *)&nic_mask,
2608                  sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2609                  error);
2610         if (ret < 0)
2611                 return ret;
2612 #ifndef HAVE_MLX5DV_DR
2613 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2614         if (spec && (spec->protocol & mask->protocol))
2615                 return rte_flow_error_set(error, ENOTSUP,
2616                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2617                                           "without MPLS support the"
2618                                           " specification cannot be used for"
2619                                           " filtering");
2620 #endif
2621 #endif
2622         return 0;
2623 }
2624
2625 /**
2626  * Validate Geneve item.
2627  *
2628  * @param[in] item
2629  *   Item specification.
2630  * @param[in] itemFlags
2631  *   Bit-fields that holds the items detected until now.
2632  * @param[in] enPriv
2633  *   Pointer to the private data structure.
2634  * @param[out] error
2635  *   Pointer to error structure.
2636  *
2637  * @return
2638  *   0 on success, a negative errno value otherwise and rte_errno is set.
2639  */
2640
2641 int
2642 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2643                                uint64_t item_flags,
2644                                struct rte_eth_dev *dev,
2645                                struct rte_flow_error *error)
2646 {
2647         struct mlx5_priv *priv = dev->data->dev_private;
2648         const struct rte_flow_item_geneve *spec = item->spec;
2649         const struct rte_flow_item_geneve *mask = item->mask;
2650         int ret;
2651         uint16_t gbhdr;
2652         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2653                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2654         const struct rte_flow_item_geneve nic_mask = {
2655                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2656                 .vni = "\xff\xff\xff",
2657                 .protocol = RTE_BE16(UINT16_MAX),
2658         };
2659
2660         if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2661                 return rte_flow_error_set(error, ENOTSUP,
2662                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2663                                           "L3 Geneve is not enabled by device"
2664                                           " parameter and/or not configured in"
2665                                           " firmware");
2666         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2667                 return rte_flow_error_set(error, ENOTSUP,
2668                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2669                                           "multiple tunnel layers not"
2670                                           " supported");
2671         /*
2672          * Verify only UDPv4 is present as defined in
2673          * https://tools.ietf.org/html/rfc7348
2674          */
2675         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2676                 return rte_flow_error_set(error, EINVAL,
2677                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2678                                           "no outer UDP layer found");
2679         if (!mask)
2680                 mask = &rte_flow_item_geneve_mask;
2681         ret = mlx5_flow_item_acceptable
2682                                   (item, (const uint8_t *)mask,
2683                                    (const uint8_t *)&nic_mask,
2684                                    sizeof(struct rte_flow_item_geneve),
2685                                    MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2686         if (ret)
2687                 return ret;
2688         if (spec) {
2689                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2690                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2691                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2692                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2693                         return rte_flow_error_set(error, ENOTSUP,
2694                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2695                                                   item,
2696                                                   "Geneve protocol unsupported"
2697                                                   " fields are being used");
2698                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2699                         return rte_flow_error_set
2700                                         (error, ENOTSUP,
2701                                          RTE_FLOW_ERROR_TYPE_ITEM,
2702                                          item,
2703                                          "Unsupported Geneve options length");
2704         }
2705         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2706                 return rte_flow_error_set
2707                                     (error, ENOTSUP,
2708                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2709                                      "Geneve tunnel must be fully defined");
2710         return 0;
2711 }
2712
2713 /**
2714  * Validate MPLS item.
2715  *
2716  * @param[in] dev
2717  *   Pointer to the rte_eth_dev structure.
2718  * @param[in] item
2719  *   Item specification.
2720  * @param[in] item_flags
2721  *   Bit-fields that holds the items detected until now.
2722  * @param[in] prev_layer
2723  *   The protocol layer indicated in previous item.
2724  * @param[out] error
2725  *   Pointer to error structure.
2726  *
2727  * @return
2728  *   0 on success, a negative errno value otherwise and rte_errno is set.
2729  */
2730 int
2731 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
2732                              const struct rte_flow_item *item __rte_unused,
2733                              uint64_t item_flags __rte_unused,
2734                              uint64_t prev_layer __rte_unused,
2735                              struct rte_flow_error *error)
2736 {
2737 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2738         const struct rte_flow_item_mpls *mask = item->mask;
2739         struct mlx5_priv *priv = dev->data->dev_private;
2740         int ret;
2741
2742         if (!priv->config.mpls_en)
2743                 return rte_flow_error_set(error, ENOTSUP,
2744                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2745                                           "MPLS not supported or"
2746                                           " disabled in firmware"
2747                                           " configuration.");
2748         /* MPLS over IP, UDP, GRE is allowed */
2749         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
2750                             MLX5_FLOW_LAYER_OUTER_L4_UDP |
2751                             MLX5_FLOW_LAYER_GRE |
2752                             MLX5_FLOW_LAYER_GRE_KEY)))
2753                 return rte_flow_error_set(error, EINVAL,
2754                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2755                                           "protocol filtering not compatible"
2756                                           " with MPLS layer");
2757         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
2758         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
2759             !(item_flags & MLX5_FLOW_LAYER_GRE))
2760                 return rte_flow_error_set(error, ENOTSUP,
2761                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2762                                           "multiple tunnel layers not"
2763                                           " supported");
2764         if (!mask)
2765                 mask = &rte_flow_item_mpls_mask;
2766         ret = mlx5_flow_item_acceptable
2767                 (item, (const uint8_t *)mask,
2768                  (const uint8_t *)&rte_flow_item_mpls_mask,
2769                  sizeof(struct rte_flow_item_mpls),
2770                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2771         if (ret < 0)
2772                 return ret;
2773         return 0;
2774 #else
2775         return rte_flow_error_set(error, ENOTSUP,
2776                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
2777                                   "MPLS is not supported by Verbs, please"
2778                                   " update.");
2779 #endif
2780 }
2781
2782 /**
2783  * Validate NVGRE item.
2784  *
2785  * @param[in] item
2786  *   Item specification.
2787  * @param[in] item_flags
2788  *   Bit flags to mark detected items.
2789  * @param[in] target_protocol
2790  *   The next protocol in the previous item.
2791  * @param[out] error
2792  *   Pointer to error structure.
2793  *
2794  * @return
2795  *   0 on success, a negative errno value otherwise and rte_errno is set.
2796  */
2797 int
2798 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
2799                               uint64_t item_flags,
2800                               uint8_t target_protocol,
2801                               struct rte_flow_error *error)
2802 {
2803         const struct rte_flow_item_nvgre *mask = item->mask;
2804         int ret;
2805
2806         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2807                 return rte_flow_error_set(error, EINVAL,
2808                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2809                                           "protocol filtering not compatible"
2810                                           " with this GRE layer");
2811         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2812                 return rte_flow_error_set(error, ENOTSUP,
2813                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2814                                           "multiple tunnel layers not"
2815                                           " supported");
2816         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2817                 return rte_flow_error_set(error, ENOTSUP,
2818                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2819                                           "L3 Layer is missing");
2820         if (!mask)
2821                 mask = &rte_flow_item_nvgre_mask;
2822         ret = mlx5_flow_item_acceptable
2823                 (item, (const uint8_t *)mask,
2824                  (const uint8_t *)&rte_flow_item_nvgre_mask,
2825                  sizeof(struct rte_flow_item_nvgre),
2826                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2827         if (ret < 0)
2828                 return ret;
2829         return 0;
2830 }
2831
2832 /**
2833  * Validate eCPRI item.
2834  *
2835  * @param[in] item
2836  *   Item specification.
2837  * @param[in] item_flags
2838  *   Bit-fields that holds the items detected until now.
2839  * @param[in] last_item
2840  *   Previous validated item in the pattern items.
2841  * @param[in] ether_type
2842  *   Type in the ethernet layer header (including dot1q).
2843  * @param[in] acc_mask
2844  *   Acceptable mask, if NULL default internal default mask
2845  *   will be used to check whether item fields are supported.
2846  * @param[out] error
2847  *   Pointer to error structure.
2848  *
2849  * @return
2850  *   0 on success, a negative errno value otherwise and rte_errno is set.
2851  */
2852 int
2853 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item,
2854                               uint64_t item_flags,
2855                               uint64_t last_item,
2856                               uint16_t ether_type,
2857                               const struct rte_flow_item_ecpri *acc_mask,
2858                               struct rte_flow_error *error)
2859 {
2860         const struct rte_flow_item_ecpri *mask = item->mask;
2861         const struct rte_flow_item_ecpri nic_mask = {
2862                 .hdr = {
2863                         .common = {
2864                                 .u32 =
2865                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
2866                                         .type = 0xFF,
2867                                         }).u32),
2868                         },
2869                         .dummy[0] = 0xFFFFFFFF,
2870                 },
2871         };
2872         const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 |
2873                                         MLX5_FLOW_LAYER_OUTER_VLAN);
2874         struct rte_flow_item_ecpri mask_lo;
2875
2876         if (!(last_item & outer_l2_vlan) &&
2877             last_item != MLX5_FLOW_LAYER_OUTER_L4_UDP)
2878                 return rte_flow_error_set(error, EINVAL,
2879                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2880                                           "eCPRI can only follow L2/VLAN layer or UDP layer");
2881         if ((last_item & outer_l2_vlan) && ether_type &&
2882             ether_type != RTE_ETHER_TYPE_ECPRI)
2883                 return rte_flow_error_set(error, EINVAL,
2884                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2885                                           "eCPRI cannot follow L2/VLAN layer which ether type is not 0xAEFE");
2886         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2887                 return rte_flow_error_set(error, EINVAL,
2888                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2889                                           "eCPRI with tunnel is not supported right now");
2890         if (item_flags & MLX5_FLOW_LAYER_OUTER_L3)
2891                 return rte_flow_error_set(error, ENOTSUP,
2892                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2893                                           "multiple L3 layers not supported");
2894         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP)
2895                 return rte_flow_error_set(error, EINVAL,
2896                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2897                                           "eCPRI cannot coexist with a TCP layer");
2898         /* In specification, eCPRI could be over UDP layer. */
2899         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)
2900                 return rte_flow_error_set(error, EINVAL,
2901                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2902                                           "eCPRI over UDP layer is not yet supported right now");
2903         /* Mask for type field in common header could be zero. */
2904         if (!mask)
2905                 mask = &rte_flow_item_ecpri_mask;
2906         mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32);
2907         /* Input mask is in big-endian format. */
2908         if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff)
2909                 return rte_flow_error_set(error, EINVAL,
2910                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2911                                           "partial mask is not supported for protocol");
2912         else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0)
2913                 return rte_flow_error_set(error, EINVAL,
2914                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2915                                           "message header mask must be after a type mask");
2916         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2917                                          acc_mask ? (const uint8_t *)acc_mask
2918                                                   : (const uint8_t *)&nic_mask,
2919                                          sizeof(struct rte_flow_item_ecpri),
2920                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2921 }
2922
2923 /**
2924  * Release resource related QUEUE/RSS action split.
2925  *
2926  * @param dev
2927  *   Pointer to Ethernet device.
2928  * @param flow
2929  *   Flow to release id's from.
2930  */
2931 static void
2932 flow_mreg_split_qrss_release(struct rte_eth_dev *dev,
2933                              struct rte_flow *flow)
2934 {
2935         struct mlx5_priv *priv = dev->data->dev_private;
2936         uint32_t handle_idx;
2937         struct mlx5_flow_handle *dev_handle;
2938
2939         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
2940                        handle_idx, dev_handle, next)
2941                 if (dev_handle->split_flow_id)
2942                         mlx5_ipool_free(priv->sh->ipool
2943                                         [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
2944                                         dev_handle->split_flow_id);
2945 }
2946
2947 static int
2948 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
2949                    const struct rte_flow_attr *attr __rte_unused,
2950                    const struct rte_flow_item items[] __rte_unused,
2951                    const struct rte_flow_action actions[] __rte_unused,
2952                    bool external __rte_unused,
2953                    int hairpin __rte_unused,
2954                    struct rte_flow_error *error)
2955 {
2956         return rte_flow_error_set(error, ENOTSUP,
2957                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2958 }
2959
2960 static struct mlx5_flow *
2961 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
2962                   const struct rte_flow_attr *attr __rte_unused,
2963                   const struct rte_flow_item items[] __rte_unused,
2964                   const struct rte_flow_action actions[] __rte_unused,
2965                   struct rte_flow_error *error)
2966 {
2967         rte_flow_error_set(error, ENOTSUP,
2968                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2969         return NULL;
2970 }
2971
2972 static int
2973 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
2974                     struct mlx5_flow *dev_flow __rte_unused,
2975                     const struct rte_flow_attr *attr __rte_unused,
2976                     const struct rte_flow_item items[] __rte_unused,
2977                     const struct rte_flow_action actions[] __rte_unused,
2978                     struct rte_flow_error *error)
2979 {
2980         return rte_flow_error_set(error, ENOTSUP,
2981                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2982 }
2983
2984 static int
2985 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
2986                 struct rte_flow *flow __rte_unused,
2987                 struct rte_flow_error *error)
2988 {
2989         return rte_flow_error_set(error, ENOTSUP,
2990                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2991 }
2992
2993 static void
2994 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
2995                  struct rte_flow *flow __rte_unused)
2996 {
2997 }
2998
2999 static void
3000 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
3001                   struct rte_flow *flow __rte_unused)
3002 {
3003 }
3004
3005 static int
3006 flow_null_query(struct rte_eth_dev *dev __rte_unused,
3007                 struct rte_flow *flow __rte_unused,
3008                 const struct rte_flow_action *actions __rte_unused,
3009                 void *data __rte_unused,
3010                 struct rte_flow_error *error)
3011 {
3012         return rte_flow_error_set(error, ENOTSUP,
3013                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3014 }
3015
3016 static int
3017 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused,
3018                       uint32_t domains __rte_unused,
3019                       uint32_t flags __rte_unused)
3020 {
3021         return 0;
3022 }
3023
3024 /* Void driver to protect from null pointer reference. */
3025 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
3026         .validate = flow_null_validate,
3027         .prepare = flow_null_prepare,
3028         .translate = flow_null_translate,
3029         .apply = flow_null_apply,
3030         .remove = flow_null_remove,
3031         .destroy = flow_null_destroy,
3032         .query = flow_null_query,
3033         .sync_domain = flow_null_sync_domain,
3034 };
3035
3036 /**
3037  * Select flow driver type according to flow attributes and device
3038  * configuration.
3039  *
3040  * @param[in] dev
3041  *   Pointer to the dev structure.
3042  * @param[in] attr
3043  *   Pointer to the flow attributes.
3044  *
3045  * @return
3046  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
3047  */
3048 static enum mlx5_flow_drv_type
3049 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
3050 {
3051         struct mlx5_priv *priv = dev->data->dev_private;
3052         /* The OS can determine first a specific flow type (DV, VERBS) */
3053         enum mlx5_flow_drv_type type = mlx5_flow_os_get_type();
3054
3055         if (type != MLX5_FLOW_TYPE_MAX)
3056                 return type;
3057         /* If no OS specific type - continue with DV/VERBS selection */
3058         if (attr->transfer && priv->config.dv_esw_en)
3059                 type = MLX5_FLOW_TYPE_DV;
3060         if (!attr->transfer)
3061                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
3062                                                  MLX5_FLOW_TYPE_VERBS;
3063         return type;
3064 }
3065
3066 #define flow_get_drv_ops(type) flow_drv_ops[type]
3067
3068 /**
3069  * Flow driver validation API. This abstracts calling driver specific functions.
3070  * The type of flow driver is determined according to flow attributes.
3071  *
3072  * @param[in] dev
3073  *   Pointer to the dev structure.
3074  * @param[in] attr
3075  *   Pointer to the flow attributes.
3076  * @param[in] items
3077  *   Pointer to the list of items.
3078  * @param[in] actions
3079  *   Pointer to the list of actions.
3080  * @param[in] external
3081  *   This flow rule is created by request external to PMD.
3082  * @param[in] hairpin
3083  *   Number of hairpin TX actions, 0 means classic flow.
3084  * @param[out] error
3085  *   Pointer to the error structure.
3086  *
3087  * @return
3088  *   0 on success, a negative errno value otherwise and rte_errno is set.
3089  */
3090 static inline int
3091 flow_drv_validate(struct rte_eth_dev *dev,
3092                   const struct rte_flow_attr *attr,
3093                   const struct rte_flow_item items[],
3094                   const struct rte_flow_action actions[],
3095                   bool external, int hairpin, struct rte_flow_error *error)
3096 {
3097         const struct mlx5_flow_driver_ops *fops;
3098         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
3099
3100         fops = flow_get_drv_ops(type);
3101         return fops->validate(dev, attr, items, actions, external,
3102                               hairpin, error);
3103 }
3104
3105 /**
3106  * Flow driver preparation API. This abstracts calling driver specific
3107  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3108  * calculates the size of memory required for device flow, allocates the memory,
3109  * initializes the device flow and returns the pointer.
3110  *
3111  * @note
3112  *   This function initializes device flow structure such as dv or verbs in
3113  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
3114  *   rest. For example, adding returning device flow to flow->dev_flow list and
3115  *   setting backward reference to the flow should be done out of this function.
3116  *   layers field is not filled either.
3117  *
3118  * @param[in] dev
3119  *   Pointer to the dev structure.
3120  * @param[in] attr
3121  *   Pointer to the flow attributes.
3122  * @param[in] items
3123  *   Pointer to the list of items.
3124  * @param[in] actions
3125  *   Pointer to the list of actions.
3126  * @param[in] flow_idx
3127  *   This memory pool index to the flow.
3128  * @param[out] error
3129  *   Pointer to the error structure.
3130  *
3131  * @return
3132  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
3133  */
3134 static inline struct mlx5_flow *
3135 flow_drv_prepare(struct rte_eth_dev *dev,
3136                  const struct rte_flow *flow,
3137                  const struct rte_flow_attr *attr,
3138                  const struct rte_flow_item items[],
3139                  const struct rte_flow_action actions[],
3140                  uint32_t flow_idx,
3141                  struct rte_flow_error *error)
3142 {
3143         const struct mlx5_flow_driver_ops *fops;
3144         enum mlx5_flow_drv_type type = flow->drv_type;
3145         struct mlx5_flow *mlx5_flow = NULL;
3146
3147         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3148         fops = flow_get_drv_ops(type);
3149         mlx5_flow = fops->prepare(dev, attr, items, actions, error);
3150         if (mlx5_flow)
3151                 mlx5_flow->flow_idx = flow_idx;
3152         return mlx5_flow;
3153 }
3154
3155 /**
3156  * Flow driver translation API. This abstracts calling driver specific
3157  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3158  * translates a generic flow into a driver flow. flow_drv_prepare() must
3159  * precede.
3160  *
3161  * @note
3162  *   dev_flow->layers could be filled as a result of parsing during translation
3163  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
3164  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
3165  *   flow->actions could be overwritten even though all the expanded dev_flows
3166  *   have the same actions.
3167  *
3168  * @param[in] dev
3169  *   Pointer to the rte dev structure.
3170  * @param[in, out] dev_flow
3171  *   Pointer to the mlx5 flow.
3172  * @param[in] attr
3173  *   Pointer to the flow attributes.
3174  * @param[in] items
3175  *   Pointer to the list of items.
3176  * @param[in] actions
3177  *   Pointer to the list of actions.
3178  * @param[out] error
3179  *   Pointer to the error structure.
3180  *
3181  * @return
3182  *   0 on success, a negative errno value otherwise and rte_errno is set.
3183  */
3184 static inline int
3185 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
3186                    const struct rte_flow_attr *attr,
3187                    const struct rte_flow_item items[],
3188                    const struct rte_flow_action actions[],
3189                    struct rte_flow_error *error)
3190 {
3191         const struct mlx5_flow_driver_ops *fops;
3192         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
3193
3194         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3195         fops = flow_get_drv_ops(type);
3196         return fops->translate(dev, dev_flow, attr, items, actions, error);
3197 }
3198
3199 /**
3200  * Flow driver apply API. This abstracts calling driver specific functions.
3201  * Parent flow (rte_flow) should have driver type (drv_type). It applies
3202  * translated driver flows on to device. flow_drv_translate() must precede.
3203  *
3204  * @param[in] dev
3205  *   Pointer to Ethernet device structure.
3206  * @param[in, out] flow
3207  *   Pointer to flow structure.
3208  * @param[out] error
3209  *   Pointer to error structure.
3210  *
3211  * @return
3212  *   0 on success, a negative errno value otherwise and rte_errno is set.
3213  */
3214 static inline int
3215 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
3216                struct rte_flow_error *error)
3217 {
3218         const struct mlx5_flow_driver_ops *fops;
3219         enum mlx5_flow_drv_type type = flow->drv_type;
3220
3221         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3222         fops = flow_get_drv_ops(type);
3223         return fops->apply(dev, flow, error);
3224 }
3225
3226 /**
3227  * Flow driver destroy API. This abstracts calling driver specific functions.
3228  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
3229  * on device and releases resources of the flow.
3230  *
3231  * @param[in] dev
3232  *   Pointer to Ethernet device.
3233  * @param[in, out] flow
3234  *   Pointer to flow structure.
3235  */
3236 static inline void
3237 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
3238 {
3239         const struct mlx5_flow_driver_ops *fops;
3240         enum mlx5_flow_drv_type type = flow->drv_type;
3241
3242         flow_mreg_split_qrss_release(dev, flow);
3243         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3244         fops = flow_get_drv_ops(type);
3245         fops->destroy(dev, flow);
3246 }
3247
3248 /**
3249  * Get RSS action from the action list.
3250  *
3251  * @param[in] actions
3252  *   Pointer to the list of actions.
3253  *
3254  * @return
3255  *   Pointer to the RSS action if exist, else return NULL.
3256  */
3257 static const struct rte_flow_action_rss*
3258 flow_get_rss_action(const struct rte_flow_action actions[])
3259 {
3260         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3261                 switch (actions->type) {
3262                 case RTE_FLOW_ACTION_TYPE_RSS:
3263                         return (const struct rte_flow_action_rss *)
3264                                actions->conf;
3265                 default:
3266                         break;
3267                 }
3268         }
3269         return NULL;
3270 }
3271
3272 /**
3273  * Get ASO age action by index.
3274  *
3275  * @param[in] dev
3276  *   Pointer to the Ethernet device structure.
3277  * @param[in] age_idx
3278  *   Index to the ASO age action.
3279  *
3280  * @return
3281  *   The specified ASO age action.
3282  */
3283 struct mlx5_aso_age_action*
3284 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx)
3285 {
3286         uint16_t pool_idx = age_idx & UINT16_MAX;
3287         uint16_t offset = (age_idx >> 16) & UINT16_MAX;
3288         struct mlx5_priv *priv = dev->data->dev_private;
3289         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
3290         struct mlx5_aso_age_pool *pool = mng->pools[pool_idx];
3291
3292         return &pool->actions[offset - 1];
3293 }
3294
3295 /* maps shared action to translated non shared in some actions array */
3296 struct mlx5_translated_shared_action {
3297         struct rte_flow_shared_action *action; /**< Shared action */
3298         int index; /**< Index in related array of rte_flow_action */
3299 };
3300
3301 /**
3302  * Translates actions of type RTE_FLOW_ACTION_TYPE_SHARED to related
3303  * non shared action if translation possible.
3304  * This functionality used to run same execution path for both shared & non
3305  * shared actions on flow create. All necessary preparations for shared
3306  * action handling should be preformed on *shared* actions list returned
3307  * from this call.
3308  *
3309  * @param[in] dev
3310  *   Pointer to Ethernet device.
3311  * @param[in] actions
3312  *   List of actions to translate.
3313  * @param[out] shared
3314  *   List to store translated shared actions.
3315  * @param[in, out] shared_n
3316  *   Size of *shared* array. On return should be updated with number of shared
3317  *   actions retrieved from the *actions* list.
3318  * @param[out] translated_actions
3319  *   List of actions where all shared actions were translated to non shared
3320  *   if possible. NULL if no translation took place.
3321  * @param[out] error
3322  *   Pointer to the error structure.
3323  *
3324  * @return
3325  *   0 on success, a negative errno value otherwise and rte_errno is set.
3326  */
3327 static int
3328 flow_shared_actions_translate(struct rte_eth_dev *dev,
3329                               const struct rte_flow_action actions[],
3330                               struct mlx5_translated_shared_action *shared,
3331                               int *shared_n,
3332                               struct rte_flow_action **translated_actions,
3333                               struct rte_flow_error *error)
3334 {
3335         struct mlx5_priv *priv = dev->data->dev_private;
3336         struct rte_flow_action *translated = NULL;
3337         size_t actions_size;
3338         int n;
3339         int copied_n = 0;
3340         struct mlx5_translated_shared_action *shared_end = NULL;
3341
3342         for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
3343                 if (actions[n].type != RTE_FLOW_ACTION_TYPE_SHARED)
3344                         continue;
3345                 if (copied_n == *shared_n) {
3346                         return rte_flow_error_set
3347                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
3348                                  NULL, "too many shared actions");
3349                 }
3350                 rte_memcpy(&shared[copied_n].action, &actions[n].conf,
3351                            sizeof(actions[n].conf));
3352                 shared[copied_n].index = n;
3353                 copied_n++;
3354         }
3355         n++;
3356         *shared_n = copied_n;
3357         if (!copied_n)
3358                 return 0;
3359         actions_size = sizeof(struct rte_flow_action) * n;
3360         translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY);
3361         if (!translated) {
3362                 rte_errno = ENOMEM;
3363                 return -ENOMEM;
3364         }
3365         memcpy(translated, actions, actions_size);
3366         for (shared_end = shared + copied_n; shared < shared_end; shared++) {
3367                 struct mlx5_shared_action_rss *shared_rss;
3368                 uint32_t act_idx = (uint32_t)(uintptr_t)shared->action;
3369                 uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
3370                 uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET)
3371                                                                            - 1);
3372
3373                 switch (type) {
3374                 case MLX5_SHARED_ACTION_TYPE_RSS:
3375                         shared_rss = mlx5_ipool_get
3376                           (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
3377                         translated[shared->index].type =
3378                                 RTE_FLOW_ACTION_TYPE_RSS;
3379                         translated[shared->index].conf =
3380                                 &shared_rss->origin;
3381                         break;
3382                 case MLX5_SHARED_ACTION_TYPE_AGE:
3383                         if (priv->sh->flow_hit_aso_en) {
3384                                 translated[shared->index].type =
3385                                         (enum rte_flow_action_type)
3386                                         MLX5_RTE_FLOW_ACTION_TYPE_AGE;
3387                                 translated[shared->index].conf =
3388                                                          (void *)(uintptr_t)idx;
3389                                 break;
3390                         }
3391                         /* Fall-through */
3392                 default:
3393                         mlx5_free(translated);
3394                         return rte_flow_error_set
3395                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
3396                                  NULL, "invalid shared action type");
3397                 }
3398         }
3399         *translated_actions = translated;
3400         return 0;
3401 }
3402
3403 /**
3404  * Get Shared RSS action from the action list.
3405  *
3406  * @param[in] dev
3407  *   Pointer to Ethernet device.
3408  * @param[in] shared
3409  *   Pointer to the list of actions.
3410  * @param[in] shared_n
3411  *   Actions list length.
3412  *
3413  * @return
3414  *   The MLX5 RSS action ID if exists, otherwise return 0.
3415  */
3416 static uint32_t
3417 flow_get_shared_rss_action(struct rte_eth_dev *dev,
3418                            struct mlx5_translated_shared_action *shared,
3419                            int shared_n)
3420 {
3421         struct mlx5_translated_shared_action *shared_end;
3422         struct mlx5_priv *priv = dev->data->dev_private;
3423         struct mlx5_shared_action_rss *shared_rss;
3424
3425
3426         for (shared_end = shared + shared_n; shared < shared_end; shared++) {
3427                 uint32_t act_idx = (uint32_t)(uintptr_t)shared->action;
3428                 uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
3429                 uint32_t idx = act_idx &
3430                                    ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1);
3431                 switch (type) {
3432                 case MLX5_SHARED_ACTION_TYPE_RSS:
3433                         shared_rss = mlx5_ipool_get
3434                                 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
3435                                                                            idx);
3436                         __atomic_add_fetch(&shared_rss->refcnt, 1,
3437                                            __ATOMIC_RELAXED);
3438                         return idx;
3439                 default:
3440                         break;
3441                 }
3442         }
3443         return 0;
3444 }
3445
3446 static unsigned int
3447 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
3448 {
3449         const struct rte_flow_item *item;
3450         unsigned int has_vlan = 0;
3451
3452         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
3453                 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
3454                         has_vlan = 1;
3455                         break;
3456                 }
3457         }
3458         if (has_vlan)
3459                 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
3460                                        MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
3461         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
3462                                MLX5_EXPANSION_ROOT_OUTER;
3463 }
3464
3465 /**
3466  *  Get layer flags from the prefix flow.
3467  *
3468  *  Some flows may be split to several subflows, the prefix subflow gets the
3469  *  match items and the suffix sub flow gets the actions.
3470  *  Some actions need the user defined match item flags to get the detail for
3471  *  the action.
3472  *  This function helps the suffix flow to get the item layer flags from prefix
3473  *  subflow.
3474  *
3475  * @param[in] dev_flow
3476  *   Pointer the created preifx subflow.
3477  *
3478  * @return
3479  *   The layers get from prefix subflow.
3480  */
3481 static inline uint64_t
3482 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
3483 {
3484         uint64_t layers = 0;
3485
3486         /*
3487          * Layers bits could be localization, but usually the compiler will
3488          * help to do the optimization work for source code.
3489          * If no decap actions, use the layers directly.
3490          */
3491         if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP))
3492                 return dev_flow->handle->layers;
3493         /* Convert L3 layers with decap action. */
3494         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
3495                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3496         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
3497                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3498         /* Convert L4 layers with decap action.  */
3499         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
3500                 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
3501         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
3502                 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
3503         return layers;
3504 }
3505
3506 /**
3507  * Get metadata split action information.
3508  *
3509  * @param[in] actions
3510  *   Pointer to the list of actions.
3511  * @param[out] qrss
3512  *   Pointer to the return pointer.
3513  * @param[out] qrss_type
3514  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
3515  *   if no QUEUE/RSS is found.
3516  * @param[out] encap_idx
3517  *   Pointer to the index of the encap action if exists, otherwise the last
3518  *   action index.
3519  *
3520  * @return
3521  *   Total number of actions.
3522  */
3523 static int
3524 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
3525                                        const struct rte_flow_action **qrss,
3526                                        int *encap_idx)
3527 {
3528         const struct rte_flow_action_raw_encap *raw_encap;
3529         int actions_n = 0;
3530         int raw_decap_idx = -1;
3531
3532         *encap_idx = -1;
3533         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3534                 switch (actions->type) {
3535                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3536                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3537                         *encap_idx = actions_n;
3538                         break;
3539                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3540                         raw_decap_idx = actions_n;
3541                         break;
3542                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3543                         raw_encap = actions->conf;
3544                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3545                                 *encap_idx = raw_decap_idx != -1 ?
3546                                                       raw_decap_idx : actions_n;
3547                         break;
3548                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3549                 case RTE_FLOW_ACTION_TYPE_RSS:
3550                         *qrss = actions;
3551                         break;
3552                 default:
3553                         break;
3554                 }
3555                 actions_n++;
3556         }
3557         if (*encap_idx == -1)
3558                 *encap_idx = actions_n;
3559         /* Count RTE_FLOW_ACTION_TYPE_END. */
3560         return actions_n + 1;
3561 }
3562
3563 /**
3564  * Check meter action from the action list.
3565  *
3566  * @param[in] actions
3567  *   Pointer to the list of actions.
3568  * @param[out] mtr
3569  *   Pointer to the meter exist flag.
3570  *
3571  * @return
3572  *   Total number of actions.
3573  */
3574 static int
3575 flow_check_meter_action(const struct rte_flow_action actions[], uint32_t *mtr)
3576 {
3577         int actions_n = 0;
3578
3579         MLX5_ASSERT(mtr);
3580         *mtr = 0;
3581         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3582                 switch (actions->type) {
3583                 case RTE_FLOW_ACTION_TYPE_METER:
3584                         *mtr = 1;
3585                         break;
3586                 default:
3587                         break;
3588                 }
3589                 actions_n++;
3590         }
3591         /* Count RTE_FLOW_ACTION_TYPE_END. */
3592         return actions_n + 1;
3593 }
3594
3595 /**
3596  * Check if the flow should be split due to hairpin.
3597  * The reason for the split is that in current HW we can't
3598  * support encap and push-vlan on Rx, so if a flow contains
3599  * these actions we move it to Tx.
3600  *
3601  * @param dev
3602  *   Pointer to Ethernet device.
3603  * @param[in] attr
3604  *   Flow rule attributes.
3605  * @param[in] actions
3606  *   Associated actions (list terminated by the END action).
3607  *
3608  * @return
3609  *   > 0 the number of actions and the flow should be split,
3610  *   0 when no split required.
3611  */
3612 static int
3613 flow_check_hairpin_split(struct rte_eth_dev *dev,
3614                          const struct rte_flow_attr *attr,
3615                          const struct rte_flow_action actions[])
3616 {
3617         int queue_action = 0;
3618         int action_n = 0;
3619         int split = 0;
3620         const struct rte_flow_action_queue *queue;
3621         const struct rte_flow_action_rss *rss;
3622         const struct rte_flow_action_raw_encap *raw_encap;
3623         const struct rte_eth_hairpin_conf *conf;
3624
3625         if (!attr->ingress)
3626                 return 0;
3627         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3628                 switch (actions->type) {
3629                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3630                         queue = actions->conf;
3631                         if (queue == NULL)
3632                                 return 0;
3633                         conf = mlx5_rxq_get_hairpin_conf(dev, queue->index);
3634                         if (conf != NULL && !!conf->tx_explicit)
3635                                 return 0;
3636                         queue_action = 1;
3637                         action_n++;
3638                         break;
3639                 case RTE_FLOW_ACTION_TYPE_RSS:
3640                         rss = actions->conf;
3641                         if (rss == NULL || rss->queue_num == 0)
3642                                 return 0;
3643                         conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]);
3644                         if (conf != NULL && !!conf->tx_explicit)
3645                                 return 0;
3646                         queue_action = 1;
3647                         action_n++;
3648                         break;
3649                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3650                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3651                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3652                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3653                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
3654                         split++;
3655                         action_n++;
3656                         break;
3657                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3658                         raw_encap = actions->conf;
3659                         if (raw_encap->size >
3660                             (sizeof(struct rte_flow_item_eth) +
3661                              sizeof(struct rte_flow_item_ipv4)))
3662                                 split++;
3663                         action_n++;
3664                         break;
3665                 default:
3666                         action_n++;
3667                         break;
3668                 }
3669         }
3670         if (split && queue_action)
3671                 return action_n;
3672         return 0;
3673 }
3674
3675 /* Declare flow create/destroy prototype in advance. */
3676 static uint32_t
3677 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
3678                  const struct rte_flow_attr *attr,
3679                  const struct rte_flow_item items[],
3680                  const struct rte_flow_action actions[],
3681                  bool external, struct rte_flow_error *error);
3682
3683 static void
3684 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
3685                   uint32_t flow_idx);
3686
3687 struct mlx5_hlist_entry *
3688 flow_dv_mreg_create_cb(struct mlx5_hlist *list, uint64_t key,
3689                        void *cb_ctx)
3690 {
3691         struct rte_eth_dev *dev = list->ctx;
3692         struct mlx5_priv *priv = dev->data->dev_private;
3693         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3694         struct mlx5_flow_mreg_copy_resource *mcp_res;
3695         struct rte_flow_error *error = ctx->error;
3696         uint32_t idx = 0;
3697         int ret;
3698         uint32_t mark_id = key;
3699         struct rte_flow_attr attr = {
3700                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
3701                 .ingress = 1,
3702         };
3703         struct mlx5_rte_flow_item_tag tag_spec = {
3704                 .data = mark_id,
3705         };
3706         struct rte_flow_item items[] = {
3707                 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
3708         };
3709         struct rte_flow_action_mark ftag = {
3710                 .id = mark_id,
3711         };
3712         struct mlx5_flow_action_copy_mreg cp_mreg = {
3713                 .dst = REG_B,
3714                 .src = REG_NON,
3715         };
3716         struct rte_flow_action_jump jump = {
3717                 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
3718         };
3719         struct rte_flow_action actions[] = {
3720                 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
3721         };
3722
3723         /* Fill the register fileds in the flow. */
3724         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3725         if (ret < 0)
3726                 return NULL;
3727         tag_spec.id = ret;
3728         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
3729         if (ret < 0)
3730                 return NULL;
3731         cp_mreg.src = ret;
3732         /* Provide the full width of FLAG specific value. */
3733         if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
3734                 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
3735         /* Build a new flow. */
3736         if (mark_id != MLX5_DEFAULT_COPY_ID) {
3737                 items[0] = (struct rte_flow_item){
3738                         .type = (enum rte_flow_item_type)
3739                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
3740                         .spec = &tag_spec,
3741                 };
3742                 items[1] = (struct rte_flow_item){
3743                         .type = RTE_FLOW_ITEM_TYPE_END,
3744                 };
3745                 actions[0] = (struct rte_flow_action){
3746                         .type = (enum rte_flow_action_type)
3747                                 MLX5_RTE_FLOW_ACTION_TYPE_MARK,
3748                         .conf = &ftag,
3749                 };
3750                 actions[1] = (struct rte_flow_action){
3751                         .type = (enum rte_flow_action_type)
3752                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3753                         .conf = &cp_mreg,
3754                 };
3755                 actions[2] = (struct rte_flow_action){
3756                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
3757                         .conf = &jump,
3758                 };
3759                 actions[3] = (struct rte_flow_action){
3760                         .type = RTE_FLOW_ACTION_TYPE_END,
3761                 };
3762         } else {
3763                 /* Default rule, wildcard match. */
3764                 attr.priority = MLX5_FLOW_PRIO_RSVD;
3765                 items[0] = (struct rte_flow_item){
3766                         .type = RTE_FLOW_ITEM_TYPE_END,
3767                 };
3768                 actions[0] = (struct rte_flow_action){
3769                         .type = (enum rte_flow_action_type)
3770                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3771                         .conf = &cp_mreg,
3772                 };
3773                 actions[1] = (struct rte_flow_action){
3774                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
3775                         .conf = &jump,
3776                 };
3777                 actions[2] = (struct rte_flow_action){
3778                         .type = RTE_FLOW_ACTION_TYPE_END,
3779                 };
3780         }
3781         /* Build a new entry. */
3782         mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
3783         if (!mcp_res) {
3784                 rte_errno = ENOMEM;
3785                 return NULL;
3786         }
3787         mcp_res->idx = idx;
3788         /*
3789          * The copy Flows are not included in any list. There
3790          * ones are referenced from other Flows and can not
3791          * be applied, removed, deleted in ardbitrary order
3792          * by list traversing.
3793          */
3794         mcp_res->rix_flow = flow_list_create(dev, NULL, &attr, items,
3795                                          actions, false, error);
3796         if (!mcp_res->rix_flow) {
3797                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx);
3798                 return NULL;
3799         }
3800         return &mcp_res->hlist_ent;
3801 }
3802
3803 /**
3804  * Add a flow of copying flow metadata registers in RX_CP_TBL.
3805  *
3806  * As mark_id is unique, if there's already a registered flow for the mark_id,
3807  * return by increasing the reference counter of the resource. Otherwise, create
3808  * the resource (mcp_res) and flow.
3809  *
3810  * Flow looks like,
3811  *   - If ingress port is ANY and reg_c[1] is mark_id,
3812  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3813  *
3814  * For default flow (zero mark_id), flow is like,
3815  *   - If ingress port is ANY,
3816  *     reg_b := reg_c[0] and jump to RX_ACT_TBL.
3817  *
3818  * @param dev
3819  *   Pointer to Ethernet device.
3820  * @param mark_id
3821  *   ID of MARK action, zero means default flow for META.
3822  * @param[out] error
3823  *   Perform verbose error reporting if not NULL.
3824  *
3825  * @return
3826  *   Associated resource on success, NULL otherwise and rte_errno is set.
3827  */
3828 static struct mlx5_flow_mreg_copy_resource *
3829 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
3830                           struct rte_flow_error *error)
3831 {
3832         struct mlx5_priv *priv = dev->data->dev_private;
3833         struct mlx5_hlist_entry *entry;
3834         struct mlx5_flow_cb_ctx ctx = {
3835                 .dev = dev,
3836                 .error = error,
3837         };
3838
3839         /* Check if already registered. */
3840         MLX5_ASSERT(priv->mreg_cp_tbl);
3841         entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx);
3842         if (!entry)
3843                 return NULL;
3844         return container_of(entry, struct mlx5_flow_mreg_copy_resource,
3845                             hlist_ent);
3846 }
3847
3848 void
3849 flow_dv_mreg_remove_cb(struct mlx5_hlist *list, struct mlx5_hlist_entry *entry)
3850 {
3851         struct mlx5_flow_mreg_copy_resource *mcp_res =
3852                 container_of(entry, typeof(*mcp_res), hlist_ent);
3853         struct rte_eth_dev *dev = list->ctx;
3854         struct mlx5_priv *priv = dev->data->dev_private;
3855
3856         MLX5_ASSERT(mcp_res->rix_flow);
3857         flow_list_destroy(dev, NULL, mcp_res->rix_flow);
3858         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
3859 }
3860
3861 /**
3862  * Release flow in RX_CP_TBL.
3863  *
3864  * @param dev
3865  *   Pointer to Ethernet device.
3866  * @flow
3867  *   Parent flow for wich copying is provided.
3868  */
3869 static void
3870 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
3871                           struct rte_flow *flow)
3872 {
3873         struct mlx5_flow_mreg_copy_resource *mcp_res;
3874         struct mlx5_priv *priv = dev->data->dev_private;
3875
3876         if (!flow->rix_mreg_copy)
3877                 return;
3878         mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
3879                                  flow->rix_mreg_copy);
3880         if (!mcp_res || !priv->mreg_cp_tbl)
3881                 return;
3882         MLX5_ASSERT(mcp_res->rix_flow);
3883         mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
3884         flow->rix_mreg_copy = 0;
3885 }
3886
3887 /**
3888  * Remove the default copy action from RX_CP_TBL.
3889  *
3890  * This functions is called in the mlx5_dev_start(). No thread safe
3891  * is guaranteed.
3892  *
3893  * @param dev
3894  *   Pointer to Ethernet device.
3895  */
3896 static void
3897 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
3898 {
3899         struct mlx5_hlist_entry *entry;
3900         struct mlx5_priv *priv = dev->data->dev_private;
3901
3902         /* Check if default flow is registered. */
3903         if (!priv->mreg_cp_tbl)
3904                 return;
3905         entry = mlx5_hlist_lookup(priv->mreg_cp_tbl,
3906                                   MLX5_DEFAULT_COPY_ID, NULL);
3907         if (!entry)
3908                 return;
3909         mlx5_hlist_unregister(priv->mreg_cp_tbl, entry);
3910 }
3911
3912 /**
3913  * Add the default copy action in in RX_CP_TBL.
3914  *
3915  * This functions is called in the mlx5_dev_start(). No thread safe
3916  * is guaranteed.
3917  *
3918  * @param dev
3919  *   Pointer to Ethernet device.
3920  * @param[out] error
3921  *   Perform verbose error reporting if not NULL.
3922  *
3923  * @return
3924  *   0 for success, negative value otherwise and rte_errno is set.
3925  */
3926 static int
3927 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
3928                                   struct rte_flow_error *error)
3929 {
3930         struct mlx5_priv *priv = dev->data->dev_private;
3931         struct mlx5_flow_mreg_copy_resource *mcp_res;
3932
3933         /* Check whether extensive metadata feature is engaged. */
3934         if (!priv->config.dv_flow_en ||
3935             priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3936             !mlx5_flow_ext_mreg_supported(dev) ||
3937             !priv->sh->dv_regc0_mask)
3938                 return 0;
3939         /*
3940          * Add default mreg copy flow may be called multiple time, but
3941          * only be called once in stop. Avoid register it twice.
3942          */
3943         if (mlx5_hlist_lookup(priv->mreg_cp_tbl, MLX5_DEFAULT_COPY_ID, NULL))
3944                 return 0;
3945         mcp_res = flow_mreg_add_copy_action(dev, MLX5_DEFAULT_COPY_ID, error);
3946         if (!mcp_res)
3947                 return -rte_errno;
3948         return 0;
3949 }
3950
3951 /**
3952  * Add a flow of copying flow metadata registers in RX_CP_TBL.
3953  *
3954  * All the flow having Q/RSS action should be split by
3955  * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
3956  * performs the following,
3957  *   - CQE->flow_tag := reg_c[1] (MARK)
3958  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
3959  * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
3960  * but there should be a flow per each MARK ID set by MARK action.
3961  *
3962  * For the aforementioned reason, if there's a MARK action in flow's action
3963  * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
3964  * the MARK ID to CQE's flow_tag like,
3965  *   - If reg_c[1] is mark_id,
3966  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3967  *
3968  * For SET_META action which stores value in reg_c[0], as the destination is
3969  * also a flow metadata register (reg_b), adding a default flow is enough. Zero
3970  * MARK ID means the default flow. The default flow looks like,
3971  *   - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3972  *
3973  * @param dev
3974  *   Pointer to Ethernet device.
3975  * @param flow
3976  *   Pointer to flow structure.
3977  * @param[in] actions
3978  *   Pointer to the list of actions.
3979  * @param[out] error
3980  *   Perform verbose error reporting if not NULL.
3981  *
3982  * @return
3983  *   0 on success, negative value otherwise and rte_errno is set.
3984  */
3985 static int
3986 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
3987                             struct rte_flow *flow,
3988                             const struct rte_flow_action *actions,
3989                             struct rte_flow_error *error)
3990 {
3991         struct mlx5_priv *priv = dev->data->dev_private;
3992         struct mlx5_dev_config *config = &priv->config;
3993         struct mlx5_flow_mreg_copy_resource *mcp_res;
3994         const struct rte_flow_action_mark *mark;
3995
3996         /* Check whether extensive metadata feature is engaged. */
3997         if (!config->dv_flow_en ||
3998             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3999             !mlx5_flow_ext_mreg_supported(dev) ||
4000             !priv->sh->dv_regc0_mask)
4001                 return 0;
4002         /* Find MARK action. */
4003         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4004                 switch (actions->type) {
4005                 case RTE_FLOW_ACTION_TYPE_FLAG:
4006                         mcp_res = flow_mreg_add_copy_action
4007                                 (dev, MLX5_FLOW_MARK_DEFAULT, error);
4008                         if (!mcp_res)
4009                                 return -rte_errno;
4010                         flow->rix_mreg_copy = mcp_res->idx;
4011                         return 0;
4012                 case RTE_FLOW_ACTION_TYPE_MARK:
4013                         mark = (const struct rte_flow_action_mark *)
4014                                 actions->conf;
4015                         mcp_res =
4016                                 flow_mreg_add_copy_action(dev, mark->id, error);
4017                         if (!mcp_res)
4018                                 return -rte_errno;
4019                         flow->rix_mreg_copy = mcp_res->idx;
4020                         return 0;
4021                 default:
4022                         break;
4023                 }
4024         }
4025         return 0;
4026 }
4027
4028 #define MLX5_MAX_SPLIT_ACTIONS 24
4029 #define MLX5_MAX_SPLIT_ITEMS 24
4030
4031 /**
4032  * Split the hairpin flow.
4033  * Since HW can't support encap and push-vlan on Rx, we move these
4034  * actions to Tx.
4035  * If the count action is after the encap then we also
4036  * move the count action. in this case the count will also measure
4037  * the outer bytes.
4038  *
4039  * @param dev
4040  *   Pointer to Ethernet device.
4041  * @param[in] actions
4042  *   Associated actions (list terminated by the END action).
4043  * @param[out] actions_rx
4044  *   Rx flow actions.
4045  * @param[out] actions_tx
4046  *   Tx flow actions..
4047  * @param[out] pattern_tx
4048  *   The pattern items for the Tx flow.
4049  * @param[out] flow_id
4050  *   The flow ID connected to this flow.
4051  *
4052  * @return
4053  *   0 on success.
4054  */
4055 static int
4056 flow_hairpin_split(struct rte_eth_dev *dev,
4057                    const struct rte_flow_action actions[],
4058                    struct rte_flow_action actions_rx[],
4059                    struct rte_flow_action actions_tx[],
4060                    struct rte_flow_item pattern_tx[],
4061                    uint32_t flow_id)
4062 {
4063         const struct rte_flow_action_raw_encap *raw_encap;
4064         const struct rte_flow_action_raw_decap *raw_decap;
4065         struct mlx5_rte_flow_action_set_tag *set_tag;
4066         struct rte_flow_action *tag_action;
4067         struct mlx5_rte_flow_item_tag *tag_item;
4068         struct rte_flow_item *item;
4069         char *addr;
4070         int encap = 0;
4071
4072         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4073                 switch (actions->type) {
4074                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4075                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4076                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4077                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4078                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4079                         rte_memcpy(actions_tx, actions,
4080                                sizeof(struct rte_flow_action));
4081                         actions_tx++;
4082                         break;
4083                 case RTE_FLOW_ACTION_TYPE_COUNT:
4084                         if (encap) {
4085                                 rte_memcpy(actions_tx, actions,
4086                                            sizeof(struct rte_flow_action));
4087                                 actions_tx++;
4088                         } else {
4089                                 rte_memcpy(actions_rx, actions,
4090                                            sizeof(struct rte_flow_action));
4091                                 actions_rx++;
4092                         }
4093                         break;
4094                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4095                         raw_encap = actions->conf;
4096                         if (raw_encap->size >
4097                             (sizeof(struct rte_flow_item_eth) +
4098                              sizeof(struct rte_flow_item_ipv4))) {
4099                                 memcpy(actions_tx, actions,
4100                                        sizeof(struct rte_flow_action));
4101                                 actions_tx++;
4102                                 encap = 1;
4103                         } else {
4104                                 rte_memcpy(actions_rx, actions,
4105                                            sizeof(struct rte_flow_action));
4106                                 actions_rx++;
4107                         }
4108                         break;
4109                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4110                         raw_decap = actions->conf;
4111                         if (raw_decap->size <
4112                             (sizeof(struct rte_flow_item_eth) +
4113                              sizeof(struct rte_flow_item_ipv4))) {
4114                                 memcpy(actions_tx, actions,
4115                                        sizeof(struct rte_flow_action));
4116                                 actions_tx++;
4117                         } else {
4118                                 rte_memcpy(actions_rx, actions,
4119                                            sizeof(struct rte_flow_action));
4120                                 actions_rx++;
4121                         }
4122                         break;
4123                 default:
4124                         rte_memcpy(actions_rx, actions,
4125                                    sizeof(struct rte_flow_action));
4126                         actions_rx++;
4127                         break;
4128                 }
4129         }
4130         /* Add set meta action and end action for the Rx flow. */
4131         tag_action = actions_rx;
4132         tag_action->type = (enum rte_flow_action_type)
4133                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4134         actions_rx++;
4135         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
4136         actions_rx++;
4137         set_tag = (void *)actions_rx;
4138         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL);
4139         MLX5_ASSERT(set_tag->id > REG_NON);
4140         set_tag->data = flow_id;
4141         tag_action->conf = set_tag;
4142         /* Create Tx item list. */
4143         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
4144         addr = (void *)&pattern_tx[2];
4145         item = pattern_tx;
4146         item->type = (enum rte_flow_item_type)
4147                      MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4148         tag_item = (void *)addr;
4149         tag_item->data = flow_id;
4150         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
4151         MLX5_ASSERT(set_tag->id > REG_NON);
4152         item->spec = tag_item;
4153         addr += sizeof(struct mlx5_rte_flow_item_tag);
4154         tag_item = (void *)addr;
4155         tag_item->data = UINT32_MAX;
4156         tag_item->id = UINT16_MAX;
4157         item->mask = tag_item;
4158         item->last = NULL;
4159         item++;
4160         item->type = RTE_FLOW_ITEM_TYPE_END;
4161         return 0;
4162 }
4163
4164 __extension__
4165 union tunnel_offload_mark {
4166         uint32_t val;
4167         struct {
4168                 uint32_t app_reserve:8;
4169                 uint32_t table_id:15;
4170                 uint32_t transfer:1;
4171                 uint32_t _unused_:8;
4172         };
4173 };
4174
4175 struct tunnel_default_miss_ctx {
4176         uint16_t *queue;
4177         __extension__
4178         union {
4179                 struct rte_flow_action_rss action_rss;
4180                 struct rte_flow_action_queue miss_queue;
4181                 struct rte_flow_action_jump miss_jump;
4182                 uint8_t raw[0];
4183         };
4184 };
4185
4186 static int
4187 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
4188                              struct rte_flow *flow,
4189                              const struct rte_flow_attr *attr,
4190                              const struct rte_flow_action *app_actions,
4191                              uint32_t flow_idx,
4192                              struct tunnel_default_miss_ctx *ctx,
4193                              struct rte_flow_error *error)
4194 {
4195         struct mlx5_priv *priv = dev->data->dev_private;
4196         struct mlx5_flow *dev_flow;
4197         struct rte_flow_attr miss_attr = *attr;
4198         const struct mlx5_flow_tunnel *tunnel = app_actions[0].conf;
4199         const struct rte_flow_item miss_items[2] = {
4200                 {
4201                         .type = RTE_FLOW_ITEM_TYPE_ETH,
4202                         .spec = NULL,
4203                         .last = NULL,
4204                         .mask = NULL
4205                 },
4206                 {
4207                         .type = RTE_FLOW_ITEM_TYPE_END,
4208                         .spec = NULL,
4209                         .last = NULL,
4210                         .mask = NULL
4211                 }
4212         };
4213         union tunnel_offload_mark mark_id;
4214         struct rte_flow_action_mark miss_mark;
4215         struct rte_flow_action miss_actions[3] = {
4216                 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark },
4217                 [2] = { .type = RTE_FLOW_ACTION_TYPE_END,  .conf = NULL }
4218         };
4219         const struct rte_flow_action_jump *jump_data;
4220         uint32_t i, flow_table = 0; /* prevent compilation warning */
4221         struct flow_grp_info grp_info = {
4222                 .external = 1,
4223                 .transfer = attr->transfer,
4224                 .fdb_def_rule = !!priv->fdb_def_rule,
4225                 .std_tbl_fix = 0,
4226         };
4227         int ret;
4228
4229         if (!attr->transfer) {
4230                 uint32_t q_size;
4231
4232                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS;
4233                 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]);
4234                 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size,
4235                                          0, SOCKET_ID_ANY);
4236                 if (!ctx->queue)
4237                         return rte_flow_error_set
4238                                 (error, ENOMEM,
4239                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4240                                 NULL, "invalid default miss RSS");
4241                 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT,
4242                 ctx->action_rss.level = 0,
4243                 ctx->action_rss.types = priv->rss_conf.rss_hf,
4244                 ctx->action_rss.key_len = priv->rss_conf.rss_key_len,
4245                 ctx->action_rss.queue_num = priv->reta_idx_n,
4246                 ctx->action_rss.key = priv->rss_conf.rss_key,
4247                 ctx->action_rss.queue = ctx->queue;
4248                 if (!priv->reta_idx_n || !priv->rxqs_n)
4249                         return rte_flow_error_set
4250                                 (error, EINVAL,
4251                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4252                                 NULL, "invalid port configuration");
4253                 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
4254                         ctx->action_rss.types = 0;
4255                 for (i = 0; i != priv->reta_idx_n; ++i)
4256                         ctx->queue[i] = (*priv->reta_idx)[i];
4257         } else {
4258                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP;
4259                 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP;
4260         }
4261         miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw;
4262         for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++);
4263         jump_data = app_actions->conf;
4264         miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY;
4265         miss_attr.group = jump_data->group;
4266         ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group,
4267                                        &flow_table, grp_info, error);
4268         if (ret)
4269                 return rte_flow_error_set(error, EINVAL,
4270                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4271                                           NULL, "invalid tunnel id");
4272         mark_id.app_reserve = 0;
4273         mark_id.table_id = tunnel_flow_tbl_to_id(flow_table);
4274         mark_id.transfer = !!attr->transfer;
4275         mark_id._unused_ = 0;
4276         miss_mark.id = mark_id.val;
4277         dev_flow = flow_drv_prepare(dev, flow, &miss_attr,
4278                                     miss_items, miss_actions, flow_idx, error);
4279         if (!dev_flow)
4280                 return -rte_errno;
4281         dev_flow->flow = flow;
4282         dev_flow->external = true;
4283         dev_flow->tunnel = tunnel;
4284         /* Subflow object was created, we must include one in the list. */
4285         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4286                       dev_flow->handle, next);
4287         DRV_LOG(DEBUG,
4288                 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u",
4289                 dev->data->port_id, tunnel->app_tunnel.type,
4290                 tunnel->tunnel_id, miss_attr.priority, miss_attr.group);
4291         ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items,
4292                                   miss_actions, error);
4293         if (!ret)
4294                 ret = flow_mreg_update_copy_table(dev, flow, miss_actions,
4295                                                   error);
4296
4297         return ret;
4298 }
4299
4300 /**
4301  * The last stage of splitting chain, just creates the subflow
4302  * without any modification.
4303  *
4304  * @param[in] dev
4305  *   Pointer to Ethernet device.
4306  * @param[in] flow
4307  *   Parent flow structure pointer.
4308  * @param[in, out] sub_flow
4309  *   Pointer to return the created subflow, may be NULL.
4310  * @param[in] attr
4311  *   Flow rule attributes.
4312  * @param[in] items
4313  *   Pattern specification (list terminated by the END pattern item).
4314  * @param[in] actions
4315  *   Associated actions (list terminated by the END action).
4316  * @param[in] flow_split_info
4317  *   Pointer to flow split info structure.
4318  * @param[out] error
4319  *   Perform verbose error reporting if not NULL.
4320  * @return
4321  *   0 on success, negative value otherwise
4322  */
4323 static int
4324 flow_create_split_inner(struct rte_eth_dev *dev,
4325                         struct rte_flow *flow,
4326                         struct mlx5_flow **sub_flow,
4327                         const struct rte_flow_attr *attr,
4328                         const struct rte_flow_item items[],
4329                         const struct rte_flow_action actions[],
4330                         struct mlx5_flow_split_info *flow_split_info,
4331                         struct rte_flow_error *error)
4332 {
4333         struct mlx5_flow *dev_flow;
4334
4335         dev_flow = flow_drv_prepare(dev, flow, attr, items, actions,
4336                                     flow_split_info->flow_idx, error);
4337         if (!dev_flow)
4338                 return -rte_errno;
4339         dev_flow->flow = flow;
4340         dev_flow->external = flow_split_info->external;
4341         dev_flow->skip_scale = flow_split_info->skip_scale;
4342         /* Subflow object was created, we must include one in the list. */
4343         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4344                       dev_flow->handle, next);
4345         /*
4346          * If dev_flow is as one of the suffix flow, some actions in suffix
4347          * flow may need some user defined item layer flags, and pass the
4348          * Metadate rxq mark flag to suffix flow as well.
4349          */
4350         if (flow_split_info->prefix_layers)
4351                 dev_flow->handle->layers = flow_split_info->prefix_layers;
4352         if (flow_split_info->prefix_mark)
4353                 dev_flow->handle->mark = 1;
4354         if (sub_flow)
4355                 *sub_flow = dev_flow;
4356         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
4357 }
4358
4359 /**
4360  * Split the meter flow.
4361  *
4362  * As meter flow will split to three sub flow, other than meter
4363  * action, the other actions make sense to only meter accepts
4364  * the packet. If it need to be dropped, no other additional
4365  * actions should be take.
4366  *
4367  * One kind of special action which decapsulates the L3 tunnel
4368  * header will be in the prefix sub flow, as not to take the
4369  * L3 tunnel header into account.
4370  *
4371  * @param dev
4372  *   Pointer to Ethernet device.
4373  * @param[in] items
4374  *   Pattern specification (list terminated by the END pattern item).
4375  * @param[out] sfx_items
4376  *   Suffix flow match items (list terminated by the END pattern item).
4377  * @param[in] actions
4378  *   Associated actions (list terminated by the END action).
4379  * @param[out] actions_sfx
4380  *   Suffix flow actions.
4381  * @param[out] actions_pre
4382  *   Prefix flow actions.
4383  * @param[out] pattern_sfx
4384  *   The pattern items for the suffix flow.
4385  * @param[out] tag_sfx
4386  *   Pointer to suffix flow tag.
4387  *
4388  * @return
4389  *   0 on success.
4390  */
4391 static int
4392 flow_meter_split_prep(struct rte_eth_dev *dev,
4393                  const struct rte_flow_item items[],
4394                  struct rte_flow_item sfx_items[],
4395                  const struct rte_flow_action actions[],
4396                  struct rte_flow_action actions_sfx[],
4397                  struct rte_flow_action actions_pre[])
4398 {
4399         struct mlx5_priv *priv = dev->data->dev_private;
4400         struct rte_flow_action *tag_action = NULL;
4401         struct rte_flow_item *tag_item;
4402         struct mlx5_rte_flow_action_set_tag *set_tag;
4403         struct rte_flow_error error;
4404         const struct rte_flow_action_raw_encap *raw_encap;
4405         const struct rte_flow_action_raw_decap *raw_decap;
4406         struct mlx5_rte_flow_item_tag *tag_spec;
4407         struct mlx5_rte_flow_item_tag *tag_mask;
4408         uint32_t tag_id = 0;
4409         bool copy_vlan = false;
4410
4411         /* Prepare the actions for prefix and suffix flow. */
4412         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4413                 struct rte_flow_action **action_cur = NULL;
4414
4415                 switch (actions->type) {
4416                 case RTE_FLOW_ACTION_TYPE_METER:
4417                         /* Add the extra tag action first. */
4418                         tag_action = actions_pre;
4419                         tag_action->type = (enum rte_flow_action_type)
4420                                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4421                         actions_pre++;
4422                         action_cur = &actions_pre;
4423                         break;
4424                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4425                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4426                         action_cur = &actions_pre;
4427                         break;
4428                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4429                         raw_encap = actions->conf;
4430                         if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
4431                                 action_cur = &actions_pre;
4432                         break;
4433                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4434                         raw_decap = actions->conf;
4435                         if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4436                                 action_cur = &actions_pre;
4437                         break;
4438                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4439                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4440                         copy_vlan = true;
4441                         break;
4442                 default:
4443                         break;
4444                 }
4445                 if (!action_cur)
4446                         action_cur = &actions_sfx;
4447                 memcpy(*action_cur, actions, sizeof(struct rte_flow_action));
4448                 (*action_cur)++;
4449         }
4450         /* Add end action to the actions. */
4451         actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
4452         actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
4453         actions_pre++;
4454         /* Set the tag. */
4455         set_tag = (void *)actions_pre;
4456         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
4457         mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
4458                           &tag_id);
4459         if (tag_id >= (1 << (sizeof(tag_id) * 8 - MLX5_MTR_COLOR_BITS))) {
4460                 DRV_LOG(ERR, "Port %u meter flow id exceed max limit.",
4461                         dev->data->port_id);
4462                 mlx5_ipool_free(priv->sh->ipool
4463                                 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], tag_id);
4464                 return 0;
4465         } else if (!tag_id) {
4466                 return 0;
4467         }
4468         set_tag->data = tag_id << MLX5_MTR_COLOR_BITS;
4469         assert(tag_action);
4470         tag_action->conf = set_tag;
4471         /* Prepare the suffix subflow items. */
4472         tag_item = sfx_items++;
4473         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4474                 int item_type = items->type;
4475
4476                 switch (item_type) {
4477                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4478                         memcpy(sfx_items, items, sizeof(*sfx_items));
4479                         sfx_items++;
4480                         break;
4481                 case RTE_FLOW_ITEM_TYPE_VLAN:
4482                         if (copy_vlan) {
4483                                 memcpy(sfx_items, items, sizeof(*sfx_items));
4484                                 /*
4485                                  * Convert to internal match item, it is used
4486                                  * for vlan push and set vid.
4487                                  */
4488                                 sfx_items->type = (enum rte_flow_item_type)
4489                                                   MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
4490                                 sfx_items++;
4491                         }
4492                         break;
4493                 default:
4494                         break;
4495                 }
4496         }
4497         sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
4498         sfx_items++;
4499         tag_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
4500         tag_spec->data = tag_id << MLX5_MTR_COLOR_BITS;
4501         tag_spec->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
4502         tag_mask = tag_spec + 1;
4503         tag_mask->data = 0xffffff00;
4504         tag_item->type = (enum rte_flow_item_type)
4505                          MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4506         tag_item->spec = tag_spec;
4507         tag_item->last = NULL;
4508         tag_item->mask = tag_mask;
4509         return tag_id;
4510 }
4511
4512 /**
4513  * Split action list having QUEUE/RSS for metadata register copy.
4514  *
4515  * Once Q/RSS action is detected in user's action list, the flow action
4516  * should be split in order to copy metadata registers, which will happen in
4517  * RX_CP_TBL like,
4518  *   - CQE->flow_tag := reg_c[1] (MARK)
4519  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4520  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
4521  * This is because the last action of each flow must be a terminal action
4522  * (QUEUE, RSS or DROP).
4523  *
4524  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
4525  * stored and kept in the mlx5_flow structure per each sub_flow.
4526  *
4527  * The Q/RSS action is replaced with,
4528  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
4529  * And the following JUMP action is added at the end,
4530  *   - JUMP, to RX_CP_TBL.
4531  *
4532  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
4533  * flow_create_split_metadata() routine. The flow will look like,
4534  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
4535  *
4536  * @param dev
4537  *   Pointer to Ethernet device.
4538  * @param[out] split_actions
4539  *   Pointer to store split actions to jump to CP_TBL.
4540  * @param[in] actions
4541  *   Pointer to the list of original flow actions.
4542  * @param[in] qrss
4543  *   Pointer to the Q/RSS action.
4544  * @param[in] actions_n
4545  *   Number of original actions.
4546  * @param[out] error
4547  *   Perform verbose error reporting if not NULL.
4548  *
4549  * @return
4550  *   non-zero unique flow_id on success, otherwise 0 and
4551  *   error/rte_error are set.
4552  */
4553 static uint32_t
4554 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
4555                           struct rte_flow_action *split_actions,
4556                           const struct rte_flow_action *actions,
4557                           const struct rte_flow_action *qrss,
4558                           int actions_n, struct rte_flow_error *error)
4559 {
4560         struct mlx5_priv *priv = dev->data->dev_private;
4561         struct mlx5_rte_flow_action_set_tag *set_tag;
4562         struct rte_flow_action_jump *jump;
4563         const int qrss_idx = qrss - actions;
4564         uint32_t flow_id = 0;
4565         int ret = 0;
4566
4567         /*
4568          * Given actions will be split
4569          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
4570          * - Add jump to mreg CP_TBL.
4571          * As a result, there will be one more action.
4572          */
4573         ++actions_n;
4574         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
4575         set_tag = (void *)(split_actions + actions_n);
4576         /*
4577          * If tag action is not set to void(it means we are not the meter
4578          * suffix flow), add the tag action. Since meter suffix flow already
4579          * has the tag added.
4580          */
4581         if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) {
4582                 /*
4583                  * Allocate the new subflow ID. This one is unique within
4584                  * device and not shared with representors. Otherwise,
4585                  * we would have to resolve multi-thread access synch
4586                  * issue. Each flow on the shared device is appended
4587                  * with source vport identifier, so the resulting
4588                  * flows will be unique in the shared (by master and
4589                  * representors) domain even if they have coinciding
4590                  * IDs.
4591                  */
4592                 mlx5_ipool_malloc(priv->sh->ipool
4593                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id);
4594                 if (!flow_id)
4595                         return rte_flow_error_set(error, ENOMEM,
4596                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4597                                                   NULL, "can't allocate id "
4598                                                   "for split Q/RSS subflow");
4599                 /* Internal SET_TAG action to set flow ID. */
4600                 *set_tag = (struct mlx5_rte_flow_action_set_tag){
4601                         .data = flow_id,
4602                 };
4603                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
4604                 if (ret < 0)
4605                         return ret;
4606                 set_tag->id = ret;
4607                 /* Construct new actions array. */
4608                 /* Replace QUEUE/RSS action. */
4609                 split_actions[qrss_idx] = (struct rte_flow_action){
4610                         .type = (enum rte_flow_action_type)
4611                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
4612                         .conf = set_tag,
4613                 };
4614         }
4615         /* JUMP action to jump to mreg copy table (CP_TBL). */
4616         jump = (void *)(set_tag + 1);
4617         *jump = (struct rte_flow_action_jump){
4618                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
4619         };
4620         split_actions[actions_n - 2] = (struct rte_flow_action){
4621                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
4622                 .conf = jump,
4623         };
4624         split_actions[actions_n - 1] = (struct rte_flow_action){
4625                 .type = RTE_FLOW_ACTION_TYPE_END,
4626         };
4627         return flow_id;
4628 }
4629
4630 /**
4631  * Extend the given action list for Tx metadata copy.
4632  *
4633  * Copy the given action list to the ext_actions and add flow metadata register
4634  * copy action in order to copy reg_a set by WQE to reg_c[0].
4635  *
4636  * @param[out] ext_actions
4637  *   Pointer to the extended action list.
4638  * @param[in] actions
4639  *   Pointer to the list of actions.
4640  * @param[in] actions_n
4641  *   Number of actions in the list.
4642  * @param[out] error
4643  *   Perform verbose error reporting if not NULL.
4644  * @param[in] encap_idx
4645  *   The encap action inndex.
4646  *
4647  * @return
4648  *   0 on success, negative value otherwise
4649  */
4650 static int
4651 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
4652                        struct rte_flow_action *ext_actions,
4653                        const struct rte_flow_action *actions,
4654                        int actions_n, struct rte_flow_error *error,
4655                        int encap_idx)
4656 {
4657         struct mlx5_flow_action_copy_mreg *cp_mreg =
4658                 (struct mlx5_flow_action_copy_mreg *)
4659                         (ext_actions + actions_n + 1);
4660         int ret;
4661
4662         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
4663         if (ret < 0)
4664                 return ret;
4665         cp_mreg->dst = ret;
4666         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
4667         if (ret < 0)
4668                 return ret;
4669         cp_mreg->src = ret;
4670         if (encap_idx != 0)
4671                 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
4672         if (encap_idx == actions_n - 1) {
4673                 ext_actions[actions_n - 1] = (struct rte_flow_action){
4674                         .type = (enum rte_flow_action_type)
4675                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4676                         .conf = cp_mreg,
4677                 };
4678                 ext_actions[actions_n] = (struct rte_flow_action){
4679                         .type = RTE_FLOW_ACTION_TYPE_END,
4680                 };
4681         } else {
4682                 ext_actions[encap_idx] = (struct rte_flow_action){
4683                         .type = (enum rte_flow_action_type)
4684                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4685                         .conf = cp_mreg,
4686                 };
4687                 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
4688                                 sizeof(*ext_actions) * (actions_n - encap_idx));
4689         }
4690         return 0;
4691 }
4692
4693 /**
4694  * Check the match action from the action list.
4695  *
4696  * @param[in] actions
4697  *   Pointer to the list of actions.
4698  * @param[in] attr
4699  *   Flow rule attributes.
4700  * @param[in] action
4701  *   The action to be check if exist.
4702  * @param[out] match_action_pos
4703  *   Pointer to the position of the matched action if exists, otherwise is -1.
4704  * @param[out] qrss_action_pos
4705  *   Pointer to the position of the Queue/RSS action if exists, otherwise is -1.
4706  *
4707  * @return
4708  *   > 0 the total number of actions.
4709  *   0 if not found match action in action list.
4710  */
4711 static int
4712 flow_check_match_action(const struct rte_flow_action actions[],
4713                         const struct rte_flow_attr *attr,
4714                         enum rte_flow_action_type action,
4715                         int *match_action_pos, int *qrss_action_pos)
4716 {
4717         const struct rte_flow_action_sample *sample;
4718         int actions_n = 0;
4719         int jump_flag = 0;
4720         uint32_t ratio = 0;
4721         int sub_type = 0;
4722         int flag = 0;
4723
4724         *match_action_pos = -1;
4725         *qrss_action_pos = -1;
4726         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4727                 if (actions->type == action) {
4728                         flag = 1;
4729                         *match_action_pos = actions_n;
4730                 }
4731                 if (actions->type == RTE_FLOW_ACTION_TYPE_QUEUE ||
4732                     actions->type == RTE_FLOW_ACTION_TYPE_RSS)
4733                         *qrss_action_pos = actions_n;
4734                 if (actions->type == RTE_FLOW_ACTION_TYPE_JUMP)
4735                         jump_flag = 1;
4736                 if (actions->type == RTE_FLOW_ACTION_TYPE_SAMPLE) {
4737                         sample = actions->conf;
4738                         ratio = sample->ratio;
4739                         sub_type = ((const struct rte_flow_action *)
4740                                         (sample->actions))->type;
4741                 }
4742                 actions_n++;
4743         }
4744         if (flag && action == RTE_FLOW_ACTION_TYPE_SAMPLE && attr->transfer) {
4745                 if (ratio == 1) {
4746                         /* JUMP Action not support for Mirroring;
4747                          * Mirroring support multi-destination;
4748                          */
4749                         if (!jump_flag && sub_type != RTE_FLOW_ACTION_TYPE_END)
4750                                 flag = 0;
4751                 }
4752         }
4753         /* Count RTE_FLOW_ACTION_TYPE_END. */
4754         return flag ? actions_n + 1 : 0;
4755 }
4756
4757 #define SAMPLE_SUFFIX_ITEM 2
4758
4759 /**
4760  * Split the sample flow.
4761  *
4762  * As sample flow will split to two sub flow, sample flow with
4763  * sample action, the other actions will move to new suffix flow.
4764  *
4765  * Also add unique tag id with tag action in the sample flow,
4766  * the same tag id will be as match in the suffix flow.
4767  *
4768  * @param dev
4769  *   Pointer to Ethernet device.
4770  * @param[in] fdb_tx
4771  *   FDB egress flow flag.
4772  * @param[out] sfx_items
4773  *   Suffix flow match items (list terminated by the END pattern item).
4774  * @param[in] actions
4775  *   Associated actions (list terminated by the END action).
4776  * @param[out] actions_sfx
4777  *   Suffix flow actions.
4778  * @param[out] actions_pre
4779  *   Prefix flow actions.
4780  * @param[in] actions_n
4781  *  The total number of actions.
4782  * @param[in] sample_action_pos
4783  *   The sample action position.
4784  * @param[in] qrss_action_pos
4785  *   The Queue/RSS action position.
4786  * @param[out] error
4787  *   Perform verbose error reporting if not NULL.
4788  *
4789  * @return
4790  *   0 on success, or unique flow_id, a negative errno value
4791  *   otherwise and rte_errno is set.
4792  */
4793 static int
4794 flow_sample_split_prep(struct rte_eth_dev *dev,
4795                        uint32_t fdb_tx,
4796                        struct rte_flow_item sfx_items[],
4797                        const struct rte_flow_action actions[],
4798                        struct rte_flow_action actions_sfx[],
4799                        struct rte_flow_action actions_pre[],
4800                        int actions_n,
4801                        int sample_action_pos,
4802                        int qrss_action_pos,
4803                        struct rte_flow_error *error)
4804 {
4805         struct mlx5_priv *priv = dev->data->dev_private;
4806         struct mlx5_rte_flow_action_set_tag *set_tag;
4807         struct mlx5_rte_flow_item_tag *tag_spec;
4808         struct mlx5_rte_flow_item_tag *tag_mask;
4809         uint32_t tag_id = 0;
4810         int index;
4811         int ret;
4812
4813         if (sample_action_pos < 0)
4814                 return rte_flow_error_set(error, EINVAL,
4815                                           RTE_FLOW_ERROR_TYPE_ACTION,
4816                                           NULL, "invalid position of sample "
4817                                           "action in list");
4818         if (!fdb_tx) {
4819                 /* Prepare the prefix tag action. */
4820                 set_tag = (void *)(actions_pre + actions_n + 1);
4821                 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error);
4822                 if (ret < 0)
4823                         return ret;
4824                 set_tag->id = ret;
4825                 mlx5_ipool_malloc(priv->sh->ipool
4826                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id);
4827                 set_tag->data = tag_id;
4828                 /* Prepare the suffix subflow items. */
4829                 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM);
4830                 tag_spec->data = tag_id;
4831                 tag_spec->id = set_tag->id;
4832                 tag_mask = tag_spec + 1;
4833                 tag_mask->data = UINT32_MAX;
4834                 sfx_items[0] = (struct rte_flow_item){
4835                         .type = (enum rte_flow_item_type)
4836                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
4837                         .spec = tag_spec,
4838                         .last = NULL,
4839                         .mask = tag_mask,
4840                 };
4841                 sfx_items[1] = (struct rte_flow_item){
4842                         .type = (enum rte_flow_item_type)
4843                                 RTE_FLOW_ITEM_TYPE_END,
4844                 };
4845         }
4846         /* Prepare the actions for prefix and suffix flow. */
4847         if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) {
4848                 index = qrss_action_pos;
4849                 /* Put the preceding the Queue/RSS action into prefix flow. */
4850                 if (index != 0)
4851                         memcpy(actions_pre, actions,
4852                                sizeof(struct rte_flow_action) * index);
4853                 /* Put others preceding the sample action into prefix flow. */
4854                 if (sample_action_pos > index + 1)
4855                         memcpy(actions_pre + index, actions + index + 1,
4856                                sizeof(struct rte_flow_action) *
4857                                (sample_action_pos - index - 1));
4858                 index = sample_action_pos - 1;
4859                 /* Put Queue/RSS action into Suffix flow. */
4860                 memcpy(actions_sfx, actions + qrss_action_pos,
4861                        sizeof(struct rte_flow_action));
4862                 actions_sfx++;
4863         } else {
4864                 index = sample_action_pos;
4865                 if (index != 0)
4866                         memcpy(actions_pre, actions,
4867                                sizeof(struct rte_flow_action) * index);
4868         }
4869         /* Add the extra tag action for NIC-RX and E-Switch ingress. */
4870         if (!fdb_tx) {
4871                 actions_pre[index++] =
4872                         (struct rte_flow_action){
4873                         .type = (enum rte_flow_action_type)
4874                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
4875                         .conf = set_tag,
4876                 };
4877         }
4878         memcpy(actions_pre + index, actions + sample_action_pos,
4879                sizeof(struct rte_flow_action));
4880         index += 1;
4881         actions_pre[index] = (struct rte_flow_action){
4882                 .type = (enum rte_flow_action_type)
4883                         RTE_FLOW_ACTION_TYPE_END,
4884         };
4885         /* Put the actions after sample into Suffix flow. */
4886         memcpy(actions_sfx, actions + sample_action_pos + 1,
4887                sizeof(struct rte_flow_action) *
4888                (actions_n - sample_action_pos - 1));
4889         return tag_id;
4890 }
4891
4892 /**
4893  * The splitting for metadata feature.
4894  *
4895  * - Q/RSS action on NIC Rx should be split in order to pass by
4896  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
4897  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
4898  *
4899  * - All the actions on NIC Tx should have a mreg copy action to
4900  *   copy reg_a from WQE to reg_c[0].
4901  *
4902  * @param dev
4903  *   Pointer to Ethernet device.
4904  * @param[in] flow
4905  *   Parent flow structure pointer.
4906  * @param[in] attr
4907  *   Flow rule attributes.
4908  * @param[in] items
4909  *   Pattern specification (list terminated by the END pattern item).
4910  * @param[in] actions
4911  *   Associated actions (list terminated by the END action).
4912  * @param[in] flow_split_info
4913  *   Pointer to flow split info structure.
4914  * @param[out] error
4915  *   Perform verbose error reporting if not NULL.
4916  * @return
4917  *   0 on success, negative value otherwise
4918  */
4919 static int
4920 flow_create_split_metadata(struct rte_eth_dev *dev,
4921                            struct rte_flow *flow,
4922                            const struct rte_flow_attr *attr,
4923                            const struct rte_flow_item items[],
4924                            const struct rte_flow_action actions[],
4925                            struct mlx5_flow_split_info *flow_split_info,
4926                            struct rte_flow_error *error)
4927 {
4928         struct mlx5_priv *priv = dev->data->dev_private;
4929         struct mlx5_dev_config *config = &priv->config;
4930         const struct rte_flow_action *qrss = NULL;
4931         struct rte_flow_action *ext_actions = NULL;
4932         struct mlx5_flow *dev_flow = NULL;
4933         uint32_t qrss_id = 0;
4934         int mtr_sfx = 0;
4935         size_t act_size;
4936         int actions_n;
4937         int encap_idx;
4938         int ret;
4939
4940         /* Check whether extensive metadata feature is engaged. */
4941         if (!config->dv_flow_en ||
4942             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4943             !mlx5_flow_ext_mreg_supported(dev))
4944                 return flow_create_split_inner(dev, flow, NULL, attr, items,
4945                                                actions, flow_split_info, error);
4946         actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
4947                                                            &encap_idx);
4948         if (qrss) {
4949                 /* Exclude hairpin flows from splitting. */
4950                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
4951                         const struct rte_flow_action_queue *queue;
4952
4953                         queue = qrss->conf;
4954                         if (mlx5_rxq_get_type(dev, queue->index) ==
4955                             MLX5_RXQ_TYPE_HAIRPIN)
4956                                 qrss = NULL;
4957                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
4958                         const struct rte_flow_action_rss *rss;
4959
4960                         rss = qrss->conf;
4961                         if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
4962                             MLX5_RXQ_TYPE_HAIRPIN)
4963                                 qrss = NULL;
4964                 }
4965         }
4966         if (qrss) {
4967                 /* Check if it is in meter suffix table. */
4968                 mtr_sfx = attr->group == (attr->transfer ?
4969                           (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
4970                           MLX5_FLOW_TABLE_LEVEL_SUFFIX);
4971                 /*
4972                  * Q/RSS action on NIC Rx should be split in order to pass by
4973                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
4974                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
4975                  */
4976                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
4977                            sizeof(struct rte_flow_action_set_tag) +
4978                            sizeof(struct rte_flow_action_jump);
4979                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
4980                                           SOCKET_ID_ANY);
4981                 if (!ext_actions)
4982                         return rte_flow_error_set(error, ENOMEM,
4983                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4984                                                   NULL, "no memory to split "
4985                                                   "metadata flow");
4986                 /*
4987                  * If we are the suffix flow of meter, tag already exist.
4988                  * Set the tag action to void.
4989                  */
4990                 if (mtr_sfx)
4991                         ext_actions[qrss - actions].type =
4992                                                 RTE_FLOW_ACTION_TYPE_VOID;
4993                 else
4994                         ext_actions[qrss - actions].type =
4995                                                 (enum rte_flow_action_type)
4996                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4997                 /*
4998                  * Create the new actions list with removed Q/RSS action
4999                  * and appended set tag and jump to register copy table
5000                  * (RX_CP_TBL). We should preallocate unique tag ID here
5001                  * in advance, because it is needed for set tag action.
5002                  */
5003                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
5004                                                     qrss, actions_n, error);
5005                 if (!mtr_sfx && !qrss_id) {
5006                         ret = -rte_errno;
5007                         goto exit;
5008                 }
5009         } else if (attr->egress && !attr->transfer) {
5010                 /*
5011                  * All the actions on NIC Tx should have a metadata register
5012                  * copy action to copy reg_a from WQE to reg_c[meta]
5013                  */
5014                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5015                            sizeof(struct mlx5_flow_action_copy_mreg);
5016                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5017                                           SOCKET_ID_ANY);
5018                 if (!ext_actions)
5019                         return rte_flow_error_set(error, ENOMEM,
5020                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5021                                                   NULL, "no memory to split "
5022                                                   "metadata flow");
5023                 /* Create the action list appended with copy register. */
5024                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
5025                                              actions_n, error, encap_idx);
5026                 if (ret < 0)
5027                         goto exit;
5028         }
5029         /* Add the unmodified original or prefix subflow. */
5030         ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
5031                                       items, ext_actions ? ext_actions :
5032                                       actions, flow_split_info, error);
5033         if (ret < 0)
5034                 goto exit;
5035         MLX5_ASSERT(dev_flow);
5036         if (qrss) {
5037                 const struct rte_flow_attr q_attr = {
5038                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5039                         .ingress = 1,
5040                 };
5041                 /* Internal PMD action to set register. */
5042                 struct mlx5_rte_flow_item_tag q_tag_spec = {
5043                         .data = qrss_id,
5044                         .id = REG_NON,
5045                 };
5046                 struct rte_flow_item q_items[] = {
5047                         {
5048                                 .type = (enum rte_flow_item_type)
5049                                         MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5050                                 .spec = &q_tag_spec,
5051                                 .last = NULL,
5052                                 .mask = NULL,
5053                         },
5054                         {
5055                                 .type = RTE_FLOW_ITEM_TYPE_END,
5056                         },
5057                 };
5058                 struct rte_flow_action q_actions[] = {
5059                         {
5060                                 .type = qrss->type,
5061                                 .conf = qrss->conf,
5062                         },
5063                         {
5064                                 .type = RTE_FLOW_ACTION_TYPE_END,
5065                         },
5066                 };
5067                 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
5068
5069                 /*
5070                  * Configure the tag item only if there is no meter subflow.
5071                  * Since tag is already marked in the meter suffix subflow
5072                  * we can just use the meter suffix items as is.
5073                  */
5074                 if (qrss_id) {
5075                         /* Not meter subflow. */
5076                         MLX5_ASSERT(!mtr_sfx);
5077                         /*
5078                          * Put unique id in prefix flow due to it is destroyed
5079                          * after suffix flow and id will be freed after there
5080                          * is no actual flows with this id and identifier
5081                          * reallocation becomes possible (for example, for
5082                          * other flows in other threads).
5083                          */
5084                         dev_flow->handle->split_flow_id = qrss_id;
5085                         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
5086                                                    error);
5087                         if (ret < 0)
5088                                 goto exit;
5089                         q_tag_spec.id = ret;
5090                 }
5091                 dev_flow = NULL;
5092                 /* Add suffix subflow to execute Q/RSS. */
5093                 flow_split_info->prefix_layers = layers;
5094                 flow_split_info->prefix_mark = 0;
5095                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5096                                               &q_attr, mtr_sfx ? items :
5097                                               q_items, q_actions,
5098                                               flow_split_info, error);
5099                 if (ret < 0)
5100                         goto exit;
5101                 /* qrss ID should be freed if failed. */
5102                 qrss_id = 0;
5103                 MLX5_ASSERT(dev_flow);
5104         }
5105
5106 exit:
5107         /*
5108          * We do not destroy the partially created sub_flows in case of error.
5109          * These ones are included into parent flow list and will be destroyed
5110          * by flow_drv_destroy.
5111          */
5112         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
5113                         qrss_id);
5114         mlx5_free(ext_actions);
5115         return ret;
5116 }
5117
5118 /**
5119  * The splitting for meter feature.
5120  *
5121  * - The meter flow will be split to two flows as prefix and
5122  *   suffix flow. The packets make sense only it pass the prefix
5123  *   meter action.
5124  *
5125  * - Reg_C_5 is used for the packet to match betweend prefix and
5126  *   suffix flow.
5127  *
5128  * @param dev
5129  *   Pointer to Ethernet device.
5130  * @param[in] flow
5131  *   Parent flow structure pointer.
5132  * @param[in] attr
5133  *   Flow rule attributes.
5134  * @param[in] items
5135  *   Pattern specification (list terminated by the END pattern item).
5136  * @param[in] actions
5137  *   Associated actions (list terminated by the END action).
5138  * @param[in] flow_split_info
5139  *   Pointer to flow split info structure.
5140  * @param[out] error
5141  *   Perform verbose error reporting if not NULL.
5142  * @return
5143  *   0 on success, negative value otherwise
5144  */
5145 static int
5146 flow_create_split_meter(struct rte_eth_dev *dev,
5147                         struct rte_flow *flow,
5148                         const struct rte_flow_attr *attr,
5149                         const struct rte_flow_item items[],
5150                         const struct rte_flow_action actions[],
5151                         struct mlx5_flow_split_info *flow_split_info,
5152                         struct rte_flow_error *error)
5153 {
5154         struct mlx5_priv *priv = dev->data->dev_private;
5155         struct rte_flow_action *sfx_actions = NULL;
5156         struct rte_flow_action *pre_actions = NULL;
5157         struct rte_flow_item *sfx_items = NULL;
5158         struct mlx5_flow *dev_flow = NULL;
5159         struct rte_flow_attr sfx_attr = *attr;
5160         uint32_t mtr = 0;
5161         uint32_t mtr_tag_id = 0;
5162         size_t act_size;
5163         size_t item_size;
5164         int actions_n = 0;
5165         int ret;
5166
5167         if (priv->mtr_en)
5168                 actions_n = flow_check_meter_action(actions, &mtr);
5169         if (mtr) {
5170                 /* The five prefix actions: meter, decap, encap, tag, end. */
5171                 act_size = sizeof(struct rte_flow_action) * (actions_n + 5) +
5172                            sizeof(struct mlx5_rte_flow_action_set_tag);
5173                 /* tag, vlan, port id, end. */
5174 #define METER_SUFFIX_ITEM 4
5175                 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
5176                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
5177                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size),
5178                                           0, SOCKET_ID_ANY);
5179                 if (!sfx_actions)
5180                         return rte_flow_error_set(error, ENOMEM,
5181                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5182                                                   NULL, "no memory to split "
5183                                                   "meter flow");
5184                 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
5185                              act_size);
5186                 pre_actions = sfx_actions + actions_n;
5187                 mtr_tag_id = flow_meter_split_prep(dev, items, sfx_items,
5188                                                    actions, sfx_actions,
5189                                                    pre_actions);
5190                 if (!mtr_tag_id) {
5191                         ret = -rte_errno;
5192                         goto exit;
5193                 }
5194                 /* Add the prefix subflow. */
5195                 flow_split_info->prefix_mark = 0;
5196                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5197                                               attr, items, pre_actions,
5198                                               flow_split_info, error);
5199                 if (ret) {
5200                         ret = -rte_errno;
5201                         goto exit;
5202                 }
5203                 dev_flow->handle->split_flow_id = mtr_tag_id;
5204                 /* Setting the sfx group atrr. */
5205                 sfx_attr.group = sfx_attr.transfer ?
5206                                 (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
5207                                  MLX5_FLOW_TABLE_LEVEL_SUFFIX;
5208                 flow_split_info->prefix_layers =
5209                                 flow_get_prefix_layer_flags(dev_flow);
5210                 flow_split_info->prefix_mark = dev_flow->handle->mark;
5211         }
5212         /* Add the prefix subflow. */
5213         ret = flow_create_split_metadata(dev, flow,
5214                                          &sfx_attr, sfx_items ?
5215                                          sfx_items : items,
5216                                          sfx_actions ? sfx_actions : actions,
5217                                          flow_split_info, error);
5218 exit:
5219         if (sfx_actions)
5220                 mlx5_free(sfx_actions);
5221         return ret;
5222 }
5223
5224 /**
5225  * The splitting for sample feature.
5226  *
5227  * Once Sample action is detected in the action list, the flow actions should
5228  * be split into prefix sub flow and suffix sub flow.
5229  *
5230  * The original items remain in the prefix sub flow, all actions preceding the
5231  * sample action and the sample action itself will be copied to the prefix
5232  * sub flow, the actions following the sample action will be copied to the
5233  * suffix sub flow, Queue action always be located in the suffix sub flow.
5234  *
5235  * In order to make the packet from prefix sub flow matches with suffix sub
5236  * flow, an extra tag action be added into prefix sub flow, and the suffix sub
5237  * flow uses tag item with the unique flow id.
5238  *
5239  * @param dev
5240  *   Pointer to Ethernet device.
5241  * @param[in] flow
5242  *   Parent flow structure pointer.
5243  * @param[in] attr
5244  *   Flow rule attributes.
5245  * @param[in] items
5246  *   Pattern specification (list terminated by the END pattern item).
5247  * @param[in] actions
5248  *   Associated actions (list terminated by the END action).
5249  * @param[in] flow_split_info
5250  *   Pointer to flow split info structure.
5251  * @param[out] error
5252  *   Perform verbose error reporting if not NULL.
5253  * @return
5254  *   0 on success, negative value otherwise
5255  */
5256 static int
5257 flow_create_split_sample(struct rte_eth_dev *dev,
5258                          struct rte_flow *flow,
5259                          const struct rte_flow_attr *attr,
5260                          const struct rte_flow_item items[],
5261                          const struct rte_flow_action actions[],
5262                          struct mlx5_flow_split_info *flow_split_info,
5263                          struct rte_flow_error *error)
5264 {
5265         struct mlx5_priv *priv = dev->data->dev_private;
5266         struct rte_flow_action *sfx_actions = NULL;
5267         struct rte_flow_action *pre_actions = NULL;
5268         struct rte_flow_item *sfx_items = NULL;
5269         struct mlx5_flow *dev_flow = NULL;
5270         struct rte_flow_attr sfx_attr = *attr;
5271 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5272         struct mlx5_flow_dv_sample_resource *sample_res;
5273         struct mlx5_flow_tbl_data_entry *sfx_tbl_data;
5274         struct mlx5_flow_tbl_resource *sfx_tbl;
5275         union mlx5_flow_tbl_key sfx_table_key;
5276 #endif
5277         size_t act_size;
5278         size_t item_size;
5279         uint32_t fdb_tx = 0;
5280         int32_t tag_id = 0;
5281         int actions_n = 0;
5282         int sample_action_pos;
5283         int qrss_action_pos;
5284         int ret = 0;
5285
5286         if (priv->sampler_en)
5287                 actions_n = flow_check_match_action(actions, attr,
5288                                         RTE_FLOW_ACTION_TYPE_SAMPLE,
5289                                         &sample_action_pos, &qrss_action_pos);
5290         if (actions_n) {
5291                 /* The prefix actions must includes sample, tag, end. */
5292                 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1)
5293                            + sizeof(struct mlx5_rte_flow_action_set_tag);
5294                 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM +
5295                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
5296                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size +
5297                                           item_size), 0, SOCKET_ID_ANY);
5298                 if (!sfx_actions)
5299                         return rte_flow_error_set(error, ENOMEM,
5300                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5301                                                   NULL, "no memory to split "
5302                                                   "sample flow");
5303                 /* The representor_id is -1 for uplink. */
5304                 fdb_tx = (attr->transfer && priv->representor_id != -1);
5305                 if (!fdb_tx)
5306                         sfx_items = (struct rte_flow_item *)((char *)sfx_actions
5307                                         + act_size);
5308                 pre_actions = sfx_actions + actions_n;
5309                 tag_id = flow_sample_split_prep(dev, fdb_tx, sfx_items,
5310                                                 actions, sfx_actions,
5311                                                 pre_actions, actions_n,
5312                                                 sample_action_pos,
5313                                                 qrss_action_pos, error);
5314                 if (tag_id < 0 || (!fdb_tx && !tag_id)) {
5315                         ret = -rte_errno;
5316                         goto exit;
5317                 }
5318                 /* Add the prefix subflow. */
5319                 ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
5320                                               items, pre_actions,
5321                                               flow_split_info, error);
5322                 if (ret) {
5323                         ret = -rte_errno;
5324                         goto exit;
5325                 }
5326                 dev_flow->handle->split_flow_id = tag_id;
5327 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5328                 /* Set the sfx group attr. */
5329                 sample_res = (struct mlx5_flow_dv_sample_resource *)
5330                                         dev_flow->dv.sample_res;
5331                 sfx_tbl = (struct mlx5_flow_tbl_resource *)
5332                                         sample_res->normal_path_tbl;
5333                 sfx_tbl_data = container_of(sfx_tbl,
5334                                         struct mlx5_flow_tbl_data_entry, tbl);
5335                 sfx_table_key.v64 = sfx_tbl_data->entry.key;
5336                 sfx_attr.group = sfx_attr.transfer ?
5337                                         (sfx_table_key.table_id - 1) :
5338                                          sfx_table_key.table_id;
5339                 flow_split_info->prefix_layers =
5340                                 flow_get_prefix_layer_flags(dev_flow);
5341                 flow_split_info->prefix_mark = dev_flow->handle->mark;
5342                 /* Suffix group level already be scaled with factor, set
5343                  * skip_scale to 1 to avoid scale again in translation.
5344                  */
5345                 flow_split_info->skip_scale = 1;
5346 #endif
5347         }
5348         /* Add the suffix subflow. */
5349         ret = flow_create_split_meter(dev, flow, &sfx_attr,
5350                                       sfx_items ? sfx_items : items,
5351                                       sfx_actions ? sfx_actions : actions,
5352                                       flow_split_info, error);
5353 exit:
5354         if (sfx_actions)
5355                 mlx5_free(sfx_actions);
5356         return ret;
5357 }
5358
5359 /**
5360  * Split the flow to subflow set. The splitters might be linked
5361  * in the chain, like this:
5362  * flow_create_split_outer() calls:
5363  *   flow_create_split_meter() calls:
5364  *     flow_create_split_metadata(meter_subflow_0) calls:
5365  *       flow_create_split_inner(metadata_subflow_0)
5366  *       flow_create_split_inner(metadata_subflow_1)
5367  *       flow_create_split_inner(metadata_subflow_2)
5368  *     flow_create_split_metadata(meter_subflow_1) calls:
5369  *       flow_create_split_inner(metadata_subflow_0)
5370  *       flow_create_split_inner(metadata_subflow_1)
5371  *       flow_create_split_inner(metadata_subflow_2)
5372  *
5373  * This provide flexible way to add new levels of flow splitting.
5374  * The all of successfully created subflows are included to the
5375  * parent flow dev_flow list.
5376  *
5377  * @param dev
5378  *   Pointer to Ethernet device.
5379  * @param[in] flow
5380  *   Parent flow structure pointer.
5381  * @param[in] attr
5382  *   Flow rule attributes.
5383  * @param[in] items
5384  *   Pattern specification (list terminated by the END pattern item).
5385  * @param[in] actions
5386  *   Associated actions (list terminated by the END action).
5387  * @param[in] flow_split_info
5388  *   Pointer to flow split info structure.
5389  * @param[out] error
5390  *   Perform verbose error reporting if not NULL.
5391  * @return
5392  *   0 on success, negative value otherwise
5393  */
5394 static int
5395 flow_create_split_outer(struct rte_eth_dev *dev,
5396                         struct rte_flow *flow,
5397                         const struct rte_flow_attr *attr,
5398                         const struct rte_flow_item items[],
5399                         const struct rte_flow_action actions[],
5400                         struct mlx5_flow_split_info *flow_split_info,
5401                         struct rte_flow_error *error)
5402 {
5403         int ret;
5404
5405         ret = flow_create_split_sample(dev, flow, attr, items,
5406                                        actions, flow_split_info, error);
5407         MLX5_ASSERT(ret <= 0);
5408         return ret;
5409 }
5410
5411 static struct mlx5_flow_tunnel *
5412 flow_tunnel_from_rule(struct rte_eth_dev *dev,
5413                       const struct rte_flow_attr *attr,
5414                       const struct rte_flow_item items[],
5415                       const struct rte_flow_action actions[])
5416 {
5417         struct mlx5_flow_tunnel *tunnel;
5418
5419 #pragma GCC diagnostic push
5420 #pragma GCC diagnostic ignored "-Wcast-qual"
5421         if (is_flow_tunnel_match_rule(dev, attr, items, actions))
5422                 tunnel = (struct mlx5_flow_tunnel *)items[0].spec;
5423         else if (is_flow_tunnel_steer_rule(dev, attr, items, actions))
5424                 tunnel = (struct mlx5_flow_tunnel *)actions[0].conf;
5425         else
5426                 tunnel = NULL;
5427 #pragma GCC diagnostic pop
5428
5429         return tunnel;
5430 }
5431
5432 /**
5433  * Adjust flow RSS workspace if needed.
5434  *
5435  * @param wks
5436  *   Pointer to thread flow work space.
5437  * @param rss_desc
5438  *   Pointer to RSS descriptor.
5439  * @param[in] nrssq_num
5440  *   New RSS queue number.
5441  *
5442  * @return
5443  *   0 on success, -1 otherwise and rte_errno is set.
5444  */
5445 static int
5446 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks,
5447                           struct mlx5_flow_rss_desc *rss_desc,
5448                           uint32_t nrssq_num)
5449 {
5450         if (likely(nrssq_num <= wks->rssq_num))
5451                 return 0;
5452         rss_desc->queue = realloc(rss_desc->queue,
5453                           sizeof(*rss_desc->queue) * RTE_ALIGN(nrssq_num, 2));
5454         if (!rss_desc->queue) {
5455                 rte_errno = ENOMEM;
5456                 return -1;
5457         }
5458         wks->rssq_num = RTE_ALIGN(nrssq_num, 2);
5459         return 0;
5460 }
5461
5462 /**
5463  * Create a flow and add it to @p list.
5464  *
5465  * @param dev
5466  *   Pointer to Ethernet device.
5467  * @param list
5468  *   Pointer to a TAILQ flow list. If this parameter NULL,
5469  *   no list insertion occurred, flow is just created,
5470  *   this is caller's responsibility to track the
5471  *   created flow.
5472  * @param[in] attr
5473  *   Flow rule attributes.
5474  * @param[in] items
5475  *   Pattern specification (list terminated by the END pattern item).
5476  * @param[in] actions
5477  *   Associated actions (list terminated by the END action).
5478  * @param[in] external
5479  *   This flow rule is created by request external to PMD.
5480  * @param[out] error
5481  *   Perform verbose error reporting if not NULL.
5482  *
5483  * @return
5484  *   A flow index on success, 0 otherwise and rte_errno is set.
5485  */
5486 static uint32_t
5487 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
5488                  const struct rte_flow_attr *attr,
5489                  const struct rte_flow_item items[],
5490                  const struct rte_flow_action original_actions[],
5491                  bool external, struct rte_flow_error *error)
5492 {
5493         struct mlx5_priv *priv = dev->data->dev_private;
5494         struct rte_flow *flow = NULL;
5495         struct mlx5_flow *dev_flow;
5496         const struct rte_flow_action_rss *rss;
5497         struct mlx5_translated_shared_action
5498                 shared_actions[MLX5_MAX_SHARED_ACTIONS];
5499         int shared_actions_n = MLX5_MAX_SHARED_ACTIONS;
5500         union {
5501                 struct mlx5_flow_expand_rss buf;
5502                 uint8_t buffer[2048];
5503         } expand_buffer;
5504         union {
5505                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
5506                 uint8_t buffer[2048];
5507         } actions_rx;
5508         union {
5509                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
5510                 uint8_t buffer[2048];
5511         } actions_hairpin_tx;
5512         union {
5513                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
5514                 uint8_t buffer[2048];
5515         } items_tx;
5516         struct mlx5_flow_expand_rss *buf = &expand_buffer.buf;
5517         struct mlx5_flow_rss_desc *rss_desc;
5518         const struct rte_flow_action *p_actions_rx;
5519         uint32_t i;
5520         uint32_t idx = 0;
5521         int hairpin_flow;
5522         struct rte_flow_attr attr_tx = { .priority = 0 };
5523         const struct rte_flow_action *actions;
5524         struct rte_flow_action *translated_actions = NULL;
5525         struct mlx5_flow_tunnel *tunnel;
5526         struct tunnel_default_miss_ctx default_miss_ctx = { 0, };
5527         struct mlx5_flow_workspace *wks = mlx5_flow_push_thread_workspace();
5528         struct mlx5_flow_split_info flow_split_info = {
5529                 .external = !!external,
5530                 .skip_scale = 0,
5531                 .flow_idx = 0,
5532                 .prefix_mark = 0,
5533                 .prefix_layers = 0
5534         };
5535         int ret;
5536
5537         MLX5_ASSERT(wks);
5538         rss_desc = &wks->rss_desc;
5539         ret = flow_shared_actions_translate(dev, original_actions,
5540                                             shared_actions,
5541                                             &shared_actions_n,
5542                                             &translated_actions, error);
5543         if (ret < 0) {
5544                 MLX5_ASSERT(translated_actions == NULL);
5545                 return 0;
5546         }
5547         actions = translated_actions ? translated_actions : original_actions;
5548         p_actions_rx = actions;
5549         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
5550         ret = flow_drv_validate(dev, attr, items, p_actions_rx,
5551                                 external, hairpin_flow, error);
5552         if (ret < 0)
5553                 goto error_before_hairpin_split;
5554         flow = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], &idx);
5555         if (!flow) {
5556                 rte_errno = ENOMEM;
5557                 goto error_before_hairpin_split;
5558         }
5559         if (hairpin_flow > 0) {
5560                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
5561                         rte_errno = EINVAL;
5562                         goto error_before_hairpin_split;
5563                 }
5564                 flow_hairpin_split(dev, actions, actions_rx.actions,
5565                                    actions_hairpin_tx.actions, items_tx.items,
5566                                    idx);
5567                 p_actions_rx = actions_rx.actions;
5568         }
5569         flow_split_info.flow_idx = idx;
5570         flow->drv_type = flow_get_drv_type(dev, attr);
5571         MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
5572                     flow->drv_type < MLX5_FLOW_TYPE_MAX);
5573         memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue));
5574         rss = flow_get_rss_action(p_actions_rx);
5575         if (rss) {
5576                 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num))
5577                         return 0;
5578                 /*
5579                  * The following information is required by
5580                  * mlx5_flow_hashfields_adjust() in advance.
5581                  */
5582                 rss_desc->level = rss->level;
5583                 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
5584                 rss_desc->types = !rss->types ? ETH_RSS_IP : rss->types;
5585         }
5586         flow->dev_handles = 0;
5587         if (rss && rss->types) {
5588                 unsigned int graph_root;
5589
5590                 graph_root = find_graph_root(items, rss->level);
5591                 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
5592                                            items, rss->types,
5593                                            mlx5_support_expansion, graph_root);
5594                 MLX5_ASSERT(ret > 0 &&
5595                        (unsigned int)ret < sizeof(expand_buffer.buffer));
5596         } else {
5597                 buf->entries = 1;
5598                 buf->entry[0].pattern = (void *)(uintptr_t)items;
5599         }
5600         rss_desc->shared_rss = flow_get_shared_rss_action(dev, shared_actions,
5601                                                       shared_actions_n);
5602         for (i = 0; i < buf->entries; ++i) {
5603                 /* Initialize flow split data. */
5604                 flow_split_info.prefix_layers = 0;
5605                 flow_split_info.prefix_mark = 0;
5606                 flow_split_info.skip_scale = 0;
5607                 /*
5608                  * The splitter may create multiple dev_flows,
5609                  * depending on configuration. In the simplest
5610                  * case it just creates unmodified original flow.
5611                  */
5612                 ret = flow_create_split_outer(dev, flow, attr,
5613                                               buf->entry[i].pattern,
5614                                               p_actions_rx, &flow_split_info,
5615                                               error);
5616                 if (ret < 0)
5617                         goto error;
5618                 if (is_flow_tunnel_steer_rule(dev, attr,
5619                                               buf->entry[i].pattern,
5620                                               p_actions_rx)) {
5621                         ret = flow_tunnel_add_default_miss(dev, flow, attr,
5622                                                            p_actions_rx,
5623                                                            idx,
5624                                                            &default_miss_ctx,
5625                                                            error);
5626                         if (ret < 0) {
5627                                 mlx5_free(default_miss_ctx.queue);
5628                                 goto error;
5629                         }
5630                 }
5631         }
5632         /* Create the tx flow. */
5633         if (hairpin_flow) {
5634                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
5635                 attr_tx.ingress = 0;
5636                 attr_tx.egress = 1;
5637                 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
5638                                          actions_hairpin_tx.actions,
5639                                          idx, error);
5640                 if (!dev_flow)
5641                         goto error;
5642                 dev_flow->flow = flow;
5643                 dev_flow->external = 0;
5644                 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
5645                               dev_flow->handle, next);
5646                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
5647                                          items_tx.items,
5648                                          actions_hairpin_tx.actions, error);
5649                 if (ret < 0)
5650                         goto error;
5651         }
5652         /*
5653          * Update the metadata register copy table. If extensive
5654          * metadata feature is enabled and registers are supported
5655          * we might create the extra rte_flow for each unique
5656          * MARK/FLAG action ID.
5657          *
5658          * The table is updated for ingress Flows only, because
5659          * the egress Flows belong to the different device and
5660          * copy table should be updated in peer NIC Rx domain.
5661          */
5662         if (attr->ingress &&
5663             (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
5664                 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
5665                 if (ret)
5666                         goto error;
5667         }
5668         /*
5669          * If the flow is external (from application) OR device is started,
5670          * OR mreg discover, then apply immediately.
5671          */
5672         if (external || dev->data->dev_started ||
5673             (attr->group == MLX5_FLOW_MREG_CP_TABLE_GROUP &&
5674              attr->priority == MLX5_FLOW_PRIO_RSVD)) {
5675                 ret = flow_drv_apply(dev, flow, error);
5676                 if (ret < 0)
5677                         goto error;
5678         }
5679         if (list) {
5680                 rte_spinlock_lock(&priv->flow_list_lock);
5681                 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list, idx,
5682                              flow, next);
5683                 rte_spinlock_unlock(&priv->flow_list_lock);
5684         }
5685         flow_rxq_flags_set(dev, flow);
5686         rte_free(translated_actions);
5687         tunnel = flow_tunnel_from_rule(dev, attr, items, actions);
5688         if (tunnel) {
5689                 flow->tunnel = 1;
5690                 flow->tunnel_id = tunnel->tunnel_id;
5691                 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED);
5692                 mlx5_free(default_miss_ctx.queue);
5693         }
5694         mlx5_flow_pop_thread_workspace();
5695         return idx;
5696 error:
5697         MLX5_ASSERT(flow);
5698         ret = rte_errno; /* Save rte_errno before cleanup. */
5699         flow_mreg_del_copy_action(dev, flow);
5700         flow_drv_destroy(dev, flow);
5701         if (rss_desc->shared_rss)
5702                 __atomic_sub_fetch(&((struct mlx5_shared_action_rss *)
5703                         mlx5_ipool_get
5704                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
5705                         rss_desc->shared_rss))->refcnt, 1, __ATOMIC_RELAXED);
5706         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], idx);
5707         rte_errno = ret; /* Restore rte_errno. */
5708         ret = rte_errno;
5709         rte_errno = ret;
5710         mlx5_flow_pop_thread_workspace();
5711 error_before_hairpin_split:
5712         rte_free(translated_actions);
5713         return 0;
5714 }
5715
5716 /**
5717  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
5718  * incoming packets to table 1.
5719  *
5720  * Other flow rules, requested for group n, will be created in
5721  * e-switch table n+1.
5722  * Jump action to e-switch group n will be created to group n+1.
5723  *
5724  * Used when working in switchdev mode, to utilise advantages of table 1
5725  * and above.
5726  *
5727  * @param dev
5728  *   Pointer to Ethernet device.
5729  *
5730  * @return
5731  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
5732  */
5733 struct rte_flow *
5734 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
5735 {
5736         const struct rte_flow_attr attr = {
5737                 .group = 0,
5738                 .priority = 0,
5739                 .ingress = 1,
5740                 .egress = 0,
5741                 .transfer = 1,
5742         };
5743         const struct rte_flow_item pattern = {
5744                 .type = RTE_FLOW_ITEM_TYPE_END,
5745         };
5746         struct rte_flow_action_jump jump = {
5747                 .group = 1,
5748         };
5749         const struct rte_flow_action actions[] = {
5750                 {
5751                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
5752                         .conf = &jump,
5753                 },
5754                 {
5755                         .type = RTE_FLOW_ACTION_TYPE_END,
5756                 },
5757         };
5758         struct mlx5_priv *priv = dev->data->dev_private;
5759         struct rte_flow_error error;
5760
5761         return (void *)(uintptr_t)flow_list_create(dev, &priv->ctrl_flows,
5762                                                    &attr, &pattern,
5763                                                    actions, false, &error);
5764 }
5765
5766 /**
5767  * Validate a flow supported by the NIC.
5768  *
5769  * @see rte_flow_validate()
5770  * @see rte_flow_ops
5771  */
5772 int
5773 mlx5_flow_validate(struct rte_eth_dev *dev,
5774                    const struct rte_flow_attr *attr,
5775                    const struct rte_flow_item items[],
5776                    const struct rte_flow_action original_actions[],
5777                    struct rte_flow_error *error)
5778 {
5779         int hairpin_flow;
5780         struct mlx5_translated_shared_action
5781                 shared_actions[MLX5_MAX_SHARED_ACTIONS];
5782         int shared_actions_n = MLX5_MAX_SHARED_ACTIONS;
5783         const struct rte_flow_action *actions;
5784         struct rte_flow_action *translated_actions = NULL;
5785         int ret = flow_shared_actions_translate(dev, original_actions,
5786                                                 shared_actions,
5787                                                 &shared_actions_n,
5788                                                 &translated_actions, error);
5789
5790         if (ret)
5791                 return ret;
5792         actions = translated_actions ? translated_actions : original_actions;
5793         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
5794         ret = flow_drv_validate(dev, attr, items, actions,
5795                                 true, hairpin_flow, error);
5796         rte_free(translated_actions);
5797         return ret;
5798 }
5799
5800 /**
5801  * Create a flow.
5802  *
5803  * @see rte_flow_create()
5804  * @see rte_flow_ops
5805  */
5806 struct rte_flow *
5807 mlx5_flow_create(struct rte_eth_dev *dev,
5808                  const struct rte_flow_attr *attr,
5809                  const struct rte_flow_item items[],
5810                  const struct rte_flow_action actions[],
5811                  struct rte_flow_error *error)
5812 {
5813         struct mlx5_priv *priv = dev->data->dev_private;
5814
5815         /*
5816          * If the device is not started yet, it is not allowed to created a
5817          * flow from application. PMD default flows and traffic control flows
5818          * are not affected.
5819          */
5820         if (unlikely(!dev->data->dev_started)) {
5821                 DRV_LOG(DEBUG, "port %u is not started when "
5822                         "inserting a flow", dev->data->port_id);
5823                 rte_flow_error_set(error, ENODEV,
5824                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5825                                    NULL,
5826                                    "port not started");
5827                 return NULL;
5828         }
5829
5830         return (void *)(uintptr_t)flow_list_create(dev, &priv->flows,
5831                                   attr, items, actions, true, error);
5832 }
5833
5834 /**
5835  * Destroy a flow in a list.
5836  *
5837  * @param dev
5838  *   Pointer to Ethernet device.
5839  * @param list
5840  *   Pointer to the Indexed flow list. If this parameter NULL,
5841  *   there is no flow removal from the list. Be noted that as
5842  *   flow is add to the indexed list, memory of the indexed
5843  *   list points to maybe changed as flow destroyed.
5844  * @param[in] flow_idx
5845  *   Index of flow to destroy.
5846  */
5847 static void
5848 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
5849                   uint32_t flow_idx)
5850 {
5851         struct mlx5_priv *priv = dev->data->dev_private;
5852         struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
5853                                                [MLX5_IPOOL_RTE_FLOW], flow_idx);
5854
5855         if (!flow)
5856                 return;
5857         /*
5858          * Update RX queue flags only if port is started, otherwise it is
5859          * already clean.
5860          */
5861         if (dev->data->dev_started)
5862                 flow_rxq_flags_trim(dev, flow);
5863         flow_drv_destroy(dev, flow);
5864         if (list) {
5865                 rte_spinlock_lock(&priv->flow_list_lock);
5866                 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list,
5867                              flow_idx, flow, next);
5868                 rte_spinlock_unlock(&priv->flow_list_lock);
5869         }
5870         if (flow->tunnel) {
5871                 struct mlx5_flow_tunnel *tunnel;
5872
5873                 rte_spinlock_lock(&mlx5_tunnel_hub(dev)->sl);
5874                 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id);
5875                 RTE_VERIFY(tunnel);
5876                 LIST_REMOVE(tunnel, chain);
5877                 rte_spinlock_unlock(&mlx5_tunnel_hub(dev)->sl);
5878                 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
5879                         mlx5_flow_tunnel_free(dev, tunnel);
5880         }
5881         flow_mreg_del_copy_action(dev, flow);
5882         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], flow_idx);
5883 }
5884
5885 /**
5886  * Destroy all flows.
5887  *
5888  * @param dev
5889  *   Pointer to Ethernet device.
5890  * @param list
5891  *   Pointer to the Indexed flow list.
5892  * @param active
5893  *   If flushing is called avtively.
5894  */
5895 void
5896 mlx5_flow_list_flush(struct rte_eth_dev *dev, uint32_t *list, bool active)
5897 {
5898         uint32_t num_flushed = 0;
5899
5900         while (*list) {
5901                 flow_list_destroy(dev, list, *list);
5902                 num_flushed++;
5903         }
5904         if (active) {
5905                 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
5906                         dev->data->port_id, num_flushed);
5907         }
5908 }
5909
5910 /**
5911  * Stop all default actions for flows.
5912  *
5913  * @param dev
5914  *   Pointer to Ethernet device.
5915  */
5916 void
5917 mlx5_flow_stop_default(struct rte_eth_dev *dev)
5918 {
5919         flow_mreg_del_default_copy_action(dev);
5920         flow_rxq_flags_clear(dev);
5921 }
5922
5923 /**
5924  * Start all default actions for flows.
5925  *
5926  * @param dev
5927  *   Pointer to Ethernet device.
5928  * @return
5929  *   0 on success, a negative errno value otherwise and rte_errno is set.
5930  */
5931 int
5932 mlx5_flow_start_default(struct rte_eth_dev *dev)
5933 {
5934         struct rte_flow_error error;
5935
5936         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
5937         return flow_mreg_add_default_copy_action(dev, &error);
5938 }
5939
5940 /**
5941  * Release key of thread specific flow workspace data.
5942  */
5943 static void
5944 flow_release_workspace(void *data)
5945 {
5946         struct mlx5_flow_workspace *wks = data;
5947         struct mlx5_flow_workspace *next;
5948
5949         while (wks) {
5950                 next = wks->next;
5951                 free(wks->rss_desc.queue);
5952                 free(wks);
5953                 wks = next;
5954         }
5955 }
5956
5957 /**
5958  * Initialize key of thread specific flow workspace data.
5959  */
5960 static void
5961 flow_alloc_workspace(void)
5962 {
5963         if (pthread_key_create(&key_workspace, flow_release_workspace))
5964                 DRV_LOG(ERR, "Can't create flow workspace data thread key.");
5965 }
5966
5967 /**
5968  * Get thread specific current flow workspace.
5969  *
5970  * @return pointer to thread specific flow workspace data, NULL on error.
5971  */
5972 struct mlx5_flow_workspace*
5973 mlx5_flow_get_thread_workspace(void)
5974 {
5975         struct mlx5_flow_workspace *data;
5976
5977         data = pthread_getspecific(key_workspace);
5978         MLX5_ASSERT(data && data->inuse);
5979         if (!data || !data->inuse)
5980                 DRV_LOG(ERR, "flow workspace not initialized.");
5981         return data;
5982 }
5983
5984 /**
5985  * Allocate and init new flow workspace.
5986  *
5987  * @return pointer to flow workspace data, NULL on error.
5988  */
5989 static struct mlx5_flow_workspace*
5990 flow_alloc_thread_workspace(void)
5991 {
5992         struct mlx5_flow_workspace *data = calloc(1, sizeof(*data));
5993
5994         if (!data) {
5995                 DRV_LOG(ERR, "Failed to allocate flow workspace "
5996                         "memory.");
5997                 return NULL;
5998         }
5999         data->rss_desc.queue = calloc(1,
6000                         sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM);
6001         if (!data->rss_desc.queue)
6002                 goto err;
6003         data->rssq_num = MLX5_RSSQ_DEFAULT_NUM;
6004         return data;
6005 err:
6006         if (data->rss_desc.queue)
6007                 free(data->rss_desc.queue);
6008         free(data);
6009         return NULL;
6010 }
6011
6012 /**
6013  * Get new thread specific flow workspace.
6014  *
6015  * If current workspace inuse, create new one and set as current.
6016  *
6017  * @return pointer to thread specific flow workspace data, NULL on error.
6018  */
6019 static struct mlx5_flow_workspace*
6020 mlx5_flow_push_thread_workspace(void)
6021 {
6022         struct mlx5_flow_workspace *curr;
6023         struct mlx5_flow_workspace *data;
6024
6025         if (pthread_once(&key_workspace_init, flow_alloc_workspace)) {
6026                 DRV_LOG(ERR, "Failed to init flow workspace data thread key.");
6027                 return NULL;
6028         }
6029         curr = pthread_getspecific(key_workspace);
6030         if (!curr) {
6031                 data = flow_alloc_thread_workspace();
6032                 if (!data)
6033                         return NULL;
6034         } else if (!curr->inuse) {
6035                 data = curr;
6036         } else if (curr->next) {
6037                 data = curr->next;
6038         } else {
6039                 data = flow_alloc_thread_workspace();
6040                 if (!data)
6041                         return NULL;
6042                 curr->next = data;
6043                 data->prev = curr;
6044         }
6045         data->inuse = 1;
6046         data->flow_idx = 0;
6047         /* Set as current workspace */
6048         if (pthread_setspecific(key_workspace, data))
6049                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6050         return data;
6051 }
6052
6053 /**
6054  * Close current thread specific flow workspace.
6055  *
6056  * If previous workspace available, set it as current.
6057  *
6058  * @return pointer to thread specific flow workspace data, NULL on error.
6059  */
6060 static void
6061 mlx5_flow_pop_thread_workspace(void)
6062 {
6063         struct mlx5_flow_workspace *data = mlx5_flow_get_thread_workspace();
6064
6065         if (!data)
6066                 return;
6067         if (!data->inuse) {
6068                 DRV_LOG(ERR, "Failed to close unused flow workspace.");
6069                 return;
6070         }
6071         data->inuse = 0;
6072         if (!data->prev)
6073                 return;
6074         if (pthread_setspecific(key_workspace, data->prev))
6075                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6076 }
6077
6078 /**
6079  * Verify the flow list is empty
6080  *
6081  * @param dev
6082  *  Pointer to Ethernet device.
6083  *
6084  * @return the number of flows not released.
6085  */
6086 int
6087 mlx5_flow_verify(struct rte_eth_dev *dev)
6088 {
6089         struct mlx5_priv *priv = dev->data->dev_private;
6090         struct rte_flow *flow;
6091         uint32_t idx;
6092         int ret = 0;
6093
6094         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], priv->flows, idx,
6095                       flow, next) {
6096                 DRV_LOG(DEBUG, "port %u flow %p still referenced",
6097                         dev->data->port_id, (void *)flow);
6098                 ++ret;
6099         }
6100         return ret;
6101 }
6102
6103 /**
6104  * Enable default hairpin egress flow.
6105  *
6106  * @param dev
6107  *   Pointer to Ethernet device.
6108  * @param queue
6109  *   The queue index.
6110  *
6111  * @return
6112  *   0 on success, a negative errno value otherwise and rte_errno is set.
6113  */
6114 int
6115 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
6116                             uint32_t queue)
6117 {
6118         struct mlx5_priv *priv = dev->data->dev_private;
6119         const struct rte_flow_attr attr = {
6120                 .egress = 1,
6121                 .priority = 0,
6122         };
6123         struct mlx5_rte_flow_item_tx_queue queue_spec = {
6124                 .queue = queue,
6125         };
6126         struct mlx5_rte_flow_item_tx_queue queue_mask = {
6127                 .queue = UINT32_MAX,
6128         };
6129         struct rte_flow_item items[] = {
6130                 {
6131                         .type = (enum rte_flow_item_type)
6132                                 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
6133                         .spec = &queue_spec,
6134                         .last = NULL,
6135                         .mask = &queue_mask,
6136                 },
6137                 {
6138                         .type = RTE_FLOW_ITEM_TYPE_END,
6139                 },
6140         };
6141         struct rte_flow_action_jump jump = {
6142                 .group = MLX5_HAIRPIN_TX_TABLE,
6143         };
6144         struct rte_flow_action actions[2];
6145         uint32_t flow_idx;
6146         struct rte_flow_error error;
6147
6148         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
6149         actions[0].conf = &jump;
6150         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
6151         flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6152                                 &attr, items, actions, false, &error);
6153         if (!flow_idx) {
6154                 DRV_LOG(DEBUG,
6155                         "Failed to create ctrl flow: rte_errno(%d),"
6156                         " type(%d), message(%s)",
6157                         rte_errno, error.type,
6158                         error.message ? error.message : " (no stated reason)");
6159                 return -rte_errno;
6160         }
6161         return 0;
6162 }
6163
6164 /**
6165  * Enable a control flow configured from the control plane.
6166  *
6167  * @param dev
6168  *   Pointer to Ethernet device.
6169  * @param eth_spec
6170  *   An Ethernet flow spec to apply.
6171  * @param eth_mask
6172  *   An Ethernet flow mask to apply.
6173  * @param vlan_spec
6174  *   A VLAN flow spec to apply.
6175  * @param vlan_mask
6176  *   A VLAN flow mask to apply.
6177  *
6178  * @return
6179  *   0 on success, a negative errno value otherwise and rte_errno is set.
6180  */
6181 int
6182 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
6183                     struct rte_flow_item_eth *eth_spec,
6184                     struct rte_flow_item_eth *eth_mask,
6185                     struct rte_flow_item_vlan *vlan_spec,
6186                     struct rte_flow_item_vlan *vlan_mask)
6187 {
6188         struct mlx5_priv *priv = dev->data->dev_private;
6189         const struct rte_flow_attr attr = {
6190                 .ingress = 1,
6191                 .priority = MLX5_FLOW_PRIO_RSVD,
6192         };
6193         struct rte_flow_item items[] = {
6194                 {
6195                         .type = RTE_FLOW_ITEM_TYPE_ETH,
6196                         .spec = eth_spec,
6197                         .last = NULL,
6198                         .mask = eth_mask,
6199                 },
6200                 {
6201                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
6202                                               RTE_FLOW_ITEM_TYPE_END,
6203                         .spec = vlan_spec,
6204                         .last = NULL,
6205                         .mask = vlan_mask,
6206                 },
6207                 {
6208                         .type = RTE_FLOW_ITEM_TYPE_END,
6209                 },
6210         };
6211         uint16_t queue[priv->reta_idx_n];
6212         struct rte_flow_action_rss action_rss = {
6213                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
6214                 .level = 0,
6215                 .types = priv->rss_conf.rss_hf,
6216                 .key_len = priv->rss_conf.rss_key_len,
6217                 .queue_num = priv->reta_idx_n,
6218                 .key = priv->rss_conf.rss_key,
6219                 .queue = queue,
6220         };
6221         struct rte_flow_action actions[] = {
6222                 {
6223                         .type = RTE_FLOW_ACTION_TYPE_RSS,
6224                         .conf = &action_rss,
6225                 },
6226                 {
6227                         .type = RTE_FLOW_ACTION_TYPE_END,
6228                 },
6229         };
6230         uint32_t flow_idx;
6231         struct rte_flow_error error;
6232         unsigned int i;
6233
6234         if (!priv->reta_idx_n || !priv->rxqs_n) {
6235                 return 0;
6236         }
6237         if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
6238                 action_rss.types = 0;
6239         for (i = 0; i != priv->reta_idx_n; ++i)
6240                 queue[i] = (*priv->reta_idx)[i];
6241         flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6242                                 &attr, items, actions, false, &error);
6243         if (!flow_idx)
6244                 return -rte_errno;
6245         return 0;
6246 }
6247
6248 /**
6249  * Enable a flow control configured from the control plane.
6250  *
6251  * @param dev
6252  *   Pointer to Ethernet device.
6253  * @param eth_spec
6254  *   An Ethernet flow spec to apply.
6255  * @param eth_mask
6256  *   An Ethernet flow mask to apply.
6257  *
6258  * @return
6259  *   0 on success, a negative errno value otherwise and rte_errno is set.
6260  */
6261 int
6262 mlx5_ctrl_flow(struct rte_eth_dev *dev,
6263                struct rte_flow_item_eth *eth_spec,
6264                struct rte_flow_item_eth *eth_mask)
6265 {
6266         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
6267 }
6268
6269 /**
6270  * Create default miss flow rule matching lacp traffic
6271  *
6272  * @param dev
6273  *   Pointer to Ethernet device.
6274  * @param eth_spec
6275  *   An Ethernet flow spec to apply.
6276  *
6277  * @return
6278  *   0 on success, a negative errno value otherwise and rte_errno is set.
6279  */
6280 int
6281 mlx5_flow_lacp_miss(struct rte_eth_dev *dev)
6282 {
6283         struct mlx5_priv *priv = dev->data->dev_private;
6284         /*
6285          * The LACP matching is done by only using ether type since using
6286          * a multicast dst mac causes kernel to give low priority to this flow.
6287          */
6288         static const struct rte_flow_item_eth lacp_spec = {
6289                 .type = RTE_BE16(0x8809),
6290         };
6291         static const struct rte_flow_item_eth lacp_mask = {
6292                 .type = 0xffff,
6293         };
6294         const struct rte_flow_attr attr = {
6295                 .ingress = 1,
6296         };
6297         struct rte_flow_item items[] = {
6298                 {
6299                         .type = RTE_FLOW_ITEM_TYPE_ETH,
6300                         .spec = &lacp_spec,
6301                         .mask = &lacp_mask,
6302                 },
6303                 {
6304                         .type = RTE_FLOW_ITEM_TYPE_END,
6305                 },
6306         };
6307         struct rte_flow_action actions[] = {
6308                 {
6309                         .type = (enum rte_flow_action_type)
6310                                 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS,
6311                 },
6312                 {
6313                         .type = RTE_FLOW_ACTION_TYPE_END,
6314                 },
6315         };
6316         struct rte_flow_error error;
6317         uint32_t flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6318                                 &attr, items, actions, false, &error);
6319
6320         if (!flow_idx)
6321                 return -rte_errno;
6322         return 0;
6323 }
6324
6325 /**
6326  * Destroy a flow.
6327  *
6328  * @see rte_flow_destroy()
6329  * @see rte_flow_ops
6330  */
6331 int
6332 mlx5_flow_destroy(struct rte_eth_dev *dev,
6333                   struct rte_flow *flow,
6334                   struct rte_flow_error *error __rte_unused)
6335 {
6336         struct mlx5_priv *priv = dev->data->dev_private;
6337
6338         flow_list_destroy(dev, &priv->flows, (uintptr_t)(void *)flow);
6339         return 0;
6340 }
6341
6342 /**
6343  * Destroy all flows.
6344  *
6345  * @see rte_flow_flush()
6346  * @see rte_flow_ops
6347  */
6348 int
6349 mlx5_flow_flush(struct rte_eth_dev *dev,
6350                 struct rte_flow_error *error __rte_unused)
6351 {
6352         struct mlx5_priv *priv = dev->data->dev_private;
6353
6354         mlx5_flow_list_flush(dev, &priv->flows, false);
6355         return 0;
6356 }
6357
6358 /**
6359  * Isolated mode.
6360  *
6361  * @see rte_flow_isolate()
6362  * @see rte_flow_ops
6363  */
6364 int
6365 mlx5_flow_isolate(struct rte_eth_dev *dev,
6366                   int enable,
6367                   struct rte_flow_error *error)
6368 {
6369         struct mlx5_priv *priv = dev->data->dev_private;
6370
6371         if (dev->data->dev_started) {
6372                 rte_flow_error_set(error, EBUSY,
6373                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6374                                    NULL,
6375                                    "port must be stopped first");
6376                 return -rte_errno;
6377         }
6378         priv->isolated = !!enable;
6379         if (enable)
6380                 dev->dev_ops = &mlx5_os_dev_ops_isolate;
6381         else
6382                 dev->dev_ops = &mlx5_os_dev_ops;
6383
6384         dev->rx_descriptor_status = mlx5_rx_descriptor_status;
6385         dev->tx_descriptor_status = mlx5_tx_descriptor_status;
6386
6387         return 0;
6388 }
6389
6390 /**
6391  * Query a flow.
6392  *
6393  * @see rte_flow_query()
6394  * @see rte_flow_ops
6395  */
6396 static int
6397 flow_drv_query(struct rte_eth_dev *dev,
6398                uint32_t flow_idx,
6399                const struct rte_flow_action *actions,
6400                void *data,
6401                struct rte_flow_error *error)
6402 {
6403         struct mlx5_priv *priv = dev->data->dev_private;
6404         const struct mlx5_flow_driver_ops *fops;
6405         struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
6406                                                [MLX5_IPOOL_RTE_FLOW],
6407                                                flow_idx);
6408         enum mlx5_flow_drv_type ftype;
6409
6410         if (!flow) {
6411                 return rte_flow_error_set(error, ENOENT,
6412                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6413                           NULL,
6414                           "invalid flow handle");
6415         }
6416         ftype = flow->drv_type;
6417         MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
6418         fops = flow_get_drv_ops(ftype);
6419
6420         return fops->query(dev, flow, actions, data, error);
6421 }
6422
6423 /**
6424  * Query a flow.
6425  *
6426  * @see rte_flow_query()
6427  * @see rte_flow_ops
6428  */
6429 int
6430 mlx5_flow_query(struct rte_eth_dev *dev,
6431                 struct rte_flow *flow,
6432                 const struct rte_flow_action *actions,
6433                 void *data,
6434                 struct rte_flow_error *error)
6435 {
6436         int ret;
6437
6438         ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data,
6439                              error);
6440         if (ret < 0)
6441                 return ret;
6442         return 0;
6443 }
6444
6445 /**
6446  * Manage filter operations.
6447  *
6448  * @param dev
6449  *   Pointer to Ethernet device structure.
6450  * @param filter_type
6451  *   Filter type.
6452  * @param filter_op
6453  *   Operation to perform.
6454  * @param arg
6455  *   Pointer to operation-specific structure.
6456  *
6457  * @return
6458  *   0 on success, a negative errno value otherwise and rte_errno is set.
6459  */
6460 int
6461 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
6462                      enum rte_filter_type filter_type,
6463                      enum rte_filter_op filter_op,
6464                      void *arg)
6465 {
6466         switch (filter_type) {
6467         case RTE_ETH_FILTER_GENERIC:
6468                 if (filter_op != RTE_ETH_FILTER_GET) {
6469                         rte_errno = EINVAL;
6470                         return -rte_errno;
6471                 }
6472                 *(const void **)arg = &mlx5_flow_ops;
6473                 return 0;
6474         default:
6475                 DRV_LOG(ERR, "port %u filter type (%d) not supported",
6476                         dev->data->port_id, filter_type);
6477                 rte_errno = ENOTSUP;
6478                 return -rte_errno;
6479         }
6480         return 0;
6481 }
6482
6483 /**
6484  * Create the needed meter and suffix tables.
6485  *
6486  * @param[in] dev
6487  *   Pointer to Ethernet device.
6488  * @param[in] fm
6489  *   Pointer to the flow meter.
6490  *
6491  * @return
6492  *   Pointer to table set on success, NULL otherwise.
6493  */
6494 struct mlx5_meter_domains_infos *
6495 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
6496                           const struct mlx5_flow_meter *fm)
6497 {
6498         const struct mlx5_flow_driver_ops *fops;
6499
6500         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6501         return fops->create_mtr_tbls(dev, fm);
6502 }
6503
6504 /**
6505  * Destroy the meter table set.
6506  *
6507  * @param[in] dev
6508  *   Pointer to Ethernet device.
6509  * @param[in] tbl
6510  *   Pointer to the meter table set.
6511  *
6512  * @return
6513  *   0 on success.
6514  */
6515 int
6516 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
6517                            struct mlx5_meter_domains_infos *tbls)
6518 {
6519         const struct mlx5_flow_driver_ops *fops;
6520
6521         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6522         return fops->destroy_mtr_tbls(dev, tbls);
6523 }
6524
6525 /**
6526  * Create policer rules.
6527  *
6528  * @param[in] dev
6529  *   Pointer to Ethernet device.
6530  * @param[in] fm
6531  *   Pointer to flow meter structure.
6532  * @param[in] attr
6533  *   Pointer to flow attributes.
6534  *
6535  * @return
6536  *   0 on success, -1 otherwise.
6537  */
6538 int
6539 mlx5_flow_create_policer_rules(struct rte_eth_dev *dev,
6540                                struct mlx5_flow_meter *fm,
6541                                const struct rte_flow_attr *attr)
6542 {
6543         const struct mlx5_flow_driver_ops *fops;
6544
6545         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6546         return fops->create_policer_rules(dev, fm, attr);
6547 }
6548
6549 /**
6550  * Destroy policer rules.
6551  *
6552  * @param[in] fm
6553  *   Pointer to flow meter structure.
6554  * @param[in] attr
6555  *   Pointer to flow attributes.
6556  *
6557  * @return
6558  *   0 on success, -1 otherwise.
6559  */
6560 int
6561 mlx5_flow_destroy_policer_rules(struct rte_eth_dev *dev,
6562                                 struct mlx5_flow_meter *fm,
6563                                 const struct rte_flow_attr *attr)
6564 {
6565         const struct mlx5_flow_driver_ops *fops;
6566
6567         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6568         return fops->destroy_policer_rules(dev, fm, attr);
6569 }
6570
6571 /**
6572  * Allocate a counter.
6573  *
6574  * @param[in] dev
6575  *   Pointer to Ethernet device structure.
6576  *
6577  * @return
6578  *   Index to allocated counter  on success, 0 otherwise.
6579  */
6580 uint32_t
6581 mlx5_counter_alloc(struct rte_eth_dev *dev)
6582 {
6583         const struct mlx5_flow_driver_ops *fops;
6584         struct rte_flow_attr attr = { .transfer = 0 };
6585
6586         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
6587                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6588                 return fops->counter_alloc(dev);
6589         }
6590         DRV_LOG(ERR,
6591                 "port %u counter allocate is not supported.",
6592                  dev->data->port_id);
6593         return 0;
6594 }
6595
6596 /**
6597  * Free a counter.
6598  *
6599  * @param[in] dev
6600  *   Pointer to Ethernet device structure.
6601  * @param[in] cnt
6602  *   Index to counter to be free.
6603  */
6604 void
6605 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
6606 {
6607         const struct mlx5_flow_driver_ops *fops;
6608         struct rte_flow_attr attr = { .transfer = 0 };
6609
6610         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
6611                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6612                 fops->counter_free(dev, cnt);
6613                 return;
6614         }
6615         DRV_LOG(ERR,
6616                 "port %u counter free is not supported.",
6617                  dev->data->port_id);
6618 }
6619
6620 /**
6621  * Query counter statistics.
6622  *
6623  * @param[in] dev
6624  *   Pointer to Ethernet device structure.
6625  * @param[in] cnt
6626  *   Index to counter to query.
6627  * @param[in] clear
6628  *   Set to clear counter statistics.
6629  * @param[out] pkts
6630  *   The counter hits packets number to save.
6631  * @param[out] bytes
6632  *   The counter hits bytes number to save.
6633  *
6634  * @return
6635  *   0 on success, a negative errno value otherwise.
6636  */
6637 int
6638 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
6639                    bool clear, uint64_t *pkts, uint64_t *bytes)
6640 {
6641         const struct mlx5_flow_driver_ops *fops;
6642         struct rte_flow_attr attr = { .transfer = 0 };
6643
6644         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
6645                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6646                 return fops->counter_query(dev, cnt, clear, pkts, bytes);
6647         }
6648         DRV_LOG(ERR,
6649                 "port %u counter query is not supported.",
6650                  dev->data->port_id);
6651         return -ENOTSUP;
6652 }
6653
6654 /**
6655  * Allocate a new memory for the counter values wrapped by all the needed
6656  * management.
6657  *
6658  * @param[in] sh
6659  *   Pointer to mlx5_dev_ctx_shared object.
6660  *
6661  * @return
6662  *   0 on success, a negative errno value otherwise.
6663  */
6664 static int
6665 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh)
6666 {
6667         struct mlx5_devx_mkey_attr mkey_attr;
6668         struct mlx5_counter_stats_mem_mng *mem_mng;
6669         volatile struct flow_counter_stats *raw_data;
6670         int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES;
6671         int size = (sizeof(struct flow_counter_stats) *
6672                         MLX5_COUNTERS_PER_POOL +
6673                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
6674                         sizeof(struct mlx5_counter_stats_mem_mng);
6675         size_t pgsize = rte_mem_page_size();
6676         uint8_t *mem;
6677         int i;
6678
6679         if (pgsize == (size_t)-1) {
6680                 DRV_LOG(ERR, "Failed to get mem page size");
6681                 rte_errno = ENOMEM;
6682                 return -ENOMEM;
6683         }
6684         mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY);
6685         if (!mem) {
6686                 rte_errno = ENOMEM;
6687                 return -ENOMEM;
6688         }
6689         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
6690         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
6691         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
6692                                                  IBV_ACCESS_LOCAL_WRITE);
6693         if (!mem_mng->umem) {
6694                 rte_errno = errno;
6695                 mlx5_free(mem);
6696                 return -rte_errno;
6697         }
6698         mkey_attr.addr = (uintptr_t)mem;
6699         mkey_attr.size = size;
6700         mkey_attr.umem_id = mlx5_os_get_umem_id(mem_mng->umem);
6701         mkey_attr.pd = sh->pdn;
6702         mkey_attr.log_entity_size = 0;
6703         mkey_attr.pg_access = 0;
6704         mkey_attr.klm_array = NULL;
6705         mkey_attr.klm_num = 0;
6706         mkey_attr.relaxed_ordering_write = sh->cmng.relaxed_ordering_write;
6707         mkey_attr.relaxed_ordering_read = sh->cmng.relaxed_ordering_read;
6708         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
6709         if (!mem_mng->dm) {
6710                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
6711                 rte_errno = errno;
6712                 mlx5_free(mem);
6713                 return -rte_errno;
6714         }
6715         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
6716         raw_data = (volatile struct flow_counter_stats *)mem;
6717         for (i = 0; i < raws_n; ++i) {
6718                 mem_mng->raws[i].mem_mng = mem_mng;
6719                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
6720         }
6721         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
6722                 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws,
6723                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i,
6724                                  next);
6725         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
6726         sh->cmng.mem_mng = mem_mng;
6727         return 0;
6728 }
6729
6730 /**
6731  * Set the statistic memory to the new counter pool.
6732  *
6733  * @param[in] sh
6734  *   Pointer to mlx5_dev_ctx_shared object.
6735  * @param[in] pool
6736  *   Pointer to the pool to set the statistic memory.
6737  *
6738  * @return
6739  *   0 on success, a negative errno value otherwise.
6740  */
6741 static int
6742 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh,
6743                                struct mlx5_flow_counter_pool *pool)
6744 {
6745         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
6746         /* Resize statistic memory once used out. */
6747         if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) &&
6748             mlx5_flow_create_counter_stat_mem_mng(sh)) {
6749                 DRV_LOG(ERR, "Cannot resize counter stat mem.");
6750                 return -1;
6751         }
6752         rte_spinlock_lock(&pool->sl);
6753         pool->raw = cmng->mem_mng->raws + pool->index %
6754                     MLX5_CNT_CONTAINER_RESIZE;
6755         rte_spinlock_unlock(&pool->sl);
6756         pool->raw_hw = NULL;
6757         return 0;
6758 }
6759
6760 #define MLX5_POOL_QUERY_FREQ_US 1000000
6761
6762 /**
6763  * Set the periodic procedure for triggering asynchronous batch queries for all
6764  * the counter pools.
6765  *
6766  * @param[in] sh
6767  *   Pointer to mlx5_dev_ctx_shared object.
6768  */
6769 void
6770 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh)
6771 {
6772         uint32_t pools_n, us;
6773
6774         pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED);
6775         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
6776         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
6777         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
6778                 sh->cmng.query_thread_on = 0;
6779                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
6780         } else {
6781                 sh->cmng.query_thread_on = 1;
6782         }
6783 }
6784
6785 /**
6786  * The periodic procedure for triggering asynchronous batch queries for all the
6787  * counter pools. This function is probably called by the host thread.
6788  *
6789  * @param[in] arg
6790  *   The parameter for the alarm process.
6791  */
6792 void
6793 mlx5_flow_query_alarm(void *arg)
6794 {
6795         struct mlx5_dev_ctx_shared *sh = arg;
6796         int ret;
6797         uint16_t pool_index = sh->cmng.pool_index;
6798         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
6799         struct mlx5_flow_counter_pool *pool;
6800         uint16_t n_valid;
6801
6802         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
6803                 goto set_alarm;
6804         rte_spinlock_lock(&cmng->pool_update_sl);
6805         pool = cmng->pools[pool_index];
6806         n_valid = cmng->n_valid;
6807         rte_spinlock_unlock(&cmng->pool_update_sl);
6808         /* Set the statistic memory to the new created pool. */
6809         if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool)))
6810                 goto set_alarm;
6811         if (pool->raw_hw)
6812                 /* There is a pool query in progress. */
6813                 goto set_alarm;
6814         pool->raw_hw =
6815                 LIST_FIRST(&sh->cmng.free_stat_raws);
6816         if (!pool->raw_hw)
6817                 /* No free counter statistics raw memory. */
6818                 goto set_alarm;
6819         /*
6820          * Identify the counters released between query trigger and query
6821          * handle more efficiently. The counter released in this gap period
6822          * should wait for a new round of query as the new arrived packets
6823          * will not be taken into account.
6824          */
6825         pool->query_gen++;
6826         ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0,
6827                                                MLX5_COUNTERS_PER_POOL,
6828                                                NULL, NULL,
6829                                                pool->raw_hw->mem_mng->dm->id,
6830                                                (void *)(uintptr_t)
6831                                                pool->raw_hw->data,
6832                                                sh->devx_comp,
6833                                                (uint64_t)(uintptr_t)pool);
6834         if (ret) {
6835                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
6836                         " %d", pool->min_dcs->id);
6837                 pool->raw_hw = NULL;
6838                 goto set_alarm;
6839         }
6840         LIST_REMOVE(pool->raw_hw, next);
6841         sh->cmng.pending_queries++;
6842         pool_index++;
6843         if (pool_index >= n_valid)
6844                 pool_index = 0;
6845 set_alarm:
6846         sh->cmng.pool_index = pool_index;
6847         mlx5_set_query_alarm(sh);
6848 }
6849
6850 /**
6851  * Check and callback event for new aged flow in the counter pool
6852  *
6853  * @param[in] sh
6854  *   Pointer to mlx5_dev_ctx_shared object.
6855  * @param[in] pool
6856  *   Pointer to Current counter pool.
6857  */
6858 static void
6859 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh,
6860                    struct mlx5_flow_counter_pool *pool)
6861 {
6862         struct mlx5_priv *priv;
6863         struct mlx5_flow_counter *cnt;
6864         struct mlx5_age_info *age_info;
6865         struct mlx5_age_param *age_param;
6866         struct mlx5_counter_stats_raw *cur = pool->raw_hw;
6867         struct mlx5_counter_stats_raw *prev = pool->raw;
6868         const uint64_t curr_time = MLX5_CURR_TIME_SEC;
6869         const uint32_t time_delta = curr_time - pool->time_of_last_age_check;
6870         uint16_t expected = AGE_CANDIDATE;
6871         uint32_t i;
6872
6873         pool->time_of_last_age_check = curr_time;
6874         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
6875                 cnt = MLX5_POOL_GET_CNT(pool, i);
6876                 age_param = MLX5_CNT_TO_AGE(cnt);
6877                 if (__atomic_load_n(&age_param->state,
6878                                     __ATOMIC_RELAXED) != AGE_CANDIDATE)
6879                         continue;
6880                 if (cur->data[i].hits != prev->data[i].hits) {
6881                         __atomic_store_n(&age_param->sec_since_last_hit, 0,
6882                                          __ATOMIC_RELAXED);
6883                         continue;
6884                 }
6885                 if (__atomic_add_fetch(&age_param->sec_since_last_hit,
6886                                        time_delta,
6887                                        __ATOMIC_RELAXED) <= age_param->timeout)
6888                         continue;
6889                 /**
6890                  * Hold the lock first, or if between the
6891                  * state AGE_TMOUT and tailq operation the
6892                  * release happened, the release procedure
6893                  * may delete a non-existent tailq node.
6894                  */
6895                 priv = rte_eth_devices[age_param->port_id].data->dev_private;
6896                 age_info = GET_PORT_AGE_INFO(priv);
6897                 rte_spinlock_lock(&age_info->aged_sl);
6898                 if (__atomic_compare_exchange_n(&age_param->state, &expected,
6899                                                 AGE_TMOUT, false,
6900                                                 __ATOMIC_RELAXED,
6901                                                 __ATOMIC_RELAXED)) {
6902                         TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next);
6903                         MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW);
6904                 }
6905                 rte_spinlock_unlock(&age_info->aged_sl);
6906         }
6907         mlx5_age_event_prepare(sh);
6908 }
6909
6910 /**
6911  * Handler for the HW respond about ready values from an asynchronous batch
6912  * query. This function is probably called by the host thread.
6913  *
6914  * @param[in] sh
6915  *   The pointer to the shared device context.
6916  * @param[in] async_id
6917  *   The Devx async ID.
6918  * @param[in] status
6919  *   The status of the completion.
6920  */
6921 void
6922 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
6923                                   uint64_t async_id, int status)
6924 {
6925         struct mlx5_flow_counter_pool *pool =
6926                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
6927         struct mlx5_counter_stats_raw *raw_to_free;
6928         uint8_t query_gen = pool->query_gen ^ 1;
6929         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
6930         enum mlx5_counter_type cnt_type =
6931                 pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6932                                 MLX5_COUNTER_TYPE_ORIGIN;
6933
6934         if (unlikely(status)) {
6935                 raw_to_free = pool->raw_hw;
6936         } else {
6937                 raw_to_free = pool->raw;
6938                 if (pool->is_aged)
6939                         mlx5_flow_aging_check(sh, pool);
6940                 rte_spinlock_lock(&pool->sl);
6941                 pool->raw = pool->raw_hw;
6942                 rte_spinlock_unlock(&pool->sl);
6943                 /* Be sure the new raw counters data is updated in memory. */
6944                 rte_io_wmb();
6945                 if (!TAILQ_EMPTY(&pool->counters[query_gen])) {
6946                         rte_spinlock_lock(&cmng->csl[cnt_type]);
6947                         TAILQ_CONCAT(&cmng->counters[cnt_type],
6948                                      &pool->counters[query_gen], next);
6949                         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6950                 }
6951         }
6952         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
6953         pool->raw_hw = NULL;
6954         sh->cmng.pending_queries--;
6955 }
6956
6957 static const struct mlx5_flow_tbl_data_entry  *
6958 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark)
6959 {
6960         struct mlx5_priv *priv = dev->data->dev_private;
6961         struct mlx5_dev_ctx_shared *sh = priv->sh;
6962         struct mlx5_hlist_entry *he;
6963         union tunnel_offload_mark mbits = { .val = mark };
6964         union mlx5_flow_tbl_key table_key = {
6965                 {
6966                         .table_id = tunnel_id_to_flow_tbl(mbits.table_id),
6967                         .dummy = 0,
6968                         .domain = !!mbits.transfer,
6969                         .direction = 0,
6970                 }
6971         };
6972         he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, NULL);
6973         return he ?
6974                container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL;
6975 }
6976
6977 static void
6978 mlx5_flow_tunnel_grp2tbl_remove_cb(struct mlx5_hlist *list,
6979                                    struct mlx5_hlist_entry *entry)
6980 {
6981         struct mlx5_dev_ctx_shared *sh = list->ctx;
6982         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
6983
6984         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
6985                         tunnel_flow_tbl_to_id(tte->flow_table));
6986         mlx5_free(tte);
6987 }
6988
6989 static struct mlx5_hlist_entry *
6990 mlx5_flow_tunnel_grp2tbl_create_cb(struct mlx5_hlist *list,
6991                                    uint64_t key __rte_unused,
6992                                    void *ctx __rte_unused)
6993 {
6994         struct mlx5_dev_ctx_shared *sh = list->ctx;
6995         struct tunnel_tbl_entry *tte;
6996
6997         tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
6998                           sizeof(*tte), 0,
6999                           SOCKET_ID_ANY);
7000         if (!tte)
7001                 goto err;
7002         mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
7003                           &tte->flow_table);
7004         if (tte->flow_table >= MLX5_MAX_TABLES) {
7005                 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.",
7006                         tte->flow_table);
7007                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
7008                                 tte->flow_table);
7009                 goto err;
7010         } else if (!tte->flow_table) {
7011                 goto err;
7012         }
7013         tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table);
7014         return &tte->hash;
7015 err:
7016         if (tte)
7017                 mlx5_free(tte);
7018         return NULL;
7019 }
7020
7021 static uint32_t
7022 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
7023                                 const struct mlx5_flow_tunnel *tunnel,
7024                                 uint32_t group, uint32_t *table,
7025                                 struct rte_flow_error *error)
7026 {
7027         struct mlx5_hlist_entry *he;
7028         struct tunnel_tbl_entry *tte;
7029         union tunnel_tbl_key key = {
7030                 .tunnel_id = tunnel ? tunnel->tunnel_id : 0,
7031                 .group = group
7032         };
7033         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
7034         struct mlx5_hlist *group_hash;
7035
7036         group_hash = tunnel ? tunnel->groups : thub->groups;
7037         he = mlx5_hlist_register(group_hash, key.val, NULL);
7038         if (!he)
7039                 return rte_flow_error_set(error, EINVAL,
7040                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
7041                                           NULL,
7042                                           "tunnel group index not supported");
7043         tte = container_of(he, typeof(*tte), hash);
7044         *table = tte->flow_table;
7045         DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x",
7046                 dev->data->port_id, key.tunnel_id, group, *table);
7047         return 0;
7048 }
7049
7050 static int
7051 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table,
7052                     struct flow_grp_info grp_info, struct rte_flow_error *error)
7053 {
7054         if (grp_info.transfer && grp_info.external && grp_info.fdb_def_rule) {
7055                 if (group == UINT32_MAX)
7056                         return rte_flow_error_set
7057                                                 (error, EINVAL,
7058                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
7059                                                  NULL,
7060                                                  "group index not supported");
7061                 *table = group + 1;
7062         } else {
7063                 *table = group;
7064         }
7065         DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table);
7066         return 0;
7067 }
7068
7069 /**
7070  * Translate the rte_flow group index to HW table value.
7071  *
7072  * If tunnel offload is disabled, all group ids converted to flow table
7073  * id using the standard method.
7074  * If tunnel offload is enabled, group id can be converted using the
7075  * standard or tunnel conversion method. Group conversion method
7076  * selection depends on flags in `grp_info` parameter:
7077  * - Internal (grp_info.external == 0) groups conversion uses the
7078  *   standard method.
7079  * - Group ids in JUMP action converted with the tunnel conversion.
7080  * - Group id in rule attribute conversion depends on a rule type and
7081  *   group id value:
7082  *   ** non zero group attributes converted with the tunnel method
7083  *   ** zero group attribute in non-tunnel rule is converted using the
7084  *      standard method - there's only one root table
7085  *   ** zero group attribute in steer tunnel rule is converted with the
7086  *      standard method - single root table
7087  *   ** zero group attribute in match tunnel rule is a special OvS
7088  *      case: that value is used for portability reasons. That group
7089  *      id is converted with the tunnel conversion method.
7090  *
7091  * @param[in] dev
7092  *   Port device
7093  * @param[in] tunnel
7094  *   PMD tunnel offload object
7095  * @param[in] group
7096  *   rte_flow group index value.
7097  * @param[out] table
7098  *   HW table value.
7099  * @param[in] grp_info
7100  *   flags used for conversion
7101  * @param[out] error
7102  *   Pointer to error structure.
7103  *
7104  * @return
7105  *   0 on success, a negative errno value otherwise and rte_errno is set.
7106  */
7107 int
7108 mlx5_flow_group_to_table(struct rte_eth_dev *dev,
7109                          const struct mlx5_flow_tunnel *tunnel,
7110                          uint32_t group, uint32_t *table,
7111                          struct flow_grp_info grp_info,
7112                          struct rte_flow_error *error)
7113 {
7114         int ret;
7115         bool standard_translation;
7116
7117         if (!grp_info.skip_scale && grp_info.external &&
7118             group < MLX5_MAX_TABLES_EXTERNAL)
7119                 group *= MLX5_FLOW_TABLE_FACTOR;
7120         if (is_tunnel_offload_active(dev)) {
7121                 standard_translation = !grp_info.external ||
7122                                         grp_info.std_tbl_fix;
7123         } else {
7124                 standard_translation = true;
7125         }
7126         DRV_LOG(DEBUG,
7127                 "port %u group=%#x transfer=%d external=%d fdb_def_rule=%d translate=%s",
7128                 dev->data->port_id, group, grp_info.transfer,
7129                 grp_info.external, grp_info.fdb_def_rule,
7130                 standard_translation ? "STANDARD" : "TUNNEL");
7131         if (standard_translation)
7132                 ret = flow_group_to_table(dev->data->port_id, group, table,
7133                                           grp_info, error);
7134         else
7135                 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group,
7136                                                       table, error);
7137
7138         return ret;
7139 }
7140
7141 /**
7142  * Discover availability of metadata reg_c's.
7143  *
7144  * Iteratively use test flows to check availability.
7145  *
7146  * @param[in] dev
7147  *   Pointer to the Ethernet device structure.
7148  *
7149  * @return
7150  *   0 on success, a negative errno value otherwise and rte_errno is set.
7151  */
7152 int
7153 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
7154 {
7155         struct mlx5_priv *priv = dev->data->dev_private;
7156         struct mlx5_dev_config *config = &priv->config;
7157         enum modify_reg idx;
7158         int n = 0;
7159
7160         /* reg_c[0] and reg_c[1] are reserved. */
7161         config->flow_mreg_c[n++] = REG_C_0;
7162         config->flow_mreg_c[n++] = REG_C_1;
7163         /* Discover availability of other reg_c's. */
7164         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
7165                 struct rte_flow_attr attr = {
7166                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
7167                         .priority = MLX5_FLOW_PRIO_RSVD,
7168                         .ingress = 1,
7169                 };
7170                 struct rte_flow_item items[] = {
7171                         [0] = {
7172                                 .type = RTE_FLOW_ITEM_TYPE_END,
7173                         },
7174                 };
7175                 struct rte_flow_action actions[] = {
7176                         [0] = {
7177                                 .type = (enum rte_flow_action_type)
7178                                         MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
7179                                 .conf = &(struct mlx5_flow_action_copy_mreg){
7180                                         .src = REG_C_1,
7181                                         .dst = idx,
7182                                 },
7183                         },
7184                         [1] = {
7185                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
7186                                 .conf = &(struct rte_flow_action_jump){
7187                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
7188                                 },
7189                         },
7190                         [2] = {
7191                                 .type = RTE_FLOW_ACTION_TYPE_END,
7192                         },
7193                 };
7194                 uint32_t flow_idx;
7195                 struct rte_flow *flow;
7196                 struct rte_flow_error error;
7197
7198                 if (!config->dv_flow_en)
7199                         break;
7200                 /* Create internal flow, validation skips copy action. */
7201                 flow_idx = flow_list_create(dev, NULL, &attr, items,
7202                                             actions, false, &error);
7203                 flow = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW],
7204                                       flow_idx);
7205                 if (!flow)
7206                         continue;
7207                 config->flow_mreg_c[n++] = idx;
7208                 flow_list_destroy(dev, NULL, flow_idx);
7209         }
7210         for (; n < MLX5_MREG_C_NUM; ++n)
7211                 config->flow_mreg_c[n] = REG_NON;
7212         return 0;
7213 }
7214
7215 /**
7216  * Dump flow raw hw data to file
7217  *
7218  * @param[in] dev
7219  *    The pointer to Ethernet device.
7220  * @param[in] file
7221  *   A pointer to a file for output.
7222  * @param[out] error
7223  *   Perform verbose error reporting if not NULL. PMDs initialize this
7224  *   structure in case of error only.
7225  * @return
7226  *   0 on success, a nagative value otherwise.
7227  */
7228 int
7229 mlx5_flow_dev_dump(struct rte_eth_dev *dev,
7230                    FILE *file,
7231                    struct rte_flow_error *error __rte_unused)
7232 {
7233         struct mlx5_priv *priv = dev->data->dev_private;
7234         struct mlx5_dev_ctx_shared *sh = priv->sh;
7235
7236         if (!priv->config.dv_flow_en) {
7237                 if (fputs("device dv flow disabled\n", file) <= 0)
7238                         return -errno;
7239                 return -ENOTSUP;
7240         }
7241         return mlx5_devx_cmd_flow_dump(sh->fdb_domain, sh->rx_domain,
7242                                        sh->tx_domain, file);
7243 }
7244
7245 /**
7246  * Get aged-out flows.
7247  *
7248  * @param[in] dev
7249  *   Pointer to the Ethernet device structure.
7250  * @param[in] context
7251  *   The address of an array of pointers to the aged-out flows contexts.
7252  * @param[in] nb_countexts
7253  *   The length of context array pointers.
7254  * @param[out] error
7255  *   Perform verbose error reporting if not NULL. Initialized in case of
7256  *   error only.
7257  *
7258  * @return
7259  *   how many contexts get in success, otherwise negative errno value.
7260  *   if nb_contexts is 0, return the amount of all aged contexts.
7261  *   if nb_contexts is not 0 , return the amount of aged flows reported
7262  *   in the context array.
7263  */
7264 int
7265 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
7266                         uint32_t nb_contexts, struct rte_flow_error *error)
7267 {
7268         const struct mlx5_flow_driver_ops *fops;
7269         struct rte_flow_attr attr = { .transfer = 0 };
7270
7271         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7272                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7273                 return fops->get_aged_flows(dev, contexts, nb_contexts,
7274                                                     error);
7275         }
7276         DRV_LOG(ERR,
7277                 "port %u get aged flows is not supported.",
7278                  dev->data->port_id);
7279         return -ENOTSUP;
7280 }
7281
7282 /* Wrapper for driver action_validate op callback */
7283 static int
7284 flow_drv_action_validate(struct rte_eth_dev *dev,
7285                          const struct rte_flow_shared_action_conf *conf,
7286                          const struct rte_flow_action *action,
7287                          const struct mlx5_flow_driver_ops *fops,
7288                          struct rte_flow_error *error)
7289 {
7290         static const char err_msg[] = "shared action validation unsupported";
7291
7292         if (!fops->action_validate) {
7293                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7294                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7295                                    NULL, err_msg);
7296                 return -rte_errno;
7297         }
7298         return fops->action_validate(dev, conf, action, error);
7299 }
7300
7301 /**
7302  * Destroys the shared action by handle.
7303  *
7304  * @param dev
7305  *   Pointer to Ethernet device structure.
7306  * @param[in] action
7307  *   Handle for the shared action to be destroyed.
7308  * @param[out] error
7309  *   Perform verbose error reporting if not NULL. PMDs initialize this
7310  *   structure in case of error only.
7311  *
7312  * @return
7313  *   0 on success, a negative errno value otherwise and rte_errno is set.
7314  *
7315  * @note: wrapper for driver action_create op callback.
7316  */
7317 static int
7318 mlx5_shared_action_destroy(struct rte_eth_dev *dev,
7319                            struct rte_flow_shared_action *action,
7320                            struct rte_flow_error *error)
7321 {
7322         static const char err_msg[] = "shared action destruction unsupported";
7323         struct rte_flow_attr attr = { .transfer = 0 };
7324         const struct mlx5_flow_driver_ops *fops =
7325                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7326
7327         if (!fops->action_destroy) {
7328                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7329                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7330                                    NULL, err_msg);
7331                 return -rte_errno;
7332         }
7333         return fops->action_destroy(dev, action, error);
7334 }
7335
7336 /* Wrapper for driver action_destroy op callback */
7337 static int
7338 flow_drv_action_update(struct rte_eth_dev *dev,
7339                        struct rte_flow_shared_action *action,
7340                        const void *action_conf,
7341                        const struct mlx5_flow_driver_ops *fops,
7342                        struct rte_flow_error *error)
7343 {
7344         static const char err_msg[] = "shared action update unsupported";
7345
7346         if (!fops->action_update) {
7347                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7348                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7349                                    NULL, err_msg);
7350                 return -rte_errno;
7351         }
7352         return fops->action_update(dev, action, action_conf, error);
7353 }
7354
7355 /* Wrapper for driver action_destroy op callback */
7356 static int
7357 flow_drv_action_query(struct rte_eth_dev *dev,
7358                       const struct rte_flow_shared_action *action,
7359                       void *data,
7360                       const struct mlx5_flow_driver_ops *fops,
7361                       struct rte_flow_error *error)
7362 {
7363         static const char err_msg[] = "shared action query unsupported";
7364
7365         if (!fops->action_query) {
7366                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7367                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7368                                    NULL, err_msg);
7369                 return -rte_errno;
7370         }
7371         return fops->action_query(dev, action, data, error);
7372 }
7373
7374 /**
7375  * Create shared action for reuse in multiple flow rules.
7376  *
7377  * @param dev
7378  *   Pointer to Ethernet device structure.
7379  * @param[in] action
7380  *   Action configuration for shared action creation.
7381  * @param[out] error
7382  *   Perform verbose error reporting if not NULL. PMDs initialize this
7383  *   structure in case of error only.
7384  * @return
7385  *   A valid handle in case of success, NULL otherwise and rte_errno is set.
7386  */
7387 static struct rte_flow_shared_action *
7388 mlx5_shared_action_create(struct rte_eth_dev *dev,
7389                           const struct rte_flow_shared_action_conf *conf,
7390                           const struct rte_flow_action *action,
7391                           struct rte_flow_error *error)
7392 {
7393         static const char err_msg[] = "shared action creation unsupported";
7394         struct rte_flow_attr attr = { .transfer = 0 };
7395         const struct mlx5_flow_driver_ops *fops =
7396                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7397
7398         if (flow_drv_action_validate(dev, conf, action, fops, error))
7399                 return NULL;
7400         if (!fops->action_create) {
7401                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7402                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7403                                    NULL, err_msg);
7404                 return NULL;
7405         }
7406         return fops->action_create(dev, conf, action, error);
7407 }
7408
7409 /**
7410  * Updates inplace the shared action configuration pointed by *action* handle
7411  * with the configuration provided as *action* argument.
7412  * The update of the shared action configuration effects all flow rules reusing
7413  * the action via handle.
7414  *
7415  * @param dev
7416  *   Pointer to Ethernet device structure.
7417  * @param[in] shared_action
7418  *   Handle for the shared action to be updated.
7419  * @param[in] action
7420  *   Action specification used to modify the action pointed by handle.
7421  *   *action* should be of same type with the action pointed by the *action*
7422  *   handle argument, otherwise considered as invalid.
7423  * @param[out] error
7424  *   Perform verbose error reporting if not NULL. PMDs initialize this
7425  *   structure in case of error only.
7426  *
7427  * @return
7428  *   0 on success, a negative errno value otherwise and rte_errno is set.
7429  */
7430 static int
7431 mlx5_shared_action_update(struct rte_eth_dev *dev,
7432                 struct rte_flow_shared_action *shared_action,
7433                 const struct rte_flow_action *action,
7434                 struct rte_flow_error *error)
7435 {
7436         struct rte_flow_attr attr = { .transfer = 0 };
7437         const struct mlx5_flow_driver_ops *fops =
7438                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7439         int ret;
7440
7441         ret = flow_drv_action_validate(dev, NULL, action, fops, error);
7442         if (ret)
7443                 return ret;
7444         return flow_drv_action_update(dev, shared_action, action->conf, fops,
7445                                       error);
7446 }
7447
7448 /**
7449  * Query the shared action by handle.
7450  *
7451  * This function allows retrieving action-specific data such as counters.
7452  * Data is gathered by special action which may be present/referenced in
7453  * more than one flow rule definition.
7454  *
7455  * \see RTE_FLOW_ACTION_TYPE_COUNT
7456  *
7457  * @param dev
7458  *   Pointer to Ethernet device structure.
7459  * @param[in] action
7460  *   Handle for the shared action to query.
7461  * @param[in, out] data
7462  *   Pointer to storage for the associated query data type.
7463  * @param[out] error
7464  *   Perform verbose error reporting if not NULL. PMDs initialize this
7465  *   structure in case of error only.
7466  *
7467  * @return
7468  *   0 on success, a negative errno value otherwise and rte_errno is set.
7469  */
7470 static int
7471 mlx5_shared_action_query(struct rte_eth_dev *dev,
7472                          const struct rte_flow_shared_action *action,
7473                          void *data,
7474                          struct rte_flow_error *error)
7475 {
7476         struct rte_flow_attr attr = { .transfer = 0 };
7477         const struct mlx5_flow_driver_ops *fops =
7478                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7479
7480         return flow_drv_action_query(dev, action, data, fops, error);
7481 }
7482
7483 /**
7484  * Destroy all shared actions.
7485  *
7486  * @param dev
7487  *   Pointer to Ethernet device.
7488  *
7489  * @return
7490  *   0 on success, a negative errno value otherwise and rte_errno is set.
7491  */
7492 int
7493 mlx5_shared_action_flush(struct rte_eth_dev *dev)
7494 {
7495         struct rte_flow_error error;
7496         struct mlx5_priv *priv = dev->data->dev_private;
7497         struct mlx5_shared_action_rss *action;
7498         int ret = 0;
7499         uint32_t idx;
7500
7501         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
7502                       priv->rss_shared_actions, idx, action, next) {
7503                 ret |= mlx5_shared_action_destroy(dev,
7504                        (struct rte_flow_shared_action *)(uintptr_t)idx, &error);
7505         }
7506         return ret;
7507 }
7508
7509 static void
7510 mlx5_flow_tunnel_free(struct rte_eth_dev *dev,
7511                       struct mlx5_flow_tunnel *tunnel)
7512 {
7513         struct mlx5_priv *priv = dev->data->dev_private;
7514
7515         DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x",
7516                 dev->data->port_id, tunnel->tunnel_id);
7517         RTE_VERIFY(!__atomic_load_n(&tunnel->refctn, __ATOMIC_RELAXED));
7518         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID],
7519                         tunnel->tunnel_id);
7520         mlx5_hlist_destroy(tunnel->groups);
7521         mlx5_free(tunnel);
7522 }
7523
7524 static struct mlx5_flow_tunnel *
7525 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id)
7526 {
7527         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
7528         struct mlx5_flow_tunnel *tun;
7529
7530         LIST_FOREACH(tun, &thub->tunnels, chain) {
7531                 if (tun->tunnel_id == id)
7532                         break;
7533         }
7534
7535         return tun;
7536 }
7537
7538 static struct mlx5_flow_tunnel *
7539 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev,
7540                           const struct rte_flow_tunnel *app_tunnel)
7541 {
7542         struct mlx5_priv *priv = dev->data->dev_private;
7543         struct mlx5_flow_tunnel *tunnel;
7544         uint32_t id;
7545
7546         mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
7547                           &id);
7548         if (id >= MLX5_MAX_TUNNELS) {
7549                 mlx5_ipool_free(priv->sh->ipool
7550                                 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], id);
7551                 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id);
7552                 return NULL;
7553         } else if (!id) {
7554                 return NULL;
7555         }
7556         /**
7557          * mlx5 flow tunnel is an auxlilary data structure
7558          * It's not part of IO. No need to allocate it from
7559          * huge pages pools dedicated for IO
7560          */
7561         tunnel = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*tunnel),
7562                              0, SOCKET_ID_ANY);
7563         if (!tunnel) {
7564                 mlx5_ipool_free(priv->sh->ipool
7565                                 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], id);
7566                 return NULL;
7567         }
7568         tunnel->groups = mlx5_hlist_create("tunnel groups", 1024, 0, 0,
7569                                            mlx5_flow_tunnel_grp2tbl_create_cb,
7570                                            NULL,
7571                                            mlx5_flow_tunnel_grp2tbl_remove_cb);
7572         if (!tunnel->groups) {
7573                 mlx5_ipool_free(priv->sh->ipool
7574                                 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], id);
7575                 mlx5_free(tunnel);
7576                 return NULL;
7577         }
7578         tunnel->groups->ctx = priv->sh;
7579         /* initiate new PMD tunnel */
7580         memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel));
7581         tunnel->tunnel_id = id;
7582         tunnel->action.type = (typeof(tunnel->action.type))
7583                               MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET;
7584         tunnel->action.conf = tunnel;
7585         tunnel->item.type = (typeof(tunnel->item.type))
7586                             MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL;
7587         tunnel->item.spec = tunnel;
7588         tunnel->item.last = NULL;
7589         tunnel->item.mask = NULL;
7590
7591         DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x",
7592                 dev->data->port_id, tunnel->tunnel_id);
7593
7594         return tunnel;
7595 }
7596
7597 static int
7598 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
7599                      const struct rte_flow_tunnel *app_tunnel,
7600                      struct mlx5_flow_tunnel **tunnel)
7601 {
7602         int ret;
7603         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
7604         struct mlx5_flow_tunnel *tun;
7605
7606         rte_spinlock_lock(&thub->sl);
7607         LIST_FOREACH(tun, &thub->tunnels, chain) {
7608                 if (!memcmp(app_tunnel, &tun->app_tunnel,
7609                             sizeof(*app_tunnel))) {
7610                         *tunnel = tun;
7611                         ret = 0;
7612                         break;
7613                 }
7614         }
7615         if (!tun) {
7616                 tun = mlx5_flow_tunnel_allocate(dev, app_tunnel);
7617                 if (tun) {
7618                         LIST_INSERT_HEAD(&thub->tunnels, tun, chain);
7619                         *tunnel = tun;
7620                 } else {
7621                         ret = -ENOMEM;
7622                 }
7623         }
7624         rte_spinlock_unlock(&thub->sl);
7625         if (tun)
7626                 __atomic_add_fetch(&tun->refctn, 1, __ATOMIC_RELAXED);
7627
7628         return ret;
7629 }
7630
7631 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id)
7632 {
7633         struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
7634
7635         if (!thub)
7636                 return;
7637         if (!LIST_EMPTY(&thub->tunnels))
7638                 DRV_LOG(WARNING, "port %u tunnels present\n", port_id);
7639         mlx5_hlist_destroy(thub->groups);
7640         mlx5_free(thub);
7641 }
7642
7643 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh)
7644 {
7645         int err;
7646         struct mlx5_flow_tunnel_hub *thub;
7647
7648         thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub),
7649                            0, SOCKET_ID_ANY);
7650         if (!thub)
7651                 return -ENOMEM;
7652         LIST_INIT(&thub->tunnels);
7653         rte_spinlock_init(&thub->sl);
7654         thub->groups = mlx5_hlist_create("flow groups", MLX5_MAX_TABLES, 0,
7655                                          0, mlx5_flow_tunnel_grp2tbl_create_cb,
7656                                          NULL,
7657                                          mlx5_flow_tunnel_grp2tbl_remove_cb);
7658         if (!thub->groups) {
7659                 err = -rte_errno;
7660                 goto err;
7661         }
7662         thub->groups->ctx = sh;
7663         sh->tunnel_hub = thub;
7664
7665         return 0;
7666
7667 err:
7668         if (thub->groups)
7669                 mlx5_hlist_destroy(thub->groups);
7670         if (thub)
7671                 mlx5_free(thub);
7672         return err;
7673 }
7674
7675 #ifndef HAVE_MLX5DV_DR
7676 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1))
7677 #else
7678 #define MLX5_DOMAIN_SYNC_FLOW \
7679         (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW)
7680 #endif
7681
7682 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
7683 {
7684         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
7685         const struct mlx5_flow_driver_ops *fops;
7686         int ret;
7687         struct rte_flow_attr attr = { .transfer = 0 };
7688
7689         fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7690         ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW);
7691         if (ret > 0)
7692                 ret = -ret;
7693         return ret;
7694 }