drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <stdbool.h>
  10 #include <sys/queue.h>
  11
  12 #include <rte_common.h>
  13 #include <rte_ether.h>
  14 #include <ethdev_driver.h>
  15 #include <rte_eal_paging.h>
  16 #include <rte_flow.h>
  17 #include <rte_cycles.h>
  18 #include <rte_flow_driver.h>
  19 #include <rte_malloc.h>
  20 #include <rte_ip.h>
  21
  22 #include <mlx5_glue.h>
  23 #include <mlx5_devx_cmds.h>
  24 #include <mlx5_prm.h>
  25 #include <mlx5_malloc.h>
  26
  27 #include "mlx5_defs.h"
  28 #include "mlx5.h"
  29 #include "mlx5_flow.h"
  30 #include "mlx5_flow_os.h"
  31 #include "mlx5_rx.h"
  32 #include "mlx5_tx.h"
  33 #include "mlx5_common_os.h"
  34 #include "rte_pmd_mlx5.h"
  35
  36 struct tunnel_default_miss_ctx {
  37         uint16_t *queue;
  38         __extension__
  39         union {
  40                 struct rte_flow_action_rss action_rss;
  41                 struct rte_flow_action_queue miss_queue;
  42                 struct rte_flow_action_jump miss_jump;
  43                 uint8_t raw[0];
  44         };
  45 };
  46
  47 static int
  48 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
  49                              struct rte_flow *flow,
  50                              const struct rte_flow_attr *attr,
  51                              const struct rte_flow_action *app_actions,
  52                              uint32_t flow_idx,
  53                              struct tunnel_default_miss_ctx *ctx,
  54                              struct rte_flow_error *error);
  55 static struct mlx5_flow_tunnel *
  56 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id);
  57 static void
  58 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel);
  59 static uint32_t
  60 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
  61                                 const struct mlx5_flow_tunnel *tunnel,
  62                                 uint32_t group, uint32_t *table,
  63                                 struct rte_flow_error *error);
  64
  65 static struct mlx5_flow_workspace *mlx5_flow_push_thread_workspace(void);
  66 static void mlx5_flow_pop_thread_workspace(void);
  67
  68
  69 /** Device flow drivers. */
  70 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  71
  72 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  73
  74 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  75         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  76 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  77         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  78 #endif
  79         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  80         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  81 };
  82
  83 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */
  84 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \
  85         (const int []){ \
  86                 __VA_ARGS__, 0, \
  87         }
  88
  89 /** Node object of input graph for mlx5_flow_expand_rss(). */
  90 struct mlx5_flow_expand_node {
  91         const int *const next;
  92         /**<
  93          * List of next node indexes. Index 0 is interpreted as a terminator.
  94          */
  95         const enum rte_flow_item_type type;
  96         /**< Pattern item type of current node. */
  97         uint64_t rss_types;
  98         /**<
  99          * RSS types bit-field associated with this node
 100          * (see ETH_RSS_* definitions).
 101          */
 102 };
 103
 104 /** Object returned by mlx5_flow_expand_rss(). */
 105 struct mlx5_flow_expand_rss {
 106         uint32_t entries;
 107         /**< Number of entries @p patterns and @p priorities. */
 108         struct {
 109                 struct rte_flow_item *pattern; /**< Expanded pattern array. */
 110                 uint32_t priority; /**< Priority offset for each expansion. */
 111         } entry[];
 112 };
 113
 114 static enum rte_flow_item_type
 115 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item)
 116 {
 117         enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID;
 118         uint16_t ether_type = 0;
 119         uint16_t ether_type_m;
 120         uint8_t ip_next_proto = 0;
 121         uint8_t ip_next_proto_m;
 122
 123         if (item == NULL || item->spec == NULL)
 124                 return ret;
 125         switch (item->type) {
 126         case RTE_FLOW_ITEM_TYPE_ETH:
 127                 if (item->mask)
 128                         ether_type_m = ((const struct rte_flow_item_eth *)
 129                                                 (item->mask))->type;
 130                 else
 131                         ether_type_m = rte_flow_item_eth_mask.type;
 132                 if (ether_type_m != RTE_BE16(0xFFFF))
 133                         break;
 134                 ether_type = ((const struct rte_flow_item_eth *)
 135                                 (item->spec))->type;
 136                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 137                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 138                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 139                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 140                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 141                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 142                 else
 143                         ret = RTE_FLOW_ITEM_TYPE_END;
 144                 break;
 145         case RTE_FLOW_ITEM_TYPE_VLAN:
 146                 if (item->mask)
 147                         ether_type_m = ((const struct rte_flow_item_vlan *)
 148                                                 (item->mask))->inner_type;
 149                 else
 150                         ether_type_m = rte_flow_item_vlan_mask.inner_type;
 151                 if (ether_type_m != RTE_BE16(0xFFFF))
 152                         break;
 153                 ether_type = ((const struct rte_flow_item_vlan *)
 154                                 (item->spec))->inner_type;
 155                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 156                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 157                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 158                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 159                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 160                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 161                 else
 162                         ret = RTE_FLOW_ITEM_TYPE_END;
 163                 break;
 164         case RTE_FLOW_ITEM_TYPE_IPV4:
 165                 if (item->mask)
 166                         ip_next_proto_m = ((const struct rte_flow_item_ipv4 *)
 167                                         (item->mask))->hdr.next_proto_id;
 168                 else
 169                         ip_next_proto_m =
 170                                 rte_flow_item_ipv4_mask.hdr.next_proto_id;
 171                 if (ip_next_proto_m != 0xFF)
 172                         break;
 173                 ip_next_proto = ((const struct rte_flow_item_ipv4 *)
 174                                 (item->spec))->hdr.next_proto_id;
 175                 if (ip_next_proto == IPPROTO_UDP)
 176                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 177                 else if (ip_next_proto == IPPROTO_TCP)
 178                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 179                 else if (ip_next_proto == IPPROTO_IP)
 180                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 181                 else if (ip_next_proto == IPPROTO_IPV6)
 182                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 183                 else
 184                         ret = RTE_FLOW_ITEM_TYPE_END;
 185                 break;
 186         case RTE_FLOW_ITEM_TYPE_IPV6:
 187                 if (item->mask)
 188                         ip_next_proto_m = ((const struct rte_flow_item_ipv6 *)
 189                                                 (item->mask))->hdr.proto;
 190                 else
 191                         ip_next_proto_m =
 192                                 rte_flow_item_ipv6_mask.hdr.proto;
 193                 if (ip_next_proto_m != 0xFF)
 194                         break;
 195                 ip_next_proto = ((const struct rte_flow_item_ipv6 *)
 196                                 (item->spec))->hdr.proto;
 197                 if (ip_next_proto == IPPROTO_UDP)
 198                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 199                 else if (ip_next_proto == IPPROTO_TCP)
 200                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 201                 else if (ip_next_proto == IPPROTO_IP)
 202                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 203                 else if (ip_next_proto == IPPROTO_IPV6)
 204                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 205                 else
 206                         ret = RTE_FLOW_ITEM_TYPE_END;
 207                 break;
 208         default:
 209                 ret = RTE_FLOW_ITEM_TYPE_VOID;
 210                 break;
 211         }
 212         return ret;
 213 }
 214
 215 #define MLX5_RSS_EXP_ELT_N 8
 216
 217 /**
 218  * Expand RSS flows into several possible flows according to the RSS hash
 219  * fields requested and the driver capabilities.
 220  *
 221  * @param[out] buf
 222  *   Buffer to store the result expansion.
 223  * @param[in] size
 224  *   Buffer size in bytes. If 0, @p buf can be NULL.
 225  * @param[in] pattern
 226  *   User flow pattern.
 227  * @param[in] types
 228  *   RSS types to expand (see ETH_RSS_* definitions).
 229  * @param[in] graph
 230  *   Input graph to expand @p pattern according to @p types.
 231  * @param[in] graph_root_index
 232  *   Index of root node in @p graph, typically 0.
 233  *
 234  * @return
 235  *   A positive value representing the size of @p buf in bytes regardless of
 236  *   @p size on success, a negative errno value otherwise and rte_errno is
 237  *   set, the following errors are defined:
 238  *
 239  *   -E2BIG: graph-depth @p graph is too deep.
 240  */
 241 static int
 242 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,
 243                      const struct rte_flow_item *pattern, uint64_t types,
 244                      const struct mlx5_flow_expand_node graph[],
 245                      int graph_root_index)
 246 {
 247         const struct rte_flow_item *item;
 248         const struct mlx5_flow_expand_node *node = &graph[graph_root_index];
 249         const int *next_node;
 250         const int *stack[MLX5_RSS_EXP_ELT_N];
 251         int stack_pos = 0;
 252         struct rte_flow_item flow_items[MLX5_RSS_EXP_ELT_N];
 253         unsigned int i;
 254         size_t lsize;
 255         size_t user_pattern_size = 0;
 256         void *addr = NULL;
 257         const struct mlx5_flow_expand_node *next = NULL;
 258         struct rte_flow_item missed_item;
 259         int missed = 0;
 260         int elt = 0;
 261         const struct rte_flow_item *last_item = NULL;
 262
 263         memset(&missed_item, 0, sizeof(missed_item));
 264         lsize = offsetof(struct mlx5_flow_expand_rss, entry) +
 265                 MLX5_RSS_EXP_ELT_N * sizeof(buf->entry[0]);
 266         if (lsize <= size) {
 267                 buf->entry[0].priority = 0;
 268                 buf->entry[0].pattern = (void *)&buf->entry[MLX5_RSS_EXP_ELT_N];
 269                 buf->entries = 0;
 270                 addr = buf->entry[0].pattern;
 271         }
 272         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 273                 if (item->type != RTE_FLOW_ITEM_TYPE_VOID)
 274                         last_item = item;
 275                 for (i = 0; node->next && node->next[i]; ++i) {
 276                         next = &graph[node->next[i]];
 277                         if (next->type == item->type)
 278                                 break;
 279                 }
 280                 if (next)
 281                         node = next;
 282                 user_pattern_size += sizeof(*item);
 283         }
 284         user_pattern_size += sizeof(*item); /* Handle END item. */
 285         lsize += user_pattern_size;
 286         /* Copy the user pattern in the first entry of the buffer. */
 287         if (lsize <= size) {
 288                 rte_memcpy(addr, pattern, user_pattern_size);
 289                 addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 290                 buf->entries = 1;
 291         }
 292         /* Start expanding. */
 293         memset(flow_items, 0, sizeof(flow_items));
 294         user_pattern_size -= sizeof(*item);
 295         /*
 296          * Check if the last valid item has spec set, need complete pattern,
 297          * and the pattern can be used for expansion.
 298          */
 299         missed_item.type = mlx5_flow_expand_rss_item_complete(last_item);
 300         if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) {
 301                 /* Item type END indicates expansion is not required. */
 302                 return lsize;
 303         }
 304         if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) {
 305                 next = NULL;
 306                 missed = 1;
 307                 for (i = 0; node->next && node->next[i]; ++i) {
 308                         next = &graph[node->next[i]];
 309                         if (next->type == missed_item.type) {
 310                                 flow_items[0].type = missed_item.type;
 311                                 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 312                                 break;
 313                         }
 314                         next = NULL;
 315                 }
 316         }
 317         if (next && missed) {
 318                 elt = 2; /* missed item + item end. */
 319                 node = next;
 320                 lsize += elt * sizeof(*item) + user_pattern_size;
 321                 if ((node->rss_types & types) && lsize <= size) {
 322                         buf->entry[buf->entries].priority = 1;
 323                         buf->entry[buf->entries].pattern = addr;
 324                         buf->entries++;
 325                         rte_memcpy(addr, buf->entry[0].pattern,
 326                                    user_pattern_size);
 327                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 328                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 329                         addr = (void *)(((uintptr_t)addr) +
 330                                         elt * sizeof(*item));
 331                 }
 332         }
 333         memset(flow_items, 0, sizeof(flow_items));
 334         next_node = node->next;
 335         stack[stack_pos] = next_node;
 336         node = next_node ? &graph[*next_node] : NULL;
 337         while (node) {
 338                 flow_items[stack_pos].type = node->type;
 339                 if (node->rss_types & types) {
 340                         /*
 341                          * compute the number of items to copy from the
 342                          * expansion and copy it.
 343                          * When the stack_pos is 0, there are 1 element in it,
 344                          * plus the addition END item.
 345                          */
 346                         elt = stack_pos + 2;
 347                         flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END;
 348                         lsize += elt * sizeof(*item) + user_pattern_size;
 349                         if (lsize <= size) {
 350                                 size_t n = elt * sizeof(*item);
 351
 352                                 buf->entry[buf->entries].priority =
 353                                         stack_pos + 1 + missed;
 354                                 buf->entry[buf->entries].pattern = addr;
 355                                 buf->entries++;
 356                                 rte_memcpy(addr, buf->entry[0].pattern,
 357                                            user_pattern_size);
 358                                 addr = (void *)(((uintptr_t)addr) +
 359                                                 user_pattern_size);
 360                                 rte_memcpy(addr, &missed_item,
 361                                            missed * sizeof(*item));
 362                                 addr = (void *)(((uintptr_t)addr) +
 363                                         missed * sizeof(*item));
 364                                 rte_memcpy(addr, flow_items, n);
 365                                 addr = (void *)(((uintptr_t)addr) + n);
 366                         }
 367                 }
 368                 /* Go deeper. */
 369                 if (node->next) {
 370                         next_node = node->next;
 371                         if (stack_pos++ == MLX5_RSS_EXP_ELT_N) {
 372                                 rte_errno = E2BIG;
 373                                 return -rte_errno;
 374                         }
 375                         stack[stack_pos] = next_node;
 376                 } else if (*(next_node + 1)) {
 377                         /* Follow up with the next possibility. */
 378                         ++next_node;
 379                 } else {
 380                         /* Move to the next path. */
 381                         if (stack_pos)
 382                                 next_node = stack[--stack_pos];
 383                         next_node++;
 384                         stack[stack_pos] = next_node;
 385                 }
 386                 node = *next_node ? &graph[*next_node] : NULL;
 387         };
 388         return lsize;
 389 }
 390
 391 enum mlx5_expansion {
 392         MLX5_EXPANSION_ROOT,
 393         MLX5_EXPANSION_ROOT_OUTER,
 394         MLX5_EXPANSION_ROOT_ETH_VLAN,
 395         MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
 396         MLX5_EXPANSION_OUTER_ETH,
 397         MLX5_EXPANSION_OUTER_ETH_VLAN,
 398         MLX5_EXPANSION_OUTER_VLAN,
 399         MLX5_EXPANSION_OUTER_IPV4,
 400         MLX5_EXPANSION_OUTER_IPV4_UDP,
 401         MLX5_EXPANSION_OUTER_IPV4_TCP,
 402         MLX5_EXPANSION_OUTER_IPV6,
 403         MLX5_EXPANSION_OUTER_IPV6_UDP,
 404         MLX5_EXPANSION_OUTER_IPV6_TCP,
 405         MLX5_EXPANSION_VXLAN,
 406         MLX5_EXPANSION_VXLAN_GPE,
 407         MLX5_EXPANSION_GRE,
 408         MLX5_EXPANSION_MPLS,
 409         MLX5_EXPANSION_ETH,
 410         MLX5_EXPANSION_ETH_VLAN,
 411         MLX5_EXPANSION_VLAN,
 412         MLX5_EXPANSION_IPV4,
 413         MLX5_EXPANSION_IPV4_UDP,
 414         MLX5_EXPANSION_IPV4_TCP,
 415         MLX5_EXPANSION_IPV6,
 416         MLX5_EXPANSION_IPV6_UDP,
 417         MLX5_EXPANSION_IPV6_TCP,
 418 };
 419
 420 /** Supported expansion of items. */
 421 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
 422         [MLX5_EXPANSION_ROOT] = {
 423                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 424                                                   MLX5_EXPANSION_IPV4,
 425                                                   MLX5_EXPANSION_IPV6),
 426                 .type = RTE_FLOW_ITEM_TYPE_END,
 427         },
 428         [MLX5_EXPANSION_ROOT_OUTER] = {
 429                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
 430                                                   MLX5_EXPANSION_OUTER_IPV4,
 431                                                   MLX5_EXPANSION_OUTER_IPV6),
 432                 .type = RTE_FLOW_ITEM_TYPE_END,
 433         },
 434         [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
 435                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
 436                 .type = RTE_FLOW_ITEM_TYPE_END,
 437         },
 438         [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
 439                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 440                                                 (MLX5_EXPANSION_OUTER_ETH_VLAN),
 441                 .type = RTE_FLOW_ITEM_TYPE_END,
 442         },
 443         [MLX5_EXPANSION_OUTER_ETH] = {
 444                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 445                                                   MLX5_EXPANSION_OUTER_IPV6,
 446                                                   MLX5_EXPANSION_MPLS),
 447                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 448                 .rss_types = 0,
 449         },
 450         [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
 451                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 452                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 453                 .rss_types = 0,
 454         },
 455         [MLX5_EXPANSION_OUTER_VLAN] = {
 456                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 457                                                   MLX5_EXPANSION_OUTER_IPV6),
 458                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 459         },
 460         [MLX5_EXPANSION_OUTER_IPV4] = {
 461                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 462                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 463                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 464                          MLX5_EXPANSION_GRE,
 465                          MLX5_EXPANSION_IPV4,
 466                          MLX5_EXPANSION_IPV6),
 467                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 468                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 469                         ETH_RSS_NONFRAG_IPV4_OTHER,
 470         },
 471         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 472                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 473                                                   MLX5_EXPANSION_VXLAN_GPE),
 474                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 475                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 476         },
 477         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 478                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 479                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 480         },
 481         [MLX5_EXPANSION_OUTER_IPV6] = {
 482                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 483                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 484                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 485                          MLX5_EXPANSION_IPV4,
 486                          MLX5_EXPANSION_IPV6,
 487                          MLX5_EXPANSION_GRE),
 488                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 489                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 490                         ETH_RSS_NONFRAG_IPV6_OTHER,
 491         },
 492         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 493                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 494                                                   MLX5_EXPANSION_VXLAN_GPE),
 495                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 496                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 497         },
 498         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 499                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 500                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 501         },
 502         [MLX5_EXPANSION_VXLAN] = {
 503                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 504                                                   MLX5_EXPANSION_IPV4,
 505                                                   MLX5_EXPANSION_IPV6),
 506                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 507         },
 508         [MLX5_EXPANSION_VXLAN_GPE] = {
 509                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 510                                                   MLX5_EXPANSION_IPV4,
 511                                                   MLX5_EXPANSION_IPV6),
 512                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 513         },
 514         [MLX5_EXPANSION_GRE] = {
 515                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 516                                                   MLX5_EXPANSION_IPV6),
 517                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 518         },
 519         [MLX5_EXPANSION_MPLS] = {
 520                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 521                                                   MLX5_EXPANSION_IPV6),
 522                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 523         },
 524         [MLX5_EXPANSION_ETH] = {
 525                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 526                                                   MLX5_EXPANSION_IPV6),
 527                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 528         },
 529         [MLX5_EXPANSION_ETH_VLAN] = {
 530                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 531                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 532         },
 533         [MLX5_EXPANSION_VLAN] = {
 534                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 535                                                   MLX5_EXPANSION_IPV6),
 536                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 537         },
 538         [MLX5_EXPANSION_IPV4] = {
 539                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 540                                                   MLX5_EXPANSION_IPV4_TCP),
 541                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 542                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 543                         ETH_RSS_NONFRAG_IPV4_OTHER,
 544         },
 545         [MLX5_EXPANSION_IPV4_UDP] = {
 546                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 547                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 548         },
 549         [MLX5_EXPANSION_IPV4_TCP] = {
 550                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 551                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 552         },
 553         [MLX5_EXPANSION_IPV6] = {
 554                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 555                                                   MLX5_EXPANSION_IPV6_TCP),
 556                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 557                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 558                         ETH_RSS_NONFRAG_IPV6_OTHER,
 559         },
 560         [MLX5_EXPANSION_IPV6_UDP] = {
 561                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 562                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 563         },
 564         [MLX5_EXPANSION_IPV6_TCP] = {
 565                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 566                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 567         },
 568 };
 569
 570 static struct rte_flow_action_handle *
 571 mlx5_action_handle_create(struct rte_eth_dev *dev,
 572                           const struct rte_flow_indir_action_conf *conf,
 573                           const struct rte_flow_action *action,
 574                           struct rte_flow_error *error);
 575 static int mlx5_action_handle_destroy
 576                                 (struct rte_eth_dev *dev,
 577                                  struct rte_flow_action_handle *handle,
 578                                  struct rte_flow_error *error);
 579 static int mlx5_action_handle_update
 580                                 (struct rte_eth_dev *dev,
 581                                  struct rte_flow_action_handle *handle,
 582                                  const void *update,
 583                                  struct rte_flow_error *error);
 584 static int mlx5_action_handle_query
 585                                 (struct rte_eth_dev *dev,
 586                                  const struct rte_flow_action_handle *handle,
 587                                  void *data,
 588                                  struct rte_flow_error *error);
 589 static int
 590 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
 591                     struct rte_flow_tunnel *app_tunnel,
 592                     struct rte_flow_action **actions,
 593                     uint32_t *num_of_actions,
 594                     struct rte_flow_error *error);
 595 static int
 596 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
 597                        struct rte_flow_tunnel *app_tunnel,
 598                        struct rte_flow_item **items,
 599                        uint32_t *num_of_items,
 600                        struct rte_flow_error *error);
 601 static int
 602 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
 603                               struct rte_flow_item *pmd_items,
 604                               uint32_t num_items, struct rte_flow_error *err);
 605 static int
 606 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
 607                                 struct rte_flow_action *pmd_actions,
 608                                 uint32_t num_actions,
 609                                 struct rte_flow_error *err);
 610 static int
 611 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
 612                                   struct rte_mbuf *m,
 613                                   struct rte_flow_restore_info *info,
 614                                   struct rte_flow_error *err);
 615
 616 static const struct rte_flow_ops mlx5_flow_ops = {
 617         .validate = mlx5_flow_validate,
 618         .create = mlx5_flow_create,
 619         .destroy = mlx5_flow_destroy,
 620         .flush = mlx5_flow_flush,
 621         .isolate = mlx5_flow_isolate,
 622         .query = mlx5_flow_query,
 623         .dev_dump = mlx5_flow_dev_dump,
 624         .get_aged_flows = mlx5_flow_get_aged_flows,
 625         .action_handle_create = mlx5_action_handle_create,
 626         .action_handle_destroy = mlx5_action_handle_destroy,
 627         .action_handle_update = mlx5_action_handle_update,
 628         .action_handle_query = mlx5_action_handle_query,
 629         .tunnel_decap_set = mlx5_flow_tunnel_decap_set,
 630         .tunnel_match = mlx5_flow_tunnel_match,
 631         .tunnel_action_decap_release = mlx5_flow_tunnel_action_release,
 632         .tunnel_item_release = mlx5_flow_tunnel_item_release,
 633         .get_restore_info = mlx5_flow_tunnel_get_restore_info,
 634 };
 635
 636 /* Tunnel information. */
 637 struct mlx5_flow_tunnel_info {
 638         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 639         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 640 };
 641
 642 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 643         {
 644                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 645                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 646         },
 647         {
 648                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
 649                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
 650         },
 651         {
 652                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 653                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 654         },
 655         {
 656                 .tunnel = MLX5_FLOW_LAYER_GRE,
 657                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 658         },
 659         {
 660                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 661                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 662         },
 663         {
 664                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 665                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 666         },
 667         {
 668                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 669                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 670         },
 671         {
 672                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 673                 .ptype = RTE_PTYPE_TUNNEL_IP,
 674         },
 675         {
 676                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 677                 .ptype = RTE_PTYPE_TUNNEL_IP,
 678         },
 679         {
 680                 .tunnel = MLX5_FLOW_LAYER_GTP,
 681                 .ptype = RTE_PTYPE_TUNNEL_GTPU,
 682         },
 683 };
 684
 685
 686
 687 /**
 688  * Translate tag ID to register.
 689  *
 690  * @param[in] dev
 691  *   Pointer to the Ethernet device structure.
 692  * @param[in] feature
 693  *   The feature that request the register.
 694  * @param[in] id
 695  *   The request register ID.
 696  * @param[out] error
 697  *   Error description in case of any.
 698  *
 699  * @return
 700  *   The request register on success, a negative errno
 701  *   value otherwise and rte_errno is set.
 702  */
 703 int
 704 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 705                      enum mlx5_feature_name feature,
 706                      uint32_t id,
 707                      struct rte_flow_error *error)
 708 {
 709         struct mlx5_priv *priv = dev->data->dev_private;
 710         struct mlx5_dev_config *config = &priv->config;
 711         enum modify_reg start_reg;
 712         bool skip_mtr_reg = false;
 713
 714         switch (feature) {
 715         case MLX5_HAIRPIN_RX:
 716                 return REG_B;
 717         case MLX5_HAIRPIN_TX:
 718                 return REG_A;
 719         case MLX5_METADATA_RX:
 720                 switch (config->dv_xmeta_en) {
 721                 case MLX5_XMETA_MODE_LEGACY:
 722                         return REG_B;
 723                 case MLX5_XMETA_MODE_META16:
 724                         return REG_C_0;
 725                 case MLX5_XMETA_MODE_META32:
 726                         return REG_C_1;
 727                 }
 728                 break;
 729         case MLX5_METADATA_TX:
 730                 return REG_A;
 731         case MLX5_METADATA_FDB:
 732                 switch (config->dv_xmeta_en) {
 733                 case MLX5_XMETA_MODE_LEGACY:
 734                         return REG_NON;
 735                 case MLX5_XMETA_MODE_META16:
 736                         return REG_C_0;
 737                 case MLX5_XMETA_MODE_META32:
 738                         return REG_C_1;
 739                 }
 740                 break;
 741         case MLX5_FLOW_MARK:
 742                 switch (config->dv_xmeta_en) {
 743                 case MLX5_XMETA_MODE_LEGACY:
 744                         return REG_NON;
 745                 case MLX5_XMETA_MODE_META16:
 746                         return REG_C_1;
 747                 case MLX5_XMETA_MODE_META32:
 748                         return REG_C_0;
 749                 }
 750                 break;
 751         case MLX5_MTR_ID:
 752                 /*
 753                  * If meter color and meter id share one register, flow match
 754                  * should use the meter color register for match.
 755                  */
 756                 if (priv->mtr_reg_share)
 757                         return priv->mtr_color_reg;
 758                 else
 759                         return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 760                                REG_C_3;
 761         case MLX5_MTR_COLOR:
 762         case MLX5_ASO_FLOW_HIT:
 763         case MLX5_ASO_CONNTRACK:
 764                 /* All features use the same REG_C. */
 765                 MLX5_ASSERT(priv->mtr_color_reg != REG_NON);
 766                 return priv->mtr_color_reg;
 767         case MLX5_COPY_MARK:
 768                 /*
 769                  * Metadata COPY_MARK register using is in meter suffix sub
 770                  * flow while with meter. It's safe to share the same register.
 771                  */
 772                 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
 773         case MLX5_APP_TAG:
 774                 /*
 775                  * If meter is enable, it will engage the register for color
 776                  * match and flow match. If meter color match is not using the
 777                  * REG_C_2, need to skip the REG_C_x be used by meter color
 778                  * match.
 779                  * If meter is disable, free to use all available registers.
 780                  */
 781                 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 782                             (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
 783                 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
 784                 if (id > (uint32_t)(REG_C_7 - start_reg))
 785                         return rte_flow_error_set(error, EINVAL,
 786                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 787                                                   NULL, "invalid tag id");
 788                 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON)
 789                         return rte_flow_error_set(error, ENOTSUP,
 790                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 791                                                   NULL, "unsupported tag id");
 792                 /*
 793                  * This case means meter is using the REG_C_x great than 2.
 794                  * Take care not to conflict with meter color REG_C_x.
 795                  * If the available index REG_C_y >= REG_C_x, skip the
 796                  * color register.
 797                  */
 798                 if (skip_mtr_reg && config->flow_mreg_c
 799                     [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
 800                         if (id >= (uint32_t)(REG_C_7 - start_reg))
 801                                 return rte_flow_error_set(error, EINVAL,
 802                                                        RTE_FLOW_ERROR_TYPE_ITEM,
 803                                                         NULL, "invalid tag id");
 804                         if (config->flow_mreg_c
 805                             [id + 1 + start_reg - REG_C_0] != REG_NON)
 806                                 return config->flow_mreg_c
 807                                                [id + 1 + start_reg - REG_C_0];
 808                         return rte_flow_error_set(error, ENOTSUP,
 809                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 810                                                   NULL, "unsupported tag id");
 811                 }
 812                 return config->flow_mreg_c[id + start_reg - REG_C_0];
 813         }
 814         MLX5_ASSERT(false);
 815         return rte_flow_error_set(error, EINVAL,
 816                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 817                                   NULL, "invalid feature name");
 818 }
 819
 820 /**
 821  * Check extensive flow metadata register support.
 822  *
 823  * @param dev
 824  *   Pointer to rte_eth_dev structure.
 825  *
 826  * @return
 827  *   True if device supports extensive flow metadata register, otherwise false.
 828  */
 829 bool
 830 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
 831 {
 832         struct mlx5_priv *priv = dev->data->dev_private;
 833         struct mlx5_dev_config *config = &priv->config;
 834
 835         /*
 836          * Having available reg_c can be regarded inclusively as supporting
 837          * extensive flow metadata register, which could mean,
 838          * - metadata register copy action by modify header.
 839          * - 16 modify header actions is supported.
 840          * - reg_c's are preserved across different domain (FDB and NIC) on
 841          *   packet loopback by flow lookup miss.
 842          */
 843         return config->flow_mreg_c[2] != REG_NON;
 844 }
 845
 846 /**
 847  * Get the lowest priority.
 848  *
 849  * @param[in] dev
 850  *   Pointer to the Ethernet device structure.
 851  * @param[in] attributes
 852  *   Pointer to device flow rule attributes.
 853  *
 854  * @return
 855  *   The value of lowest priority of flow.
 856  */
 857 uint32_t
 858 mlx5_get_lowest_priority(struct rte_eth_dev *dev,
 859                           const struct rte_flow_attr *attr)
 860 {
 861         struct mlx5_priv *priv = dev->data->dev_private;
 862
 863         if (!attr->group && !attr->transfer)
 864                 return priv->config.flow_prio - 2;
 865         return MLX5_NON_ROOT_FLOW_MAX_PRIO - 1;
 866 }
 867
 868 /**
 869  * Calculate matcher priority of the flow.
 870  *
 871  * @param[in] dev
 872  *   Pointer to the Ethernet device structure.
 873  * @param[in] attr
 874  *   Pointer to device flow rule attributes.
 875  * @param[in] subpriority
 876  *   The priority based on the items.
 877  * @return
 878  *   The matcher priority of the flow.
 879  */
 880 uint16_t
 881 mlx5_get_matcher_priority(struct rte_eth_dev *dev,
 882                           const struct rte_flow_attr *attr,
 883                           uint32_t subpriority)
 884 {
 885         uint16_t priority = (uint16_t)attr->priority;
 886         struct mlx5_priv *priv = dev->data->dev_private;
 887
 888         if (!attr->group && !attr->transfer) {
 889                 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
 890                         priority = priv->config.flow_prio - 1;
 891                 return mlx5_os_flow_adjust_priority(dev, priority, subpriority);
 892         }
 893         if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
 894                 priority = MLX5_NON_ROOT_FLOW_MAX_PRIO;
 895         return priority * 3 + subpriority;
 896 }
 897
 898 /**
 899  * Verify the @p item specifications (spec, last, mask) are compatible with the
 900  * NIC capabilities.
 901  *
 902  * @param[in] item
 903  *   Item specification.
 904  * @param[in] mask
 905  *   @p item->mask or flow default bit-masks.
 906  * @param[in] nic_mask
 907  *   Bit-masks covering supported fields by the NIC to compare with user mask.
 908  * @param[in] size
 909  *   Bit-masks size in bytes.
 910  * @param[in] range_accepted
 911  *   True if range of values is accepted for specific fields, false otherwise.
 912  * @param[out] error
 913  *   Pointer to error structure.
 914  *
 915  * @return
 916  *   0 on success, a negative errno value otherwise and rte_errno is set.
 917  */
 918 int
 919 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
 920                           const uint8_t *mask,
 921                           const uint8_t *nic_mask,
 922                           unsigned int size,
 923                           bool range_accepted,
 924                           struct rte_flow_error *error)
 925 {
 926         unsigned int i;
 927
 928         MLX5_ASSERT(nic_mask);
 929         for (i = 0; i < size; ++i)
 930                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
 931                         return rte_flow_error_set(error, ENOTSUP,
 932                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 933                                                   item,
 934                                                   "mask enables non supported"
 935                                                   " bits");
 936         if (!item->spec && (item->mask || item->last))
 937                 return rte_flow_error_set(error, EINVAL,
 938                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
 939                                           "mask/last without a spec is not"
 940                                           " supported");
 941         if (item->spec && item->last && !range_accepted) {
 942                 uint8_t spec[size];
 943                 uint8_t last[size];
 944                 unsigned int i;
 945                 int ret;
 946
 947                 for (i = 0; i < size; ++i) {
 948                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
 949                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
 950                 }
 951                 ret = memcmp(spec, last, size);
 952                 if (ret != 0)
 953                         return rte_flow_error_set(error, EINVAL,
 954                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 955                                                   item,
 956                                                   "range is not valid");
 957         }
 958         return 0;
 959 }
 960
 961 /**
 962  * Adjust the hash fields according to the @p flow information.
 963  *
 964  * @param[in] dev_flow.
 965  *   Pointer to the mlx5_flow.
 966  * @param[in] tunnel
 967  *   1 when the hash field is for a tunnel item.
 968  * @param[in] layer_types
 969  *   ETH_RSS_* types.
 970  * @param[in] hash_fields
 971  *   Item hash fields.
 972  *
 973  * @return
 974  *   The hash fields that should be used.
 975  */
 976 uint64_t
 977 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc,
 978                             int tunnel __rte_unused, uint64_t layer_types,
 979                             uint64_t hash_fields)
 980 {
 981 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 982         int rss_request_inner = rss_desc->level >= 2;
 983
 984         /* Check RSS hash level for tunnel. */
 985         if (tunnel && rss_request_inner)
 986                 hash_fields |= IBV_RX_HASH_INNER;
 987         else if (tunnel || rss_request_inner)
 988                 return 0;
 989 #endif
 990         /* Check if requested layer matches RSS hash fields. */
 991         if (!(rss_desc->types & layer_types))
 992                 return 0;
 993         return hash_fields;
 994 }
 995
 996 /**
 997  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
 998  * if several tunnel rules are used on this queue, the tunnel ptype will be
 999  * cleared.
1000  *
1001  * @param rxq_ctrl
1002  *   Rx queue to update.
1003  */
1004 static void
1005 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
1006 {
1007         unsigned int i;
1008         uint32_t tunnel_ptype = 0;
1009
1010         /* Look up for the ptype to use. */
1011         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
1012                 if (!rxq_ctrl->flow_tunnels_n[i])
1013                         continue;
1014                 if (!tunnel_ptype) {
1015                         tunnel_ptype = tunnels_info[i].ptype;
1016                 } else {
1017                         tunnel_ptype = 0;
1018                         break;
1019                 }
1020         }
1021         rxq_ctrl->rxq.tunnel = tunnel_ptype;
1022 }
1023
1024 /**
1025  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
1026  * flow.
1027  *
1028  * @param[in] dev
1029  *   Pointer to the Ethernet device structure.
1030  * @param[in] dev_handle
1031  *   Pointer to device flow handle structure.
1032  */
1033 void
1034 flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
1035                        struct mlx5_flow_handle *dev_handle)
1036 {
1037         struct mlx5_priv *priv = dev->data->dev_private;
1038         const int mark = dev_handle->mark;
1039         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1040         struct mlx5_ind_table_obj *ind_tbl = NULL;
1041         unsigned int i;
1042
1043         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1044                 struct mlx5_hrxq *hrxq;
1045
1046                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1047                               dev_handle->rix_hrxq);
1048                 if (hrxq)
1049                         ind_tbl = hrxq->ind_table;
1050         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1051                 struct mlx5_shared_action_rss *shared_rss;
1052
1053                 shared_rss = mlx5_ipool_get
1054                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1055                          dev_handle->rix_srss);
1056                 if (shared_rss)
1057                         ind_tbl = shared_rss->ind_tbl;
1058         }
1059         if (!ind_tbl)
1060                 return;
1061         for (i = 0; i != ind_tbl->queues_n; ++i) {
1062                 int idx = ind_tbl->queues[i];
1063                 struct mlx5_rxq_ctrl *rxq_ctrl =
1064                         container_of((*priv->rxqs)[idx],
1065                                      struct mlx5_rxq_ctrl, rxq);
1066
1067                 /*
1068                  * To support metadata register copy on Tx loopback,
1069                  * this must be always enabled (metadata may arive
1070                  * from other port - not from local flows only.
1071                  */
1072                 if (priv->config.dv_flow_en &&
1073                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1074                     mlx5_flow_ext_mreg_supported(dev)) {
1075                         rxq_ctrl->rxq.mark = 1;
1076                         rxq_ctrl->flow_mark_n = 1;
1077                 } else if (mark) {
1078                         rxq_ctrl->rxq.mark = 1;
1079                         rxq_ctrl->flow_mark_n++;
1080                 }
1081                 if (tunnel) {
1082                         unsigned int j;
1083
1084                         /* Increase the counter matching the flow. */
1085                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1086                                 if ((tunnels_info[j].tunnel &
1087                                      dev_handle->layers) ==
1088                                     tunnels_info[j].tunnel) {
1089                                         rxq_ctrl->flow_tunnels_n[j]++;
1090                                         break;
1091                                 }
1092                         }
1093                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1094                 }
1095         }
1096 }
1097
1098 /**
1099  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
1100  *
1101  * @param[in] dev
1102  *   Pointer to the Ethernet device structure.
1103  * @param[in] flow
1104  *   Pointer to flow structure.
1105  */
1106 static void
1107 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
1108 {
1109         struct mlx5_priv *priv = dev->data->dev_private;
1110         uint32_t handle_idx;
1111         struct mlx5_flow_handle *dev_handle;
1112
1113         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1114                        handle_idx, dev_handle, next)
1115                 flow_drv_rxq_flags_set(dev, dev_handle);
1116 }
1117
1118 /**
1119  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1120  * device flow if no other flow uses it with the same kind of request.
1121  *
1122  * @param dev
1123  *   Pointer to Ethernet device.
1124  * @param[in] dev_handle
1125  *   Pointer to the device flow handle structure.
1126  */
1127 static void
1128 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev,
1129                         struct mlx5_flow_handle *dev_handle)
1130 {
1131         struct mlx5_priv *priv = dev->data->dev_private;
1132         const int mark = dev_handle->mark;
1133         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1134         struct mlx5_ind_table_obj *ind_tbl = NULL;
1135         unsigned int i;
1136
1137         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1138                 struct mlx5_hrxq *hrxq;
1139
1140                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1141                               dev_handle->rix_hrxq);
1142                 if (hrxq)
1143                         ind_tbl = hrxq->ind_table;
1144         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1145                 struct mlx5_shared_action_rss *shared_rss;
1146
1147                 shared_rss = mlx5_ipool_get
1148                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1149                          dev_handle->rix_srss);
1150                 if (shared_rss)
1151                         ind_tbl = shared_rss->ind_tbl;
1152         }
1153         if (!ind_tbl)
1154                 return;
1155         MLX5_ASSERT(dev->data->dev_started);
1156         for (i = 0; i != ind_tbl->queues_n; ++i) {
1157                 int idx = ind_tbl->queues[i];
1158                 struct mlx5_rxq_ctrl *rxq_ctrl =
1159                         container_of((*priv->rxqs)[idx],
1160                                      struct mlx5_rxq_ctrl, rxq);
1161
1162                 if (priv->config.dv_flow_en &&
1163                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1164                     mlx5_flow_ext_mreg_supported(dev)) {
1165                         rxq_ctrl->rxq.mark = 1;
1166                         rxq_ctrl->flow_mark_n = 1;
1167                 } else if (mark) {
1168                         rxq_ctrl->flow_mark_n--;
1169                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
1170                 }
1171                 if (tunnel) {
1172                         unsigned int j;
1173
1174                         /* Decrease the counter matching the flow. */
1175                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1176                                 if ((tunnels_info[j].tunnel &
1177                                      dev_handle->layers) ==
1178                                     tunnels_info[j].tunnel) {
1179                                         rxq_ctrl->flow_tunnels_n[j]--;
1180                                         break;
1181                                 }
1182                         }
1183                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1184                 }
1185         }
1186 }
1187
1188 /**
1189  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1190  * @p flow if no other flow uses it with the same kind of request.
1191  *
1192  * @param dev
1193  *   Pointer to Ethernet device.
1194  * @param[in] flow
1195  *   Pointer to the flow.
1196  */
1197 static void
1198 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
1199 {
1200         struct mlx5_priv *priv = dev->data->dev_private;
1201         uint32_t handle_idx;
1202         struct mlx5_flow_handle *dev_handle;
1203
1204         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1205                        handle_idx, dev_handle, next)
1206                 flow_drv_rxq_flags_trim(dev, dev_handle);
1207 }
1208
1209 /**
1210  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
1211  *
1212  * @param dev
1213  *   Pointer to Ethernet device.
1214  */
1215 static void
1216 flow_rxq_flags_clear(struct rte_eth_dev *dev)
1217 {
1218         struct mlx5_priv *priv = dev->data->dev_private;
1219         unsigned int i;
1220
1221         for (i = 0; i != priv->rxqs_n; ++i) {
1222                 struct mlx5_rxq_ctrl *rxq_ctrl;
1223                 unsigned int j;
1224
1225                 if (!(*priv->rxqs)[i])
1226                         continue;
1227                 rxq_ctrl = container_of((*priv->rxqs)[i],
1228                                         struct mlx5_rxq_ctrl, rxq);
1229                 rxq_ctrl->flow_mark_n = 0;
1230                 rxq_ctrl->rxq.mark = 0;
1231                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
1232                         rxq_ctrl->flow_tunnels_n[j] = 0;
1233                 rxq_ctrl->rxq.tunnel = 0;
1234         }
1235 }
1236
1237 /**
1238  * Set the Rx queue dynamic metadata (mask and offset) for a flow
1239  *
1240  * @param[in] dev
1241  *   Pointer to the Ethernet device structure.
1242  */
1243 void
1244 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev)
1245 {
1246         struct mlx5_priv *priv = dev->data->dev_private;
1247         struct mlx5_rxq_data *data;
1248         unsigned int i;
1249
1250         for (i = 0; i != priv->rxqs_n; ++i) {
1251                 if (!(*priv->rxqs)[i])
1252                         continue;
1253                 data = (*priv->rxqs)[i];
1254                 if (!rte_flow_dynf_metadata_avail()) {
1255                         data->dynf_meta = 0;
1256                         data->flow_meta_mask = 0;
1257                         data->flow_meta_offset = -1;
1258                         data->flow_meta_port_mask = 0;
1259                 } else {
1260                         data->dynf_meta = 1;
1261                         data->flow_meta_mask = rte_flow_dynf_metadata_mask;
1262                         data->flow_meta_offset = rte_flow_dynf_metadata_offs;
1263                         data->flow_meta_port_mask = (uint32_t)~0;
1264                         if (priv->config.dv_xmeta_en == MLX5_XMETA_MODE_META16)
1265                                 data->flow_meta_port_mask >>= 16;
1266                 }
1267         }
1268 }
1269
1270 /*
1271  * return a pointer to the desired action in the list of actions.
1272  *
1273  * @param[in] actions
1274  *   The list of actions to search the action in.
1275  * @param[in] action
1276  *   The action to find.
1277  *
1278  * @return
1279  *   Pointer to the action in the list, if found. NULL otherwise.
1280  */
1281 const struct rte_flow_action *
1282 mlx5_flow_find_action(const struct rte_flow_action *actions,
1283                       enum rte_flow_action_type action)
1284 {
1285         if (actions == NULL)
1286                 return NULL;
1287         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
1288                 if (actions->type == action)
1289                         return actions;
1290         return NULL;
1291 }
1292
1293 /*
1294  * Validate the flag action.
1295  *
1296  * @param[in] action_flags
1297  *   Bit-fields that holds the actions detected until now.
1298  * @param[in] attr
1299  *   Attributes of flow that includes this action.
1300  * @param[out] error
1301  *   Pointer to error structure.
1302  *
1303  * @return
1304  *   0 on success, a negative errno value otherwise and rte_errno is set.
1305  */
1306 int
1307 mlx5_flow_validate_action_flag(uint64_t action_flags,
1308                                const struct rte_flow_attr *attr,
1309                                struct rte_flow_error *error)
1310 {
1311         if (action_flags & MLX5_FLOW_ACTION_MARK)
1312                 return rte_flow_error_set(error, EINVAL,
1313                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1314                                           "can't mark and flag in same flow");
1315         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1316                 return rte_flow_error_set(error, EINVAL,
1317                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1318                                           "can't have 2 flag"
1319                                           " actions in same flow");
1320         if (attr->egress)
1321                 return rte_flow_error_set(error, ENOTSUP,
1322                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1323                                           "flag action not supported for "
1324                                           "egress");
1325         return 0;
1326 }
1327
1328 /*
1329  * Validate the mark action.
1330  *
1331  * @param[in] action
1332  *   Pointer to the queue action.
1333  * @param[in] action_flags
1334  *   Bit-fields that holds the actions detected until now.
1335  * @param[in] attr
1336  *   Attributes of flow that includes this action.
1337  * @param[out] error
1338  *   Pointer to error structure.
1339  *
1340  * @return
1341  *   0 on success, a negative errno value otherwise and rte_errno is set.
1342  */
1343 int
1344 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
1345                                uint64_t action_flags,
1346                                const struct rte_flow_attr *attr,
1347                                struct rte_flow_error *error)
1348 {
1349         const struct rte_flow_action_mark *mark = action->conf;
1350
1351         if (!mark)
1352                 return rte_flow_error_set(error, EINVAL,
1353                                           RTE_FLOW_ERROR_TYPE_ACTION,
1354                                           action,
1355                                           "configuration cannot be null");
1356         if (mark->id >= MLX5_FLOW_MARK_MAX)
1357                 return rte_flow_error_set(error, EINVAL,
1358                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1359                                           &mark->id,
1360                                           "mark id must in 0 <= id < "
1361                                           RTE_STR(MLX5_FLOW_MARK_MAX));
1362         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1363                 return rte_flow_error_set(error, EINVAL,
1364                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1365                                           "can't flag and mark in same flow");
1366         if (action_flags & MLX5_FLOW_ACTION_MARK)
1367                 return rte_flow_error_set(error, EINVAL,
1368                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1369                                           "can't have 2 mark actions in same"
1370                                           " flow");
1371         if (attr->egress)
1372                 return rte_flow_error_set(error, ENOTSUP,
1373                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1374                                           "mark action not supported for "
1375                                           "egress");
1376         return 0;
1377 }
1378
1379 /*
1380  * Validate the drop action.
1381  *
1382  * @param[in] action_flags
1383  *   Bit-fields that holds the actions detected until now.
1384  * @param[in] attr
1385  *   Attributes of flow that includes this action.
1386  * @param[out] error
1387  *   Pointer to error structure.
1388  *
1389  * @return
1390  *   0 on success, a negative errno value otherwise and rte_errno is set.
1391  */
1392 int
1393 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1394                                const struct rte_flow_attr *attr,
1395                                struct rte_flow_error *error)
1396 {
1397         if (attr->egress)
1398                 return rte_flow_error_set(error, ENOTSUP,
1399                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1400                                           "drop action not supported for "
1401                                           "egress");
1402         return 0;
1403 }
1404
1405 /*
1406  * Validate the queue action.
1407  *
1408  * @param[in] action
1409  *   Pointer to the queue action.
1410  * @param[in] action_flags
1411  *   Bit-fields that holds the actions detected until now.
1412  * @param[in] dev
1413  *   Pointer to the Ethernet device structure.
1414  * @param[in] attr
1415  *   Attributes of flow that includes this action.
1416  * @param[out] error
1417  *   Pointer to error structure.
1418  *
1419  * @return
1420  *   0 on success, a negative errno value otherwise and rte_errno is set.
1421  */
1422 int
1423 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1424                                 uint64_t action_flags,
1425                                 struct rte_eth_dev *dev,
1426                                 const struct rte_flow_attr *attr,
1427                                 struct rte_flow_error *error)
1428 {
1429         struct mlx5_priv *priv = dev->data->dev_private;
1430         const struct rte_flow_action_queue *queue = action->conf;
1431
1432         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1433                 return rte_flow_error_set(error, EINVAL,
1434                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1435                                           "can't have 2 fate actions in"
1436                                           " same flow");
1437         if (!priv->rxqs_n)
1438                 return rte_flow_error_set(error, EINVAL,
1439                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1440                                           NULL, "No Rx queues configured");
1441         if (queue->index >= priv->rxqs_n)
1442                 return rte_flow_error_set(error, EINVAL,
1443                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1444                                           &queue->index,
1445                                           "queue index out of range");
1446         if (!(*priv->rxqs)[queue->index])
1447                 return rte_flow_error_set(error, EINVAL,
1448                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1449                                           &queue->index,
1450                                           "queue is not configured");
1451         if (attr->egress)
1452                 return rte_flow_error_set(error, ENOTSUP,
1453                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1454                                           "queue action not supported for "
1455                                           "egress");
1456         return 0;
1457 }
1458
1459 /*
1460  * Validate the rss action.
1461  *
1462  * @param[in] dev
1463  *   Pointer to the Ethernet device structure.
1464  * @param[in] action
1465  *   Pointer to the queue action.
1466  * @param[out] error
1467  *   Pointer to error structure.
1468  *
1469  * @return
1470  *   0 on success, a negative errno value otherwise and rte_errno is set.
1471  */
1472 int
1473 mlx5_validate_action_rss(struct rte_eth_dev *dev,
1474                          const struct rte_flow_action *action,
1475                          struct rte_flow_error *error)
1476 {
1477         struct mlx5_priv *priv = dev->data->dev_private;
1478         const struct rte_flow_action_rss *rss = action->conf;
1479         enum mlx5_rxq_type rxq_type = MLX5_RXQ_TYPE_UNDEFINED;
1480         unsigned int i;
1481
1482         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1483             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1484                 return rte_flow_error_set(error, ENOTSUP,
1485                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1486                                           &rss->func,
1487                                           "RSS hash function not supported");
1488 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1489         if (rss->level > 2)
1490 #else
1491         if (rss->level > 1)
1492 #endif
1493                 return rte_flow_error_set(error, ENOTSUP,
1494                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1495                                           &rss->level,
1496                                           "tunnel RSS is not supported");
1497         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1498         if (rss->key_len == 0 && rss->key != NULL)
1499                 return rte_flow_error_set(error, ENOTSUP,
1500                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1501                                           &rss->key_len,
1502                                           "RSS hash key length 0");
1503         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1504                 return rte_flow_error_set(error, ENOTSUP,
1505                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1506                                           &rss->key_len,
1507                                           "RSS hash key too small");
1508         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1509                 return rte_flow_error_set(error, ENOTSUP,
1510                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1511                                           &rss->key_len,
1512                                           "RSS hash key too large");
1513         if (rss->queue_num > priv->config.ind_table_max_size)
1514                 return rte_flow_error_set(error, ENOTSUP,
1515                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1516                                           &rss->queue_num,
1517                                           "number of queues too large");
1518         if (rss->types & MLX5_RSS_HF_MASK)
1519                 return rte_flow_error_set(error, ENOTSUP,
1520                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1521                                           &rss->types,
1522                                           "some RSS protocols are not"
1523                                           " supported");
1524         if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) &&
1525             !(rss->types & ETH_RSS_IP))
1526                 return rte_flow_error_set(error, EINVAL,
1527                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1528                                           "L3 partial RSS requested but L3 RSS"
1529                                           " type not specified");
1530         if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) &&
1531             !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP)))
1532                 return rte_flow_error_set(error, EINVAL,
1533                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1534                                           "L4 partial RSS requested but L4 RSS"
1535                                           " type not specified");
1536         if (!priv->rxqs_n)
1537                 return rte_flow_error_set(error, EINVAL,
1538                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1539                                           NULL, "No Rx queues configured");
1540         if (!rss->queue_num)
1541                 return rte_flow_error_set(error, EINVAL,
1542                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1543                                           NULL, "No queues configured");
1544         for (i = 0; i != rss->queue_num; ++i) {
1545                 struct mlx5_rxq_ctrl *rxq_ctrl;
1546
1547                 if (rss->queue[i] >= priv->rxqs_n)
1548                         return rte_flow_error_set
1549                                 (error, EINVAL,
1550                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1551                                  &rss->queue[i], "queue index out of range");
1552                 if (!(*priv->rxqs)[rss->queue[i]])
1553                         return rte_flow_error_set
1554                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1555                                  &rss->queue[i], "queue is not configured");
1556                 rxq_ctrl = container_of((*priv->rxqs)[rss->queue[i]],
1557                                         struct mlx5_rxq_ctrl, rxq);
1558                 if (i == 0)
1559                         rxq_type = rxq_ctrl->type;
1560                 if (rxq_type != rxq_ctrl->type)
1561                         return rte_flow_error_set
1562                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1563                                  &rss->queue[i],
1564                                  "combining hairpin and regular RSS queues is not supported");
1565         }
1566         return 0;
1567 }
1568
1569 /*
1570  * Validate the rss action.
1571  *
1572  * @param[in] action
1573  *   Pointer to the queue action.
1574  * @param[in] action_flags
1575  *   Bit-fields that holds the actions detected until now.
1576  * @param[in] dev
1577  *   Pointer to the Ethernet device structure.
1578  * @param[in] attr
1579  *   Attributes of flow that includes this action.
1580  * @param[in] item_flags
1581  *   Items that were detected.
1582  * @param[out] error
1583  *   Pointer to error structure.
1584  *
1585  * @return
1586  *   0 on success, a negative errno value otherwise and rte_errno is set.
1587  */
1588 int
1589 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1590                               uint64_t action_flags,
1591                               struct rte_eth_dev *dev,
1592                               const struct rte_flow_attr *attr,
1593                               uint64_t item_flags,
1594                               struct rte_flow_error *error)
1595 {
1596         const struct rte_flow_action_rss *rss = action->conf;
1597         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1598         int ret;
1599
1600         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1601                 return rte_flow_error_set(error, EINVAL,
1602                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1603                                           "can't have 2 fate actions"
1604                                           " in same flow");
1605         ret = mlx5_validate_action_rss(dev, action, error);
1606         if (ret)
1607                 return ret;
1608         if (attr->egress)
1609                 return rte_flow_error_set(error, ENOTSUP,
1610                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1611                                           "rss action not supported for "
1612                                           "egress");
1613         if (rss->level > 1 && !tunnel)
1614                 return rte_flow_error_set(error, EINVAL,
1615                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1616                                           "inner RSS is not supported for "
1617                                           "non-tunnel flows");
1618         if ((item_flags & MLX5_FLOW_LAYER_ECPRI) &&
1619             !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) {
1620                 return rte_flow_error_set(error, EINVAL,
1621                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1622                                           "RSS on eCPRI is not supported now");
1623         }
1624         return 0;
1625 }
1626
1627 /*
1628  * Validate the default miss action.
1629  *
1630  * @param[in] action_flags
1631  *   Bit-fields that holds the actions detected until now.
1632  * @param[out] error
1633  *   Pointer to error structure.
1634  *
1635  * @return
1636  *   0 on success, a negative errno value otherwise and rte_errno is set.
1637  */
1638 int
1639 mlx5_flow_validate_action_default_miss(uint64_t action_flags,
1640                                 const struct rte_flow_attr *attr,
1641                                 struct rte_flow_error *error)
1642 {
1643         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1644                 return rte_flow_error_set(error, EINVAL,
1645                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1646                                           "can't have 2 fate actions in"
1647                                           " same flow");
1648         if (attr->egress)
1649                 return rte_flow_error_set(error, ENOTSUP,
1650                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1651                                           "default miss action not supported "
1652                                           "for egress");
1653         if (attr->group)
1654                 return rte_flow_error_set(error, ENOTSUP,
1655                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
1656                                           "only group 0 is supported");
1657         if (attr->transfer)
1658                 return rte_flow_error_set(error, ENOTSUP,
1659                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1660                                           NULL, "transfer is not supported");
1661         return 0;
1662 }
1663
1664 /*
1665  * Validate the count action.
1666  *
1667  * @param[in] dev
1668  *   Pointer to the Ethernet device structure.
1669  * @param[in] attr
1670  *   Attributes of flow that includes this action.
1671  * @param[out] error
1672  *   Pointer to error structure.
1673  *
1674  * @return
1675  *   0 on success, a negative errno value otherwise and rte_errno is set.
1676  */
1677 int
1678 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1679                                 const struct rte_flow_attr *attr,
1680                                 struct rte_flow_error *error)
1681 {
1682         if (attr->egress)
1683                 return rte_flow_error_set(error, ENOTSUP,
1684                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1685                                           "count action not supported for "
1686                                           "egress");
1687         return 0;
1688 }
1689
1690 /*
1691  * Validate the ASO CT action.
1692  *
1693  * @param[in] dev
1694  *   Pointer to the Ethernet device structure.
1695  * @param[in] conntrack
1696  *   Pointer to the CT action profile.
1697  * @param[out] error
1698  *   Pointer to error structure.
1699  *
1700  * @return
1701  *   0 on success, a negative errno value otherwise and rte_errno is set.
1702  */
1703 int
1704 mlx5_validate_action_ct(struct rte_eth_dev *dev,
1705                         const struct rte_flow_action_conntrack *conntrack,
1706                         struct rte_flow_error *error)
1707 {
1708         RTE_SET_USED(dev);
1709
1710         if (conntrack->state > RTE_FLOW_CONNTRACK_STATE_TIME_WAIT)
1711                 return rte_flow_error_set(error, EINVAL,
1712                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1713                                           "Invalid CT state");
1714         if (conntrack->last_index > RTE_FLOW_CONNTRACK_FLAG_RST)
1715                 return rte_flow_error_set(error, EINVAL,
1716                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1717                                           "Invalid last TCP packet flag");
1718         return 0;
1719 }
1720
1721 /**
1722  * Verify the @p attributes will be correctly understood by the NIC and store
1723  * them in the @p flow if everything is correct.
1724  *
1725  * @param[in] dev
1726  *   Pointer to the Ethernet device structure.
1727  * @param[in] attributes
1728  *   Pointer to flow attributes
1729  * @param[out] error
1730  *   Pointer to error structure.
1731  *
1732  * @return
1733  *   0 on success, a negative errno value otherwise and rte_errno is set.
1734  */
1735 int
1736 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1737                               const struct rte_flow_attr *attributes,
1738                               struct rte_flow_error *error)
1739 {
1740         struct mlx5_priv *priv = dev->data->dev_private;
1741         uint32_t priority_max = priv->config.flow_prio - 1;
1742
1743         if (attributes->group)
1744                 return rte_flow_error_set(error, ENOTSUP,
1745                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1746                                           NULL, "groups is not supported");
1747         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
1748             attributes->priority >= priority_max)
1749                 return rte_flow_error_set(error, ENOTSUP,
1750                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1751                                           NULL, "priority out of range");
1752         if (attributes->egress)
1753                 return rte_flow_error_set(error, ENOTSUP,
1754                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1755                                           "egress is not supported");
1756         if (attributes->transfer && !priv->config.dv_esw_en)
1757                 return rte_flow_error_set(error, ENOTSUP,
1758                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1759                                           NULL, "transfer is not supported");
1760         if (!attributes->ingress)
1761                 return rte_flow_error_set(error, EINVAL,
1762                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1763                                           NULL,
1764                                           "ingress attribute is mandatory");
1765         return 0;
1766 }
1767
1768 /**
1769  * Validate ICMP6 item.
1770  *
1771  * @param[in] item
1772  *   Item specification.
1773  * @param[in] item_flags
1774  *   Bit-fields that holds the items detected until now.
1775  * @param[in] ext_vlan_sup
1776  *   Whether extended VLAN features are supported or not.
1777  * @param[out] error
1778  *   Pointer to error structure.
1779  *
1780  * @return
1781  *   0 on success, a negative errno value otherwise and rte_errno is set.
1782  */
1783 int
1784 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1785                                uint64_t item_flags,
1786                                uint8_t target_protocol,
1787                                struct rte_flow_error *error)
1788 {
1789         const struct rte_flow_item_icmp6 *mask = item->mask;
1790         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1791         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1792                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1793         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1794                                       MLX5_FLOW_LAYER_OUTER_L4;
1795         int ret;
1796
1797         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1798                 return rte_flow_error_set(error, EINVAL,
1799                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1800                                           "protocol filtering not compatible"
1801                                           " with ICMP6 layer");
1802         if (!(item_flags & l3m))
1803                 return rte_flow_error_set(error, EINVAL,
1804                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1805                                           "IPv6 is mandatory to filter on"
1806                                           " ICMP6");
1807         if (item_flags & l4m)
1808                 return rte_flow_error_set(error, EINVAL,
1809                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1810                                           "multiple L4 layers not supported");
1811         if (!mask)
1812                 mask = &rte_flow_item_icmp6_mask;
1813         ret = mlx5_flow_item_acceptable
1814                 (item, (const uint8_t *)mask,
1815                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1816                  sizeof(struct rte_flow_item_icmp6),
1817                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1818         if (ret < 0)
1819                 return ret;
1820         return 0;
1821 }
1822
1823 /**
1824  * Validate ICMP item.
1825  *
1826  * @param[in] item
1827  *   Item specification.
1828  * @param[in] item_flags
1829  *   Bit-fields that holds the items detected until now.
1830  * @param[out] error
1831  *   Pointer to error structure.
1832  *
1833  * @return
1834  *   0 on success, a negative errno value otherwise and rte_errno is set.
1835  */
1836 int
1837 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1838                              uint64_t item_flags,
1839                              uint8_t target_protocol,
1840                              struct rte_flow_error *error)
1841 {
1842         const struct rte_flow_item_icmp *mask = item->mask;
1843         const struct rte_flow_item_icmp nic_mask = {
1844                 .hdr.icmp_type = 0xff,
1845                 .hdr.icmp_code = 0xff,
1846                 .hdr.icmp_ident = RTE_BE16(0xffff),
1847                 .hdr.icmp_seq_nb = RTE_BE16(0xffff),
1848         };
1849         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1850         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1851                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1852         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1853                                       MLX5_FLOW_LAYER_OUTER_L4;
1854         int ret;
1855
1856         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1857                 return rte_flow_error_set(error, EINVAL,
1858                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1859                                           "protocol filtering not compatible"
1860                                           " with ICMP layer");
1861         if (!(item_flags & l3m))
1862                 return rte_flow_error_set(error, EINVAL,
1863                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1864                                           "IPv4 is mandatory to filter"
1865                                           " on ICMP");
1866         if (item_flags & l4m)
1867                 return rte_flow_error_set(error, EINVAL,
1868                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1869                                           "multiple L4 layers not supported");
1870         if (!mask)
1871                 mask = &nic_mask;
1872         ret = mlx5_flow_item_acceptable
1873                 (item, (const uint8_t *)mask,
1874                  (const uint8_t *)&nic_mask,
1875                  sizeof(struct rte_flow_item_icmp),
1876                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1877         if (ret < 0)
1878                 return ret;
1879         return 0;
1880 }
1881
1882 /**
1883  * Validate Ethernet item.
1884  *
1885  * @param[in] item
1886  *   Item specification.
1887  * @param[in] item_flags
1888  *   Bit-fields that holds the items detected until now.
1889  * @param[out] error
1890  *   Pointer to error structure.
1891  *
1892  * @return
1893  *   0 on success, a negative errno value otherwise and rte_errno is set.
1894  */
1895 int
1896 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1897                             uint64_t item_flags, bool ext_vlan_sup,
1898                             struct rte_flow_error *error)
1899 {
1900         const struct rte_flow_item_eth *mask = item->mask;
1901         const struct rte_flow_item_eth nic_mask = {
1902                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1903                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1904                 .type = RTE_BE16(0xffff),
1905                 .has_vlan = ext_vlan_sup ? 1 : 0,
1906         };
1907         int ret;
1908         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1909         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1910                                        MLX5_FLOW_LAYER_OUTER_L2;
1911
1912         if (item_flags & ethm)
1913                 return rte_flow_error_set(error, ENOTSUP,
1914                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1915                                           "multiple L2 layers not supported");
1916         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
1917             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
1918                 return rte_flow_error_set(error, EINVAL,
1919                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1920                                           "L2 layer should not follow "
1921                                           "L3 layers");
1922         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
1923             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
1924                 return rte_flow_error_set(error, EINVAL,
1925                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1926                                           "L2 layer should not follow VLAN");
1927         if (!mask)
1928                 mask = &rte_flow_item_eth_mask;
1929         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1930                                         (const uint8_t *)&nic_mask,
1931                                         sizeof(struct rte_flow_item_eth),
1932                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1933         return ret;
1934 }
1935
1936 /**
1937  * Validate VLAN item.
1938  *
1939  * @param[in] item
1940  *   Item specification.
1941  * @param[in] item_flags
1942  *   Bit-fields that holds the items detected until now.
1943  * @param[in] dev
1944  *   Ethernet device flow is being created on.
1945  * @param[out] error
1946  *   Pointer to error structure.
1947  *
1948  * @return
1949  *   0 on success, a negative errno value otherwise and rte_errno is set.
1950  */
1951 int
1952 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1953                              uint64_t item_flags,
1954                              struct rte_eth_dev *dev,
1955                              struct rte_flow_error *error)
1956 {
1957         const struct rte_flow_item_vlan *spec = item->spec;
1958         const struct rte_flow_item_vlan *mask = item->mask;
1959         const struct rte_flow_item_vlan nic_mask = {
1960                 .tci = RTE_BE16(UINT16_MAX),
1961                 .inner_type = RTE_BE16(UINT16_MAX),
1962         };
1963         uint16_t vlan_tag = 0;
1964         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1965         int ret;
1966         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1967                                         MLX5_FLOW_LAYER_INNER_L4) :
1968                                        (MLX5_FLOW_LAYER_OUTER_L3 |
1969                                         MLX5_FLOW_LAYER_OUTER_L4);
1970         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1971                                         MLX5_FLOW_LAYER_OUTER_VLAN;
1972
1973         if (item_flags & vlanm)
1974                 return rte_flow_error_set(error, EINVAL,
1975                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1976                                           "multiple VLAN layers not supported");
1977         else if ((item_flags & l34m) != 0)
1978                 return rte_flow_error_set(error, EINVAL,
1979                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1980                                           "VLAN cannot follow L3/L4 layer");
1981         if (!mask)
1982                 mask = &rte_flow_item_vlan_mask;
1983         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1984                                         (const uint8_t *)&nic_mask,
1985                                         sizeof(struct rte_flow_item_vlan),
1986                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1987         if (ret)
1988                 return ret;
1989         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
1990                 struct mlx5_priv *priv = dev->data->dev_private;
1991
1992                 if (priv->vmwa_context) {
1993                         /*
1994                          * Non-NULL context means we have a virtual machine
1995                          * and SR-IOV enabled, we have to create VLAN interface
1996                          * to make hypervisor to setup E-Switch vport
1997                          * context correctly. We avoid creating the multiple
1998                          * VLAN interfaces, so we cannot support VLAN tag mask.
1999                          */
2000                         return rte_flow_error_set(error, EINVAL,
2001                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2002                                                   item,
2003                                                   "VLAN tag mask is not"
2004                                                   " supported in virtual"
2005                                                   " environment");
2006                 }
2007         }
2008         if (spec) {
2009                 vlan_tag = spec->tci;
2010                 vlan_tag &= mask->tci;
2011         }
2012         /*
2013          * From verbs perspective an empty VLAN is equivalent
2014          * to a packet without VLAN layer.
2015          */
2016         if (!vlan_tag)
2017                 return rte_flow_error_set(error, EINVAL,
2018                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2019                                           item->spec,
2020                                           "VLAN cannot be empty");
2021         return 0;
2022 }
2023
2024 /**
2025  * Validate IPV4 item.
2026  *
2027  * @param[in] item
2028  *   Item specification.
2029  * @param[in] item_flags
2030  *   Bit-fields that holds the items detected until now.
2031  * @param[in] last_item
2032  *   Previous validated item in the pattern items.
2033  * @param[in] ether_type
2034  *   Type in the ethernet layer header (including dot1q).
2035  * @param[in] acc_mask
2036  *   Acceptable mask, if NULL default internal default mask
2037  *   will be used to check whether item fields are supported.
2038  * @param[in] range_accepted
2039  *   True if range of values is accepted for specific fields, false otherwise.
2040  * @param[out] error
2041  *   Pointer to error structure.
2042  *
2043  * @return
2044  *   0 on success, a negative errno value otherwise and rte_errno is set.
2045  */
2046 int
2047 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
2048                              uint64_t item_flags,
2049                              uint64_t last_item,
2050                              uint16_t ether_type,
2051                              const struct rte_flow_item_ipv4 *acc_mask,
2052                              bool range_accepted,
2053                              struct rte_flow_error *error)
2054 {
2055         const struct rte_flow_item_ipv4 *mask = item->mask;
2056         const struct rte_flow_item_ipv4 *spec = item->spec;
2057         const struct rte_flow_item_ipv4 nic_mask = {
2058                 .hdr = {
2059                         .src_addr = RTE_BE32(0xffffffff),
2060                         .dst_addr = RTE_BE32(0xffffffff),
2061                         .type_of_service = 0xff,
2062                         .next_proto_id = 0xff,
2063                 },
2064         };
2065         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2066         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2067                                       MLX5_FLOW_LAYER_OUTER_L3;
2068         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2069                                       MLX5_FLOW_LAYER_OUTER_L4;
2070         int ret;
2071         uint8_t next_proto = 0xFF;
2072         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2073                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2074                                   MLX5_FLOW_LAYER_INNER_VLAN);
2075
2076         if ((last_item & l2_vlan) && ether_type &&
2077             ether_type != RTE_ETHER_TYPE_IPV4)
2078                 return rte_flow_error_set(error, EINVAL,
2079                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2080                                           "IPv4 cannot follow L2/VLAN layer "
2081                                           "which ether type is not IPv4");
2082         if (item_flags & MLX5_FLOW_LAYER_IPIP) {
2083                 if (mask && spec)
2084                         next_proto = mask->hdr.next_proto_id &
2085                                      spec->hdr.next_proto_id;
2086                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2087                         return rte_flow_error_set(error, EINVAL,
2088                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2089                                                   item,
2090                                                   "multiple tunnel "
2091                                                   "not supported");
2092         }
2093         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
2094                 return rte_flow_error_set(error, EINVAL,
2095                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2096                                           "wrong tunnel type - IPv6 specified "
2097                                           "but IPv4 item provided");
2098         if (item_flags & l3m)
2099                 return rte_flow_error_set(error, ENOTSUP,
2100                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2101                                           "multiple L3 layers not supported");
2102         else if (item_flags & l4m)
2103                 return rte_flow_error_set(error, EINVAL,
2104                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2105                                           "L3 cannot follow an L4 layer.");
2106         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2107                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2108                 return rte_flow_error_set(error, EINVAL,
2109                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2110                                           "L3 cannot follow an NVGRE layer.");
2111         if (!mask)
2112                 mask = &rte_flow_item_ipv4_mask;
2113         else if (mask->hdr.next_proto_id != 0 &&
2114                  mask->hdr.next_proto_id != 0xff)
2115                 return rte_flow_error_set(error, EINVAL,
2116                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2117                                           "partial mask is not supported"
2118                                           " for protocol");
2119         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2120                                         acc_mask ? (const uint8_t *)acc_mask
2121                                                  : (const uint8_t *)&nic_mask,
2122                                         sizeof(struct rte_flow_item_ipv4),
2123                                         range_accepted, error);
2124         if (ret < 0)
2125                 return ret;
2126         return 0;
2127 }
2128
2129 /**
2130  * Validate IPV6 item.
2131  *
2132  * @param[in] item
2133  *   Item specification.
2134  * @param[in] item_flags
2135  *   Bit-fields that holds the items detected until now.
2136  * @param[in] last_item
2137  *   Previous validated item in the pattern items.
2138  * @param[in] ether_type
2139  *   Type in the ethernet layer header (including dot1q).
2140  * @param[in] acc_mask
2141  *   Acceptable mask, if NULL default internal default mask
2142  *   will be used to check whether item fields are supported.
2143  * @param[out] error
2144  *   Pointer to error structure.
2145  *
2146  * @return
2147  *   0 on success, a negative errno value otherwise and rte_errno is set.
2148  */
2149 int
2150 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
2151                              uint64_t item_flags,
2152                              uint64_t last_item,
2153                              uint16_t ether_type,
2154                              const struct rte_flow_item_ipv6 *acc_mask,
2155                              struct rte_flow_error *error)
2156 {
2157         const struct rte_flow_item_ipv6 *mask = item->mask;
2158         const struct rte_flow_item_ipv6 *spec = item->spec;
2159         const struct rte_flow_item_ipv6 nic_mask = {
2160                 .hdr = {
2161                         .src_addr =
2162                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2163                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2164                         .dst_addr =
2165                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2166                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2167                         .vtc_flow = RTE_BE32(0xffffffff),
2168                         .proto = 0xff,
2169                 },
2170         };
2171         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2172         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2173                                       MLX5_FLOW_LAYER_OUTER_L3;
2174         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2175                                       MLX5_FLOW_LAYER_OUTER_L4;
2176         int ret;
2177         uint8_t next_proto = 0xFF;
2178         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2179                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2180                                   MLX5_FLOW_LAYER_INNER_VLAN);
2181
2182         if ((last_item & l2_vlan) && ether_type &&
2183             ether_type != RTE_ETHER_TYPE_IPV6)
2184                 return rte_flow_error_set(error, EINVAL,
2185                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2186                                           "IPv6 cannot follow L2/VLAN layer "
2187                                           "which ether type is not IPv6");
2188         if (mask && mask->hdr.proto == UINT8_MAX && spec)
2189                 next_proto = spec->hdr.proto;
2190         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
2191                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2192                         return rte_flow_error_set(error, EINVAL,
2193                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2194                                                   item,
2195                                                   "multiple tunnel "
2196                                                   "not supported");
2197         }
2198         if (next_proto == IPPROTO_HOPOPTS  ||
2199             next_proto == IPPROTO_ROUTING  ||
2200             next_proto == IPPROTO_FRAGMENT ||
2201             next_proto == IPPROTO_ESP      ||
2202             next_proto == IPPROTO_AH       ||
2203             next_proto == IPPROTO_DSTOPTS)
2204                 return rte_flow_error_set(error, EINVAL,
2205                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2206                                           "IPv6 proto (next header) should "
2207                                           "not be set as extension header");
2208         if (item_flags & MLX5_FLOW_LAYER_IPIP)
2209                 return rte_flow_error_set(error, EINVAL,
2210                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2211                                           "wrong tunnel type - IPv4 specified "
2212                                           "but IPv6 item provided");
2213         if (item_flags & l3m)
2214                 return rte_flow_error_set(error, ENOTSUP,
2215                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2216                                           "multiple L3 layers not supported");
2217         else if (item_flags & l4m)
2218                 return rte_flow_error_set(error, EINVAL,
2219                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2220                                           "L3 cannot follow an L4 layer.");
2221         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2222                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2223                 return rte_flow_error_set(error, EINVAL,
2224                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2225                                           "L3 cannot follow an NVGRE layer.");
2226         if (!mask)
2227                 mask = &rte_flow_item_ipv6_mask;
2228         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2229                                         acc_mask ? (const uint8_t *)acc_mask
2230                                                  : (const uint8_t *)&nic_mask,
2231                                         sizeof(struct rte_flow_item_ipv6),
2232                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2233         if (ret < 0)
2234                 return ret;
2235         return 0;
2236 }
2237
2238 /**
2239  * Validate UDP item.
2240  *
2241  * @param[in] item
2242  *   Item specification.
2243  * @param[in] item_flags
2244  *   Bit-fields that holds the items detected until now.
2245  * @param[in] target_protocol
2246  *   The next protocol in the previous item.
2247  * @param[in] flow_mask
2248  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
2249  * @param[out] error
2250  *   Pointer to error structure.
2251  *
2252  * @return
2253  *   0 on success, a negative errno value otherwise and rte_errno is set.
2254  */
2255 int
2256 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
2257                             uint64_t item_flags,
2258                             uint8_t target_protocol,
2259                             struct rte_flow_error *error)
2260 {
2261         const struct rte_flow_item_udp *mask = item->mask;
2262         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2263         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2264                                       MLX5_FLOW_LAYER_OUTER_L3;
2265         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2266                                       MLX5_FLOW_LAYER_OUTER_L4;
2267         int ret;
2268
2269         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
2270                 return rte_flow_error_set(error, EINVAL,
2271                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2272                                           "protocol filtering not compatible"
2273                                           " with UDP layer");
2274         if (!(item_flags & l3m))
2275                 return rte_flow_error_set(error, EINVAL,
2276                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2277                                           "L3 is mandatory to filter on L4");
2278         if (item_flags & l4m)
2279                 return rte_flow_error_set(error, EINVAL,
2280                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2281                                           "multiple L4 layers not supported");
2282         if (!mask)
2283                 mask = &rte_flow_item_udp_mask;
2284         ret = mlx5_flow_item_acceptable
2285                 (item, (const uint8_t *)mask,
2286                  (const uint8_t *)&rte_flow_item_udp_mask,
2287                  sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2288                  error);
2289         if (ret < 0)
2290                 return ret;
2291         return 0;
2292 }
2293
2294 /**
2295  * Validate TCP item.
2296  *
2297  * @param[in] item
2298  *   Item specification.
2299  * @param[in] item_flags
2300  *   Bit-fields that holds the items detected until now.
2301  * @param[in] target_protocol
2302  *   The next protocol in the previous item.
2303  * @param[out] error
2304  *   Pointer to error structure.
2305  *
2306  * @return
2307  *   0 on success, a negative errno value otherwise and rte_errno is set.
2308  */
2309 int
2310 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
2311                             uint64_t item_flags,
2312                             uint8_t target_protocol,
2313                             const struct rte_flow_item_tcp *flow_mask,
2314                             struct rte_flow_error *error)
2315 {
2316         const struct rte_flow_item_tcp *mask = item->mask;
2317         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2318         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2319                                       MLX5_FLOW_LAYER_OUTER_L3;
2320         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2321                                       MLX5_FLOW_LAYER_OUTER_L4;
2322         int ret;
2323
2324         MLX5_ASSERT(flow_mask);
2325         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
2326                 return rte_flow_error_set(error, EINVAL,
2327                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2328                                           "protocol filtering not compatible"
2329                                           " with TCP layer");
2330         if (!(item_flags & l3m))
2331                 return rte_flow_error_set(error, EINVAL,
2332                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2333                                           "L3 is mandatory to filter on L4");
2334         if (item_flags & l4m)
2335                 return rte_flow_error_set(error, EINVAL,
2336                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2337                                           "multiple L4 layers not supported");
2338         if (!mask)
2339                 mask = &rte_flow_item_tcp_mask;
2340         ret = mlx5_flow_item_acceptable
2341                 (item, (const uint8_t *)mask,
2342                  (const uint8_t *)flow_mask,
2343                  sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2344                  error);
2345         if (ret < 0)
2346                 return ret;
2347         return 0;
2348 }
2349
2350 /**
2351  * Validate VXLAN item.
2352  *
2353  * @param[in] item
2354  *   Item specification.
2355  * @param[in] item_flags
2356  *   Bit-fields that holds the items detected until now.
2357  * @param[in] target_protocol
2358  *   The next protocol in the previous item.
2359  * @param[out] error
2360  *   Pointer to error structure.
2361  *
2362  * @return
2363  *   0 on success, a negative errno value otherwise and rte_errno is set.
2364  */
2365 int
2366 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
2367                               uint64_t item_flags,
2368                               struct rte_flow_error *error)
2369 {
2370         const struct rte_flow_item_vxlan *spec = item->spec;
2371         const struct rte_flow_item_vxlan *mask = item->mask;
2372         int ret;
2373         union vni {
2374                 uint32_t vlan_id;
2375                 uint8_t vni[4];
2376         } id = { .vlan_id = 0, };
2377
2378
2379         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2380                 return rte_flow_error_set(error, ENOTSUP,
2381                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2382                                           "multiple tunnel layers not"
2383                                           " supported");
2384         /*
2385          * Verify only UDPv4 is present as defined in
2386          * https://tools.ietf.org/html/rfc7348
2387          */
2388         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2389                 return rte_flow_error_set(error, EINVAL,
2390                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2391                                           "no outer UDP layer found");
2392         if (!mask)
2393                 mask = &rte_flow_item_vxlan_mask;
2394         ret = mlx5_flow_item_acceptable
2395                 (item, (const uint8_t *)mask,
2396                  (const uint8_t *)&rte_flow_item_vxlan_mask,
2397                  sizeof(struct rte_flow_item_vxlan),
2398                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2399         if (ret < 0)
2400                 return ret;
2401         if (spec) {
2402                 memcpy(&id.vni[1], spec->vni, 3);
2403                 memcpy(&id.vni[1], mask->vni, 3);
2404         }
2405         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2406                 return rte_flow_error_set(error, ENOTSUP,
2407                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2408                                           "VXLAN tunnel must be fully defined");
2409         return 0;
2410 }
2411
2412 /**
2413  * Validate VXLAN_GPE item.
2414  *
2415  * @param[in] item
2416  *   Item specification.
2417  * @param[in] item_flags
2418  *   Bit-fields that holds the items detected until now.
2419  * @param[in] priv
2420  *   Pointer to the private data structure.
2421  * @param[in] target_protocol
2422  *   The next protocol in the previous item.
2423  * @param[out] error
2424  *   Pointer to error structure.
2425  *
2426  * @return
2427  *   0 on success, a negative errno value otherwise and rte_errno is set.
2428  */
2429 int
2430 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
2431                                   uint64_t item_flags,
2432                                   struct rte_eth_dev *dev,
2433                                   struct rte_flow_error *error)
2434 {
2435         struct mlx5_priv *priv = dev->data->dev_private;
2436         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
2437         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
2438         int ret;
2439         union vni {
2440                 uint32_t vlan_id;
2441                 uint8_t vni[4];
2442         } id = { .vlan_id = 0, };
2443
2444         if (!priv->config.l3_vxlan_en)
2445                 return rte_flow_error_set(error, ENOTSUP,
2446                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2447                                           "L3 VXLAN is not enabled by device"
2448                                           " parameter and/or not configured in"
2449                                           " firmware");
2450         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2451                 return rte_flow_error_set(error, ENOTSUP,
2452                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2453                                           "multiple tunnel layers not"
2454                                           " supported");
2455         /*
2456          * Verify only UDPv4 is present as defined in
2457          * https://tools.ietf.org/html/rfc7348
2458          */
2459         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2460                 return rte_flow_error_set(error, EINVAL,
2461                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2462                                           "no outer UDP layer found");
2463         if (!mask)
2464                 mask = &rte_flow_item_vxlan_gpe_mask;
2465         ret = mlx5_flow_item_acceptable
2466                 (item, (const uint8_t *)mask,
2467                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
2468                  sizeof(struct rte_flow_item_vxlan_gpe),
2469                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2470         if (ret < 0)
2471                 return ret;
2472         if (spec) {
2473                 if (spec->protocol)
2474                         return rte_flow_error_set(error, ENOTSUP,
2475                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2476                                                   item,
2477                                                   "VxLAN-GPE protocol"
2478                                                   " not supported");
2479                 memcpy(&id.vni[1], spec->vni, 3);
2480                 memcpy(&id.vni[1], mask->vni, 3);
2481         }
2482         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2483                 return rte_flow_error_set(error, ENOTSUP,
2484                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2485                                           "VXLAN-GPE tunnel must be fully"
2486                                           " defined");
2487         return 0;
2488 }
2489 /**
2490  * Validate GRE Key item.
2491  *
2492  * @param[in] item
2493  *   Item specification.
2494  * @param[in] item_flags
2495  *   Bit flags to mark detected items.
2496  * @param[in] gre_item
2497  *   Pointer to gre_item
2498  * @param[out] error
2499  *   Pointer to error structure.
2500  *
2501  * @return
2502  *   0 on success, a negative errno value otherwise and rte_errno is set.
2503  */
2504 int
2505 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
2506                                 uint64_t item_flags,
2507                                 const struct rte_flow_item *gre_item,
2508                                 struct rte_flow_error *error)
2509 {
2510         const rte_be32_t *mask = item->mask;
2511         int ret = 0;
2512         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
2513         const struct rte_flow_item_gre *gre_spec;
2514         const struct rte_flow_item_gre *gre_mask;
2515
2516         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
2517                 return rte_flow_error_set(error, ENOTSUP,
2518                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2519                                           "Multiple GRE key not support");
2520         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2521                 return rte_flow_error_set(error, ENOTSUP,
2522                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2523                                           "No preceding GRE header");
2524         if (item_flags & MLX5_FLOW_LAYER_INNER)
2525                 return rte_flow_error_set(error, ENOTSUP,
2526                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2527                                           "GRE key following a wrong item");
2528         gre_mask = gre_item->mask;
2529         if (!gre_mask)
2530                 gre_mask = &rte_flow_item_gre_mask;
2531         gre_spec = gre_item->spec;
2532         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2533                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2534                 return rte_flow_error_set(error, EINVAL,
2535                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2536                                           "Key bit must be on");
2537
2538         if (!mask)
2539                 mask = &gre_key_default_mask;
2540         ret = mlx5_flow_item_acceptable
2541                 (item, (const uint8_t *)mask,
2542                  (const uint8_t *)&gre_key_default_mask,
2543                  sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2544         return ret;
2545 }
2546
2547 /**
2548  * Validate GRE item.
2549  *
2550  * @param[in] item
2551  *   Item specification.
2552  * @param[in] item_flags
2553  *   Bit flags to mark detected items.
2554  * @param[in] target_protocol
2555  *   The next protocol in the previous item.
2556  * @param[out] error
2557  *   Pointer to error structure.
2558  *
2559  * @return
2560  *   0 on success, a negative errno value otherwise and rte_errno is set.
2561  */
2562 int
2563 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2564                             uint64_t item_flags,
2565                             uint8_t target_protocol,
2566                             struct rte_flow_error *error)
2567 {
2568         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2569         const struct rte_flow_item_gre *mask = item->mask;
2570         int ret;
2571         const struct rte_flow_item_gre nic_mask = {
2572                 .c_rsvd0_ver = RTE_BE16(0xB000),
2573                 .protocol = RTE_BE16(UINT16_MAX),
2574         };
2575
2576         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2577                 return rte_flow_error_set(error, EINVAL,
2578                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2579                                           "protocol filtering not compatible"
2580                                           " with this GRE layer");
2581         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2582                 return rte_flow_error_set(error, ENOTSUP,
2583                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2584                                           "multiple tunnel layers not"
2585                                           " supported");
2586         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2587                 return rte_flow_error_set(error, ENOTSUP,
2588                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2589                                           "L3 Layer is missing");
2590         if (!mask)
2591                 mask = &rte_flow_item_gre_mask;
2592         ret = mlx5_flow_item_acceptable
2593                 (item, (const uint8_t *)mask,
2594                  (const uint8_t *)&nic_mask,
2595                  sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2596                  error);
2597         if (ret < 0)
2598                 return ret;
2599 #ifndef HAVE_MLX5DV_DR
2600 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2601         if (spec && (spec->protocol & mask->protocol))
2602                 return rte_flow_error_set(error, ENOTSUP,
2603                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2604                                           "without MPLS support the"
2605                                           " specification cannot be used for"
2606                                           " filtering");
2607 #endif
2608 #endif
2609         return 0;
2610 }
2611
2612 /**
2613  * Validate Geneve item.
2614  *
2615  * @param[in] item
2616  *   Item specification.
2617  * @param[in] itemFlags
2618  *   Bit-fields that holds the items detected until now.
2619  * @param[in] enPriv
2620  *   Pointer to the private data structure.
2621  * @param[out] error
2622  *   Pointer to error structure.
2623  *
2624  * @return
2625  *   0 on success, a negative errno value otherwise and rte_errno is set.
2626  */
2627
2628 int
2629 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2630                                uint64_t item_flags,
2631                                struct rte_eth_dev *dev,
2632                                struct rte_flow_error *error)
2633 {
2634         struct mlx5_priv *priv = dev->data->dev_private;
2635         const struct rte_flow_item_geneve *spec = item->spec;
2636         const struct rte_flow_item_geneve *mask = item->mask;
2637         int ret;
2638         uint16_t gbhdr;
2639         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2640                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2641         const struct rte_flow_item_geneve nic_mask = {
2642                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2643                 .vni = "\xff\xff\xff",
2644                 .protocol = RTE_BE16(UINT16_MAX),
2645         };
2646
2647         if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2648                 return rte_flow_error_set(error, ENOTSUP,
2649                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2650                                           "L3 Geneve is not enabled by device"
2651                                           " parameter and/or not configured in"
2652                                           " firmware");
2653         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2654                 return rte_flow_error_set(error, ENOTSUP,
2655                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2656                                           "multiple tunnel layers not"
2657                                           " supported");
2658         /*
2659          * Verify only UDPv4 is present as defined in
2660          * https://tools.ietf.org/html/rfc7348
2661          */
2662         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2663                 return rte_flow_error_set(error, EINVAL,
2664                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2665                                           "no outer UDP layer found");
2666         if (!mask)
2667                 mask = &rte_flow_item_geneve_mask;
2668         ret = mlx5_flow_item_acceptable
2669                                   (item, (const uint8_t *)mask,
2670                                    (const uint8_t *)&nic_mask,
2671                                    sizeof(struct rte_flow_item_geneve),
2672                                    MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2673         if (ret)
2674                 return ret;
2675         if (spec) {
2676                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2677                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2678                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2679                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2680                         return rte_flow_error_set(error, ENOTSUP,
2681                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2682                                                   item,
2683                                                   "Geneve protocol unsupported"
2684                                                   " fields are being used");
2685                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2686                         return rte_flow_error_set
2687                                         (error, ENOTSUP,
2688                                          RTE_FLOW_ERROR_TYPE_ITEM,
2689                                          item,
2690                                          "Unsupported Geneve options length");
2691         }
2692         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2693                 return rte_flow_error_set
2694                                     (error, ENOTSUP,
2695                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2696                                      "Geneve tunnel must be fully defined");
2697         return 0;
2698 }
2699
2700 /**
2701  * Validate Geneve TLV option item.
2702  *
2703  * @param[in] item
2704  *   Item specification.
2705  * @param[in] last_item
2706  *   Previous validated item in the pattern items.
2707  * @param[in] geneve_item
2708  *   Previous GENEVE item specification.
2709  * @param[in] dev
2710  *   Pointer to the rte_eth_dev structure.
2711  * @param[out] error
2712  *   Pointer to error structure.
2713  *
2714  * @return
2715  *   0 on success, a negative errno value otherwise and rte_errno is set.
2716  */
2717 int
2718 mlx5_flow_validate_item_geneve_opt(const struct rte_flow_item *item,
2719                                    uint64_t last_item,
2720                                    const struct rte_flow_item *geneve_item,
2721                                    struct rte_eth_dev *dev,
2722                                    struct rte_flow_error *error)
2723 {
2724         struct mlx5_priv *priv = dev->data->dev_private;
2725         struct mlx5_dev_ctx_shared *sh = priv->sh;
2726         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource;
2727         struct mlx5_hca_attr *hca_attr = &priv->config.hca_attr;
2728         uint8_t data_max_supported =
2729                         hca_attr->max_geneve_tlv_option_data_len * 4;
2730         struct mlx5_dev_config *config = &priv->config;
2731         const struct rte_flow_item_geneve *geneve_spec;
2732         const struct rte_flow_item_geneve *geneve_mask;
2733         const struct rte_flow_item_geneve_opt *spec = item->spec;
2734         const struct rte_flow_item_geneve_opt *mask = item->mask;
2735         unsigned int i;
2736         unsigned int data_len;
2737         uint8_t tlv_option_len;
2738         uint16_t optlen_m, optlen_v;
2739         const struct rte_flow_item_geneve_opt full_mask = {
2740                 .option_class = RTE_BE16(0xffff),
2741                 .option_type = 0xff,
2742                 .option_len = 0x1f,
2743         };
2744
2745         if (!mask)
2746                 mask = &rte_flow_item_geneve_opt_mask;
2747         if (!spec)
2748                 return rte_flow_error_set
2749                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2750                         "Geneve TLV opt class/type/length must be specified");
2751         if ((uint32_t)spec->option_len > MLX5_GENEVE_OPTLEN_MASK)
2752                 return rte_flow_error_set
2753                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2754                         "Geneve TLV opt length exceeeds the limit (31)");
2755         /* Check if class type and length masks are full. */
2756         if (full_mask.option_class != mask->option_class ||
2757             full_mask.option_type != mask->option_type ||
2758             full_mask.option_len != (mask->option_len & full_mask.option_len))
2759                 return rte_flow_error_set
2760                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2761                         "Geneve TLV opt class/type/length masks must be full");
2762         /* Check if length is supported */
2763         if ((uint32_t)spec->option_len >
2764                         config->hca_attr.max_geneve_tlv_option_data_len)
2765                 return rte_flow_error_set
2766                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2767                         "Geneve TLV opt length not supported");
2768         if (config->hca_attr.max_geneve_tlv_options > 1)
2769                 DRV_LOG(DEBUG,
2770                         "max_geneve_tlv_options supports more than 1 option");
2771         /* Check GENEVE item preceding. */
2772         if (!geneve_item || !(last_item & MLX5_FLOW_LAYER_GENEVE))
2773                 return rte_flow_error_set
2774                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2775                         "Geneve opt item must be preceded with Geneve item");
2776         geneve_spec = geneve_item->spec;
2777         geneve_mask = geneve_item->mask ? geneve_item->mask :
2778                                           &rte_flow_item_geneve_mask;
2779         /* Check if GENEVE TLV option size doesn't exceed option length */
2780         if (geneve_spec && (geneve_mask->ver_opt_len_o_c_rsvd0 ||
2781                             geneve_spec->ver_opt_len_o_c_rsvd0)) {
2782                 tlv_option_len = spec->option_len & mask->option_len;
2783                 optlen_v = rte_be_to_cpu_16(geneve_spec->ver_opt_len_o_c_rsvd0);
2784                 optlen_v = MLX5_GENEVE_OPTLEN_VAL(optlen_v);
2785                 optlen_m = rte_be_to_cpu_16(geneve_mask->ver_opt_len_o_c_rsvd0);
2786                 optlen_m = MLX5_GENEVE_OPTLEN_VAL(optlen_m);
2787                 if ((optlen_v & optlen_m) <= tlv_option_len)
2788                         return rte_flow_error_set
2789                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2790                                  "GENEVE TLV option length exceeds optlen");
2791         }
2792         /* Check if length is 0 or data is 0. */
2793         if (spec->data == NULL || spec->option_len == 0)
2794                 return rte_flow_error_set
2795                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2796                         "Geneve TLV opt with zero data/length not supported");
2797         /* Check not all data & mask are 0. */
2798         data_len = spec->option_len * 4;
2799         if (mask->data == NULL) {
2800                 for (i = 0; i < data_len; i++)
2801                         if (spec->data[i])
2802                                 break;
2803                 if (i == data_len)
2804                         return rte_flow_error_set(error, ENOTSUP,
2805                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2806                                 "Can't match on Geneve option data 0");
2807         } else {
2808                 for (i = 0; i < data_len; i++)
2809                         if (spec->data[i] & mask->data[i])
2810                                 break;
2811                 if (i == data_len)
2812                         return rte_flow_error_set(error, ENOTSUP,
2813                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2814                                 "Can't match on Geneve option data and mask 0");
2815                 /* Check data mask supported. */
2816                 for (i = data_max_supported; i < data_len ; i++)
2817                         if (mask->data[i])
2818                                 return rte_flow_error_set(error, ENOTSUP,
2819                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2820                                         "Data mask is of unsupported size");
2821         }
2822         /* Check GENEVE option is supported in NIC. */
2823         if (!config->hca_attr.geneve_tlv_opt)
2824                 return rte_flow_error_set
2825                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2826                         "Geneve TLV opt not supported");
2827         /* Check if we already have geneve option with different type/class. */
2828         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
2829         geneve_opt_resource = sh->geneve_tlv_option_resource;
2830         if (geneve_opt_resource != NULL)
2831                 if (geneve_opt_resource->option_class != spec->option_class ||
2832                     geneve_opt_resource->option_type != spec->option_type ||
2833                     geneve_opt_resource->length != spec->option_len) {
2834                         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
2835                         return rte_flow_error_set(error, ENOTSUP,
2836                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2837                                 "Only one Geneve TLV option supported");
2838                 }
2839         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
2840         return 0;
2841 }
2842
2843 /**
2844  * Validate MPLS item.
2845  *
2846  * @param[in] dev
2847  *   Pointer to the rte_eth_dev structure.
2848  * @param[in] item
2849  *   Item specification.
2850  * @param[in] item_flags
2851  *   Bit-fields that holds the items detected until now.
2852  * @param[in] prev_layer
2853  *   The protocol layer indicated in previous item.
2854  * @param[out] error
2855  *   Pointer to error structure.
2856  *
2857  * @return
2858  *   0 on success, a negative errno value otherwise and rte_errno is set.
2859  */
2860 int
2861 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
2862                              const struct rte_flow_item *item __rte_unused,
2863                              uint64_t item_flags __rte_unused,
2864                              uint64_t prev_layer __rte_unused,
2865                              struct rte_flow_error *error)
2866 {
2867 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2868         const struct rte_flow_item_mpls *mask = item->mask;
2869         struct mlx5_priv *priv = dev->data->dev_private;
2870         int ret;
2871
2872         if (!priv->config.mpls_en)
2873                 return rte_flow_error_set(error, ENOTSUP,
2874                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2875                                           "MPLS not supported or"
2876                                           " disabled in firmware"
2877                                           " configuration.");
2878         /* MPLS over IP, UDP, GRE is allowed */
2879         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
2880                             MLX5_FLOW_LAYER_OUTER_L4_UDP |
2881                             MLX5_FLOW_LAYER_GRE |
2882                             MLX5_FLOW_LAYER_GRE_KEY)))
2883                 return rte_flow_error_set(error, EINVAL,
2884                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2885                                           "protocol filtering not compatible"
2886                                           " with MPLS layer");
2887         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
2888         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
2889             !(item_flags & MLX5_FLOW_LAYER_GRE))
2890                 return rte_flow_error_set(error, ENOTSUP,
2891                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2892                                           "multiple tunnel layers not"
2893                                           " supported");
2894         if (!mask)
2895                 mask = &rte_flow_item_mpls_mask;
2896         ret = mlx5_flow_item_acceptable
2897                 (item, (const uint8_t *)mask,
2898                  (const uint8_t *)&rte_flow_item_mpls_mask,
2899                  sizeof(struct rte_flow_item_mpls),
2900                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2901         if (ret < 0)
2902                 return ret;
2903         return 0;
2904 #else
2905         return rte_flow_error_set(error, ENOTSUP,
2906                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
2907                                   "MPLS is not supported by Verbs, please"
2908                                   " update.");
2909 #endif
2910 }
2911
2912 /**
2913  * Validate NVGRE item.
2914  *
2915  * @param[in] item
2916  *   Item specification.
2917  * @param[in] item_flags
2918  *   Bit flags to mark detected items.
2919  * @param[in] target_protocol
2920  *   The next protocol in the previous item.
2921  * @param[out] error
2922  *   Pointer to error structure.
2923  *
2924  * @return
2925  *   0 on success, a negative errno value otherwise and rte_errno is set.
2926  */
2927 int
2928 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
2929                               uint64_t item_flags,
2930                               uint8_t target_protocol,
2931                               struct rte_flow_error *error)
2932 {
2933         const struct rte_flow_item_nvgre *mask = item->mask;
2934         int ret;
2935
2936         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2937                 return rte_flow_error_set(error, EINVAL,
2938                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2939                                           "protocol filtering not compatible"
2940                                           " with this GRE layer");
2941         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2942                 return rte_flow_error_set(error, ENOTSUP,
2943                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2944                                           "multiple tunnel layers not"
2945                                           " supported");
2946         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2947                 return rte_flow_error_set(error, ENOTSUP,
2948                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2949                                           "L3 Layer is missing");
2950         if (!mask)
2951                 mask = &rte_flow_item_nvgre_mask;
2952         ret = mlx5_flow_item_acceptable
2953                 (item, (const uint8_t *)mask,
2954                  (const uint8_t *)&rte_flow_item_nvgre_mask,
2955                  sizeof(struct rte_flow_item_nvgre),
2956                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2957         if (ret < 0)
2958                 return ret;
2959         return 0;
2960 }
2961
2962 /**
2963  * Validate eCPRI item.
2964  *
2965  * @param[in] item
2966  *   Item specification.
2967  * @param[in] item_flags
2968  *   Bit-fields that holds the items detected until now.
2969  * @param[in] last_item
2970  *   Previous validated item in the pattern items.
2971  * @param[in] ether_type
2972  *   Type in the ethernet layer header (including dot1q).
2973  * @param[in] acc_mask
2974  *   Acceptable mask, if NULL default internal default mask
2975  *   will be used to check whether item fields are supported.
2976  * @param[out] error
2977  *   Pointer to error structure.
2978  *
2979  * @return
2980  *   0 on success, a negative errno value otherwise and rte_errno is set.
2981  */
2982 int
2983 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item,
2984                               uint64_t item_flags,
2985                               uint64_t last_item,
2986                               uint16_t ether_type,
2987                               const struct rte_flow_item_ecpri *acc_mask,
2988                               struct rte_flow_error *error)
2989 {
2990         const struct rte_flow_item_ecpri *mask = item->mask;
2991         const struct rte_flow_item_ecpri nic_mask = {
2992                 .hdr = {
2993                         .common = {
2994                                 .u32 =
2995                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
2996                                         .type = 0xFF,
2997                                         }).u32),
2998                         },
2999                         .dummy[0] = 0xFFFFFFFF,
3000                 },
3001         };
3002         const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 |
3003                                         MLX5_FLOW_LAYER_OUTER_VLAN);
3004         struct rte_flow_item_ecpri mask_lo;
3005
3006         if (!(last_item & outer_l2_vlan) &&
3007             last_item != MLX5_FLOW_LAYER_OUTER_L4_UDP)
3008                 return rte_flow_error_set(error, EINVAL,
3009                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3010                                           "eCPRI can only follow L2/VLAN layer or UDP layer");
3011         if ((last_item & outer_l2_vlan) && ether_type &&
3012             ether_type != RTE_ETHER_TYPE_ECPRI)
3013                 return rte_flow_error_set(error, EINVAL,
3014                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3015                                           "eCPRI cannot follow L2/VLAN layer which ether type is not 0xAEFE");
3016         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3017                 return rte_flow_error_set(error, EINVAL,
3018                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3019                                           "eCPRI with tunnel is not supported right now");
3020         if (item_flags & MLX5_FLOW_LAYER_OUTER_L3)
3021                 return rte_flow_error_set(error, ENOTSUP,
3022                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3023                                           "multiple L3 layers not supported");
3024         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP)
3025                 return rte_flow_error_set(error, EINVAL,
3026                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3027                                           "eCPRI cannot coexist with a TCP layer");
3028         /* In specification, eCPRI could be over UDP layer. */
3029         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)
3030                 return rte_flow_error_set(error, EINVAL,
3031                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3032                                           "eCPRI over UDP layer is not yet supported right now");
3033         /* Mask for type field in common header could be zero. */
3034         if (!mask)
3035                 mask = &rte_flow_item_ecpri_mask;
3036         mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32);
3037         /* Input mask is in big-endian format. */
3038         if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff)
3039                 return rte_flow_error_set(error, EINVAL,
3040                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3041                                           "partial mask is not supported for protocol");
3042         else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0)
3043                 return rte_flow_error_set(error, EINVAL,
3044                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3045                                           "message header mask must be after a type mask");
3046         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
3047                                          acc_mask ? (const uint8_t *)acc_mask
3048                                                   : (const uint8_t *)&nic_mask,
3049                                          sizeof(struct rte_flow_item_ecpri),
3050                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3051 }
3052
3053 /**
3054  * Release resource related QUEUE/RSS action split.
3055  *
3056  * @param dev
3057  *   Pointer to Ethernet device.
3058  * @param flow
3059  *   Flow to release id's from.
3060  */
3061 static void
3062 flow_mreg_split_qrss_release(struct rte_eth_dev *dev,
3063                              struct rte_flow *flow)
3064 {
3065         struct mlx5_priv *priv = dev->data->dev_private;
3066         uint32_t handle_idx;
3067         struct mlx5_flow_handle *dev_handle;
3068
3069         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
3070                        handle_idx, dev_handle, next)
3071                 if (dev_handle->split_flow_id &&
3072                     !dev_handle->is_meter_flow_id)
3073                         mlx5_ipool_free(priv->sh->ipool
3074                                         [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
3075                                         dev_handle->split_flow_id);
3076 }
3077
3078 static int
3079 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
3080                    const struct rte_flow_attr *attr __rte_unused,
3081                    const struct rte_flow_item items[] __rte_unused,
3082                    const struct rte_flow_action actions[] __rte_unused,
3083                    bool external __rte_unused,
3084                    int hairpin __rte_unused,
3085                    struct rte_flow_error *error)
3086 {
3087         return rte_flow_error_set(error, ENOTSUP,
3088                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3089 }
3090
3091 static struct mlx5_flow *
3092 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
3093                   const struct rte_flow_attr *attr __rte_unused,
3094                   const struct rte_flow_item items[] __rte_unused,
3095                   const struct rte_flow_action actions[] __rte_unused,
3096                   struct rte_flow_error *error)
3097 {
3098         rte_flow_error_set(error, ENOTSUP,
3099                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3100         return NULL;
3101 }
3102
3103 static int
3104 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
3105                     struct mlx5_flow *dev_flow __rte_unused,
3106                     const struct rte_flow_attr *attr __rte_unused,
3107                     const struct rte_flow_item items[] __rte_unused,
3108                     const struct rte_flow_action actions[] __rte_unused,
3109                     struct rte_flow_error *error)
3110 {
3111         return rte_flow_error_set(error, ENOTSUP,
3112                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3113 }
3114
3115 static int
3116 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
3117                 struct rte_flow *flow __rte_unused,
3118                 struct rte_flow_error *error)
3119 {
3120         return rte_flow_error_set(error, ENOTSUP,
3121                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3122 }
3123
3124 static void
3125 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
3126                  struct rte_flow *flow __rte_unused)
3127 {
3128 }
3129
3130 static void
3131 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
3132                   struct rte_flow *flow __rte_unused)
3133 {
3134 }
3135
3136 static int
3137 flow_null_query(struct rte_eth_dev *dev __rte_unused,
3138                 struct rte_flow *flow __rte_unused,
3139                 const struct rte_flow_action *actions __rte_unused,
3140                 void *data __rte_unused,
3141                 struct rte_flow_error *error)
3142 {
3143         return rte_flow_error_set(error, ENOTSUP,
3144                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3145 }
3146
3147 static int
3148 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused,
3149                       uint32_t domains __rte_unused,
3150                       uint32_t flags __rte_unused)
3151 {
3152         return 0;
3153 }
3154
3155 /* Void driver to protect from null pointer reference. */
3156 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
3157         .validate = flow_null_validate,
3158         .prepare = flow_null_prepare,
3159         .translate = flow_null_translate,
3160         .apply = flow_null_apply,
3161         .remove = flow_null_remove,
3162         .destroy = flow_null_destroy,
3163         .query = flow_null_query,
3164         .sync_domain = flow_null_sync_domain,
3165 };
3166
3167 /**
3168  * Select flow driver type according to flow attributes and device
3169  * configuration.
3170  *
3171  * @param[in] dev
3172  *   Pointer to the dev structure.
3173  * @param[in] attr
3174  *   Pointer to the flow attributes.
3175  *
3176  * @return
3177  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
3178  */
3179 static enum mlx5_flow_drv_type
3180 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
3181 {
3182         struct mlx5_priv *priv = dev->data->dev_private;
3183         /* The OS can determine first a specific flow type (DV, VERBS) */
3184         enum mlx5_flow_drv_type type = mlx5_flow_os_get_type();
3185
3186         if (type != MLX5_FLOW_TYPE_MAX)
3187                 return type;
3188         /* If no OS specific type - continue with DV/VERBS selection */
3189         if (attr->transfer && priv->config.dv_esw_en)
3190                 type = MLX5_FLOW_TYPE_DV;
3191         if (!attr->transfer)
3192                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
3193                                                  MLX5_FLOW_TYPE_VERBS;
3194         return type;
3195 }
3196
3197 #define flow_get_drv_ops(type) flow_drv_ops[type]
3198
3199 /**
3200  * Flow driver validation API. This abstracts calling driver specific functions.
3201  * The type of flow driver is determined according to flow attributes.
3202  *
3203  * @param[in] dev
3204  *   Pointer to the dev structure.
3205  * @param[in] attr
3206  *   Pointer to the flow attributes.
3207  * @param[in] items
3208  *   Pointer to the list of items.
3209  * @param[in] actions
3210  *   Pointer to the list of actions.
3211  * @param[in] external
3212  *   This flow rule is created by request external to PMD.
3213  * @param[in] hairpin
3214  *   Number of hairpin TX actions, 0 means classic flow.
3215  * @param[out] error
3216  *   Pointer to the error structure.
3217  *
3218  * @return
3219  *   0 on success, a negative errno value otherwise and rte_errno is set.
3220  */
3221 static inline int
3222 flow_drv_validate(struct rte_eth_dev *dev,
3223                   const struct rte_flow_attr *attr,
3224                   const struct rte_flow_item items[],
3225                   const struct rte_flow_action actions[],
3226                   bool external, int hairpin, struct rte_flow_error *error)
3227 {
3228         const struct mlx5_flow_driver_ops *fops;
3229         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
3230
3231         fops = flow_get_drv_ops(type);
3232         return fops->validate(dev, attr, items, actions, external,
3233                               hairpin, error);
3234 }
3235
3236 /**
3237  * Flow driver preparation API. This abstracts calling driver specific
3238  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3239  * calculates the size of memory required for device flow, allocates the memory,
3240  * initializes the device flow and returns the pointer.
3241  *
3242  * @note
3243  *   This function initializes device flow structure such as dv or verbs in
3244  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
3245  *   rest. For example, adding returning device flow to flow->dev_flow list and
3246  *   setting backward reference to the flow should be done out of this function.
3247  *   layers field is not filled either.
3248  *
3249  * @param[in] dev
3250  *   Pointer to the dev structure.
3251  * @param[in] attr
3252  *   Pointer to the flow attributes.
3253  * @param[in] items
3254  *   Pointer to the list of items.
3255  * @param[in] actions
3256  *   Pointer to the list of actions.
3257  * @param[in] flow_idx
3258  *   This memory pool index to the flow.
3259  * @param[out] error
3260  *   Pointer to the error structure.
3261  *
3262  * @return
3263  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
3264  */
3265 static inline struct mlx5_flow *
3266 flow_drv_prepare(struct rte_eth_dev *dev,
3267                  const struct rte_flow *flow,
3268                  const struct rte_flow_attr *attr,
3269                  const struct rte_flow_item items[],
3270                  const struct rte_flow_action actions[],
3271                  uint32_t flow_idx,
3272                  struct rte_flow_error *error)
3273 {
3274         const struct mlx5_flow_driver_ops *fops;
3275         enum mlx5_flow_drv_type type = flow->drv_type;
3276         struct mlx5_flow *mlx5_flow = NULL;
3277
3278         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3279         fops = flow_get_drv_ops(type);
3280         mlx5_flow = fops->prepare(dev, attr, items, actions, error);
3281         if (mlx5_flow)
3282                 mlx5_flow->flow_idx = flow_idx;
3283         return mlx5_flow;
3284 }
3285
3286 /**
3287  * Flow driver translation API. This abstracts calling driver specific
3288  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3289  * translates a generic flow into a driver flow. flow_drv_prepare() must
3290  * precede.
3291  *
3292  * @note
3293  *   dev_flow->layers could be filled as a result of parsing during translation
3294  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
3295  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
3296  *   flow->actions could be overwritten even though all the expanded dev_flows
3297  *   have the same actions.
3298  *
3299  * @param[in] dev
3300  *   Pointer to the rte dev structure.
3301  * @param[in, out] dev_flow
3302  *   Pointer to the mlx5 flow.
3303  * @param[in] attr
3304  *   Pointer to the flow attributes.
3305  * @param[in] items
3306  *   Pointer to the list of items.
3307  * @param[in] actions
3308  *   Pointer to the list of actions.
3309  * @param[out] error
3310  *   Pointer to the error structure.
3311  *
3312  * @return
3313  *   0 on success, a negative errno value otherwise and rte_errno is set.
3314  */
3315 static inline int
3316 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
3317                    const struct rte_flow_attr *attr,
3318                    const struct rte_flow_item items[],
3319                    const struct rte_flow_action actions[],
3320                    struct rte_flow_error *error)
3321 {
3322         const struct mlx5_flow_driver_ops *fops;
3323         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
3324
3325         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3326         fops = flow_get_drv_ops(type);
3327         return fops->translate(dev, dev_flow, attr, items, actions, error);
3328 }
3329
3330 /**
3331  * Flow driver apply API. This abstracts calling driver specific functions.
3332  * Parent flow (rte_flow) should have driver type (drv_type). It applies
3333  * translated driver flows on to device. flow_drv_translate() must precede.
3334  *
3335  * @param[in] dev
3336  *   Pointer to Ethernet device structure.
3337  * @param[in, out] flow
3338  *   Pointer to flow structure.
3339  * @param[out] error
3340  *   Pointer to error structure.
3341  *
3342  * @return
3343  *   0 on success, a negative errno value otherwise and rte_errno is set.
3344  */
3345 static inline int
3346 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
3347                struct rte_flow_error *error)
3348 {
3349         const struct mlx5_flow_driver_ops *fops;
3350         enum mlx5_flow_drv_type type = flow->drv_type;
3351
3352         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3353         fops = flow_get_drv_ops(type);
3354         return fops->apply(dev, flow, error);
3355 }
3356
3357 /**
3358  * Flow driver destroy API. This abstracts calling driver specific functions.
3359  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
3360  * on device and releases resources of the flow.
3361  *
3362  * @param[in] dev
3363  *   Pointer to Ethernet device.
3364  * @param[in, out] flow
3365  *   Pointer to flow structure.
3366  */
3367 static inline void
3368 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
3369 {
3370         const struct mlx5_flow_driver_ops *fops;
3371         enum mlx5_flow_drv_type type = flow->drv_type;
3372
3373         flow_mreg_split_qrss_release(dev, flow);
3374         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3375         fops = flow_get_drv_ops(type);
3376         fops->destroy(dev, flow);
3377 }
3378
3379 /**
3380  * Flow driver find RSS policy tbl API. This abstracts calling driver
3381  * specific functions. Parent flow (rte_flow) should have driver
3382  * type (drv_type). It will find the RSS policy table that has the rss_desc.
3383  *
3384  * @param[in] dev
3385  *   Pointer to Ethernet device.
3386  * @param[in, out] flow
3387  *   Pointer to flow structure.
3388  * @param[in] policy
3389  *   Pointer to meter policy table.
3390  * @param[in] rss_desc
3391  *   Pointer to rss_desc
3392  */
3393 static struct mlx5_flow_meter_sub_policy *
3394 flow_drv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
3395                 struct rte_flow *flow,
3396                 struct mlx5_flow_meter_policy *policy,
3397                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
3398 {
3399         const struct mlx5_flow_driver_ops *fops;
3400         enum mlx5_flow_drv_type type = flow->drv_type;
3401
3402         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3403         fops = flow_get_drv_ops(type);
3404         return fops->meter_sub_policy_rss_prepare(dev, policy, rss_desc);
3405 }
3406
3407 /**
3408  * Get RSS action from the action list.
3409  *
3410  * @param[in] dev
3411  *   Pointer to Ethernet device.
3412  * @param[in] actions
3413  *   Pointer to the list of actions.
3414  * @param[in] flow
3415  *   Parent flow structure pointer.
3416  *
3417  * @return
3418  *   Pointer to the RSS action if exist, else return NULL.
3419  */
3420 static const struct rte_flow_action_rss*
3421 flow_get_rss_action(struct rte_eth_dev *dev,
3422                     const struct rte_flow_action actions[])
3423 {
3424         struct mlx5_priv *priv = dev->data->dev_private;
3425         const struct rte_flow_action_rss *rss = NULL;
3426
3427         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3428                 switch (actions->type) {
3429                 case RTE_FLOW_ACTION_TYPE_RSS:
3430                         rss = actions->conf;
3431                         break;
3432                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
3433                 {
3434                         const struct rte_flow_action_sample *sample =
3435                                                                 actions->conf;
3436                         const struct rte_flow_action *act = sample->actions;
3437                         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++)
3438                                 if (act->type == RTE_FLOW_ACTION_TYPE_RSS)
3439                                         rss = act->conf;
3440                         break;
3441                 }
3442                 case RTE_FLOW_ACTION_TYPE_METER:
3443                 {
3444                         uint32_t mtr_idx;
3445                         struct mlx5_flow_meter_info *fm;
3446                         struct mlx5_flow_meter_policy *policy;
3447                         const struct rte_flow_action_meter *mtr = actions->conf;
3448
3449                         fm = mlx5_flow_meter_find(priv, mtr->mtr_id, &mtr_idx);
3450                         if (fm) {
3451                                 policy = mlx5_flow_meter_policy_find(dev,
3452                                                 fm->policy_id, NULL);
3453                                 if (policy && policy->is_rss)
3454                                         rss =
3455                                 policy->act_cnt[RTE_COLOR_GREEN].rss->conf;
3456                         }
3457                         break;
3458                 }
3459                 default:
3460                         break;
3461                 }
3462         }
3463         return rss;
3464 }
3465
3466 /**
3467  * Get ASO age action by index.
3468  *
3469  * @param[in] dev
3470  *   Pointer to the Ethernet device structure.
3471  * @param[in] age_idx
3472  *   Index to the ASO age action.
3473  *
3474  * @return
3475  *   The specified ASO age action.
3476  */
3477 struct mlx5_aso_age_action*
3478 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx)
3479 {
3480         uint16_t pool_idx = age_idx & UINT16_MAX;
3481         uint16_t offset = (age_idx >> 16) & UINT16_MAX;
3482         struct mlx5_priv *priv = dev->data->dev_private;
3483         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
3484         struct mlx5_aso_age_pool *pool = mng->pools[pool_idx];
3485
3486         return &pool->actions[offset - 1];
3487 }
3488
3489 /* maps indirect action to translated direct in some actions array */
3490 struct mlx5_translated_action_handle {
3491         struct rte_flow_action_handle *action; /**< Indirect action handle. */
3492         int index; /**< Index in related array of rte_flow_action. */
3493 };
3494
3495 /**
3496  * Translates actions of type RTE_FLOW_ACTION_TYPE_INDIRECT to related
3497  * direct action if translation possible.
3498  * This functionality used to run same execution path for both direct and
3499  * indirect actions on flow create. All necessary preparations for indirect
3500  * action handling should be performed on *handle* actions list returned
3501  * from this call.
3502  *
3503  * @param[in] dev
3504  *   Pointer to Ethernet device.
3505  * @param[in] actions
3506  *   List of actions to translate.
3507  * @param[out] handle
3508  *   List to store translated indirect action object handles.
3509  * @param[in, out] indir_n
3510  *   Size of *handle* array. On return should be updated with number of
3511  *   indirect actions retrieved from the *actions* list.
3512  * @param[out] translated_actions
3513  *   List of actions where all indirect actions were translated to direct
3514  *   if possible. NULL if no translation took place.
3515  * @param[out] error
3516  *   Pointer to the error structure.
3517  *
3518  * @return
3519  *   0 on success, a negative errno value otherwise and rte_errno is set.
3520  */
3521 static int
3522 flow_action_handles_translate(struct rte_eth_dev *dev,
3523                               const struct rte_flow_action actions[],
3524                               struct mlx5_translated_action_handle *handle,
3525                               int *indir_n,
3526                               struct rte_flow_action **translated_actions,
3527                               struct rte_flow_error *error)
3528 {
3529         struct mlx5_priv *priv = dev->data->dev_private;
3530         struct rte_flow_action *translated = NULL;
3531         size_t actions_size;
3532         int n;
3533         int copied_n = 0;
3534         struct mlx5_translated_action_handle *handle_end = NULL;
3535
3536         for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
3537                 if (actions[n].type != RTE_FLOW_ACTION_TYPE_INDIRECT)
3538                         continue;
3539                 if (copied_n == *indir_n) {
3540                         return rte_flow_error_set
3541                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
3542                                  NULL, "too many shared actions");
3543                 }
3544                 rte_memcpy(&handle[copied_n].action, &actions[n].conf,
3545                            sizeof(actions[n].conf));
3546                 handle[copied_n].index = n;
3547                 copied_n++;
3548         }
3549         n++;
3550         *indir_n = copied_n;
3551         if (!copied_n)
3552                 return 0;
3553         actions_size = sizeof(struct rte_flow_action) * n;
3554         translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY);
3555         if (!translated) {
3556                 rte_errno = ENOMEM;
3557                 return -ENOMEM;
3558         }
3559         memcpy(translated, actions, actions_size);
3560         for (handle_end = handle + copied_n; handle < handle_end; handle++) {
3561                 struct mlx5_shared_action_rss *shared_rss;
3562                 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
3563                 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
3564                 uint32_t idx = act_idx &
3565                                ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
3566
3567                 switch (type) {
3568                 case MLX5_INDIRECT_ACTION_TYPE_RSS:
3569                         shared_rss = mlx5_ipool_get
3570                           (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
3571                         translated[handle->index].type =
3572                                 RTE_FLOW_ACTION_TYPE_RSS;
3573                         translated[handle->index].conf =
3574                                 &shared_rss->origin;
3575                         break;
3576                 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
3577                         translated[handle->index].type =
3578                                                 (enum rte_flow_action_type)
3579                                                 MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
3580                         translated[handle->index].conf = (void *)(uintptr_t)idx;
3581                         break;
3582                 case MLX5_INDIRECT_ACTION_TYPE_AGE:
3583                         if (priv->sh->flow_hit_aso_en) {
3584                                 translated[handle->index].type =
3585                                         (enum rte_flow_action_type)
3586                                         MLX5_RTE_FLOW_ACTION_TYPE_AGE;
3587                                 translated[handle->index].conf =
3588                                                          (void *)(uintptr_t)idx;
3589                                 break;
3590                         }
3591                         /* Fall-through */
3592                 case MLX5_INDIRECT_ACTION_TYPE_CT:
3593                         if (priv->sh->ct_aso_en) {
3594                                 translated[handle->index].type =
3595                                         RTE_FLOW_ACTION_TYPE_CONNTRACK;
3596                                 translated[handle->index].conf =
3597                                                          (void *)(uintptr_t)idx;
3598                                 break;
3599                         }
3600                         /* Fall-through */
3601                 default:
3602                         mlx5_free(translated);
3603                         return rte_flow_error_set
3604                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
3605                                  NULL, "invalid indirect action type");
3606                 }
3607         }
3608         *translated_actions = translated;
3609         return 0;
3610 }
3611
3612 /**
3613  * Get Shared RSS action from the action list.
3614  *
3615  * @param[in] dev
3616  *   Pointer to Ethernet device.
3617  * @param[in] shared
3618  *   Pointer to the list of actions.
3619  * @param[in] shared_n
3620  *   Actions list length.
3621  *
3622  * @return
3623  *   The MLX5 RSS action ID if exists, otherwise return 0.
3624  */
3625 static uint32_t
3626 flow_get_shared_rss_action(struct rte_eth_dev *dev,
3627                            struct mlx5_translated_action_handle *handle,
3628                            int shared_n)
3629 {
3630         struct mlx5_translated_action_handle *handle_end;
3631         struct mlx5_priv *priv = dev->data->dev_private;
3632         struct mlx5_shared_action_rss *shared_rss;
3633
3634
3635         for (handle_end = handle + shared_n; handle < handle_end; handle++) {
3636                 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
3637                 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
3638                 uint32_t idx = act_idx &
3639                                ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
3640                 switch (type) {
3641                 case MLX5_INDIRECT_ACTION_TYPE_RSS:
3642                         shared_rss = mlx5_ipool_get
3643                                 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
3644                                                                            idx);
3645                         __atomic_add_fetch(&shared_rss->refcnt, 1,
3646                                            __ATOMIC_RELAXED);
3647                         return idx;
3648                 default:
3649                         break;
3650                 }
3651         }
3652         return 0;
3653 }
3654
3655 static unsigned int
3656 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
3657 {
3658         const struct rte_flow_item *item;
3659         unsigned int has_vlan = 0;
3660
3661         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
3662                 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
3663                         has_vlan = 1;
3664                         break;
3665                 }
3666         }
3667         if (has_vlan)
3668                 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
3669                                        MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
3670         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
3671                                MLX5_EXPANSION_ROOT_OUTER;
3672 }
3673
3674 /**
3675  *  Get layer flags from the prefix flow.
3676  *
3677  *  Some flows may be split to several subflows, the prefix subflow gets the
3678  *  match items and the suffix sub flow gets the actions.
3679  *  Some actions need the user defined match item flags to get the detail for
3680  *  the action.
3681  *  This function helps the suffix flow to get the item layer flags from prefix
3682  *  subflow.
3683  *
3684  * @param[in] dev_flow
3685  *   Pointer the created preifx subflow.
3686  *
3687  * @return
3688  *   The layers get from prefix subflow.
3689  */
3690 static inline uint64_t
3691 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
3692 {
3693         uint64_t layers = 0;
3694
3695         /*
3696          * Layers bits could be localization, but usually the compiler will
3697          * help to do the optimization work for source code.
3698          * If no decap actions, use the layers directly.
3699          */
3700         if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP))
3701                 return dev_flow->handle->layers;
3702         /* Convert L3 layers with decap action. */
3703         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
3704                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3705         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
3706                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3707         /* Convert L4 layers with decap action.  */
3708         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
3709                 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
3710         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
3711                 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
3712         return layers;
3713 }
3714
3715 /**
3716  * Get metadata split action information.
3717  *
3718  * @param[in] actions
3719  *   Pointer to the list of actions.
3720  * @param[out] qrss
3721  *   Pointer to the return pointer.
3722  * @param[out] qrss_type
3723  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
3724  *   if no QUEUE/RSS is found.
3725  * @param[out] encap_idx
3726  *   Pointer to the index of the encap action if exists, otherwise the last
3727  *   action index.
3728  *
3729  * @return
3730  *   Total number of actions.
3731  */
3732 static int
3733 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
3734                                        const struct rte_flow_action **qrss,
3735                                        int *encap_idx)
3736 {
3737         const struct rte_flow_action_raw_encap *raw_encap;
3738         int actions_n = 0;
3739         int raw_decap_idx = -1;
3740
3741         *encap_idx = -1;
3742         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3743                 switch (actions->type) {
3744                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3745                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3746                         *encap_idx = actions_n;
3747                         break;
3748                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3749                         raw_decap_idx = actions_n;
3750                         break;
3751                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3752                         raw_encap = actions->conf;
3753                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3754                                 *encap_idx = raw_decap_idx != -1 ?
3755                                                       raw_decap_idx : actions_n;
3756                         break;
3757                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3758                 case RTE_FLOW_ACTION_TYPE_RSS:
3759                         *qrss = actions;
3760                         break;
3761                 default:
3762                         break;
3763                 }
3764                 actions_n++;
3765         }
3766         if (*encap_idx == -1)
3767                 *encap_idx = actions_n;
3768         /* Count RTE_FLOW_ACTION_TYPE_END. */
3769         return actions_n + 1;
3770 }
3771
3772 /**
3773  * Check if the action will change packet.
3774  *
3775  * @param dev
3776  *   Pointer to Ethernet device.
3777  * @param[in] type
3778  *   action type.
3779  *
3780  * @return
3781  *   true if action will change packet, false otherwise.
3782  */
3783 static bool flow_check_modify_action_type(struct rte_eth_dev *dev,
3784                                           enum rte_flow_action_type type)
3785 {
3786         struct mlx5_priv *priv = dev->data->dev_private;
3787
3788         switch (type) {
3789         case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
3790         case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
3791         case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
3792         case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
3793         case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
3794         case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
3795         case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
3796         case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
3797         case RTE_FLOW_ACTION_TYPE_DEC_TTL:
3798         case RTE_FLOW_ACTION_TYPE_SET_TTL:
3799         case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
3800         case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
3801         case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
3802         case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
3803         case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
3804         case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
3805         case RTE_FLOW_ACTION_TYPE_SET_META:
3806         case RTE_FLOW_ACTION_TYPE_SET_TAG:
3807         case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
3808         case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3809         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3810         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
3811         case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3812         case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
3813         case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3814         case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
3815         case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3816         case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3817         case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
3818                 return true;
3819         case RTE_FLOW_ACTION_TYPE_FLAG:
3820         case RTE_FLOW_ACTION_TYPE_MARK:
3821                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
3822                         return true;
3823                 else
3824                         return false;
3825         default:
3826                 return false;
3827         }
3828 }
3829
3830 /**
3831  * Check meter action from the action list.
3832  *
3833  * @param dev
3834  *   Pointer to Ethernet device.
3835  * @param[in] actions
3836  *   Pointer to the list of actions.
3837  * @param[out] has_mtr
3838  *   Pointer to the meter exist flag.
3839  * @param[out] has_modify
3840  *   Pointer to the flag showing there's packet change action.
3841  * @param[out] meter_id
3842  *   Pointer to the meter id.
3843  *
3844  * @return
3845  *   Total number of actions.
3846  */
3847 static int
3848 flow_check_meter_action(struct rte_eth_dev *dev,
3849                         const struct rte_flow_action actions[],
3850                         bool *has_mtr, bool *has_modify, uint32_t *meter_id)
3851 {
3852         const struct rte_flow_action_meter *mtr = NULL;
3853         int actions_n = 0;
3854
3855         MLX5_ASSERT(has_mtr);
3856         *has_mtr = false;
3857         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3858                 switch (actions->type) {
3859                 case RTE_FLOW_ACTION_TYPE_METER:
3860                         mtr = actions->conf;
3861                         *meter_id = mtr->mtr_id;
3862                         *has_mtr = true;
3863                         break;
3864                 default:
3865                         break;
3866                 }
3867                 if (!*has_mtr)
3868                         *has_modify |= flow_check_modify_action_type(dev,
3869                                                                 actions->type);
3870                 actions_n++;
3871         }
3872         /* Count RTE_FLOW_ACTION_TYPE_END. */
3873         return actions_n + 1;
3874 }
3875
3876 /**
3877  * Check if the flow should be split due to hairpin.
3878  * The reason for the split is that in current HW we can't
3879  * support encap and push-vlan on Rx, so if a flow contains
3880  * these actions we move it to Tx.
3881  *
3882  * @param dev
3883  *   Pointer to Ethernet device.
3884  * @param[in] attr
3885  *   Flow rule attributes.
3886  * @param[in] actions
3887  *   Associated actions (list terminated by the END action).
3888  *
3889  * @return
3890  *   > 0 the number of actions and the flow should be split,
3891  *   0 when no split required.
3892  */
3893 static int
3894 flow_check_hairpin_split(struct rte_eth_dev *dev,
3895                          const struct rte_flow_attr *attr,
3896                          const struct rte_flow_action actions[])
3897 {
3898         int queue_action = 0;
3899         int action_n = 0;
3900         int split = 0;
3901         const struct rte_flow_action_queue *queue;
3902         const struct rte_flow_action_rss *rss;
3903         const struct rte_flow_action_raw_encap *raw_encap;
3904         const struct rte_eth_hairpin_conf *conf;
3905
3906         if (!attr->ingress)
3907                 return 0;
3908         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3909                 switch (actions->type) {
3910                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3911                         queue = actions->conf;
3912                         if (queue == NULL)
3913                                 return 0;
3914                         conf = mlx5_rxq_get_hairpin_conf(dev, queue->index);
3915                         if (conf == NULL || conf->tx_explicit != 0)
3916                                 return 0;
3917                         queue_action = 1;
3918                         action_n++;
3919                         break;
3920                 case RTE_FLOW_ACTION_TYPE_RSS:
3921                         rss = actions->conf;
3922                         if (rss == NULL || rss->queue_num == 0)
3923                                 return 0;
3924                         conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]);
3925                         if (conf == NULL || conf->tx_explicit != 0)
3926                                 return 0;
3927                         queue_action = 1;
3928                         action_n++;
3929                         break;
3930                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3931                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3932                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3933                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3934                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
3935                         split++;
3936                         action_n++;
3937                         break;
3938                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3939                         raw_encap = actions->conf;
3940                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3941                                 split++;
3942                         action_n++;
3943                         break;
3944                 default:
3945                         action_n++;
3946                         break;
3947                 }
3948         }
3949         if (split && queue_action)
3950                 return action_n;
3951         return 0;
3952 }
3953
3954 /* Declare flow create/destroy prototype in advance. */
3955 static uint32_t
3956 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
3957                  const struct rte_flow_attr *attr,
3958                  const struct rte_flow_item items[],
3959                  const struct rte_flow_action actions[],
3960                  bool external, struct rte_flow_error *error);
3961
3962 static void
3963 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
3964                   uint32_t flow_idx);
3965
3966 int
3967 flow_dv_mreg_match_cb(struct mlx5_hlist *list __rte_unused,
3968                       struct mlx5_hlist_entry *entry,
3969                       uint64_t key, void *cb_ctx __rte_unused)
3970 {
3971         struct mlx5_flow_mreg_copy_resource *mcp_res =
3972                 container_of(entry, typeof(*mcp_res), hlist_ent);
3973
3974         return mcp_res->mark_id != key;
3975 }
3976
3977 struct mlx5_hlist_entry *
3978 flow_dv_mreg_create_cb(struct mlx5_hlist *list, uint64_t key,
3979                        void *cb_ctx)
3980 {
3981         struct rte_eth_dev *dev = list->ctx;
3982         struct mlx5_priv *priv = dev->data->dev_private;
3983         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3984         struct mlx5_flow_mreg_copy_resource *mcp_res;
3985         struct rte_flow_error *error = ctx->error;
3986         uint32_t idx = 0;
3987         int ret;
3988         uint32_t mark_id = key;
3989         struct rte_flow_attr attr = {
3990                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
3991                 .ingress = 1,
3992         };
3993         struct mlx5_rte_flow_item_tag tag_spec = {
3994                 .data = mark_id,
3995         };
3996         struct rte_flow_item items[] = {
3997                 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
3998         };
3999         struct rte_flow_action_mark ftag = {
4000                 .id = mark_id,
4001         };
4002         struct mlx5_flow_action_copy_mreg cp_mreg = {
4003                 .dst = REG_B,
4004                 .src = REG_NON,
4005         };
4006         struct rte_flow_action_jump jump = {
4007                 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
4008         };
4009         struct rte_flow_action actions[] = {
4010                 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
4011         };
4012
4013         /* Fill the register fileds in the flow. */
4014         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
4015         if (ret < 0)
4016                 return NULL;
4017         tag_spec.id = ret;
4018         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
4019         if (ret < 0)
4020                 return NULL;
4021         cp_mreg.src = ret;
4022         /* Provide the full width of FLAG specific value. */
4023         if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
4024                 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
4025         /* Build a new flow. */
4026         if (mark_id != MLX5_DEFAULT_COPY_ID) {
4027                 items[0] = (struct rte_flow_item){
4028                         .type = (enum rte_flow_item_type)
4029                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
4030                         .spec = &tag_spec,
4031                 };
4032                 items[1] = (struct rte_flow_item){
4033                         .type = RTE_FLOW_ITEM_TYPE_END,
4034                 };
4035                 actions[0] = (struct rte_flow_action){
4036                         .type = (enum rte_flow_action_type)
4037                                 MLX5_RTE_FLOW_ACTION_TYPE_MARK,
4038                         .conf = &ftag,
4039                 };
4040                 actions[1] = (struct rte_flow_action){
4041                         .type = (enum rte_flow_action_type)
4042                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4043                         .conf = &cp_mreg,
4044                 };
4045                 actions[2] = (struct rte_flow_action){
4046                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4047                         .conf = &jump,
4048                 };
4049                 actions[3] = (struct rte_flow_action){
4050                         .type = RTE_FLOW_ACTION_TYPE_END,
4051                 };
4052         } else {
4053                 /* Default rule, wildcard match. */
4054                 attr.priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR;
4055                 items[0] = (struct rte_flow_item){
4056                         .type = RTE_FLOW_ITEM_TYPE_END,
4057                 };
4058                 actions[0] = (struct rte_flow_action){
4059                         .type = (enum rte_flow_action_type)
4060                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4061                         .conf = &cp_mreg,
4062                 };
4063                 actions[1] = (struct rte_flow_action){
4064                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4065                         .conf = &jump,
4066                 };
4067                 actions[2] = (struct rte_flow_action){
4068                         .type = RTE_FLOW_ACTION_TYPE_END,
4069                 };
4070         }
4071         /* Build a new entry. */
4072         mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
4073         if (!mcp_res) {
4074                 rte_errno = ENOMEM;
4075                 return NULL;
4076         }
4077         mcp_res->idx = idx;
4078         mcp_res->mark_id = mark_id;
4079         /*
4080          * The copy Flows are not included in any list. There
4081          * ones are referenced from other Flows and can not
4082          * be applied, removed, deleted in ardbitrary order
4083          * by list traversing.
4084          */
4085         mcp_res->rix_flow = flow_list_create(dev, NULL, &attr, items,
4086                                          actions, false, error);
4087         if (!mcp_res->rix_flow) {
4088                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx);
4089                 return NULL;
4090         }
4091         return &mcp_res->hlist_ent;
4092 }
4093
4094 /**
4095  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4096  *
4097  * As mark_id is unique, if there's already a registered flow for the mark_id,
4098  * return by increasing the reference counter of the resource. Otherwise, create
4099  * the resource (mcp_res) and flow.
4100  *
4101  * Flow looks like,
4102  *   - If ingress port is ANY and reg_c[1] is mark_id,
4103  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4104  *
4105  * For default flow (zero mark_id), flow is like,
4106  *   - If ingress port is ANY,
4107  *     reg_b := reg_c[0] and jump to RX_ACT_TBL.
4108  *
4109  * @param dev
4110  *   Pointer to Ethernet device.
4111  * @param mark_id
4112  *   ID of MARK action, zero means default flow for META.
4113  * @param[out] error
4114  *   Perform verbose error reporting if not NULL.
4115  *
4116  * @return
4117  *   Associated resource on success, NULL otherwise and rte_errno is set.
4118  */
4119 static struct mlx5_flow_mreg_copy_resource *
4120 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
4121                           struct rte_flow_error *error)
4122 {
4123         struct mlx5_priv *priv = dev->data->dev_private;
4124         struct mlx5_hlist_entry *entry;
4125         struct mlx5_flow_cb_ctx ctx = {
4126                 .dev = dev,
4127                 .error = error,
4128         };
4129
4130         /* Check if already registered. */
4131         MLX5_ASSERT(priv->mreg_cp_tbl);
4132         entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx);
4133         if (!entry)
4134                 return NULL;
4135         return container_of(entry, struct mlx5_flow_mreg_copy_resource,
4136                             hlist_ent);
4137 }
4138
4139 void
4140 flow_dv_mreg_remove_cb(struct mlx5_hlist *list, struct mlx5_hlist_entry *entry)
4141 {
4142         struct mlx5_flow_mreg_copy_resource *mcp_res =
4143                 container_of(entry, typeof(*mcp_res), hlist_ent);
4144         struct rte_eth_dev *dev = list->ctx;
4145         struct mlx5_priv *priv = dev->data->dev_private;
4146
4147         MLX5_ASSERT(mcp_res->rix_flow);
4148         flow_list_destroy(dev, NULL, mcp_res->rix_flow);
4149         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4150 }
4151
4152 /**
4153  * Release flow in RX_CP_TBL.
4154  *
4155  * @param dev
4156  *   Pointer to Ethernet device.
4157  * @flow
4158  *   Parent flow for wich copying is provided.
4159  */
4160 static void
4161 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
4162                           struct rte_flow *flow)
4163 {
4164         struct mlx5_flow_mreg_copy_resource *mcp_res;
4165         struct mlx5_priv *priv = dev->data->dev_private;
4166
4167         if (!flow->rix_mreg_copy)
4168                 return;
4169         mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
4170                                  flow->rix_mreg_copy);
4171         if (!mcp_res || !priv->mreg_cp_tbl)
4172                 return;
4173         MLX5_ASSERT(mcp_res->rix_flow);
4174         mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
4175         flow->rix_mreg_copy = 0;
4176 }
4177
4178 /**
4179  * Remove the default copy action from RX_CP_TBL.
4180  *
4181  * This functions is called in the mlx5_dev_start(). No thread safe
4182  * is guaranteed.
4183  *
4184  * @param dev
4185  *   Pointer to Ethernet device.
4186  */
4187 static void
4188 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
4189 {
4190         struct mlx5_hlist_entry *entry;
4191         struct mlx5_priv *priv = dev->data->dev_private;
4192
4193         /* Check if default flow is registered. */
4194         if (!priv->mreg_cp_tbl)
4195                 return;
4196         entry = mlx5_hlist_lookup(priv->mreg_cp_tbl,
4197                                   MLX5_DEFAULT_COPY_ID, NULL);
4198         if (!entry)
4199                 return;
4200         mlx5_hlist_unregister(priv->mreg_cp_tbl, entry);
4201 }
4202
4203 /**
4204  * Add the default copy action in in RX_CP_TBL.
4205  *
4206  * This functions is called in the mlx5_dev_start(). No thread safe
4207  * is guaranteed.
4208  *
4209  * @param dev
4210  *   Pointer to Ethernet device.
4211  * @param[out] error
4212  *   Perform verbose error reporting if not NULL.
4213  *
4214  * @return
4215  *   0 for success, negative value otherwise and rte_errno is set.
4216  */
4217 static int
4218 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
4219                                   struct rte_flow_error *error)
4220 {
4221         struct mlx5_priv *priv = dev->data->dev_private;
4222         struct mlx5_flow_mreg_copy_resource *mcp_res;
4223
4224         /* Check whether extensive metadata feature is engaged. */
4225         if (!priv->config.dv_flow_en ||
4226             priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4227             !mlx5_flow_ext_mreg_supported(dev) ||
4228             !priv->sh->dv_regc0_mask)
4229                 return 0;
4230         /*
4231          * Add default mreg copy flow may be called multiple time, but
4232          * only be called once in stop. Avoid register it twice.
4233          */
4234         if (mlx5_hlist_lookup(priv->mreg_cp_tbl, MLX5_DEFAULT_COPY_ID, NULL))
4235                 return 0;
4236         mcp_res = flow_mreg_add_copy_action(dev, MLX5_DEFAULT_COPY_ID, error);
4237         if (!mcp_res)
4238                 return -rte_errno;
4239         return 0;
4240 }
4241
4242 /**
4243  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4244  *
4245  * All the flow having Q/RSS action should be split by
4246  * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
4247  * performs the following,
4248  *   - CQE->flow_tag := reg_c[1] (MARK)
4249  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4250  * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
4251  * but there should be a flow per each MARK ID set by MARK action.
4252  *
4253  * For the aforementioned reason, if there's a MARK action in flow's action
4254  * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
4255  * the MARK ID to CQE's flow_tag like,
4256  *   - If reg_c[1] is mark_id,
4257  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4258  *
4259  * For SET_META action which stores value in reg_c[0], as the destination is
4260  * also a flow metadata register (reg_b), adding a default flow is enough. Zero
4261  * MARK ID means the default flow. The default flow looks like,
4262  *   - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4263  *
4264  * @param dev
4265  *   Pointer to Ethernet device.
4266  * @param flow
4267  *   Pointer to flow structure.
4268  * @param[in] actions
4269  *   Pointer to the list of actions.
4270  * @param[out] error
4271  *   Perform verbose error reporting if not NULL.
4272  *
4273  * @return
4274  *   0 on success, negative value otherwise and rte_errno is set.
4275  */
4276 static int
4277 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
4278                             struct rte_flow *flow,
4279                             const struct rte_flow_action *actions,
4280                             struct rte_flow_error *error)
4281 {
4282         struct mlx5_priv *priv = dev->data->dev_private;
4283         struct mlx5_dev_config *config = &priv->config;
4284         struct mlx5_flow_mreg_copy_resource *mcp_res;
4285         const struct rte_flow_action_mark *mark;
4286
4287         /* Check whether extensive metadata feature is engaged. */
4288         if (!config->dv_flow_en ||
4289             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4290             !mlx5_flow_ext_mreg_supported(dev) ||
4291             !priv->sh->dv_regc0_mask)
4292                 return 0;
4293         /* Find MARK action. */
4294         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4295                 switch (actions->type) {
4296                 case RTE_FLOW_ACTION_TYPE_FLAG:
4297                         mcp_res = flow_mreg_add_copy_action
4298                                 (dev, MLX5_FLOW_MARK_DEFAULT, error);
4299                         if (!mcp_res)
4300                                 return -rte_errno;
4301                         flow->rix_mreg_copy = mcp_res->idx;
4302                         return 0;
4303                 case RTE_FLOW_ACTION_TYPE_MARK:
4304                         mark = (const struct rte_flow_action_mark *)
4305                                 actions->conf;
4306                         mcp_res =
4307                                 flow_mreg_add_copy_action(dev, mark->id, error);
4308                         if (!mcp_res)
4309                                 return -rte_errno;
4310                         flow->rix_mreg_copy = mcp_res->idx;
4311                         return 0;
4312                 default:
4313                         break;
4314                 }
4315         }
4316         return 0;
4317 }
4318
4319 #define MLX5_MAX_SPLIT_ACTIONS 24
4320 #define MLX5_MAX_SPLIT_ITEMS 24
4321
4322 /**
4323  * Split the hairpin flow.
4324  * Since HW can't support encap and push-vlan on Rx, we move these
4325  * actions to Tx.
4326  * If the count action is after the encap then we also
4327  * move the count action. in this case the count will also measure
4328  * the outer bytes.
4329  *
4330  * @param dev
4331  *   Pointer to Ethernet device.
4332  * @param[in] actions
4333  *   Associated actions (list terminated by the END action).
4334  * @param[out] actions_rx
4335  *   Rx flow actions.
4336  * @param[out] actions_tx
4337  *   Tx flow actions..
4338  * @param[out] pattern_tx
4339  *   The pattern items for the Tx flow.
4340  * @param[out] flow_id
4341  *   The flow ID connected to this flow.
4342  *
4343  * @return
4344  *   0 on success.
4345  */
4346 static int
4347 flow_hairpin_split(struct rte_eth_dev *dev,
4348                    const struct rte_flow_action actions[],
4349                    struct rte_flow_action actions_rx[],
4350                    struct rte_flow_action actions_tx[],
4351                    struct rte_flow_item pattern_tx[],
4352                    uint32_t flow_id)
4353 {
4354         const struct rte_flow_action_raw_encap *raw_encap;
4355         const struct rte_flow_action_raw_decap *raw_decap;
4356         struct mlx5_rte_flow_action_set_tag *set_tag;
4357         struct rte_flow_action *tag_action;
4358         struct mlx5_rte_flow_item_tag *tag_item;
4359         struct rte_flow_item *item;
4360         char *addr;
4361         int encap = 0;
4362
4363         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4364                 switch (actions->type) {
4365                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4366                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4367                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4368                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4369                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4370                         rte_memcpy(actions_tx, actions,
4371                                sizeof(struct rte_flow_action));
4372                         actions_tx++;
4373                         break;
4374                 case RTE_FLOW_ACTION_TYPE_COUNT:
4375                         if (encap) {
4376                                 rte_memcpy(actions_tx, actions,
4377                                            sizeof(struct rte_flow_action));
4378                                 actions_tx++;
4379                         } else {
4380                                 rte_memcpy(actions_rx, actions,
4381                                            sizeof(struct rte_flow_action));
4382                                 actions_rx++;
4383                         }
4384                         break;
4385                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4386                         raw_encap = actions->conf;
4387                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
4388                                 memcpy(actions_tx, actions,
4389                                        sizeof(struct rte_flow_action));
4390                                 actions_tx++;
4391                                 encap = 1;
4392                         } else {
4393                                 rte_memcpy(actions_rx, actions,
4394                                            sizeof(struct rte_flow_action));
4395                                 actions_rx++;
4396                         }
4397                         break;
4398                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4399                         raw_decap = actions->conf;
4400                         if (raw_decap->size < MLX5_ENCAPSULATION_DECISION_SIZE) {
4401                                 memcpy(actions_tx, actions,
4402                                        sizeof(struct rte_flow_action));
4403                                 actions_tx++;
4404                         } else {
4405                                 rte_memcpy(actions_rx, actions,
4406                                            sizeof(struct rte_flow_action));
4407                                 actions_rx++;
4408                         }
4409                         break;
4410                 default:
4411                         rte_memcpy(actions_rx, actions,
4412                                    sizeof(struct rte_flow_action));
4413                         actions_rx++;
4414                         break;
4415                 }
4416         }
4417         /* Add set meta action and end action for the Rx flow. */
4418         tag_action = actions_rx;
4419         tag_action->type = (enum rte_flow_action_type)
4420                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4421         actions_rx++;
4422         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
4423         actions_rx++;
4424         set_tag = (void *)actions_rx;
4425         *set_tag = (struct mlx5_rte_flow_action_set_tag) {
4426                 .id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL),
4427                 .data = flow_id,
4428         };
4429         MLX5_ASSERT(set_tag->id > REG_NON);
4430         tag_action->conf = set_tag;
4431         /* Create Tx item list. */
4432         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
4433         addr = (void *)&pattern_tx[2];
4434         item = pattern_tx;
4435         item->type = (enum rte_flow_item_type)
4436                      MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4437         tag_item = (void *)addr;
4438         tag_item->data = flow_id;
4439         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
4440         MLX5_ASSERT(set_tag->id > REG_NON);
4441         item->spec = tag_item;
4442         addr += sizeof(struct mlx5_rte_flow_item_tag);
4443         tag_item = (void *)addr;
4444         tag_item->data = UINT32_MAX;
4445         tag_item->id = UINT16_MAX;
4446         item->mask = tag_item;
4447         item->last = NULL;
4448         item++;
4449         item->type = RTE_FLOW_ITEM_TYPE_END;
4450         return 0;
4451 }
4452
4453 /**
4454  * The last stage of splitting chain, just creates the subflow
4455  * without any modification.
4456  *
4457  * @param[in] dev
4458  *   Pointer to Ethernet device.
4459  * @param[in] flow
4460  *   Parent flow structure pointer.
4461  * @param[in, out] sub_flow
4462  *   Pointer to return the created subflow, may be NULL.
4463  * @param[in] attr
4464  *   Flow rule attributes.
4465  * @param[in] items
4466  *   Pattern specification (list terminated by the END pattern item).
4467  * @param[in] actions
4468  *   Associated actions (list terminated by the END action).
4469  * @param[in] flow_split_info
4470  *   Pointer to flow split info structure.
4471  * @param[out] error
4472  *   Perform verbose error reporting if not NULL.
4473  * @return
4474  *   0 on success, negative value otherwise
4475  */
4476 static int
4477 flow_create_split_inner(struct rte_eth_dev *dev,
4478                         struct rte_flow *flow,
4479                         struct mlx5_flow **sub_flow,
4480                         const struct rte_flow_attr *attr,
4481                         const struct rte_flow_item items[],
4482                         const struct rte_flow_action actions[],
4483                         struct mlx5_flow_split_info *flow_split_info,
4484                         struct rte_flow_error *error)
4485 {
4486         struct mlx5_flow *dev_flow;
4487
4488         dev_flow = flow_drv_prepare(dev, flow, attr, items, actions,
4489                                     flow_split_info->flow_idx, error);
4490         if (!dev_flow)
4491                 return -rte_errno;
4492         dev_flow->flow = flow;
4493         dev_flow->external = flow_split_info->external;
4494         dev_flow->skip_scale = flow_split_info->skip_scale;
4495         /* Subflow object was created, we must include one in the list. */
4496         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4497                       dev_flow->handle, next);
4498         /*
4499          * If dev_flow is as one of the suffix flow, some actions in suffix
4500          * flow may need some user defined item layer flags, and pass the
4501          * Metadate rxq mark flag to suffix flow as well.
4502          */
4503         if (flow_split_info->prefix_layers)
4504                 dev_flow->handle->layers = flow_split_info->prefix_layers;
4505         if (flow_split_info->prefix_mark)
4506                 dev_flow->handle->mark = 1;
4507         if (sub_flow)
4508                 *sub_flow = dev_flow;
4509 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
4510         dev_flow->dv.table_id = flow_split_info->table_id;
4511 #endif
4512         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
4513 }
4514
4515 /**
4516  * Get the sub policy of a meter.
4517  *
4518  * @param[in] dev
4519  *   Pointer to Ethernet device.
4520  * @param[in] flow
4521  *   Parent flow structure pointer.
4522  * @param[in] policy_id;
4523  *   Meter Policy id.
4524  * @param[in] attr
4525  *   Flow rule attributes.
4526  * @param[in] items
4527  *   Pattern specification (list terminated by the END pattern item).
4528  * @param[out] error
4529  *   Perform verbose error reporting if not NULL.
4530  *
4531  * @return
4532  *   Pointer to the meter sub policy, NULL otherwise and rte_errno is set.
4533  */
4534 static struct mlx5_flow_meter_sub_policy *
4535 get_meter_sub_policy(struct rte_eth_dev *dev,
4536                      struct rte_flow *flow,
4537                      uint32_t policy_id,
4538                      const struct rte_flow_attr *attr,
4539                      const struct rte_flow_item items[],
4540                      struct rte_flow_error *error)
4541 {
4542         struct mlx5_flow_meter_policy *policy;
4543         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
4544
4545         policy = mlx5_flow_meter_policy_find(dev, policy_id, NULL);
4546         if (!policy) {
4547                 rte_flow_error_set(error, EINVAL,
4548                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4549                                    "Failed to find Meter Policy.");
4550                 goto exit;
4551         }
4552         if (policy->is_rss) {
4553                 struct mlx5_flow_workspace *wks =
4554                                 mlx5_flow_get_thread_workspace();
4555                 struct mlx5_flow_rss_desc rss_desc_v[MLX5_MTR_RTE_COLORS];
4556                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS] = {0};
4557                 uint32_t i;
4558
4559                 MLX5_ASSERT(wks);
4560                 /**
4561                  * This is a tmp dev_flow,
4562                  * no need to register any matcher for it in translate.
4563                  */
4564                 wks->skip_matcher_reg = 1;
4565                 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
4566                         struct mlx5_flow dev_flow = {0};
4567                         struct mlx5_flow_handle dev_handle = { {0} };
4568                         const void *rss_act = policy->act_cnt[i].rss->conf;
4569                         struct rte_flow_action rss_actions[2] = {
4570                                 [0] = {
4571                                         .type = RTE_FLOW_ACTION_TYPE_RSS,
4572                                         .conf = rss_act
4573                                 },
4574                                 [1] = {
4575                                         .type = RTE_FLOW_ACTION_TYPE_END,
4576                                         .conf = NULL
4577                                 }
4578                         };
4579
4580                         dev_flow.handle = &dev_handle;
4581                         dev_flow.ingress = attr->ingress;
4582                         dev_flow.flow = flow;
4583                         dev_flow.external = 0;
4584 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
4585                         dev_flow.dv.transfer = attr->transfer;
4586 #endif
4587                         /* Translate RSS action to get rss hash fields. */
4588                         if (flow_drv_translate(dev, &dev_flow, attr,
4589                                                 items, rss_actions, error))
4590                                 goto exit;
4591                         rss_desc_v[i] = wks->rss_desc;
4592                         rss_desc_v[i].key_len = MLX5_RSS_HASH_KEY_LEN;
4593                         rss_desc_v[i].hash_fields = dev_flow.hash_fields;
4594                         rss_desc_v[i].queue_num = rss_desc_v[i].hash_fields ?
4595                                                   rss_desc_v[i].queue_num : 1;
4596                         rss_desc[i] = &rss_desc_v[i];
4597                 }
4598                 sub_policy = flow_drv_meter_sub_policy_rss_prepare(dev,
4599                                                 flow, policy, rss_desc);
4600         } else {
4601                 enum mlx5_meter_domain mtr_domain =
4602                         attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
4603                                 attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
4604                                         MLX5_MTR_DOMAIN_INGRESS;
4605                 sub_policy = policy->sub_policys[mtr_domain][0];
4606         }
4607         if (!sub_policy) {
4608                 rte_flow_error_set(error, EINVAL,
4609                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4610                         "Failed to get meter sub-policy.");
4611                 goto exit;
4612         }
4613 exit:
4614         return sub_policy;
4615 }
4616
4617 /**
4618  * Split the meter flow.
4619  *
4620  * As meter flow will split to three sub flow, other than meter
4621  * action, the other actions make sense to only meter accepts
4622  * the packet. If it need to be dropped, no other additional
4623  * actions should be take.
4624  *
4625  * One kind of special action which decapsulates the L3 tunnel
4626  * header will be in the prefix sub flow, as not to take the
4627  * L3 tunnel header into account.
4628  *
4629  * @param[in] dev
4630  *   Pointer to Ethernet device.
4631  * @param[in] flow
4632  *   Parent flow structure pointer.
4633  * @param[in] fm
4634  *   Pointer to flow meter structure.
4635  * @param[in] attr
4636  *   Flow rule attributes.
4637  * @param[in] items
4638  *   Pattern specification (list terminated by the END pattern item).
4639  * @param[out] sfx_items
4640  *   Suffix flow match items (list terminated by the END pattern item).
4641  * @param[in] actions
4642  *   Associated actions (list terminated by the END action).
4643  * @param[out] actions_sfx
4644  *   Suffix flow actions.
4645  * @param[out] actions_pre
4646  *   Prefix flow actions.
4647  * @param[out] mtr_flow_id
4648  *   Pointer to meter flow id.
4649  * @param[out] error
4650  *   Perform verbose error reporting if not NULL.
4651  *
4652  * @return
4653  *   0 on success, a negative errno value otherwise and rte_errno is set.
4654  */
4655 static int
4656 flow_meter_split_prep(struct rte_eth_dev *dev,
4657                       struct rte_flow *flow,
4658                       struct mlx5_flow_meter_info *fm,
4659                       const struct rte_flow_attr *attr,
4660                       const struct rte_flow_item items[],
4661                       struct rte_flow_item sfx_items[],
4662                       const struct rte_flow_action actions[],
4663                       struct rte_flow_action actions_sfx[],
4664                       struct rte_flow_action actions_pre[],
4665                       uint32_t *mtr_flow_id,
4666                       struct rte_flow_error *error)
4667 {
4668         struct mlx5_priv *priv = dev->data->dev_private;
4669         struct rte_flow_action *tag_action = NULL;
4670         struct rte_flow_item *tag_item;
4671         struct mlx5_rte_flow_action_set_tag *set_tag;
4672         const struct rte_flow_action_raw_encap *raw_encap;
4673         const struct rte_flow_action_raw_decap *raw_decap;
4674         struct mlx5_rte_flow_item_tag *tag_item_spec;
4675         struct mlx5_rte_flow_item_tag *tag_item_mask;
4676         uint32_t tag_id = 0;
4677         bool copy_vlan = false;
4678         struct rte_flow_action *hw_mtr_action;
4679         struct rte_flow_action *action_pre_head = NULL;
4680         bool mtr_first = priv->sh->meter_aso_en &&
4681                         (attr->egress ||
4682                         (attr->transfer && priv->representor_id != UINT16_MAX));
4683         uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
4684         uint8_t mtr_reg_bits = priv->mtr_reg_share ?
4685                                 MLX5_MTR_IDLE_BITS_IN_COLOR_REG : MLX5_REG_BITS;
4686         uint32_t flow_id = 0;
4687         uint32_t flow_id_reversed = 0;
4688         uint8_t flow_id_bits = 0;
4689         int shift;
4690
4691         /* For ASO meter, meter must be before tag in TX direction. */
4692         if (mtr_first) {
4693                 action_pre_head = actions_pre++;
4694                 /* Leave space for tag action. */
4695                 tag_action = actions_pre++;
4696         }
4697         /* Prepare the actions for prefix and suffix flow. */
4698         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4699                 struct rte_flow_action *action_cur = NULL;
4700
4701                 switch (actions->type) {
4702                 case RTE_FLOW_ACTION_TYPE_METER:
4703                         if (mtr_first) {
4704                                 action_cur = action_pre_head;
4705                         } else {
4706                                 /* Leave space for tag action. */
4707                                 tag_action = actions_pre++;
4708                                 action_cur = actions_pre++;
4709                         }
4710                         break;
4711                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4712                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4713                         action_cur = actions_pre++;
4714                         break;
4715                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4716                         raw_encap = actions->conf;
4717                         if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
4718                                 action_cur = actions_pre++;
4719                         break;
4720                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4721                         raw_decap = actions->conf;
4722                         if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4723                                 action_cur = actions_pre++;
4724                         break;
4725                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4726                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4727                         copy_vlan = true;
4728                         break;
4729                 default:
4730                         break;
4731                 }
4732                 if (!action_cur)
4733                         action_cur = (fm->def_policy) ?
4734                                         actions_sfx++ : actions_pre++;
4735                 memcpy(action_cur, actions, sizeof(struct rte_flow_action));
4736         }
4737         /* Add end action to the actions. */
4738         actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
4739         if (priv->sh->meter_aso_en) {
4740                 /**
4741                  * For ASO meter, need to add an extra jump action explicitly,
4742                  * to jump from meter to policer table.
4743                  */
4744                 struct mlx5_flow_meter_sub_policy *sub_policy;
4745                 struct mlx5_flow_tbl_data_entry *tbl_data;
4746
4747                 if (!fm->def_policy) {
4748                         sub_policy = get_meter_sub_policy(dev, flow,
4749                                                           fm->policy_id, attr,
4750                                                           items, error);
4751                         if (!sub_policy)
4752                                 return -rte_errno;
4753                 } else {
4754                         enum mlx5_meter_domain mtr_domain =
4755                         attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
4756                                 attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
4757                                         MLX5_MTR_DOMAIN_INGRESS;
4758
4759                         sub_policy =
4760                         &priv->sh->mtrmng->def_policy[mtr_domain]->sub_policy;
4761                 }
4762                 tbl_data = container_of(sub_policy->tbl_rsc,
4763                                         struct mlx5_flow_tbl_data_entry, tbl);
4764                 hw_mtr_action = actions_pre++;
4765                 hw_mtr_action->type = (enum rte_flow_action_type)
4766                                       MLX5_RTE_FLOW_ACTION_TYPE_JUMP;
4767                 hw_mtr_action->conf = tbl_data->jump.action;
4768         }
4769         actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
4770         actions_pre++;
4771         if (!tag_action)
4772                 return rte_flow_error_set(error, ENOMEM,
4773                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4774                                         "No tag action space.");
4775         if (!mtr_flow_id) {
4776                 tag_action->type = RTE_FLOW_ACTION_TYPE_VOID;
4777                 goto exit;
4778         }
4779         /* Only default-policy Meter creates mtr flow id. */
4780         if (fm->def_policy) {
4781                 mlx5_ipool_malloc(fm->flow_ipool, &tag_id);
4782                 if (!tag_id)
4783                         return rte_flow_error_set(error, ENOMEM,
4784                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4785                                         "Failed to allocate meter flow id.");
4786                 flow_id = tag_id - 1;
4787                 flow_id_bits = MLX5_REG_BITS - __builtin_clz(flow_id);
4788                 flow_id_bits = flow_id_bits ? flow_id_bits : 1;
4789                 if ((flow_id_bits + priv->sh->mtrmng->max_mtr_bits) >
4790                     mtr_reg_bits) {
4791                         mlx5_ipool_free(fm->flow_ipool, tag_id);
4792                         return rte_flow_error_set(error, EINVAL,
4793                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4794                                         "Meter flow id exceeds max limit.");
4795                 }
4796                 if (flow_id_bits > priv->sh->mtrmng->max_mtr_flow_bits)
4797                         priv->sh->mtrmng->max_mtr_flow_bits = flow_id_bits;
4798         }
4799         /* Prepare the suffix subflow items. */
4800         tag_item = sfx_items++;
4801         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4802                 int item_type = items->type;
4803
4804                 switch (item_type) {
4805                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4806                         memcpy(sfx_items, items, sizeof(*sfx_items));
4807                         sfx_items++;
4808                         break;
4809                 case RTE_FLOW_ITEM_TYPE_VLAN:
4810                         if (copy_vlan) {
4811                                 memcpy(sfx_items, items, sizeof(*sfx_items));
4812                                 /*
4813                                  * Convert to internal match item, it is used
4814                                  * for vlan push and set vid.
4815                                  */
4816                                 sfx_items->type = (enum rte_flow_item_type)
4817                                                   MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
4818                                 sfx_items++;
4819                         }
4820                         break;
4821                 default:
4822                         break;
4823                 }
4824         }
4825         sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
4826         sfx_items++;
4827         /* Build tag actions and items for meter_id/meter flow_id. */
4828         set_tag = (struct mlx5_rte_flow_action_set_tag *)actions_pre;
4829         tag_item_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
4830         tag_item_mask = tag_item_spec + 1;
4831         /* Both flow_id and meter_id share the same register. */
4832         *set_tag = (struct mlx5_rte_flow_action_set_tag) {
4833                 .id = (enum modify_reg)mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
4834                                                             0, error),
4835                 .offset = mtr_id_offset,
4836                 .length = mtr_reg_bits,
4837                 .data = flow->meter,
4838         };
4839         /*
4840          * The color Reg bits used by flow_id are growing from
4841          * msb to lsb, so must do bit reverse for flow_id val in RegC.
4842          */
4843         for (shift = 0; shift < flow_id_bits; shift++)
4844                 flow_id_reversed = (flow_id_reversed << 1) |
4845                                 ((flow_id >> shift) & 0x1);
4846         set_tag->data |=
4847                 flow_id_reversed << (mtr_reg_bits - flow_id_bits);
4848         tag_item_spec->id = set_tag->id;
4849         tag_item_spec->data = set_tag->data << mtr_id_offset;
4850         tag_item_mask->data = UINT32_MAX << mtr_id_offset;
4851         tag_action->type = (enum rte_flow_action_type)
4852                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4853         tag_action->conf = set_tag;
4854         tag_item->type = (enum rte_flow_item_type)
4855                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4856         tag_item->spec = tag_item_spec;
4857         tag_item->last = NULL;
4858         tag_item->mask = tag_item_mask;
4859 exit:
4860         if (mtr_flow_id)
4861                 *mtr_flow_id = tag_id;
4862         return 0;
4863 }
4864
4865 /**
4866  * Split action list having QUEUE/RSS for metadata register copy.
4867  *
4868  * Once Q/RSS action is detected in user's action list, the flow action
4869  * should be split in order to copy metadata registers, which will happen in
4870  * RX_CP_TBL like,
4871  *   - CQE->flow_tag := reg_c[1] (MARK)
4872  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4873  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
4874  * This is because the last action of each flow must be a terminal action
4875  * (QUEUE, RSS or DROP).
4876  *
4877  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
4878  * stored and kept in the mlx5_flow structure per each sub_flow.
4879  *
4880  * The Q/RSS action is replaced with,
4881  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
4882  * And the following JUMP action is added at the end,
4883  *   - JUMP, to RX_CP_TBL.
4884  *
4885  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
4886  * flow_create_split_metadata() routine. The flow will look like,
4887  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
4888  *
4889  * @param dev
4890  *   Pointer to Ethernet device.
4891  * @param[out] split_actions
4892  *   Pointer to store split actions to jump to CP_TBL.
4893  * @param[in] actions
4894  *   Pointer to the list of original flow actions.
4895  * @param[in] qrss
4896  *   Pointer to the Q/RSS action.
4897  * @param[in] actions_n
4898  *   Number of original actions.
4899  * @param[out] error
4900  *   Perform verbose error reporting if not NULL.
4901  *
4902  * @return
4903  *   non-zero unique flow_id on success, otherwise 0 and
4904  *   error/rte_error are set.
4905  */
4906 static uint32_t
4907 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
4908                           struct rte_flow_action *split_actions,
4909                           const struct rte_flow_action *actions,
4910                           const struct rte_flow_action *qrss,
4911                           int actions_n, struct rte_flow_error *error)
4912 {
4913         struct mlx5_priv *priv = dev->data->dev_private;
4914         struct mlx5_rte_flow_action_set_tag *set_tag;
4915         struct rte_flow_action_jump *jump;
4916         const int qrss_idx = qrss - actions;
4917         uint32_t flow_id = 0;
4918         int ret = 0;
4919
4920         /*
4921          * Given actions will be split
4922          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
4923          * - Add jump to mreg CP_TBL.
4924          * As a result, there will be one more action.
4925          */
4926         ++actions_n;
4927         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
4928         set_tag = (void *)(split_actions + actions_n);
4929         /*
4930          * If tag action is not set to void(it means we are not the meter
4931          * suffix flow), add the tag action. Since meter suffix flow already
4932          * has the tag added.
4933          */
4934         if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) {
4935                 /*
4936                  * Allocate the new subflow ID. This one is unique within
4937                  * device and not shared with representors. Otherwise,
4938                  * we would have to resolve multi-thread access synch
4939                  * issue. Each flow on the shared device is appended
4940                  * with source vport identifier, so the resulting
4941                  * flows will be unique in the shared (by master and
4942                  * representors) domain even if they have coinciding
4943                  * IDs.
4944                  */
4945                 mlx5_ipool_malloc(priv->sh->ipool
4946                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id);
4947                 if (!flow_id)
4948                         return rte_flow_error_set(error, ENOMEM,
4949                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4950                                                   NULL, "can't allocate id "
4951                                                   "for split Q/RSS subflow");
4952                 /* Internal SET_TAG action to set flow ID. */
4953                 *set_tag = (struct mlx5_rte_flow_action_set_tag){
4954                         .data = flow_id,
4955                 };
4956                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
4957                 if (ret < 0)
4958                         return ret;
4959                 set_tag->id = ret;
4960                 /* Construct new actions array. */
4961                 /* Replace QUEUE/RSS action. */
4962                 split_actions[qrss_idx] = (struct rte_flow_action){
4963                         .type = (enum rte_flow_action_type)
4964                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
4965                         .conf = set_tag,
4966                 };
4967         }
4968         /* JUMP action to jump to mreg copy table (CP_TBL). */
4969         jump = (void *)(set_tag + 1);
4970         *jump = (struct rte_flow_action_jump){
4971                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
4972         };
4973         split_actions[actions_n - 2] = (struct rte_flow_action){
4974                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
4975                 .conf = jump,
4976         };
4977         split_actions[actions_n - 1] = (struct rte_flow_action){
4978                 .type = RTE_FLOW_ACTION_TYPE_END,
4979         };
4980         return flow_id;
4981 }
4982
4983 /**
4984  * Extend the given action list for Tx metadata copy.
4985  *
4986  * Copy the given action list to the ext_actions and add flow metadata register
4987  * copy action in order to copy reg_a set by WQE to reg_c[0].
4988  *
4989  * @param[out] ext_actions
4990  *   Pointer to the extended action list.
4991  * @param[in] actions
4992  *   Pointer to the list of actions.
4993  * @param[in] actions_n
4994  *   Number of actions in the list.
4995  * @param[out] error
4996  *   Perform verbose error reporting if not NULL.
4997  * @param[in] encap_idx
4998  *   The encap action inndex.
4999  *
5000  * @return
5001  *   0 on success, negative value otherwise
5002  */
5003 static int
5004 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
5005                        struct rte_flow_action *ext_actions,
5006                        const struct rte_flow_action *actions,
5007                        int actions_n, struct rte_flow_error *error,
5008                        int encap_idx)
5009 {
5010         struct mlx5_flow_action_copy_mreg *cp_mreg =
5011                 (struct mlx5_flow_action_copy_mreg *)
5012                         (ext_actions + actions_n + 1);
5013         int ret;
5014
5015         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
5016         if (ret < 0)
5017                 return ret;
5018         cp_mreg->dst = ret;
5019         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
5020         if (ret < 0)
5021                 return ret;
5022         cp_mreg->src = ret;
5023         if (encap_idx != 0)
5024                 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
5025         if (encap_idx == actions_n - 1) {
5026                 ext_actions[actions_n - 1] = (struct rte_flow_action){
5027                         .type = (enum rte_flow_action_type)
5028                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5029                         .conf = cp_mreg,
5030                 };
5031                 ext_actions[actions_n] = (struct rte_flow_action){
5032                         .type = RTE_FLOW_ACTION_TYPE_END,
5033                 };
5034         } else {
5035                 ext_actions[encap_idx] = (struct rte_flow_action){
5036                         .type = (enum rte_flow_action_type)
5037                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5038                         .conf = cp_mreg,
5039                 };
5040                 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
5041                                 sizeof(*ext_actions) * (actions_n - encap_idx));
5042         }
5043         return 0;
5044 }
5045
5046 /**
5047  * Check the match action from the action list.
5048  *
5049  * @param[in] actions
5050  *   Pointer to the list of actions.
5051  * @param[in] attr
5052  *   Flow rule attributes.
5053  * @param[in] action
5054  *   The action to be check if exist.
5055  * @param[out] match_action_pos
5056  *   Pointer to the position of the matched action if exists, otherwise is -1.
5057  * @param[out] qrss_action_pos
5058  *   Pointer to the position of the Queue/RSS action if exists, otherwise is -1.
5059  * @param[out] modify_after_mirror
5060  *   Pointer to the flag of modify action after FDB mirroring.
5061  *
5062  * @return
5063  *   > 0 the total number of actions.
5064  *   0 if not found match action in action list.
5065  */
5066 static int
5067 flow_check_match_action(const struct rte_flow_action actions[],
5068                         const struct rte_flow_attr *attr,
5069                         enum rte_flow_action_type action,
5070                         int *match_action_pos, int *qrss_action_pos,
5071                         int *modify_after_mirror)
5072 {
5073         const struct rte_flow_action_sample *sample;
5074         int actions_n = 0;
5075         uint32_t ratio = 0;
5076         int sub_type = 0;
5077         int flag = 0;
5078         int fdb_mirror = 0;
5079
5080         *match_action_pos = -1;
5081         *qrss_action_pos = -1;
5082         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5083                 if (actions->type == action) {
5084                         flag = 1;
5085                         *match_action_pos = actions_n;
5086                 }
5087                 switch (actions->type) {
5088                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5089                 case RTE_FLOW_ACTION_TYPE_RSS:
5090                         *qrss_action_pos = actions_n;
5091                         break;
5092                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
5093                         sample = actions->conf;
5094                         ratio = sample->ratio;
5095                         sub_type = ((const struct rte_flow_action *)
5096                                         (sample->actions))->type;
5097                         if (ratio == 1 && attr->transfer)
5098                                 fdb_mirror = 1;
5099                         break;
5100                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
5101                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
5102                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
5103                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
5104                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
5105                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
5106                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
5107                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
5108                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
5109                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
5110                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5111                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5112                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5113                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5114                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5115                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5116                 case RTE_FLOW_ACTION_TYPE_FLAG:
5117                 case RTE_FLOW_ACTION_TYPE_MARK:
5118                 case RTE_FLOW_ACTION_TYPE_SET_META:
5119                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
5120                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
5121                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5122                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5123                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
5124                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5125                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5126                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5127                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
5128                         if (fdb_mirror)
5129                                 *modify_after_mirror = 1;
5130                         break;
5131                 default:
5132                         break;
5133                 }
5134                 actions_n++;
5135         }
5136         if (flag && fdb_mirror && !*modify_after_mirror) {
5137                 /* FDB mirroring uses the destination array to implement
5138                  * instead of FLOW_SAMPLER object.
5139                  */
5140                 if (sub_type != RTE_FLOW_ACTION_TYPE_END)
5141                         flag = 0;
5142         }
5143         /* Count RTE_FLOW_ACTION_TYPE_END. */
5144         return flag ? actions_n + 1 : 0;
5145 }
5146
5147 #define SAMPLE_SUFFIX_ITEM 2
5148
5149 /**
5150  * Split the sample flow.
5151  *
5152  * As sample flow will split to two sub flow, sample flow with
5153  * sample action, the other actions will move to new suffix flow.
5154  *
5155  * Also add unique tag id with tag action in the sample flow,
5156  * the same tag id will be as match in the suffix flow.
5157  *
5158  * @param dev
5159  *   Pointer to Ethernet device.
5160  * @param[in] add_tag
5161  *   Add extra tag action flag.
5162  * @param[out] sfx_items
5163  *   Suffix flow match items (list terminated by the END pattern item).
5164  * @param[in] actions
5165  *   Associated actions (list terminated by the END action).
5166  * @param[out] actions_sfx
5167  *   Suffix flow actions.
5168  * @param[out] actions_pre
5169  *   Prefix flow actions.
5170  * @param[in] actions_n
5171  *  The total number of actions.
5172  * @param[in] sample_action_pos
5173  *   The sample action position.
5174  * @param[in] qrss_action_pos
5175  *   The Queue/RSS action position.
5176  * @param[in] jump_table
5177  *   Add extra jump action flag.
5178  * @param[out] error
5179  *   Perform verbose error reporting if not NULL.
5180  *
5181  * @return
5182  *   0 on success, or unique flow_id, a negative errno value
5183  *   otherwise and rte_errno is set.
5184  */
5185 static int
5186 flow_sample_split_prep(struct rte_eth_dev *dev,
5187                        int add_tag,
5188                        struct rte_flow_item sfx_items[],
5189                        const struct rte_flow_action actions[],
5190                        struct rte_flow_action actions_sfx[],
5191                        struct rte_flow_action actions_pre[],
5192                        int actions_n,
5193                        int sample_action_pos,
5194                        int qrss_action_pos,
5195                        int jump_table,
5196                        struct rte_flow_error *error)
5197 {
5198         struct mlx5_priv *priv = dev->data->dev_private;
5199         struct mlx5_rte_flow_action_set_tag *set_tag;
5200         struct mlx5_rte_flow_item_tag *tag_spec;
5201         struct mlx5_rte_flow_item_tag *tag_mask;
5202         struct rte_flow_action_jump *jump_action;
5203         uint32_t tag_id = 0;
5204         int index;
5205         int append_index = 0;
5206         int ret;
5207
5208         if (sample_action_pos < 0)
5209                 return rte_flow_error_set(error, EINVAL,
5210                                           RTE_FLOW_ERROR_TYPE_ACTION,
5211                                           NULL, "invalid position of sample "
5212                                           "action in list");
5213         /* Prepare the actions for prefix and suffix flow. */
5214         if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) {
5215                 index = qrss_action_pos;
5216                 /* Put the preceding the Queue/RSS action into prefix flow. */
5217                 if (index != 0)
5218                         memcpy(actions_pre, actions,
5219                                sizeof(struct rte_flow_action) * index);
5220                 /* Put others preceding the sample action into prefix flow. */
5221                 if (sample_action_pos > index + 1)
5222                         memcpy(actions_pre + index, actions + index + 1,
5223                                sizeof(struct rte_flow_action) *
5224                                (sample_action_pos - index - 1));
5225                 index = sample_action_pos - 1;
5226                 /* Put Queue/RSS action into Suffix flow. */
5227                 memcpy(actions_sfx, actions + qrss_action_pos,
5228                        sizeof(struct rte_flow_action));
5229                 actions_sfx++;
5230         } else {
5231                 index = sample_action_pos;
5232                 if (index != 0)
5233                         memcpy(actions_pre, actions,
5234                                sizeof(struct rte_flow_action) * index);
5235         }
5236         /* For CX5, add an extra tag action for NIC-RX and E-Switch ingress.
5237          * For CX6DX and above, metadata registers Cx preserve their value,
5238          * add an extra tag action for NIC-RX and E-Switch Domain.
5239          */
5240         if (add_tag) {
5241                 /* Prepare the prefix tag action. */
5242                 append_index++;
5243                 set_tag = (void *)(actions_pre + actions_n + append_index);
5244                 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error);
5245                 if (ret < 0)
5246                         return ret;
5247                 mlx5_ipool_malloc(priv->sh->ipool
5248                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id);
5249                 *set_tag = (struct mlx5_rte_flow_action_set_tag) {
5250                         .id = ret,
5251                         .data = tag_id,
5252                 };
5253                 /* Prepare the suffix subflow items. */
5254                 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM);
5255                 tag_spec->data = tag_id;
5256                 tag_spec->id = set_tag->id;
5257                 tag_mask = tag_spec + 1;
5258                 tag_mask->data = UINT32_MAX;
5259                 sfx_items[0] = (struct rte_flow_item){
5260                         .type = (enum rte_flow_item_type)
5261                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5262                         .spec = tag_spec,
5263                         .last = NULL,
5264                         .mask = tag_mask,
5265                 };
5266                 sfx_items[1] = (struct rte_flow_item){
5267                         .type = (enum rte_flow_item_type)
5268                                 RTE_FLOW_ITEM_TYPE_END,
5269                 };
5270                 /* Prepare the tag action in prefix subflow. */
5271                 actions_pre[index++] =
5272                         (struct rte_flow_action){
5273                         .type = (enum rte_flow_action_type)
5274                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5275                         .conf = set_tag,
5276                 };
5277         }
5278         memcpy(actions_pre + index, actions + sample_action_pos,
5279                sizeof(struct rte_flow_action));
5280         index += 1;
5281         /* For the modify action after the sample action in E-Switch mirroring,
5282          * Add the extra jump action in prefix subflow and jump into the next
5283          * table, then do the modify action in the new table.
5284          */
5285         if (jump_table) {
5286                 /* Prepare the prefix jump action. */
5287                 append_index++;
5288                 jump_action = (void *)(actions_pre + actions_n + append_index);
5289                 jump_action->group = jump_table;
5290                 actions_pre[index++] =
5291                         (struct rte_flow_action){
5292                         .type = (enum rte_flow_action_type)
5293                                 RTE_FLOW_ACTION_TYPE_JUMP,
5294                         .conf = jump_action,
5295                 };
5296         }
5297         actions_pre[index] = (struct rte_flow_action){
5298                 .type = (enum rte_flow_action_type)
5299                         RTE_FLOW_ACTION_TYPE_END,
5300         };
5301         /* Put the actions after sample into Suffix flow. */
5302         memcpy(actions_sfx, actions + sample_action_pos + 1,
5303                sizeof(struct rte_flow_action) *
5304                (actions_n - sample_action_pos - 1));
5305         return tag_id;
5306 }
5307
5308 /**
5309  * The splitting for metadata feature.
5310  *
5311  * - Q/RSS action on NIC Rx should be split in order to pass by
5312  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
5313  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
5314  *
5315  * - All the actions on NIC Tx should have a mreg copy action to
5316  *   copy reg_a from WQE to reg_c[0].
5317  *
5318  * @param dev
5319  *   Pointer to Ethernet device.
5320  * @param[in] flow
5321  *   Parent flow structure pointer.
5322  * @param[in] attr
5323  *   Flow rule attributes.
5324  * @param[in] items
5325  *   Pattern specification (list terminated by the END pattern item).
5326  * @param[in] actions
5327  *   Associated actions (list terminated by the END action).
5328  * @param[in] flow_split_info
5329  *   Pointer to flow split info structure.
5330  * @param[out] error
5331  *   Perform verbose error reporting if not NULL.
5332  * @return
5333  *   0 on success, negative value otherwise
5334  */
5335 static int
5336 flow_create_split_metadata(struct rte_eth_dev *dev,
5337                            struct rte_flow *flow,
5338                            const struct rte_flow_attr *attr,
5339                            const struct rte_flow_item items[],
5340                            const struct rte_flow_action actions[],
5341                            struct mlx5_flow_split_info *flow_split_info,
5342                            struct rte_flow_error *error)
5343 {
5344         struct mlx5_priv *priv = dev->data->dev_private;
5345         struct mlx5_dev_config *config = &priv->config;
5346         const struct rte_flow_action *qrss = NULL;
5347         struct rte_flow_action *ext_actions = NULL;
5348         struct mlx5_flow *dev_flow = NULL;
5349         uint32_t qrss_id = 0;
5350         int mtr_sfx = 0;
5351         size_t act_size;
5352         int actions_n;
5353         int encap_idx;
5354         int ret;
5355
5356         /* Check whether extensive metadata feature is engaged. */
5357         if (!config->dv_flow_en ||
5358             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
5359             !mlx5_flow_ext_mreg_supported(dev))
5360                 return flow_create_split_inner(dev, flow, NULL, attr, items,
5361                                                actions, flow_split_info, error);
5362         actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
5363                                                            &encap_idx);
5364         if (qrss) {
5365                 /* Exclude hairpin flows from splitting. */
5366                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
5367                         const struct rte_flow_action_queue *queue;
5368
5369                         queue = qrss->conf;
5370                         if (mlx5_rxq_get_type(dev, queue->index) ==
5371                             MLX5_RXQ_TYPE_HAIRPIN)
5372                                 qrss = NULL;
5373                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
5374                         const struct rte_flow_action_rss *rss;
5375
5376                         rss = qrss->conf;
5377                         if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
5378                             MLX5_RXQ_TYPE_HAIRPIN)
5379                                 qrss = NULL;
5380                 }
5381         }
5382         if (qrss) {
5383                 /* Check if it is in meter suffix table. */
5384                 mtr_sfx = attr->group == (attr->transfer ?
5385                           (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
5386                           MLX5_FLOW_TABLE_LEVEL_METER);
5387                 /*
5388                  * Q/RSS action on NIC Rx should be split in order to pass by
5389                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
5390                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
5391                  */
5392                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5393                            sizeof(struct rte_flow_action_set_tag) +
5394                            sizeof(struct rte_flow_action_jump);
5395                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5396                                           SOCKET_ID_ANY);
5397                 if (!ext_actions)
5398                         return rte_flow_error_set(error, ENOMEM,
5399                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5400                                                   NULL, "no memory to split "
5401                                                   "metadata flow");
5402                 /*
5403                  * If we are the suffix flow of meter, tag already exist.
5404                  * Set the tag action to void.
5405                  */
5406                 if (mtr_sfx)
5407                         ext_actions[qrss - actions].type =
5408                                                 RTE_FLOW_ACTION_TYPE_VOID;
5409                 else
5410                         ext_actions[qrss - actions].type =
5411                                                 (enum rte_flow_action_type)
5412                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5413                 /*
5414                  * Create the new actions list with removed Q/RSS action
5415                  * and appended set tag and jump to register copy table
5416                  * (RX_CP_TBL). We should preallocate unique tag ID here
5417                  * in advance, because it is needed for set tag action.
5418                  */
5419                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
5420                                                     qrss, actions_n, error);
5421                 if (!mtr_sfx && !qrss_id) {
5422                         ret = -rte_errno;
5423                         goto exit;
5424                 }
5425         } else if (attr->egress && !attr->transfer) {
5426                 /*
5427                  * All the actions on NIC Tx should have a metadata register
5428                  * copy action to copy reg_a from WQE to reg_c[meta]
5429                  */
5430                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5431                            sizeof(struct mlx5_flow_action_copy_mreg);
5432                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5433                                           SOCKET_ID_ANY);
5434                 if (!ext_actions)
5435                         return rte_flow_error_set(error, ENOMEM,
5436                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5437                                                   NULL, "no memory to split "
5438                                                   "metadata flow");
5439                 /* Create the action list appended with copy register. */
5440                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
5441                                              actions_n, error, encap_idx);
5442                 if (ret < 0)
5443                         goto exit;
5444         }
5445         /* Add the unmodified original or prefix subflow. */
5446         ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
5447                                       items, ext_actions ? ext_actions :
5448                                       actions, flow_split_info, error);
5449         if (ret < 0)
5450                 goto exit;
5451         MLX5_ASSERT(dev_flow);
5452         if (qrss) {
5453                 const struct rte_flow_attr q_attr = {
5454                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5455                         .ingress = 1,
5456                 };
5457                 /* Internal PMD action to set register. */
5458                 struct mlx5_rte_flow_item_tag q_tag_spec = {
5459                         .data = qrss_id,
5460                         .id = REG_NON,
5461                 };
5462                 struct rte_flow_item q_items[] = {
5463                         {
5464                                 .type = (enum rte_flow_item_type)
5465                                         MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5466                                 .spec = &q_tag_spec,
5467                                 .last = NULL,
5468                                 .mask = NULL,
5469                         },
5470                         {
5471                                 .type = RTE_FLOW_ITEM_TYPE_END,
5472                         },
5473                 };
5474                 struct rte_flow_action q_actions[] = {
5475                         {
5476                                 .type = qrss->type,
5477                                 .conf = qrss->conf,
5478                         },
5479                         {
5480                                 .type = RTE_FLOW_ACTION_TYPE_END,
5481                         },
5482                 };
5483                 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
5484
5485                 /*
5486                  * Configure the tag item only if there is no meter subflow.
5487                  * Since tag is already marked in the meter suffix subflow
5488                  * we can just use the meter suffix items as is.
5489                  */
5490                 if (qrss_id) {
5491                         /* Not meter subflow. */
5492                         MLX5_ASSERT(!mtr_sfx);
5493                         /*
5494                          * Put unique id in prefix flow due to it is destroyed
5495                          * after suffix flow and id will be freed after there
5496                          * is no actual flows with this id and identifier
5497                          * reallocation becomes possible (for example, for
5498                          * other flows in other threads).
5499                          */
5500                         dev_flow->handle->split_flow_id = qrss_id;
5501                         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
5502                                                    error);
5503                         if (ret < 0)
5504                                 goto exit;
5505                         q_tag_spec.id = ret;
5506                 }
5507                 dev_flow = NULL;
5508                 /* Add suffix subflow to execute Q/RSS. */
5509                 flow_split_info->prefix_layers = layers;
5510                 flow_split_info->prefix_mark = 0;
5511                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5512                                               &q_attr, mtr_sfx ? items :
5513                                               q_items, q_actions,
5514                                               flow_split_info, error);
5515                 if (ret < 0)
5516                         goto exit;
5517                 /* qrss ID should be freed if failed. */
5518                 qrss_id = 0;
5519                 MLX5_ASSERT(dev_flow);
5520         }
5521
5522 exit:
5523         /*
5524          * We do not destroy the partially created sub_flows in case of error.
5525          * These ones are included into parent flow list and will be destroyed
5526          * by flow_drv_destroy.
5527          */
5528         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
5529                         qrss_id);
5530         mlx5_free(ext_actions);
5531         return ret;
5532 }
5533
5534 /**
5535  * Create meter internal drop flow with the original pattern.
5536  *
5537  * @param dev
5538  *   Pointer to Ethernet device.
5539  * @param[in] flow
5540  *   Parent flow structure pointer.
5541  * @param[in] attr
5542  *   Flow rule attributes.
5543  * @param[in] items
5544  *   Pattern specification (list terminated by the END pattern item).
5545  * @param[in] flow_split_info
5546  *   Pointer to flow split info structure.
5547  * @param[in] fm
5548  *   Pointer to flow meter structure.
5549  * @param[out] error
5550  *   Perform verbose error reporting if not NULL.
5551  * @return
5552  *   0 on success, negative value otherwise
5553  */
5554 static uint32_t
5555 flow_meter_create_drop_flow_with_org_pattern(struct rte_eth_dev *dev,
5556                         struct rte_flow *flow,
5557                         const struct rte_flow_attr *attr,
5558                         const struct rte_flow_item items[],
5559                         struct mlx5_flow_split_info *flow_split_info,
5560                         struct mlx5_flow_meter_info *fm,
5561                         struct rte_flow_error *error)
5562 {
5563         struct mlx5_flow *dev_flow = NULL;
5564         struct rte_flow_attr drop_attr = *attr;
5565         struct rte_flow_action drop_actions[3];
5566         struct mlx5_flow_split_info drop_split_info = *flow_split_info;
5567
5568         MLX5_ASSERT(fm->drop_cnt);
5569         drop_actions[0].type =
5570                 (enum rte_flow_action_type)MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
5571         drop_actions[0].conf = (void *)(uintptr_t)fm->drop_cnt;
5572         drop_actions[1].type = RTE_FLOW_ACTION_TYPE_DROP;
5573         drop_actions[1].conf = NULL;
5574         drop_actions[2].type = RTE_FLOW_ACTION_TYPE_END;
5575         drop_actions[2].conf = NULL;
5576         drop_split_info.external = false;
5577         drop_split_info.skip_scale |= 1 << MLX5_SCALE_FLOW_GROUP_BIT;
5578         drop_split_info.table_id = MLX5_MTR_TABLE_ID_DROP;
5579         drop_attr.group = MLX5_FLOW_TABLE_LEVEL_METER;
5580         return flow_create_split_inner(dev, flow, &dev_flow,
5581                                 &drop_attr, items, drop_actions,
5582                                 &drop_split_info, error);
5583 }
5584
5585 /**
5586  * The splitting for meter feature.
5587  *
5588  * - The meter flow will be split to two flows as prefix and
5589  *   suffix flow. The packets make sense only it pass the prefix
5590  *   meter action.
5591  *
5592  * - Reg_C_5 is used for the packet to match betweend prefix and
5593  *   suffix flow.
5594  *
5595  * @param dev
5596  *   Pointer to Ethernet device.
5597  * @param[in] flow
5598  *   Parent flow structure pointer.
5599  * @param[in] attr
5600  *   Flow rule attributes.
5601  * @param[in] items
5602  *   Pattern specification (list terminated by the END pattern item).
5603  * @param[in] actions
5604  *   Associated actions (list terminated by the END action).
5605  * @param[in] flow_split_info
5606  *   Pointer to flow split info structure.
5607  * @param[out] error
5608  *   Perform verbose error reporting if not NULL.
5609  * @return
5610  *   0 on success, negative value otherwise
5611  */
5612 static int
5613 flow_create_split_meter(struct rte_eth_dev *dev,
5614                         struct rte_flow *flow,
5615                         const struct rte_flow_attr *attr,
5616                         const struct rte_flow_item items[],
5617                         const struct rte_flow_action actions[],
5618                         struct mlx5_flow_split_info *flow_split_info,
5619                         struct rte_flow_error *error)
5620 {
5621         struct mlx5_priv *priv = dev->data->dev_private;
5622         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
5623         struct rte_flow_action *sfx_actions = NULL;
5624         struct rte_flow_action *pre_actions = NULL;
5625         struct rte_flow_item *sfx_items = NULL;
5626         struct mlx5_flow *dev_flow = NULL;
5627         struct rte_flow_attr sfx_attr = *attr;
5628         struct mlx5_flow_meter_info *fm = NULL;
5629         uint8_t skip_scale_restore;
5630         bool has_mtr = false;
5631         bool has_modify = false;
5632         bool set_mtr_reg = true;
5633         uint32_t meter_id = 0;
5634         uint32_t mtr_idx = 0;
5635         uint32_t mtr_flow_id = 0;
5636         size_t act_size;
5637         size_t item_size;
5638         int actions_n = 0;
5639         int ret = 0;
5640
5641         if (priv->mtr_en)
5642                 actions_n = flow_check_meter_action(dev, actions, &has_mtr,
5643                                                     &has_modify, &meter_id);
5644         if (has_mtr) {
5645                 if (flow->meter) {
5646                         fm = flow_dv_meter_find_by_idx(priv, flow->meter);
5647                         if (!fm)
5648                                 return rte_flow_error_set(error, EINVAL,
5649                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5650                                                 NULL, "Meter not found.");
5651                 } else {
5652                         fm = mlx5_flow_meter_find(priv, meter_id, &mtr_idx);
5653                         if (!fm)
5654                                 return rte_flow_error_set(error, EINVAL,
5655                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5656                                                 NULL, "Meter not found.");
5657                         ret = mlx5_flow_meter_attach(priv, fm,
5658                                                      &sfx_attr, error);
5659                         if (ret)
5660                                 return -rte_errno;
5661                         flow->meter = mtr_idx;
5662                 }
5663                 MLX5_ASSERT(wks);
5664                 wks->fm = fm;
5665                 /*
5666                  * If it isn't default-policy Meter, and
5667                  * 1. There's no action in flow to change
5668                  *    packet (modify/encap/decap etc.), OR
5669                  * 2. No drop count needed for this meter.
5670                  * no need to use regC to save meter id anymore.
5671                  */
5672                 if (!fm->def_policy && (!has_modify || !fm->drop_cnt))
5673                         set_mtr_reg = false;
5674                 /* Prefix actions: meter, decap, encap, tag, jump, end. */
5675                 act_size = sizeof(struct rte_flow_action) * (actions_n + 6) +
5676                            sizeof(struct mlx5_rte_flow_action_set_tag);
5677                 /* Suffix items: tag, vlan, port id, end. */
5678 #define METER_SUFFIX_ITEM 4
5679                 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
5680                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
5681                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size),
5682                                           0, SOCKET_ID_ANY);
5683                 if (!sfx_actions)
5684                         return rte_flow_error_set(error, ENOMEM,
5685                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5686                                                   NULL, "no memory to split "
5687                                                   "meter flow");
5688                 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
5689                              act_size);
5690                 /* There's no suffix flow for meter of non-default policy. */
5691                 if (!fm->def_policy)
5692                         pre_actions = sfx_actions + 1;
5693                 else
5694                         pre_actions = sfx_actions + actions_n;
5695                 ret = flow_meter_split_prep(dev, flow, fm, &sfx_attr,
5696                                             items, sfx_items, actions,
5697                                             sfx_actions, pre_actions,
5698                                             (set_mtr_reg ? &mtr_flow_id : NULL),
5699                                             error);
5700                 if (ret) {
5701                         ret = -rte_errno;
5702                         goto exit;
5703                 }
5704                 /* Add the prefix subflow. */
5705                 flow_split_info->prefix_mark = 0;
5706                 skip_scale_restore = flow_split_info->skip_scale;
5707                 flow_split_info->skip_scale |=
5708                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
5709                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5710                                               attr, items, pre_actions,
5711                                               flow_split_info, error);
5712                 flow_split_info->skip_scale = skip_scale_restore;
5713                 if (ret) {
5714                         if (mtr_flow_id)
5715                                 mlx5_ipool_free(fm->flow_ipool, mtr_flow_id);
5716                         ret = -rte_errno;
5717                         goto exit;
5718                 }
5719                 if (mtr_flow_id) {
5720                         dev_flow->handle->split_flow_id = mtr_flow_id;
5721                         dev_flow->handle->is_meter_flow_id = 1;
5722                 }
5723                 if (!fm->def_policy) {
5724                         if (!set_mtr_reg && fm->drop_cnt)
5725                                 ret =
5726                         flow_meter_create_drop_flow_with_org_pattern(dev, flow,
5727                                                         &sfx_attr, items,
5728                                                         flow_split_info,
5729                                                         fm, error);
5730                         goto exit;
5731                 }
5732                 /* Setting the sfx group atrr. */
5733                 sfx_attr.group = sfx_attr.transfer ?
5734                                 (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
5735                                  MLX5_FLOW_TABLE_LEVEL_METER;
5736                 flow_split_info->prefix_layers =
5737                                 flow_get_prefix_layer_flags(dev_flow);
5738                 flow_split_info->prefix_mark = dev_flow->handle->mark;
5739                 flow_split_info->table_id = MLX5_MTR_TABLE_ID_SUFFIX;
5740         }
5741         /* Add the prefix subflow. */
5742         ret = flow_create_split_metadata(dev, flow,
5743                                          &sfx_attr, sfx_items ?
5744                                          sfx_items : items,
5745                                          sfx_actions ? sfx_actions : actions,
5746                                          flow_split_info, error);
5747 exit:
5748         if (sfx_actions)
5749                 mlx5_free(sfx_actions);
5750         return ret;
5751 }
5752
5753 /**
5754  * The splitting for sample feature.
5755  *
5756  * Once Sample action is detected in the action list, the flow actions should
5757  * be split into prefix sub flow and suffix sub flow.
5758  *
5759  * The original items remain in the prefix sub flow, all actions preceding the
5760  * sample action and the sample action itself will be copied to the prefix
5761  * sub flow, the actions following the sample action will be copied to the
5762  * suffix sub flow, Queue action always be located in the suffix sub flow.
5763  *
5764  * In order to make the packet from prefix sub flow matches with suffix sub
5765  * flow, an extra tag action be added into prefix sub flow, and the suffix sub
5766  * flow uses tag item with the unique flow id.
5767  *
5768  * @param dev
5769  *   Pointer to Ethernet device.
5770  * @param[in] flow
5771  *   Parent flow structure pointer.
5772  * @param[in] attr
5773  *   Flow rule attributes.
5774  * @param[in] items
5775  *   Pattern specification (list terminated by the END pattern item).
5776  * @param[in] actions
5777  *   Associated actions (list terminated by the END action).
5778  * @param[in] flow_split_info
5779  *   Pointer to flow split info structure.
5780  * @param[out] error
5781  *   Perform verbose error reporting if not NULL.
5782  * @return
5783  *   0 on success, negative value otherwise
5784  */
5785 static int
5786 flow_create_split_sample(struct rte_eth_dev *dev,
5787                          struct rte_flow *flow,
5788                          const struct rte_flow_attr *attr,
5789                          const struct rte_flow_item items[],
5790                          const struct rte_flow_action actions[],
5791                          struct mlx5_flow_split_info *flow_split_info,
5792                          struct rte_flow_error *error)
5793 {
5794         struct mlx5_priv *priv = dev->data->dev_private;
5795         struct rte_flow_action *sfx_actions = NULL;
5796         struct rte_flow_action *pre_actions = NULL;
5797         struct rte_flow_item *sfx_items = NULL;
5798         struct mlx5_flow *dev_flow = NULL;
5799         struct rte_flow_attr sfx_attr = *attr;
5800 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5801         struct mlx5_flow_dv_sample_resource *sample_res;
5802         struct mlx5_flow_tbl_data_entry *sfx_tbl_data;
5803         struct mlx5_flow_tbl_resource *sfx_tbl;
5804 #endif
5805         size_t act_size;
5806         size_t item_size;
5807         uint32_t fdb_tx = 0;
5808         int32_t tag_id = 0;
5809         int actions_n = 0;
5810         int sample_action_pos;
5811         int qrss_action_pos;
5812         int add_tag = 0;
5813         int modify_after_mirror = 0;
5814         uint16_t jump_table = 0;
5815         const uint32_t next_ft_step = 1;
5816         int ret = 0;
5817
5818         if (priv->sampler_en)
5819                 actions_n = flow_check_match_action(actions, attr,
5820                                         RTE_FLOW_ACTION_TYPE_SAMPLE,
5821                                         &sample_action_pos, &qrss_action_pos,
5822                                         &modify_after_mirror);
5823         if (actions_n) {
5824                 /* The prefix actions must includes sample, tag, end. */
5825                 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1)
5826                            + sizeof(struct mlx5_rte_flow_action_set_tag);
5827                 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM +
5828                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
5829                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size +
5830                                           item_size), 0, SOCKET_ID_ANY);
5831                 if (!sfx_actions)
5832                         return rte_flow_error_set(error, ENOMEM,
5833                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5834                                                   NULL, "no memory to split "
5835                                                   "sample flow");
5836                 /* The representor_id is -1 for uplink. */
5837                 fdb_tx = (attr->transfer && priv->representor_id != -1);
5838                 /*
5839                  * When reg_c_preserve is set, metadata registers Cx preserve
5840                  * their value even through packet duplication.
5841                  */
5842                 add_tag = (!fdb_tx || priv->config.hca_attr.reg_c_preserve);
5843                 if (add_tag)
5844                         sfx_items = (struct rte_flow_item *)((char *)sfx_actions
5845                                         + act_size);
5846                 if (modify_after_mirror)
5847                         jump_table = attr->group * MLX5_FLOW_TABLE_FACTOR +
5848                                      next_ft_step;
5849                 pre_actions = sfx_actions + actions_n;
5850                 tag_id = flow_sample_split_prep(dev, add_tag, sfx_items,
5851                                                 actions, sfx_actions,
5852                                                 pre_actions, actions_n,
5853                                                 sample_action_pos,
5854                                                 qrss_action_pos, jump_table,
5855                                                 error);
5856                 if (tag_id < 0 || (add_tag && !tag_id)) {
5857                         ret = -rte_errno;
5858                         goto exit;
5859                 }
5860                 if (modify_after_mirror)
5861                         flow_split_info->skip_scale =
5862                                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
5863                 /* Add the prefix subflow. */
5864                 ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
5865                                               items, pre_actions,
5866                                               flow_split_info, error);
5867                 if (ret) {
5868                         ret = -rte_errno;
5869                         goto exit;
5870                 }
5871                 dev_flow->handle->split_flow_id = tag_id;
5872 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5873                 if (!modify_after_mirror) {
5874                         /* Set the sfx group attr. */
5875                         sample_res = (struct mlx5_flow_dv_sample_resource *)
5876                                                 dev_flow->dv.sample_res;
5877                         sfx_tbl = (struct mlx5_flow_tbl_resource *)
5878                                                 sample_res->normal_path_tbl;
5879                         sfx_tbl_data = container_of(sfx_tbl,
5880                                                 struct mlx5_flow_tbl_data_entry,
5881                                                 tbl);
5882                         sfx_attr.group = sfx_attr.transfer ?
5883                         (sfx_tbl_data->level - 1) : sfx_tbl_data->level;
5884                 } else {
5885                         MLX5_ASSERT(attr->transfer);
5886                         sfx_attr.group = jump_table;
5887                 }
5888                 flow_split_info->prefix_layers =
5889                                 flow_get_prefix_layer_flags(dev_flow);
5890                 flow_split_info->prefix_mark = dev_flow->handle->mark;
5891                 /* Suffix group level already be scaled with factor, set
5892                  * MLX5_SCALE_FLOW_GROUP_BIT of skip_scale to 1 to avoid scale
5893                  * again in translation.
5894                  */
5895                 flow_split_info->skip_scale = 1 << MLX5_SCALE_FLOW_GROUP_BIT;
5896 #endif
5897         }
5898         /* Add the suffix subflow. */
5899         ret = flow_create_split_meter(dev, flow, &sfx_attr,
5900                                       sfx_items ? sfx_items : items,
5901                                       sfx_actions ? sfx_actions : actions,
5902                                       flow_split_info, error);
5903 exit:
5904         if (sfx_actions)
5905                 mlx5_free(sfx_actions);
5906         return ret;
5907 }
5908
5909 /**
5910  * Split the flow to subflow set. The splitters might be linked
5911  * in the chain, like this:
5912  * flow_create_split_outer() calls:
5913  *   flow_create_split_meter() calls:
5914  *     flow_create_split_metadata(meter_subflow_0) calls:
5915  *       flow_create_split_inner(metadata_subflow_0)
5916  *       flow_create_split_inner(metadata_subflow_1)
5917  *       flow_create_split_inner(metadata_subflow_2)
5918  *     flow_create_split_metadata(meter_subflow_1) calls:
5919  *       flow_create_split_inner(metadata_subflow_0)
5920  *       flow_create_split_inner(metadata_subflow_1)
5921  *       flow_create_split_inner(metadata_subflow_2)
5922  *
5923  * This provide flexible way to add new levels of flow splitting.
5924  * The all of successfully created subflows are included to the
5925  * parent flow dev_flow list.
5926  *
5927  * @param dev
5928  *   Pointer to Ethernet device.
5929  * @param[in] flow
5930  *   Parent flow structure pointer.
5931  * @param[in] attr
5932  *   Flow rule attributes.
5933  * @param[in] items
5934  *   Pattern specification (list terminated by the END pattern item).
5935  * @param[in] actions
5936  *   Associated actions (list terminated by the END action).
5937  * @param[in] flow_split_info
5938  *   Pointer to flow split info structure.
5939  * @param[out] error
5940  *   Perform verbose error reporting if not NULL.
5941  * @return
5942  *   0 on success, negative value otherwise
5943  */
5944 static int
5945 flow_create_split_outer(struct rte_eth_dev *dev,
5946                         struct rte_flow *flow,
5947                         const struct rte_flow_attr *attr,
5948                         const struct rte_flow_item items[],
5949                         const struct rte_flow_action actions[],
5950                         struct mlx5_flow_split_info *flow_split_info,
5951                         struct rte_flow_error *error)
5952 {
5953         int ret;
5954
5955         ret = flow_create_split_sample(dev, flow, attr, items,
5956                                        actions, flow_split_info, error);
5957         MLX5_ASSERT(ret <= 0);
5958         return ret;
5959 }
5960
5961 static struct mlx5_flow_tunnel *
5962 flow_tunnel_from_rule(struct rte_eth_dev *dev,
5963                       const struct rte_flow_attr *attr,
5964                       const struct rte_flow_item items[],
5965                       const struct rte_flow_action actions[])
5966 {
5967         struct mlx5_flow_tunnel *tunnel;
5968
5969 #pragma GCC diagnostic push
5970 #pragma GCC diagnostic ignored "-Wcast-qual"
5971         if (is_flow_tunnel_match_rule(dev, attr, items, actions))
5972                 tunnel = (struct mlx5_flow_tunnel *)items[0].spec;
5973         else if (is_flow_tunnel_steer_rule(dev, attr, items, actions))
5974                 tunnel = (struct mlx5_flow_tunnel *)actions[0].conf;
5975         else
5976                 tunnel = NULL;
5977 #pragma GCC diagnostic pop
5978
5979         return tunnel;
5980 }
5981
5982 /**
5983  * Adjust flow RSS workspace if needed.
5984  *
5985  * @param wks
5986  *   Pointer to thread flow work space.
5987  * @param rss_desc
5988  *   Pointer to RSS descriptor.
5989  * @param[in] nrssq_num
5990  *   New RSS queue number.
5991  *
5992  * @return
5993  *   0 on success, -1 otherwise and rte_errno is set.
5994  */
5995 static int
5996 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks,
5997                           struct mlx5_flow_rss_desc *rss_desc,
5998                           uint32_t nrssq_num)
5999 {
6000         if (likely(nrssq_num <= wks->rssq_num))
6001                 return 0;
6002         rss_desc->queue = realloc(rss_desc->queue,
6003                           sizeof(*rss_desc->queue) * RTE_ALIGN(nrssq_num, 2));
6004         if (!rss_desc->queue) {
6005                 rte_errno = ENOMEM;
6006                 return -1;
6007         }
6008         wks->rssq_num = RTE_ALIGN(nrssq_num, 2);
6009         return 0;
6010 }
6011
6012 /**
6013  * Create a flow and add it to @p list.
6014  *
6015  * @param dev
6016  *   Pointer to Ethernet device.
6017  * @param list
6018  *   Pointer to a TAILQ flow list. If this parameter NULL,
6019  *   no list insertion occurred, flow is just created,
6020  *   this is caller's responsibility to track the
6021  *   created flow.
6022  * @param[in] attr
6023  *   Flow rule attributes.
6024  * @param[in] items
6025  *   Pattern specification (list terminated by the END pattern item).
6026  * @param[in] actions
6027  *   Associated actions (list terminated by the END action).
6028  * @param[in] external
6029  *   This flow rule is created by request external to PMD.
6030  * @param[out] error
6031  *   Perform verbose error reporting if not NULL.
6032  *
6033  * @return
6034  *   A flow index on success, 0 otherwise and rte_errno is set.
6035  */
6036 static uint32_t
6037 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
6038                  const struct rte_flow_attr *attr,
6039                  const struct rte_flow_item items[],
6040                  const struct rte_flow_action original_actions[],
6041                  bool external, struct rte_flow_error *error)
6042 {
6043         struct mlx5_priv *priv = dev->data->dev_private;
6044         struct rte_flow *flow = NULL;
6045         struct mlx5_flow *dev_flow;
6046         const struct rte_flow_action_rss *rss = NULL;
6047         struct mlx5_translated_action_handle
6048                 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6049         int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6050         union {
6051                 struct mlx5_flow_expand_rss buf;
6052                 uint8_t buffer[2048];
6053         } expand_buffer;
6054         union {
6055                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6056                 uint8_t buffer[2048];
6057         } actions_rx;
6058         union {
6059                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6060                 uint8_t buffer[2048];
6061         } actions_hairpin_tx;
6062         union {
6063                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
6064                 uint8_t buffer[2048];
6065         } items_tx;
6066         struct mlx5_flow_expand_rss *buf = &expand_buffer.buf;
6067         struct mlx5_flow_rss_desc *rss_desc;
6068         const struct rte_flow_action *p_actions_rx;
6069         uint32_t i;
6070         uint32_t idx = 0;
6071         int hairpin_flow;
6072         struct rte_flow_attr attr_tx = { .priority = 0 };
6073         const struct rte_flow_action *actions;
6074         struct rte_flow_action *translated_actions = NULL;
6075         struct mlx5_flow_tunnel *tunnel;
6076         struct tunnel_default_miss_ctx default_miss_ctx = { 0, };
6077         struct mlx5_flow_workspace *wks = mlx5_flow_push_thread_workspace();
6078         struct mlx5_flow_split_info flow_split_info = {
6079                 .external = !!external,
6080                 .skip_scale = 0,
6081                 .flow_idx = 0,
6082                 .prefix_mark = 0,
6083                 .prefix_layers = 0,
6084                 .table_id = 0
6085         };
6086         int ret;
6087
6088         MLX5_ASSERT(wks);
6089         rss_desc = &wks->rss_desc;
6090         ret = flow_action_handles_translate(dev, original_actions,
6091                                             indir_actions,
6092                                             &indir_actions_n,
6093                                             &translated_actions, error);
6094         if (ret < 0) {
6095                 MLX5_ASSERT(translated_actions == NULL);
6096                 return 0;
6097         }
6098         actions = translated_actions ? translated_actions : original_actions;
6099         p_actions_rx = actions;
6100         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6101         ret = flow_drv_validate(dev, attr, items, p_actions_rx,
6102                                 external, hairpin_flow, error);
6103         if (ret < 0)
6104                 goto error_before_hairpin_split;
6105         flow = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], &idx);
6106         if (!flow) {
6107                 rte_errno = ENOMEM;
6108                 goto error_before_hairpin_split;
6109         }
6110         if (hairpin_flow > 0) {
6111                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
6112                         rte_errno = EINVAL;
6113                         goto error_before_hairpin_split;
6114                 }
6115                 flow_hairpin_split(dev, actions, actions_rx.actions,
6116                                    actions_hairpin_tx.actions, items_tx.items,
6117                                    idx);
6118                 p_actions_rx = actions_rx.actions;
6119         }
6120         flow_split_info.flow_idx = idx;
6121         flow->drv_type = flow_get_drv_type(dev, attr);
6122         MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
6123                     flow->drv_type < MLX5_FLOW_TYPE_MAX);
6124         memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue));
6125         /* RSS Action only works on NIC RX domain */
6126         if (attr->ingress && !attr->transfer)
6127                 rss = flow_get_rss_action(dev, p_actions_rx);
6128         if (rss) {
6129                 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num))
6130                         return 0;
6131                 /*
6132                  * The following information is required by
6133                  * mlx5_flow_hashfields_adjust() in advance.
6134                  */
6135                 rss_desc->level = rss->level;
6136                 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
6137                 rss_desc->types = !rss->types ? ETH_RSS_IP : rss->types;
6138         }
6139         flow->dev_handles = 0;
6140         if (rss && rss->types) {
6141                 unsigned int graph_root;
6142
6143                 graph_root = find_graph_root(items, rss->level);
6144                 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
6145                                            items, rss->types,
6146                                            mlx5_support_expansion, graph_root);
6147                 MLX5_ASSERT(ret > 0 &&
6148                        (unsigned int)ret < sizeof(expand_buffer.buffer));
6149         } else {
6150                 buf->entries = 1;
6151                 buf->entry[0].pattern = (void *)(uintptr_t)items;
6152         }
6153         rss_desc->shared_rss = flow_get_shared_rss_action(dev, indir_actions,
6154                                                       indir_actions_n);
6155         for (i = 0; i < buf->entries; ++i) {
6156                 /* Initialize flow split data. */
6157                 flow_split_info.prefix_layers = 0;
6158                 flow_split_info.prefix_mark = 0;
6159                 flow_split_info.skip_scale = 0;
6160                 /*
6161                  * The splitter may create multiple dev_flows,
6162                  * depending on configuration. In the simplest
6163                  * case it just creates unmodified original flow.
6164                  */
6165                 ret = flow_create_split_outer(dev, flow, attr,
6166                                               buf->entry[i].pattern,
6167                                               p_actions_rx, &flow_split_info,
6168                                               error);
6169                 if (ret < 0)
6170                         goto error;
6171                 if (is_flow_tunnel_steer_rule(dev, attr,
6172                                               buf->entry[i].pattern,
6173                                               p_actions_rx)) {
6174                         ret = flow_tunnel_add_default_miss(dev, flow, attr,
6175                                                            p_actions_rx,
6176                                                            idx,
6177                                                            &default_miss_ctx,
6178                                                            error);
6179                         if (ret < 0) {
6180                                 mlx5_free(default_miss_ctx.queue);
6181                                 goto error;
6182                         }
6183                 }
6184         }
6185         /* Create the tx flow. */
6186         if (hairpin_flow) {
6187                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
6188                 attr_tx.ingress = 0;
6189                 attr_tx.egress = 1;
6190                 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
6191                                          actions_hairpin_tx.actions,
6192                                          idx, error);
6193                 if (!dev_flow)
6194                         goto error;
6195                 dev_flow->flow = flow;
6196                 dev_flow->external = 0;
6197                 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
6198                               dev_flow->handle, next);
6199                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
6200                                          items_tx.items,
6201                                          actions_hairpin_tx.actions, error);
6202                 if (ret < 0)
6203                         goto error;
6204         }
6205         /*
6206          * Update the metadata register copy table. If extensive
6207          * metadata feature is enabled and registers are supported
6208          * we might create the extra rte_flow for each unique
6209          * MARK/FLAG action ID.
6210          *
6211          * The table is updated for ingress Flows only, because
6212          * the egress Flows belong to the different device and
6213          * copy table should be updated in peer NIC Rx domain.
6214          */
6215         if (attr->ingress &&
6216             (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
6217                 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
6218                 if (ret)
6219                         goto error;
6220         }
6221         /*
6222          * If the flow is external (from application) OR device is started,
6223          * OR mreg discover, then apply immediately.
6224          */
6225         if (external || dev->data->dev_started ||
6226             (attr->group == MLX5_FLOW_MREG_CP_TABLE_GROUP &&
6227              attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)) {
6228                 ret = flow_drv_apply(dev, flow, error);
6229                 if (ret < 0)
6230                         goto error;
6231         }
6232         if (list) {
6233                 rte_spinlock_lock(&priv->flow_list_lock);
6234                 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list, idx,
6235                              flow, next);
6236                 rte_spinlock_unlock(&priv->flow_list_lock);
6237         }
6238         flow_rxq_flags_set(dev, flow);
6239         rte_free(translated_actions);
6240         tunnel = flow_tunnel_from_rule(dev, attr, items, actions);
6241         if (tunnel) {
6242                 flow->tunnel = 1;
6243                 flow->tunnel_id = tunnel->tunnel_id;
6244                 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED);
6245                 mlx5_free(default_miss_ctx.queue);
6246         }
6247         mlx5_flow_pop_thread_workspace();
6248         return idx;
6249 error:
6250         MLX5_ASSERT(flow);
6251         ret = rte_errno; /* Save rte_errno before cleanup. */
6252         flow_mreg_del_copy_action(dev, flow);
6253         flow_drv_destroy(dev, flow);
6254         if (rss_desc->shared_rss)
6255                 __atomic_sub_fetch(&((struct mlx5_shared_action_rss *)
6256                         mlx5_ipool_get
6257                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
6258                         rss_desc->shared_rss))->refcnt, 1, __ATOMIC_RELAXED);
6259         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], idx);
6260         rte_errno = ret; /* Restore rte_errno. */
6261         ret = rte_errno;
6262         rte_errno = ret;
6263         mlx5_flow_pop_thread_workspace();
6264 error_before_hairpin_split:
6265         rte_free(translated_actions);
6266         return 0;
6267 }
6268
6269 /**
6270  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
6271  * incoming packets to table 1.
6272  *
6273  * Other flow rules, requested for group n, will be created in
6274  * e-switch table n+1.
6275  * Jump action to e-switch group n will be created to group n+1.
6276  *
6277  * Used when working in switchdev mode, to utilise advantages of table 1
6278  * and above.
6279  *
6280  * @param dev
6281  *   Pointer to Ethernet device.
6282  *
6283  * @return
6284  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
6285  */
6286 struct rte_flow *
6287 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
6288 {
6289         const struct rte_flow_attr attr = {
6290                 .group = 0,
6291                 .priority = 0,
6292                 .ingress = 1,
6293                 .egress = 0,
6294                 .transfer = 1,
6295         };
6296         const struct rte_flow_item pattern = {
6297                 .type = RTE_FLOW_ITEM_TYPE_END,
6298         };
6299         struct rte_flow_action_jump jump = {
6300                 .group = 1,
6301         };
6302         const struct rte_flow_action actions[] = {
6303                 {
6304                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
6305                         .conf = &jump,
6306                 },
6307                 {
6308                         .type = RTE_FLOW_ACTION_TYPE_END,
6309                 },
6310         };
6311         struct mlx5_priv *priv = dev->data->dev_private;
6312         struct rte_flow_error error;
6313
6314         return (void *)(uintptr_t)flow_list_create(dev, &priv->ctrl_flows,
6315                                                    &attr, &pattern,
6316                                                    actions, false, &error);
6317 }
6318
6319 /**
6320  * Validate a flow supported by the NIC.
6321  *
6322  * @see rte_flow_validate()
6323  * @see rte_flow_ops
6324  */
6325 int
6326 mlx5_flow_validate(struct rte_eth_dev *dev,
6327                    const struct rte_flow_attr *attr,
6328                    const struct rte_flow_item items[],
6329                    const struct rte_flow_action original_actions[],
6330                    struct rte_flow_error *error)
6331 {
6332         int hairpin_flow;
6333         struct mlx5_translated_action_handle
6334                 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6335         int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6336         const struct rte_flow_action *actions;
6337         struct rte_flow_action *translated_actions = NULL;
6338         int ret = flow_action_handles_translate(dev, original_actions,
6339                                                 indir_actions,
6340                                                 &indir_actions_n,
6341                                                 &translated_actions, error);
6342
6343         if (ret)
6344                 return ret;
6345         actions = translated_actions ? translated_actions : original_actions;
6346         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6347         ret = flow_drv_validate(dev, attr, items, actions,
6348                                 true, hairpin_flow, error);
6349         rte_free(translated_actions);
6350         return ret;
6351 }
6352
6353 /**
6354  * Create a flow.
6355  *
6356  * @see rte_flow_create()
6357  * @see rte_flow_ops
6358  */
6359 struct rte_flow *
6360 mlx5_flow_create(struct rte_eth_dev *dev,
6361                  const struct rte_flow_attr *attr,
6362                  const struct rte_flow_item items[],
6363                  const struct rte_flow_action actions[],
6364                  struct rte_flow_error *error)
6365 {
6366         struct mlx5_priv *priv = dev->data->dev_private;
6367
6368         /*
6369          * If the device is not started yet, it is not allowed to created a
6370          * flow from application. PMD default flows and traffic control flows
6371          * are not affected.
6372          */
6373         if (unlikely(!dev->data->dev_started)) {
6374                 DRV_LOG(DEBUG, "port %u is not started when "
6375                         "inserting a flow", dev->data->port_id);
6376                 rte_flow_error_set(error, ENODEV,
6377                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6378                                    NULL,
6379                                    "port not started");
6380                 return NULL;
6381         }
6382
6383         return (void *)(uintptr_t)flow_list_create(dev, &priv->flows,
6384                                   attr, items, actions, true, error);
6385 }
6386
6387 /**
6388  * Destroy a flow in a list.
6389  *
6390  * @param dev
6391  *   Pointer to Ethernet device.
6392  * @param list
6393  *   Pointer to the Indexed flow list. If this parameter NULL,
6394  *   there is no flow removal from the list. Be noted that as
6395  *   flow is add to the indexed list, memory of the indexed
6396  *   list points to maybe changed as flow destroyed.
6397  * @param[in] flow_idx
6398  *   Index of flow to destroy.
6399  */
6400 static void
6401 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
6402                   uint32_t flow_idx)
6403 {
6404         struct mlx5_priv *priv = dev->data->dev_private;
6405         struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
6406                                                [MLX5_IPOOL_RTE_FLOW], flow_idx);
6407
6408         if (!flow)
6409                 return;
6410         /*
6411          * Update RX queue flags only if port is started, otherwise it is
6412          * already clean.
6413          */
6414         if (dev->data->dev_started)
6415                 flow_rxq_flags_trim(dev, flow);
6416         flow_drv_destroy(dev, flow);
6417         if (list) {
6418                 rte_spinlock_lock(&priv->flow_list_lock);
6419                 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list,
6420                              flow_idx, flow, next);
6421                 rte_spinlock_unlock(&priv->flow_list_lock);
6422         }
6423         if (flow->tunnel) {
6424                 struct mlx5_flow_tunnel *tunnel;
6425
6426                 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id);
6427                 RTE_VERIFY(tunnel);
6428                 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
6429                         mlx5_flow_tunnel_free(dev, tunnel);
6430         }
6431         flow_mreg_del_copy_action(dev, flow);
6432         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], flow_idx);
6433 }
6434
6435 /**
6436  * Destroy all flows.
6437  *
6438  * @param dev
6439  *   Pointer to Ethernet device.
6440  * @param list
6441  *   Pointer to the Indexed flow list.
6442  * @param active
6443  *   If flushing is called avtively.
6444  */
6445 void
6446 mlx5_flow_list_flush(struct rte_eth_dev *dev, uint32_t *list, bool active)
6447 {
6448         uint32_t num_flushed = 0;
6449
6450         while (*list) {
6451                 flow_list_destroy(dev, list, *list);
6452                 num_flushed++;
6453         }
6454         if (active) {
6455                 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
6456                         dev->data->port_id, num_flushed);
6457         }
6458 }
6459
6460 /**
6461  * Stop all default actions for flows.
6462  *
6463  * @param dev
6464  *   Pointer to Ethernet device.
6465  */
6466 void
6467 mlx5_flow_stop_default(struct rte_eth_dev *dev)
6468 {
6469         flow_mreg_del_default_copy_action(dev);
6470         flow_rxq_flags_clear(dev);
6471 }
6472
6473 /**
6474  * Start all default actions for flows.
6475  *
6476  * @param dev
6477  *   Pointer to Ethernet device.
6478  * @return
6479  *   0 on success, a negative errno value otherwise and rte_errno is set.
6480  */
6481 int
6482 mlx5_flow_start_default(struct rte_eth_dev *dev)
6483 {
6484         struct rte_flow_error error;
6485
6486         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
6487         return flow_mreg_add_default_copy_action(dev, &error);
6488 }
6489
6490 /**
6491  * Release key of thread specific flow workspace data.
6492  */
6493 void
6494 flow_release_workspace(void *data)
6495 {
6496         struct mlx5_flow_workspace *wks = data;
6497         struct mlx5_flow_workspace *next;
6498
6499         while (wks) {
6500                 next = wks->next;
6501                 free(wks->rss_desc.queue);
6502                 free(wks);
6503                 wks = next;
6504         }
6505 }
6506
6507 /**
6508  * Get thread specific current flow workspace.
6509  *
6510  * @return pointer to thread specific flow workspace data, NULL on error.
6511  */
6512 struct mlx5_flow_workspace*
6513 mlx5_flow_get_thread_workspace(void)
6514 {
6515         struct mlx5_flow_workspace *data;
6516
6517         data = mlx5_flow_os_get_specific_workspace();
6518         MLX5_ASSERT(data && data->inuse);
6519         if (!data || !data->inuse)
6520                 DRV_LOG(ERR, "flow workspace not initialized.");
6521         return data;
6522 }
6523
6524 /**
6525  * Allocate and init new flow workspace.
6526  *
6527  * @return pointer to flow workspace data, NULL on error.
6528  */
6529 static struct mlx5_flow_workspace*
6530 flow_alloc_thread_workspace(void)
6531 {
6532         struct mlx5_flow_workspace *data = calloc(1, sizeof(*data));
6533
6534         if (!data) {
6535                 DRV_LOG(ERR, "Failed to allocate flow workspace "
6536                         "memory.");
6537                 return NULL;
6538         }
6539         data->rss_desc.queue = calloc(1,
6540                         sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM);
6541         if (!data->rss_desc.queue)
6542                 goto err;
6543         data->rssq_num = MLX5_RSSQ_DEFAULT_NUM;
6544         return data;
6545 err:
6546         if (data->rss_desc.queue)
6547                 free(data->rss_desc.queue);
6548         free(data);
6549         return NULL;
6550 }
6551
6552 /**
6553  * Get new thread specific flow workspace.
6554  *
6555  * If current workspace inuse, create new one and set as current.
6556  *
6557  * @return pointer to thread specific flow workspace data, NULL on error.
6558  */
6559 static struct mlx5_flow_workspace*
6560 mlx5_flow_push_thread_workspace(void)
6561 {
6562         struct mlx5_flow_workspace *curr;
6563         struct mlx5_flow_workspace *data;
6564
6565         curr = mlx5_flow_os_get_specific_workspace();
6566         if (!curr) {
6567                 data = flow_alloc_thread_workspace();
6568                 if (!data)
6569                         return NULL;
6570         } else if (!curr->inuse) {
6571                 data = curr;
6572         } else if (curr->next) {
6573                 data = curr->next;
6574         } else {
6575                 data = flow_alloc_thread_workspace();
6576                 if (!data)
6577                         return NULL;
6578                 curr->next = data;
6579                 data->prev = curr;
6580         }
6581         data->inuse = 1;
6582         data->flow_idx = 0;
6583         /* Set as current workspace */
6584         if (mlx5_flow_os_set_specific_workspace(data))
6585                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6586         return data;
6587 }
6588
6589 /**
6590  * Close current thread specific flow workspace.
6591  *
6592  * If previous workspace available, set it as current.
6593  *
6594  * @return pointer to thread specific flow workspace data, NULL on error.
6595  */
6596 static void
6597 mlx5_flow_pop_thread_workspace(void)
6598 {
6599         struct mlx5_flow_workspace *data = mlx5_flow_get_thread_workspace();
6600
6601         if (!data)
6602                 return;
6603         if (!data->inuse) {
6604                 DRV_LOG(ERR, "Failed to close unused flow workspace.");
6605                 return;
6606         }
6607         data->inuse = 0;
6608         if (!data->prev)
6609                 return;
6610         if (mlx5_flow_os_set_specific_workspace(data->prev))
6611                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6612 }
6613
6614 /**
6615  * Verify the flow list is empty
6616  *
6617  * @param dev
6618  *  Pointer to Ethernet device.
6619  *
6620  * @return the number of flows not released.
6621  */
6622 int
6623 mlx5_flow_verify(struct rte_eth_dev *dev)
6624 {
6625         struct mlx5_priv *priv = dev->data->dev_private;
6626         struct rte_flow *flow;
6627         uint32_t idx;
6628         int ret = 0;
6629
6630         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], priv->flows, idx,
6631                       flow, next) {
6632                 DRV_LOG(DEBUG, "port %u flow %p still referenced",
6633                         dev->data->port_id, (void *)flow);
6634                 ++ret;
6635         }
6636         return ret;
6637 }
6638
6639 /**
6640  * Enable default hairpin egress flow.
6641  *
6642  * @param dev
6643  *   Pointer to Ethernet device.
6644  * @param queue
6645  *   The queue index.
6646  *
6647  * @return
6648  *   0 on success, a negative errno value otherwise and rte_errno is set.
6649  */
6650 int
6651 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
6652                             uint32_t queue)
6653 {
6654         struct mlx5_priv *priv = dev->data->dev_private;
6655         const struct rte_flow_attr attr = {
6656                 .egress = 1,
6657                 .priority = 0,
6658         };
6659         struct mlx5_rte_flow_item_tx_queue queue_spec = {
6660                 .queue = queue,
6661         };
6662         struct mlx5_rte_flow_item_tx_queue queue_mask = {
6663                 .queue = UINT32_MAX,
6664         };
6665         struct rte_flow_item items[] = {
6666                 {
6667                         .type = (enum rte_flow_item_type)
6668                                 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
6669                         .spec = &queue_spec,
6670                         .last = NULL,
6671                         .mask = &queue_mask,
6672                 },
6673                 {
6674                         .type = RTE_FLOW_ITEM_TYPE_END,
6675                 },
6676         };
6677         struct rte_flow_action_jump jump = {
6678                 .group = MLX5_HAIRPIN_TX_TABLE,
6679         };
6680         struct rte_flow_action actions[2];
6681         uint32_t flow_idx;
6682         struct rte_flow_error error;
6683
6684         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
6685         actions[0].conf = &jump;
6686         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
6687         flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6688                                 &attr, items, actions, false, &error);
6689         if (!flow_idx) {
6690                 DRV_LOG(DEBUG,
6691                         "Failed to create ctrl flow: rte_errno(%d),"
6692                         " type(%d), message(%s)",
6693                         rte_errno, error.type,
6694                         error.message ? error.message : " (no stated reason)");
6695                 return -rte_errno;
6696         }
6697         return 0;
6698 }
6699
6700 /**
6701  * Enable a control flow configured from the control plane.
6702  *
6703  * @param dev
6704  *   Pointer to Ethernet device.
6705  * @param eth_spec
6706  *   An Ethernet flow spec to apply.
6707  * @param eth_mask
6708  *   An Ethernet flow mask to apply.
6709  * @param vlan_spec
6710  *   A VLAN flow spec to apply.
6711  * @param vlan_mask
6712  *   A VLAN flow mask to apply.
6713  *
6714  * @return
6715  *   0 on success, a negative errno value otherwise and rte_errno is set.
6716  */
6717 int
6718 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
6719                     struct rte_flow_item_eth *eth_spec,
6720                     struct rte_flow_item_eth *eth_mask,
6721                     struct rte_flow_item_vlan *vlan_spec,
6722                     struct rte_flow_item_vlan *vlan_mask)
6723 {
6724         struct mlx5_priv *priv = dev->data->dev_private;
6725         const struct rte_flow_attr attr = {
6726                 .ingress = 1,
6727                 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
6728         };
6729         struct rte_flow_item items[] = {
6730                 {
6731                         .type = RTE_FLOW_ITEM_TYPE_ETH,
6732                         .spec = eth_spec,
6733                         .last = NULL,
6734                         .mask = eth_mask,
6735                 },
6736                 {
6737                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
6738                                               RTE_FLOW_ITEM_TYPE_END,
6739                         .spec = vlan_spec,
6740                         .last = NULL,
6741                         .mask = vlan_mask,
6742                 },
6743                 {
6744                         .type = RTE_FLOW_ITEM_TYPE_END,
6745                 },
6746         };
6747         uint16_t queue[priv->reta_idx_n];
6748         struct rte_flow_action_rss action_rss = {
6749                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
6750                 .level = 0,
6751                 .types = priv->rss_conf.rss_hf,
6752                 .key_len = priv->rss_conf.rss_key_len,
6753                 .queue_num = priv->reta_idx_n,
6754                 .key = priv->rss_conf.rss_key,
6755                 .queue = queue,
6756         };
6757         struct rte_flow_action actions[] = {
6758                 {
6759                         .type = RTE_FLOW_ACTION_TYPE_RSS,
6760                         .conf = &action_rss,
6761                 },
6762                 {
6763                         .type = RTE_FLOW_ACTION_TYPE_END,
6764                 },
6765         };
6766         uint32_t flow_idx;
6767         struct rte_flow_error error;
6768         unsigned int i;
6769
6770         if (!priv->reta_idx_n || !priv->rxqs_n) {
6771                 return 0;
6772         }
6773         if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
6774                 action_rss.types = 0;
6775         for (i = 0; i != priv->reta_idx_n; ++i)
6776                 queue[i] = (*priv->reta_idx)[i];
6777         flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6778                                 &attr, items, actions, false, &error);
6779         if (!flow_idx)
6780                 return -rte_errno;
6781         return 0;
6782 }
6783
6784 /**
6785  * Enable a flow control configured from the control plane.
6786  *
6787  * @param dev
6788  *   Pointer to Ethernet device.
6789  * @param eth_spec
6790  *   An Ethernet flow spec to apply.
6791  * @param eth_mask
6792  *   An Ethernet flow mask to apply.
6793  *
6794  * @return
6795  *   0 on success, a negative errno value otherwise and rte_errno is set.
6796  */
6797 int
6798 mlx5_ctrl_flow(struct rte_eth_dev *dev,
6799                struct rte_flow_item_eth *eth_spec,
6800                struct rte_flow_item_eth *eth_mask)
6801 {
6802         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
6803 }
6804
6805 /**
6806  * Create default miss flow rule matching lacp traffic
6807  *
6808  * @param dev
6809  *   Pointer to Ethernet device.
6810  * @param eth_spec
6811  *   An Ethernet flow spec to apply.
6812  *
6813  * @return
6814  *   0 on success, a negative errno value otherwise and rte_errno is set.
6815  */
6816 int
6817 mlx5_flow_lacp_miss(struct rte_eth_dev *dev)
6818 {
6819         struct mlx5_priv *priv = dev->data->dev_private;
6820         /*
6821          * The LACP matching is done by only using ether type since using
6822          * a multicast dst mac causes kernel to give low priority to this flow.
6823          */
6824         static const struct rte_flow_item_eth lacp_spec = {
6825                 .type = RTE_BE16(0x8809),
6826         };
6827         static const struct rte_flow_item_eth lacp_mask = {
6828                 .type = 0xffff,
6829         };
6830         const struct rte_flow_attr attr = {
6831                 .ingress = 1,
6832         };
6833         struct rte_flow_item items[] = {
6834                 {
6835                         .type = RTE_FLOW_ITEM_TYPE_ETH,
6836                         .spec = &lacp_spec,
6837                         .mask = &lacp_mask,
6838                 },
6839                 {
6840                         .type = RTE_FLOW_ITEM_TYPE_END,
6841                 },
6842         };
6843         struct rte_flow_action actions[] = {
6844                 {
6845                         .type = (enum rte_flow_action_type)
6846                                 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS,
6847                 },
6848                 {
6849                         .type = RTE_FLOW_ACTION_TYPE_END,
6850                 },
6851         };
6852         struct rte_flow_error error;
6853         uint32_t flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6854                                 &attr, items, actions, false, &error);
6855
6856         if (!flow_idx)
6857                 return -rte_errno;
6858         return 0;
6859 }
6860
6861 /**
6862  * Destroy a flow.
6863  *
6864  * @see rte_flow_destroy()
6865  * @see rte_flow_ops
6866  */
6867 int
6868 mlx5_flow_destroy(struct rte_eth_dev *dev,
6869                   struct rte_flow *flow,
6870                   struct rte_flow_error *error __rte_unused)
6871 {
6872         struct mlx5_priv *priv = dev->data->dev_private;
6873
6874         flow_list_destroy(dev, &priv->flows, (uintptr_t)(void *)flow);
6875         return 0;
6876 }
6877
6878 /**
6879  * Destroy all flows.
6880  *
6881  * @see rte_flow_flush()
6882  * @see rte_flow_ops
6883  */
6884 int
6885 mlx5_flow_flush(struct rte_eth_dev *dev,
6886                 struct rte_flow_error *error __rte_unused)
6887 {
6888         struct mlx5_priv *priv = dev->data->dev_private;
6889
6890         mlx5_flow_list_flush(dev, &priv->flows, false);
6891         return 0;
6892 }
6893
6894 /**
6895  * Isolated mode.
6896  *
6897  * @see rte_flow_isolate()
6898  * @see rte_flow_ops
6899  */
6900 int
6901 mlx5_flow_isolate(struct rte_eth_dev *dev,
6902                   int enable,
6903                   struct rte_flow_error *error)
6904 {
6905         struct mlx5_priv *priv = dev->data->dev_private;
6906
6907         if (dev->data->dev_started) {
6908                 rte_flow_error_set(error, EBUSY,
6909                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6910                                    NULL,
6911                                    "port must be stopped first");
6912                 return -rte_errno;
6913         }
6914         priv->isolated = !!enable;
6915         if (enable)
6916                 dev->dev_ops = &mlx5_dev_ops_isolate;
6917         else
6918                 dev->dev_ops = &mlx5_dev_ops;
6919
6920         dev->rx_descriptor_status = mlx5_rx_descriptor_status;
6921         dev->tx_descriptor_status = mlx5_tx_descriptor_status;
6922
6923         return 0;
6924 }
6925
6926 /**
6927  * Query a flow.
6928  *
6929  * @see rte_flow_query()
6930  * @see rte_flow_ops
6931  */
6932 static int
6933 flow_drv_query(struct rte_eth_dev *dev,
6934                uint32_t flow_idx,
6935                const struct rte_flow_action *actions,
6936                void *data,
6937                struct rte_flow_error *error)
6938 {
6939         struct mlx5_priv *priv = dev->data->dev_private;
6940         const struct mlx5_flow_driver_ops *fops;
6941         struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
6942                                                [MLX5_IPOOL_RTE_FLOW],
6943                                                flow_idx);
6944         enum mlx5_flow_drv_type ftype;
6945
6946         if (!flow) {
6947                 return rte_flow_error_set(error, ENOENT,
6948                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6949                           NULL,
6950                           "invalid flow handle");
6951         }
6952         ftype = flow->drv_type;
6953         MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
6954         fops = flow_get_drv_ops(ftype);
6955
6956         return fops->query(dev, flow, actions, data, error);
6957 }
6958
6959 /**
6960  * Query a flow.
6961  *
6962  * @see rte_flow_query()
6963  * @see rte_flow_ops
6964  */
6965 int
6966 mlx5_flow_query(struct rte_eth_dev *dev,
6967                 struct rte_flow *flow,
6968                 const struct rte_flow_action *actions,
6969                 void *data,
6970                 struct rte_flow_error *error)
6971 {
6972         int ret;
6973
6974         ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data,
6975                              error);
6976         if (ret < 0)
6977                 return ret;
6978         return 0;
6979 }
6980
6981 /**
6982  * Get rte_flow callbacks.
6983  *
6984  * @param dev
6985  *   Pointer to Ethernet device structure.
6986  * @param ops
6987  *   Pointer to operation-specific structure.
6988  *
6989  * @return 0
6990  */
6991 int
6992 mlx5_flow_ops_get(struct rte_eth_dev *dev __rte_unused,
6993                   const struct rte_flow_ops **ops)
6994 {
6995         *ops = &mlx5_flow_ops;
6996         return 0;
6997 }
6998
6999 /**
7000  * Validate meter policy actions.
7001  * Dispatcher for action type specific validation.
7002  *
7003  * @param[in] dev
7004  *   Pointer to the Ethernet device structure.
7005  * @param[in] action
7006  *   The meter policy action object to validate.
7007  * @param[in] attr
7008  *   Attributes of flow to determine steering domain.
7009  * @param[out] is_rss
7010  *   Is RSS or not.
7011  * @param[out] domain_bitmap
7012  *   Domain bitmap.
7013  * @param[out] is_def_policy
7014  *   Is default policy or not.
7015  * @param[out] error
7016  *   Perform verbose error reporting if not NULL. Initialized in case of
7017  *   error only.
7018  *
7019  * @return
7020  *   0 on success, otherwise negative errno value.
7021  */
7022 int
7023 mlx5_flow_validate_mtr_acts(struct rte_eth_dev *dev,
7024                         const struct rte_flow_action *actions[RTE_COLORS],
7025                         struct rte_flow_attr *attr,
7026                         bool *is_rss,
7027                         uint8_t *domain_bitmap,
7028                         bool *is_def_policy,
7029                         struct rte_mtr_error *error)
7030 {
7031         const struct mlx5_flow_driver_ops *fops;
7032
7033         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7034         return fops->validate_mtr_acts(dev, actions, attr,
7035                         is_rss, domain_bitmap, is_def_policy, error);
7036 }
7037
7038 /**
7039  * Destroy the meter table set.
7040  *
7041  * @param[in] dev
7042  *   Pointer to Ethernet device.
7043  * @param[in] mtr_policy
7044  *   Meter policy struct.
7045  */
7046 void
7047 mlx5_flow_destroy_mtr_acts(struct rte_eth_dev *dev,
7048                       struct mlx5_flow_meter_policy *mtr_policy)
7049 {
7050         const struct mlx5_flow_driver_ops *fops;
7051
7052         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7053         fops->destroy_mtr_acts(dev, mtr_policy);
7054 }
7055
7056 /**
7057  * Create policy action, lock free,
7058  * (mutex should be acquired by caller).
7059  * Dispatcher for action type specific call.
7060  *
7061  * @param[in] dev
7062  *   Pointer to the Ethernet device structure.
7063  * @param[in] mtr_policy
7064  *   Meter policy struct.
7065  * @param[in] action
7066  *   Action specification used to create meter actions.
7067  * @param[out] error
7068  *   Perform verbose error reporting if not NULL. Initialized in case of
7069  *   error only.
7070  *
7071  * @return
7072  *   0 on success, otherwise negative errno value.
7073  */
7074 int
7075 mlx5_flow_create_mtr_acts(struct rte_eth_dev *dev,
7076                       struct mlx5_flow_meter_policy *mtr_policy,
7077                       const struct rte_flow_action *actions[RTE_COLORS],
7078                       struct rte_mtr_error *error)
7079 {
7080         const struct mlx5_flow_driver_ops *fops;
7081
7082         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7083         return fops->create_mtr_acts(dev, mtr_policy, actions, error);
7084 }
7085
7086 /**
7087  * Create policy rules, lock free,
7088  * (mutex should be acquired by caller).
7089  * Dispatcher for action type specific call.
7090  *
7091  * @param[in] dev
7092  *   Pointer to the Ethernet device structure.
7093  * @param[in] mtr_policy
7094  *   Meter policy struct.
7095  *
7096  * @return
7097  *   0 on success, -1 otherwise.
7098  */
7099 int
7100 mlx5_flow_create_policy_rules(struct rte_eth_dev *dev,
7101                              struct mlx5_flow_meter_policy *mtr_policy)
7102 {
7103         const struct mlx5_flow_driver_ops *fops;
7104
7105         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7106         return fops->create_policy_rules(dev, mtr_policy);
7107 }
7108
7109 /**
7110  * Destroy policy rules, lock free,
7111  * (mutex should be acquired by caller).
7112  * Dispatcher for action type specific call.
7113  *
7114  * @param[in] dev
7115  *   Pointer to the Ethernet device structure.
7116  * @param[in] mtr_policy
7117  *   Meter policy struct.
7118  */
7119 void
7120 mlx5_flow_destroy_policy_rules(struct rte_eth_dev *dev,
7121                              struct mlx5_flow_meter_policy *mtr_policy)
7122 {
7123         const struct mlx5_flow_driver_ops *fops;
7124
7125         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7126         fops->destroy_policy_rules(dev, mtr_policy);
7127 }
7128
7129 /**
7130  * Destroy the default policy table set.
7131  *
7132  * @param[in] dev
7133  *   Pointer to Ethernet device.
7134  */
7135 void
7136 mlx5_flow_destroy_def_policy(struct rte_eth_dev *dev)
7137 {
7138         const struct mlx5_flow_driver_ops *fops;
7139
7140         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7141         fops->destroy_def_policy(dev);
7142 }
7143
7144 /**
7145  * Destroy the default policy table set.
7146  *
7147  * @param[in] dev
7148  *   Pointer to Ethernet device.
7149  *
7150  * @return
7151  *   0 on success, -1 otherwise.
7152  */
7153 int
7154 mlx5_flow_create_def_policy(struct rte_eth_dev *dev)
7155 {
7156         const struct mlx5_flow_driver_ops *fops;
7157
7158         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7159         return fops->create_def_policy(dev);
7160 }
7161
7162 /**
7163  * Create the needed meter and suffix tables.
7164  *
7165  * @param[in] dev
7166  *   Pointer to Ethernet device.
7167  *
7168  * @return
7169  *   0 on success, -1 otherwise.
7170  */
7171 int
7172 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
7173                         struct mlx5_flow_meter_info *fm,
7174                         uint32_t mtr_idx,
7175                         uint8_t domain_bitmap)
7176 {
7177         const struct mlx5_flow_driver_ops *fops;
7178
7179         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7180         return fops->create_mtr_tbls(dev, fm, mtr_idx, domain_bitmap);
7181 }
7182
7183 /**
7184  * Destroy the meter table set.
7185  *
7186  * @param[in] dev
7187  *   Pointer to Ethernet device.
7188  * @param[in] tbl
7189  *   Pointer to the meter table set.
7190  */
7191 void
7192 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
7193                            struct mlx5_flow_meter_info *fm)
7194 {
7195         const struct mlx5_flow_driver_ops *fops;
7196
7197         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7198         fops->destroy_mtr_tbls(dev, fm);
7199 }
7200
7201 /**
7202  * Destroy the global meter drop table.
7203  *
7204  * @param[in] dev
7205  *   Pointer to Ethernet device.
7206  */
7207 void
7208 mlx5_flow_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
7209 {
7210         const struct mlx5_flow_driver_ops *fops;
7211
7212         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7213         fops->destroy_mtr_drop_tbls(dev);
7214 }
7215
7216 /**
7217  * Allocate the needed aso flow meter id.
7218  *
7219  * @param[in] dev
7220  *   Pointer to Ethernet device.
7221  *
7222  * @return
7223  *   Index to aso flow meter on success, NULL otherwise.
7224  */
7225 uint32_t
7226 mlx5_flow_mtr_alloc(struct rte_eth_dev *dev)
7227 {
7228         const struct mlx5_flow_driver_ops *fops;
7229
7230         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7231         return fops->create_meter(dev);
7232 }
7233
7234 /**
7235  * Free the aso flow meter id.
7236  *
7237  * @param[in] dev
7238  *   Pointer to Ethernet device.
7239  * @param[in] mtr_idx
7240  *  Index to aso flow meter to be free.
7241  *
7242  * @return
7243  *   0 on success.
7244  */
7245 void
7246 mlx5_flow_mtr_free(struct rte_eth_dev *dev, uint32_t mtr_idx)
7247 {
7248         const struct mlx5_flow_driver_ops *fops;
7249
7250         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7251         fops->free_meter(dev, mtr_idx);
7252 }
7253
7254 /**
7255  * Allocate a counter.
7256  *
7257  * @param[in] dev
7258  *   Pointer to Ethernet device structure.
7259  *
7260  * @return
7261  *   Index to allocated counter  on success, 0 otherwise.
7262  */
7263 uint32_t
7264 mlx5_counter_alloc(struct rte_eth_dev *dev)
7265 {
7266         const struct mlx5_flow_driver_ops *fops;
7267         struct rte_flow_attr attr = { .transfer = 0 };
7268
7269         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7270                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7271                 return fops->counter_alloc(dev);
7272         }
7273         DRV_LOG(ERR,
7274                 "port %u counter allocate is not supported.",
7275                  dev->data->port_id);
7276         return 0;
7277 }
7278
7279 /**
7280  * Free a counter.
7281  *
7282  * @param[in] dev
7283  *   Pointer to Ethernet device structure.
7284  * @param[in] cnt
7285  *   Index to counter to be free.
7286  */
7287 void
7288 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
7289 {
7290         const struct mlx5_flow_driver_ops *fops;
7291         struct rte_flow_attr attr = { .transfer = 0 };
7292
7293         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7294                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7295                 fops->counter_free(dev, cnt);
7296                 return;
7297         }
7298         DRV_LOG(ERR,
7299                 "port %u counter free is not supported.",
7300                  dev->data->port_id);
7301 }
7302
7303 /**
7304  * Query counter statistics.
7305  *
7306  * @param[in] dev
7307  *   Pointer to Ethernet device structure.
7308  * @param[in] cnt
7309  *   Index to counter to query.
7310  * @param[in] clear
7311  *   Set to clear counter statistics.
7312  * @param[out] pkts
7313  *   The counter hits packets number to save.
7314  * @param[out] bytes
7315  *   The counter hits bytes number to save.
7316  *
7317  * @return
7318  *   0 on success, a negative errno value otherwise.
7319  */
7320 int
7321 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
7322                    bool clear, uint64_t *pkts, uint64_t *bytes)
7323 {
7324         const struct mlx5_flow_driver_ops *fops;
7325         struct rte_flow_attr attr = { .transfer = 0 };
7326
7327         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7328                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7329                 return fops->counter_query(dev, cnt, clear, pkts, bytes);
7330         }
7331         DRV_LOG(ERR,
7332                 "port %u counter query is not supported.",
7333                  dev->data->port_id);
7334         return -ENOTSUP;
7335 }
7336
7337 /**
7338  * Allocate a new memory for the counter values wrapped by all the needed
7339  * management.
7340  *
7341  * @param[in] sh
7342  *   Pointer to mlx5_dev_ctx_shared object.
7343  *
7344  * @return
7345  *   0 on success, a negative errno value otherwise.
7346  */
7347 static int
7348 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh)
7349 {
7350         struct mlx5_devx_mkey_attr mkey_attr;
7351         struct mlx5_counter_stats_mem_mng *mem_mng;
7352         volatile struct flow_counter_stats *raw_data;
7353         int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES;
7354         int size = (sizeof(struct flow_counter_stats) *
7355                         MLX5_COUNTERS_PER_POOL +
7356                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
7357                         sizeof(struct mlx5_counter_stats_mem_mng);
7358         size_t pgsize = rte_mem_page_size();
7359         uint8_t *mem;
7360         int i;
7361
7362         if (pgsize == (size_t)-1) {
7363                 DRV_LOG(ERR, "Failed to get mem page size");
7364                 rte_errno = ENOMEM;
7365                 return -ENOMEM;
7366         }
7367         mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY);
7368         if (!mem) {
7369                 rte_errno = ENOMEM;
7370                 return -ENOMEM;
7371         }
7372         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
7373         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
7374         mem_mng->umem = mlx5_os_umem_reg(sh->ctx, mem, size,
7375                                                  IBV_ACCESS_LOCAL_WRITE);
7376         if (!mem_mng->umem) {
7377                 rte_errno = errno;
7378                 mlx5_free(mem);
7379                 return -rte_errno;
7380         }
7381         mkey_attr.addr = (uintptr_t)mem;
7382         mkey_attr.size = size;
7383         mkey_attr.umem_id = mlx5_os_get_umem_id(mem_mng->umem);
7384         mkey_attr.pd = sh->pdn;
7385         mkey_attr.log_entity_size = 0;
7386         mkey_attr.pg_access = 0;
7387         mkey_attr.klm_array = NULL;
7388         mkey_attr.klm_num = 0;
7389         mkey_attr.relaxed_ordering_write = sh->cmng.relaxed_ordering_write;
7390         mkey_attr.relaxed_ordering_read = sh->cmng.relaxed_ordering_read;
7391         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
7392         if (!mem_mng->dm) {
7393                 mlx5_os_umem_dereg(mem_mng->umem);
7394                 rte_errno = errno;
7395                 mlx5_free(mem);
7396                 return -rte_errno;
7397         }
7398         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
7399         raw_data = (volatile struct flow_counter_stats *)mem;
7400         for (i = 0; i < raws_n; ++i) {
7401                 mem_mng->raws[i].mem_mng = mem_mng;
7402                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
7403         }
7404         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
7405                 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws,
7406                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i,
7407                                  next);
7408         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
7409         sh->cmng.mem_mng = mem_mng;
7410         return 0;
7411 }
7412
7413 /**
7414  * Set the statistic memory to the new counter pool.
7415  *
7416  * @param[in] sh
7417  *   Pointer to mlx5_dev_ctx_shared object.
7418  * @param[in] pool
7419  *   Pointer to the pool to set the statistic memory.
7420  *
7421  * @return
7422  *   0 on success, a negative errno value otherwise.
7423  */
7424 static int
7425 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh,
7426                                struct mlx5_flow_counter_pool *pool)
7427 {
7428         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7429         /* Resize statistic memory once used out. */
7430         if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) &&
7431             mlx5_flow_create_counter_stat_mem_mng(sh)) {
7432                 DRV_LOG(ERR, "Cannot resize counter stat mem.");
7433                 return -1;
7434         }
7435         rte_spinlock_lock(&pool->sl);
7436         pool->raw = cmng->mem_mng->raws + pool->index %
7437                     MLX5_CNT_CONTAINER_RESIZE;
7438         rte_spinlock_unlock(&pool->sl);
7439         pool->raw_hw = NULL;
7440         return 0;
7441 }
7442
7443 #define MLX5_POOL_QUERY_FREQ_US 1000000
7444
7445 /**
7446  * Set the periodic procedure for triggering asynchronous batch queries for all
7447  * the counter pools.
7448  *
7449  * @param[in] sh
7450  *   Pointer to mlx5_dev_ctx_shared object.
7451  */
7452 void
7453 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh)
7454 {
7455         uint32_t pools_n, us;
7456
7457         pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED);
7458         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
7459         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
7460         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
7461                 sh->cmng.query_thread_on = 0;
7462                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
7463         } else {
7464                 sh->cmng.query_thread_on = 1;
7465         }
7466 }
7467
7468 /**
7469  * The periodic procedure for triggering asynchronous batch queries for all the
7470  * counter pools. This function is probably called by the host thread.
7471  *
7472  * @param[in] arg
7473  *   The parameter for the alarm process.
7474  */
7475 void
7476 mlx5_flow_query_alarm(void *arg)
7477 {
7478         struct mlx5_dev_ctx_shared *sh = arg;
7479         int ret;
7480         uint16_t pool_index = sh->cmng.pool_index;
7481         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7482         struct mlx5_flow_counter_pool *pool;
7483         uint16_t n_valid;
7484
7485         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
7486                 goto set_alarm;
7487         rte_spinlock_lock(&cmng->pool_update_sl);
7488         pool = cmng->pools[pool_index];
7489         n_valid = cmng->n_valid;
7490         rte_spinlock_unlock(&cmng->pool_update_sl);
7491         /* Set the statistic memory to the new created pool. */
7492         if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool)))
7493                 goto set_alarm;
7494         if (pool->raw_hw)
7495                 /* There is a pool query in progress. */
7496                 goto set_alarm;
7497         pool->raw_hw =
7498                 LIST_FIRST(&sh->cmng.free_stat_raws);
7499         if (!pool->raw_hw)
7500                 /* No free counter statistics raw memory. */
7501                 goto set_alarm;
7502         /*
7503          * Identify the counters released between query trigger and query
7504          * handle more efficiently. The counter released in this gap period
7505          * should wait for a new round of query as the new arrived packets
7506          * will not be taken into account.
7507          */
7508         pool->query_gen++;
7509         ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0,
7510                                                MLX5_COUNTERS_PER_POOL,
7511                                                NULL, NULL,
7512                                                pool->raw_hw->mem_mng->dm->id,
7513                                                (void *)(uintptr_t)
7514                                                pool->raw_hw->data,
7515                                                sh->devx_comp,
7516                                                (uint64_t)(uintptr_t)pool);
7517         if (ret) {
7518                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
7519                         " %d", pool->min_dcs->id);
7520                 pool->raw_hw = NULL;
7521                 goto set_alarm;
7522         }
7523         LIST_REMOVE(pool->raw_hw, next);
7524         sh->cmng.pending_queries++;
7525         pool_index++;
7526         if (pool_index >= n_valid)
7527                 pool_index = 0;
7528 set_alarm:
7529         sh->cmng.pool_index = pool_index;
7530         mlx5_set_query_alarm(sh);
7531 }
7532
7533 /**
7534  * Check and callback event for new aged flow in the counter pool
7535  *
7536  * @param[in] sh
7537  *   Pointer to mlx5_dev_ctx_shared object.
7538  * @param[in] pool
7539  *   Pointer to Current counter pool.
7540  */
7541 static void
7542 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh,
7543                    struct mlx5_flow_counter_pool *pool)
7544 {
7545         struct mlx5_priv *priv;
7546         struct mlx5_flow_counter *cnt;
7547         struct mlx5_age_info *age_info;
7548         struct mlx5_age_param *age_param;
7549         struct mlx5_counter_stats_raw *cur = pool->raw_hw;
7550         struct mlx5_counter_stats_raw *prev = pool->raw;
7551         const uint64_t curr_time = MLX5_CURR_TIME_SEC;
7552         const uint32_t time_delta = curr_time - pool->time_of_last_age_check;
7553         uint16_t expected = AGE_CANDIDATE;
7554         uint32_t i;
7555
7556         pool->time_of_last_age_check = curr_time;
7557         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
7558                 cnt = MLX5_POOL_GET_CNT(pool, i);
7559                 age_param = MLX5_CNT_TO_AGE(cnt);
7560                 if (__atomic_load_n(&age_param->state,
7561                                     __ATOMIC_RELAXED) != AGE_CANDIDATE)
7562                         continue;
7563                 if (cur->data[i].hits != prev->data[i].hits) {
7564                         __atomic_store_n(&age_param->sec_since_last_hit, 0,
7565                                          __ATOMIC_RELAXED);
7566                         continue;
7567                 }
7568                 if (__atomic_add_fetch(&age_param->sec_since_last_hit,
7569                                        time_delta,
7570                                        __ATOMIC_RELAXED) <= age_param->timeout)
7571                         continue;
7572                 /**
7573                  * Hold the lock first, or if between the
7574                  * state AGE_TMOUT and tailq operation the
7575                  * release happened, the release procedure
7576                  * may delete a non-existent tailq node.
7577                  */
7578                 priv = rte_eth_devices[age_param->port_id].data->dev_private;
7579                 age_info = GET_PORT_AGE_INFO(priv);
7580                 rte_spinlock_lock(&age_info->aged_sl);
7581                 if (__atomic_compare_exchange_n(&age_param->state, &expected,
7582                                                 AGE_TMOUT, false,
7583                                                 __ATOMIC_RELAXED,
7584                                                 __ATOMIC_RELAXED)) {
7585                         TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next);
7586                         MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW);
7587                 }
7588                 rte_spinlock_unlock(&age_info->aged_sl);
7589         }
7590         mlx5_age_event_prepare(sh);
7591 }
7592
7593 /**
7594  * Handler for the HW respond about ready values from an asynchronous batch
7595  * query. This function is probably called by the host thread.
7596  *
7597  * @param[in] sh
7598  *   The pointer to the shared device context.
7599  * @param[in] async_id
7600  *   The Devx async ID.
7601  * @param[in] status
7602  *   The status of the completion.
7603  */
7604 void
7605 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
7606                                   uint64_t async_id, int status)
7607 {
7608         struct mlx5_flow_counter_pool *pool =
7609                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
7610         struct mlx5_counter_stats_raw *raw_to_free;
7611         uint8_t query_gen = pool->query_gen ^ 1;
7612         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7613         enum mlx5_counter_type cnt_type =
7614                 pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
7615                                 MLX5_COUNTER_TYPE_ORIGIN;
7616
7617         if (unlikely(status)) {
7618                 raw_to_free = pool->raw_hw;
7619         } else {
7620                 raw_to_free = pool->raw;
7621                 if (pool->is_aged)
7622                         mlx5_flow_aging_check(sh, pool);
7623                 rte_spinlock_lock(&pool->sl);
7624                 pool->raw = pool->raw_hw;
7625                 rte_spinlock_unlock(&pool->sl);
7626                 /* Be sure the new raw counters data is updated in memory. */
7627                 rte_io_wmb();
7628                 if (!TAILQ_EMPTY(&pool->counters[query_gen])) {
7629                         rte_spinlock_lock(&cmng->csl[cnt_type]);
7630                         TAILQ_CONCAT(&cmng->counters[cnt_type],
7631                                      &pool->counters[query_gen], next);
7632                         rte_spinlock_unlock(&cmng->csl[cnt_type]);
7633                 }
7634         }
7635         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
7636         pool->raw_hw = NULL;
7637         sh->cmng.pending_queries--;
7638 }
7639
7640 static int
7641 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table,
7642                     const struct flow_grp_info *grp_info,
7643                     struct rte_flow_error *error)
7644 {
7645         if (grp_info->transfer && grp_info->external &&
7646             grp_info->fdb_def_rule) {
7647                 if (group == UINT32_MAX)
7648                         return rte_flow_error_set
7649                                                 (error, EINVAL,
7650                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
7651                                                  NULL,
7652                                                  "group index not supported");
7653                 *table = group + 1;
7654         } else {
7655                 *table = group;
7656         }
7657         DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table);
7658         return 0;
7659 }
7660
7661 /**
7662  * Translate the rte_flow group index to HW table value.
7663  *
7664  * If tunnel offload is disabled, all group ids converted to flow table
7665  * id using the standard method.
7666  * If tunnel offload is enabled, group id can be converted using the
7667  * standard or tunnel conversion method. Group conversion method
7668  * selection depends on flags in `grp_info` parameter:
7669  * - Internal (grp_info.external == 0) groups conversion uses the
7670  *   standard method.
7671  * - Group ids in JUMP action converted with the tunnel conversion.
7672  * - Group id in rule attribute conversion depends on a rule type and
7673  *   group id value:
7674  *   ** non zero group attributes converted with the tunnel method
7675  *   ** zero group attribute in non-tunnel rule is converted using the
7676  *      standard method - there's only one root table
7677  *   ** zero group attribute in steer tunnel rule is converted with the
7678  *      standard method - single root table
7679  *   ** zero group attribute in match tunnel rule is a special OvS
7680  *      case: that value is used for portability reasons. That group
7681  *      id is converted with the tunnel conversion method.
7682  *
7683  * @param[in] dev
7684  *   Port device
7685  * @param[in] tunnel
7686  *   PMD tunnel offload object
7687  * @param[in] group
7688  *   rte_flow group index value.
7689  * @param[out] table
7690  *   HW table value.
7691  * @param[in] grp_info
7692  *   flags used for conversion
7693  * @param[out] error
7694  *   Pointer to error structure.
7695  *
7696  * @return
7697  *   0 on success, a negative errno value otherwise and rte_errno is set.
7698  */
7699 int
7700 mlx5_flow_group_to_table(struct rte_eth_dev *dev,
7701                          const struct mlx5_flow_tunnel *tunnel,
7702                          uint32_t group, uint32_t *table,
7703                          const struct flow_grp_info *grp_info,
7704                          struct rte_flow_error *error)
7705 {
7706         int ret;
7707         bool standard_translation;
7708
7709         if (!grp_info->skip_scale && grp_info->external &&
7710             group < MLX5_MAX_TABLES_EXTERNAL)
7711                 group *= MLX5_FLOW_TABLE_FACTOR;
7712         if (is_tunnel_offload_active(dev)) {
7713                 standard_translation = !grp_info->external ||
7714                                         grp_info->std_tbl_fix;
7715         } else {
7716                 standard_translation = true;
7717         }
7718         DRV_LOG(DEBUG,
7719                 "port %u group=%u transfer=%d external=%d fdb_def_rule=%d translate=%s",
7720                 dev->data->port_id, group, grp_info->transfer,
7721                 grp_info->external, grp_info->fdb_def_rule,
7722                 standard_translation ? "STANDARD" : "TUNNEL");
7723         if (standard_translation)
7724                 ret = flow_group_to_table(dev->data->port_id, group, table,
7725                                           grp_info, error);
7726         else
7727                 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group,
7728                                                       table, error);
7729
7730         return ret;
7731 }
7732
7733 /**
7734  * Discover availability of metadata reg_c's.
7735  *
7736  * Iteratively use test flows to check availability.
7737  *
7738  * @param[in] dev
7739  *   Pointer to the Ethernet device structure.
7740  *
7741  * @return
7742  *   0 on success, a negative errno value otherwise and rte_errno is set.
7743  */
7744 int
7745 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
7746 {
7747         struct mlx5_priv *priv = dev->data->dev_private;
7748         struct mlx5_dev_config *config = &priv->config;
7749         enum modify_reg idx;
7750         int n = 0;
7751
7752         /* reg_c[0] and reg_c[1] are reserved. */
7753         config->flow_mreg_c[n++] = REG_C_0;
7754         config->flow_mreg_c[n++] = REG_C_1;
7755         /* Discover availability of other reg_c's. */
7756         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
7757                 struct rte_flow_attr attr = {
7758                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
7759                         .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
7760                         .ingress = 1,
7761                 };
7762                 struct rte_flow_item items[] = {
7763                         [0] = {
7764                                 .type = RTE_FLOW_ITEM_TYPE_END,
7765                         },
7766                 };
7767                 struct rte_flow_action actions[] = {
7768                         [0] = {
7769                                 .type = (enum rte_flow_action_type)
7770                                         MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
7771                                 .conf = &(struct mlx5_flow_action_copy_mreg){
7772                                         .src = REG_C_1,
7773                                         .dst = idx,
7774                                 },
7775                         },
7776                         [1] = {
7777                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
7778                                 .conf = &(struct rte_flow_action_jump){
7779                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
7780                                 },
7781                         },
7782                         [2] = {
7783                                 .type = RTE_FLOW_ACTION_TYPE_END,
7784                         },
7785                 };
7786                 uint32_t flow_idx;
7787                 struct rte_flow *flow;
7788                 struct rte_flow_error error;
7789
7790                 if (!config->dv_flow_en)
7791                         break;
7792                 /* Create internal flow, validation skips copy action. */
7793                 flow_idx = flow_list_create(dev, NULL, &attr, items,
7794                                             actions, false, &error);
7795                 flow = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW],
7796                                       flow_idx);
7797                 if (!flow)
7798                         continue;
7799                 config->flow_mreg_c[n++] = idx;
7800                 flow_list_destroy(dev, NULL, flow_idx);
7801         }
7802         for (; n < MLX5_MREG_C_NUM; ++n)
7803                 config->flow_mreg_c[n] = REG_NON;
7804         return 0;
7805 }
7806
7807 /**
7808  * Dump flow raw hw data to file
7809  *
7810  * @param[in] dev
7811  *    The pointer to Ethernet device.
7812  * @param[in] file
7813  *   A pointer to a file for output.
7814  * @param[out] error
7815  *   Perform verbose error reporting if not NULL. PMDs initialize this
7816  *   structure in case of error only.
7817  * @return
7818  *   0 on success, a nagative value otherwise.
7819  */
7820 int
7821 mlx5_flow_dev_dump(struct rte_eth_dev *dev, struct rte_flow *flow_idx,
7822                    FILE *file,
7823                    struct rte_flow_error *error __rte_unused)
7824 {
7825         struct mlx5_priv *priv = dev->data->dev_private;
7826         struct mlx5_dev_ctx_shared *sh = priv->sh;
7827         uint32_t handle_idx;
7828         int ret;
7829         struct mlx5_flow_handle *dh;
7830         struct rte_flow *flow;
7831
7832         if (!priv->config.dv_flow_en) {
7833                 if (fputs("device dv flow disabled\n", file) <= 0)
7834                         return -errno;
7835                 return -ENOTSUP;
7836         }
7837
7838         /* dump all */
7839         if (!flow_idx)
7840                 return mlx5_devx_cmd_flow_dump(sh->fdb_domain,
7841                                         sh->rx_domain,
7842                                         sh->tx_domain, file);
7843         /* dump one */
7844         flow = mlx5_ipool_get(priv->sh->ipool
7845                         [MLX5_IPOOL_RTE_FLOW], (uintptr_t)(void *)flow_idx);
7846         if (!flow)
7847                 return -ENOENT;
7848
7849         handle_idx = flow->dev_handles;
7850         while (handle_idx) {
7851                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
7852                                 handle_idx);
7853                 if (!dh)
7854                         return -ENOENT;
7855                 if (dh->drv_flow) {
7856                         ret = mlx5_devx_cmd_flow_single_dump(dh->drv_flow,
7857                                         file);
7858                         if (ret)
7859                                 return -ENOENT;
7860                 }
7861                 handle_idx = dh->next.next;
7862         }
7863         return 0;
7864 }
7865
7866 /**
7867  * Get aged-out flows.
7868  *
7869  * @param[in] dev
7870  *   Pointer to the Ethernet device structure.
7871  * @param[in] context
7872  *   The address of an array of pointers to the aged-out flows contexts.
7873  * @param[in] nb_countexts
7874  *   The length of context array pointers.
7875  * @param[out] error
7876  *   Perform verbose error reporting if not NULL. Initialized in case of
7877  *   error only.
7878  *
7879  * @return
7880  *   how many contexts get in success, otherwise negative errno value.
7881  *   if nb_contexts is 0, return the amount of all aged contexts.
7882  *   if nb_contexts is not 0 , return the amount of aged flows reported
7883  *   in the context array.
7884  */
7885 int
7886 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
7887                         uint32_t nb_contexts, struct rte_flow_error *error)
7888 {
7889         const struct mlx5_flow_driver_ops *fops;
7890         struct rte_flow_attr attr = { .transfer = 0 };
7891
7892         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7893                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7894                 return fops->get_aged_flows(dev, contexts, nb_contexts,
7895                                                     error);
7896         }
7897         DRV_LOG(ERR,
7898                 "port %u get aged flows is not supported.",
7899                  dev->data->port_id);
7900         return -ENOTSUP;
7901 }
7902
7903 /* Wrapper for driver action_validate op callback */
7904 static int
7905 flow_drv_action_validate(struct rte_eth_dev *dev,
7906                          const struct rte_flow_indir_action_conf *conf,
7907                          const struct rte_flow_action *action,
7908                          const struct mlx5_flow_driver_ops *fops,
7909                          struct rte_flow_error *error)
7910 {
7911         static const char err_msg[] = "indirect action validation unsupported";
7912
7913         if (!fops->action_validate) {
7914                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7915                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7916                                    NULL, err_msg);
7917                 return -rte_errno;
7918         }
7919         return fops->action_validate(dev, conf, action, error);
7920 }
7921
7922 /**
7923  * Destroys the shared action by handle.
7924  *
7925  * @param dev
7926  *   Pointer to Ethernet device structure.
7927  * @param[in] handle
7928  *   Handle for the indirect action object to be destroyed.
7929  * @param[out] error
7930  *   Perform verbose error reporting if not NULL. PMDs initialize this
7931  *   structure in case of error only.
7932  *
7933  * @return
7934  *   0 on success, a negative errno value otherwise and rte_errno is set.
7935  *
7936  * @note: wrapper for driver action_create op callback.
7937  */
7938 static int
7939 mlx5_action_handle_destroy(struct rte_eth_dev *dev,
7940                            struct rte_flow_action_handle *handle,
7941                            struct rte_flow_error *error)
7942 {
7943         static const char err_msg[] = "indirect action destruction unsupported";
7944         struct rte_flow_attr attr = { .transfer = 0 };
7945         const struct mlx5_flow_driver_ops *fops =
7946                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7947
7948         if (!fops->action_destroy) {
7949                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7950                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7951                                    NULL, err_msg);
7952                 return -rte_errno;
7953         }
7954         return fops->action_destroy(dev, handle, error);
7955 }
7956
7957 /* Wrapper for driver action_destroy op callback */
7958 static int
7959 flow_drv_action_update(struct rte_eth_dev *dev,
7960                        struct rte_flow_action_handle *handle,
7961                        const void *update,
7962                        const struct mlx5_flow_driver_ops *fops,
7963                        struct rte_flow_error *error)
7964 {
7965         static const char err_msg[] = "indirect action update unsupported";
7966
7967         if (!fops->action_update) {
7968                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7969                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7970                                    NULL, err_msg);
7971                 return -rte_errno;
7972         }
7973         return fops->action_update(dev, handle, update, error);
7974 }
7975
7976 /* Wrapper for driver action_destroy op callback */
7977 static int
7978 flow_drv_action_query(struct rte_eth_dev *dev,
7979                       const struct rte_flow_action_handle *handle,
7980                       void *data,
7981                       const struct mlx5_flow_driver_ops *fops,
7982                       struct rte_flow_error *error)
7983 {
7984         static const char err_msg[] = "indirect action query unsupported";
7985
7986         if (!fops->action_query) {
7987                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7988                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7989                                    NULL, err_msg);
7990                 return -rte_errno;
7991         }
7992         return fops->action_query(dev, handle, data, error);
7993 }
7994
7995 /**
7996  * Create indirect action for reuse in multiple flow rules.
7997  *
7998  * @param dev
7999  *   Pointer to Ethernet device structure.
8000  * @param conf
8001  *   Pointer to indirect action object configuration.
8002  * @param[in] action
8003  *   Action configuration for indirect action object creation.
8004  * @param[out] error
8005  *   Perform verbose error reporting if not NULL. PMDs initialize this
8006  *   structure in case of error only.
8007  * @return
8008  *   A valid handle in case of success, NULL otherwise and rte_errno is set.
8009  */
8010 static struct rte_flow_action_handle *
8011 mlx5_action_handle_create(struct rte_eth_dev *dev,
8012                           const struct rte_flow_indir_action_conf *conf,
8013                           const struct rte_flow_action *action,
8014                           struct rte_flow_error *error)
8015 {
8016         static const char err_msg[] = "indirect action creation unsupported";
8017         struct rte_flow_attr attr = { .transfer = 0 };
8018         const struct mlx5_flow_driver_ops *fops =
8019                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8020
8021         if (flow_drv_action_validate(dev, conf, action, fops, error))
8022                 return NULL;
8023         if (!fops->action_create) {
8024                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8025                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8026                                    NULL, err_msg);
8027                 return NULL;
8028         }
8029         return fops->action_create(dev, conf, action, error);
8030 }
8031
8032 /**
8033  * Updates inplace the indirect action configuration pointed by *handle*
8034  * with the configuration provided as *update* argument.
8035  * The update of the indirect action configuration effects all flow rules
8036  * reusing the action via handle.
8037  *
8038  * @param dev
8039  *   Pointer to Ethernet device structure.
8040  * @param[in] handle
8041  *   Handle for the indirect action to be updated.
8042  * @param[in] update
8043  *   Action specification used to modify the action pointed by handle.
8044  *   *update* could be of same type with the action pointed by the *handle*
8045  *   handle argument, or some other structures like a wrapper, depending on
8046  *   the indirect action type.
8047  * @param[out] error
8048  *   Perform verbose error reporting if not NULL. PMDs initialize this
8049  *   structure in case of error only.
8050  *
8051  * @return
8052  *   0 on success, a negative errno value otherwise and rte_errno is set.
8053  */
8054 static int
8055 mlx5_action_handle_update(struct rte_eth_dev *dev,
8056                 struct rte_flow_action_handle *handle,
8057                 const void *update,
8058                 struct rte_flow_error *error)
8059 {
8060         struct rte_flow_attr attr = { .transfer = 0 };
8061         const struct mlx5_flow_driver_ops *fops =
8062                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8063         int ret;
8064
8065         ret = flow_drv_action_validate(dev, NULL,
8066                         (const struct rte_flow_action *)update, fops, error);
8067         if (ret)
8068                 return ret;
8069         return flow_drv_action_update(dev, handle, update, fops,
8070                                       error);
8071 }
8072
8073 /**
8074  * Query the indirect action by handle.
8075  *
8076  * This function allows retrieving action-specific data such as counters.
8077  * Data is gathered by special action which may be present/referenced in
8078  * more than one flow rule definition.
8079  *
8080  * see @RTE_FLOW_ACTION_TYPE_COUNT
8081  *
8082  * @param dev
8083  *   Pointer to Ethernet device structure.
8084  * @param[in] handle
8085  *   Handle for the indirect action to query.
8086  * @param[in, out] data
8087  *   Pointer to storage for the associated query data type.
8088  * @param[out] error
8089  *   Perform verbose error reporting if not NULL. PMDs initialize this
8090  *   structure in case of error only.
8091  *
8092  * @return
8093  *   0 on success, a negative errno value otherwise and rte_errno is set.
8094  */
8095 static int
8096 mlx5_action_handle_query(struct rte_eth_dev *dev,
8097                          const struct rte_flow_action_handle *handle,
8098                          void *data,
8099                          struct rte_flow_error *error)
8100 {
8101         struct rte_flow_attr attr = { .transfer = 0 };
8102         const struct mlx5_flow_driver_ops *fops =
8103                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8104
8105         return flow_drv_action_query(dev, handle, data, fops, error);
8106 }
8107
8108 /**
8109  * Destroy all indirect actions (shared RSS).
8110  *
8111  * @param dev
8112  *   Pointer to Ethernet device.
8113  *
8114  * @return
8115  *   0 on success, a negative errno value otherwise and rte_errno is set.
8116  */
8117 int
8118 mlx5_action_handle_flush(struct rte_eth_dev *dev)
8119 {
8120         struct rte_flow_error error;
8121         struct mlx5_priv *priv = dev->data->dev_private;
8122         struct mlx5_shared_action_rss *shared_rss;
8123         int ret = 0;
8124         uint32_t idx;
8125
8126         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
8127                       priv->rss_shared_actions, idx, shared_rss, next) {
8128                 ret |= mlx5_action_handle_destroy(dev,
8129                        (struct rte_flow_action_handle *)(uintptr_t)idx, &error);
8130         }
8131         return ret;
8132 }
8133
8134 #ifndef HAVE_MLX5DV_DR
8135 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1))
8136 #else
8137 #define MLX5_DOMAIN_SYNC_FLOW \
8138         (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW)
8139 #endif
8140
8141 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
8142 {
8143         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
8144         const struct mlx5_flow_driver_ops *fops;
8145         int ret;
8146         struct rte_flow_attr attr = { .transfer = 0 };
8147
8148         fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8149         ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW);
8150         if (ret > 0)
8151                 ret = -ret;
8152         return ret;
8153 }
8154
8155 /**
8156  * tunnel offload functionalilty is defined for DV environment only
8157  */
8158 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8159 __extension__
8160 union tunnel_offload_mark {
8161         uint32_t val;
8162         struct {
8163                 uint32_t app_reserve:8;
8164                 uint32_t table_id:15;
8165                 uint32_t transfer:1;
8166                 uint32_t _unused_:8;
8167         };
8168 };
8169
8170 static bool
8171 mlx5_access_tunnel_offload_db
8172         (struct rte_eth_dev *dev,
8173          bool (*match)(struct rte_eth_dev *,
8174                        struct mlx5_flow_tunnel *, const void *),
8175          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
8176          void (*miss)(struct rte_eth_dev *, void *),
8177          void *ctx, bool lock_op);
8178
8179 static int
8180 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
8181                              struct rte_flow *flow,
8182                              const struct rte_flow_attr *attr,
8183                              const struct rte_flow_action *app_actions,
8184                              uint32_t flow_idx,
8185                              struct tunnel_default_miss_ctx *ctx,
8186                              struct rte_flow_error *error)
8187 {
8188         struct mlx5_priv *priv = dev->data->dev_private;
8189         struct mlx5_flow *dev_flow;
8190         struct rte_flow_attr miss_attr = *attr;
8191         const struct mlx5_flow_tunnel *tunnel = app_actions[0].conf;
8192         const struct rte_flow_item miss_items[2] = {
8193                 {
8194                         .type = RTE_FLOW_ITEM_TYPE_ETH,
8195                         .spec = NULL,
8196                         .last = NULL,
8197                         .mask = NULL
8198                 },
8199                 {
8200                         .type = RTE_FLOW_ITEM_TYPE_END,
8201                         .spec = NULL,
8202                         .last = NULL,
8203                         .mask = NULL
8204                 }
8205         };
8206         union tunnel_offload_mark mark_id;
8207         struct rte_flow_action_mark miss_mark;
8208         struct rte_flow_action miss_actions[3] = {
8209                 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark },
8210                 [2] = { .type = RTE_FLOW_ACTION_TYPE_END,  .conf = NULL }
8211         };
8212         const struct rte_flow_action_jump *jump_data;
8213         uint32_t i, flow_table = 0; /* prevent compilation warning */
8214         struct flow_grp_info grp_info = {
8215                 .external = 1,
8216                 .transfer = attr->transfer,
8217                 .fdb_def_rule = !!priv->fdb_def_rule,
8218                 .std_tbl_fix = 0,
8219         };
8220         int ret;
8221
8222         if (!attr->transfer) {
8223                 uint32_t q_size;
8224
8225                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS;
8226                 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]);
8227                 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size,
8228                                          0, SOCKET_ID_ANY);
8229                 if (!ctx->queue)
8230                         return rte_flow_error_set
8231                                 (error, ENOMEM,
8232                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
8233                                 NULL, "invalid default miss RSS");
8234                 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT,
8235                 ctx->action_rss.level = 0,
8236                 ctx->action_rss.types = priv->rss_conf.rss_hf,
8237                 ctx->action_rss.key_len = priv->rss_conf.rss_key_len,
8238                 ctx->action_rss.queue_num = priv->reta_idx_n,
8239                 ctx->action_rss.key = priv->rss_conf.rss_key,
8240                 ctx->action_rss.queue = ctx->queue;
8241                 if (!priv->reta_idx_n || !priv->rxqs_n)
8242                         return rte_flow_error_set
8243                                 (error, EINVAL,
8244                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
8245                                 NULL, "invalid port configuration");
8246                 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
8247                         ctx->action_rss.types = 0;
8248                 for (i = 0; i != priv->reta_idx_n; ++i)
8249                         ctx->queue[i] = (*priv->reta_idx)[i];
8250         } else {
8251                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP;
8252                 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP;
8253         }
8254         miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw;
8255         for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++);
8256         jump_data = app_actions->conf;
8257         miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY;
8258         miss_attr.group = jump_data->group;
8259         ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group,
8260                                        &flow_table, &grp_info, error);
8261         if (ret)
8262                 return rte_flow_error_set(error, EINVAL,
8263                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
8264                                           NULL, "invalid tunnel id");
8265         mark_id.app_reserve = 0;
8266         mark_id.table_id = tunnel_flow_tbl_to_id(flow_table);
8267         mark_id.transfer = !!attr->transfer;
8268         mark_id._unused_ = 0;
8269         miss_mark.id = mark_id.val;
8270         dev_flow = flow_drv_prepare(dev, flow, &miss_attr,
8271                                     miss_items, miss_actions, flow_idx, error);
8272         if (!dev_flow)
8273                 return -rte_errno;
8274         dev_flow->flow = flow;
8275         dev_flow->external = true;
8276         dev_flow->tunnel = tunnel;
8277         /* Subflow object was created, we must include one in the list. */
8278         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
8279                       dev_flow->handle, next);
8280         DRV_LOG(DEBUG,
8281                 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u",
8282                 dev->data->port_id, tunnel->app_tunnel.type,
8283                 tunnel->tunnel_id, miss_attr.priority, miss_attr.group);
8284         ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items,
8285                                   miss_actions, error);
8286         if (!ret)
8287                 ret = flow_mreg_update_copy_table(dev, flow, miss_actions,
8288                                                   error);
8289
8290         return ret;
8291 }
8292
8293 static const struct mlx5_flow_tbl_data_entry  *
8294 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark)
8295 {
8296         struct mlx5_priv *priv = dev->data->dev_private;
8297         struct mlx5_dev_ctx_shared *sh = priv->sh;
8298         struct mlx5_hlist_entry *he;
8299         union tunnel_offload_mark mbits = { .val = mark };
8300         union mlx5_flow_tbl_key table_key = {
8301                 {
8302                         .level = tunnel_id_to_flow_tbl(mbits.table_id),
8303                         .id = 0,
8304                         .reserved = 0,
8305                         .dummy = 0,
8306                         .is_fdb = !!mbits.transfer,
8307                         .is_egress = 0,
8308                 }
8309         };
8310         he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, NULL);
8311         return he ?
8312                container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL;
8313 }
8314
8315 static void
8316 mlx5_flow_tunnel_grp2tbl_remove_cb(struct mlx5_hlist *list,
8317                                    struct mlx5_hlist_entry *entry)
8318 {
8319         struct mlx5_dev_ctx_shared *sh = list->ctx;
8320         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
8321
8322         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
8323                         tunnel_flow_tbl_to_id(tte->flow_table));
8324         mlx5_free(tte);
8325 }
8326
8327 static int
8328 mlx5_flow_tunnel_grp2tbl_match_cb(struct mlx5_hlist *list __rte_unused,
8329                                   struct mlx5_hlist_entry *entry,
8330                                   uint64_t key, void *cb_ctx __rte_unused)
8331 {
8332         union tunnel_tbl_key tbl = {
8333                 .val = key,
8334         };
8335         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
8336
8337         return tbl.tunnel_id != tte->tunnel_id || tbl.group != tte->group;
8338 }
8339
8340 static struct mlx5_hlist_entry *
8341 mlx5_flow_tunnel_grp2tbl_create_cb(struct mlx5_hlist *list, uint64_t key,
8342                                    void *ctx __rte_unused)
8343 {
8344         struct mlx5_dev_ctx_shared *sh = list->ctx;
8345         struct tunnel_tbl_entry *tte;
8346         union tunnel_tbl_key tbl = {
8347                 .val = key,
8348         };
8349
8350         tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
8351                           sizeof(*tte), 0,
8352                           SOCKET_ID_ANY);
8353         if (!tte)
8354                 goto err;
8355         mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
8356                           &tte->flow_table);
8357         if (tte->flow_table >= MLX5_MAX_TABLES) {
8358                 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.",
8359                         tte->flow_table);
8360                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
8361                                 tte->flow_table);
8362                 goto err;
8363         } else if (!tte->flow_table) {
8364                 goto err;
8365         }
8366         tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table);
8367         tte->tunnel_id = tbl.tunnel_id;
8368         tte->group = tbl.group;
8369         return &tte->hash;
8370 err:
8371         if (tte)
8372                 mlx5_free(tte);
8373         return NULL;
8374 }
8375
8376 static uint32_t
8377 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
8378                                 const struct mlx5_flow_tunnel *tunnel,
8379                                 uint32_t group, uint32_t *table,
8380                                 struct rte_flow_error *error)
8381 {
8382         struct mlx5_hlist_entry *he;
8383         struct tunnel_tbl_entry *tte;
8384         union tunnel_tbl_key key = {
8385                 .tunnel_id = tunnel ? tunnel->tunnel_id : 0,
8386                 .group = group
8387         };
8388         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8389         struct mlx5_hlist *group_hash;
8390
8391         group_hash = tunnel ? tunnel->groups : thub->groups;
8392         he = mlx5_hlist_register(group_hash, key.val, NULL);
8393         if (!he)
8394                 return rte_flow_error_set(error, EINVAL,
8395                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
8396                                           NULL,
8397                                           "tunnel group index not supported");
8398         tte = container_of(he, typeof(*tte), hash);
8399         *table = tte->flow_table;
8400         DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x",
8401                 dev->data->port_id, key.tunnel_id, group, *table);
8402         return 0;
8403 }
8404
8405 static void
8406 mlx5_flow_tunnel_free(struct rte_eth_dev *dev,
8407                       struct mlx5_flow_tunnel *tunnel)
8408 {
8409         struct mlx5_priv *priv = dev->data->dev_private;
8410         struct mlx5_indexed_pool *ipool;
8411
8412         DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x",
8413                 dev->data->port_id, tunnel->tunnel_id);
8414         LIST_REMOVE(tunnel, chain);
8415         mlx5_hlist_destroy(tunnel->groups);
8416         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
8417         mlx5_ipool_free(ipool, tunnel->tunnel_id);
8418 }
8419
8420 static bool
8421 mlx5_access_tunnel_offload_db
8422         (struct rte_eth_dev *dev,
8423          bool (*match)(struct rte_eth_dev *,
8424                        struct mlx5_flow_tunnel *, const void *),
8425          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
8426          void (*miss)(struct rte_eth_dev *, void *),
8427          void *ctx, bool lock_op)
8428 {
8429         bool verdict = false;
8430         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8431         struct mlx5_flow_tunnel *tunnel;
8432
8433         rte_spinlock_lock(&thub->sl);
8434         LIST_FOREACH(tunnel, &thub->tunnels, chain) {
8435                 verdict = match(dev, tunnel, (const void *)ctx);
8436                 if (verdict)
8437                         break;
8438         }
8439         if (!lock_op)
8440                 rte_spinlock_unlock(&thub->sl);
8441         if (verdict && hit)
8442                 hit(dev, tunnel, ctx);
8443         if (!verdict && miss)
8444                 miss(dev, ctx);
8445         if (lock_op)
8446                 rte_spinlock_unlock(&thub->sl);
8447
8448         return verdict;
8449 }
8450
8451 struct tunnel_db_find_tunnel_id_ctx {
8452         uint32_t tunnel_id;
8453         struct mlx5_flow_tunnel *tunnel;
8454 };
8455
8456 static bool
8457 find_tunnel_id_match(struct rte_eth_dev *dev,
8458                      struct mlx5_flow_tunnel *tunnel, const void *x)
8459 {
8460         const struct tunnel_db_find_tunnel_id_ctx *ctx = x;
8461
8462         RTE_SET_USED(dev);
8463         return tunnel->tunnel_id == ctx->tunnel_id;
8464 }
8465
8466 static void
8467 find_tunnel_id_hit(struct rte_eth_dev *dev,
8468                    struct mlx5_flow_tunnel *tunnel, void *x)
8469 {
8470         struct tunnel_db_find_tunnel_id_ctx *ctx = x;
8471         RTE_SET_USED(dev);
8472         ctx->tunnel = tunnel;
8473 }
8474
8475 static struct mlx5_flow_tunnel *
8476 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id)
8477 {
8478         struct tunnel_db_find_tunnel_id_ctx ctx = {
8479                 .tunnel_id = id,
8480         };
8481
8482         mlx5_access_tunnel_offload_db(dev, find_tunnel_id_match,
8483                                       find_tunnel_id_hit, NULL, &ctx, true);
8484
8485         return ctx.tunnel;
8486 }
8487
8488 static struct mlx5_flow_tunnel *
8489 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev,
8490                           const struct rte_flow_tunnel *app_tunnel)
8491 {
8492         struct mlx5_priv *priv = dev->data->dev_private;
8493         struct mlx5_indexed_pool *ipool;
8494         struct mlx5_flow_tunnel *tunnel;
8495         uint32_t id;
8496
8497         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
8498         tunnel = mlx5_ipool_zmalloc(ipool, &id);
8499         if (!tunnel)
8500                 return NULL;
8501         if (id >= MLX5_MAX_TUNNELS) {
8502                 mlx5_ipool_free(ipool, id);
8503                 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id);
8504                 return NULL;
8505         }
8506         tunnel->groups = mlx5_hlist_create("tunnel groups", 1024, 0, 0,
8507                                            mlx5_flow_tunnel_grp2tbl_create_cb,
8508                                            mlx5_flow_tunnel_grp2tbl_match_cb,
8509                                            mlx5_flow_tunnel_grp2tbl_remove_cb);
8510         if (!tunnel->groups) {
8511                 mlx5_ipool_free(ipool, id);
8512                 return NULL;
8513         }
8514         tunnel->groups->ctx = priv->sh;
8515         /* initiate new PMD tunnel */
8516         memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel));
8517         tunnel->tunnel_id = id;
8518         tunnel->action.type = (typeof(tunnel->action.type))
8519                               MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET;
8520         tunnel->action.conf = tunnel;
8521         tunnel->item.type = (typeof(tunnel->item.type))
8522                             MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL;
8523         tunnel->item.spec = tunnel;
8524         tunnel->item.last = NULL;
8525         tunnel->item.mask = NULL;
8526
8527         DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x",
8528                 dev->data->port_id, tunnel->tunnel_id);
8529
8530         return tunnel;
8531 }
8532
8533 struct tunnel_db_get_tunnel_ctx {
8534         const struct rte_flow_tunnel *app_tunnel;
8535         struct mlx5_flow_tunnel *tunnel;
8536 };
8537
8538 static bool get_tunnel_match(struct rte_eth_dev *dev,
8539                              struct mlx5_flow_tunnel *tunnel, const void *x)
8540 {
8541         const struct tunnel_db_get_tunnel_ctx *ctx = x;
8542
8543         RTE_SET_USED(dev);
8544         return !memcmp(ctx->app_tunnel, &tunnel->app_tunnel,
8545                        sizeof(*ctx->app_tunnel));
8546 }
8547
8548 static void get_tunnel_hit(struct rte_eth_dev *dev,
8549                            struct mlx5_flow_tunnel *tunnel, void *x)
8550 {
8551         /* called under tunnel spinlock protection */
8552         struct tunnel_db_get_tunnel_ctx *ctx = x;
8553
8554         RTE_SET_USED(dev);
8555         tunnel->refctn++;
8556         ctx->tunnel = tunnel;
8557 }
8558
8559 static void get_tunnel_miss(struct rte_eth_dev *dev, void *x)
8560 {
8561         /* called under tunnel spinlock protection */
8562         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8563         struct tunnel_db_get_tunnel_ctx *ctx = x;
8564
8565         rte_spinlock_unlock(&thub->sl);
8566         ctx->tunnel = mlx5_flow_tunnel_allocate(dev, ctx->app_tunnel);
8567         rte_spinlock_lock(&thub->sl);
8568         if (ctx->tunnel) {
8569                 ctx->tunnel->refctn = 1;
8570                 LIST_INSERT_HEAD(&thub->tunnels, ctx->tunnel, chain);
8571         }
8572 }
8573
8574
8575 static int
8576 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
8577                      const struct rte_flow_tunnel *app_tunnel,
8578                      struct mlx5_flow_tunnel **tunnel)
8579 {
8580         struct tunnel_db_get_tunnel_ctx ctx = {
8581                 .app_tunnel = app_tunnel,
8582         };
8583
8584         mlx5_access_tunnel_offload_db(dev, get_tunnel_match, get_tunnel_hit,
8585                                       get_tunnel_miss, &ctx, true);
8586         *tunnel = ctx.tunnel;
8587         return ctx.tunnel ? 0 : -ENOMEM;
8588 }
8589
8590 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id)
8591 {
8592         struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
8593
8594         if (!thub)
8595                 return;
8596         if (!LIST_EMPTY(&thub->tunnels))
8597                 DRV_LOG(WARNING, "port %u tunnels present", port_id);
8598         mlx5_hlist_destroy(thub->groups);
8599         mlx5_free(thub);
8600 }
8601
8602 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh)
8603 {
8604         int err;
8605         struct mlx5_flow_tunnel_hub *thub;
8606
8607         thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub),
8608                            0, SOCKET_ID_ANY);
8609         if (!thub)
8610                 return -ENOMEM;
8611         LIST_INIT(&thub->tunnels);
8612         rte_spinlock_init(&thub->sl);
8613         thub->groups = mlx5_hlist_create("flow groups",
8614                                          rte_align32pow2(MLX5_MAX_TABLES), 0,
8615                                          0, mlx5_flow_tunnel_grp2tbl_create_cb,
8616                                          mlx5_flow_tunnel_grp2tbl_match_cb,
8617                                          mlx5_flow_tunnel_grp2tbl_remove_cb);
8618         if (!thub->groups) {
8619                 err = -rte_errno;
8620                 goto err;
8621         }
8622         thub->groups->ctx = sh;
8623         sh->tunnel_hub = thub;
8624
8625         return 0;
8626
8627 err:
8628         if (thub->groups)
8629                 mlx5_hlist_destroy(thub->groups);
8630         if (thub)
8631                 mlx5_free(thub);
8632         return err;
8633 }
8634
8635 static inline bool
8636 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev,
8637                           struct rte_flow_tunnel *tunnel,
8638                           const char *err_msg)
8639 {
8640         err_msg = NULL;
8641         if (!is_tunnel_offload_active(dev)) {
8642                 err_msg = "tunnel offload was not activated";
8643                 goto out;
8644         } else if (!tunnel) {
8645                 err_msg = "no application tunnel";
8646                 goto out;
8647         }
8648
8649         switch (tunnel->type) {
8650         default:
8651                 err_msg = "unsupported tunnel type";
8652                 goto out;
8653         case RTE_FLOW_ITEM_TYPE_VXLAN:
8654                 break;
8655         }
8656
8657 out:
8658         return !err_msg;
8659 }
8660
8661 static int
8662 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
8663                     struct rte_flow_tunnel *app_tunnel,
8664                     struct rte_flow_action **actions,
8665                     uint32_t *num_of_actions,
8666                     struct rte_flow_error *error)
8667 {
8668         int ret;
8669         struct mlx5_flow_tunnel *tunnel;
8670         const char *err_msg = NULL;
8671         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
8672
8673         if (!verdict)
8674                 return rte_flow_error_set(error, EINVAL,
8675                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
8676                                           err_msg);
8677         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
8678         if (ret < 0) {
8679                 return rte_flow_error_set(error, ret,
8680                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
8681                                           "failed to initialize pmd tunnel");
8682         }
8683         *actions = &tunnel->action;
8684         *num_of_actions = 1;
8685         return 0;
8686 }
8687
8688 static int
8689 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
8690                        struct rte_flow_tunnel *app_tunnel,
8691                        struct rte_flow_item **items,
8692                        uint32_t *num_of_items,
8693                        struct rte_flow_error *error)
8694 {
8695         int ret;
8696         struct mlx5_flow_tunnel *tunnel;
8697         const char *err_msg = NULL;
8698         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
8699
8700         if (!verdict)
8701                 return rte_flow_error_set(error, EINVAL,
8702                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
8703                                           err_msg);
8704         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
8705         if (ret < 0) {
8706                 return rte_flow_error_set(error, ret,
8707                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
8708                                           "failed to initialize pmd tunnel");
8709         }
8710         *items = &tunnel->item;
8711         *num_of_items = 1;
8712         return 0;
8713 }
8714
8715 struct tunnel_db_element_release_ctx {
8716         struct rte_flow_item *items;
8717         struct rte_flow_action *actions;
8718         uint32_t num_elements;
8719         struct rte_flow_error *error;
8720         int ret;
8721 };
8722
8723 static bool
8724 tunnel_element_release_match(struct rte_eth_dev *dev,
8725                              struct mlx5_flow_tunnel *tunnel, const void *x)
8726 {
8727         const struct tunnel_db_element_release_ctx *ctx = x;
8728
8729         RTE_SET_USED(dev);
8730         if (ctx->num_elements != 1)
8731                 return false;
8732         else if (ctx->items)
8733                 return ctx->items == &tunnel->item;
8734         else if (ctx->actions)
8735                 return ctx->actions == &tunnel->action;
8736
8737         return false;
8738 }
8739
8740 static void
8741 tunnel_element_release_hit(struct rte_eth_dev *dev,
8742                            struct mlx5_flow_tunnel *tunnel, void *x)
8743 {
8744         struct tunnel_db_element_release_ctx *ctx = x;
8745         ctx->ret = 0;
8746         if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
8747                 mlx5_flow_tunnel_free(dev, tunnel);
8748 }
8749
8750 static void
8751 tunnel_element_release_miss(struct rte_eth_dev *dev, void *x)
8752 {
8753         struct tunnel_db_element_release_ctx *ctx = x;
8754         RTE_SET_USED(dev);
8755         ctx->ret = rte_flow_error_set(ctx->error, EINVAL,
8756                                       RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
8757                                       "invalid argument");
8758 }
8759
8760 static int
8761 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
8762                        struct rte_flow_item *pmd_items,
8763                        uint32_t num_items, struct rte_flow_error *err)
8764 {
8765         struct tunnel_db_element_release_ctx ctx = {
8766                 .items = pmd_items,
8767                 .actions = NULL,
8768                 .num_elements = num_items,
8769                 .error = err,
8770         };
8771
8772         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
8773                                       tunnel_element_release_hit,
8774                                       tunnel_element_release_miss, &ctx, false);
8775
8776         return ctx.ret;
8777 }
8778
8779 static int
8780 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
8781                          struct rte_flow_action *pmd_actions,
8782                          uint32_t num_actions, struct rte_flow_error *err)
8783 {
8784         struct tunnel_db_element_release_ctx ctx = {
8785                 .items = NULL,
8786                 .actions = pmd_actions,
8787                 .num_elements = num_actions,
8788                 .error = err,
8789         };
8790
8791         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
8792                                       tunnel_element_release_hit,
8793                                       tunnel_element_release_miss, &ctx, false);
8794
8795         return ctx.ret;
8796 }
8797
8798 static int
8799 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
8800                                   struct rte_mbuf *m,
8801                                   struct rte_flow_restore_info *info,
8802                                   struct rte_flow_error *err)
8803 {
8804         uint64_t ol_flags = m->ol_flags;
8805         const struct mlx5_flow_tbl_data_entry *tble;
8806         const uint64_t mask = PKT_RX_FDIR | PKT_RX_FDIR_ID;
8807
8808         if (!is_tunnel_offload_active(dev)) {
8809                 info->flags = 0;
8810                 return 0;
8811         }
8812
8813         if ((ol_flags & mask) != mask)
8814                 goto err;
8815         tble = tunnel_mark_decode(dev, m->hash.fdir.hi);
8816         if (!tble) {
8817                 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x",
8818                         dev->data->port_id, m->hash.fdir.hi);
8819                 goto err;
8820         }
8821         MLX5_ASSERT(tble->tunnel);
8822         memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel));
8823         info->group_id = tble->group_id;
8824         info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL |
8825                       RTE_FLOW_RESTORE_INFO_GROUP_ID |
8826                       RTE_FLOW_RESTORE_INFO_ENCAPSULATED;
8827
8828         return 0;
8829
8830 err:
8831         return rte_flow_error_set(err, EINVAL,
8832                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8833                                   "failed to get restore info");
8834 }
8835
8836 #else /* HAVE_IBV_FLOW_DV_SUPPORT */
8837 static int
8838 mlx5_flow_tunnel_decap_set(__rte_unused struct rte_eth_dev *dev,
8839                            __rte_unused struct rte_flow_tunnel *app_tunnel,
8840                            __rte_unused struct rte_flow_action **actions,
8841                            __rte_unused uint32_t *num_of_actions,
8842                            __rte_unused struct rte_flow_error *error)
8843 {
8844         return -ENOTSUP;
8845 }
8846
8847 static int
8848 mlx5_flow_tunnel_match(__rte_unused struct rte_eth_dev *dev,
8849                        __rte_unused struct rte_flow_tunnel *app_tunnel,
8850                        __rte_unused struct rte_flow_item **items,
8851                        __rte_unused uint32_t *num_of_items,
8852                        __rte_unused struct rte_flow_error *error)
8853 {
8854         return -ENOTSUP;
8855 }
8856
8857 static int
8858 mlx5_flow_tunnel_item_release(__rte_unused struct rte_eth_dev *dev,
8859                               __rte_unused struct rte_flow_item *pmd_items,
8860                               __rte_unused uint32_t num_items,
8861                               __rte_unused struct rte_flow_error *err)
8862 {
8863         return -ENOTSUP;
8864 }
8865
8866 static int
8867 mlx5_flow_tunnel_action_release(__rte_unused struct rte_eth_dev *dev,
8868                                 __rte_unused struct rte_flow_action *pmd_action,
8869                                 __rte_unused uint32_t num_actions,
8870                                 __rte_unused struct rte_flow_error *err)
8871 {
8872         return -ENOTSUP;
8873 }
8874
8875 static int
8876 mlx5_flow_tunnel_get_restore_info(__rte_unused struct rte_eth_dev *dev,
8877                                   __rte_unused struct rte_mbuf *m,
8878                                   __rte_unused struct rte_flow_restore_info *i,
8879                                   __rte_unused struct rte_flow_error *err)
8880 {
8881         return -ENOTSUP;
8882 }
8883
8884 static int
8885 flow_tunnel_add_default_miss(__rte_unused struct rte_eth_dev *dev,
8886                              __rte_unused struct rte_flow *flow,
8887                              __rte_unused const struct rte_flow_attr *attr,
8888                              __rte_unused const struct rte_flow_action *actions,
8889                              __rte_unused uint32_t flow_idx,
8890                              __rte_unused struct tunnel_default_miss_ctx *ctx,
8891                              __rte_unused struct rte_flow_error *error)
8892 {
8893         return -ENOTSUP;
8894 }
8895
8896 static struct mlx5_flow_tunnel *
8897 mlx5_find_tunnel_id(__rte_unused struct rte_eth_dev *dev,
8898                     __rte_unused uint32_t id)
8899 {
8900         return NULL;
8901 }
8902
8903 static void
8904 mlx5_flow_tunnel_free(__rte_unused struct rte_eth_dev *dev,
8905                       __rte_unused struct mlx5_flow_tunnel *tunnel)
8906 {
8907 }
8908
8909 static uint32_t
8910 tunnel_flow_group_to_flow_table(__rte_unused struct rte_eth_dev *dev,
8911                                 __rte_unused const struct mlx5_flow_tunnel *t,
8912                                 __rte_unused uint32_t group,
8913                                 __rte_unused uint32_t *table,
8914                                 struct rte_flow_error *error)
8915 {
8916         return rte_flow_error_set(error, ENOTSUP,
8917                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8918                                   "tunnel offload requires DV support");
8919 }
8920
8921 void
8922 mlx5_release_tunnel_hub(__rte_unused struct mlx5_dev_ctx_shared *sh,
8923                         __rte_unused  uint16_t port_id)
8924 {
8925 }
8926 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */