drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <netinet/in.h>
   7 #include <sys/queue.h>
   8 #include <stdalign.h>
   9 #include <stdint.h>
  10 #include <string.h>
  11 #include <stdbool.h>
  12
  13 #include <rte_common.h>
  14 #include <rte_ether.h>
  15 #include <rte_ethdev_driver.h>
  16 #include <rte_eal_paging.h>
  17 #include <rte_flow.h>
  18 #include <rte_cycles.h>
  19 #include <rte_flow_driver.h>
  20 #include <rte_malloc.h>
  21 #include <rte_ip.h>
  22
  23 #include <mlx5_glue.h>
  24 #include <mlx5_devx_cmds.h>
  25 #include <mlx5_prm.h>
  26 #include <mlx5_malloc.h>
  27
  28 #include "mlx5_defs.h"
  29 #include "mlx5.h"
  30 #include "mlx5_flow.h"
  31 #include "mlx5_flow_os.h"
  32 #include "mlx5_rxtx.h"
  33 #include "mlx5_common_os.h"
  34 #include "rte_pmd_mlx5.h"
  35
  36 static struct mlx5_flow_tunnel *
  37 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id);
  38 static void
  39 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel);
  40 static const struct mlx5_flow_tbl_data_entry  *
  41 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark);
  42 static int
  43 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
  44                      const struct rte_flow_tunnel *app_tunnel,
  45                      struct mlx5_flow_tunnel **tunnel);
  46
  47
  48 /** Device flow drivers. */
  49 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  50
  51 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  52
  53 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  54         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  55 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  56         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  57 #endif
  58         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  59         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  60 };
  61
  62 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */
  63 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \
  64         (const int []){ \
  65                 __VA_ARGS__, 0, \
  66         }
  67
  68 /** Node object of input graph for mlx5_flow_expand_rss(). */
  69 struct mlx5_flow_expand_node {
  70         const int *const next;
  71         /**<
  72          * List of next node indexes. Index 0 is interpreted as a terminator.
  73          */
  74         const enum rte_flow_item_type type;
  75         /**< Pattern item type of current node. */
  76         uint64_t rss_types;
  77         /**<
  78          * RSS types bit-field associated with this node
  79          * (see ETH_RSS_* definitions).
  80          */
  81 };
  82
  83 /** Object returned by mlx5_flow_expand_rss(). */
  84 struct mlx5_flow_expand_rss {
  85         uint32_t entries;
  86         /**< Number of entries @p patterns and @p priorities. */
  87         struct {
  88                 struct rte_flow_item *pattern; /**< Expanded pattern array. */
  89                 uint32_t priority; /**< Priority offset for each expansion. */
  90         } entry[];
  91 };
  92
  93 static enum rte_flow_item_type
  94 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item)
  95 {
  96         enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID;
  97         uint16_t ether_type = 0;
  98         uint16_t ether_type_m;
  99         uint8_t ip_next_proto = 0;
 100         uint8_t ip_next_proto_m;
 101
 102         if (item == NULL || item->spec == NULL)
 103                 return ret;
 104         switch (item->type) {
 105         case RTE_FLOW_ITEM_TYPE_ETH:
 106                 if (item->mask)
 107                         ether_type_m = ((const struct rte_flow_item_eth *)
 108                                                 (item->mask))->type;
 109                 else
 110                         ether_type_m = rte_flow_item_eth_mask.type;
 111                 if (ether_type_m != RTE_BE16(0xFFFF))
 112                         break;
 113                 ether_type = ((const struct rte_flow_item_eth *)
 114                                 (item->spec))->type;
 115                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 116                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 117                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 118                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 119                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 120                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 121                 else
 122                         ret = RTE_FLOW_ITEM_TYPE_END;
 123                 break;
 124         case RTE_FLOW_ITEM_TYPE_VLAN:
 125                 if (item->mask)
 126                         ether_type_m = ((const struct rte_flow_item_vlan *)
 127                                                 (item->mask))->inner_type;
 128                 else
 129                         ether_type_m = rte_flow_item_vlan_mask.inner_type;
 130                 if (ether_type_m != RTE_BE16(0xFFFF))
 131                         break;
 132                 ether_type = ((const struct rte_flow_item_vlan *)
 133                                 (item->spec))->inner_type;
 134                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 135                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 136                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 137                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 138                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 139                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 140                 else
 141                         ret = RTE_FLOW_ITEM_TYPE_END;
 142                 break;
 143         case RTE_FLOW_ITEM_TYPE_IPV4:
 144                 if (item->mask)
 145                         ip_next_proto_m = ((const struct rte_flow_item_ipv4 *)
 146                                         (item->mask))->hdr.next_proto_id;
 147                 else
 148                         ip_next_proto_m =
 149                                 rte_flow_item_ipv4_mask.hdr.next_proto_id;
 150                 if (ip_next_proto_m != 0xFF)
 151                         break;
 152                 ip_next_proto = ((const struct rte_flow_item_ipv4 *)
 153                                 (item->spec))->hdr.next_proto_id;
 154                 if (ip_next_proto == IPPROTO_UDP)
 155                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 156                 else if (ip_next_proto == IPPROTO_TCP)
 157                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 158                 else if (ip_next_proto == IPPROTO_IP)
 159                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 160                 else if (ip_next_proto == IPPROTO_IPV6)
 161                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 162                 else
 163                         ret = RTE_FLOW_ITEM_TYPE_END;
 164                 break;
 165         case RTE_FLOW_ITEM_TYPE_IPV6:
 166                 if (item->mask)
 167                         ip_next_proto_m = ((const struct rte_flow_item_ipv6 *)
 168                                                 (item->mask))->hdr.proto;
 169                 else
 170                         ip_next_proto_m =
 171                                 rte_flow_item_ipv6_mask.hdr.proto;
 172                 if (ip_next_proto_m != 0xFF)
 173                         break;
 174                 ip_next_proto = ((const struct rte_flow_item_ipv6 *)
 175                                 (item->spec))->hdr.proto;
 176                 if (ip_next_proto == IPPROTO_UDP)
 177                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 178                 else if (ip_next_proto == IPPROTO_TCP)
 179                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 180                 else if (ip_next_proto == IPPROTO_IP)
 181                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 182                 else if (ip_next_proto == IPPROTO_IPV6)
 183                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 184                 else
 185                         ret = RTE_FLOW_ITEM_TYPE_END;
 186                 break;
 187         default:
 188                 ret = RTE_FLOW_ITEM_TYPE_VOID;
 189                 break;
 190         }
 191         return ret;
 192 }
 193
 194 /**
 195  * Expand RSS flows into several possible flows according to the RSS hash
 196  * fields requested and the driver capabilities.
 197  *
 198  * @param[out] buf
 199  *   Buffer to store the result expansion.
 200  * @param[in] size
 201  *   Buffer size in bytes. If 0, @p buf can be NULL.
 202  * @param[in] pattern
 203  *   User flow pattern.
 204  * @param[in] types
 205  *   RSS types to expand (see ETH_RSS_* definitions).
 206  * @param[in] graph
 207  *   Input graph to expand @p pattern according to @p types.
 208  * @param[in] graph_root_index
 209  *   Index of root node in @p graph, typically 0.
 210  *
 211  * @return
 212  *   A positive value representing the size of @p buf in bytes regardless of
 213  *   @p size on success, a negative errno value otherwise and rte_errno is
 214  *   set, the following errors are defined:
 215  *
 216  *   -E2BIG: graph-depth @p graph is too deep.
 217  */
 218 static int
 219 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,
 220                      const struct rte_flow_item *pattern, uint64_t types,
 221                      const struct mlx5_flow_expand_node graph[],
 222                      int graph_root_index)
 223 {
 224         const int elt_n = 8;
 225         const struct rte_flow_item *item;
 226         const struct mlx5_flow_expand_node *node = &graph[graph_root_index];
 227         const int *next_node;
 228         const int *stack[elt_n];
 229         int stack_pos = 0;
 230         struct rte_flow_item flow_items[elt_n];
 231         unsigned int i;
 232         size_t lsize;
 233         size_t user_pattern_size = 0;
 234         void *addr = NULL;
 235         const struct mlx5_flow_expand_node *next = NULL;
 236         struct rte_flow_item missed_item;
 237         int missed = 0;
 238         int elt = 0;
 239         const struct rte_flow_item *last_item = NULL;
 240
 241         memset(&missed_item, 0, sizeof(missed_item));
 242         lsize = offsetof(struct mlx5_flow_expand_rss, entry) +
 243                 elt_n * sizeof(buf->entry[0]);
 244         if (lsize <= size) {
 245                 buf->entry[0].priority = 0;
 246                 buf->entry[0].pattern = (void *)&buf->entry[elt_n];
 247                 buf->entries = 0;
 248                 addr = buf->entry[0].pattern;
 249         }
 250         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 251                 if (item->type != RTE_FLOW_ITEM_TYPE_VOID)
 252                         last_item = item;
 253                 for (i = 0; node->next && node->next[i]; ++i) {
 254                         next = &graph[node->next[i]];
 255                         if (next->type == item->type)
 256                                 break;
 257                 }
 258                 if (next)
 259                         node = next;
 260                 user_pattern_size += sizeof(*item);
 261         }
 262         user_pattern_size += sizeof(*item); /* Handle END item. */
 263         lsize += user_pattern_size;
 264         /* Copy the user pattern in the first entry of the buffer. */
 265         if (lsize <= size) {
 266                 rte_memcpy(addr, pattern, user_pattern_size);
 267                 addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 268                 buf->entries = 1;
 269         }
 270         /* Start expanding. */
 271         memset(flow_items, 0, sizeof(flow_items));
 272         user_pattern_size -= sizeof(*item);
 273         /*
 274          * Check if the last valid item has spec set, need complete pattern,
 275          * and the pattern can be used for expansion.
 276          */
 277         missed_item.type = mlx5_flow_expand_rss_item_complete(last_item);
 278         if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) {
 279                 /* Item type END indicates expansion is not required. */
 280                 return lsize;
 281         }
 282         if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) {
 283                 next = NULL;
 284                 missed = 1;
 285                 for (i = 0; node->next && node->next[i]; ++i) {
 286                         next = &graph[node->next[i]];
 287                         if (next->type == missed_item.type) {
 288                                 flow_items[0].type = missed_item.type;
 289                                 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 290                                 break;
 291                         }
 292                         next = NULL;
 293                 }
 294         }
 295         if (next && missed) {
 296                 elt = 2; /* missed item + item end. */
 297                 node = next;
 298                 lsize += elt * sizeof(*item) + user_pattern_size;
 299                 if ((node->rss_types & types) && lsize <= size) {
 300                         buf->entry[buf->entries].priority = 1;
 301                         buf->entry[buf->entries].pattern = addr;
 302                         buf->entries++;
 303                         rte_memcpy(addr, buf->entry[0].pattern,
 304                                    user_pattern_size);
 305                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 306                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 307                         addr = (void *)(((uintptr_t)addr) +
 308                                         elt * sizeof(*item));
 309                 }
 310         }
 311         memset(flow_items, 0, sizeof(flow_items));
 312         next_node = node->next;
 313         stack[stack_pos] = next_node;
 314         node = next_node ? &graph[*next_node] : NULL;
 315         while (node) {
 316                 flow_items[stack_pos].type = node->type;
 317                 if (node->rss_types & types) {
 318                         /*
 319                          * compute the number of items to copy from the
 320                          * expansion and copy it.
 321                          * When the stack_pos is 0, there are 1 element in it,
 322                          * plus the addition END item.
 323                          */
 324                         elt = stack_pos + 2;
 325                         flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END;
 326                         lsize += elt * sizeof(*item) + user_pattern_size;
 327                         if (lsize <= size) {
 328                                 size_t n = elt * sizeof(*item);
 329
 330                                 buf->entry[buf->entries].priority =
 331                                         stack_pos + 1 + missed;
 332                                 buf->entry[buf->entries].pattern = addr;
 333                                 buf->entries++;
 334                                 rte_memcpy(addr, buf->entry[0].pattern,
 335                                            user_pattern_size);
 336                                 addr = (void *)(((uintptr_t)addr) +
 337                                                 user_pattern_size);
 338                                 rte_memcpy(addr, &missed_item,
 339                                            missed * sizeof(*item));
 340                                 addr = (void *)(((uintptr_t)addr) +
 341                                         missed * sizeof(*item));
 342                                 rte_memcpy(addr, flow_items, n);
 343                                 addr = (void *)(((uintptr_t)addr) + n);
 344                         }
 345                 }
 346                 /* Go deeper. */
 347                 if (node->next) {
 348                         next_node = node->next;
 349                         if (stack_pos++ == elt_n) {
 350                                 rte_errno = E2BIG;
 351                                 return -rte_errno;
 352                         }
 353                         stack[stack_pos] = next_node;
 354                 } else if (*(next_node + 1)) {
 355                         /* Follow up with the next possibility. */
 356                         ++next_node;
 357                 } else {
 358                         /* Move to the next path. */
 359                         if (stack_pos)
 360                                 next_node = stack[--stack_pos];
 361                         next_node++;
 362                         stack[stack_pos] = next_node;
 363                 }
 364                 node = *next_node ? &graph[*next_node] : NULL;
 365         };
 366         /* no expanded flows but we have missed item, create one rule for it */
 367         if (buf->entries == 1 && missed != 0) {
 368                 elt = 2;
 369                 lsize += elt * sizeof(*item) + user_pattern_size;
 370                 if (lsize <= size) {
 371                         buf->entry[buf->entries].priority = 1;
 372                         buf->entry[buf->entries].pattern = addr;
 373                         buf->entries++;
 374                         flow_items[0].type = missed_item.type;
 375                         flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 376                         rte_memcpy(addr, buf->entry[0].pattern,
 377                                    user_pattern_size);
 378                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 379                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 380                         addr = (void *)(((uintptr_t)addr) +
 381                                         elt * sizeof(*item));
 382                 }
 383         }
 384         return lsize;
 385 }
 386
 387 enum mlx5_expansion {
 388         MLX5_EXPANSION_ROOT,
 389         MLX5_EXPANSION_ROOT_OUTER,
 390         MLX5_EXPANSION_ROOT_ETH_VLAN,
 391         MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
 392         MLX5_EXPANSION_OUTER_ETH,
 393         MLX5_EXPANSION_OUTER_ETH_VLAN,
 394         MLX5_EXPANSION_OUTER_VLAN,
 395         MLX5_EXPANSION_OUTER_IPV4,
 396         MLX5_EXPANSION_OUTER_IPV4_UDP,
 397         MLX5_EXPANSION_OUTER_IPV4_TCP,
 398         MLX5_EXPANSION_OUTER_IPV6,
 399         MLX5_EXPANSION_OUTER_IPV6_UDP,
 400         MLX5_EXPANSION_OUTER_IPV6_TCP,
 401         MLX5_EXPANSION_VXLAN,
 402         MLX5_EXPANSION_VXLAN_GPE,
 403         MLX5_EXPANSION_GRE,
 404         MLX5_EXPANSION_MPLS,
 405         MLX5_EXPANSION_ETH,
 406         MLX5_EXPANSION_ETH_VLAN,
 407         MLX5_EXPANSION_VLAN,
 408         MLX5_EXPANSION_IPV4,
 409         MLX5_EXPANSION_IPV4_UDP,
 410         MLX5_EXPANSION_IPV4_TCP,
 411         MLX5_EXPANSION_IPV6,
 412         MLX5_EXPANSION_IPV6_UDP,
 413         MLX5_EXPANSION_IPV6_TCP,
 414 };
 415
 416 /** Supported expansion of items. */
 417 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
 418         [MLX5_EXPANSION_ROOT] = {
 419                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 420                                                   MLX5_EXPANSION_IPV4,
 421                                                   MLX5_EXPANSION_IPV6),
 422                 .type = RTE_FLOW_ITEM_TYPE_END,
 423         },
 424         [MLX5_EXPANSION_ROOT_OUTER] = {
 425                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
 426                                                   MLX5_EXPANSION_OUTER_IPV4,
 427                                                   MLX5_EXPANSION_OUTER_IPV6),
 428                 .type = RTE_FLOW_ITEM_TYPE_END,
 429         },
 430         [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
 431                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
 432                 .type = RTE_FLOW_ITEM_TYPE_END,
 433         },
 434         [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
 435                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 436                                                 (MLX5_EXPANSION_OUTER_ETH_VLAN),
 437                 .type = RTE_FLOW_ITEM_TYPE_END,
 438         },
 439         [MLX5_EXPANSION_OUTER_ETH] = {
 440                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 441                                                   MLX5_EXPANSION_OUTER_IPV6,
 442                                                   MLX5_EXPANSION_MPLS),
 443                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 444                 .rss_types = 0,
 445         },
 446         [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
 447                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 448                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 449                 .rss_types = 0,
 450         },
 451         [MLX5_EXPANSION_OUTER_VLAN] = {
 452                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 453                                                   MLX5_EXPANSION_OUTER_IPV6),
 454                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 455         },
 456         [MLX5_EXPANSION_OUTER_IPV4] = {
 457                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 458                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 459                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 460                          MLX5_EXPANSION_GRE,
 461                          MLX5_EXPANSION_IPV4,
 462                          MLX5_EXPANSION_IPV6),
 463                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 464                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 465                         ETH_RSS_NONFRAG_IPV4_OTHER,
 466         },
 467         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 468                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 469                                                   MLX5_EXPANSION_VXLAN_GPE),
 470                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 471                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 472         },
 473         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 474                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 475                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 476         },
 477         [MLX5_EXPANSION_OUTER_IPV6] = {
 478                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 479                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 480                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 481                          MLX5_EXPANSION_IPV4,
 482                          MLX5_EXPANSION_IPV6),
 483                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 484                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 485                         ETH_RSS_NONFRAG_IPV6_OTHER,
 486         },
 487         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 488                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 489                                                   MLX5_EXPANSION_VXLAN_GPE),
 490                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 491                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 492         },
 493         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 494                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 495                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 496         },
 497         [MLX5_EXPANSION_VXLAN] = {
 498                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 499                                                   MLX5_EXPANSION_IPV4,
 500                                                   MLX5_EXPANSION_IPV6),
 501                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 502         },
 503         [MLX5_EXPANSION_VXLAN_GPE] = {
 504                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 505                                                   MLX5_EXPANSION_IPV4,
 506                                                   MLX5_EXPANSION_IPV6),
 507                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 508         },
 509         [MLX5_EXPANSION_GRE] = {
 510                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4),
 511                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 512         },
 513         [MLX5_EXPANSION_MPLS] = {
 514                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 515                                                   MLX5_EXPANSION_IPV6),
 516                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 517         },
 518         [MLX5_EXPANSION_ETH] = {
 519                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 520                                                   MLX5_EXPANSION_IPV6),
 521                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 522         },
 523         [MLX5_EXPANSION_ETH_VLAN] = {
 524                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 525                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 526         },
 527         [MLX5_EXPANSION_VLAN] = {
 528                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 529                                                   MLX5_EXPANSION_IPV6),
 530                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 531         },
 532         [MLX5_EXPANSION_IPV4] = {
 533                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 534                                                   MLX5_EXPANSION_IPV4_TCP),
 535                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 536                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 537                         ETH_RSS_NONFRAG_IPV4_OTHER,
 538         },
 539         [MLX5_EXPANSION_IPV4_UDP] = {
 540                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 541                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 542         },
 543         [MLX5_EXPANSION_IPV4_TCP] = {
 544                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 545                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 546         },
 547         [MLX5_EXPANSION_IPV6] = {
 548                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 549                                                   MLX5_EXPANSION_IPV6_TCP),
 550                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 551                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 552                         ETH_RSS_NONFRAG_IPV6_OTHER,
 553         },
 554         [MLX5_EXPANSION_IPV6_UDP] = {
 555                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 556                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 557         },
 558         [MLX5_EXPANSION_IPV6_TCP] = {
 559                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 560                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 561         },
 562 };
 563
 564 static struct rte_flow_shared_action *
 565 mlx5_shared_action_create(struct rte_eth_dev *dev,
 566                           const struct rte_flow_shared_action_conf *conf,
 567                           const struct rte_flow_action *action,
 568                           struct rte_flow_error *error);
 569 static int mlx5_shared_action_destroy
 570                                 (struct rte_eth_dev *dev,
 571                                  struct rte_flow_shared_action *shared_action,
 572                                  struct rte_flow_error *error);
 573 static int mlx5_shared_action_update
 574                                 (struct rte_eth_dev *dev,
 575                                  struct rte_flow_shared_action *shared_action,
 576                                  const struct rte_flow_action *action,
 577                                  struct rte_flow_error *error);
 578 static int mlx5_shared_action_query
 579                                 (struct rte_eth_dev *dev,
 580                                  const struct rte_flow_shared_action *action,
 581                                  void *data,
 582                                  struct rte_flow_error *error);
 583 static inline bool
 584 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev,
 585                           struct rte_flow_tunnel *tunnel,
 586                           const char *err_msg)
 587 {
 588         err_msg = NULL;
 589         if (!is_tunnel_offload_active(dev)) {
 590                 err_msg = "tunnel offload was not activated";
 591                 goto out;
 592         } else if (!tunnel) {
 593                 err_msg = "no application tunnel";
 594                 goto out;
 595         }
 596
 597         switch (tunnel->type) {
 598         default:
 599                 err_msg = "unsupported tunnel type";
 600                 goto out;
 601         case RTE_FLOW_ITEM_TYPE_VXLAN:
 602                 break;
 603         }
 604
 605 out:
 606         return !err_msg;
 607 }
 608
 609
 610 static int
 611 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
 612                     struct rte_flow_tunnel *app_tunnel,
 613                     struct rte_flow_action **actions,
 614                     uint32_t *num_of_actions,
 615                     struct rte_flow_error *error)
 616 {
 617         int ret;
 618         struct mlx5_flow_tunnel *tunnel;
 619         const char *err_msg = NULL;
 620         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
 621
 622         if (!verdict)
 623                 return rte_flow_error_set(error, EINVAL,
 624                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
 625                                           err_msg);
 626         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
 627         if (ret < 0) {
 628                 return rte_flow_error_set(error, ret,
 629                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
 630                                           "failed to initialize pmd tunnel");
 631         }
 632         *actions = &tunnel->action;
 633         *num_of_actions = 1;
 634         return 0;
 635 }
 636
 637 static int
 638 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
 639                        struct rte_flow_tunnel *app_tunnel,
 640                        struct rte_flow_item **items,
 641                        uint32_t *num_of_items,
 642                        struct rte_flow_error *error)
 643 {
 644         int ret;
 645         struct mlx5_flow_tunnel *tunnel;
 646         const char *err_msg = NULL;
 647         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
 648
 649         if (!verdict)
 650                 return rte_flow_error_set(error, EINVAL,
 651                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
 652                                           err_msg);
 653         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
 654         if (ret < 0) {
 655                 return rte_flow_error_set(error, ret,
 656                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
 657                                           "failed to initialize pmd tunnel");
 658         }
 659         *items = &tunnel->item;
 660         *num_of_items = 1;
 661         return 0;
 662 }
 663
 664 static int
 665 mlx5_flow_item_release(struct rte_eth_dev *dev,
 666                        struct rte_flow_item *pmd_items,
 667                        uint32_t num_items, struct rte_flow_error *err)
 668 {
 669         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
 670         struct mlx5_flow_tunnel *tun;
 671
 672         rte_spinlock_lock(&thub->sl);
 673         LIST_FOREACH(tun, &thub->tunnels, chain) {
 674                 if (&tun->item == pmd_items) {
 675                         LIST_REMOVE(tun, chain);
 676                         break;
 677                 }
 678         }
 679         rte_spinlock_unlock(&thub->sl);
 680         if (!tun || num_items != 1)
 681                 return rte_flow_error_set(err, EINVAL,
 682                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
 683                                           "invalid argument");
 684         if (!__atomic_sub_fetch(&tun->refctn, 1, __ATOMIC_RELAXED))
 685                 mlx5_flow_tunnel_free(dev, tun);
 686         return 0;
 687 }
 688
 689 static int
 690 mlx5_flow_action_release(struct rte_eth_dev *dev,
 691                          struct rte_flow_action *pmd_actions,
 692                          uint32_t num_actions, struct rte_flow_error *err)
 693 {
 694         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
 695         struct mlx5_flow_tunnel *tun;
 696
 697         rte_spinlock_lock(&thub->sl);
 698         LIST_FOREACH(tun, &thub->tunnels, chain) {
 699                 if (&tun->action == pmd_actions) {
 700                         LIST_REMOVE(tun, chain);
 701                         break;
 702                 }
 703         }
 704         rte_spinlock_unlock(&thub->sl);
 705         if (!tun || num_actions != 1)
 706                 return rte_flow_error_set(err, EINVAL,
 707                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
 708                                           "invalid argument");
 709         if (!__atomic_sub_fetch(&tun->refctn, 1, __ATOMIC_RELAXED))
 710                 mlx5_flow_tunnel_free(dev, tun);
 711
 712         return 0;
 713 }
 714
 715 static int
 716 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
 717                                   struct rte_mbuf *m,
 718                                   struct rte_flow_restore_info *info,
 719                                   struct rte_flow_error *err)
 720 {
 721         uint64_t ol_flags = m->ol_flags;
 722         const struct mlx5_flow_tbl_data_entry *tble;
 723         const uint64_t mask = PKT_RX_FDIR | PKT_RX_FDIR_ID;
 724
 725         if ((ol_flags & mask) != mask)
 726                 goto err;
 727         tble = tunnel_mark_decode(dev, m->hash.fdir.hi);
 728         if (!tble) {
 729                 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x",
 730                         dev->data->port_id, m->hash.fdir.hi);
 731                 goto err;
 732         }
 733         MLX5_ASSERT(tble->tunnel);
 734         memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel));
 735         info->group_id = tble->group_id;
 736         info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL |
 737                       RTE_FLOW_RESTORE_INFO_GROUP_ID |
 738                       RTE_FLOW_RESTORE_INFO_ENCAPSULATED;
 739
 740         return 0;
 741
 742 err:
 743         return rte_flow_error_set(err, EINVAL,
 744                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
 745                                   "failed to get restore info");
 746 }
 747
 748 static const struct rte_flow_ops mlx5_flow_ops = {
 749         .validate = mlx5_flow_validate,
 750         .create = mlx5_flow_create,
 751         .destroy = mlx5_flow_destroy,
 752         .flush = mlx5_flow_flush,
 753         .isolate = mlx5_flow_isolate,
 754         .query = mlx5_flow_query,
 755         .dev_dump = mlx5_flow_dev_dump,
 756         .get_aged_flows = mlx5_flow_get_aged_flows,
 757         .shared_action_create = mlx5_shared_action_create,
 758         .shared_action_destroy = mlx5_shared_action_destroy,
 759         .shared_action_update = mlx5_shared_action_update,
 760         .shared_action_query = mlx5_shared_action_query,
 761         .tunnel_decap_set = mlx5_flow_tunnel_decap_set,
 762         .tunnel_match = mlx5_flow_tunnel_match,
 763         .tunnel_action_decap_release = mlx5_flow_action_release,
 764         .tunnel_item_release = mlx5_flow_item_release,
 765         .get_restore_info = mlx5_flow_tunnel_get_restore_info,
 766 };
 767
 768 /* Tunnel information. */
 769 struct mlx5_flow_tunnel_info {
 770         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 771         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 772 };
 773
 774 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 775         {
 776                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 777                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 778         },
 779         {
 780                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
 781                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
 782         },
 783         {
 784                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 785                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 786         },
 787         {
 788                 .tunnel = MLX5_FLOW_LAYER_GRE,
 789                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 790         },
 791         {
 792                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 793                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 794         },
 795         {
 796                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 797                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 798         },
 799         {
 800                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 801                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 802         },
 803         {
 804                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 805                 .ptype = RTE_PTYPE_TUNNEL_IP,
 806         },
 807         {
 808                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 809                 .ptype = RTE_PTYPE_TUNNEL_IP,
 810         },
 811         {
 812                 .tunnel = MLX5_FLOW_LAYER_GTP,
 813                 .ptype = RTE_PTYPE_TUNNEL_GTPU,
 814         },
 815 };
 816
 817 /* Key of thread specific flow workspace data. */
 818 static pthread_key_t key_workspace;
 819
 820 /* Thread specific flow workspace data once initialization data. */
 821 static pthread_once_t key_workspace_init;
 822
 823
 824 /**
 825  * Translate tag ID to register.
 826  *
 827  * @param[in] dev
 828  *   Pointer to the Ethernet device structure.
 829  * @param[in] feature
 830  *   The feature that request the register.
 831  * @param[in] id
 832  *   The request register ID.
 833  * @param[out] error
 834  *   Error description in case of any.
 835  *
 836  * @return
 837  *   The request register on success, a negative errno
 838  *   value otherwise and rte_errno is set.
 839  */
 840 int
 841 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 842                      enum mlx5_feature_name feature,
 843                      uint32_t id,
 844                      struct rte_flow_error *error)
 845 {
 846         struct mlx5_priv *priv = dev->data->dev_private;
 847         struct mlx5_dev_config *config = &priv->config;
 848         enum modify_reg start_reg;
 849         bool skip_mtr_reg = false;
 850
 851         switch (feature) {
 852         case MLX5_HAIRPIN_RX:
 853                 return REG_B;
 854         case MLX5_HAIRPIN_TX:
 855                 return REG_A;
 856         case MLX5_METADATA_RX:
 857                 switch (config->dv_xmeta_en) {
 858                 case MLX5_XMETA_MODE_LEGACY:
 859                         return REG_B;
 860                 case MLX5_XMETA_MODE_META16:
 861                         return REG_C_0;
 862                 case MLX5_XMETA_MODE_META32:
 863                         return REG_C_1;
 864                 }
 865                 break;
 866         case MLX5_METADATA_TX:
 867                 return REG_A;
 868         case MLX5_METADATA_FDB:
 869                 switch (config->dv_xmeta_en) {
 870                 case MLX5_XMETA_MODE_LEGACY:
 871                         return REG_NON;
 872                 case MLX5_XMETA_MODE_META16:
 873                         return REG_C_0;
 874                 case MLX5_XMETA_MODE_META32:
 875                         return REG_C_1;
 876                 }
 877                 break;
 878         case MLX5_FLOW_MARK:
 879                 switch (config->dv_xmeta_en) {
 880                 case MLX5_XMETA_MODE_LEGACY:
 881                         return REG_NON;
 882                 case MLX5_XMETA_MODE_META16:
 883                         return REG_C_1;
 884                 case MLX5_XMETA_MODE_META32:
 885                         return REG_C_0;
 886                 }
 887                 break;
 888         case MLX5_MTR_SFX:
 889                 /*
 890                  * If meter color and flow match share one register, flow match
 891                  * should use the meter color register for match.
 892                  */
 893                 if (priv->mtr_reg_share)
 894                         return priv->mtr_color_reg;
 895                 else
 896                         return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 897                                REG_C_3;
 898         case MLX5_MTR_COLOR:
 899                 MLX5_ASSERT(priv->mtr_color_reg != REG_NON);
 900                 return priv->mtr_color_reg;
 901         case MLX5_COPY_MARK:
 902                 /*
 903                  * Metadata COPY_MARK register using is in meter suffix sub
 904                  * flow while with meter. It's safe to share the same register.
 905                  */
 906                 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
 907         case MLX5_APP_TAG:
 908                 /*
 909                  * If meter is enable, it will engage the register for color
 910                  * match and flow match. If meter color match is not using the
 911                  * REG_C_2, need to skip the REG_C_x be used by meter color
 912                  * match.
 913                  * If meter is disable, free to use all available registers.
 914                  */
 915                 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 916                             (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
 917                 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
 918                 if (id > (REG_C_7 - start_reg))
 919                         return rte_flow_error_set(error, EINVAL,
 920                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 921                                                   NULL, "invalid tag id");
 922                 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON)
 923                         return rte_flow_error_set(error, ENOTSUP,
 924                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 925                                                   NULL, "unsupported tag id");
 926                 /*
 927                  * This case means meter is using the REG_C_x great than 2.
 928                  * Take care not to conflict with meter color REG_C_x.
 929                  * If the available index REG_C_y >= REG_C_x, skip the
 930                  * color register.
 931                  */
 932                 if (skip_mtr_reg && config->flow_mreg_c
 933                     [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
 934                         if (id >= (REG_C_7 - start_reg))
 935                                 return rte_flow_error_set(error, EINVAL,
 936                                                        RTE_FLOW_ERROR_TYPE_ITEM,
 937                                                         NULL, "invalid tag id");
 938                         if (config->flow_mreg_c
 939                             [id + 1 + start_reg - REG_C_0] != REG_NON)
 940                                 return config->flow_mreg_c
 941                                                [id + 1 + start_reg - REG_C_0];
 942                         return rte_flow_error_set(error, ENOTSUP,
 943                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 944                                                   NULL, "unsupported tag id");
 945                 }
 946                 return config->flow_mreg_c[id + start_reg - REG_C_0];
 947         }
 948         MLX5_ASSERT(false);
 949         return rte_flow_error_set(error, EINVAL,
 950                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 951                                   NULL, "invalid feature name");
 952 }
 953
 954 /**
 955  * Check extensive flow metadata register support.
 956  *
 957  * @param dev
 958  *   Pointer to rte_eth_dev structure.
 959  *
 960  * @return
 961  *   True if device supports extensive flow metadata register, otherwise false.
 962  */
 963 bool
 964 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
 965 {
 966         struct mlx5_priv *priv = dev->data->dev_private;
 967         struct mlx5_dev_config *config = &priv->config;
 968
 969         /*
 970          * Having available reg_c can be regarded inclusively as supporting
 971          * extensive flow metadata register, which could mean,
 972          * - metadata register copy action by modify header.
 973          * - 16 modify header actions is supported.
 974          * - reg_c's are preserved across different domain (FDB and NIC) on
 975          *   packet loopback by flow lookup miss.
 976          */
 977         return config->flow_mreg_c[2] != REG_NON;
 978 }
 979
 980 /**
 981  * Verify the @p item specifications (spec, last, mask) are compatible with the
 982  * NIC capabilities.
 983  *
 984  * @param[in] item
 985  *   Item specification.
 986  * @param[in] mask
 987  *   @p item->mask or flow default bit-masks.
 988  * @param[in] nic_mask
 989  *   Bit-masks covering supported fields by the NIC to compare with user mask.
 990  * @param[in] size
 991  *   Bit-masks size in bytes.
 992  * @param[in] range_accepted
 993  *   True if range of values is accepted for specific fields, false otherwise.
 994  * @param[out] error
 995  *   Pointer to error structure.
 996  *
 997  * @return
 998  *   0 on success, a negative errno value otherwise and rte_errno is set.
 999  */
1000 int
1001 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
1002                           const uint8_t *mask,
1003                           const uint8_t *nic_mask,
1004                           unsigned int size,
1005                           bool range_accepted,
1006                           struct rte_flow_error *error)
1007 {
1008         unsigned int i;
1009
1010         MLX5_ASSERT(nic_mask);
1011         for (i = 0; i < size; ++i)
1012                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
1013                         return rte_flow_error_set(error, ENOTSUP,
1014                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1015                                                   item,
1016                                                   "mask enables non supported"
1017                                                   " bits");
1018         if (!item->spec && (item->mask || item->last))
1019                 return rte_flow_error_set(error, EINVAL,
1020                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1021                                           "mask/last without a spec is not"
1022                                           " supported");
1023         if (item->spec && item->last && !range_accepted) {
1024                 uint8_t spec[size];
1025                 uint8_t last[size];
1026                 unsigned int i;
1027                 int ret;
1028
1029                 for (i = 0; i < size; ++i) {
1030                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
1031                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
1032                 }
1033                 ret = memcmp(spec, last, size);
1034                 if (ret != 0)
1035                         return rte_flow_error_set(error, EINVAL,
1036                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1037                                                   item,
1038                                                   "range is not valid");
1039         }
1040         return 0;
1041 }
1042
1043 /**
1044  * Adjust the hash fields according to the @p flow information.
1045  *
1046  * @param[in] dev_flow.
1047  *   Pointer to the mlx5_flow.
1048  * @param[in] tunnel
1049  *   1 when the hash field is for a tunnel item.
1050  * @param[in] layer_types
1051  *   ETH_RSS_* types.
1052  * @param[in] hash_fields
1053  *   Item hash fields.
1054  *
1055  * @return
1056  *   The hash fields that should be used.
1057  */
1058 uint64_t
1059 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc,
1060                             int tunnel __rte_unused, uint64_t layer_types,
1061                             uint64_t hash_fields)
1062 {
1063 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1064         int rss_request_inner = rss_desc->level >= 2;
1065
1066         /* Check RSS hash level for tunnel. */
1067         if (tunnel && rss_request_inner)
1068                 hash_fields |= IBV_RX_HASH_INNER;
1069         else if (tunnel || rss_request_inner)
1070                 return 0;
1071 #endif
1072         /* Check if requested layer matches RSS hash fields. */
1073         if (!(rss_desc->types & layer_types))
1074                 return 0;
1075         return hash_fields;
1076 }
1077
1078 /**
1079  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
1080  * if several tunnel rules are used on this queue, the tunnel ptype will be
1081  * cleared.
1082  *
1083  * @param rxq_ctrl
1084  *   Rx queue to update.
1085  */
1086 static void
1087 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
1088 {
1089         unsigned int i;
1090         uint32_t tunnel_ptype = 0;
1091
1092         /* Look up for the ptype to use. */
1093         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
1094                 if (!rxq_ctrl->flow_tunnels_n[i])
1095                         continue;
1096                 if (!tunnel_ptype) {
1097                         tunnel_ptype = tunnels_info[i].ptype;
1098                 } else {
1099                         tunnel_ptype = 0;
1100                         break;
1101                 }
1102         }
1103         rxq_ctrl->rxq.tunnel = tunnel_ptype;
1104 }
1105
1106 /**
1107  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
1108  * flow.
1109  *
1110  * @param[in] dev
1111  *   Pointer to the Ethernet device structure.
1112  * @param[in] dev_handle
1113  *   Pointer to device flow handle structure.
1114  */
1115 static void
1116 flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
1117                        struct mlx5_flow_handle *dev_handle)
1118 {
1119         struct mlx5_priv *priv = dev->data->dev_private;
1120         const int mark = dev_handle->mark;
1121         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1122         struct mlx5_hrxq *hrxq;
1123         unsigned int i;
1124
1125         if (dev_handle->fate_action != MLX5_FLOW_FATE_QUEUE)
1126                 return;
1127         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1128                               dev_handle->rix_hrxq);
1129         if (!hrxq)
1130                 return;
1131         for (i = 0; i != hrxq->ind_table->queues_n; ++i) {
1132                 int idx = hrxq->ind_table->queues[i];
1133                 struct mlx5_rxq_ctrl *rxq_ctrl =
1134                         container_of((*priv->rxqs)[idx],
1135                                      struct mlx5_rxq_ctrl, rxq);
1136
1137                 /*
1138                  * To support metadata register copy on Tx loopback,
1139                  * this must be always enabled (metadata may arive
1140                  * from other port - not from local flows only.
1141                  */
1142                 if (priv->config.dv_flow_en &&
1143                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1144                     mlx5_flow_ext_mreg_supported(dev)) {
1145                         rxq_ctrl->rxq.mark = 1;
1146                         rxq_ctrl->flow_mark_n = 1;
1147                 } else if (mark) {
1148                         rxq_ctrl->rxq.mark = 1;
1149                         rxq_ctrl->flow_mark_n++;
1150                 }
1151                 if (tunnel) {
1152                         unsigned int j;
1153
1154                         /* Increase the counter matching the flow. */
1155                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1156                                 if ((tunnels_info[j].tunnel &
1157                                      dev_handle->layers) ==
1158                                     tunnels_info[j].tunnel) {
1159                                         rxq_ctrl->flow_tunnels_n[j]++;
1160                                         break;
1161                                 }
1162                         }
1163                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1164                 }
1165         }
1166 }
1167
1168 /**
1169  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
1170  *
1171  * @param[in] dev
1172  *   Pointer to the Ethernet device structure.
1173  * @param[in] flow
1174  *   Pointer to flow structure.
1175  */
1176 static void
1177 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
1178 {
1179         struct mlx5_priv *priv = dev->data->dev_private;
1180         uint32_t handle_idx;
1181         struct mlx5_flow_handle *dev_handle;
1182
1183         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1184                        handle_idx, dev_handle, next)
1185                 flow_drv_rxq_flags_set(dev, dev_handle);
1186 }
1187
1188 /**
1189  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1190  * device flow if no other flow uses it with the same kind of request.
1191  *
1192  * @param dev
1193  *   Pointer to Ethernet device.
1194  * @param[in] dev_handle
1195  *   Pointer to the device flow handle structure.
1196  */
1197 static void
1198 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev,
1199                         struct mlx5_flow_handle *dev_handle)
1200 {
1201         struct mlx5_priv *priv = dev->data->dev_private;
1202         const int mark = dev_handle->mark;
1203         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1204         struct mlx5_hrxq *hrxq;
1205         unsigned int i;
1206
1207         if (dev_handle->fate_action != MLX5_FLOW_FATE_QUEUE)
1208                 return;
1209         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1210                               dev_handle->rix_hrxq);
1211         if (!hrxq)
1212                 return;
1213         MLX5_ASSERT(dev->data->dev_started);
1214         for (i = 0; i != hrxq->ind_table->queues_n; ++i) {
1215                 int idx = hrxq->ind_table->queues[i];
1216                 struct mlx5_rxq_ctrl *rxq_ctrl =
1217                         container_of((*priv->rxqs)[idx],
1218                                      struct mlx5_rxq_ctrl, rxq);
1219
1220                 if (priv->config.dv_flow_en &&
1221                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1222                     mlx5_flow_ext_mreg_supported(dev)) {
1223                         rxq_ctrl->rxq.mark = 1;
1224                         rxq_ctrl->flow_mark_n = 1;
1225                 } else if (mark) {
1226                         rxq_ctrl->flow_mark_n--;
1227                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
1228                 }
1229                 if (tunnel) {
1230                         unsigned int j;
1231
1232                         /* Decrease the counter matching the flow. */
1233                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1234                                 if ((tunnels_info[j].tunnel &
1235                                      dev_handle->layers) ==
1236                                     tunnels_info[j].tunnel) {
1237                                         rxq_ctrl->flow_tunnels_n[j]--;
1238                                         break;
1239                                 }
1240                         }
1241                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1242                 }
1243         }
1244 }
1245
1246 /**
1247  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1248  * @p flow if no other flow uses it with the same kind of request.
1249  *
1250  * @param dev
1251  *   Pointer to Ethernet device.
1252  * @param[in] flow
1253  *   Pointer to the flow.
1254  */
1255 static void
1256 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
1257 {
1258         struct mlx5_priv *priv = dev->data->dev_private;
1259         uint32_t handle_idx;
1260         struct mlx5_flow_handle *dev_handle;
1261
1262         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1263                        handle_idx, dev_handle, next)
1264                 flow_drv_rxq_flags_trim(dev, dev_handle);
1265 }
1266
1267 /**
1268  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
1269  *
1270  * @param dev
1271  *   Pointer to Ethernet device.
1272  */
1273 static void
1274 flow_rxq_flags_clear(struct rte_eth_dev *dev)
1275 {
1276         struct mlx5_priv *priv = dev->data->dev_private;
1277         unsigned int i;
1278
1279         for (i = 0; i != priv->rxqs_n; ++i) {
1280                 struct mlx5_rxq_ctrl *rxq_ctrl;
1281                 unsigned int j;
1282
1283                 if (!(*priv->rxqs)[i])
1284                         continue;
1285                 rxq_ctrl = container_of((*priv->rxqs)[i],
1286                                         struct mlx5_rxq_ctrl, rxq);
1287                 rxq_ctrl->flow_mark_n = 0;
1288                 rxq_ctrl->rxq.mark = 0;
1289                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
1290                         rxq_ctrl->flow_tunnels_n[j] = 0;
1291                 rxq_ctrl->rxq.tunnel = 0;
1292         }
1293 }
1294
1295 /**
1296  * Set the Rx queue dynamic metadata (mask and offset) for a flow
1297  *
1298  * @param[in] dev
1299  *   Pointer to the Ethernet device structure.
1300  */
1301 void
1302 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev)
1303 {
1304         struct mlx5_priv *priv = dev->data->dev_private;
1305         struct mlx5_rxq_data *data;
1306         unsigned int i;
1307
1308         for (i = 0; i != priv->rxqs_n; ++i) {
1309                 if (!(*priv->rxqs)[i])
1310                         continue;
1311                 data = (*priv->rxqs)[i];
1312                 if (!rte_flow_dynf_metadata_avail()) {
1313                         data->dynf_meta = 0;
1314                         data->flow_meta_mask = 0;
1315                         data->flow_meta_offset = -1;
1316                 } else {
1317                         data->dynf_meta = 1;
1318                         data->flow_meta_mask = rte_flow_dynf_metadata_mask;
1319                         data->flow_meta_offset = rte_flow_dynf_metadata_offs;
1320                 }
1321         }
1322 }
1323
1324 /*
1325  * return a pointer to the desired action in the list of actions.
1326  *
1327  * @param[in] actions
1328  *   The list of actions to search the action in.
1329  * @param[in] action
1330  *   The action to find.
1331  *
1332  * @return
1333  *   Pointer to the action in the list, if found. NULL otherwise.
1334  */
1335 const struct rte_flow_action *
1336 mlx5_flow_find_action(const struct rte_flow_action *actions,
1337                       enum rte_flow_action_type action)
1338 {
1339         if (actions == NULL)
1340                 return NULL;
1341         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
1342                 if (actions->type == action)
1343                         return actions;
1344         return NULL;
1345 }
1346
1347 /*
1348  * Validate the flag action.
1349  *
1350  * @param[in] action_flags
1351  *   Bit-fields that holds the actions detected until now.
1352  * @param[in] attr
1353  *   Attributes of flow that includes this action.
1354  * @param[out] error
1355  *   Pointer to error structure.
1356  *
1357  * @return
1358  *   0 on success, a negative errno value otherwise and rte_errno is set.
1359  */
1360 int
1361 mlx5_flow_validate_action_flag(uint64_t action_flags,
1362                                const struct rte_flow_attr *attr,
1363                                struct rte_flow_error *error)
1364 {
1365         if (action_flags & MLX5_FLOW_ACTION_MARK)
1366                 return rte_flow_error_set(error, EINVAL,
1367                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1368                                           "can't mark and flag in same flow");
1369         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1370                 return rte_flow_error_set(error, EINVAL,
1371                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1372                                           "can't have 2 flag"
1373                                           " actions in same flow");
1374         if (attr->egress)
1375                 return rte_flow_error_set(error, ENOTSUP,
1376                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1377                                           "flag action not supported for "
1378                                           "egress");
1379         return 0;
1380 }
1381
1382 /*
1383  * Validate the mark action.
1384  *
1385  * @param[in] action
1386  *   Pointer to the queue action.
1387  * @param[in] action_flags
1388  *   Bit-fields that holds the actions detected until now.
1389  * @param[in] attr
1390  *   Attributes of flow that includes this action.
1391  * @param[out] error
1392  *   Pointer to error structure.
1393  *
1394  * @return
1395  *   0 on success, a negative errno value otherwise and rte_errno is set.
1396  */
1397 int
1398 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
1399                                uint64_t action_flags,
1400                                const struct rte_flow_attr *attr,
1401                                struct rte_flow_error *error)
1402 {
1403         const struct rte_flow_action_mark *mark = action->conf;
1404
1405         if (!mark)
1406                 return rte_flow_error_set(error, EINVAL,
1407                                           RTE_FLOW_ERROR_TYPE_ACTION,
1408                                           action,
1409                                           "configuration cannot be null");
1410         if (mark->id >= MLX5_FLOW_MARK_MAX)
1411                 return rte_flow_error_set(error, EINVAL,
1412                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1413                                           &mark->id,
1414                                           "mark id must in 0 <= id < "
1415                                           RTE_STR(MLX5_FLOW_MARK_MAX));
1416         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1417                 return rte_flow_error_set(error, EINVAL,
1418                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1419                                           "can't flag and mark in same flow");
1420         if (action_flags & MLX5_FLOW_ACTION_MARK)
1421                 return rte_flow_error_set(error, EINVAL,
1422                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1423                                           "can't have 2 mark actions in same"
1424                                           " flow");
1425         if (attr->egress)
1426                 return rte_flow_error_set(error, ENOTSUP,
1427                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1428                                           "mark action not supported for "
1429                                           "egress");
1430         return 0;
1431 }
1432
1433 /*
1434  * Validate the drop action.
1435  *
1436  * @param[in] action_flags
1437  *   Bit-fields that holds the actions detected until now.
1438  * @param[in] attr
1439  *   Attributes of flow that includes this action.
1440  * @param[out] error
1441  *   Pointer to error structure.
1442  *
1443  * @return
1444  *   0 on success, a negative errno value otherwise and rte_errno is set.
1445  */
1446 int
1447 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1448                                const struct rte_flow_attr *attr,
1449                                struct rte_flow_error *error)
1450 {
1451         if (attr->egress)
1452                 return rte_flow_error_set(error, ENOTSUP,
1453                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1454                                           "drop action not supported for "
1455                                           "egress");
1456         return 0;
1457 }
1458
1459 /*
1460  * Validate the queue action.
1461  *
1462  * @param[in] action
1463  *   Pointer to the queue action.
1464  * @param[in] action_flags
1465  *   Bit-fields that holds the actions detected until now.
1466  * @param[in] dev
1467  *   Pointer to the Ethernet device structure.
1468  * @param[in] attr
1469  *   Attributes of flow that includes this action.
1470  * @param[out] error
1471  *   Pointer to error structure.
1472  *
1473  * @return
1474  *   0 on success, a negative errno value otherwise and rte_errno is set.
1475  */
1476 int
1477 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1478                                 uint64_t action_flags,
1479                                 struct rte_eth_dev *dev,
1480                                 const struct rte_flow_attr *attr,
1481                                 struct rte_flow_error *error)
1482 {
1483         struct mlx5_priv *priv = dev->data->dev_private;
1484         const struct rte_flow_action_queue *queue = action->conf;
1485
1486         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1487                 return rte_flow_error_set(error, EINVAL,
1488                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1489                                           "can't have 2 fate actions in"
1490                                           " same flow");
1491         if (!priv->rxqs_n)
1492                 return rte_flow_error_set(error, EINVAL,
1493                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1494                                           NULL, "No Rx queues configured");
1495         if (queue->index >= priv->rxqs_n)
1496                 return rte_flow_error_set(error, EINVAL,
1497                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1498                                           &queue->index,
1499                                           "queue index out of range");
1500         if (!(*priv->rxqs)[queue->index])
1501                 return rte_flow_error_set(error, EINVAL,
1502                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1503                                           &queue->index,
1504                                           "queue is not configured");
1505         if (attr->egress)
1506                 return rte_flow_error_set(error, ENOTSUP,
1507                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1508                                           "queue action not supported for "
1509                                           "egress");
1510         return 0;
1511 }
1512
1513 /*
1514  * Validate the rss action.
1515  *
1516  * @param[in] dev
1517  *   Pointer to the Ethernet device structure.
1518  * @param[in] action
1519  *   Pointer to the queue action.
1520  * @param[out] error
1521  *   Pointer to error structure.
1522  *
1523  * @return
1524  *   0 on success, a negative errno value otherwise and rte_errno is set.
1525  */
1526 int
1527 mlx5_validate_action_rss(struct rte_eth_dev *dev,
1528                          const struct rte_flow_action *action,
1529                          struct rte_flow_error *error)
1530 {
1531         struct mlx5_priv *priv = dev->data->dev_private;
1532         const struct rte_flow_action_rss *rss = action->conf;
1533         unsigned int i;
1534
1535         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1536             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1537                 return rte_flow_error_set(error, ENOTSUP,
1538                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1539                                           &rss->func,
1540                                           "RSS hash function not supported");
1541 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1542         if (rss->level > 2)
1543 #else
1544         if (rss->level > 1)
1545 #endif
1546                 return rte_flow_error_set(error, ENOTSUP,
1547                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1548                                           &rss->level,
1549                                           "tunnel RSS is not supported");
1550         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1551         if (rss->key_len == 0 && rss->key != NULL)
1552                 return rte_flow_error_set(error, ENOTSUP,
1553                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1554                                           &rss->key_len,
1555                                           "RSS hash key length 0");
1556         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1557                 return rte_flow_error_set(error, ENOTSUP,
1558                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1559                                           &rss->key_len,
1560                                           "RSS hash key too small");
1561         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1562                 return rte_flow_error_set(error, ENOTSUP,
1563                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1564                                           &rss->key_len,
1565                                           "RSS hash key too large");
1566         if (rss->queue_num > priv->config.ind_table_max_size)
1567                 return rte_flow_error_set(error, ENOTSUP,
1568                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1569                                           &rss->queue_num,
1570                                           "number of queues too large");
1571         if (rss->types & MLX5_RSS_HF_MASK)
1572                 return rte_flow_error_set(error, ENOTSUP,
1573                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1574                                           &rss->types,
1575                                           "some RSS protocols are not"
1576                                           " supported");
1577         if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) &&
1578             !(rss->types & ETH_RSS_IP))
1579                 return rte_flow_error_set(error, EINVAL,
1580                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1581                                           "L3 partial RSS requested but L3 RSS"
1582                                           " type not specified");
1583         if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) &&
1584             !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP)))
1585                 return rte_flow_error_set(error, EINVAL,
1586                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1587                                           "L4 partial RSS requested but L4 RSS"
1588                                           " type not specified");
1589         if (!priv->rxqs_n)
1590                 return rte_flow_error_set(error, EINVAL,
1591                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1592                                           NULL, "No Rx queues configured");
1593         if (!rss->queue_num)
1594                 return rte_flow_error_set(error, EINVAL,
1595                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1596                                           NULL, "No queues configured");
1597         for (i = 0; i != rss->queue_num; ++i) {
1598                 if (rss->queue[i] >= priv->rxqs_n)
1599                         return rte_flow_error_set
1600                                 (error, EINVAL,
1601                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1602                                  &rss->queue[i], "queue index out of range");
1603                 if (!(*priv->rxqs)[rss->queue[i]])
1604                         return rte_flow_error_set
1605                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1606                                  &rss->queue[i], "queue is not configured");
1607         }
1608         return 0;
1609 }
1610
1611 /*
1612  * Validate the rss action.
1613  *
1614  * @param[in] action
1615  *   Pointer to the queue action.
1616  * @param[in] action_flags
1617  *   Bit-fields that holds the actions detected until now.
1618  * @param[in] dev
1619  *   Pointer to the Ethernet device structure.
1620  * @param[in] attr
1621  *   Attributes of flow that includes this action.
1622  * @param[in] item_flags
1623  *   Items that were detected.
1624  * @param[out] error
1625  *   Pointer to error structure.
1626  *
1627  * @return
1628  *   0 on success, a negative errno value otherwise and rte_errno is set.
1629  */
1630 int
1631 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1632                               uint64_t action_flags,
1633                               struct rte_eth_dev *dev,
1634                               const struct rte_flow_attr *attr,
1635                               uint64_t item_flags,
1636                               struct rte_flow_error *error)
1637 {
1638         const struct rte_flow_action_rss *rss = action->conf;
1639         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1640         int ret;
1641
1642         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1643                 return rte_flow_error_set(error, EINVAL,
1644                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1645                                           "can't have 2 fate actions"
1646                                           " in same flow");
1647         ret = mlx5_validate_action_rss(dev, action, error);
1648         if (ret)
1649                 return ret;
1650         if (attr->egress)
1651                 return rte_flow_error_set(error, ENOTSUP,
1652                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1653                                           "rss action not supported for "
1654                                           "egress");
1655         if (rss->level > 1 && !tunnel)
1656                 return rte_flow_error_set(error, EINVAL,
1657                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1658                                           "inner RSS is not supported for "
1659                                           "non-tunnel flows");
1660         if ((item_flags & MLX5_FLOW_LAYER_ECPRI) &&
1661             !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) {
1662                 return rte_flow_error_set(error, EINVAL,
1663                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1664                                           "RSS on eCPRI is not supported now");
1665         }
1666         return 0;
1667 }
1668
1669 /*
1670  * Validate the default miss action.
1671  *
1672  * @param[in] action_flags
1673  *   Bit-fields that holds the actions detected until now.
1674  * @param[out] error
1675  *   Pointer to error structure.
1676  *
1677  * @return
1678  *   0 on success, a negative errno value otherwise and rte_errno is set.
1679  */
1680 int
1681 mlx5_flow_validate_action_default_miss(uint64_t action_flags,
1682                                 const struct rte_flow_attr *attr,
1683                                 struct rte_flow_error *error)
1684 {
1685         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1686                 return rte_flow_error_set(error, EINVAL,
1687                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1688                                           "can't have 2 fate actions in"
1689                                           " same flow");
1690         if (attr->egress)
1691                 return rte_flow_error_set(error, ENOTSUP,
1692                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1693                                           "default miss action not supported "
1694                                           "for egress");
1695         if (attr->group)
1696                 return rte_flow_error_set(error, ENOTSUP,
1697                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
1698                                           "only group 0 is supported");
1699         if (attr->transfer)
1700                 return rte_flow_error_set(error, ENOTSUP,
1701                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1702                                           NULL, "transfer is not supported");
1703         return 0;
1704 }
1705
1706 /*
1707  * Validate the count action.
1708  *
1709  * @param[in] dev
1710  *   Pointer to the Ethernet device structure.
1711  * @param[in] attr
1712  *   Attributes of flow that includes this action.
1713  * @param[out] error
1714  *   Pointer to error structure.
1715  *
1716  * @return
1717  *   0 on success, a negative errno value otherwise and rte_errno is set.
1718  */
1719 int
1720 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1721                                 const struct rte_flow_attr *attr,
1722                                 struct rte_flow_error *error)
1723 {
1724         if (attr->egress)
1725                 return rte_flow_error_set(error, ENOTSUP,
1726                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1727                                           "count action not supported for "
1728                                           "egress");
1729         return 0;
1730 }
1731
1732 /**
1733  * Verify the @p attributes will be correctly understood by the NIC and store
1734  * them in the @p flow if everything is correct.
1735  *
1736  * @param[in] dev
1737  *   Pointer to the Ethernet device structure.
1738  * @param[in] attributes
1739  *   Pointer to flow attributes
1740  * @param[out] error
1741  *   Pointer to error structure.
1742  *
1743  * @return
1744  *   0 on success, a negative errno value otherwise and rte_errno is set.
1745  */
1746 int
1747 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1748                               const struct rte_flow_attr *attributes,
1749                               struct rte_flow_error *error)
1750 {
1751         struct mlx5_priv *priv = dev->data->dev_private;
1752         uint32_t priority_max = priv->config.flow_prio - 1;
1753
1754         if (attributes->group)
1755                 return rte_flow_error_set(error, ENOTSUP,
1756                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1757                                           NULL, "groups is not supported");
1758         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
1759             attributes->priority >= priority_max)
1760                 return rte_flow_error_set(error, ENOTSUP,
1761                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1762                                           NULL, "priority out of range");
1763         if (attributes->egress)
1764                 return rte_flow_error_set(error, ENOTSUP,
1765                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1766                                           "egress is not supported");
1767         if (attributes->transfer && !priv->config.dv_esw_en)
1768                 return rte_flow_error_set(error, ENOTSUP,
1769                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1770                                           NULL, "transfer is not supported");
1771         if (!attributes->ingress)
1772                 return rte_flow_error_set(error, EINVAL,
1773                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1774                                           NULL,
1775                                           "ingress attribute is mandatory");
1776         return 0;
1777 }
1778
1779 /**
1780  * Validate ICMP6 item.
1781  *
1782  * @param[in] item
1783  *   Item specification.
1784  * @param[in] item_flags
1785  *   Bit-fields that holds the items detected until now.
1786  * @param[in] ext_vlan_sup
1787  *   Whether extended VLAN features are supported or not.
1788  * @param[out] error
1789  *   Pointer to error structure.
1790  *
1791  * @return
1792  *   0 on success, a negative errno value otherwise and rte_errno is set.
1793  */
1794 int
1795 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1796                                uint64_t item_flags,
1797                                uint8_t target_protocol,
1798                                struct rte_flow_error *error)
1799 {
1800         const struct rte_flow_item_icmp6 *mask = item->mask;
1801         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1802         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1803                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1804         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1805                                       MLX5_FLOW_LAYER_OUTER_L4;
1806         int ret;
1807
1808         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1809                 return rte_flow_error_set(error, EINVAL,
1810                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1811                                           "protocol filtering not compatible"
1812                                           " with ICMP6 layer");
1813         if (!(item_flags & l3m))
1814                 return rte_flow_error_set(error, EINVAL,
1815                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1816                                           "IPv6 is mandatory to filter on"
1817                                           " ICMP6");
1818         if (item_flags & l4m)
1819                 return rte_flow_error_set(error, EINVAL,
1820                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1821                                           "multiple L4 layers not supported");
1822         if (!mask)
1823                 mask = &rte_flow_item_icmp6_mask;
1824         ret = mlx5_flow_item_acceptable
1825                 (item, (const uint8_t *)mask,
1826                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1827                  sizeof(struct rte_flow_item_icmp6),
1828                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1829         if (ret < 0)
1830                 return ret;
1831         return 0;
1832 }
1833
1834 /**
1835  * Validate ICMP item.
1836  *
1837  * @param[in] item
1838  *   Item specification.
1839  * @param[in] item_flags
1840  *   Bit-fields that holds the items detected until now.
1841  * @param[out] error
1842  *   Pointer to error structure.
1843  *
1844  * @return
1845  *   0 on success, a negative errno value otherwise and rte_errno is set.
1846  */
1847 int
1848 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1849                              uint64_t item_flags,
1850                              uint8_t target_protocol,
1851                              struct rte_flow_error *error)
1852 {
1853         const struct rte_flow_item_icmp *mask = item->mask;
1854         const struct rte_flow_item_icmp nic_mask = {
1855                 .hdr.icmp_type = 0xff,
1856                 .hdr.icmp_code = 0xff,
1857                 .hdr.icmp_ident = RTE_BE16(0xffff),
1858                 .hdr.icmp_seq_nb = RTE_BE16(0xffff),
1859         };
1860         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1861         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1862                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1863         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1864                                       MLX5_FLOW_LAYER_OUTER_L4;
1865         int ret;
1866
1867         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1868                 return rte_flow_error_set(error, EINVAL,
1869                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1870                                           "protocol filtering not compatible"
1871                                           " with ICMP layer");
1872         if (!(item_flags & l3m))
1873                 return rte_flow_error_set(error, EINVAL,
1874                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1875                                           "IPv4 is mandatory to filter"
1876                                           " on ICMP");
1877         if (item_flags & l4m)
1878                 return rte_flow_error_set(error, EINVAL,
1879                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1880                                           "multiple L4 layers not supported");
1881         if (!mask)
1882                 mask = &nic_mask;
1883         ret = mlx5_flow_item_acceptable
1884                 (item, (const uint8_t *)mask,
1885                  (const uint8_t *)&nic_mask,
1886                  sizeof(struct rte_flow_item_icmp),
1887                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1888         if (ret < 0)
1889                 return ret;
1890         return 0;
1891 }
1892
1893 /**
1894  * Validate Ethernet item.
1895  *
1896  * @param[in] item
1897  *   Item specification.
1898  * @param[in] item_flags
1899  *   Bit-fields that holds the items detected until now.
1900  * @param[out] error
1901  *   Pointer to error structure.
1902  *
1903  * @return
1904  *   0 on success, a negative errno value otherwise and rte_errno is set.
1905  */
1906 int
1907 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1908                             uint64_t item_flags, bool ext_vlan_sup,
1909                             struct rte_flow_error *error)
1910 {
1911         const struct rte_flow_item_eth *mask = item->mask;
1912         const struct rte_flow_item_eth nic_mask = {
1913                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1914                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1915                 .type = RTE_BE16(0xffff),
1916                 .has_vlan = ext_vlan_sup ? 1 : 0,
1917         };
1918         int ret;
1919         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1920         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1921                                        MLX5_FLOW_LAYER_OUTER_L2;
1922
1923         if (item_flags & ethm)
1924                 return rte_flow_error_set(error, ENOTSUP,
1925                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1926                                           "multiple L2 layers not supported");
1927         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
1928             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
1929                 return rte_flow_error_set(error, EINVAL,
1930                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1931                                           "L2 layer should not follow "
1932                                           "L3 layers");
1933         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
1934             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
1935                 return rte_flow_error_set(error, EINVAL,
1936                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1937                                           "L2 layer should not follow VLAN");
1938         if (!mask)
1939                 mask = &rte_flow_item_eth_mask;
1940         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1941                                         (const uint8_t *)&nic_mask,
1942                                         sizeof(struct rte_flow_item_eth),
1943                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1944         return ret;
1945 }
1946
1947 /**
1948  * Validate VLAN item.
1949  *
1950  * @param[in] item
1951  *   Item specification.
1952  * @param[in] item_flags
1953  *   Bit-fields that holds the items detected until now.
1954  * @param[in] dev
1955  *   Ethernet device flow is being created on.
1956  * @param[out] error
1957  *   Pointer to error structure.
1958  *
1959  * @return
1960  *   0 on success, a negative errno value otherwise and rte_errno is set.
1961  */
1962 int
1963 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1964                              uint64_t item_flags,
1965                              struct rte_eth_dev *dev,
1966                              struct rte_flow_error *error)
1967 {
1968         const struct rte_flow_item_vlan *spec = item->spec;
1969         const struct rte_flow_item_vlan *mask = item->mask;
1970         const struct rte_flow_item_vlan nic_mask = {
1971                 .tci = RTE_BE16(UINT16_MAX),
1972                 .inner_type = RTE_BE16(UINT16_MAX),
1973         };
1974         uint16_t vlan_tag = 0;
1975         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1976         int ret;
1977         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1978                                         MLX5_FLOW_LAYER_INNER_L4) :
1979                                        (MLX5_FLOW_LAYER_OUTER_L3 |
1980                                         MLX5_FLOW_LAYER_OUTER_L4);
1981         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1982                                         MLX5_FLOW_LAYER_OUTER_VLAN;
1983
1984         if (item_flags & vlanm)
1985                 return rte_flow_error_set(error, EINVAL,
1986                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1987                                           "multiple VLAN layers not supported");
1988         else if ((item_flags & l34m) != 0)
1989                 return rte_flow_error_set(error, EINVAL,
1990                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1991                                           "VLAN cannot follow L3/L4 layer");
1992         if (!mask)
1993                 mask = &rte_flow_item_vlan_mask;
1994         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1995                                         (const uint8_t *)&nic_mask,
1996                                         sizeof(struct rte_flow_item_vlan),
1997                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1998         if (ret)
1999                 return ret;
2000         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2001                 struct mlx5_priv *priv = dev->data->dev_private;
2002
2003                 if (priv->vmwa_context) {
2004                         /*
2005                          * Non-NULL context means we have a virtual machine
2006                          * and SR-IOV enabled, we have to create VLAN interface
2007                          * to make hypervisor to setup E-Switch vport
2008                          * context correctly. We avoid creating the multiple
2009                          * VLAN interfaces, so we cannot support VLAN tag mask.
2010                          */
2011                         return rte_flow_error_set(error, EINVAL,
2012                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2013                                                   item,
2014                                                   "VLAN tag mask is not"
2015                                                   " supported in virtual"
2016                                                   " environment");
2017                 }
2018         }
2019         if (spec) {
2020                 vlan_tag = spec->tci;
2021                 vlan_tag &= mask->tci;
2022         }
2023         /*
2024          * From verbs perspective an empty VLAN is equivalent
2025          * to a packet without VLAN layer.
2026          */
2027         if (!vlan_tag)
2028                 return rte_flow_error_set(error, EINVAL,
2029                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2030                                           item->spec,
2031                                           "VLAN cannot be empty");
2032         return 0;
2033 }
2034
2035 /**
2036  * Validate IPV4 item.
2037  *
2038  * @param[in] item
2039  *   Item specification.
2040  * @param[in] item_flags
2041  *   Bit-fields that holds the items detected until now.
2042  * @param[in] last_item
2043  *   Previous validated item in the pattern items.
2044  * @param[in] ether_type
2045  *   Type in the ethernet layer header (including dot1q).
2046  * @param[in] acc_mask
2047  *   Acceptable mask, if NULL default internal default mask
2048  *   will be used to check whether item fields are supported.
2049  * @param[in] range_accepted
2050  *   True if range of values is accepted for specific fields, false otherwise.
2051  * @param[out] error
2052  *   Pointer to error structure.
2053  *
2054  * @return
2055  *   0 on success, a negative errno value otherwise and rte_errno is set.
2056  */
2057 int
2058 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
2059                              uint64_t item_flags,
2060                              uint64_t last_item,
2061                              uint16_t ether_type,
2062                              const struct rte_flow_item_ipv4 *acc_mask,
2063                              bool range_accepted,
2064                              struct rte_flow_error *error)
2065 {
2066         const struct rte_flow_item_ipv4 *mask = item->mask;
2067         const struct rte_flow_item_ipv4 *spec = item->spec;
2068         const struct rte_flow_item_ipv4 nic_mask = {
2069                 .hdr = {
2070                         .src_addr = RTE_BE32(0xffffffff),
2071                         .dst_addr = RTE_BE32(0xffffffff),
2072                         .type_of_service = 0xff,
2073                         .next_proto_id = 0xff,
2074                 },
2075         };
2076         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2077         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2078                                       MLX5_FLOW_LAYER_OUTER_L3;
2079         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2080                                       MLX5_FLOW_LAYER_OUTER_L4;
2081         int ret;
2082         uint8_t next_proto = 0xFF;
2083         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2084                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2085                                   MLX5_FLOW_LAYER_INNER_VLAN);
2086
2087         if ((last_item & l2_vlan) && ether_type &&
2088             ether_type != RTE_ETHER_TYPE_IPV4)
2089                 return rte_flow_error_set(error, EINVAL,
2090                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2091                                           "IPv4 cannot follow L2/VLAN layer "
2092                                           "which ether type is not IPv4");
2093         if (item_flags & MLX5_FLOW_LAYER_IPIP) {
2094                 if (mask && spec)
2095                         next_proto = mask->hdr.next_proto_id &
2096                                      spec->hdr.next_proto_id;
2097                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2098                         return rte_flow_error_set(error, EINVAL,
2099                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2100                                                   item,
2101                                                   "multiple tunnel "
2102                                                   "not supported");
2103         }
2104         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
2105                 return rte_flow_error_set(error, EINVAL,
2106                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2107                                           "wrong tunnel type - IPv6 specified "
2108                                           "but IPv4 item provided");
2109         if (item_flags & l3m)
2110                 return rte_flow_error_set(error, ENOTSUP,
2111                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2112                                           "multiple L3 layers not supported");
2113         else if (item_flags & l4m)
2114                 return rte_flow_error_set(error, EINVAL,
2115                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2116                                           "L3 cannot follow an L4 layer.");
2117         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2118                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2119                 return rte_flow_error_set(error, EINVAL,
2120                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2121                                           "L3 cannot follow an NVGRE layer.");
2122         if (!mask)
2123                 mask = &rte_flow_item_ipv4_mask;
2124         else if (mask->hdr.next_proto_id != 0 &&
2125                  mask->hdr.next_proto_id != 0xff)
2126                 return rte_flow_error_set(error, EINVAL,
2127                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2128                                           "partial mask is not supported"
2129                                           " for protocol");
2130         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2131                                         acc_mask ? (const uint8_t *)acc_mask
2132                                                  : (const uint8_t *)&nic_mask,
2133                                         sizeof(struct rte_flow_item_ipv4),
2134                                         range_accepted, error);
2135         if (ret < 0)
2136                 return ret;
2137         return 0;
2138 }
2139
2140 /**
2141  * Validate IPV6 item.
2142  *
2143  * @param[in] item
2144  *   Item specification.
2145  * @param[in] item_flags
2146  *   Bit-fields that holds the items detected until now.
2147  * @param[in] last_item
2148  *   Previous validated item in the pattern items.
2149  * @param[in] ether_type
2150  *   Type in the ethernet layer header (including dot1q).
2151  * @param[in] acc_mask
2152  *   Acceptable mask, if NULL default internal default mask
2153  *   will be used to check whether item fields are supported.
2154  * @param[out] error
2155  *   Pointer to error structure.
2156  *
2157  * @return
2158  *   0 on success, a negative errno value otherwise and rte_errno is set.
2159  */
2160 int
2161 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
2162                              uint64_t item_flags,
2163                              uint64_t last_item,
2164                              uint16_t ether_type,
2165                              const struct rte_flow_item_ipv6 *acc_mask,
2166                              struct rte_flow_error *error)
2167 {
2168         const struct rte_flow_item_ipv6 *mask = item->mask;
2169         const struct rte_flow_item_ipv6 *spec = item->spec;
2170         const struct rte_flow_item_ipv6 nic_mask = {
2171                 .hdr = {
2172                         .src_addr =
2173                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2174                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2175                         .dst_addr =
2176                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2177                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2178                         .vtc_flow = RTE_BE32(0xffffffff),
2179                         .proto = 0xff,
2180                 },
2181         };
2182         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2183         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2184                                       MLX5_FLOW_LAYER_OUTER_L3;
2185         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2186                                       MLX5_FLOW_LAYER_OUTER_L4;
2187         int ret;
2188         uint8_t next_proto = 0xFF;
2189         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2190                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2191                                   MLX5_FLOW_LAYER_INNER_VLAN);
2192
2193         if ((last_item & l2_vlan) && ether_type &&
2194             ether_type != RTE_ETHER_TYPE_IPV6)
2195                 return rte_flow_error_set(error, EINVAL,
2196                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2197                                           "IPv6 cannot follow L2/VLAN layer "
2198                                           "which ether type is not IPv6");
2199         if (mask && mask->hdr.proto == UINT8_MAX && spec)
2200                 next_proto = spec->hdr.proto;
2201         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
2202                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2203                         return rte_flow_error_set(error, EINVAL,
2204                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2205                                                   item,
2206                                                   "multiple tunnel "
2207                                                   "not supported");
2208         }
2209         if (next_proto == IPPROTO_HOPOPTS  ||
2210             next_proto == IPPROTO_ROUTING  ||
2211             next_proto == IPPROTO_FRAGMENT ||
2212             next_proto == IPPROTO_ESP      ||
2213             next_proto == IPPROTO_AH       ||
2214             next_proto == IPPROTO_DSTOPTS)
2215                 return rte_flow_error_set(error, EINVAL,
2216                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2217                                           "IPv6 proto (next header) should "
2218                                           "not be set as extension header");
2219         if (item_flags & MLX5_FLOW_LAYER_IPIP)
2220                 return rte_flow_error_set(error, EINVAL,
2221                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2222                                           "wrong tunnel type - IPv4 specified "
2223                                           "but IPv6 item provided");
2224         if (item_flags & l3m)
2225                 return rte_flow_error_set(error, ENOTSUP,
2226                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2227                                           "multiple L3 layers not supported");
2228         else if (item_flags & l4m)
2229                 return rte_flow_error_set(error, EINVAL,
2230                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2231                                           "L3 cannot follow an L4 layer.");
2232         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2233                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2234                 return rte_flow_error_set(error, EINVAL,
2235                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2236                                           "L3 cannot follow an NVGRE layer.");
2237         if (!mask)
2238                 mask = &rte_flow_item_ipv6_mask;
2239         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2240                                         acc_mask ? (const uint8_t *)acc_mask
2241                                                  : (const uint8_t *)&nic_mask,
2242                                         sizeof(struct rte_flow_item_ipv6),
2243                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2244         if (ret < 0)
2245                 return ret;
2246         return 0;
2247 }
2248
2249 /**
2250  * Validate UDP item.
2251  *
2252  * @param[in] item
2253  *   Item specification.
2254  * @param[in] item_flags
2255  *   Bit-fields that holds the items detected until now.
2256  * @param[in] target_protocol
2257  *   The next protocol in the previous item.
2258  * @param[in] flow_mask
2259  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
2260  * @param[out] error
2261  *   Pointer to error structure.
2262  *
2263  * @return
2264  *   0 on success, a negative errno value otherwise and rte_errno is set.
2265  */
2266 int
2267 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
2268                             uint64_t item_flags,
2269                             uint8_t target_protocol,
2270                             struct rte_flow_error *error)
2271 {
2272         const struct rte_flow_item_udp *mask = item->mask;
2273         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2274         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2275                                       MLX5_FLOW_LAYER_OUTER_L3;
2276         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2277                                       MLX5_FLOW_LAYER_OUTER_L4;
2278         int ret;
2279
2280         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
2281                 return rte_flow_error_set(error, EINVAL,
2282                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2283                                           "protocol filtering not compatible"
2284                                           " with UDP layer");
2285         if (!(item_flags & l3m))
2286                 return rte_flow_error_set(error, EINVAL,
2287                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2288                                           "L3 is mandatory to filter on L4");
2289         if (item_flags & l4m)
2290                 return rte_flow_error_set(error, EINVAL,
2291                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2292                                           "multiple L4 layers not supported");
2293         if (!mask)
2294                 mask = &rte_flow_item_udp_mask;
2295         ret = mlx5_flow_item_acceptable
2296                 (item, (const uint8_t *)mask,
2297                  (const uint8_t *)&rte_flow_item_udp_mask,
2298                  sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2299                  error);
2300         if (ret < 0)
2301                 return ret;
2302         return 0;
2303 }
2304
2305 /**
2306  * Validate TCP item.
2307  *
2308  * @param[in] item
2309  *   Item specification.
2310  * @param[in] item_flags
2311  *   Bit-fields that holds the items detected until now.
2312  * @param[in] target_protocol
2313  *   The next protocol in the previous item.
2314  * @param[out] error
2315  *   Pointer to error structure.
2316  *
2317  * @return
2318  *   0 on success, a negative errno value otherwise and rte_errno is set.
2319  */
2320 int
2321 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
2322                             uint64_t item_flags,
2323                             uint8_t target_protocol,
2324                             const struct rte_flow_item_tcp *flow_mask,
2325                             struct rte_flow_error *error)
2326 {
2327         const struct rte_flow_item_tcp *mask = item->mask;
2328         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2329         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2330                                       MLX5_FLOW_LAYER_OUTER_L3;
2331         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2332                                       MLX5_FLOW_LAYER_OUTER_L4;
2333         int ret;
2334
2335         MLX5_ASSERT(flow_mask);
2336         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
2337                 return rte_flow_error_set(error, EINVAL,
2338                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2339                                           "protocol filtering not compatible"
2340                                           " with TCP layer");
2341         if (!(item_flags & l3m))
2342                 return rte_flow_error_set(error, EINVAL,
2343                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2344                                           "L3 is mandatory to filter on L4");
2345         if (item_flags & l4m)
2346                 return rte_flow_error_set(error, EINVAL,
2347                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2348                                           "multiple L4 layers not supported");
2349         if (!mask)
2350                 mask = &rte_flow_item_tcp_mask;
2351         ret = mlx5_flow_item_acceptable
2352                 (item, (const uint8_t *)mask,
2353                  (const uint8_t *)flow_mask,
2354                  sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2355                  error);
2356         if (ret < 0)
2357                 return ret;
2358         return 0;
2359 }
2360
2361 /**
2362  * Validate VXLAN item.
2363  *
2364  * @param[in] item
2365  *   Item specification.
2366  * @param[in] item_flags
2367  *   Bit-fields that holds the items detected until now.
2368  * @param[in] target_protocol
2369  *   The next protocol in the previous item.
2370  * @param[out] error
2371  *   Pointer to error structure.
2372  *
2373  * @return
2374  *   0 on success, a negative errno value otherwise and rte_errno is set.
2375  */
2376 int
2377 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
2378                               uint64_t item_flags,
2379                               struct rte_flow_error *error)
2380 {
2381         const struct rte_flow_item_vxlan *spec = item->spec;
2382         const struct rte_flow_item_vxlan *mask = item->mask;
2383         int ret;
2384         union vni {
2385                 uint32_t vlan_id;
2386                 uint8_t vni[4];
2387         } id = { .vlan_id = 0, };
2388
2389
2390         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2391                 return rte_flow_error_set(error, ENOTSUP,
2392                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2393                                           "multiple tunnel layers not"
2394                                           " supported");
2395         /*
2396          * Verify only UDPv4 is present as defined in
2397          * https://tools.ietf.org/html/rfc7348
2398          */
2399         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2400                 return rte_flow_error_set(error, EINVAL,
2401                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2402                                           "no outer UDP layer found");
2403         if (!mask)
2404                 mask = &rte_flow_item_vxlan_mask;
2405         ret = mlx5_flow_item_acceptable
2406                 (item, (const uint8_t *)mask,
2407                  (const uint8_t *)&rte_flow_item_vxlan_mask,
2408                  sizeof(struct rte_flow_item_vxlan),
2409                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2410         if (ret < 0)
2411                 return ret;
2412         if (spec) {
2413                 memcpy(&id.vni[1], spec->vni, 3);
2414                 memcpy(&id.vni[1], mask->vni, 3);
2415         }
2416         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2417                 return rte_flow_error_set(error, ENOTSUP,
2418                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2419                                           "VXLAN tunnel must be fully defined");
2420         return 0;
2421 }
2422
2423 /**
2424  * Validate VXLAN_GPE item.
2425  *
2426  * @param[in] item
2427  *   Item specification.
2428  * @param[in] item_flags
2429  *   Bit-fields that holds the items detected until now.
2430  * @param[in] priv
2431  *   Pointer to the private data structure.
2432  * @param[in] target_protocol
2433  *   The next protocol in the previous item.
2434  * @param[out] error
2435  *   Pointer to error structure.
2436  *
2437  * @return
2438  *   0 on success, a negative errno value otherwise and rte_errno is set.
2439  */
2440 int
2441 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
2442                                   uint64_t item_flags,
2443                                   struct rte_eth_dev *dev,
2444                                   struct rte_flow_error *error)
2445 {
2446         struct mlx5_priv *priv = dev->data->dev_private;
2447         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
2448         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
2449         int ret;
2450         union vni {
2451                 uint32_t vlan_id;
2452                 uint8_t vni[4];
2453         } id = { .vlan_id = 0, };
2454
2455         if (!priv->config.l3_vxlan_en)
2456                 return rte_flow_error_set(error, ENOTSUP,
2457                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2458                                           "L3 VXLAN is not enabled by device"
2459                                           " parameter and/or not configured in"
2460                                           " firmware");
2461         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2462                 return rte_flow_error_set(error, ENOTSUP,
2463                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2464                                           "multiple tunnel layers not"
2465                                           " supported");
2466         /*
2467          * Verify only UDPv4 is present as defined in
2468          * https://tools.ietf.org/html/rfc7348
2469          */
2470         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2471                 return rte_flow_error_set(error, EINVAL,
2472                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2473                                           "no outer UDP layer found");
2474         if (!mask)
2475                 mask = &rte_flow_item_vxlan_gpe_mask;
2476         ret = mlx5_flow_item_acceptable
2477                 (item, (const uint8_t *)mask,
2478                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
2479                  sizeof(struct rte_flow_item_vxlan_gpe),
2480                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2481         if (ret < 0)
2482                 return ret;
2483         if (spec) {
2484                 if (spec->protocol)
2485                         return rte_flow_error_set(error, ENOTSUP,
2486                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2487                                                   item,
2488                                                   "VxLAN-GPE protocol"
2489                                                   " not supported");
2490                 memcpy(&id.vni[1], spec->vni, 3);
2491                 memcpy(&id.vni[1], mask->vni, 3);
2492         }
2493         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2494                 return rte_flow_error_set(error, ENOTSUP,
2495                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2496                                           "VXLAN-GPE tunnel must be fully"
2497                                           " defined");
2498         return 0;
2499 }
2500 /**
2501  * Validate GRE Key item.
2502  *
2503  * @param[in] item
2504  *   Item specification.
2505  * @param[in] item_flags
2506  *   Bit flags to mark detected items.
2507  * @param[in] gre_item
2508  *   Pointer to gre_item
2509  * @param[out] error
2510  *   Pointer to error structure.
2511  *
2512  * @return
2513  *   0 on success, a negative errno value otherwise and rte_errno is set.
2514  */
2515 int
2516 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
2517                                 uint64_t item_flags,
2518                                 const struct rte_flow_item *gre_item,
2519                                 struct rte_flow_error *error)
2520 {
2521         const rte_be32_t *mask = item->mask;
2522         int ret = 0;
2523         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
2524         const struct rte_flow_item_gre *gre_spec;
2525         const struct rte_flow_item_gre *gre_mask;
2526
2527         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
2528                 return rte_flow_error_set(error, ENOTSUP,
2529                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2530                                           "Multiple GRE key not support");
2531         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2532                 return rte_flow_error_set(error, ENOTSUP,
2533                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2534                                           "No preceding GRE header");
2535         if (item_flags & MLX5_FLOW_LAYER_INNER)
2536                 return rte_flow_error_set(error, ENOTSUP,
2537                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2538                                           "GRE key following a wrong item");
2539         gre_mask = gre_item->mask;
2540         if (!gre_mask)
2541                 gre_mask = &rte_flow_item_gre_mask;
2542         gre_spec = gre_item->spec;
2543         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2544                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2545                 return rte_flow_error_set(error, EINVAL,
2546                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2547                                           "Key bit must be on");
2548
2549         if (!mask)
2550                 mask = &gre_key_default_mask;
2551         ret = mlx5_flow_item_acceptable
2552                 (item, (const uint8_t *)mask,
2553                  (const uint8_t *)&gre_key_default_mask,
2554                  sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2555         return ret;
2556 }
2557
2558 /**
2559  * Validate GRE item.
2560  *
2561  * @param[in] item
2562  *   Item specification.
2563  * @param[in] item_flags
2564  *   Bit flags to mark detected items.
2565  * @param[in] target_protocol
2566  *   The next protocol in the previous item.
2567  * @param[out] error
2568  *   Pointer to error structure.
2569  *
2570  * @return
2571  *   0 on success, a negative errno value otherwise and rte_errno is set.
2572  */
2573 int
2574 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2575                             uint64_t item_flags,
2576                             uint8_t target_protocol,
2577                             struct rte_flow_error *error)
2578 {
2579         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2580         const struct rte_flow_item_gre *mask = item->mask;
2581         int ret;
2582         const struct rte_flow_item_gre nic_mask = {
2583                 .c_rsvd0_ver = RTE_BE16(0xB000),
2584                 .protocol = RTE_BE16(UINT16_MAX),
2585         };
2586
2587         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2588                 return rte_flow_error_set(error, EINVAL,
2589                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2590                                           "protocol filtering not compatible"
2591                                           " with this GRE layer");
2592         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2593                 return rte_flow_error_set(error, ENOTSUP,
2594                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2595                                           "multiple tunnel layers not"
2596                                           " supported");
2597         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2598                 return rte_flow_error_set(error, ENOTSUP,
2599                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2600                                           "L3 Layer is missing");
2601         if (!mask)
2602                 mask = &rte_flow_item_gre_mask;
2603         ret = mlx5_flow_item_acceptable
2604                 (item, (const uint8_t *)mask,
2605                  (const uint8_t *)&nic_mask,
2606                  sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2607                  error);
2608         if (ret < 0)
2609                 return ret;
2610 #ifndef HAVE_MLX5DV_DR
2611 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2612         if (spec && (spec->protocol & mask->protocol))
2613                 return rte_flow_error_set(error, ENOTSUP,
2614                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2615                                           "without MPLS support the"
2616                                           " specification cannot be used for"
2617                                           " filtering");
2618 #endif
2619 #endif
2620         return 0;
2621 }
2622
2623 /**
2624  * Validate Geneve item.
2625  *
2626  * @param[in] item
2627  *   Item specification.
2628  * @param[in] itemFlags
2629  *   Bit-fields that holds the items detected until now.
2630  * @param[in] enPriv
2631  *   Pointer to the private data structure.
2632  * @param[out] error
2633  *   Pointer to error structure.
2634  *
2635  * @return
2636  *   0 on success, a negative errno value otherwise and rte_errno is set.
2637  */
2638
2639 int
2640 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2641                                uint64_t item_flags,
2642                                struct rte_eth_dev *dev,
2643                                struct rte_flow_error *error)
2644 {
2645         struct mlx5_priv *priv = dev->data->dev_private;
2646         const struct rte_flow_item_geneve *spec = item->spec;
2647         const struct rte_flow_item_geneve *mask = item->mask;
2648         int ret;
2649         uint16_t gbhdr;
2650         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2651                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2652         const struct rte_flow_item_geneve nic_mask = {
2653                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2654                 .vni = "\xff\xff\xff",
2655                 .protocol = RTE_BE16(UINT16_MAX),
2656         };
2657
2658         if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2659                 return rte_flow_error_set(error, ENOTSUP,
2660                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2661                                           "L3 Geneve is not enabled by device"
2662                                           " parameter and/or not configured in"
2663                                           " firmware");
2664         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2665                 return rte_flow_error_set(error, ENOTSUP,
2666                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2667                                           "multiple tunnel layers not"
2668                                           " supported");
2669         /*
2670          * Verify only UDPv4 is present as defined in
2671          * https://tools.ietf.org/html/rfc7348
2672          */
2673         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2674                 return rte_flow_error_set(error, EINVAL,
2675                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2676                                           "no outer UDP layer found");
2677         if (!mask)
2678                 mask = &rte_flow_item_geneve_mask;
2679         ret = mlx5_flow_item_acceptable
2680                                   (item, (const uint8_t *)mask,
2681                                    (const uint8_t *)&nic_mask,
2682                                    sizeof(struct rte_flow_item_geneve),
2683                                    MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2684         if (ret)
2685                 return ret;
2686         if (spec) {
2687                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2688                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2689                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2690                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2691                         return rte_flow_error_set(error, ENOTSUP,
2692                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2693                                                   item,
2694                                                   "Geneve protocol unsupported"
2695                                                   " fields are being used");
2696                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2697                         return rte_flow_error_set
2698                                         (error, ENOTSUP,
2699                                          RTE_FLOW_ERROR_TYPE_ITEM,
2700                                          item,
2701                                          "Unsupported Geneve options length");
2702         }
2703         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2704                 return rte_flow_error_set
2705                                     (error, ENOTSUP,
2706                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2707                                      "Geneve tunnel must be fully defined");
2708         return 0;
2709 }
2710
2711 /**
2712  * Validate MPLS item.
2713  *
2714  * @param[in] dev
2715  *   Pointer to the rte_eth_dev structure.
2716  * @param[in] item
2717  *   Item specification.
2718  * @param[in] item_flags
2719  *   Bit-fields that holds the items detected until now.
2720  * @param[in] prev_layer
2721  *   The protocol layer indicated in previous item.
2722  * @param[out] error
2723  *   Pointer to error structure.
2724  *
2725  * @return
2726  *   0 on success, a negative errno value otherwise and rte_errno is set.
2727  */
2728 int
2729 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
2730                              const struct rte_flow_item *item __rte_unused,
2731                              uint64_t item_flags __rte_unused,
2732                              uint64_t prev_layer __rte_unused,
2733                              struct rte_flow_error *error)
2734 {
2735 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2736         const struct rte_flow_item_mpls *mask = item->mask;
2737         struct mlx5_priv *priv = dev->data->dev_private;
2738         int ret;
2739
2740         if (!priv->config.mpls_en)
2741                 return rte_flow_error_set(error, ENOTSUP,
2742                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2743                                           "MPLS not supported or"
2744                                           " disabled in firmware"
2745                                           " configuration.");
2746         /* MPLS over IP, UDP, GRE is allowed */
2747         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
2748                             MLX5_FLOW_LAYER_OUTER_L4_UDP |
2749                             MLX5_FLOW_LAYER_GRE)))
2750                 return rte_flow_error_set(error, EINVAL,
2751                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2752                                           "protocol filtering not compatible"
2753                                           " with MPLS layer");
2754         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
2755         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
2756             !(item_flags & MLX5_FLOW_LAYER_GRE))
2757                 return rte_flow_error_set(error, ENOTSUP,
2758                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2759                                           "multiple tunnel layers not"
2760                                           " supported");
2761         if (!mask)
2762                 mask = &rte_flow_item_mpls_mask;
2763         ret = mlx5_flow_item_acceptable
2764                 (item, (const uint8_t *)mask,
2765                  (const uint8_t *)&rte_flow_item_mpls_mask,
2766                  sizeof(struct rte_flow_item_mpls),
2767                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2768         if (ret < 0)
2769                 return ret;
2770         return 0;
2771 #else
2772         return rte_flow_error_set(error, ENOTSUP,
2773                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
2774                                   "MPLS is not supported by Verbs, please"
2775                                   " update.");
2776 #endif
2777 }
2778
2779 /**
2780  * Validate NVGRE item.
2781  *
2782  * @param[in] item
2783  *   Item specification.
2784  * @param[in] item_flags
2785  *   Bit flags to mark detected items.
2786  * @param[in] target_protocol
2787  *   The next protocol in the previous item.
2788  * @param[out] error
2789  *   Pointer to error structure.
2790  *
2791  * @return
2792  *   0 on success, a negative errno value otherwise and rte_errno is set.
2793  */
2794 int
2795 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
2796                               uint64_t item_flags,
2797                               uint8_t target_protocol,
2798                               struct rte_flow_error *error)
2799 {
2800         const struct rte_flow_item_nvgre *mask = item->mask;
2801         int ret;
2802
2803         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2804                 return rte_flow_error_set(error, EINVAL,
2805                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2806                                           "protocol filtering not compatible"
2807                                           " with this GRE layer");
2808         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2809                 return rte_flow_error_set(error, ENOTSUP,
2810                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2811                                           "multiple tunnel layers not"
2812                                           " supported");
2813         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2814                 return rte_flow_error_set(error, ENOTSUP,
2815                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2816                                           "L3 Layer is missing");
2817         if (!mask)
2818                 mask = &rte_flow_item_nvgre_mask;
2819         ret = mlx5_flow_item_acceptable
2820                 (item, (const uint8_t *)mask,
2821                  (const uint8_t *)&rte_flow_item_nvgre_mask,
2822                  sizeof(struct rte_flow_item_nvgre),
2823                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2824         if (ret < 0)
2825                 return ret;
2826         return 0;
2827 }
2828
2829 /**
2830  * Validate eCPRI item.
2831  *
2832  * @param[in] item
2833  *   Item specification.
2834  * @param[in] item_flags
2835  *   Bit-fields that holds the items detected until now.
2836  * @param[in] last_item
2837  *   Previous validated item in the pattern items.
2838  * @param[in] ether_type
2839  *   Type in the ethernet layer header (including dot1q).
2840  * @param[in] acc_mask
2841  *   Acceptable mask, if NULL default internal default mask
2842  *   will be used to check whether item fields are supported.
2843  * @param[out] error
2844  *   Pointer to error structure.
2845  *
2846  * @return
2847  *   0 on success, a negative errno value otherwise and rte_errno is set.
2848  */
2849 int
2850 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item,
2851                               uint64_t item_flags,
2852                               uint64_t last_item,
2853                               uint16_t ether_type,
2854                               const struct rte_flow_item_ecpri *acc_mask,
2855                               struct rte_flow_error *error)
2856 {
2857         const struct rte_flow_item_ecpri *mask = item->mask;
2858         const struct rte_flow_item_ecpri nic_mask = {
2859                 .hdr = {
2860                         .common = {
2861                                 .u32 =
2862                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
2863                                         .type = 0xFF,
2864                                         }).u32),
2865                         },
2866                         .dummy[0] = 0xFFFFFFFF,
2867                 },
2868         };
2869         const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 |
2870                                         MLX5_FLOW_LAYER_OUTER_VLAN);
2871         struct rte_flow_item_ecpri mask_lo;
2872
2873         if ((last_item & outer_l2_vlan) && ether_type &&
2874             ether_type != RTE_ETHER_TYPE_ECPRI)
2875                 return rte_flow_error_set(error, EINVAL,
2876                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2877                                           "eCPRI cannot follow L2/VLAN layer "
2878                                           "which ether type is not 0xAEFE.");
2879         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2880                 return rte_flow_error_set(error, EINVAL,
2881                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2882                                           "eCPRI with tunnel is not supported "
2883                                           "right now.");
2884         if (item_flags & MLX5_FLOW_LAYER_OUTER_L3)
2885                 return rte_flow_error_set(error, ENOTSUP,
2886                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2887                                           "multiple L3 layers not supported");
2888         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP)
2889                 return rte_flow_error_set(error, EINVAL,
2890                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2891                                           "eCPRI cannot follow a TCP layer.");
2892         /* In specification, eCPRI could be over UDP layer. */
2893         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)
2894                 return rte_flow_error_set(error, EINVAL,
2895                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2896                                           "eCPRI over UDP layer is not yet "
2897                                           "supported right now.");
2898         /* Mask for type field in common header could be zero. */
2899         if (!mask)
2900                 mask = &rte_flow_item_ecpri_mask;
2901         mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32);
2902         /* Input mask is in big-endian format. */
2903         if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff)
2904                 return rte_flow_error_set(error, EINVAL,
2905                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2906                                           "partial mask is not supported "
2907                                           "for protocol");
2908         else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0)
2909                 return rte_flow_error_set(error, EINVAL,
2910                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2911                                           "message header mask must be after "
2912                                           "a type mask");
2913         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2914                                          acc_mask ? (const uint8_t *)acc_mask
2915                                                   : (const uint8_t *)&nic_mask,
2916                                          sizeof(struct rte_flow_item_ecpri),
2917                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2918 }
2919
2920 /**
2921  * Release resource related QUEUE/RSS action split.
2922  *
2923  * @param dev
2924  *   Pointer to Ethernet device.
2925  * @param flow
2926  *   Flow to release id's from.
2927  */
2928 static void
2929 flow_mreg_split_qrss_release(struct rte_eth_dev *dev,
2930                              struct rte_flow *flow)
2931 {
2932         struct mlx5_priv *priv = dev->data->dev_private;
2933         uint32_t handle_idx;
2934         struct mlx5_flow_handle *dev_handle;
2935
2936         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
2937                        handle_idx, dev_handle, next)
2938                 if (dev_handle->split_flow_id)
2939                         mlx5_ipool_free(priv->sh->ipool
2940                                         [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
2941                                         dev_handle->split_flow_id);
2942 }
2943
2944 static int
2945 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
2946                    const struct rte_flow_attr *attr __rte_unused,
2947                    const struct rte_flow_item items[] __rte_unused,
2948                    const struct rte_flow_action actions[] __rte_unused,
2949                    bool external __rte_unused,
2950                    int hairpin __rte_unused,
2951                    struct rte_flow_error *error)
2952 {
2953         return rte_flow_error_set(error, ENOTSUP,
2954                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2955 }
2956
2957 static struct mlx5_flow *
2958 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
2959                   const struct rte_flow_attr *attr __rte_unused,
2960                   const struct rte_flow_item items[] __rte_unused,
2961                   const struct rte_flow_action actions[] __rte_unused,
2962                   struct rte_flow_error *error)
2963 {
2964         rte_flow_error_set(error, ENOTSUP,
2965                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2966         return NULL;
2967 }
2968
2969 static int
2970 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
2971                     struct mlx5_flow *dev_flow __rte_unused,
2972                     const struct rte_flow_attr *attr __rte_unused,
2973                     const struct rte_flow_item items[] __rte_unused,
2974                     const struct rte_flow_action actions[] __rte_unused,
2975                     struct rte_flow_error *error)
2976 {
2977         return rte_flow_error_set(error, ENOTSUP,
2978                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2979 }
2980
2981 static int
2982 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
2983                 struct rte_flow *flow __rte_unused,
2984                 struct rte_flow_error *error)
2985 {
2986         return rte_flow_error_set(error, ENOTSUP,
2987                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2988 }
2989
2990 static void
2991 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
2992                  struct rte_flow *flow __rte_unused)
2993 {
2994 }
2995
2996 static void
2997 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
2998                   struct rte_flow *flow __rte_unused)
2999 {
3000 }
3001
3002 static int
3003 flow_null_query(struct rte_eth_dev *dev __rte_unused,
3004                 struct rte_flow *flow __rte_unused,
3005                 const struct rte_flow_action *actions __rte_unused,
3006                 void *data __rte_unused,
3007                 struct rte_flow_error *error)
3008 {
3009         return rte_flow_error_set(error, ENOTSUP,
3010                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3011 }
3012
3013 static int
3014 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused,
3015                       uint32_t domains __rte_unused,
3016                       uint32_t flags __rte_unused)
3017 {
3018         return 0;
3019 }
3020
3021 /* Void driver to protect from null pointer reference. */
3022 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
3023         .validate = flow_null_validate,
3024         .prepare = flow_null_prepare,
3025         .translate = flow_null_translate,
3026         .apply = flow_null_apply,
3027         .remove = flow_null_remove,
3028         .destroy = flow_null_destroy,
3029         .query = flow_null_query,
3030         .sync_domain = flow_null_sync_domain,
3031 };
3032
3033 /**
3034  * Select flow driver type according to flow attributes and device
3035  * configuration.
3036  *
3037  * @param[in] dev
3038  *   Pointer to the dev structure.
3039  * @param[in] attr
3040  *   Pointer to the flow attributes.
3041  *
3042  * @return
3043  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
3044  */
3045 static enum mlx5_flow_drv_type
3046 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
3047 {
3048         struct mlx5_priv *priv = dev->data->dev_private;
3049         /* The OS can determine first a specific flow type (DV, VERBS) */
3050         enum mlx5_flow_drv_type type = mlx5_flow_os_get_type();
3051
3052         if (type != MLX5_FLOW_TYPE_MAX)
3053                 return type;
3054         /* If no OS specific type - continue with DV/VERBS selection */
3055         if (attr->transfer && priv->config.dv_esw_en)
3056                 type = MLX5_FLOW_TYPE_DV;
3057         if (!attr->transfer)
3058                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
3059                                                  MLX5_FLOW_TYPE_VERBS;
3060         return type;
3061 }
3062
3063 #define flow_get_drv_ops(type) flow_drv_ops[type]
3064
3065 /**
3066  * Flow driver validation API. This abstracts calling driver specific functions.
3067  * The type of flow driver is determined according to flow attributes.
3068  *
3069  * @param[in] dev
3070  *   Pointer to the dev structure.
3071  * @param[in] attr
3072  *   Pointer to the flow attributes.
3073  * @param[in] items
3074  *   Pointer to the list of items.
3075  * @param[in] actions
3076  *   Pointer to the list of actions.
3077  * @param[in] external
3078  *   This flow rule is created by request external to PMD.
3079  * @param[in] hairpin
3080  *   Number of hairpin TX actions, 0 means classic flow.
3081  * @param[out] error
3082  *   Pointer to the error structure.
3083  *
3084  * @return
3085  *   0 on success, a negative errno value otherwise and rte_errno is set.
3086  */
3087 static inline int
3088 flow_drv_validate(struct rte_eth_dev *dev,
3089                   const struct rte_flow_attr *attr,
3090                   const struct rte_flow_item items[],
3091                   const struct rte_flow_action actions[],
3092                   bool external, int hairpin, struct rte_flow_error *error)
3093 {
3094         const struct mlx5_flow_driver_ops *fops;
3095         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
3096
3097         fops = flow_get_drv_ops(type);
3098         return fops->validate(dev, attr, items, actions, external,
3099                               hairpin, error);
3100 }
3101
3102 /**
3103  * Flow driver preparation API. This abstracts calling driver specific
3104  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3105  * calculates the size of memory required for device flow, allocates the memory,
3106  * initializes the device flow and returns the pointer.
3107  *
3108  * @note
3109  *   This function initializes device flow structure such as dv or verbs in
3110  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
3111  *   rest. For example, adding returning device flow to flow->dev_flow list and
3112  *   setting backward reference to the flow should be done out of this function.
3113  *   layers field is not filled either.
3114  *
3115  * @param[in] dev
3116  *   Pointer to the dev structure.
3117  * @param[in] attr
3118  *   Pointer to the flow attributes.
3119  * @param[in] items
3120  *   Pointer to the list of items.
3121  * @param[in] actions
3122  *   Pointer to the list of actions.
3123  * @param[in] flow_idx
3124  *   This memory pool index to the flow.
3125  * @param[out] error
3126  *   Pointer to the error structure.
3127  *
3128  * @return
3129  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
3130  */
3131 static inline struct mlx5_flow *
3132 flow_drv_prepare(struct rte_eth_dev *dev,
3133                  const struct rte_flow *flow,
3134                  const struct rte_flow_attr *attr,
3135                  const struct rte_flow_item items[],
3136                  const struct rte_flow_action actions[],
3137                  uint32_t flow_idx,
3138                  struct rte_flow_error *error)
3139 {
3140         const struct mlx5_flow_driver_ops *fops;
3141         enum mlx5_flow_drv_type type = flow->drv_type;
3142         struct mlx5_flow *mlx5_flow = NULL;
3143
3144         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3145         fops = flow_get_drv_ops(type);
3146         mlx5_flow = fops->prepare(dev, attr, items, actions, error);
3147         if (mlx5_flow)
3148                 mlx5_flow->flow_idx = flow_idx;
3149         return mlx5_flow;
3150 }
3151
3152 /**
3153  * Flow driver translation API. This abstracts calling driver specific
3154  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3155  * translates a generic flow into a driver flow. flow_drv_prepare() must
3156  * precede.
3157  *
3158  * @note
3159  *   dev_flow->layers could be filled as a result of parsing during translation
3160  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
3161  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
3162  *   flow->actions could be overwritten even though all the expanded dev_flows
3163  *   have the same actions.
3164  *
3165  * @param[in] dev
3166  *   Pointer to the rte dev structure.
3167  * @param[in, out] dev_flow
3168  *   Pointer to the mlx5 flow.
3169  * @param[in] attr
3170  *   Pointer to the flow attributes.
3171  * @param[in] items
3172  *   Pointer to the list of items.
3173  * @param[in] actions
3174  *   Pointer to the list of actions.
3175  * @param[out] error
3176  *   Pointer to the error structure.
3177  *
3178  * @return
3179  *   0 on success, a negative errno value otherwise and rte_errno is set.
3180  */
3181 static inline int
3182 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
3183                    const struct rte_flow_attr *attr,
3184                    const struct rte_flow_item items[],
3185                    const struct rte_flow_action actions[],
3186                    struct rte_flow_error *error)
3187 {
3188         const struct mlx5_flow_driver_ops *fops;
3189         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
3190
3191         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3192         fops = flow_get_drv_ops(type);
3193         return fops->translate(dev, dev_flow, attr, items, actions, error);
3194 }
3195
3196 /**
3197  * Flow driver apply API. This abstracts calling driver specific functions.
3198  * Parent flow (rte_flow) should have driver type (drv_type). It applies
3199  * translated driver flows on to device. flow_drv_translate() must precede.
3200  *
3201  * @param[in] dev
3202  *   Pointer to Ethernet device structure.
3203  * @param[in, out] flow
3204  *   Pointer to flow structure.
3205  * @param[out] error
3206  *   Pointer to error structure.
3207  *
3208  * @return
3209  *   0 on success, a negative errno value otherwise and rte_errno is set.
3210  */
3211 static inline int
3212 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
3213                struct rte_flow_error *error)
3214 {
3215         const struct mlx5_flow_driver_ops *fops;
3216         enum mlx5_flow_drv_type type = flow->drv_type;
3217
3218         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3219         fops = flow_get_drv_ops(type);
3220         return fops->apply(dev, flow, error);
3221 }
3222
3223 /**
3224  * Flow driver destroy API. This abstracts calling driver specific functions.
3225  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
3226  * on device and releases resources of the flow.
3227  *
3228  * @param[in] dev
3229  *   Pointer to Ethernet device.
3230  * @param[in, out] flow
3231  *   Pointer to flow structure.
3232  */
3233 static inline void
3234 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
3235 {
3236         const struct mlx5_flow_driver_ops *fops;
3237         enum mlx5_flow_drv_type type = flow->drv_type;
3238
3239         flow_mreg_split_qrss_release(dev, flow);
3240         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3241         fops = flow_get_drv_ops(type);
3242         fops->destroy(dev, flow);
3243 }
3244
3245 /**
3246  * Get RSS action from the action list.
3247  *
3248  * @param[in] actions
3249  *   Pointer to the list of actions.
3250  *
3251  * @return
3252  *   Pointer to the RSS action if exist, else return NULL.
3253  */
3254 static const struct rte_flow_action_rss*
3255 flow_get_rss_action(const struct rte_flow_action actions[])
3256 {
3257         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3258                 switch (actions->type) {
3259                 case RTE_FLOW_ACTION_TYPE_RSS:
3260                         return (const struct rte_flow_action_rss *)
3261                                actions->conf;
3262                 default:
3263                         break;
3264                 }
3265         }
3266         return NULL;
3267 }
3268
3269 /* maps shared action to translated non shared in some actions array */
3270 struct mlx5_translated_shared_action {
3271         struct rte_flow_shared_action *action; /**< Shared action */
3272         int index; /**< Index in related array of rte_flow_action */
3273 };
3274
3275 /**
3276  * Translates actions of type RTE_FLOW_ACTION_TYPE_SHARED to related
3277  * non shared action if translation possible.
3278  * This functionality used to run same execution path for both shared & non
3279  * shared actions on flow create. All necessary preparations for shared
3280  * action handling should be preformed on *shared* actions list returned
3281  * from this call.
3282  *
3283  * @param[in] actions
3284  *   List of actions to translate.
3285  * @param[out] shared
3286  *   List to store translated shared actions.
3287  * @param[in, out] shared_n
3288  *   Size of *shared* array. On return should be updated with number of shared
3289  *   actions retrieved from the *actions* list.
3290  * @param[out] translated_actions
3291  *   List of actions where all shared actions were translated to non shared
3292  *   if possible. NULL if no translation took place.
3293  * @param[out] error
3294  *   Pointer to the error structure.
3295  *
3296  * @return
3297  *   0 on success, a negative errno value otherwise and rte_errno is set.
3298  */
3299 static int
3300 flow_shared_actions_translate(const struct rte_flow_action actions[],
3301         struct mlx5_translated_shared_action *shared,
3302         int *shared_n,
3303         struct rte_flow_action **translated_actions,
3304         struct rte_flow_error *error)
3305 {
3306         struct rte_flow_action *translated = NULL;
3307         size_t actions_size;
3308         int n;
3309         int copied_n = 0;
3310         struct mlx5_translated_shared_action *shared_end = NULL;
3311
3312         for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
3313                 if (actions[n].type != RTE_FLOW_ACTION_TYPE_SHARED)
3314                         continue;
3315                 if (copied_n == *shared_n) {
3316                         return rte_flow_error_set
3317                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
3318                                  NULL, "too many shared actions");
3319                 }
3320                 rte_memcpy(&shared[copied_n].action, &actions[n].conf,
3321                            sizeof(actions[n].conf));
3322                 shared[copied_n].index = n;
3323                 copied_n++;
3324         }
3325         n++;
3326         *shared_n = copied_n;
3327         if (!copied_n)
3328                 return 0;
3329         actions_size = sizeof(struct rte_flow_action) * n;
3330         translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY);
3331         if (!translated) {
3332                 rte_errno = ENOMEM;
3333                 return -ENOMEM;
3334         }
3335         memcpy(translated, actions, actions_size);
3336         for (shared_end = shared + copied_n; shared < shared_end; shared++) {
3337                 const struct rte_flow_shared_action *shared_action;
3338
3339                 shared_action = shared->action;
3340                 switch (shared_action->type) {
3341                 case MLX5_RTE_FLOW_ACTION_TYPE_SHARED_RSS:
3342                         translated[shared->index].type =
3343                                 RTE_FLOW_ACTION_TYPE_RSS;
3344                         translated[shared->index].conf =
3345                                 &shared_action->rss.origin;
3346                         break;
3347                 default:
3348                         mlx5_free(translated);
3349                         return rte_flow_error_set
3350                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
3351                                  NULL, "invalid shared action type");
3352                 }
3353         }
3354         *translated_actions = translated;
3355         return 0;
3356 }
3357
3358 /**
3359  * Get Shared RSS action from the action list.
3360  *
3361  * @param[in] shared
3362  *   Pointer to the list of actions.
3363  * @param[in] shared_n
3364  *   Actions list length.
3365  *
3366  * @return
3367  *   Pointer to the MLX5 RSS action if exists, otherwise return NULL.
3368  */
3369 static struct mlx5_shared_action_rss *
3370 flow_get_shared_rss_action(struct mlx5_translated_shared_action *shared,
3371                            int shared_n)
3372 {
3373         struct mlx5_translated_shared_action *shared_end;
3374
3375         for (shared_end = shared + shared_n; shared < shared_end; shared++) {
3376                 struct rte_flow_shared_action *shared_action;
3377
3378                 shared_action = shared->action;
3379                 switch (shared_action->type) {
3380                 case MLX5_RTE_FLOW_ACTION_TYPE_SHARED_RSS:
3381                         __atomic_add_fetch(&shared_action->refcnt, 1,
3382                                            __ATOMIC_RELAXED);
3383                         return &shared_action->rss;
3384                 default:
3385                         break;
3386                 }
3387         }
3388         return NULL;
3389 }
3390
3391 struct rte_flow_shared_action *
3392 mlx5_flow_get_shared_rss(struct rte_flow *flow)
3393 {
3394         if (flow->shared_rss)
3395                 return container_of(flow->shared_rss,
3396                                     struct rte_flow_shared_action, rss);
3397         else
3398                 return NULL;
3399 }
3400
3401 static unsigned int
3402 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
3403 {
3404         const struct rte_flow_item *item;
3405         unsigned int has_vlan = 0;
3406
3407         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
3408                 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
3409                         has_vlan = 1;
3410                         break;
3411                 }
3412         }
3413         if (has_vlan)
3414                 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
3415                                        MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
3416         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
3417                                MLX5_EXPANSION_ROOT_OUTER;
3418 }
3419
3420 /**
3421  *  Get layer flags from the prefix flow.
3422  *
3423  *  Some flows may be split to several subflows, the prefix subflow gets the
3424  *  match items and the suffix sub flow gets the actions.
3425  *  Some actions need the user defined match item flags to get the detail for
3426  *  the action.
3427  *  This function helps the suffix flow to get the item layer flags from prefix
3428  *  subflow.
3429  *
3430  * @param[in] dev_flow
3431  *   Pointer the created preifx subflow.
3432  *
3433  * @return
3434  *   The layers get from prefix subflow.
3435  */
3436 static inline uint64_t
3437 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
3438 {
3439         uint64_t layers = 0;
3440
3441         /*
3442          * Layers bits could be localization, but usually the compiler will
3443          * help to do the optimization work for source code.
3444          * If no decap actions, use the layers directly.
3445          */
3446         if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP))
3447                 return dev_flow->handle->layers;
3448         /* Convert L3 layers with decap action. */
3449         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
3450                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3451         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
3452                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3453         /* Convert L4 layers with decap action.  */
3454         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
3455                 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
3456         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
3457                 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
3458         return layers;
3459 }
3460
3461 /**
3462  * Get metadata split action information.
3463  *
3464  * @param[in] actions
3465  *   Pointer to the list of actions.
3466  * @param[out] qrss
3467  *   Pointer to the return pointer.
3468  * @param[out] qrss_type
3469  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
3470  *   if no QUEUE/RSS is found.
3471  * @param[out] encap_idx
3472  *   Pointer to the index of the encap action if exists, otherwise the last
3473  *   action index.
3474  *
3475  * @return
3476  *   Total number of actions.
3477  */
3478 static int
3479 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
3480                                        const struct rte_flow_action **qrss,
3481                                        int *encap_idx)
3482 {
3483         const struct rte_flow_action_raw_encap *raw_encap;
3484         int actions_n = 0;
3485         int raw_decap_idx = -1;
3486
3487         *encap_idx = -1;
3488         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3489                 switch (actions->type) {
3490                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3491                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3492                         *encap_idx = actions_n;
3493                         break;
3494                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3495                         raw_decap_idx = actions_n;
3496                         break;
3497                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3498                         raw_encap = actions->conf;
3499                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3500                                 *encap_idx = raw_decap_idx != -1 ?
3501                                                       raw_decap_idx : actions_n;
3502                         break;
3503                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3504                 case RTE_FLOW_ACTION_TYPE_RSS:
3505                         *qrss = actions;
3506                         break;
3507                 default:
3508                         break;
3509                 }
3510                 actions_n++;
3511         }
3512         if (*encap_idx == -1)
3513                 *encap_idx = actions_n;
3514         /* Count RTE_FLOW_ACTION_TYPE_END. */
3515         return actions_n + 1;
3516 }
3517
3518 /**
3519  * Check meter action from the action list.
3520  *
3521  * @param[in] actions
3522  *   Pointer to the list of actions.
3523  * @param[out] mtr
3524  *   Pointer to the meter exist flag.
3525  *
3526  * @return
3527  *   Total number of actions.
3528  */
3529 static int
3530 flow_check_meter_action(const struct rte_flow_action actions[], uint32_t *mtr)
3531 {
3532         int actions_n = 0;
3533
3534         MLX5_ASSERT(mtr);
3535         *mtr = 0;
3536         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3537                 switch (actions->type) {
3538                 case RTE_FLOW_ACTION_TYPE_METER:
3539                         *mtr = 1;
3540                         break;
3541                 default:
3542                         break;
3543                 }
3544                 actions_n++;
3545         }
3546         /* Count RTE_FLOW_ACTION_TYPE_END. */
3547         return actions_n + 1;
3548 }
3549
3550 /**
3551  * Check if the flow should be split due to hairpin.
3552  * The reason for the split is that in current HW we can't
3553  * support encap and push-vlan on Rx, so if a flow contains
3554  * these actions we move it to Tx.
3555  *
3556  * @param dev
3557  *   Pointer to Ethernet device.
3558  * @param[in] attr
3559  *   Flow rule attributes.
3560  * @param[in] actions
3561  *   Associated actions (list terminated by the END action).
3562  *
3563  * @return
3564  *   > 0 the number of actions and the flow should be split,
3565  *   0 when no split required.
3566  */
3567 static int
3568 flow_check_hairpin_split(struct rte_eth_dev *dev,
3569                          const struct rte_flow_attr *attr,
3570                          const struct rte_flow_action actions[])
3571 {
3572         int queue_action = 0;
3573         int action_n = 0;
3574         int split = 0;
3575         const struct rte_flow_action_queue *queue;
3576         const struct rte_flow_action_rss *rss;
3577         const struct rte_flow_action_raw_encap *raw_encap;
3578         const struct rte_eth_hairpin_conf *conf;
3579
3580         if (!attr->ingress)
3581                 return 0;
3582         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3583                 switch (actions->type) {
3584                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3585                         queue = actions->conf;
3586                         if (queue == NULL)
3587                                 return 0;
3588                         conf = mlx5_rxq_get_hairpin_conf(dev, queue->index);
3589                         if (conf != NULL && !!conf->tx_explicit)
3590                                 return 0;
3591                         queue_action = 1;
3592                         action_n++;
3593                         break;
3594                 case RTE_FLOW_ACTION_TYPE_RSS:
3595                         rss = actions->conf;
3596                         if (rss == NULL || rss->queue_num == 0)
3597                                 return 0;
3598                         conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]);
3599                         if (conf != NULL && !!conf->tx_explicit)
3600                                 return 0;
3601                         queue_action = 1;
3602                         action_n++;
3603                         break;
3604                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3605                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3606                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3607                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3608                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
3609                         split++;
3610                         action_n++;
3611                         break;
3612                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3613                         raw_encap = actions->conf;
3614                         if (raw_encap->size >
3615                             (sizeof(struct rte_flow_item_eth) +
3616                              sizeof(struct rte_flow_item_ipv4)))
3617                                 split++;
3618                         action_n++;
3619                         break;
3620                 default:
3621                         action_n++;
3622                         break;
3623                 }
3624         }
3625         if (split && queue_action)
3626                 return action_n;
3627         return 0;
3628 }
3629
3630 /* Declare flow create/destroy prototype in advance. */
3631 static uint32_t
3632 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
3633                  const struct rte_flow_attr *attr,
3634                  const struct rte_flow_item items[],
3635                  const struct rte_flow_action actions[],
3636                  bool external, struct rte_flow_error *error);
3637
3638 static void
3639 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
3640                   uint32_t flow_idx);
3641
3642 struct mlx5_hlist_entry *
3643 flow_dv_mreg_create_cb(struct mlx5_hlist *list, uint64_t key,
3644                        void *cb_ctx)
3645 {
3646         struct rte_eth_dev *dev = list->ctx;
3647         struct mlx5_priv *priv = dev->data->dev_private;
3648         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3649         struct mlx5_flow_mreg_copy_resource *mcp_res;
3650         struct rte_flow_error *error = ctx->error;
3651         uint32_t idx = 0;
3652         int ret;
3653         uint32_t mark_id = key;
3654         struct rte_flow_attr attr = {
3655                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
3656                 .ingress = 1,
3657         };
3658         struct mlx5_rte_flow_item_tag tag_spec = {
3659                 .data = mark_id,
3660         };
3661         struct rte_flow_item items[] = {
3662                 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
3663         };
3664         struct rte_flow_action_mark ftag = {
3665                 .id = mark_id,
3666         };
3667         struct mlx5_flow_action_copy_mreg cp_mreg = {
3668                 .dst = REG_B,
3669                 .src = REG_NON,
3670         };
3671         struct rte_flow_action_jump jump = {
3672                 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
3673         };
3674         struct rte_flow_action actions[] = {
3675                 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
3676         };
3677
3678         /* Fill the register fileds in the flow. */
3679         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3680         if (ret < 0)
3681                 return NULL;
3682         tag_spec.id = ret;
3683         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
3684         if (ret < 0)
3685                 return NULL;
3686         cp_mreg.src = ret;
3687         /* Provide the full width of FLAG specific value. */
3688         if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
3689                 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
3690         /* Build a new flow. */
3691         if (mark_id != MLX5_DEFAULT_COPY_ID) {
3692                 items[0] = (struct rte_flow_item){
3693                         .type = (enum rte_flow_item_type)
3694                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
3695                         .spec = &tag_spec,
3696                 };
3697                 items[1] = (struct rte_flow_item){
3698                         .type = RTE_FLOW_ITEM_TYPE_END,
3699                 };
3700                 actions[0] = (struct rte_flow_action){
3701                         .type = (enum rte_flow_action_type)
3702                                 MLX5_RTE_FLOW_ACTION_TYPE_MARK,
3703                         .conf = &ftag,
3704                 };
3705                 actions[1] = (struct rte_flow_action){
3706                         .type = (enum rte_flow_action_type)
3707                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3708                         .conf = &cp_mreg,
3709                 };
3710                 actions[2] = (struct rte_flow_action){
3711                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
3712                         .conf = &jump,
3713                 };
3714                 actions[3] = (struct rte_flow_action){
3715                         .type = RTE_FLOW_ACTION_TYPE_END,
3716                 };
3717         } else {
3718                 /* Default rule, wildcard match. */
3719                 attr.priority = MLX5_FLOW_PRIO_RSVD;
3720                 items[0] = (struct rte_flow_item){
3721                         .type = RTE_FLOW_ITEM_TYPE_END,
3722                 };
3723                 actions[0] = (struct rte_flow_action){
3724                         .type = (enum rte_flow_action_type)
3725                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3726                         .conf = &cp_mreg,
3727                 };
3728                 actions[1] = (struct rte_flow_action){
3729                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
3730                         .conf = &jump,
3731                 };
3732                 actions[2] = (struct rte_flow_action){
3733                         .type = RTE_FLOW_ACTION_TYPE_END,
3734                 };
3735         }
3736         /* Build a new entry. */
3737         mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
3738         if (!mcp_res) {
3739                 rte_errno = ENOMEM;
3740                 return NULL;
3741         }
3742         mcp_res->idx = idx;
3743         /*
3744          * The copy Flows are not included in any list. There
3745          * ones are referenced from other Flows and can not
3746          * be applied, removed, deleted in ardbitrary order
3747          * by list traversing.
3748          */
3749         mcp_res->rix_flow = flow_list_create(dev, NULL, &attr, items,
3750                                          actions, false, error);
3751         if (!mcp_res->rix_flow) {
3752                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx);
3753                 return NULL;
3754         }
3755         return &mcp_res->hlist_ent;
3756 }
3757
3758 /**
3759  * Add a flow of copying flow metadata registers in RX_CP_TBL.
3760  *
3761  * As mark_id is unique, if there's already a registered flow for the mark_id,
3762  * return by increasing the reference counter of the resource. Otherwise, create
3763  * the resource (mcp_res) and flow.
3764  *
3765  * Flow looks like,
3766  *   - If ingress port is ANY and reg_c[1] is mark_id,
3767  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3768  *
3769  * For default flow (zero mark_id), flow is like,
3770  *   - If ingress port is ANY,
3771  *     reg_b := reg_c[0] and jump to RX_ACT_TBL.
3772  *
3773  * @param dev
3774  *   Pointer to Ethernet device.
3775  * @param mark_id
3776  *   ID of MARK action, zero means default flow for META.
3777  * @param[out] error
3778  *   Perform verbose error reporting if not NULL.
3779  *
3780  * @return
3781  *   Associated resource on success, NULL otherwise and rte_errno is set.
3782  */
3783 static struct mlx5_flow_mreg_copy_resource *
3784 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
3785                           struct rte_flow_error *error)
3786 {
3787         struct mlx5_priv *priv = dev->data->dev_private;
3788         struct mlx5_hlist_entry *entry;
3789         struct mlx5_flow_cb_ctx ctx = {
3790                 .dev = dev,
3791                 .error = error,
3792         };
3793
3794         /* Check if already registered. */
3795         MLX5_ASSERT(priv->mreg_cp_tbl);
3796         entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx);
3797         if (!entry)
3798                 return NULL;
3799         return container_of(entry, struct mlx5_flow_mreg_copy_resource,
3800                             hlist_ent);
3801 }
3802
3803 void
3804 flow_dv_mreg_remove_cb(struct mlx5_hlist *list, struct mlx5_hlist_entry *entry)
3805 {
3806         struct mlx5_flow_mreg_copy_resource *mcp_res =
3807                 container_of(entry, typeof(*mcp_res), hlist_ent);
3808         struct rte_eth_dev *dev = list->ctx;
3809         struct mlx5_priv *priv = dev->data->dev_private;
3810
3811         MLX5_ASSERT(mcp_res->rix_flow);
3812         flow_list_destroy(dev, NULL, mcp_res->rix_flow);
3813         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
3814 }
3815
3816 /**
3817  * Release flow in RX_CP_TBL.
3818  *
3819  * @param dev
3820  *   Pointer to Ethernet device.
3821  * @flow
3822  *   Parent flow for wich copying is provided.
3823  */
3824 static void
3825 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
3826                           struct rte_flow *flow)
3827 {
3828         struct mlx5_flow_mreg_copy_resource *mcp_res;
3829         struct mlx5_priv *priv = dev->data->dev_private;
3830
3831         if (!flow->rix_mreg_copy)
3832                 return;
3833         mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
3834                                  flow->rix_mreg_copy);
3835         if (!mcp_res || !priv->mreg_cp_tbl)
3836                 return;
3837         MLX5_ASSERT(mcp_res->rix_flow);
3838         mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
3839         flow->rix_mreg_copy = 0;
3840 }
3841
3842 /**
3843  * Remove the default copy action from RX_CP_TBL.
3844  *
3845  * This functions is called in the mlx5_dev_start(). No thread safe
3846  * is guaranteed.
3847  *
3848  * @param dev
3849  *   Pointer to Ethernet device.
3850  */
3851 static void
3852 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
3853 {
3854         struct mlx5_hlist_entry *entry;
3855         struct mlx5_priv *priv = dev->data->dev_private;
3856
3857         /* Check if default flow is registered. */
3858         if (!priv->mreg_cp_tbl)
3859                 return;
3860         entry = mlx5_hlist_lookup(priv->mreg_cp_tbl,
3861                                   MLX5_DEFAULT_COPY_ID, NULL);
3862         if (!entry)
3863                 return;
3864         mlx5_hlist_unregister(priv->mreg_cp_tbl, entry);
3865 }
3866
3867 /**
3868  * Add the default copy action in in RX_CP_TBL.
3869  *
3870  * This functions is called in the mlx5_dev_start(). No thread safe
3871  * is guaranteed.
3872  *
3873  * @param dev
3874  *   Pointer to Ethernet device.
3875  * @param[out] error
3876  *   Perform verbose error reporting if not NULL.
3877  *
3878  * @return
3879  *   0 for success, negative value otherwise and rte_errno is set.
3880  */
3881 static int
3882 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
3883                                   struct rte_flow_error *error)
3884 {
3885         struct mlx5_priv *priv = dev->data->dev_private;
3886         struct mlx5_flow_mreg_copy_resource *mcp_res;
3887
3888         /* Check whether extensive metadata feature is engaged. */
3889         if (!priv->config.dv_flow_en ||
3890             priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3891             !mlx5_flow_ext_mreg_supported(dev) ||
3892             !priv->sh->dv_regc0_mask)
3893                 return 0;
3894         /*
3895          * Add default mreg copy flow may be called multiple time, but
3896          * only be called once in stop. Avoid register it twice.
3897          */
3898         if (mlx5_hlist_lookup(priv->mreg_cp_tbl, MLX5_DEFAULT_COPY_ID, NULL))
3899                 return 0;
3900         mcp_res = flow_mreg_add_copy_action(dev, MLX5_DEFAULT_COPY_ID, error);
3901         if (!mcp_res)
3902                 return -rte_errno;
3903         return 0;
3904 }
3905
3906 /**
3907  * Add a flow of copying flow metadata registers in RX_CP_TBL.
3908  *
3909  * All the flow having Q/RSS action should be split by
3910  * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
3911  * performs the following,
3912  *   - CQE->flow_tag := reg_c[1] (MARK)
3913  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
3914  * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
3915  * but there should be a flow per each MARK ID set by MARK action.
3916  *
3917  * For the aforementioned reason, if there's a MARK action in flow's action
3918  * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
3919  * the MARK ID to CQE's flow_tag like,
3920  *   - If reg_c[1] is mark_id,
3921  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3922  *
3923  * For SET_META action which stores value in reg_c[0], as the destination is
3924  * also a flow metadata register (reg_b), adding a default flow is enough. Zero
3925  * MARK ID means the default flow. The default flow looks like,
3926  *   - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3927  *
3928  * @param dev
3929  *   Pointer to Ethernet device.
3930  * @param flow
3931  *   Pointer to flow structure.
3932  * @param[in] actions
3933  *   Pointer to the list of actions.
3934  * @param[out] error
3935  *   Perform verbose error reporting if not NULL.
3936  *
3937  * @return
3938  *   0 on success, negative value otherwise and rte_errno is set.
3939  */
3940 static int
3941 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
3942                             struct rte_flow *flow,
3943                             const struct rte_flow_action *actions,
3944                             struct rte_flow_error *error)
3945 {
3946         struct mlx5_priv *priv = dev->data->dev_private;
3947         struct mlx5_dev_config *config = &priv->config;
3948         struct mlx5_flow_mreg_copy_resource *mcp_res;
3949         const struct rte_flow_action_mark *mark;
3950
3951         /* Check whether extensive metadata feature is engaged. */
3952         if (!config->dv_flow_en ||
3953             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3954             !mlx5_flow_ext_mreg_supported(dev) ||
3955             !priv->sh->dv_regc0_mask)
3956                 return 0;
3957         /* Find MARK action. */
3958         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3959                 switch (actions->type) {
3960                 case RTE_FLOW_ACTION_TYPE_FLAG:
3961                         mcp_res = flow_mreg_add_copy_action
3962                                 (dev, MLX5_FLOW_MARK_DEFAULT, error);
3963                         if (!mcp_res)
3964                                 return -rte_errno;
3965                         flow->rix_mreg_copy = mcp_res->idx;
3966                         return 0;
3967                 case RTE_FLOW_ACTION_TYPE_MARK:
3968                         mark = (const struct rte_flow_action_mark *)
3969                                 actions->conf;
3970                         mcp_res =
3971                                 flow_mreg_add_copy_action(dev, mark->id, error);
3972                         if (!mcp_res)
3973                                 return -rte_errno;
3974                         flow->rix_mreg_copy = mcp_res->idx;
3975                         return 0;
3976                 default:
3977                         break;
3978                 }
3979         }
3980         return 0;
3981 }
3982
3983 #define MLX5_MAX_SPLIT_ACTIONS 24
3984 #define MLX5_MAX_SPLIT_ITEMS 24
3985
3986 /**
3987  * Split the hairpin flow.
3988  * Since HW can't support encap and push-vlan on Rx, we move these
3989  * actions to Tx.
3990  * If the count action is after the encap then we also
3991  * move the count action. in this case the count will also measure
3992  * the outer bytes.
3993  *
3994  * @param dev
3995  *   Pointer to Ethernet device.
3996  * @param[in] actions
3997  *   Associated actions (list terminated by the END action).
3998  * @param[out] actions_rx
3999  *   Rx flow actions.
4000  * @param[out] actions_tx
4001  *   Tx flow actions..
4002  * @param[out] pattern_tx
4003  *   The pattern items for the Tx flow.
4004  * @param[out] flow_id
4005  *   The flow ID connected to this flow.
4006  *
4007  * @return
4008  *   0 on success.
4009  */
4010 static int
4011 flow_hairpin_split(struct rte_eth_dev *dev,
4012                    const struct rte_flow_action actions[],
4013                    struct rte_flow_action actions_rx[],
4014                    struct rte_flow_action actions_tx[],
4015                    struct rte_flow_item pattern_tx[],
4016                    uint32_t flow_id)
4017 {
4018         const struct rte_flow_action_raw_encap *raw_encap;
4019         const struct rte_flow_action_raw_decap *raw_decap;
4020         struct mlx5_rte_flow_action_set_tag *set_tag;
4021         struct rte_flow_action *tag_action;
4022         struct mlx5_rte_flow_item_tag *tag_item;
4023         struct rte_flow_item *item;
4024         char *addr;
4025         int encap = 0;
4026
4027         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4028                 switch (actions->type) {
4029                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4030                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4031                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4032                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4033                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4034                         rte_memcpy(actions_tx, actions,
4035                                sizeof(struct rte_flow_action));
4036                         actions_tx++;
4037                         break;
4038                 case RTE_FLOW_ACTION_TYPE_COUNT:
4039                         if (encap) {
4040                                 rte_memcpy(actions_tx, actions,
4041                                            sizeof(struct rte_flow_action));
4042                                 actions_tx++;
4043                         } else {
4044                                 rte_memcpy(actions_rx, actions,
4045                                            sizeof(struct rte_flow_action));
4046                                 actions_rx++;
4047                         }
4048                         break;
4049                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4050                         raw_encap = actions->conf;
4051                         if (raw_encap->size >
4052                             (sizeof(struct rte_flow_item_eth) +
4053                              sizeof(struct rte_flow_item_ipv4))) {
4054                                 memcpy(actions_tx, actions,
4055                                        sizeof(struct rte_flow_action));
4056                                 actions_tx++;
4057                                 encap = 1;
4058                         } else {
4059                                 rte_memcpy(actions_rx, actions,
4060                                            sizeof(struct rte_flow_action));
4061                                 actions_rx++;
4062                         }
4063                         break;
4064                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4065                         raw_decap = actions->conf;
4066                         if (raw_decap->size <
4067                             (sizeof(struct rte_flow_item_eth) +
4068                              sizeof(struct rte_flow_item_ipv4))) {
4069                                 memcpy(actions_tx, actions,
4070                                        sizeof(struct rte_flow_action));
4071                                 actions_tx++;
4072                         } else {
4073                                 rte_memcpy(actions_rx, actions,
4074                                            sizeof(struct rte_flow_action));
4075                                 actions_rx++;
4076                         }
4077                         break;
4078                 default:
4079                         rte_memcpy(actions_rx, actions,
4080                                    sizeof(struct rte_flow_action));
4081                         actions_rx++;
4082                         break;
4083                 }
4084         }
4085         /* Add set meta action and end action for the Rx flow. */
4086         tag_action = actions_rx;
4087         tag_action->type = (enum rte_flow_action_type)
4088                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4089         actions_rx++;
4090         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
4091         actions_rx++;
4092         set_tag = (void *)actions_rx;
4093         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL);
4094         MLX5_ASSERT(set_tag->id > REG_NON);
4095         set_tag->data = flow_id;
4096         tag_action->conf = set_tag;
4097         /* Create Tx item list. */
4098         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
4099         addr = (void *)&pattern_tx[2];
4100         item = pattern_tx;
4101         item->type = (enum rte_flow_item_type)
4102                      MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4103         tag_item = (void *)addr;
4104         tag_item->data = flow_id;
4105         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
4106         MLX5_ASSERT(set_tag->id > REG_NON);
4107         item->spec = tag_item;
4108         addr += sizeof(struct mlx5_rte_flow_item_tag);
4109         tag_item = (void *)addr;
4110         tag_item->data = UINT32_MAX;
4111         tag_item->id = UINT16_MAX;
4112         item->mask = tag_item;
4113         item->last = NULL;
4114         item++;
4115         item->type = RTE_FLOW_ITEM_TYPE_END;
4116         return 0;
4117 }
4118
4119 __extension__
4120 union tunnel_offload_mark {
4121         uint32_t val;
4122         struct {
4123                 uint32_t app_reserve:8;
4124                 uint32_t table_id:15;
4125                 uint32_t transfer:1;
4126                 uint32_t _unused_:8;
4127         };
4128 };
4129
4130 struct tunnel_default_miss_ctx {
4131         uint16_t *queue;
4132         __extension__
4133         union {
4134                 struct rte_flow_action_rss action_rss;
4135                 struct rte_flow_action_queue miss_queue;
4136                 struct rte_flow_action_jump miss_jump;
4137                 uint8_t raw[0];
4138         };
4139 };
4140
4141 static int
4142 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
4143                              struct rte_flow *flow,
4144                              const struct rte_flow_attr *attr,
4145                              const struct rte_flow_action *app_actions,
4146                              uint32_t flow_idx,
4147                              struct tunnel_default_miss_ctx *ctx,
4148                              struct rte_flow_error *error)
4149 {
4150         struct mlx5_priv *priv = dev->data->dev_private;
4151         struct mlx5_flow *dev_flow;
4152         struct rte_flow_attr miss_attr = *attr;
4153         const struct mlx5_flow_tunnel *tunnel = app_actions[0].conf;
4154         const struct rte_flow_item miss_items[2] = {
4155                 {
4156                         .type = RTE_FLOW_ITEM_TYPE_ETH,
4157                         .spec = NULL,
4158                         .last = NULL,
4159                         .mask = NULL
4160                 },
4161                 {
4162                         .type = RTE_FLOW_ITEM_TYPE_END,
4163                         .spec = NULL,
4164                         .last = NULL,
4165                         .mask = NULL
4166                 }
4167         };
4168         union tunnel_offload_mark mark_id;
4169         struct rte_flow_action_mark miss_mark;
4170         struct rte_flow_action miss_actions[3] = {
4171                 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark },
4172                 [2] = { .type = RTE_FLOW_ACTION_TYPE_END,  .conf = NULL }
4173         };
4174         const struct rte_flow_action_jump *jump_data;
4175         uint32_t i, flow_table = 0; /* prevent compilation warning */
4176         struct flow_grp_info grp_info = {
4177                 .external = 1,
4178                 .transfer = attr->transfer,
4179                 .fdb_def_rule = !!priv->fdb_def_rule,
4180                 .std_tbl_fix = 0,
4181         };
4182         int ret;
4183
4184         if (!attr->transfer) {
4185                 uint32_t q_size;
4186
4187                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS;
4188                 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]);
4189                 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size,
4190                                          0, SOCKET_ID_ANY);
4191                 if (!ctx->queue)
4192                         return rte_flow_error_set
4193                                 (error, ENOMEM,
4194                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4195                                 NULL, "invalid default miss RSS");
4196                 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT,
4197                 ctx->action_rss.level = 0,
4198                 ctx->action_rss.types = priv->rss_conf.rss_hf,
4199                 ctx->action_rss.key_len = priv->rss_conf.rss_key_len,
4200                 ctx->action_rss.queue_num = priv->reta_idx_n,
4201                 ctx->action_rss.key = priv->rss_conf.rss_key,
4202                 ctx->action_rss.queue = ctx->queue;
4203                 if (!priv->reta_idx_n || !priv->rxqs_n)
4204                         return rte_flow_error_set
4205                                 (error, EINVAL,
4206                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4207                                 NULL, "invalid port configuration");
4208                 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
4209                         ctx->action_rss.types = 0;
4210                 for (i = 0; i != priv->reta_idx_n; ++i)
4211                         ctx->queue[i] = (*priv->reta_idx)[i];
4212         } else {
4213                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP;
4214                 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP;
4215         }
4216         miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw;
4217         for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++);
4218         jump_data = app_actions->conf;
4219         miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY;
4220         miss_attr.group = jump_data->group;
4221         ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group,
4222                                        &flow_table, grp_info, error);
4223         if (ret)
4224                 return rte_flow_error_set(error, EINVAL,
4225                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4226                                           NULL, "invalid tunnel id");
4227         mark_id.app_reserve = 0;
4228         mark_id.table_id = tunnel_flow_tbl_to_id(flow_table);
4229         mark_id.transfer = !!attr->transfer;
4230         mark_id._unused_ = 0;
4231         miss_mark.id = mark_id.val;
4232         dev_flow = flow_drv_prepare(dev, flow, &miss_attr,
4233                                     miss_items, miss_actions, flow_idx, error);
4234         if (!dev_flow)
4235                 return -rte_errno;
4236         dev_flow->flow = flow;
4237         dev_flow->external = true;
4238         dev_flow->tunnel = tunnel;
4239         /* Subflow object was created, we must include one in the list. */
4240         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4241                       dev_flow->handle, next);
4242         DRV_LOG(DEBUG,
4243                 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u",
4244                 dev->data->port_id, tunnel->app_tunnel.type,
4245                 tunnel->tunnel_id, miss_attr.priority, miss_attr.group);
4246         ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items,
4247                                   miss_actions, error);
4248         if (!ret)
4249                 ret = flow_mreg_update_copy_table(dev, flow, miss_actions,
4250                                                   error);
4251
4252         return ret;
4253 }
4254
4255 /**
4256  * The last stage of splitting chain, just creates the subflow
4257  * without any modification.
4258  *
4259  * @param[in] dev
4260  *   Pointer to Ethernet device.
4261  * @param[in] flow
4262  *   Parent flow structure pointer.
4263  * @param[in, out] sub_flow
4264  *   Pointer to return the created subflow, may be NULL.
4265  * @param[in] prefix_layers
4266  *   Prefix subflow layers, may be 0.
4267  * @param[in] prefix_mark
4268  *   Prefix subflow mark flag, may be 0.
4269  * @param[in] attr
4270  *   Flow rule attributes.
4271  * @param[in] items
4272  *   Pattern specification (list terminated by the END pattern item).
4273  * @param[in] actions
4274  *   Associated actions (list terminated by the END action).
4275  * @param[in] external
4276  *   This flow rule is created by request external to PMD.
4277  * @param[in] flow_idx
4278  *   This memory pool index to the flow.
4279  * @param[out] error
4280  *   Perform verbose error reporting if not NULL.
4281  * @return
4282  *   0 on success, negative value otherwise
4283  */
4284 static int
4285 flow_create_split_inner(struct rte_eth_dev *dev,
4286                         struct rte_flow *flow,
4287                         struct mlx5_flow **sub_flow,
4288                         uint64_t prefix_layers,
4289                         uint32_t prefix_mark,
4290                         const struct rte_flow_attr *attr,
4291                         const struct rte_flow_item items[],
4292                         const struct rte_flow_action actions[],
4293                         bool external, uint32_t flow_idx,
4294                         struct rte_flow_error *error)
4295 {
4296         struct mlx5_flow *dev_flow;
4297
4298         dev_flow = flow_drv_prepare(dev, flow, attr, items, actions,
4299                 flow_idx, error);
4300         if (!dev_flow)
4301                 return -rte_errno;
4302         dev_flow->flow = flow;
4303         dev_flow->external = external;
4304         /* Subflow object was created, we must include one in the list. */
4305         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4306                       dev_flow->handle, next);
4307         /*
4308          * If dev_flow is as one of the suffix flow, some actions in suffix
4309          * flow may need some user defined item layer flags, and pass the
4310          * Metadate rxq mark flag to suffix flow as well.
4311          */
4312         if (prefix_layers)
4313                 dev_flow->handle->layers = prefix_layers;
4314         if (prefix_mark)
4315                 dev_flow->handle->mark = 1;
4316         if (sub_flow)
4317                 *sub_flow = dev_flow;
4318         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
4319 }
4320
4321 /**
4322  * Split the meter flow.
4323  *
4324  * As meter flow will split to three sub flow, other than meter
4325  * action, the other actions make sense to only meter accepts
4326  * the packet. If it need to be dropped, no other additional
4327  * actions should be take.
4328  *
4329  * One kind of special action which decapsulates the L3 tunnel
4330  * header will be in the prefix sub flow, as not to take the
4331  * L3 tunnel header into account.
4332  *
4333  * @param dev
4334  *   Pointer to Ethernet device.
4335  * @param[in] items
4336  *   Pattern specification (list terminated by the END pattern item).
4337  * @param[out] sfx_items
4338  *   Suffix flow match items (list terminated by the END pattern item).
4339  * @param[in] actions
4340  *   Associated actions (list terminated by the END action).
4341  * @param[out] actions_sfx
4342  *   Suffix flow actions.
4343  * @param[out] actions_pre
4344  *   Prefix flow actions.
4345  * @param[out] pattern_sfx
4346  *   The pattern items for the suffix flow.
4347  * @param[out] tag_sfx
4348  *   Pointer to suffix flow tag.
4349  *
4350  * @return
4351  *   0 on success.
4352  */
4353 static int
4354 flow_meter_split_prep(struct rte_eth_dev *dev,
4355                  const struct rte_flow_item items[],
4356                  struct rte_flow_item sfx_items[],
4357                  const struct rte_flow_action actions[],
4358                  struct rte_flow_action actions_sfx[],
4359                  struct rte_flow_action actions_pre[])
4360 {
4361         struct mlx5_priv *priv = dev->data->dev_private;
4362         struct rte_flow_action *tag_action = NULL;
4363         struct rte_flow_item *tag_item;
4364         struct mlx5_rte_flow_action_set_tag *set_tag;
4365         struct rte_flow_error error;
4366         const struct rte_flow_action_raw_encap *raw_encap;
4367         const struct rte_flow_action_raw_decap *raw_decap;
4368         struct mlx5_rte_flow_item_tag *tag_spec;
4369         struct mlx5_rte_flow_item_tag *tag_mask;
4370         uint32_t tag_id = 0;
4371         bool copy_vlan = false;
4372
4373         /* Prepare the actions for prefix and suffix flow. */
4374         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4375                 struct rte_flow_action **action_cur = NULL;
4376
4377                 switch (actions->type) {
4378                 case RTE_FLOW_ACTION_TYPE_METER:
4379                         /* Add the extra tag action first. */
4380                         tag_action = actions_pre;
4381                         tag_action->type = (enum rte_flow_action_type)
4382                                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4383                         actions_pre++;
4384                         action_cur = &actions_pre;
4385                         break;
4386                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4387                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4388                         action_cur = &actions_pre;
4389                         break;
4390                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4391                         raw_encap = actions->conf;
4392                         if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
4393                                 action_cur = &actions_pre;
4394                         break;
4395                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4396                         raw_decap = actions->conf;
4397                         if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4398                                 action_cur = &actions_pre;
4399                         break;
4400                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4401                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4402                         copy_vlan = true;
4403                         break;
4404                 default:
4405                         break;
4406                 }
4407                 if (!action_cur)
4408                         action_cur = &actions_sfx;
4409                 memcpy(*action_cur, actions, sizeof(struct rte_flow_action));
4410                 (*action_cur)++;
4411         }
4412         /* Add end action to the actions. */
4413         actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
4414         actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
4415         actions_pre++;
4416         /* Set the tag. */
4417         set_tag = (void *)actions_pre;
4418         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
4419         mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
4420                           &tag_id);
4421         if (tag_id >= (1 << (sizeof(tag_id) * 8 - MLX5_MTR_COLOR_BITS))) {
4422                 DRV_LOG(ERR, "Port %u meter flow id exceed max limit.",
4423                         dev->data->port_id);
4424                 mlx5_ipool_free(priv->sh->ipool
4425                                 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], tag_id);
4426                 return 0;
4427         } else if (!tag_id) {
4428                 return 0;
4429         }
4430         set_tag->data = tag_id << MLX5_MTR_COLOR_BITS;
4431         assert(tag_action);
4432         tag_action->conf = set_tag;
4433         /* Prepare the suffix subflow items. */
4434         tag_item = sfx_items++;
4435         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4436                 int item_type = items->type;
4437
4438                 switch (item_type) {
4439                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4440                         memcpy(sfx_items, items, sizeof(*sfx_items));
4441                         sfx_items++;
4442                         break;
4443                 case RTE_FLOW_ITEM_TYPE_VLAN:
4444                         if (copy_vlan) {
4445                                 memcpy(sfx_items, items, sizeof(*sfx_items));
4446                                 /*
4447                                  * Convert to internal match item, it is used
4448                                  * for vlan push and set vid.
4449                                  */
4450                                 sfx_items->type = (enum rte_flow_item_type)
4451                                                   MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
4452                                 sfx_items++;
4453                         }
4454                         break;
4455                 default:
4456                         break;
4457                 }
4458         }
4459         sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
4460         sfx_items++;
4461         tag_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
4462         tag_spec->data = tag_id << MLX5_MTR_COLOR_BITS;
4463         tag_spec->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
4464         tag_mask = tag_spec + 1;
4465         tag_mask->data = 0xffffff00;
4466         tag_item->type = (enum rte_flow_item_type)
4467                          MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4468         tag_item->spec = tag_spec;
4469         tag_item->last = NULL;
4470         tag_item->mask = tag_mask;
4471         return tag_id;
4472 }
4473
4474 /**
4475  * Split action list having QUEUE/RSS for metadata register copy.
4476  *
4477  * Once Q/RSS action is detected in user's action list, the flow action
4478  * should be split in order to copy metadata registers, which will happen in
4479  * RX_CP_TBL like,
4480  *   - CQE->flow_tag := reg_c[1] (MARK)
4481  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4482  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
4483  * This is because the last action of each flow must be a terminal action
4484  * (QUEUE, RSS or DROP).
4485  *
4486  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
4487  * stored and kept in the mlx5_flow structure per each sub_flow.
4488  *
4489  * The Q/RSS action is replaced with,
4490  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
4491  * And the following JUMP action is added at the end,
4492  *   - JUMP, to RX_CP_TBL.
4493  *
4494  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
4495  * flow_create_split_metadata() routine. The flow will look like,
4496  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
4497  *
4498  * @param dev
4499  *   Pointer to Ethernet device.
4500  * @param[out] split_actions
4501  *   Pointer to store split actions to jump to CP_TBL.
4502  * @param[in] actions
4503  *   Pointer to the list of original flow actions.
4504  * @param[in] qrss
4505  *   Pointer to the Q/RSS action.
4506  * @param[in] actions_n
4507  *   Number of original actions.
4508  * @param[out] error
4509  *   Perform verbose error reporting if not NULL.
4510  *
4511  * @return
4512  *   non-zero unique flow_id on success, otherwise 0 and
4513  *   error/rte_error are set.
4514  */
4515 static uint32_t
4516 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
4517                           struct rte_flow_action *split_actions,
4518                           const struct rte_flow_action *actions,
4519                           const struct rte_flow_action *qrss,
4520                           int actions_n, struct rte_flow_error *error)
4521 {
4522         struct mlx5_priv *priv = dev->data->dev_private;
4523         struct mlx5_rte_flow_action_set_tag *set_tag;
4524         struct rte_flow_action_jump *jump;
4525         const int qrss_idx = qrss - actions;
4526         uint32_t flow_id = 0;
4527         int ret = 0;
4528
4529         /*
4530          * Given actions will be split
4531          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
4532          * - Add jump to mreg CP_TBL.
4533          * As a result, there will be one more action.
4534          */
4535         ++actions_n;
4536         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
4537         set_tag = (void *)(split_actions + actions_n);
4538         /*
4539          * If tag action is not set to void(it means we are not the meter
4540          * suffix flow), add the tag action. Since meter suffix flow already
4541          * has the tag added.
4542          */
4543         if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) {
4544                 /*
4545                  * Allocate the new subflow ID. This one is unique within
4546                  * device and not shared with representors. Otherwise,
4547                  * we would have to resolve multi-thread access synch
4548                  * issue. Each flow on the shared device is appended
4549                  * with source vport identifier, so the resulting
4550                  * flows will be unique in the shared (by master and
4551                  * representors) domain even if they have coinciding
4552                  * IDs.
4553                  */
4554                 mlx5_ipool_malloc(priv->sh->ipool
4555                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id);
4556                 if (!flow_id)
4557                         return rte_flow_error_set(error, ENOMEM,
4558                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4559                                                   NULL, "can't allocate id "
4560                                                   "for split Q/RSS subflow");
4561                 /* Internal SET_TAG action to set flow ID. */
4562                 *set_tag = (struct mlx5_rte_flow_action_set_tag){
4563                         .data = flow_id,
4564                 };
4565                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
4566                 if (ret < 0)
4567                         return ret;
4568                 set_tag->id = ret;
4569                 /* Construct new actions array. */
4570                 /* Replace QUEUE/RSS action. */
4571                 split_actions[qrss_idx] = (struct rte_flow_action){
4572                         .type = (enum rte_flow_action_type)
4573                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
4574                         .conf = set_tag,
4575                 };
4576         }
4577         /* JUMP action to jump to mreg copy table (CP_TBL). */
4578         jump = (void *)(set_tag + 1);
4579         *jump = (struct rte_flow_action_jump){
4580                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
4581         };
4582         split_actions[actions_n - 2] = (struct rte_flow_action){
4583                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
4584                 .conf = jump,
4585         };
4586         split_actions[actions_n - 1] = (struct rte_flow_action){
4587                 .type = RTE_FLOW_ACTION_TYPE_END,
4588         };
4589         return flow_id;
4590 }
4591
4592 /**
4593  * Extend the given action list for Tx metadata copy.
4594  *
4595  * Copy the given action list to the ext_actions and add flow metadata register
4596  * copy action in order to copy reg_a set by WQE to reg_c[0].
4597  *
4598  * @param[out] ext_actions
4599  *   Pointer to the extended action list.
4600  * @param[in] actions
4601  *   Pointer to the list of actions.
4602  * @param[in] actions_n
4603  *   Number of actions in the list.
4604  * @param[out] error
4605  *   Perform verbose error reporting if not NULL.
4606  * @param[in] encap_idx
4607  *   The encap action inndex.
4608  *
4609  * @return
4610  *   0 on success, negative value otherwise
4611  */
4612 static int
4613 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
4614                        struct rte_flow_action *ext_actions,
4615                        const struct rte_flow_action *actions,
4616                        int actions_n, struct rte_flow_error *error,
4617                        int encap_idx)
4618 {
4619         struct mlx5_flow_action_copy_mreg *cp_mreg =
4620                 (struct mlx5_flow_action_copy_mreg *)
4621                         (ext_actions + actions_n + 1);
4622         int ret;
4623
4624         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
4625         if (ret < 0)
4626                 return ret;
4627         cp_mreg->dst = ret;
4628         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
4629         if (ret < 0)
4630                 return ret;
4631         cp_mreg->src = ret;
4632         if (encap_idx != 0)
4633                 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
4634         if (encap_idx == actions_n - 1) {
4635                 ext_actions[actions_n - 1] = (struct rte_flow_action){
4636                         .type = (enum rte_flow_action_type)
4637                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4638                         .conf = cp_mreg,
4639                 };
4640                 ext_actions[actions_n] = (struct rte_flow_action){
4641                         .type = RTE_FLOW_ACTION_TYPE_END,
4642                 };
4643         } else {
4644                 ext_actions[encap_idx] = (struct rte_flow_action){
4645                         .type = (enum rte_flow_action_type)
4646                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4647                         .conf = cp_mreg,
4648                 };
4649                 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
4650                                 sizeof(*ext_actions) * (actions_n - encap_idx));
4651         }
4652         return 0;
4653 }
4654
4655 /**
4656  * Check the match action from the action list.
4657  *
4658  * @param[in] actions
4659  *   Pointer to the list of actions.
4660  * @param[in] attr
4661  *   Flow rule attributes.
4662  * @param[in] action
4663  *   The action to be check if exist.
4664  * @param[out] match_action_pos
4665  *   Pointer to the position of the matched action if exists, otherwise is -1.
4666  * @param[out] qrss_action_pos
4667  *   Pointer to the position of the Queue/RSS action if exists, otherwise is -1.
4668  *
4669  * @return
4670  *   > 0 the total number of actions.
4671  *   0 if not found match action in action list.
4672  */
4673 static int
4674 flow_check_match_action(const struct rte_flow_action actions[],
4675                         const struct rte_flow_attr *attr,
4676                         enum rte_flow_action_type action,
4677                         int *match_action_pos, int *qrss_action_pos)
4678 {
4679         const struct rte_flow_action_sample *sample;
4680         int actions_n = 0;
4681         int jump_flag = 0;
4682         uint32_t ratio = 0;
4683         int sub_type = 0;
4684         int flag = 0;
4685
4686         *match_action_pos = -1;
4687         *qrss_action_pos = -1;
4688         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4689                 if (actions->type == action) {
4690                         flag = 1;
4691                         *match_action_pos = actions_n;
4692                 }
4693                 if (actions->type == RTE_FLOW_ACTION_TYPE_QUEUE ||
4694                     actions->type == RTE_FLOW_ACTION_TYPE_RSS)
4695                         *qrss_action_pos = actions_n;
4696                 if (actions->type == RTE_FLOW_ACTION_TYPE_JUMP)
4697                         jump_flag = 1;
4698                 if (actions->type == RTE_FLOW_ACTION_TYPE_SAMPLE) {
4699                         sample = actions->conf;
4700                         ratio = sample->ratio;
4701                         sub_type = ((const struct rte_flow_action *)
4702                                         (sample->actions))->type;
4703                 }
4704                 actions_n++;
4705         }
4706         if (flag && action == RTE_FLOW_ACTION_TYPE_SAMPLE && attr->transfer) {
4707                 if (ratio == 1) {
4708                         /* JUMP Action not support for Mirroring;
4709                          * Mirroring support multi-destination;
4710                          */
4711                         if (!jump_flag && sub_type != RTE_FLOW_ACTION_TYPE_END)
4712                                 flag = 0;
4713                 }
4714         }
4715         /* Count RTE_FLOW_ACTION_TYPE_END. */
4716         return flag ? actions_n + 1 : 0;
4717 }
4718
4719 #define SAMPLE_SUFFIX_ITEM 2
4720
4721 /**
4722  * Split the sample flow.
4723  *
4724  * As sample flow will split to two sub flow, sample flow with
4725  * sample action, the other actions will move to new suffix flow.
4726  *
4727  * Also add unique tag id with tag action in the sample flow,
4728  * the same tag id will be as match in the suffix flow.
4729  *
4730  * @param dev
4731  *   Pointer to Ethernet device.
4732  * @param[in] fdb_tx
4733  *   FDB egress flow flag.
4734  * @param[out] sfx_items
4735  *   Suffix flow match items (list terminated by the END pattern item).
4736  * @param[in] actions
4737  *   Associated actions (list terminated by the END action).
4738  * @param[out] actions_sfx
4739  *   Suffix flow actions.
4740  * @param[out] actions_pre
4741  *   Prefix flow actions.
4742  * @param[in] actions_n
4743  *  The total number of actions.
4744  * @param[in] sample_action_pos
4745  *   The sample action position.
4746  * @param[in] qrss_action_pos
4747  *   The Queue/RSS action position.
4748  * @param[out] error
4749  *   Perform verbose error reporting if not NULL.
4750  *
4751  * @return
4752  *   0 on success, or unique flow_id, a negative errno value
4753  *   otherwise and rte_errno is set.
4754  */
4755 static int
4756 flow_sample_split_prep(struct rte_eth_dev *dev,
4757                        uint32_t fdb_tx,
4758                        struct rte_flow_item sfx_items[],
4759                        const struct rte_flow_action actions[],
4760                        struct rte_flow_action actions_sfx[],
4761                        struct rte_flow_action actions_pre[],
4762                        int actions_n,
4763                        int sample_action_pos,
4764                        int qrss_action_pos,
4765                        struct rte_flow_error *error)
4766 {
4767         struct mlx5_priv *priv = dev->data->dev_private;
4768         struct mlx5_rte_flow_action_set_tag *set_tag;
4769         struct mlx5_rte_flow_item_tag *tag_spec;
4770         struct mlx5_rte_flow_item_tag *tag_mask;
4771         uint32_t tag_id = 0;
4772         int index;
4773         int ret;
4774
4775         if (sample_action_pos < 0)
4776                 return rte_flow_error_set(error, EINVAL,
4777                                           RTE_FLOW_ERROR_TYPE_ACTION,
4778                                           NULL, "invalid position of sample "
4779                                           "action in list");
4780         if (!fdb_tx) {
4781                 /* Prepare the prefix tag action. */
4782                 set_tag = (void *)(actions_pre + actions_n + 1);
4783                 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error);
4784                 if (ret < 0)
4785                         return ret;
4786                 set_tag->id = ret;
4787                 mlx5_ipool_malloc(priv->sh->ipool
4788                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id);
4789                 set_tag->data = tag_id;
4790                 /* Prepare the suffix subflow items. */
4791                 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM);
4792                 tag_spec->data = tag_id;
4793                 tag_spec->id = set_tag->id;
4794                 tag_mask = tag_spec + 1;
4795                 tag_mask->data = UINT32_MAX;
4796                 sfx_items[0] = (struct rte_flow_item){
4797                         .type = (enum rte_flow_item_type)
4798                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
4799                         .spec = tag_spec,
4800                         .last = NULL,
4801                         .mask = tag_mask,
4802                 };
4803                 sfx_items[1] = (struct rte_flow_item){
4804                         .type = (enum rte_flow_item_type)
4805                                 RTE_FLOW_ITEM_TYPE_END,
4806                 };
4807         }
4808         /* Prepare the actions for prefix and suffix flow. */
4809         if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) {
4810                 index = qrss_action_pos;
4811                 /* Put the preceding the Queue/RSS action into prefix flow. */
4812                 if (index != 0)
4813                         memcpy(actions_pre, actions,
4814                                sizeof(struct rte_flow_action) * index);
4815                 /* Put others preceding the sample action into prefix flow. */
4816                 if (sample_action_pos > index + 1)
4817                         memcpy(actions_pre + index, actions + index + 1,
4818                                sizeof(struct rte_flow_action) *
4819                                (sample_action_pos - index - 1));
4820                 index = sample_action_pos - 1;
4821                 /* Put Queue/RSS action into Suffix flow. */
4822                 memcpy(actions_sfx, actions + qrss_action_pos,
4823                        sizeof(struct rte_flow_action));
4824                 actions_sfx++;
4825         } else {
4826                 index = sample_action_pos;
4827                 if (index != 0)
4828                         memcpy(actions_pre, actions,
4829                                sizeof(struct rte_flow_action) * index);
4830         }
4831         /* Add the extra tag action for NIC-RX and E-Switch ingress. */
4832         if (!fdb_tx) {
4833                 actions_pre[index++] =
4834                         (struct rte_flow_action){
4835                         .type = (enum rte_flow_action_type)
4836                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
4837                         .conf = set_tag,
4838                 };
4839         }
4840         memcpy(actions_pre + index, actions + sample_action_pos,
4841                sizeof(struct rte_flow_action));
4842         index += 1;
4843         actions_pre[index] = (struct rte_flow_action){
4844                 .type = (enum rte_flow_action_type)
4845                         RTE_FLOW_ACTION_TYPE_END,
4846         };
4847         /* Put the actions after sample into Suffix flow. */
4848         memcpy(actions_sfx, actions + sample_action_pos + 1,
4849                sizeof(struct rte_flow_action) *
4850                (actions_n - sample_action_pos - 1));
4851         return tag_id;
4852 }
4853
4854 /**
4855  * The splitting for metadata feature.
4856  *
4857  * - Q/RSS action on NIC Rx should be split in order to pass by
4858  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
4859  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
4860  *
4861  * - All the actions on NIC Tx should have a mreg copy action to
4862  *   copy reg_a from WQE to reg_c[0].
4863  *
4864  * @param dev
4865  *   Pointer to Ethernet device.
4866  * @param[in] flow
4867  *   Parent flow structure pointer.
4868  * @param[in] prefix_layers
4869  *   Prefix flow layer flags.
4870  * @param[in] prefix_mark
4871  *   Prefix subflow mark flag, may be 0.
4872  * @param[in] attr
4873  *   Flow rule attributes.
4874  * @param[in] items
4875  *   Pattern specification (list terminated by the END pattern item).
4876  * @param[in] actions
4877  *   Associated actions (list terminated by the END action).
4878  * @param[in] external
4879  *   This flow rule is created by request external to PMD.
4880  * @param[in] flow_idx
4881  *   This memory pool index to the flow.
4882  * @param[out] error
4883  *   Perform verbose error reporting if not NULL.
4884  * @return
4885  *   0 on success, negative value otherwise
4886  */
4887 static int
4888 flow_create_split_metadata(struct rte_eth_dev *dev,
4889                            struct rte_flow *flow,
4890                            uint64_t prefix_layers,
4891                            uint32_t prefix_mark,
4892                            const struct rte_flow_attr *attr,
4893                            const struct rte_flow_item items[],
4894                            const struct rte_flow_action actions[],
4895                            bool external, uint32_t flow_idx,
4896                            struct rte_flow_error *error)
4897 {
4898         struct mlx5_priv *priv = dev->data->dev_private;
4899         struct mlx5_dev_config *config = &priv->config;
4900         const struct rte_flow_action *qrss = NULL;
4901         struct rte_flow_action *ext_actions = NULL;
4902         struct mlx5_flow *dev_flow = NULL;
4903         uint32_t qrss_id = 0;
4904         int mtr_sfx = 0;
4905         size_t act_size;
4906         int actions_n;
4907         int encap_idx;
4908         int ret;
4909
4910         /* Check whether extensive metadata feature is engaged. */
4911         if (!config->dv_flow_en ||
4912             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4913             !mlx5_flow_ext_mreg_supported(dev))
4914                 return flow_create_split_inner(dev, flow, NULL, prefix_layers,
4915                                                prefix_mark, attr, items,
4916                                                actions, external, flow_idx,
4917                                                error);
4918         actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
4919                                                            &encap_idx);
4920         if (qrss) {
4921                 /* Exclude hairpin flows from splitting. */
4922                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
4923                         const struct rte_flow_action_queue *queue;
4924
4925                         queue = qrss->conf;
4926                         if (mlx5_rxq_get_type(dev, queue->index) ==
4927                             MLX5_RXQ_TYPE_HAIRPIN)
4928                                 qrss = NULL;
4929                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
4930                         const struct rte_flow_action_rss *rss;
4931
4932                         rss = qrss->conf;
4933                         if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
4934                             MLX5_RXQ_TYPE_HAIRPIN)
4935                                 qrss = NULL;
4936                 }
4937         }
4938         if (qrss) {
4939                 /* Check if it is in meter suffix table. */
4940                 mtr_sfx = attr->group == (attr->transfer ?
4941                           (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
4942                           MLX5_FLOW_TABLE_LEVEL_SUFFIX);
4943                 /*
4944                  * Q/RSS action on NIC Rx should be split in order to pass by
4945                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
4946                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
4947                  */
4948                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
4949                            sizeof(struct rte_flow_action_set_tag) +
4950                            sizeof(struct rte_flow_action_jump);
4951                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
4952                                           SOCKET_ID_ANY);
4953                 if (!ext_actions)
4954                         return rte_flow_error_set(error, ENOMEM,
4955                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4956                                                   NULL, "no memory to split "
4957                                                   "metadata flow");
4958                 /*
4959                  * If we are the suffix flow of meter, tag already exist.
4960                  * Set the tag action to void.
4961                  */
4962                 if (mtr_sfx)
4963                         ext_actions[qrss - actions].type =
4964                                                 RTE_FLOW_ACTION_TYPE_VOID;
4965                 else
4966                         ext_actions[qrss - actions].type =
4967                                                 (enum rte_flow_action_type)
4968                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4969                 /*
4970                  * Create the new actions list with removed Q/RSS action
4971                  * and appended set tag and jump to register copy table
4972                  * (RX_CP_TBL). We should preallocate unique tag ID here
4973                  * in advance, because it is needed for set tag action.
4974                  */
4975                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
4976                                                     qrss, actions_n, error);
4977                 if (!mtr_sfx && !qrss_id) {
4978                         ret = -rte_errno;
4979                         goto exit;
4980                 }
4981         } else if (attr->egress && !attr->transfer) {
4982                 /*
4983                  * All the actions on NIC Tx should have a metadata register
4984                  * copy action to copy reg_a from WQE to reg_c[meta]
4985                  */
4986                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
4987                            sizeof(struct mlx5_flow_action_copy_mreg);
4988                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
4989                                           SOCKET_ID_ANY);
4990                 if (!ext_actions)
4991                         return rte_flow_error_set(error, ENOMEM,
4992                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4993                                                   NULL, "no memory to split "
4994                                                   "metadata flow");
4995                 /* Create the action list appended with copy register. */
4996                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
4997                                              actions_n, error, encap_idx);
4998                 if (ret < 0)
4999                         goto exit;
5000         }
5001         /* Add the unmodified original or prefix subflow. */
5002         ret = flow_create_split_inner(dev, flow, &dev_flow, prefix_layers,
5003                                       prefix_mark, attr,
5004                                       items, ext_actions ? ext_actions :
5005                                       actions, external, flow_idx, error);
5006         if (ret < 0)
5007                 goto exit;
5008         MLX5_ASSERT(dev_flow);
5009         if (qrss) {
5010                 const struct rte_flow_attr q_attr = {
5011                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5012                         .ingress = 1,
5013                 };
5014                 /* Internal PMD action to set register. */
5015                 struct mlx5_rte_flow_item_tag q_tag_spec = {
5016                         .data = qrss_id,
5017                         .id = REG_NON,
5018                 };
5019                 struct rte_flow_item q_items[] = {
5020                         {
5021                                 .type = (enum rte_flow_item_type)
5022                                         MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5023                                 .spec = &q_tag_spec,
5024                                 .last = NULL,
5025                                 .mask = NULL,
5026                         },
5027                         {
5028                                 .type = RTE_FLOW_ITEM_TYPE_END,
5029                         },
5030                 };
5031                 struct rte_flow_action q_actions[] = {
5032                         {
5033                                 .type = qrss->type,
5034                                 .conf = qrss->conf,
5035                         },
5036                         {
5037                                 .type = RTE_FLOW_ACTION_TYPE_END,
5038                         },
5039                 };
5040                 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
5041
5042                 /*
5043                  * Configure the tag item only if there is no meter subflow.
5044                  * Since tag is already marked in the meter suffix subflow
5045                  * we can just use the meter suffix items as is.
5046                  */
5047                 if (qrss_id) {
5048                         /* Not meter subflow. */
5049                         MLX5_ASSERT(!mtr_sfx);
5050                         /*
5051                          * Put unique id in prefix flow due to it is destroyed
5052                          * after suffix flow and id will be freed after there
5053                          * is no actual flows with this id and identifier
5054                          * reallocation becomes possible (for example, for
5055                          * other flows in other threads).
5056                          */
5057                         dev_flow->handle->split_flow_id = qrss_id;
5058                         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
5059                                                    error);
5060                         if (ret < 0)
5061                                 goto exit;
5062                         q_tag_spec.id = ret;
5063                 }
5064                 dev_flow = NULL;
5065                 /* Add suffix subflow to execute Q/RSS. */
5066                 ret = flow_create_split_inner(dev, flow, &dev_flow, layers, 0,
5067                                               &q_attr, mtr_sfx ? items :
5068                                               q_items, q_actions,
5069                                               external, flow_idx, error);
5070                 if (ret < 0)
5071                         goto exit;
5072                 /* qrss ID should be freed if failed. */
5073                 qrss_id = 0;
5074                 MLX5_ASSERT(dev_flow);
5075         }
5076
5077 exit:
5078         /*
5079          * We do not destroy the partially created sub_flows in case of error.
5080          * These ones are included into parent flow list and will be destroyed
5081          * by flow_drv_destroy.
5082          */
5083         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
5084                         qrss_id);
5085         mlx5_free(ext_actions);
5086         return ret;
5087 }
5088
5089 /**
5090  * The splitting for meter feature.
5091  *
5092  * - The meter flow will be split to two flows as prefix and
5093  *   suffix flow. The packets make sense only it pass the prefix
5094  *   meter action.
5095  *
5096  * - Reg_C_5 is used for the packet to match betweend prefix and
5097  *   suffix flow.
5098  *
5099  * @param dev
5100  *   Pointer to Ethernet device.
5101  * @param[in] flow
5102  *   Parent flow structure pointer.
5103  * @param[in] prefix_layers
5104  *   Prefix subflow layers, may be 0.
5105  * @param[in] prefix_mark
5106  *   Prefix subflow mark flag, may be 0.
5107  * @param[in] attr
5108  *   Flow rule attributes.
5109  * @param[in] items
5110  *   Pattern specification (list terminated by the END pattern item).
5111  * @param[in] actions
5112  *   Associated actions (list terminated by the END action).
5113  * @param[in] external
5114  *   This flow rule is created by request external to PMD.
5115  * @param[in] flow_idx
5116  *   This memory pool index to the flow.
5117  * @param[out] error
5118  *   Perform verbose error reporting if not NULL.
5119  * @return
5120  *   0 on success, negative value otherwise
5121  */
5122 static int
5123 flow_create_split_meter(struct rte_eth_dev *dev,
5124                         struct rte_flow *flow,
5125                         uint64_t prefix_layers,
5126                         uint32_t prefix_mark,
5127                         const struct rte_flow_attr *attr,
5128                         const struct rte_flow_item items[],
5129                         const struct rte_flow_action actions[],
5130                         bool external, uint32_t flow_idx,
5131                         struct rte_flow_error *error)
5132 {
5133         struct mlx5_priv *priv = dev->data->dev_private;
5134         struct rte_flow_action *sfx_actions = NULL;
5135         struct rte_flow_action *pre_actions = NULL;
5136         struct rte_flow_item *sfx_items = NULL;
5137         struct mlx5_flow *dev_flow = NULL;
5138         struct rte_flow_attr sfx_attr = *attr;
5139         uint32_t mtr = 0;
5140         uint32_t mtr_tag_id = 0;
5141         size_t act_size;
5142         size_t item_size;
5143         int actions_n = 0;
5144         int ret;
5145
5146         if (priv->mtr_en)
5147                 actions_n = flow_check_meter_action(actions, &mtr);
5148         if (mtr) {
5149                 /* The five prefix actions: meter, decap, encap, tag, end. */
5150                 act_size = sizeof(struct rte_flow_action) * (actions_n + 5) +
5151                            sizeof(struct mlx5_rte_flow_action_set_tag);
5152                 /* tag, vlan, port id, end. */
5153 #define METER_SUFFIX_ITEM 4
5154                 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
5155                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
5156                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size),
5157                                           0, SOCKET_ID_ANY);
5158                 if (!sfx_actions)
5159                         return rte_flow_error_set(error, ENOMEM,
5160                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5161                                                   NULL, "no memory to split "
5162                                                   "meter flow");
5163                 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
5164                              act_size);
5165                 pre_actions = sfx_actions + actions_n;
5166                 mtr_tag_id = flow_meter_split_prep(dev, items, sfx_items,
5167                                                    actions, sfx_actions,
5168                                                    pre_actions);
5169                 if (!mtr_tag_id) {
5170                         ret = -rte_errno;
5171                         goto exit;
5172                 }
5173                 /* Add the prefix subflow. */
5174                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5175                                               prefix_layers, 0,
5176                                               attr, items,
5177                                               pre_actions, external,
5178                                               flow_idx, error);
5179                 if (ret) {
5180                         ret = -rte_errno;
5181                         goto exit;
5182                 }
5183                 dev_flow->handle->split_flow_id = mtr_tag_id;
5184                 /* Setting the sfx group atrr. */
5185                 sfx_attr.group = sfx_attr.transfer ?
5186                                 (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
5187                                  MLX5_FLOW_TABLE_LEVEL_SUFFIX;
5188         }
5189         /* Add the prefix subflow. */
5190         ret = flow_create_split_metadata(dev, flow, dev_flow ?
5191                                          flow_get_prefix_layer_flags(dev_flow) :
5192                                          prefix_layers, dev_flow ?
5193                                          dev_flow->handle->mark : prefix_mark,
5194                                          &sfx_attr, sfx_items ?
5195                                          sfx_items : items,
5196                                          sfx_actions ? sfx_actions : actions,
5197                                          external, flow_idx, error);
5198 exit:
5199         if (sfx_actions)
5200                 mlx5_free(sfx_actions);
5201         return ret;
5202 }
5203
5204 /**
5205  * The splitting for sample feature.
5206  *
5207  * Once Sample action is detected in the action list, the flow actions should
5208  * be split into prefix sub flow and suffix sub flow.
5209  *
5210  * The original items remain in the prefix sub flow, all actions preceding the
5211  * sample action and the sample action itself will be copied to the prefix
5212  * sub flow, the actions following the sample action will be copied to the
5213  * suffix sub flow, Queue action always be located in the suffix sub flow.
5214  *
5215  * In order to make the packet from prefix sub flow matches with suffix sub
5216  * flow, an extra tag action be added into prefix sub flow, and the suffix sub
5217  * flow uses tag item with the unique flow id.
5218  *
5219  * @param dev
5220  *   Pointer to Ethernet device.
5221  * @param[in] flow
5222  *   Parent flow structure pointer.
5223  * @param[in] attr
5224  *   Flow rule attributes.
5225  * @param[in] items
5226  *   Pattern specification (list terminated by the END pattern item).
5227  * @param[in] actions
5228  *   Associated actions (list terminated by the END action).
5229  * @param[in] external
5230  *   This flow rule is created by request external to PMD.
5231  * @param[in] flow_idx
5232  *   This memory pool index to the flow.
5233  * @param[out] error
5234  *   Perform verbose error reporting if not NULL.
5235  * @return
5236  *   0 on success, negative value otherwise
5237  */
5238 static int
5239 flow_create_split_sample(struct rte_eth_dev *dev,
5240                          struct rte_flow *flow,
5241                          const struct rte_flow_attr *attr,
5242                          const struct rte_flow_item items[],
5243                          const struct rte_flow_action actions[],
5244                          bool external, uint32_t flow_idx,
5245                          struct rte_flow_error *error)
5246 {
5247         struct mlx5_priv *priv = dev->data->dev_private;
5248         struct rte_flow_action *sfx_actions = NULL;
5249         struct rte_flow_action *pre_actions = NULL;
5250         struct rte_flow_item *sfx_items = NULL;
5251         struct mlx5_flow *dev_flow = NULL;
5252         struct rte_flow_attr sfx_attr = *attr;
5253 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5254         struct mlx5_flow_dv_sample_resource *sample_res;
5255         struct mlx5_flow_tbl_data_entry *sfx_tbl_data;
5256         struct mlx5_flow_tbl_resource *sfx_tbl;
5257         union mlx5_flow_tbl_key sfx_table_key;
5258 #endif
5259         size_t act_size;
5260         size_t item_size;
5261         uint32_t fdb_tx = 0;
5262         int32_t tag_id = 0;
5263         int actions_n = 0;
5264         int sample_action_pos;
5265         int qrss_action_pos;
5266         int ret = 0;
5267
5268         if (priv->sampler_en)
5269                 actions_n = flow_check_match_action(actions, attr,
5270                                         RTE_FLOW_ACTION_TYPE_SAMPLE,
5271                                         &sample_action_pos, &qrss_action_pos);
5272         if (actions_n) {
5273                 /* The prefix actions must includes sample, tag, end. */
5274                 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1)
5275                            + sizeof(struct mlx5_rte_flow_action_set_tag);
5276                 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM +
5277                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
5278                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size +
5279                                           item_size), 0, SOCKET_ID_ANY);
5280                 if (!sfx_actions)
5281                         return rte_flow_error_set(error, ENOMEM,
5282                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5283                                                   NULL, "no memory to split "
5284                                                   "sample flow");
5285                 /* The representor_id is -1 for uplink. */
5286                 fdb_tx = (attr->transfer && priv->representor_id != -1);
5287                 if (!fdb_tx)
5288                         sfx_items = (struct rte_flow_item *)((char *)sfx_actions
5289                                         + act_size);
5290                 pre_actions = sfx_actions + actions_n;
5291                 tag_id = flow_sample_split_prep(dev, fdb_tx, sfx_items,
5292                                                 actions, sfx_actions,
5293                                                 pre_actions, actions_n,
5294                                                 sample_action_pos,
5295                                                 qrss_action_pos, error);
5296                 if (tag_id < 0 || (!fdb_tx && !tag_id)) {
5297                         ret = -rte_errno;
5298                         goto exit;
5299                 }
5300                 /* Add the prefix subflow. */
5301                 ret = flow_create_split_inner(dev, flow, &dev_flow, 0, 0, attr,
5302                                               items, pre_actions, external,
5303                                               flow_idx, error);
5304                 if (ret) {
5305                         ret = -rte_errno;
5306                         goto exit;
5307                 }
5308                 dev_flow->handle->split_flow_id = tag_id;
5309 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5310                 /* Set the sfx group attr. */
5311                 sample_res = (struct mlx5_flow_dv_sample_resource *)
5312                                         dev_flow->dv.sample_res;
5313                 sfx_tbl = (struct mlx5_flow_tbl_resource *)
5314                                         sample_res->normal_path_tbl;
5315                 sfx_tbl_data = container_of(sfx_tbl,
5316                                         struct mlx5_flow_tbl_data_entry, tbl);
5317                 sfx_table_key.v64 = sfx_tbl_data->entry.key;
5318                 sfx_attr.group = sfx_attr.transfer ?
5319                                         (sfx_table_key.table_id - 1) :
5320                                          sfx_table_key.table_id;
5321 #endif
5322         }
5323         /* Add the suffix subflow. */
5324         ret = flow_create_split_meter(dev, flow, dev_flow ?
5325                                  flow_get_prefix_layer_flags(dev_flow) : 0,
5326                                  dev_flow ? dev_flow->handle->mark : 0,
5327                                  &sfx_attr, sfx_items ? sfx_items : items,
5328                                  sfx_actions ? sfx_actions : actions,
5329                                  external, flow_idx, error);
5330 exit:
5331         if (sfx_actions)
5332                 mlx5_free(sfx_actions);
5333         return ret;
5334 }
5335
5336 /**
5337  * Split the flow to subflow set. The splitters might be linked
5338  * in the chain, like this:
5339  * flow_create_split_outer() calls:
5340  *   flow_create_split_meter() calls:
5341  *     flow_create_split_metadata(meter_subflow_0) calls:
5342  *       flow_create_split_inner(metadata_subflow_0)
5343  *       flow_create_split_inner(metadata_subflow_1)
5344  *       flow_create_split_inner(metadata_subflow_2)
5345  *     flow_create_split_metadata(meter_subflow_1) calls:
5346  *       flow_create_split_inner(metadata_subflow_0)
5347  *       flow_create_split_inner(metadata_subflow_1)
5348  *       flow_create_split_inner(metadata_subflow_2)
5349  *
5350  * This provide flexible way to add new levels of flow splitting.
5351  * The all of successfully created subflows are included to the
5352  * parent flow dev_flow list.
5353  *
5354  * @param dev
5355  *   Pointer to Ethernet device.
5356  * @param[in] flow
5357  *   Parent flow structure pointer.
5358  * @param[in] attr
5359  *   Flow rule attributes.
5360  * @param[in] items
5361  *   Pattern specification (list terminated by the END pattern item).
5362  * @param[in] actions
5363  *   Associated actions (list terminated by the END action).
5364  * @param[in] external
5365  *   This flow rule is created by request external to PMD.
5366  * @param[in] flow_idx
5367  *   This memory pool index to the flow.
5368  * @param[out] error
5369  *   Perform verbose error reporting if not NULL.
5370  * @return
5371  *   0 on success, negative value otherwise
5372  */
5373 static int
5374 flow_create_split_outer(struct rte_eth_dev *dev,
5375                         struct rte_flow *flow,
5376                         const struct rte_flow_attr *attr,
5377                         const struct rte_flow_item items[],
5378                         const struct rte_flow_action actions[],
5379                         bool external, uint32_t flow_idx,
5380                         struct rte_flow_error *error)
5381 {
5382         int ret;
5383
5384         ret = flow_create_split_sample(dev, flow, attr, items,
5385                                        actions, external, flow_idx, error);
5386         MLX5_ASSERT(ret <= 0);
5387         return ret;
5388 }
5389
5390 static struct mlx5_flow_tunnel *
5391 flow_tunnel_from_rule(struct rte_eth_dev *dev,
5392                       const struct rte_flow_attr *attr,
5393                       const struct rte_flow_item items[],
5394                       const struct rte_flow_action actions[])
5395 {
5396         struct mlx5_flow_tunnel *tunnel;
5397
5398 #pragma GCC diagnostic push
5399 #pragma GCC diagnostic ignored "-Wcast-qual"
5400         if (is_flow_tunnel_match_rule(dev, attr, items, actions))
5401                 tunnel = (struct mlx5_flow_tunnel *)items[0].spec;
5402         else if (is_flow_tunnel_steer_rule(dev, attr, items, actions))
5403                 tunnel = (struct mlx5_flow_tunnel *)actions[0].conf;
5404         else
5405                 tunnel = NULL;
5406 #pragma GCC diagnostic pop
5407
5408         return tunnel;
5409 }
5410
5411 /**
5412  * Adjust flow RSS workspace if needed.
5413  *
5414  * @param wks
5415  *   Pointer to thread flow work space.
5416  * @param rss_desc
5417  *   Pointer to RSS descriptor.
5418  * @param[in] nrssq_num
5419  *   New RSS queue number.
5420  *
5421  * @return
5422  *   0 on success, -1 otherwise and rte_errno is set.
5423  */
5424 static int
5425 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks,
5426                           struct mlx5_flow_rss_desc *rss_desc,
5427                           uint32_t nrssq_num)
5428 {
5429         bool fidx = !!wks->flow_idx;
5430
5431         if (likely(nrssq_num <= wks->rssq_num[fidx]))
5432                 return 0;
5433         rss_desc->queue = realloc(rss_desc->queue,
5434                           sizeof(rss_desc->queue[0]) * RTE_ALIGN(nrssq_num, 2));
5435         if (!rss_desc->queue) {
5436                 rte_errno = ENOMEM;
5437                 return -1;
5438         }
5439         wks->rssq_num[fidx] = RTE_ALIGN(nrssq_num, 2);
5440         return 0;
5441 }
5442
5443 /**
5444  * Create a flow and add it to @p list.
5445  *
5446  * @param dev
5447  *   Pointer to Ethernet device.
5448  * @param list
5449  *   Pointer to a TAILQ flow list. If this parameter NULL,
5450  *   no list insertion occurred, flow is just created,
5451  *   this is caller's responsibility to track the
5452  *   created flow.
5453  * @param[in] attr
5454  *   Flow rule attributes.
5455  * @param[in] items
5456  *   Pattern specification (list terminated by the END pattern item).
5457  * @param[in] actions
5458  *   Associated actions (list terminated by the END action).
5459  * @param[in] external
5460  *   This flow rule is created by request external to PMD.
5461  * @param[out] error
5462  *   Perform verbose error reporting if not NULL.
5463  *
5464  * @return
5465  *   A flow index on success, 0 otherwise and rte_errno is set.
5466  */
5467 static uint32_t
5468 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
5469                  const struct rte_flow_attr *attr,
5470                  const struct rte_flow_item items[],
5471                  const struct rte_flow_action original_actions[],
5472                  bool external, struct rte_flow_error *error)
5473 {
5474         struct mlx5_priv *priv = dev->data->dev_private;
5475         struct rte_flow *flow = NULL;
5476         struct mlx5_flow *dev_flow;
5477         const struct rte_flow_action_rss *rss;
5478         struct mlx5_translated_shared_action
5479                 shared_actions[MLX5_MAX_SHARED_ACTIONS];
5480         int shared_actions_n = MLX5_MAX_SHARED_ACTIONS;
5481         union {
5482                 struct mlx5_flow_expand_rss buf;
5483                 uint8_t buffer[2048];
5484         } expand_buffer;
5485         union {
5486                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
5487                 uint8_t buffer[2048];
5488         } actions_rx;
5489         union {
5490                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
5491                 uint8_t buffer[2048];
5492         } actions_hairpin_tx;
5493         union {
5494                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
5495                 uint8_t buffer[2048];
5496         } items_tx;
5497         struct mlx5_flow_expand_rss *buf = &expand_buffer.buf;
5498         struct mlx5_flow_rss_desc *rss_desc;
5499         const struct rte_flow_action *p_actions_rx;
5500         uint32_t i;
5501         uint32_t idx = 0;
5502         int hairpin_flow;
5503         struct rte_flow_attr attr_tx = { .priority = 0 };
5504         struct rte_flow_attr attr_factor = {0};
5505         const struct rte_flow_action *actions;
5506         struct rte_flow_action *translated_actions = NULL;
5507         struct mlx5_flow_tunnel *tunnel;
5508         struct tunnel_default_miss_ctx default_miss_ctx = { 0, };
5509         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
5510         bool fidx = !!wks->flow_idx;
5511         int ret;
5512
5513         MLX5_ASSERT(wks);
5514         rss_desc = &wks->rss_desc[fidx];
5515         ret = flow_shared_actions_translate(original_actions,
5516                                             shared_actions,
5517                                             &shared_actions_n,
5518                                             &translated_actions, error);
5519         if (ret < 0) {
5520                 MLX5_ASSERT(translated_actions == NULL);
5521                 return 0;
5522         }
5523         actions = translated_actions ? translated_actions : original_actions;
5524         memcpy((void *)&attr_factor, (const void *)attr, sizeof(*attr));
5525         p_actions_rx = actions;
5526         hairpin_flow = flow_check_hairpin_split(dev, &attr_factor, actions);
5527         ret = flow_drv_validate(dev, &attr_factor, items, p_actions_rx,
5528                                 external, hairpin_flow, error);
5529         if (ret < 0)
5530                 goto error_before_hairpin_split;
5531         flow = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], &idx);
5532         if (!flow) {
5533                 rte_errno = ENOMEM;
5534                 goto error_before_hairpin_split;
5535         }
5536         if (hairpin_flow > 0) {
5537                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
5538                         rte_errno = EINVAL;
5539                         goto error_before_hairpin_split;
5540                 }
5541                 flow_hairpin_split(dev, actions, actions_rx.actions,
5542                                    actions_hairpin_tx.actions, items_tx.items,
5543                                    idx);
5544                 p_actions_rx = actions_rx.actions;
5545         }
5546         flow->drv_type = flow_get_drv_type(dev, &attr_factor);
5547         MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
5548                     flow->drv_type < MLX5_FLOW_TYPE_MAX);
5549         memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue));
5550         rss = flow_get_rss_action(p_actions_rx);
5551         if (rss) {
5552                 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num))
5553                         return 0;
5554                 /*
5555                  * The following information is required by
5556                  * mlx5_flow_hashfields_adjust() in advance.
5557                  */
5558                 rss_desc->level = rss->level;
5559                 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
5560                 rss_desc->types = !rss->types ? ETH_RSS_IP : rss->types;
5561         }
5562         flow->dev_handles = 0;
5563         if (rss && rss->types) {
5564                 unsigned int graph_root;
5565
5566                 graph_root = find_graph_root(items, rss->level);
5567                 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
5568                                            items, rss->types,
5569                                            mlx5_support_expansion, graph_root);
5570                 MLX5_ASSERT(ret > 0 &&
5571                        (unsigned int)ret < sizeof(expand_buffer.buffer));
5572         } else {
5573                 buf->entries = 1;
5574                 buf->entry[0].pattern = (void *)(uintptr_t)items;
5575         }
5576         flow->shared_rss = flow_get_shared_rss_action(shared_actions,
5577                                                       shared_actions_n);
5578         /*
5579          * Record the start index when there is a nested call. All sub-flows
5580          * need to be translated before another calling.
5581          * No need to use ping-pong buffer to save memory here.
5582          */
5583         if (fidx) {
5584                 MLX5_ASSERT(!wks->flow_nested_idx);
5585                 wks->flow_nested_idx = fidx;
5586         }
5587         for (i = 0; i < buf->entries; ++i) {
5588                 /*
5589                  * The splitter may create multiple dev_flows,
5590                  * depending on configuration. In the simplest
5591                  * case it just creates unmodified original flow.
5592                  */
5593                 ret = flow_create_split_outer(dev, flow, &attr_factor,
5594                                               buf->entry[i].pattern,
5595                                               p_actions_rx, external, idx,
5596                                               error);
5597                 if (ret < 0)
5598                         goto error;
5599                 if (is_flow_tunnel_steer_rule(dev, attr,
5600                                               buf->entry[i].pattern,
5601                                               p_actions_rx)) {
5602                         ret = flow_tunnel_add_default_miss(dev, flow, attr,
5603                                                            p_actions_rx,
5604                                                            idx,
5605                                                            &default_miss_ctx,
5606                                                            error);
5607                         if (ret < 0) {
5608                                 mlx5_free(default_miss_ctx.queue);
5609                                 goto error;
5610                         }
5611                 }
5612         }
5613         /* Create the tx flow. */
5614         if (hairpin_flow) {
5615                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
5616                 attr_tx.ingress = 0;
5617                 attr_tx.egress = 1;
5618                 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
5619                                          actions_hairpin_tx.actions,
5620                                          idx, error);
5621                 if (!dev_flow)
5622                         goto error;
5623                 dev_flow->flow = flow;
5624                 dev_flow->external = 0;
5625                 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
5626                               dev_flow->handle, next);
5627                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
5628                                          items_tx.items,
5629                                          actions_hairpin_tx.actions, error);
5630                 if (ret < 0)
5631                         goto error;
5632         }
5633         /*
5634          * Update the metadata register copy table. If extensive
5635          * metadata feature is enabled and registers are supported
5636          * we might create the extra rte_flow for each unique
5637          * MARK/FLAG action ID.
5638          *
5639          * The table is updated for ingress Flows only, because
5640          * the egress Flows belong to the different device and
5641          * copy table should be updated in peer NIC Rx domain.
5642          */
5643         if (attr_factor.ingress &&
5644             (external || attr_factor.group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
5645                 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
5646                 if (ret)
5647                         goto error;
5648         }
5649         /*
5650          * If the flow is external (from application) OR device is started, then
5651          * the flow will be applied immediately.
5652          */
5653         if (external || dev->data->dev_started) {
5654                 ret = flow_drv_apply(dev, flow, error);
5655                 if (ret < 0)
5656                         goto error;
5657         }
5658         if (list) {
5659                 rte_spinlock_lock(&priv->flow_list_lock);
5660                 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list, idx,
5661                              flow, next);
5662                 rte_spinlock_unlock(&priv->flow_list_lock);
5663         }
5664         flow_rxq_flags_set(dev, flow);
5665         rte_free(translated_actions);
5666         /* Nested flow creation index recovery. */
5667         wks->flow_idx = wks->flow_nested_idx;
5668         if (wks->flow_nested_idx)
5669                 wks->flow_nested_idx = 0;
5670         tunnel = flow_tunnel_from_rule(dev, attr, items, actions);
5671         if (tunnel) {
5672                 flow->tunnel = 1;
5673                 flow->tunnel_id = tunnel->tunnel_id;
5674                 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED);
5675                 mlx5_free(default_miss_ctx.queue);
5676         }
5677         return idx;
5678 error:
5679         MLX5_ASSERT(flow);
5680         ret = rte_errno; /* Save rte_errno before cleanup. */
5681         flow_mreg_del_copy_action(dev, flow);
5682         flow_drv_destroy(dev, flow);
5683         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], idx);
5684         rte_errno = ret; /* Restore rte_errno. */
5685         ret = rte_errno;
5686         rte_errno = ret;
5687         wks->flow_idx = wks->flow_nested_idx;
5688         if (wks->flow_nested_idx)
5689                 wks->flow_nested_idx = 0;
5690 error_before_hairpin_split:
5691         rte_free(translated_actions);
5692         return 0;
5693 }
5694
5695 /**
5696  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
5697  * incoming packets to table 1.
5698  *
5699  * Other flow rules, requested for group n, will be created in
5700  * e-switch table n+1.
5701  * Jump action to e-switch group n will be created to group n+1.
5702  *
5703  * Used when working in switchdev mode, to utilise advantages of table 1
5704  * and above.
5705  *
5706  * @param dev
5707  *   Pointer to Ethernet device.
5708  *
5709  * @return
5710  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
5711  */
5712 struct rte_flow *
5713 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
5714 {
5715         const struct rte_flow_attr attr = {
5716                 .group = 0,
5717                 .priority = 0,
5718                 .ingress = 1,
5719                 .egress = 0,
5720                 .transfer = 1,
5721         };
5722         const struct rte_flow_item pattern = {
5723                 .type = RTE_FLOW_ITEM_TYPE_END,
5724         };
5725         struct rte_flow_action_jump jump = {
5726                 .group = 1,
5727         };
5728         const struct rte_flow_action actions[] = {
5729                 {
5730                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
5731                         .conf = &jump,
5732                 },
5733                 {
5734                         .type = RTE_FLOW_ACTION_TYPE_END,
5735                 },
5736         };
5737         struct mlx5_priv *priv = dev->data->dev_private;
5738         struct rte_flow_error error;
5739
5740         return (void *)(uintptr_t)flow_list_create(dev, &priv->ctrl_flows,
5741                                                    &attr, &pattern,
5742                                                    actions, false, &error);
5743 }
5744
5745 /**
5746  * Validate a flow supported by the NIC.
5747  *
5748  * @see rte_flow_validate()
5749  * @see rte_flow_ops
5750  */
5751 int
5752 mlx5_flow_validate(struct rte_eth_dev *dev,
5753                    const struct rte_flow_attr *attr,
5754                    const struct rte_flow_item items[],
5755                    const struct rte_flow_action original_actions[],
5756                    struct rte_flow_error *error)
5757 {
5758         int hairpin_flow;
5759         struct mlx5_translated_shared_action
5760                 shared_actions[MLX5_MAX_SHARED_ACTIONS];
5761         int shared_actions_n = MLX5_MAX_SHARED_ACTIONS;
5762         const struct rte_flow_action *actions;
5763         struct rte_flow_action *translated_actions = NULL;
5764         int ret = flow_shared_actions_translate(original_actions,
5765                                                 shared_actions,
5766                                                 &shared_actions_n,
5767                                                 &translated_actions, error);
5768
5769         if (ret)
5770                 return ret;
5771         actions = translated_actions ? translated_actions : original_actions;
5772         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
5773         ret = flow_drv_validate(dev, attr, items, actions,
5774                                 true, hairpin_flow, error);
5775         rte_free(translated_actions);
5776         return ret;
5777 }
5778
5779 /**
5780  * Create a flow.
5781  *
5782  * @see rte_flow_create()
5783  * @see rte_flow_ops
5784  */
5785 struct rte_flow *
5786 mlx5_flow_create(struct rte_eth_dev *dev,
5787                  const struct rte_flow_attr *attr,
5788                  const struct rte_flow_item items[],
5789                  const struct rte_flow_action actions[],
5790                  struct rte_flow_error *error)
5791 {
5792         struct mlx5_priv *priv = dev->data->dev_private;
5793
5794         /*
5795          * If the device is not started yet, it is not allowed to created a
5796          * flow from application. PMD default flows and traffic control flows
5797          * are not affected.
5798          */
5799         if (unlikely(!dev->data->dev_started)) {
5800                 DRV_LOG(DEBUG, "port %u is not started when "
5801                         "inserting a flow", dev->data->port_id);
5802                 rte_flow_error_set(error, ENODEV,
5803                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5804                                    NULL,
5805                                    "port not started");
5806                 return NULL;
5807         }
5808
5809         return (void *)(uintptr_t)flow_list_create(dev, &priv->flows,
5810                                   attr, items, actions, true, error);
5811 }
5812
5813 /**
5814  * Destroy a flow in a list.
5815  *
5816  * @param dev
5817  *   Pointer to Ethernet device.
5818  * @param list
5819  *   Pointer to the Indexed flow list. If this parameter NULL,
5820  *   there is no flow removal from the list. Be noted that as
5821  *   flow is add to the indexed list, memory of the indexed
5822  *   list points to maybe changed as flow destroyed.
5823  * @param[in] flow_idx
5824  *   Index of flow to destroy.
5825  */
5826 static void
5827 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
5828                   uint32_t flow_idx)
5829 {
5830         struct mlx5_priv *priv = dev->data->dev_private;
5831         struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
5832                                                [MLX5_IPOOL_RTE_FLOW], flow_idx);
5833
5834         if (!flow)
5835                 return;
5836         /*
5837          * Update RX queue flags only if port is started, otherwise it is
5838          * already clean.
5839          */
5840         if (dev->data->dev_started)
5841                 flow_rxq_flags_trim(dev, flow);
5842         flow_drv_destroy(dev, flow);
5843         if (list) {
5844                 rte_spinlock_lock(&priv->flow_list_lock);
5845                 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list,
5846                              flow_idx, flow, next);
5847                 rte_spinlock_unlock(&priv->flow_list_lock);
5848         }
5849         flow_mreg_del_copy_action(dev, flow);
5850         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], flow_idx);
5851         if (flow->tunnel) {
5852                 struct mlx5_flow_tunnel *tunnel;
5853
5854                 rte_spinlock_lock(&mlx5_tunnel_hub(dev)->sl);
5855                 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id);
5856                 RTE_VERIFY(tunnel);
5857                 LIST_REMOVE(tunnel, chain);
5858                 rte_spinlock_unlock(&mlx5_tunnel_hub(dev)->sl);
5859                 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
5860                         mlx5_flow_tunnel_free(dev, tunnel);
5861         }
5862 }
5863
5864 /**
5865  * Destroy all flows.
5866  *
5867  * @param dev
5868  *   Pointer to Ethernet device.
5869  * @param list
5870  *   Pointer to the Indexed flow list.
5871  * @param active
5872  *   If flushing is called avtively.
5873  */
5874 void
5875 mlx5_flow_list_flush(struct rte_eth_dev *dev, uint32_t *list, bool active)
5876 {
5877         uint32_t num_flushed = 0;
5878
5879         while (*list) {
5880                 flow_list_destroy(dev, list, *list);
5881                 num_flushed++;
5882         }
5883         if (active) {
5884                 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
5885                         dev->data->port_id, num_flushed);
5886         }
5887 }
5888
5889 /**
5890  * Stop all default actions for flows.
5891  *
5892  * @param dev
5893  *   Pointer to Ethernet device.
5894  */
5895 void
5896 mlx5_flow_stop_default(struct rte_eth_dev *dev)
5897 {
5898         flow_mreg_del_default_copy_action(dev);
5899         flow_rxq_flags_clear(dev);
5900 }
5901
5902 /**
5903  * Start all default actions for flows.
5904  *
5905  * @param dev
5906  *   Pointer to Ethernet device.
5907  * @return
5908  *   0 on success, a negative errno value otherwise and rte_errno is set.
5909  */
5910 int
5911 mlx5_flow_start_default(struct rte_eth_dev *dev)
5912 {
5913         struct rte_flow_error error;
5914
5915         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
5916         return flow_mreg_add_default_copy_action(dev, &error);
5917 }
5918
5919 /**
5920  * Release key of thread specific flow workspace data.
5921  */
5922 static void
5923 flow_release_workspace(void *data)
5924 {
5925         struct mlx5_flow_workspace *wks = data;
5926
5927         if (!wks)
5928                 return;
5929         free(wks->rss_desc[0].queue);
5930         free(wks->rss_desc[1].queue);
5931         free(wks);
5932 }
5933
5934 /**
5935  * Initialize key of thread specific flow workspace data.
5936  */
5937 static void
5938 flow_alloc_workspace(void)
5939 {
5940         if (pthread_key_create(&key_workspace, flow_release_workspace))
5941                 DRV_LOG(ERR, "Can't create flow workspace data thread key.");
5942 }
5943
5944 /**
5945  * Get thread specific flow workspace.
5946  *
5947  * @return pointer to thread specific flowworkspace data, NULL on error.
5948  */
5949 struct mlx5_flow_workspace*
5950 mlx5_flow_get_thread_workspace(void)
5951 {
5952         struct mlx5_flow_workspace *data;
5953
5954         if (pthread_once(&key_workspace_init, flow_alloc_workspace)) {
5955                 DRV_LOG(ERR, "Failed to init flow workspace data thread key.");
5956                 return NULL;
5957         }
5958         data = pthread_getspecific(key_workspace);
5959         if (!data) {
5960                 data = calloc(1, sizeof(*data));
5961                 if (!data) {
5962                         DRV_LOG(ERR, "Failed to allocate flow workspace "
5963                                 "memory.");
5964                         return NULL;
5965                 }
5966                 data->rss_desc[0].queue = calloc(1,
5967                                 sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM);
5968                 if (!data->rss_desc[0].queue)
5969                         goto err;
5970                 data->rss_desc[1].queue = calloc(1,
5971                                 sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM);
5972                 if (!data->rss_desc[1].queue)
5973                         goto err;
5974                 data->rssq_num[0] = MLX5_RSSQ_DEFAULT_NUM;
5975                 data->rssq_num[1] = MLX5_RSSQ_DEFAULT_NUM;
5976                 if (pthread_setspecific(key_workspace, data)) {
5977                         DRV_LOG(ERR, "Failed to set flow workspace to thread.");
5978                         goto err;
5979                 }
5980         }
5981         return data;
5982 err:
5983         if (data->rss_desc[0].queue)
5984                 free(data->rss_desc[0].queue);
5985         if (data->rss_desc[1].queue)
5986                 free(data->rss_desc[1].queue);
5987         free(data);
5988         return NULL;
5989 }
5990
5991 /**
5992  * Verify the flow list is empty
5993  *
5994  * @param dev
5995  *  Pointer to Ethernet device.
5996  *
5997  * @return the number of flows not released.
5998  */
5999 int
6000 mlx5_flow_verify(struct rte_eth_dev *dev)
6001 {
6002         struct mlx5_priv *priv = dev->data->dev_private;
6003         struct rte_flow *flow;
6004         uint32_t idx;
6005         int ret = 0;
6006
6007         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], priv->flows, idx,
6008                       flow, next) {
6009                 DRV_LOG(DEBUG, "port %u flow %p still referenced",
6010                         dev->data->port_id, (void *)flow);
6011                 ++ret;
6012         }
6013         return ret;
6014 }
6015
6016 /**
6017  * Enable default hairpin egress flow.
6018  *
6019  * @param dev
6020  *   Pointer to Ethernet device.
6021  * @param queue
6022  *   The queue index.
6023  *
6024  * @return
6025  *   0 on success, a negative errno value otherwise and rte_errno is set.
6026  */
6027 int
6028 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
6029                             uint32_t queue)
6030 {
6031         struct mlx5_priv *priv = dev->data->dev_private;
6032         const struct rte_flow_attr attr = {
6033                 .egress = 1,
6034                 .priority = 0,
6035         };
6036         struct mlx5_rte_flow_item_tx_queue queue_spec = {
6037                 .queue = queue,
6038         };
6039         struct mlx5_rte_flow_item_tx_queue queue_mask = {
6040                 .queue = UINT32_MAX,
6041         };
6042         struct rte_flow_item items[] = {
6043                 {
6044                         .type = (enum rte_flow_item_type)
6045                                 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
6046                         .spec = &queue_spec,
6047                         .last = NULL,
6048                         .mask = &queue_mask,
6049                 },
6050                 {
6051                         .type = RTE_FLOW_ITEM_TYPE_END,
6052                 },
6053         };
6054         struct rte_flow_action_jump jump = {
6055                 .group = MLX5_HAIRPIN_TX_TABLE,
6056         };
6057         struct rte_flow_action actions[2];
6058         uint32_t flow_idx;
6059         struct rte_flow_error error;
6060
6061         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
6062         actions[0].conf = &jump;
6063         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
6064         flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6065                                 &attr, items, actions, false, &error);
6066         if (!flow_idx) {
6067                 DRV_LOG(DEBUG,
6068                         "Failed to create ctrl flow: rte_errno(%d),"
6069                         " type(%d), message(%s)",
6070                         rte_errno, error.type,
6071                         error.message ? error.message : " (no stated reason)");
6072                 return -rte_errno;
6073         }
6074         return 0;
6075 }
6076
6077 /**
6078  * Enable a control flow configured from the control plane.
6079  *
6080  * @param dev
6081  *   Pointer to Ethernet device.
6082  * @param eth_spec
6083  *   An Ethernet flow spec to apply.
6084  * @param eth_mask
6085  *   An Ethernet flow mask to apply.
6086  * @param vlan_spec
6087  *   A VLAN flow spec to apply.
6088  * @param vlan_mask
6089  *   A VLAN flow mask to apply.
6090  *
6091  * @return
6092  *   0 on success, a negative errno value otherwise and rte_errno is set.
6093  */
6094 int
6095 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
6096                     struct rte_flow_item_eth *eth_spec,
6097                     struct rte_flow_item_eth *eth_mask,
6098                     struct rte_flow_item_vlan *vlan_spec,
6099                     struct rte_flow_item_vlan *vlan_mask)
6100 {
6101         struct mlx5_priv *priv = dev->data->dev_private;
6102         const struct rte_flow_attr attr = {
6103                 .ingress = 1,
6104                 .priority = MLX5_FLOW_PRIO_RSVD,
6105         };
6106         struct rte_flow_item items[] = {
6107                 {
6108                         .type = RTE_FLOW_ITEM_TYPE_ETH,
6109                         .spec = eth_spec,
6110                         .last = NULL,
6111                         .mask = eth_mask,
6112                 },
6113                 {
6114                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
6115                                               RTE_FLOW_ITEM_TYPE_END,
6116                         .spec = vlan_spec,
6117                         .last = NULL,
6118                         .mask = vlan_mask,
6119                 },
6120                 {
6121                         .type = RTE_FLOW_ITEM_TYPE_END,
6122                 },
6123         };
6124         uint16_t queue[priv->reta_idx_n];
6125         struct rte_flow_action_rss action_rss = {
6126                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
6127                 .level = 0,
6128                 .types = priv->rss_conf.rss_hf,
6129                 .key_len = priv->rss_conf.rss_key_len,
6130                 .queue_num = priv->reta_idx_n,
6131                 .key = priv->rss_conf.rss_key,
6132                 .queue = queue,
6133         };
6134         struct rte_flow_action actions[] = {
6135                 {
6136                         .type = RTE_FLOW_ACTION_TYPE_RSS,
6137                         .conf = &action_rss,
6138                 },
6139                 {
6140                         .type = RTE_FLOW_ACTION_TYPE_END,
6141                 },
6142         };
6143         uint32_t flow_idx;
6144         struct rte_flow_error error;
6145         unsigned int i;
6146
6147         if (!priv->reta_idx_n || !priv->rxqs_n) {
6148                 return 0;
6149         }
6150         if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
6151                 action_rss.types = 0;
6152         for (i = 0; i != priv->reta_idx_n; ++i)
6153                 queue[i] = (*priv->reta_idx)[i];
6154         flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6155                                 &attr, items, actions, false, &error);
6156         if (!flow_idx)
6157                 return -rte_errno;
6158         return 0;
6159 }
6160
6161 /**
6162  * Enable a flow control configured from the control plane.
6163  *
6164  * @param dev
6165  *   Pointer to Ethernet device.
6166  * @param eth_spec
6167  *   An Ethernet flow spec to apply.
6168  * @param eth_mask
6169  *   An Ethernet flow mask to apply.
6170  *
6171  * @return
6172  *   0 on success, a negative errno value otherwise and rte_errno is set.
6173  */
6174 int
6175 mlx5_ctrl_flow(struct rte_eth_dev *dev,
6176                struct rte_flow_item_eth *eth_spec,
6177                struct rte_flow_item_eth *eth_mask)
6178 {
6179         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
6180 }
6181
6182 /**
6183  * Create default miss flow rule matching lacp traffic
6184  *
6185  * @param dev
6186  *   Pointer to Ethernet device.
6187  * @param eth_spec
6188  *   An Ethernet flow spec to apply.
6189  *
6190  * @return
6191  *   0 on success, a negative errno value otherwise and rte_errno is set.
6192  */
6193 int
6194 mlx5_flow_lacp_miss(struct rte_eth_dev *dev)
6195 {
6196         struct mlx5_priv *priv = dev->data->dev_private;
6197         /*
6198          * The LACP matching is done by only using ether type since using
6199          * a multicast dst mac causes kernel to give low priority to this flow.
6200          */
6201         static const struct rte_flow_item_eth lacp_spec = {
6202                 .type = RTE_BE16(0x8809),
6203         };
6204         static const struct rte_flow_item_eth lacp_mask = {
6205                 .type = 0xffff,
6206         };
6207         const struct rte_flow_attr attr = {
6208                 .ingress = 1,
6209         };
6210         struct rte_flow_item items[] = {
6211                 {
6212                         .type = RTE_FLOW_ITEM_TYPE_ETH,
6213                         .spec = &lacp_spec,
6214                         .mask = &lacp_mask,
6215                 },
6216                 {
6217                         .type = RTE_FLOW_ITEM_TYPE_END,
6218                 },
6219         };
6220         struct rte_flow_action actions[] = {
6221                 {
6222                         .type = (enum rte_flow_action_type)
6223                                 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS,
6224                 },
6225                 {
6226                         .type = RTE_FLOW_ACTION_TYPE_END,
6227                 },
6228         };
6229         struct rte_flow_error error;
6230         uint32_t flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6231                                 &attr, items, actions, false, &error);
6232
6233         if (!flow_idx)
6234                 return -rte_errno;
6235         return 0;
6236 }
6237
6238 /**
6239  * Destroy a flow.
6240  *
6241  * @see rte_flow_destroy()
6242  * @see rte_flow_ops
6243  */
6244 int
6245 mlx5_flow_destroy(struct rte_eth_dev *dev,
6246                   struct rte_flow *flow,
6247                   struct rte_flow_error *error __rte_unused)
6248 {
6249         struct mlx5_priv *priv = dev->data->dev_private;
6250
6251         flow_list_destroy(dev, &priv->flows, (uintptr_t)(void *)flow);
6252         return 0;
6253 }
6254
6255 /**
6256  * Destroy all flows.
6257  *
6258  * @see rte_flow_flush()
6259  * @see rte_flow_ops
6260  */
6261 int
6262 mlx5_flow_flush(struct rte_eth_dev *dev,
6263                 struct rte_flow_error *error __rte_unused)
6264 {
6265         struct mlx5_priv *priv = dev->data->dev_private;
6266
6267         mlx5_flow_list_flush(dev, &priv->flows, false);
6268         return 0;
6269 }
6270
6271 /**
6272  * Isolated mode.
6273  *
6274  * @see rte_flow_isolate()
6275  * @see rte_flow_ops
6276  */
6277 int
6278 mlx5_flow_isolate(struct rte_eth_dev *dev,
6279                   int enable,
6280                   struct rte_flow_error *error)
6281 {
6282         struct mlx5_priv *priv = dev->data->dev_private;
6283
6284         if (dev->data->dev_started) {
6285                 rte_flow_error_set(error, EBUSY,
6286                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6287                                    NULL,
6288                                    "port must be stopped first");
6289                 return -rte_errno;
6290         }
6291         priv->isolated = !!enable;
6292         if (enable)
6293                 dev->dev_ops = &mlx5_os_dev_ops_isolate;
6294         else
6295                 dev->dev_ops = &mlx5_os_dev_ops;
6296
6297         dev->rx_descriptor_status = mlx5_rx_descriptor_status;
6298         dev->tx_descriptor_status = mlx5_tx_descriptor_status;
6299
6300         return 0;
6301 }
6302
6303 /**
6304  * Query a flow.
6305  *
6306  * @see rte_flow_query()
6307  * @see rte_flow_ops
6308  */
6309 static int
6310 flow_drv_query(struct rte_eth_dev *dev,
6311                uint32_t flow_idx,
6312                const struct rte_flow_action *actions,
6313                void *data,
6314                struct rte_flow_error *error)
6315 {
6316         struct mlx5_priv *priv = dev->data->dev_private;
6317         const struct mlx5_flow_driver_ops *fops;
6318         struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
6319                                                [MLX5_IPOOL_RTE_FLOW],
6320                                                flow_idx);
6321         enum mlx5_flow_drv_type ftype;
6322
6323         if (!flow) {
6324                 return rte_flow_error_set(error, ENOENT,
6325                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6326                           NULL,
6327                           "invalid flow handle");
6328         }
6329         ftype = flow->drv_type;
6330         MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
6331         fops = flow_get_drv_ops(ftype);
6332
6333         return fops->query(dev, flow, actions, data, error);
6334 }
6335
6336 /**
6337  * Query a flow.
6338  *
6339  * @see rte_flow_query()
6340  * @see rte_flow_ops
6341  */
6342 int
6343 mlx5_flow_query(struct rte_eth_dev *dev,
6344                 struct rte_flow *flow,
6345                 const struct rte_flow_action *actions,
6346                 void *data,
6347                 struct rte_flow_error *error)
6348 {
6349         int ret;
6350
6351         ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data,
6352                              error);
6353         if (ret < 0)
6354                 return ret;
6355         return 0;
6356 }
6357
6358 /**
6359  * Manage filter operations.
6360  *
6361  * @param dev
6362  *   Pointer to Ethernet device structure.
6363  * @param filter_type
6364  *   Filter type.
6365  * @param filter_op
6366  *   Operation to perform.
6367  * @param arg
6368  *   Pointer to operation-specific structure.
6369  *
6370  * @return
6371  *   0 on success, a negative errno value otherwise and rte_errno is set.
6372  */
6373 int
6374 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
6375                      enum rte_filter_type filter_type,
6376                      enum rte_filter_op filter_op,
6377                      void *arg)
6378 {
6379         switch (filter_type) {
6380         case RTE_ETH_FILTER_GENERIC:
6381                 if (filter_op != RTE_ETH_FILTER_GET) {
6382                         rte_errno = EINVAL;
6383                         return -rte_errno;
6384                 }
6385                 *(const void **)arg = &mlx5_flow_ops;
6386                 return 0;
6387         default:
6388                 DRV_LOG(ERR, "port %u filter type (%d) not supported",
6389                         dev->data->port_id, filter_type);
6390                 rte_errno = ENOTSUP;
6391                 return -rte_errno;
6392         }
6393         return 0;
6394 }
6395
6396 /**
6397  * Create the needed meter and suffix tables.
6398  *
6399  * @param[in] dev
6400  *   Pointer to Ethernet device.
6401  * @param[in] fm
6402  *   Pointer to the flow meter.
6403  *
6404  * @return
6405  *   Pointer to table set on success, NULL otherwise.
6406  */
6407 struct mlx5_meter_domains_infos *
6408 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
6409                           const struct mlx5_flow_meter *fm)
6410 {
6411         const struct mlx5_flow_driver_ops *fops;
6412
6413         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6414         return fops->create_mtr_tbls(dev, fm);
6415 }
6416
6417 /**
6418  * Destroy the meter table set.
6419  *
6420  * @param[in] dev
6421  *   Pointer to Ethernet device.
6422  * @param[in] tbl
6423  *   Pointer to the meter table set.
6424  *
6425  * @return
6426  *   0 on success.
6427  */
6428 int
6429 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
6430                            struct mlx5_meter_domains_infos *tbls)
6431 {
6432         const struct mlx5_flow_driver_ops *fops;
6433
6434         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6435         return fops->destroy_mtr_tbls(dev, tbls);
6436 }
6437
6438 /**
6439  * Create policer rules.
6440  *
6441  * @param[in] dev
6442  *   Pointer to Ethernet device.
6443  * @param[in] fm
6444  *   Pointer to flow meter structure.
6445  * @param[in] attr
6446  *   Pointer to flow attributes.
6447  *
6448  * @return
6449  *   0 on success, -1 otherwise.
6450  */
6451 int
6452 mlx5_flow_create_policer_rules(struct rte_eth_dev *dev,
6453                                struct mlx5_flow_meter *fm,
6454                                const struct rte_flow_attr *attr)
6455 {
6456         const struct mlx5_flow_driver_ops *fops;
6457
6458         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6459         return fops->create_policer_rules(dev, fm, attr);
6460 }
6461
6462 /**
6463  * Destroy policer rules.
6464  *
6465  * @param[in] fm
6466  *   Pointer to flow meter structure.
6467  * @param[in] attr
6468  *   Pointer to flow attributes.
6469  *
6470  * @return
6471  *   0 on success, -1 otherwise.
6472  */
6473 int
6474 mlx5_flow_destroy_policer_rules(struct rte_eth_dev *dev,
6475                                 struct mlx5_flow_meter *fm,
6476                                 const struct rte_flow_attr *attr)
6477 {
6478         const struct mlx5_flow_driver_ops *fops;
6479
6480         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6481         return fops->destroy_policer_rules(dev, fm, attr);
6482 }
6483
6484 /**
6485  * Allocate a counter.
6486  *
6487  * @param[in] dev
6488  *   Pointer to Ethernet device structure.
6489  *
6490  * @return
6491  *   Index to allocated counter  on success, 0 otherwise.
6492  */
6493 uint32_t
6494 mlx5_counter_alloc(struct rte_eth_dev *dev)
6495 {
6496         const struct mlx5_flow_driver_ops *fops;
6497         struct rte_flow_attr attr = { .transfer = 0 };
6498
6499         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
6500                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6501                 return fops->counter_alloc(dev);
6502         }
6503         DRV_LOG(ERR,
6504                 "port %u counter allocate is not supported.",
6505                  dev->data->port_id);
6506         return 0;
6507 }
6508
6509 /**
6510  * Free a counter.
6511  *
6512  * @param[in] dev
6513  *   Pointer to Ethernet device structure.
6514  * @param[in] cnt
6515  *   Index to counter to be free.
6516  */
6517 void
6518 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
6519 {
6520         const struct mlx5_flow_driver_ops *fops;
6521         struct rte_flow_attr attr = { .transfer = 0 };
6522
6523         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
6524                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6525                 fops->counter_free(dev, cnt);
6526                 return;
6527         }
6528         DRV_LOG(ERR,
6529                 "port %u counter free is not supported.",
6530                  dev->data->port_id);
6531 }
6532
6533 /**
6534  * Query counter statistics.
6535  *
6536  * @param[in] dev
6537  *   Pointer to Ethernet device structure.
6538  * @param[in] cnt
6539  *   Index to counter to query.
6540  * @param[in] clear
6541  *   Set to clear counter statistics.
6542  * @param[out] pkts
6543  *   The counter hits packets number to save.
6544  * @param[out] bytes
6545  *   The counter hits bytes number to save.
6546  *
6547  * @return
6548  *   0 on success, a negative errno value otherwise.
6549  */
6550 int
6551 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
6552                    bool clear, uint64_t *pkts, uint64_t *bytes)
6553 {
6554         const struct mlx5_flow_driver_ops *fops;
6555         struct rte_flow_attr attr = { .transfer = 0 };
6556
6557         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
6558                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6559                 return fops->counter_query(dev, cnt, clear, pkts, bytes);
6560         }
6561         DRV_LOG(ERR,
6562                 "port %u counter query is not supported.",
6563                  dev->data->port_id);
6564         return -ENOTSUP;
6565 }
6566
6567 /**
6568  * Allocate a new memory for the counter values wrapped by all the needed
6569  * management.
6570  *
6571  * @param[in] sh
6572  *   Pointer to mlx5_dev_ctx_shared object.
6573  *
6574  * @return
6575  *   0 on success, a negative errno value otherwise.
6576  */
6577 static int
6578 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh)
6579 {
6580         struct mlx5_devx_mkey_attr mkey_attr;
6581         struct mlx5_counter_stats_mem_mng *mem_mng;
6582         volatile struct flow_counter_stats *raw_data;
6583         int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES;
6584         int size = (sizeof(struct flow_counter_stats) *
6585                         MLX5_COUNTERS_PER_POOL +
6586                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
6587                         sizeof(struct mlx5_counter_stats_mem_mng);
6588         size_t pgsize = rte_mem_page_size();
6589         uint8_t *mem;
6590         int i;
6591
6592         if (pgsize == (size_t)-1) {
6593                 DRV_LOG(ERR, "Failed to get mem page size");
6594                 rte_errno = ENOMEM;
6595                 return -ENOMEM;
6596         }
6597         mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY);
6598         if (!mem) {
6599                 rte_errno = ENOMEM;
6600                 return -ENOMEM;
6601         }
6602         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
6603         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
6604         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
6605                                                  IBV_ACCESS_LOCAL_WRITE);
6606         if (!mem_mng->umem) {
6607                 rte_errno = errno;
6608                 mlx5_free(mem);
6609                 return -rte_errno;
6610         }
6611         mkey_attr.addr = (uintptr_t)mem;
6612         mkey_attr.size = size;
6613         mkey_attr.umem_id = mlx5_os_get_umem_id(mem_mng->umem);
6614         mkey_attr.pd = sh->pdn;
6615         mkey_attr.log_entity_size = 0;
6616         mkey_attr.pg_access = 0;
6617         mkey_attr.klm_array = NULL;
6618         mkey_attr.klm_num = 0;
6619         mkey_attr.relaxed_ordering = sh->cmng.relaxed_ordering;
6620         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
6621         if (!mem_mng->dm) {
6622                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
6623                 rte_errno = errno;
6624                 mlx5_free(mem);
6625                 return -rte_errno;
6626         }
6627         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
6628         raw_data = (volatile struct flow_counter_stats *)mem;
6629         for (i = 0; i < raws_n; ++i) {
6630                 mem_mng->raws[i].mem_mng = mem_mng;
6631                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
6632         }
6633         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
6634                 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws,
6635                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i,
6636                                  next);
6637         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
6638         sh->cmng.mem_mng = mem_mng;
6639         return 0;
6640 }
6641
6642 /**
6643  * Set the statistic memory to the new counter pool.
6644  *
6645  * @param[in] sh
6646  *   Pointer to mlx5_dev_ctx_shared object.
6647  * @param[in] pool
6648  *   Pointer to the pool to set the statistic memory.
6649  *
6650  * @return
6651  *   0 on success, a negative errno value otherwise.
6652  */
6653 static int
6654 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh,
6655                                struct mlx5_flow_counter_pool *pool)
6656 {
6657         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
6658         /* Resize statistic memory once used out. */
6659         if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) &&
6660             mlx5_flow_create_counter_stat_mem_mng(sh)) {
6661                 DRV_LOG(ERR, "Cannot resize counter stat mem.");
6662                 return -1;
6663         }
6664         rte_spinlock_lock(&pool->sl);
6665         pool->raw = cmng->mem_mng->raws + pool->index %
6666                     MLX5_CNT_CONTAINER_RESIZE;
6667         rte_spinlock_unlock(&pool->sl);
6668         pool->raw_hw = NULL;
6669         return 0;
6670 }
6671
6672 #define MLX5_POOL_QUERY_FREQ_US 1000000
6673
6674 /**
6675  * Set the periodic procedure for triggering asynchronous batch queries for all
6676  * the counter pools.
6677  *
6678  * @param[in] sh
6679  *   Pointer to mlx5_dev_ctx_shared object.
6680  */
6681 void
6682 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh)
6683 {
6684         uint32_t pools_n, us;
6685
6686         pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED);
6687         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
6688         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
6689         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
6690                 sh->cmng.query_thread_on = 0;
6691                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
6692         } else {
6693                 sh->cmng.query_thread_on = 1;
6694         }
6695 }
6696
6697 /**
6698  * The periodic procedure for triggering asynchronous batch queries for all the
6699  * counter pools. This function is probably called by the host thread.
6700  *
6701  * @param[in] arg
6702  *   The parameter for the alarm process.
6703  */
6704 void
6705 mlx5_flow_query_alarm(void *arg)
6706 {
6707         struct mlx5_dev_ctx_shared *sh = arg;
6708         int ret;
6709         uint16_t pool_index = sh->cmng.pool_index;
6710         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
6711         struct mlx5_flow_counter_pool *pool;
6712         uint16_t n_valid;
6713
6714         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
6715                 goto set_alarm;
6716         rte_spinlock_lock(&cmng->pool_update_sl);
6717         pool = cmng->pools[pool_index];
6718         n_valid = cmng->n_valid;
6719         rte_spinlock_unlock(&cmng->pool_update_sl);
6720         /* Set the statistic memory to the new created pool. */
6721         if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool)))
6722                 goto set_alarm;
6723         if (pool->raw_hw)
6724                 /* There is a pool query in progress. */
6725                 goto set_alarm;
6726         pool->raw_hw =
6727                 LIST_FIRST(&sh->cmng.free_stat_raws);
6728         if (!pool->raw_hw)
6729                 /* No free counter statistics raw memory. */
6730                 goto set_alarm;
6731         /*
6732          * Identify the counters released between query trigger and query
6733          * handle more efficiently. The counter released in this gap period
6734          * should wait for a new round of query as the new arrived packets
6735          * will not be taken into account.
6736          */
6737         pool->query_gen++;
6738         ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0,
6739                                                MLX5_COUNTERS_PER_POOL,
6740                                                NULL, NULL,
6741                                                pool->raw_hw->mem_mng->dm->id,
6742                                                (void *)(uintptr_t)
6743                                                pool->raw_hw->data,
6744                                                sh->devx_comp,
6745                                                (uint64_t)(uintptr_t)pool);
6746         if (ret) {
6747                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
6748                         " %d", pool->min_dcs->id);
6749                 pool->raw_hw = NULL;
6750                 goto set_alarm;
6751         }
6752         LIST_REMOVE(pool->raw_hw, next);
6753         sh->cmng.pending_queries++;
6754         pool_index++;
6755         if (pool_index >= n_valid)
6756                 pool_index = 0;
6757 set_alarm:
6758         sh->cmng.pool_index = pool_index;
6759         mlx5_set_query_alarm(sh);
6760 }
6761
6762 /**
6763  * Check and callback event for new aged flow in the counter pool
6764  *
6765  * @param[in] sh
6766  *   Pointer to mlx5_dev_ctx_shared object.
6767  * @param[in] pool
6768  *   Pointer to Current counter pool.
6769  */
6770 static void
6771 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh,
6772                    struct mlx5_flow_counter_pool *pool)
6773 {
6774         struct mlx5_priv *priv;
6775         struct mlx5_flow_counter *cnt;
6776         struct mlx5_age_info *age_info;
6777         struct mlx5_age_param *age_param;
6778         struct mlx5_counter_stats_raw *cur = pool->raw_hw;
6779         struct mlx5_counter_stats_raw *prev = pool->raw;
6780         const uint64_t curr_time = MLX5_CURR_TIME_SEC;
6781         const uint32_t time_delta = curr_time - pool->time_of_last_age_check;
6782         uint16_t expected = AGE_CANDIDATE;
6783         uint32_t i;
6784
6785         pool->time_of_last_age_check = curr_time;
6786         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
6787                 cnt = MLX5_POOL_GET_CNT(pool, i);
6788                 age_param = MLX5_CNT_TO_AGE(cnt);
6789                 if (__atomic_load_n(&age_param->state,
6790                                     __ATOMIC_RELAXED) != AGE_CANDIDATE)
6791                         continue;
6792                 if (cur->data[i].hits != prev->data[i].hits) {
6793                         __atomic_store_n(&age_param->sec_since_last_hit, 0,
6794                                          __ATOMIC_RELAXED);
6795                         continue;
6796                 }
6797                 if (__atomic_add_fetch(&age_param->sec_since_last_hit,
6798                                        time_delta,
6799                                        __ATOMIC_RELAXED) <= age_param->timeout)
6800                         continue;
6801                 /**
6802                  * Hold the lock first, or if between the
6803                  * state AGE_TMOUT and tailq operation the
6804                  * release happened, the release procedure
6805                  * may delete a non-existent tailq node.
6806                  */
6807                 priv = rte_eth_devices[age_param->port_id].data->dev_private;
6808                 age_info = GET_PORT_AGE_INFO(priv);
6809                 rte_spinlock_lock(&age_info->aged_sl);
6810                 if (__atomic_compare_exchange_n(&age_param->state, &expected,
6811                                                 AGE_TMOUT, false,
6812                                                 __ATOMIC_RELAXED,
6813                                                 __ATOMIC_RELAXED)) {
6814                         TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next);
6815                         MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW);
6816                 }
6817                 rte_spinlock_unlock(&age_info->aged_sl);
6818         }
6819         for (i = 0; i < sh->max_port; i++) {
6820                 age_info = &sh->port[i].age_info;
6821                 if (!MLX5_AGE_GET(age_info, MLX5_AGE_EVENT_NEW))
6822                         continue;
6823                 if (MLX5_AGE_GET(age_info, MLX5_AGE_TRIGGER))
6824                         rte_eth_dev_callback_process
6825                                 (&rte_eth_devices[sh->port[i].devx_ih_port_id],
6826                                 RTE_ETH_EVENT_FLOW_AGED, NULL);
6827                 age_info->flags = 0;
6828         }
6829 }
6830
6831 /**
6832  * Handler for the HW respond about ready values from an asynchronous batch
6833  * query. This function is probably called by the host thread.
6834  *
6835  * @param[in] sh
6836  *   The pointer to the shared device context.
6837  * @param[in] async_id
6838  *   The Devx async ID.
6839  * @param[in] status
6840  *   The status of the completion.
6841  */
6842 void
6843 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
6844                                   uint64_t async_id, int status)
6845 {
6846         struct mlx5_flow_counter_pool *pool =
6847                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
6848         struct mlx5_counter_stats_raw *raw_to_free;
6849         uint8_t query_gen = pool->query_gen ^ 1;
6850         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
6851         enum mlx5_counter_type cnt_type =
6852                 pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6853                                 MLX5_COUNTER_TYPE_ORIGIN;
6854
6855         if (unlikely(status)) {
6856                 raw_to_free = pool->raw_hw;
6857         } else {
6858                 raw_to_free = pool->raw;
6859                 if (pool->is_aged)
6860                         mlx5_flow_aging_check(sh, pool);
6861                 rte_spinlock_lock(&pool->sl);
6862                 pool->raw = pool->raw_hw;
6863                 rte_spinlock_unlock(&pool->sl);
6864                 /* Be sure the new raw counters data is updated in memory. */
6865                 rte_io_wmb();
6866                 if (!TAILQ_EMPTY(&pool->counters[query_gen])) {
6867                         rte_spinlock_lock(&cmng->csl[cnt_type]);
6868                         TAILQ_CONCAT(&cmng->counters[cnt_type],
6869                                      &pool->counters[query_gen], next);
6870                         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6871                 }
6872         }
6873         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
6874         pool->raw_hw = NULL;
6875         sh->cmng.pending_queries--;
6876 }
6877
6878 static const struct mlx5_flow_tbl_data_entry  *
6879 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark)
6880 {
6881         struct mlx5_priv *priv = dev->data->dev_private;
6882         struct mlx5_dev_ctx_shared *sh = priv->sh;
6883         struct mlx5_hlist_entry *he;
6884         union tunnel_offload_mark mbits = { .val = mark };
6885         union mlx5_flow_tbl_key table_key = {
6886                 {
6887                         .table_id = tunnel_id_to_flow_tbl(mbits.table_id),
6888                         .dummy = 0,
6889                         .domain = !!mbits.transfer,
6890                         .direction = 0,
6891                 }
6892         };
6893         he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, NULL);
6894         return he ?
6895                container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL;
6896 }
6897
6898 static void
6899 mlx5_flow_tunnel_grp2tbl_remove_cb(struct mlx5_hlist *list,
6900                                    struct mlx5_hlist_entry *entry)
6901 {
6902         struct mlx5_dev_ctx_shared *sh = list->ctx;
6903         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
6904
6905         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
6906                         tunnel_flow_tbl_to_id(tte->flow_table));
6907         mlx5_free(tte);
6908 }
6909
6910 static struct mlx5_hlist_entry *
6911 mlx5_flow_tunnel_grp2tbl_create_cb(struct mlx5_hlist *list,
6912                                    uint64_t key __rte_unused,
6913                                    void *ctx __rte_unused)
6914 {
6915         struct mlx5_dev_ctx_shared *sh = list->ctx;
6916         struct tunnel_tbl_entry *tte;
6917
6918         tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
6919                           sizeof(*tte), 0,
6920                           SOCKET_ID_ANY);
6921         if (!tte)
6922                 goto err;
6923         mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
6924                           &tte->flow_table);
6925         if (tte->flow_table >= MLX5_MAX_TABLES) {
6926                 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.",
6927                         tte->flow_table);
6928                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
6929                                 tte->flow_table);
6930                 goto err;
6931         } else if (!tte->flow_table) {
6932                 goto err;
6933         }
6934         tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table);
6935         return &tte->hash;
6936 err:
6937         if (tte)
6938                 mlx5_free(tte);
6939         return NULL;
6940 }
6941
6942 static uint32_t
6943 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
6944                                 const struct mlx5_flow_tunnel *tunnel,
6945                                 uint32_t group, uint32_t *table,
6946                                 struct rte_flow_error *error)
6947 {
6948         struct mlx5_hlist_entry *he;
6949         struct tunnel_tbl_entry *tte;
6950         union tunnel_tbl_key key = {
6951                 .tunnel_id = tunnel ? tunnel->tunnel_id : 0,
6952                 .group = group
6953         };
6954         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
6955         struct mlx5_hlist *group_hash;
6956
6957         group_hash = tunnel ? tunnel->groups : thub->groups;
6958         he = mlx5_hlist_register(group_hash, key.val, NULL);
6959         if (!he)
6960                 return rte_flow_error_set(error, EINVAL,
6961                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6962                                           NULL,
6963                                           "tunnel group index not supported");
6964         tte = container_of(he, typeof(*tte), hash);
6965         *table = tte->flow_table;
6966         DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x",
6967                 dev->data->port_id, key.tunnel_id, group, *table);
6968         return 0;
6969 }
6970
6971 static int
6972 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table,
6973                     struct flow_grp_info grp_info, struct rte_flow_error *error)
6974 {
6975         if (grp_info.transfer && grp_info.external && grp_info.fdb_def_rule) {
6976                 if (group == UINT32_MAX)
6977                         return rte_flow_error_set
6978                                                 (error, EINVAL,
6979                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6980                                                  NULL,
6981                                                  "group index not supported");
6982                 *table = group + 1;
6983         } else {
6984                 *table = group;
6985         }
6986         DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table);
6987         return 0;
6988 }
6989
6990 /**
6991  * Translate the rte_flow group index to HW table value.
6992  *
6993  * If tunnel offload is disabled, all group ids converted to flow table
6994  * id using the standard method.
6995  * If tunnel offload is enabled, group id can be converted using the
6996  * standard or tunnel conversion method. Group conversion method
6997  * selection depends on flags in `grp_info` parameter:
6998  * - Internal (grp_info.external == 0) groups conversion uses the
6999  *   standard method.
7000  * - Group ids in JUMP action converted with the tunnel conversion.
7001  * - Group id in rule attribute conversion depends on a rule type and
7002  *   group id value:
7003  *   ** non zero group attributes converted with the tunnel method
7004  *   ** zero group attribute in non-tunnel rule is converted using the
7005  *      standard method - there's only one root table
7006  *   ** zero group attribute in steer tunnel rule is converted with the
7007  *      standard method - single root table
7008  *   ** zero group attribute in match tunnel rule is a special OvS
7009  *      case: that value is used for portability reasons. That group
7010  *      id is converted with the tunnel conversion method.
7011  *
7012  * @param[in] dev
7013  *   Port device
7014  * @param[in] tunnel
7015  *   PMD tunnel offload object
7016  * @param[in] group
7017  *   rte_flow group index value.
7018  * @param[out] table
7019  *   HW table value.
7020  * @param[in] grp_info
7021  *   flags used for conversion
7022  * @param[out] error
7023  *   Pointer to error structure.
7024  *
7025  * @return
7026  *   0 on success, a negative errno value otherwise and rte_errno is set.
7027  */
7028 int
7029 mlx5_flow_group_to_table(struct rte_eth_dev *dev,
7030                          const struct mlx5_flow_tunnel *tunnel,
7031                          uint32_t group, uint32_t *table,
7032                          struct flow_grp_info grp_info,
7033                          struct rte_flow_error *error)
7034 {
7035         int ret;
7036         bool standard_translation;
7037
7038         if (grp_info.external && group < MLX5_MAX_TABLES_EXTERNAL)
7039                 group *= MLX5_FLOW_TABLE_FACTOR;
7040         if (is_tunnel_offload_active(dev)) {
7041                 standard_translation = !grp_info.external ||
7042                                         grp_info.std_tbl_fix;
7043         } else {
7044                 standard_translation = true;
7045         }
7046         DRV_LOG(DEBUG,
7047                 "port %u group=%#x transfer=%d external=%d fdb_def_rule=%d translate=%s",
7048                 dev->data->port_id, group, grp_info.transfer,
7049                 grp_info.external, grp_info.fdb_def_rule,
7050                 standard_translation ? "STANDARD" : "TUNNEL");
7051         if (standard_translation)
7052                 ret = flow_group_to_table(dev->data->port_id, group, table,
7053                                           grp_info, error);
7054         else
7055                 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group,
7056                                                       table, error);
7057
7058         return ret;
7059 }
7060
7061 /**
7062  * Discover availability of metadata reg_c's.
7063  *
7064  * Iteratively use test flows to check availability.
7065  *
7066  * @param[in] dev
7067  *   Pointer to the Ethernet device structure.
7068  *
7069  * @return
7070  *   0 on success, a negative errno value otherwise and rte_errno is set.
7071  */
7072 int
7073 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
7074 {
7075         struct mlx5_priv *priv = dev->data->dev_private;
7076         struct mlx5_dev_config *config = &priv->config;
7077         enum modify_reg idx;
7078         int n = 0;
7079
7080         /* reg_c[0] and reg_c[1] are reserved. */
7081         config->flow_mreg_c[n++] = REG_C_0;
7082         config->flow_mreg_c[n++] = REG_C_1;
7083         /* Discover availability of other reg_c's. */
7084         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
7085                 struct rte_flow_attr attr = {
7086                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
7087                         .priority = MLX5_FLOW_PRIO_RSVD,
7088                         .ingress = 1,
7089                 };
7090                 struct rte_flow_item items[] = {
7091                         [0] = {
7092                                 .type = RTE_FLOW_ITEM_TYPE_END,
7093                         },
7094                 };
7095                 struct rte_flow_action actions[] = {
7096                         [0] = {
7097                                 .type = (enum rte_flow_action_type)
7098                                         MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
7099                                 .conf = &(struct mlx5_flow_action_copy_mreg){
7100                                         .src = REG_C_1,
7101                                         .dst = idx,
7102                                 },
7103                         },
7104                         [1] = {
7105                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
7106                                 .conf = &(struct rte_flow_action_jump){
7107                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
7108                                 },
7109                         },
7110                         [2] = {
7111                                 .type = RTE_FLOW_ACTION_TYPE_END,
7112                         },
7113                 };
7114                 uint32_t flow_idx;
7115                 struct rte_flow *flow;
7116                 struct rte_flow_error error;
7117
7118                 if (!config->dv_flow_en)
7119                         break;
7120                 /* Create internal flow, validation skips copy action. */
7121                 flow_idx = flow_list_create(dev, NULL, &attr, items,
7122                                             actions, false, &error);
7123                 flow = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW],
7124                                       flow_idx);
7125                 if (!flow)
7126                         continue;
7127                 if (dev->data->dev_started || !flow_drv_apply(dev, flow, NULL))
7128                         config->flow_mreg_c[n++] = idx;
7129                 flow_list_destroy(dev, NULL, flow_idx);
7130         }
7131         for (; n < MLX5_MREG_C_NUM; ++n)
7132                 config->flow_mreg_c[n] = REG_NON;
7133         return 0;
7134 }
7135
7136 /**
7137  * Dump flow raw hw data to file
7138  *
7139  * @param[in] dev
7140  *    The pointer to Ethernet device.
7141  * @param[in] file
7142  *   A pointer to a file for output.
7143  * @param[out] error
7144  *   Perform verbose error reporting if not NULL. PMDs initialize this
7145  *   structure in case of error only.
7146  * @return
7147  *   0 on success, a nagative value otherwise.
7148  */
7149 int
7150 mlx5_flow_dev_dump(struct rte_eth_dev *dev,
7151                    FILE *file,
7152                    struct rte_flow_error *error __rte_unused)
7153 {
7154         struct mlx5_priv *priv = dev->data->dev_private;
7155         struct mlx5_dev_ctx_shared *sh = priv->sh;
7156
7157         if (!priv->config.dv_flow_en) {
7158                 if (fputs("device dv flow disabled\n", file) <= 0)
7159                         return -errno;
7160                 return -ENOTSUP;
7161         }
7162         return mlx5_devx_cmd_flow_dump(sh->fdb_domain, sh->rx_domain,
7163                                        sh->tx_domain, file);
7164 }
7165
7166 /**
7167  * Get aged-out flows.
7168  *
7169  * @param[in] dev
7170  *   Pointer to the Ethernet device structure.
7171  * @param[in] context
7172  *   The address of an array of pointers to the aged-out flows contexts.
7173  * @param[in] nb_countexts
7174  *   The length of context array pointers.
7175  * @param[out] error
7176  *   Perform verbose error reporting if not NULL. Initialized in case of
7177  *   error only.
7178  *
7179  * @return
7180  *   how many contexts get in success, otherwise negative errno value.
7181  *   if nb_contexts is 0, return the amount of all aged contexts.
7182  *   if nb_contexts is not 0 , return the amount of aged flows reported
7183  *   in the context array.
7184  */
7185 int
7186 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
7187                         uint32_t nb_contexts, struct rte_flow_error *error)
7188 {
7189         const struct mlx5_flow_driver_ops *fops;
7190         struct rte_flow_attr attr = { .transfer = 0 };
7191
7192         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7193                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7194                 return fops->get_aged_flows(dev, contexts, nb_contexts,
7195                                                     error);
7196         }
7197         DRV_LOG(ERR,
7198                 "port %u get aged flows is not supported.",
7199                  dev->data->port_id);
7200         return -ENOTSUP;
7201 }
7202
7203 /* Wrapper for driver action_validate op callback */
7204 static int
7205 flow_drv_action_validate(struct rte_eth_dev *dev,
7206                          const struct rte_flow_shared_action_conf *conf,
7207                          const struct rte_flow_action *action,
7208                          const struct mlx5_flow_driver_ops *fops,
7209                          struct rte_flow_error *error)
7210 {
7211         static const char err_msg[] = "shared action validation unsupported";
7212
7213         if (!fops->action_validate) {
7214                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7215                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7216                                    NULL, err_msg);
7217                 return -rte_errno;
7218         }
7219         return fops->action_validate(dev, conf, action, error);
7220 }
7221
7222 /**
7223  * Destroys the shared action by handle.
7224  *
7225  * @param dev
7226  *   Pointer to Ethernet device structure.
7227  * @param[in] action
7228  *   Handle for the shared action to be destroyed.
7229  * @param[out] error
7230  *   Perform verbose error reporting if not NULL. PMDs initialize this
7231  *   structure in case of error only.
7232  *
7233  * @return
7234  *   0 on success, a negative errno value otherwise and rte_errno is set.
7235  *
7236  * @note: wrapper for driver action_create op callback.
7237  */
7238 static int
7239 mlx5_shared_action_destroy(struct rte_eth_dev *dev,
7240                            struct rte_flow_shared_action *action,
7241                            struct rte_flow_error *error)
7242 {
7243         static const char err_msg[] = "shared action destruction unsupported";
7244         struct rte_flow_attr attr = { .transfer = 0 };
7245         const struct mlx5_flow_driver_ops *fops =
7246                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7247
7248         if (!fops->action_destroy) {
7249                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7250                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7251                                    NULL, err_msg);
7252                 return -rte_errno;
7253         }
7254         return fops->action_destroy(dev, action, error);
7255 }
7256
7257 /* Wrapper for driver action_destroy op callback */
7258 static int
7259 flow_drv_action_update(struct rte_eth_dev *dev,
7260                        struct rte_flow_shared_action *action,
7261                        const void *action_conf,
7262                        const struct mlx5_flow_driver_ops *fops,
7263                        struct rte_flow_error *error)
7264 {
7265         static const char err_msg[] = "shared action update unsupported";
7266
7267         if (!fops->action_update) {
7268                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7269                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7270                                    NULL, err_msg);
7271                 return -rte_errno;
7272         }
7273         return fops->action_update(dev, action, action_conf, error);
7274 }
7275
7276 /**
7277  * Create shared action for reuse in multiple flow rules.
7278  *
7279  * @param dev
7280  *   Pointer to Ethernet device structure.
7281  * @param[in] action
7282  *   Action configuration for shared action creation.
7283  * @param[out] error
7284  *   Perform verbose error reporting if not NULL. PMDs initialize this
7285  *   structure in case of error only.
7286  * @return
7287  *   A valid handle in case of success, NULL otherwise and rte_errno is set.
7288  */
7289 static struct rte_flow_shared_action *
7290 mlx5_shared_action_create(struct rte_eth_dev *dev,
7291                           const struct rte_flow_shared_action_conf *conf,
7292                           const struct rte_flow_action *action,
7293                           struct rte_flow_error *error)
7294 {
7295         static const char err_msg[] = "shared action creation unsupported";
7296         struct rte_flow_attr attr = { .transfer = 0 };
7297         const struct mlx5_flow_driver_ops *fops =
7298                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7299
7300         if (flow_drv_action_validate(dev, conf, action, fops, error))
7301                 return NULL;
7302         if (!fops->action_create) {
7303                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7304                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7305                                    NULL, err_msg);
7306                 return NULL;
7307         }
7308         return fops->action_create(dev, conf, action, error);
7309 }
7310
7311 /**
7312  * Updates inplace the shared action configuration pointed by *action* handle
7313  * with the configuration provided as *action* argument.
7314  * The update of the shared action configuration effects all flow rules reusing
7315  * the action via handle.
7316  *
7317  * @param dev
7318  *   Pointer to Ethernet device structure.
7319  * @param[in] shared_action
7320  *   Handle for the shared action to be updated.
7321  * @param[in] action
7322  *   Action specification used to modify the action pointed by handle.
7323  *   *action* should be of same type with the action pointed by the *action*
7324  *   handle argument, otherwise considered as invalid.
7325  * @param[out] error
7326  *   Perform verbose error reporting if not NULL. PMDs initialize this
7327  *   structure in case of error only.
7328  *
7329  * @return
7330  *   0 on success, a negative errno value otherwise and rte_errno is set.
7331  */
7332 static int
7333 mlx5_shared_action_update(struct rte_eth_dev *dev,
7334                 struct rte_flow_shared_action *shared_action,
7335                 const struct rte_flow_action *action,
7336                 struct rte_flow_error *error)
7337 {
7338         struct rte_flow_attr attr = { .transfer = 0 };
7339         const struct mlx5_flow_driver_ops *fops =
7340                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7341         int ret;
7342
7343         switch (shared_action->type) {
7344         case MLX5_RTE_FLOW_ACTION_TYPE_SHARED_RSS:
7345                 if (action->type != RTE_FLOW_ACTION_TYPE_RSS) {
7346                         return rte_flow_error_set(error, EINVAL,
7347                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7348                                                   NULL,
7349                                                   "update action type invalid");
7350                 }
7351                 ret = flow_drv_action_validate(dev, NULL, action, fops, error);
7352                 if (ret)
7353                         return ret;
7354                 return flow_drv_action_update(dev, shared_action, action->conf,
7355                                               fops, error);
7356         default:
7357                 return rte_flow_error_set(error, ENOTSUP,
7358                                           RTE_FLOW_ERROR_TYPE_ACTION,
7359                                           NULL,
7360                                           "action type not supported");
7361         }
7362 }
7363
7364 /**
7365  * Query the shared action by handle.
7366  *
7367  * This function allows retrieving action-specific data such as counters.
7368  * Data is gathered by special action which may be present/referenced in
7369  * more than one flow rule definition.
7370  *
7371  * \see RTE_FLOW_ACTION_TYPE_COUNT
7372  *
7373  * @param dev
7374  *   Pointer to Ethernet device structure.
7375  * @param[in] action
7376  *   Handle for the shared action to query.
7377  * @param[in, out] data
7378  *   Pointer to storage for the associated query data type.
7379  * @param[out] error
7380  *   Perform verbose error reporting if not NULL. PMDs initialize this
7381  *   structure in case of error only.
7382  *
7383  * @return
7384  *   0 on success, a negative errno value otherwise and rte_errno is set.
7385  */
7386 static int
7387 mlx5_shared_action_query(struct rte_eth_dev *dev,
7388                          const struct rte_flow_shared_action *action,
7389                          void *data,
7390                          struct rte_flow_error *error)
7391 {
7392         (void)dev;
7393         switch (action->type) {
7394         case MLX5_RTE_FLOW_ACTION_TYPE_SHARED_RSS:
7395                 __atomic_load(&action->refcnt, (uint32_t *)data,
7396                               __ATOMIC_RELAXED);
7397                 return 0;
7398         default:
7399                 return rte_flow_error_set(error, ENOTSUP,
7400                                           RTE_FLOW_ERROR_TYPE_ACTION,
7401                                           NULL,
7402                                           "action type not supported");
7403         }
7404 }
7405
7406 /**
7407  * Destroy all shared actions.
7408  *
7409  * @param dev
7410  *   Pointer to Ethernet device.
7411  *
7412  * @return
7413  *   0 on success, a negative errno value otherwise and rte_errno is set.
7414  */
7415 int
7416 mlx5_shared_action_flush(struct rte_eth_dev *dev)
7417 {
7418         struct rte_flow_error error;
7419         struct mlx5_priv *priv = dev->data->dev_private;
7420         struct rte_flow_shared_action *action;
7421         int ret = 0;
7422
7423         while (!LIST_EMPTY(&priv->shared_actions)) {
7424                 action = LIST_FIRST(&priv->shared_actions);
7425                 ret = mlx5_shared_action_destroy(dev, action, &error);
7426         }
7427         return ret;
7428 }
7429
7430 static void
7431 mlx5_flow_tunnel_free(struct rte_eth_dev *dev,
7432                       struct mlx5_flow_tunnel *tunnel)
7433 {
7434         struct mlx5_priv *priv = dev->data->dev_private;
7435
7436         DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x",
7437                 dev->data->port_id, tunnel->tunnel_id);
7438         RTE_VERIFY(!__atomic_load_n(&tunnel->refctn, __ATOMIC_RELAXED));
7439         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID],
7440                         tunnel->tunnel_id);
7441         mlx5_hlist_destroy(tunnel->groups);
7442         mlx5_free(tunnel);
7443 }
7444
7445 static struct mlx5_flow_tunnel *
7446 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id)
7447 {
7448         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
7449         struct mlx5_flow_tunnel *tun;
7450
7451         LIST_FOREACH(tun, &thub->tunnels, chain) {
7452                 if (tun->tunnel_id == id)
7453                         break;
7454         }
7455
7456         return tun;
7457 }
7458
7459 static struct mlx5_flow_tunnel *
7460 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev,
7461                           const struct rte_flow_tunnel *app_tunnel)
7462 {
7463         struct mlx5_priv *priv = dev->data->dev_private;
7464         struct mlx5_flow_tunnel *tunnel;
7465         uint32_t id;
7466
7467         mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
7468                           &id);
7469         if (id >= MLX5_MAX_TUNNELS) {
7470                 mlx5_ipool_free(priv->sh->ipool
7471                                 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], id);
7472                 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id);
7473                 return NULL;
7474         } else if (!id) {
7475                 return NULL;
7476         }
7477         /**
7478          * mlx5 flow tunnel is an auxlilary data structure
7479          * It's not part of IO. No need to allocate it from
7480          * huge pages pools dedicated for IO
7481          */
7482         tunnel = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*tunnel),
7483                              0, SOCKET_ID_ANY);
7484         if (!tunnel) {
7485                 mlx5_ipool_free(priv->sh->ipool
7486                                 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], id);
7487                 return NULL;
7488         }
7489         tunnel->groups = mlx5_hlist_create("tunnel groups", 1024, 0, 0,
7490                                            mlx5_flow_tunnel_grp2tbl_create_cb,
7491                                            NULL,
7492                                            mlx5_flow_tunnel_grp2tbl_remove_cb);
7493         if (!tunnel->groups) {
7494                 mlx5_ipool_free(priv->sh->ipool
7495                                 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], id);
7496                 mlx5_free(tunnel);
7497                 return NULL;
7498         }
7499         tunnel->groups->ctx = priv->sh;
7500         /* initiate new PMD tunnel */
7501         memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel));
7502         tunnel->tunnel_id = id;
7503         tunnel->action.type = (typeof(tunnel->action.type))
7504                               MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET;
7505         tunnel->action.conf = tunnel;
7506         tunnel->item.type = (typeof(tunnel->item.type))
7507                             MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL;
7508         tunnel->item.spec = tunnel;
7509         tunnel->item.last = NULL;
7510         tunnel->item.mask = NULL;
7511
7512         DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x",
7513                 dev->data->port_id, tunnel->tunnel_id);
7514
7515         return tunnel;
7516 }
7517
7518 static int
7519 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
7520                      const struct rte_flow_tunnel *app_tunnel,
7521                      struct mlx5_flow_tunnel **tunnel)
7522 {
7523         int ret;
7524         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
7525         struct mlx5_flow_tunnel *tun;
7526
7527         rte_spinlock_lock(&thub->sl);
7528         LIST_FOREACH(tun, &thub->tunnels, chain) {
7529                 if (!memcmp(app_tunnel, &tun->app_tunnel,
7530                             sizeof(*app_tunnel))) {
7531                         *tunnel = tun;
7532                         ret = 0;
7533                         break;
7534                 }
7535         }
7536         if (!tun) {
7537                 tun = mlx5_flow_tunnel_allocate(dev, app_tunnel);
7538                 if (tun) {
7539                         LIST_INSERT_HEAD(&thub->tunnels, tun, chain);
7540                         *tunnel = tun;
7541                 } else {
7542                         ret = -ENOMEM;
7543                 }
7544         }
7545         rte_spinlock_unlock(&thub->sl);
7546         if (tun)
7547                 __atomic_add_fetch(&tun->refctn, 1, __ATOMIC_RELAXED);
7548
7549         return ret;
7550 }
7551
7552 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id)
7553 {
7554         struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
7555
7556         if (!thub)
7557                 return;
7558         if (!LIST_EMPTY(&thub->tunnels))
7559                 DRV_LOG(WARNING, "port %u tunnels present\n", port_id);
7560         mlx5_hlist_destroy(thub->groups);
7561         mlx5_free(thub);
7562 }
7563
7564 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh)
7565 {
7566         int err;
7567         struct mlx5_flow_tunnel_hub *thub;
7568
7569         thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub),
7570                            0, SOCKET_ID_ANY);
7571         if (!thub)
7572                 return -ENOMEM;
7573         LIST_INIT(&thub->tunnels);
7574         rte_spinlock_init(&thub->sl);
7575         thub->groups = mlx5_hlist_create("flow groups", MLX5_MAX_TABLES, 0,
7576                                          0, mlx5_flow_tunnel_grp2tbl_create_cb,
7577                                          NULL,
7578                                          mlx5_flow_tunnel_grp2tbl_remove_cb);
7579         if (!thub->groups) {
7580                 err = -rte_errno;
7581                 goto err;
7582         }
7583         thub->groups->ctx = sh;
7584         sh->tunnel_hub = thub;
7585
7586         return 0;
7587
7588 err:
7589         if (thub->groups)
7590                 mlx5_hlist_destroy(thub->groups);
7591         if (thub)
7592                 mlx5_free(thub);
7593         return err;
7594 }
7595
7596 #ifndef HAVE_MLX5DV_DR
7597 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1))
7598 #else
7599 #define MLX5_DOMAIN_SYNC_FLOW \
7600         (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW)
7601 #endif
7602
7603 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
7604 {
7605         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
7606         const struct mlx5_flow_driver_ops *fops;
7607         int ret;
7608         struct rte_flow_attr attr = { .transfer = 0 };
7609
7610         fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7611         ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW);
7612         if (ret > 0)
7613                 ret = -ret;
7614         return ret;
7615 }