drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <netinet/in.h>
   7 #include <sys/queue.h>
   8 #include <stdalign.h>
   9 #include <stdint.h>
  10 #include <string.h>
  11 #include <stdbool.h>
  12
  13 #include <rte_common.h>
  14 #include <rte_ether.h>
  15 #include <ethdev_driver.h>
  16 #include <rte_eal_paging.h>
  17 #include <rte_flow.h>
  18 #include <rte_cycles.h>
  19 #include <rte_flow_driver.h>
  20 #include <rte_malloc.h>
  21 #include <rte_ip.h>
  22
  23 #include <mlx5_glue.h>
  24 #include <mlx5_devx_cmds.h>
  25 #include <mlx5_prm.h>
  26 #include <mlx5_malloc.h>
  27
  28 #include "mlx5_defs.h"
  29 #include "mlx5.h"
  30 #include "mlx5_flow.h"
  31 #include "mlx5_flow_os.h"
  32 #include "mlx5_rxtx.h"
  33 #include "mlx5_common_os.h"
  34 #include "rte_pmd_mlx5.h"
  35
  36 struct tunnel_default_miss_ctx {
  37         uint16_t *queue;
  38         __extension__
  39         union {
  40                 struct rte_flow_action_rss action_rss;
  41                 struct rte_flow_action_queue miss_queue;
  42                 struct rte_flow_action_jump miss_jump;
  43                 uint8_t raw[0];
  44         };
  45 };
  46
  47 static int
  48 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
  49                              struct rte_flow *flow,
  50                              const struct rte_flow_attr *attr,
  51                              const struct rte_flow_action *app_actions,
  52                              uint32_t flow_idx,
  53                              struct tunnel_default_miss_ctx *ctx,
  54                              struct rte_flow_error *error);
  55 static struct mlx5_flow_tunnel *
  56 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id);
  57 static void
  58 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel);
  59 static uint32_t
  60 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
  61                                 const struct mlx5_flow_tunnel *tunnel,
  62                                 uint32_t group, uint32_t *table,
  63                                 struct rte_flow_error *error);
  64
  65 static struct mlx5_flow_workspace *mlx5_flow_push_thread_workspace(void);
  66 static void mlx5_flow_pop_thread_workspace(void);
  67
  68
  69 /** Device flow drivers. */
  70 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  71
  72 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  73
  74 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  75         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  76 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  77         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  78 #endif
  79         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  80         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  81 };
  82
  83 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */
  84 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \
  85         (const int []){ \
  86                 __VA_ARGS__, 0, \
  87         }
  88
  89 /** Node object of input graph for mlx5_flow_expand_rss(). */
  90 struct mlx5_flow_expand_node {
  91         const int *const next;
  92         /**<
  93          * List of next node indexes. Index 0 is interpreted as a terminator.
  94          */
  95         const enum rte_flow_item_type type;
  96         /**< Pattern item type of current node. */
  97         uint64_t rss_types;
  98         /**<
  99          * RSS types bit-field associated with this node
 100          * (see ETH_RSS_* definitions).
 101          */
 102 };
 103
 104 /** Object returned by mlx5_flow_expand_rss(). */
 105 struct mlx5_flow_expand_rss {
 106         uint32_t entries;
 107         /**< Number of entries @p patterns and @p priorities. */
 108         struct {
 109                 struct rte_flow_item *pattern; /**< Expanded pattern array. */
 110                 uint32_t priority; /**< Priority offset for each expansion. */
 111         } entry[];
 112 };
 113
 114 static enum rte_flow_item_type
 115 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item)
 116 {
 117         enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID;
 118         uint16_t ether_type = 0;
 119         uint16_t ether_type_m;
 120         uint8_t ip_next_proto = 0;
 121         uint8_t ip_next_proto_m;
 122
 123         if (item == NULL || item->spec == NULL)
 124                 return ret;
 125         switch (item->type) {
 126         case RTE_FLOW_ITEM_TYPE_ETH:
 127                 if (item->mask)
 128                         ether_type_m = ((const struct rte_flow_item_eth *)
 129                                                 (item->mask))->type;
 130                 else
 131                         ether_type_m = rte_flow_item_eth_mask.type;
 132                 if (ether_type_m != RTE_BE16(0xFFFF))
 133                         break;
 134                 ether_type = ((const struct rte_flow_item_eth *)
 135                                 (item->spec))->type;
 136                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 137                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 138                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 139                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 140                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 141                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 142                 else
 143                         ret = RTE_FLOW_ITEM_TYPE_END;
 144                 break;
 145         case RTE_FLOW_ITEM_TYPE_VLAN:
 146                 if (item->mask)
 147                         ether_type_m = ((const struct rte_flow_item_vlan *)
 148                                                 (item->mask))->inner_type;
 149                 else
 150                         ether_type_m = rte_flow_item_vlan_mask.inner_type;
 151                 if (ether_type_m != RTE_BE16(0xFFFF))
 152                         break;
 153                 ether_type = ((const struct rte_flow_item_vlan *)
 154                                 (item->spec))->inner_type;
 155                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 156                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 157                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 158                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 159                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 160                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 161                 else
 162                         ret = RTE_FLOW_ITEM_TYPE_END;
 163                 break;
 164         case RTE_FLOW_ITEM_TYPE_IPV4:
 165                 if (item->mask)
 166                         ip_next_proto_m = ((const struct rte_flow_item_ipv4 *)
 167                                         (item->mask))->hdr.next_proto_id;
 168                 else
 169                         ip_next_proto_m =
 170                                 rte_flow_item_ipv4_mask.hdr.next_proto_id;
 171                 if (ip_next_proto_m != 0xFF)
 172                         break;
 173                 ip_next_proto = ((const struct rte_flow_item_ipv4 *)
 174                                 (item->spec))->hdr.next_proto_id;
 175                 if (ip_next_proto == IPPROTO_UDP)
 176                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 177                 else if (ip_next_proto == IPPROTO_TCP)
 178                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 179                 else if (ip_next_proto == IPPROTO_IP)
 180                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 181                 else if (ip_next_proto == IPPROTO_IPV6)
 182                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 183                 else
 184                         ret = RTE_FLOW_ITEM_TYPE_END;
 185                 break;
 186         case RTE_FLOW_ITEM_TYPE_IPV6:
 187                 if (item->mask)
 188                         ip_next_proto_m = ((const struct rte_flow_item_ipv6 *)
 189                                                 (item->mask))->hdr.proto;
 190                 else
 191                         ip_next_proto_m =
 192                                 rte_flow_item_ipv6_mask.hdr.proto;
 193                 if (ip_next_proto_m != 0xFF)
 194                         break;
 195                 ip_next_proto = ((const struct rte_flow_item_ipv6 *)
 196                                 (item->spec))->hdr.proto;
 197                 if (ip_next_proto == IPPROTO_UDP)
 198                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 199                 else if (ip_next_proto == IPPROTO_TCP)
 200                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 201                 else if (ip_next_proto == IPPROTO_IP)
 202                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 203                 else if (ip_next_proto == IPPROTO_IPV6)
 204                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 205                 else
 206                         ret = RTE_FLOW_ITEM_TYPE_END;
 207                 break;
 208         default:
 209                 ret = RTE_FLOW_ITEM_TYPE_VOID;
 210                 break;
 211         }
 212         return ret;
 213 }
 214
 215 #define MLX5_RSS_EXP_ELT_N 8
 216
 217 /**
 218  * Expand RSS flows into several possible flows according to the RSS hash
 219  * fields requested and the driver capabilities.
 220  *
 221  * @param[out] buf
 222  *   Buffer to store the result expansion.
 223  * @param[in] size
 224  *   Buffer size in bytes. If 0, @p buf can be NULL.
 225  * @param[in] pattern
 226  *   User flow pattern.
 227  * @param[in] types
 228  *   RSS types to expand (see ETH_RSS_* definitions).
 229  * @param[in] graph
 230  *   Input graph to expand @p pattern according to @p types.
 231  * @param[in] graph_root_index
 232  *   Index of root node in @p graph, typically 0.
 233  *
 234  * @return
 235  *   A positive value representing the size of @p buf in bytes regardless of
 236  *   @p size on success, a negative errno value otherwise and rte_errno is
 237  *   set, the following errors are defined:
 238  *
 239  *   -E2BIG: graph-depth @p graph is too deep.
 240  */
 241 static int
 242 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,
 243                      const struct rte_flow_item *pattern, uint64_t types,
 244                      const struct mlx5_flow_expand_node graph[],
 245                      int graph_root_index)
 246 {
 247         const struct rte_flow_item *item;
 248         const struct mlx5_flow_expand_node *node = &graph[graph_root_index];
 249         const int *next_node;
 250         const int *stack[MLX5_RSS_EXP_ELT_N];
 251         int stack_pos = 0;
 252         struct rte_flow_item flow_items[MLX5_RSS_EXP_ELT_N];
 253         unsigned int i;
 254         size_t lsize;
 255         size_t user_pattern_size = 0;
 256         void *addr = NULL;
 257         const struct mlx5_flow_expand_node *next = NULL;
 258         struct rte_flow_item missed_item;
 259         int missed = 0;
 260         int elt = 0;
 261         const struct rte_flow_item *last_item = NULL;
 262
 263         memset(&missed_item, 0, sizeof(missed_item));
 264         lsize = offsetof(struct mlx5_flow_expand_rss, entry) +
 265                 MLX5_RSS_EXP_ELT_N * sizeof(buf->entry[0]);
 266         if (lsize <= size) {
 267                 buf->entry[0].priority = 0;
 268                 buf->entry[0].pattern = (void *)&buf->entry[MLX5_RSS_EXP_ELT_N];
 269                 buf->entries = 0;
 270                 addr = buf->entry[0].pattern;
 271         }
 272         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 273                 if (item->type != RTE_FLOW_ITEM_TYPE_VOID)
 274                         last_item = item;
 275                 for (i = 0; node->next && node->next[i]; ++i) {
 276                         next = &graph[node->next[i]];
 277                         if (next->type == item->type)
 278                                 break;
 279                 }
 280                 if (next)
 281                         node = next;
 282                 user_pattern_size += sizeof(*item);
 283         }
 284         user_pattern_size += sizeof(*item); /* Handle END item. */
 285         lsize += user_pattern_size;
 286         /* Copy the user pattern in the first entry of the buffer. */
 287         if (lsize <= size) {
 288                 rte_memcpy(addr, pattern, user_pattern_size);
 289                 addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 290                 buf->entries = 1;
 291         }
 292         /* Start expanding. */
 293         memset(flow_items, 0, sizeof(flow_items));
 294         user_pattern_size -= sizeof(*item);
 295         /*
 296          * Check if the last valid item has spec set, need complete pattern,
 297          * and the pattern can be used for expansion.
 298          */
 299         missed_item.type = mlx5_flow_expand_rss_item_complete(last_item);
 300         if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) {
 301                 /* Item type END indicates expansion is not required. */
 302                 return lsize;
 303         }
 304         if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) {
 305                 next = NULL;
 306                 missed = 1;
 307                 for (i = 0; node->next && node->next[i]; ++i) {
 308                         next = &graph[node->next[i]];
 309                         if (next->type == missed_item.type) {
 310                                 flow_items[0].type = missed_item.type;
 311                                 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 312                                 break;
 313                         }
 314                         next = NULL;
 315                 }
 316         }
 317         if (next && missed) {
 318                 elt = 2; /* missed item + item end. */
 319                 node = next;
 320                 lsize += elt * sizeof(*item) + user_pattern_size;
 321                 if ((node->rss_types & types) && lsize <= size) {
 322                         buf->entry[buf->entries].priority = 1;
 323                         buf->entry[buf->entries].pattern = addr;
 324                         buf->entries++;
 325                         rte_memcpy(addr, buf->entry[0].pattern,
 326                                    user_pattern_size);
 327                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 328                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 329                         addr = (void *)(((uintptr_t)addr) +
 330                                         elt * sizeof(*item));
 331                 }
 332         }
 333         memset(flow_items, 0, sizeof(flow_items));
 334         next_node = node->next;
 335         stack[stack_pos] = next_node;
 336         node = next_node ? &graph[*next_node] : NULL;
 337         while (node) {
 338                 flow_items[stack_pos].type = node->type;
 339                 if (node->rss_types & types) {
 340                         /*
 341                          * compute the number of items to copy from the
 342                          * expansion and copy it.
 343                          * When the stack_pos is 0, there are 1 element in it,
 344                          * plus the addition END item.
 345                          */
 346                         elt = stack_pos + 2;
 347                         flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END;
 348                         lsize += elt * sizeof(*item) + user_pattern_size;
 349                         if (lsize <= size) {
 350                                 size_t n = elt * sizeof(*item);
 351
 352                                 buf->entry[buf->entries].priority =
 353                                         stack_pos + 1 + missed;
 354                                 buf->entry[buf->entries].pattern = addr;
 355                                 buf->entries++;
 356                                 rte_memcpy(addr, buf->entry[0].pattern,
 357                                            user_pattern_size);
 358                                 addr = (void *)(((uintptr_t)addr) +
 359                                                 user_pattern_size);
 360                                 rte_memcpy(addr, &missed_item,
 361                                            missed * sizeof(*item));
 362                                 addr = (void *)(((uintptr_t)addr) +
 363                                         missed * sizeof(*item));
 364                                 rte_memcpy(addr, flow_items, n);
 365                                 addr = (void *)(((uintptr_t)addr) + n);
 366                         }
 367                 }
 368                 /* Go deeper. */
 369                 if (node->next) {
 370                         next_node = node->next;
 371                         if (stack_pos++ == MLX5_RSS_EXP_ELT_N) {
 372                                 rte_errno = E2BIG;
 373                                 return -rte_errno;
 374                         }
 375                         stack[stack_pos] = next_node;
 376                 } else if (*(next_node + 1)) {
 377                         /* Follow up with the next possibility. */
 378                         ++next_node;
 379                 } else {
 380                         /* Move to the next path. */
 381                         if (stack_pos)
 382                                 next_node = stack[--stack_pos];
 383                         next_node++;
 384                         stack[stack_pos] = next_node;
 385                 }
 386                 node = *next_node ? &graph[*next_node] : NULL;
 387         };
 388         /* no expanded flows but we have missed item, create one rule for it */
 389         if (buf->entries == 1 && missed != 0) {
 390                 elt = 2;
 391                 lsize += elt * sizeof(*item) + user_pattern_size;
 392                 if (lsize <= size) {
 393                         buf->entry[buf->entries].priority = 1;
 394                         buf->entry[buf->entries].pattern = addr;
 395                         buf->entries++;
 396                         flow_items[0].type = missed_item.type;
 397                         flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 398                         rte_memcpy(addr, buf->entry[0].pattern,
 399                                    user_pattern_size);
 400                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 401                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 402                 }
 403         }
 404         return lsize;
 405 }
 406
 407 enum mlx5_expansion {
 408         MLX5_EXPANSION_ROOT,
 409         MLX5_EXPANSION_ROOT_OUTER,
 410         MLX5_EXPANSION_ROOT_ETH_VLAN,
 411         MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
 412         MLX5_EXPANSION_OUTER_ETH,
 413         MLX5_EXPANSION_OUTER_ETH_VLAN,
 414         MLX5_EXPANSION_OUTER_VLAN,
 415         MLX5_EXPANSION_OUTER_IPV4,
 416         MLX5_EXPANSION_OUTER_IPV4_UDP,
 417         MLX5_EXPANSION_OUTER_IPV4_TCP,
 418         MLX5_EXPANSION_OUTER_IPV6,
 419         MLX5_EXPANSION_OUTER_IPV6_UDP,
 420         MLX5_EXPANSION_OUTER_IPV6_TCP,
 421         MLX5_EXPANSION_VXLAN,
 422         MLX5_EXPANSION_VXLAN_GPE,
 423         MLX5_EXPANSION_GRE,
 424         MLX5_EXPANSION_MPLS,
 425         MLX5_EXPANSION_ETH,
 426         MLX5_EXPANSION_ETH_VLAN,
 427         MLX5_EXPANSION_VLAN,
 428         MLX5_EXPANSION_IPV4,
 429         MLX5_EXPANSION_IPV4_UDP,
 430         MLX5_EXPANSION_IPV4_TCP,
 431         MLX5_EXPANSION_IPV6,
 432         MLX5_EXPANSION_IPV6_UDP,
 433         MLX5_EXPANSION_IPV6_TCP,
 434 };
 435
 436 /** Supported expansion of items. */
 437 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
 438         [MLX5_EXPANSION_ROOT] = {
 439                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 440                                                   MLX5_EXPANSION_IPV4,
 441                                                   MLX5_EXPANSION_IPV6),
 442                 .type = RTE_FLOW_ITEM_TYPE_END,
 443         },
 444         [MLX5_EXPANSION_ROOT_OUTER] = {
 445                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
 446                                                   MLX5_EXPANSION_OUTER_IPV4,
 447                                                   MLX5_EXPANSION_OUTER_IPV6),
 448                 .type = RTE_FLOW_ITEM_TYPE_END,
 449         },
 450         [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
 451                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
 452                 .type = RTE_FLOW_ITEM_TYPE_END,
 453         },
 454         [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
 455                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 456                                                 (MLX5_EXPANSION_OUTER_ETH_VLAN),
 457                 .type = RTE_FLOW_ITEM_TYPE_END,
 458         },
 459         [MLX5_EXPANSION_OUTER_ETH] = {
 460                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 461                                                   MLX5_EXPANSION_OUTER_IPV6,
 462                                                   MLX5_EXPANSION_MPLS),
 463                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 464                 .rss_types = 0,
 465         },
 466         [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
 467                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 468                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 469                 .rss_types = 0,
 470         },
 471         [MLX5_EXPANSION_OUTER_VLAN] = {
 472                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 473                                                   MLX5_EXPANSION_OUTER_IPV6),
 474                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 475         },
 476         [MLX5_EXPANSION_OUTER_IPV4] = {
 477                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 478                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 479                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 480                          MLX5_EXPANSION_GRE,
 481                          MLX5_EXPANSION_IPV4,
 482                          MLX5_EXPANSION_IPV6),
 483                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 484                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 485                         ETH_RSS_NONFRAG_IPV4_OTHER,
 486         },
 487         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 488                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 489                                                   MLX5_EXPANSION_VXLAN_GPE),
 490                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 491                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 492         },
 493         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 494                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 495                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 496         },
 497         [MLX5_EXPANSION_OUTER_IPV6] = {
 498                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 499                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 500                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 501                          MLX5_EXPANSION_IPV4,
 502                          MLX5_EXPANSION_IPV6),
 503                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 504                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 505                         ETH_RSS_NONFRAG_IPV6_OTHER,
 506         },
 507         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 508                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 509                                                   MLX5_EXPANSION_VXLAN_GPE),
 510                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 511                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 512         },
 513         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 514                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 515                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 516         },
 517         [MLX5_EXPANSION_VXLAN] = {
 518                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 519                                                   MLX5_EXPANSION_IPV4,
 520                                                   MLX5_EXPANSION_IPV6),
 521                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 522         },
 523         [MLX5_EXPANSION_VXLAN_GPE] = {
 524                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 525                                                   MLX5_EXPANSION_IPV4,
 526                                                   MLX5_EXPANSION_IPV6),
 527                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 528         },
 529         [MLX5_EXPANSION_GRE] = {
 530                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4),
 531                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 532         },
 533         [MLX5_EXPANSION_MPLS] = {
 534                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 535                                                   MLX5_EXPANSION_IPV6),
 536                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 537         },
 538         [MLX5_EXPANSION_ETH] = {
 539                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 540                                                   MLX5_EXPANSION_IPV6),
 541                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 542         },
 543         [MLX5_EXPANSION_ETH_VLAN] = {
 544                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 545                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 546         },
 547         [MLX5_EXPANSION_VLAN] = {
 548                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 549                                                   MLX5_EXPANSION_IPV6),
 550                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 551         },
 552         [MLX5_EXPANSION_IPV4] = {
 553                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 554                                                   MLX5_EXPANSION_IPV4_TCP),
 555                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 556                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 557                         ETH_RSS_NONFRAG_IPV4_OTHER,
 558         },
 559         [MLX5_EXPANSION_IPV4_UDP] = {
 560                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 561                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 562         },
 563         [MLX5_EXPANSION_IPV4_TCP] = {
 564                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 565                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 566         },
 567         [MLX5_EXPANSION_IPV6] = {
 568                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 569                                                   MLX5_EXPANSION_IPV6_TCP),
 570                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 571                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 572                         ETH_RSS_NONFRAG_IPV6_OTHER,
 573         },
 574         [MLX5_EXPANSION_IPV6_UDP] = {
 575                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 576                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 577         },
 578         [MLX5_EXPANSION_IPV6_TCP] = {
 579                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 580                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 581         },
 582 };
 583
 584 static struct rte_flow_shared_action *
 585 mlx5_shared_action_create(struct rte_eth_dev *dev,
 586                           const struct rte_flow_shared_action_conf *conf,
 587                           const struct rte_flow_action *action,
 588                           struct rte_flow_error *error);
 589 static int mlx5_shared_action_destroy
 590                                 (struct rte_eth_dev *dev,
 591                                  struct rte_flow_shared_action *shared_action,
 592                                  struct rte_flow_error *error);
 593 static int mlx5_shared_action_update
 594                                 (struct rte_eth_dev *dev,
 595                                  struct rte_flow_shared_action *shared_action,
 596                                  const struct rte_flow_action *action,
 597                                  struct rte_flow_error *error);
 598 static int mlx5_shared_action_query
 599                                 (struct rte_eth_dev *dev,
 600                                  const struct rte_flow_shared_action *action,
 601                                  void *data,
 602                                  struct rte_flow_error *error);
 603 static int
 604 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
 605                     struct rte_flow_tunnel *app_tunnel,
 606                     struct rte_flow_action **actions,
 607                     uint32_t *num_of_actions,
 608                     struct rte_flow_error *error);
 609 static int
 610 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
 611                        struct rte_flow_tunnel *app_tunnel,
 612                        struct rte_flow_item **items,
 613                        uint32_t *num_of_items,
 614                        struct rte_flow_error *error);
 615 static int
 616 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
 617                               struct rte_flow_item *pmd_items,
 618                               uint32_t num_items, struct rte_flow_error *err);
 619 static int
 620 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
 621                                 struct rte_flow_action *pmd_actions,
 622                                 uint32_t num_actions,
 623                                 struct rte_flow_error *err);
 624 static int
 625 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
 626                                   struct rte_mbuf *m,
 627                                   struct rte_flow_restore_info *info,
 628                                   struct rte_flow_error *err);
 629
 630 static const struct rte_flow_ops mlx5_flow_ops = {
 631         .validate = mlx5_flow_validate,
 632         .create = mlx5_flow_create,
 633         .destroy = mlx5_flow_destroy,
 634         .flush = mlx5_flow_flush,
 635         .isolate = mlx5_flow_isolate,
 636         .query = mlx5_flow_query,
 637         .dev_dump = mlx5_flow_dev_dump,
 638         .get_aged_flows = mlx5_flow_get_aged_flows,
 639         .shared_action_create = mlx5_shared_action_create,
 640         .shared_action_destroy = mlx5_shared_action_destroy,
 641         .shared_action_update = mlx5_shared_action_update,
 642         .shared_action_query = mlx5_shared_action_query,
 643         .tunnel_decap_set = mlx5_flow_tunnel_decap_set,
 644         .tunnel_match = mlx5_flow_tunnel_match,
 645         .tunnel_action_decap_release = mlx5_flow_tunnel_action_release,
 646         .tunnel_item_release = mlx5_flow_tunnel_item_release,
 647         .get_restore_info = mlx5_flow_tunnel_get_restore_info,
 648 };
 649
 650 /* Tunnel information. */
 651 struct mlx5_flow_tunnel_info {
 652         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 653         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 654 };
 655
 656 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 657         {
 658                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 659                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 660         },
 661         {
 662                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
 663                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
 664         },
 665         {
 666                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 667                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 668         },
 669         {
 670                 .tunnel = MLX5_FLOW_LAYER_GRE,
 671                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 672         },
 673         {
 674                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 675                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 676         },
 677         {
 678                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 679                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 680         },
 681         {
 682                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 683                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 684         },
 685         {
 686                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 687                 .ptype = RTE_PTYPE_TUNNEL_IP,
 688         },
 689         {
 690                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 691                 .ptype = RTE_PTYPE_TUNNEL_IP,
 692         },
 693         {
 694                 .tunnel = MLX5_FLOW_LAYER_GTP,
 695                 .ptype = RTE_PTYPE_TUNNEL_GTPU,
 696         },
 697 };
 698
 699
 700
 701 /**
 702  * Translate tag ID to register.
 703  *
 704  * @param[in] dev
 705  *   Pointer to the Ethernet device structure.
 706  * @param[in] feature
 707  *   The feature that request the register.
 708  * @param[in] id
 709  *   The request register ID.
 710  * @param[out] error
 711  *   Error description in case of any.
 712  *
 713  * @return
 714  *   The request register on success, a negative errno
 715  *   value otherwise and rte_errno is set.
 716  */
 717 int
 718 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 719                      enum mlx5_feature_name feature,
 720                      uint32_t id,
 721                      struct rte_flow_error *error)
 722 {
 723         struct mlx5_priv *priv = dev->data->dev_private;
 724         struct mlx5_dev_config *config = &priv->config;
 725         enum modify_reg start_reg;
 726         bool skip_mtr_reg = false;
 727
 728         switch (feature) {
 729         case MLX5_HAIRPIN_RX:
 730                 return REG_B;
 731         case MLX5_HAIRPIN_TX:
 732                 return REG_A;
 733         case MLX5_METADATA_RX:
 734                 switch (config->dv_xmeta_en) {
 735                 case MLX5_XMETA_MODE_LEGACY:
 736                         return REG_B;
 737                 case MLX5_XMETA_MODE_META16:
 738                         return REG_C_0;
 739                 case MLX5_XMETA_MODE_META32:
 740                         return REG_C_1;
 741                 }
 742                 break;
 743         case MLX5_METADATA_TX:
 744                 return REG_A;
 745         case MLX5_METADATA_FDB:
 746                 switch (config->dv_xmeta_en) {
 747                 case MLX5_XMETA_MODE_LEGACY:
 748                         return REG_NON;
 749                 case MLX5_XMETA_MODE_META16:
 750                         return REG_C_0;
 751                 case MLX5_XMETA_MODE_META32:
 752                         return REG_C_1;
 753                 }
 754                 break;
 755         case MLX5_FLOW_MARK:
 756                 switch (config->dv_xmeta_en) {
 757                 case MLX5_XMETA_MODE_LEGACY:
 758                         return REG_NON;
 759                 case MLX5_XMETA_MODE_META16:
 760                         return REG_C_1;
 761                 case MLX5_XMETA_MODE_META32:
 762                         return REG_C_0;
 763                 }
 764                 break;
 765         case MLX5_MTR_SFX:
 766                 /*
 767                  * If meter color and flow match share one register, flow match
 768                  * should use the meter color register for match.
 769                  */
 770                 if (priv->mtr_reg_share)
 771                         return priv->mtr_color_reg;
 772                 else
 773                         return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 774                                REG_C_3;
 775         case MLX5_MTR_COLOR:
 776         case MLX5_ASO_FLOW_HIT: /* Both features use the same REG_C. */
 777                 MLX5_ASSERT(priv->mtr_color_reg != REG_NON);
 778                 return priv->mtr_color_reg;
 779         case MLX5_COPY_MARK:
 780                 /*
 781                  * Metadata COPY_MARK register using is in meter suffix sub
 782                  * flow while with meter. It's safe to share the same register.
 783                  */
 784                 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
 785         case MLX5_APP_TAG:
 786                 /*
 787                  * If meter is enable, it will engage the register for color
 788                  * match and flow match. If meter color match is not using the
 789                  * REG_C_2, need to skip the REG_C_x be used by meter color
 790                  * match.
 791                  * If meter is disable, free to use all available registers.
 792                  */
 793                 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 794                             (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
 795                 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
 796                 if (id > (uint32_t)(REG_C_7 - start_reg))
 797                         return rte_flow_error_set(error, EINVAL,
 798                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 799                                                   NULL, "invalid tag id");
 800                 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON)
 801                         return rte_flow_error_set(error, ENOTSUP,
 802                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 803                                                   NULL, "unsupported tag id");
 804                 /*
 805                  * This case means meter is using the REG_C_x great than 2.
 806                  * Take care not to conflict with meter color REG_C_x.
 807                  * If the available index REG_C_y >= REG_C_x, skip the
 808                  * color register.
 809                  */
 810                 if (skip_mtr_reg && config->flow_mreg_c
 811                     [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
 812                         if (id >= (uint32_t)(REG_C_7 - start_reg))
 813                                 return rte_flow_error_set(error, EINVAL,
 814                                                        RTE_FLOW_ERROR_TYPE_ITEM,
 815                                                         NULL, "invalid tag id");
 816                         if (config->flow_mreg_c
 817                             [id + 1 + start_reg - REG_C_0] != REG_NON)
 818                                 return config->flow_mreg_c
 819                                                [id + 1 + start_reg - REG_C_0];
 820                         return rte_flow_error_set(error, ENOTSUP,
 821                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 822                                                   NULL, "unsupported tag id");
 823                 }
 824                 return config->flow_mreg_c[id + start_reg - REG_C_0];
 825         }
 826         MLX5_ASSERT(false);
 827         return rte_flow_error_set(error, EINVAL,
 828                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 829                                   NULL, "invalid feature name");
 830 }
 831
 832 /**
 833  * Check extensive flow metadata register support.
 834  *
 835  * @param dev
 836  *   Pointer to rte_eth_dev structure.
 837  *
 838  * @return
 839  *   True if device supports extensive flow metadata register, otherwise false.
 840  */
 841 bool
 842 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
 843 {
 844         struct mlx5_priv *priv = dev->data->dev_private;
 845         struct mlx5_dev_config *config = &priv->config;
 846
 847         /*
 848          * Having available reg_c can be regarded inclusively as supporting
 849          * extensive flow metadata register, which could mean,
 850          * - metadata register copy action by modify header.
 851          * - 16 modify header actions is supported.
 852          * - reg_c's are preserved across different domain (FDB and NIC) on
 853          *   packet loopback by flow lookup miss.
 854          */
 855         return config->flow_mreg_c[2] != REG_NON;
 856 }
 857
 858 /**
 859  * Get the lowest priority.
 860  *
 861  * @param[in] dev
 862  *   Pointer to the Ethernet device structure.
 863  * @param[in] attributes
 864  *   Pointer to device flow rule attributes.
 865  *
 866  * @return
 867  *   The value of lowest priority of flow.
 868  */
 869 uint32_t
 870 mlx5_get_lowest_priority(struct rte_eth_dev *dev,
 871                           const struct rte_flow_attr *attr)
 872 {
 873         struct mlx5_priv *priv = dev->data->dev_private;
 874
 875         if (!attr->group && !attr->transfer)
 876                 return priv->config.flow_prio - 2;
 877         return MLX5_NON_ROOT_FLOW_MAX_PRIO - 1;
 878 }
 879
 880 /**
 881  * Calculate matcher priority of the flow.
 882  *
 883  * @param[in] dev
 884  *   Pointer to the Ethernet device structure.
 885  * @param[in] attr
 886  *   Pointer to device flow rule attributes.
 887  * @param[in] subpriority
 888  *   The priority based on the items.
 889  * @return
 890  *   The matcher priority of the flow.
 891  */
 892 uint16_t
 893 mlx5_get_matcher_priority(struct rte_eth_dev *dev,
 894                           const struct rte_flow_attr *attr,
 895                           uint32_t subpriority)
 896 {
 897         uint16_t priority = (uint16_t)attr->priority;
 898         struct mlx5_priv *priv = dev->data->dev_private;
 899
 900         if (!attr->group && !attr->transfer) {
 901                 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
 902                         priority = priv->config.flow_prio - 1;
 903                 return mlx5_os_flow_adjust_priority(dev, priority, subpriority);
 904         }
 905         if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
 906                 priority = MLX5_NON_ROOT_FLOW_MAX_PRIO;
 907         return priority * 3 + subpriority;
 908 }
 909
 910 /**
 911  * Verify the @p item specifications (spec, last, mask) are compatible with the
 912  * NIC capabilities.
 913  *
 914  * @param[in] item
 915  *   Item specification.
 916  * @param[in] mask
 917  *   @p item->mask or flow default bit-masks.
 918  * @param[in] nic_mask
 919  *   Bit-masks covering supported fields by the NIC to compare with user mask.
 920  * @param[in] size
 921  *   Bit-masks size in bytes.
 922  * @param[in] range_accepted
 923  *   True if range of values is accepted for specific fields, false otherwise.
 924  * @param[out] error
 925  *   Pointer to error structure.
 926  *
 927  * @return
 928  *   0 on success, a negative errno value otherwise and rte_errno is set.
 929  */
 930 int
 931 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
 932                           const uint8_t *mask,
 933                           const uint8_t *nic_mask,
 934                           unsigned int size,
 935                           bool range_accepted,
 936                           struct rte_flow_error *error)
 937 {
 938         unsigned int i;
 939
 940         MLX5_ASSERT(nic_mask);
 941         for (i = 0; i < size; ++i)
 942                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
 943                         return rte_flow_error_set(error, ENOTSUP,
 944                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 945                                                   item,
 946                                                   "mask enables non supported"
 947                                                   " bits");
 948         if (!item->spec && (item->mask || item->last))
 949                 return rte_flow_error_set(error, EINVAL,
 950                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
 951                                           "mask/last without a spec is not"
 952                                           " supported");
 953         if (item->spec && item->last && !range_accepted) {
 954                 uint8_t spec[size];
 955                 uint8_t last[size];
 956                 unsigned int i;
 957                 int ret;
 958
 959                 for (i = 0; i < size; ++i) {
 960                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
 961                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
 962                 }
 963                 ret = memcmp(spec, last, size);
 964                 if (ret != 0)
 965                         return rte_flow_error_set(error, EINVAL,
 966                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 967                                                   item,
 968                                                   "range is not valid");
 969         }
 970         return 0;
 971 }
 972
 973 /**
 974  * Adjust the hash fields according to the @p flow information.
 975  *
 976  * @param[in] dev_flow.
 977  *   Pointer to the mlx5_flow.
 978  * @param[in] tunnel
 979  *   1 when the hash field is for a tunnel item.
 980  * @param[in] layer_types
 981  *   ETH_RSS_* types.
 982  * @param[in] hash_fields
 983  *   Item hash fields.
 984  *
 985  * @return
 986  *   The hash fields that should be used.
 987  */
 988 uint64_t
 989 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc,
 990                             int tunnel __rte_unused, uint64_t layer_types,
 991                             uint64_t hash_fields)
 992 {
 993 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 994         int rss_request_inner = rss_desc->level >= 2;
 995
 996         /* Check RSS hash level for tunnel. */
 997         if (tunnel && rss_request_inner)
 998                 hash_fields |= IBV_RX_HASH_INNER;
 999         else if (tunnel || rss_request_inner)
1000                 return 0;
1001 #endif
1002         /* Check if requested layer matches RSS hash fields. */
1003         if (!(rss_desc->types & layer_types))
1004                 return 0;
1005         return hash_fields;
1006 }
1007
1008 /**
1009  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
1010  * if several tunnel rules are used on this queue, the tunnel ptype will be
1011  * cleared.
1012  *
1013  * @param rxq_ctrl
1014  *   Rx queue to update.
1015  */
1016 static void
1017 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
1018 {
1019         unsigned int i;
1020         uint32_t tunnel_ptype = 0;
1021
1022         /* Look up for the ptype to use. */
1023         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
1024                 if (!rxq_ctrl->flow_tunnels_n[i])
1025                         continue;
1026                 if (!tunnel_ptype) {
1027                         tunnel_ptype = tunnels_info[i].ptype;
1028                 } else {
1029                         tunnel_ptype = 0;
1030                         break;
1031                 }
1032         }
1033         rxq_ctrl->rxq.tunnel = tunnel_ptype;
1034 }
1035
1036 /**
1037  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
1038  * flow.
1039  *
1040  * @param[in] dev
1041  *   Pointer to the Ethernet device structure.
1042  * @param[in] dev_handle
1043  *   Pointer to device flow handle structure.
1044  */
1045 static void
1046 flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
1047                        struct mlx5_flow_handle *dev_handle)
1048 {
1049         struct mlx5_priv *priv = dev->data->dev_private;
1050         const int mark = dev_handle->mark;
1051         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1052         struct mlx5_ind_table_obj *ind_tbl = NULL;
1053         unsigned int i;
1054
1055         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1056                 struct mlx5_hrxq *hrxq;
1057
1058                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1059                               dev_handle->rix_hrxq);
1060                 if (hrxq)
1061                         ind_tbl = hrxq->ind_table;
1062         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1063                 struct mlx5_shared_action_rss *shared_rss;
1064
1065                 shared_rss = mlx5_ipool_get
1066                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1067                          dev_handle->rix_srss);
1068                 if (shared_rss)
1069                         ind_tbl = shared_rss->ind_tbl;
1070         }
1071         if (!ind_tbl)
1072                 return;
1073         for (i = 0; i != ind_tbl->queues_n; ++i) {
1074                 int idx = ind_tbl->queues[i];
1075                 struct mlx5_rxq_ctrl *rxq_ctrl =
1076                         container_of((*priv->rxqs)[idx],
1077                                      struct mlx5_rxq_ctrl, rxq);
1078
1079                 /*
1080                  * To support metadata register copy on Tx loopback,
1081                  * this must be always enabled (metadata may arive
1082                  * from other port - not from local flows only.
1083                  */
1084                 if (priv->config.dv_flow_en &&
1085                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1086                     mlx5_flow_ext_mreg_supported(dev)) {
1087                         rxq_ctrl->rxq.mark = 1;
1088                         rxq_ctrl->flow_mark_n = 1;
1089                 } else if (mark) {
1090                         rxq_ctrl->rxq.mark = 1;
1091                         rxq_ctrl->flow_mark_n++;
1092                 }
1093                 if (tunnel) {
1094                         unsigned int j;
1095
1096                         /* Increase the counter matching the flow. */
1097                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1098                                 if ((tunnels_info[j].tunnel &
1099                                      dev_handle->layers) ==
1100                                     tunnels_info[j].tunnel) {
1101                                         rxq_ctrl->flow_tunnels_n[j]++;
1102                                         break;
1103                                 }
1104                         }
1105                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1106                 }
1107         }
1108 }
1109
1110 /**
1111  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
1112  *
1113  * @param[in] dev
1114  *   Pointer to the Ethernet device structure.
1115  * @param[in] flow
1116  *   Pointer to flow structure.
1117  */
1118 static void
1119 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
1120 {
1121         struct mlx5_priv *priv = dev->data->dev_private;
1122         uint32_t handle_idx;
1123         struct mlx5_flow_handle *dev_handle;
1124
1125         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1126                        handle_idx, dev_handle, next)
1127                 flow_drv_rxq_flags_set(dev, dev_handle);
1128 }
1129
1130 /**
1131  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1132  * device flow if no other flow uses it with the same kind of request.
1133  *
1134  * @param dev
1135  *   Pointer to Ethernet device.
1136  * @param[in] dev_handle
1137  *   Pointer to the device flow handle structure.
1138  */
1139 static void
1140 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev,
1141                         struct mlx5_flow_handle *dev_handle)
1142 {
1143         struct mlx5_priv *priv = dev->data->dev_private;
1144         const int mark = dev_handle->mark;
1145         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1146         struct mlx5_ind_table_obj *ind_tbl = NULL;
1147         unsigned int i;
1148
1149         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1150                 struct mlx5_hrxq *hrxq;
1151
1152                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1153                               dev_handle->rix_hrxq);
1154                 if (hrxq)
1155                         ind_tbl = hrxq->ind_table;
1156         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1157                 struct mlx5_shared_action_rss *shared_rss;
1158
1159                 shared_rss = mlx5_ipool_get
1160                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1161                          dev_handle->rix_srss);
1162                 if (shared_rss)
1163                         ind_tbl = shared_rss->ind_tbl;
1164         }
1165         if (!ind_tbl)
1166                 return;
1167         MLX5_ASSERT(dev->data->dev_started);
1168         for (i = 0; i != ind_tbl->queues_n; ++i) {
1169                 int idx = ind_tbl->queues[i];
1170                 struct mlx5_rxq_ctrl *rxq_ctrl =
1171                         container_of((*priv->rxqs)[idx],
1172                                      struct mlx5_rxq_ctrl, rxq);
1173
1174                 if (priv->config.dv_flow_en &&
1175                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1176                     mlx5_flow_ext_mreg_supported(dev)) {
1177                         rxq_ctrl->rxq.mark = 1;
1178                         rxq_ctrl->flow_mark_n = 1;
1179                 } else if (mark) {
1180                         rxq_ctrl->flow_mark_n--;
1181                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
1182                 }
1183                 if (tunnel) {
1184                         unsigned int j;
1185
1186                         /* Decrease the counter matching the flow. */
1187                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1188                                 if ((tunnels_info[j].tunnel &
1189                                      dev_handle->layers) ==
1190                                     tunnels_info[j].tunnel) {
1191                                         rxq_ctrl->flow_tunnels_n[j]--;
1192                                         break;
1193                                 }
1194                         }
1195                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1196                 }
1197         }
1198 }
1199
1200 /**
1201  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1202  * @p flow if no other flow uses it with the same kind of request.
1203  *
1204  * @param dev
1205  *   Pointer to Ethernet device.
1206  * @param[in] flow
1207  *   Pointer to the flow.
1208  */
1209 static void
1210 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
1211 {
1212         struct mlx5_priv *priv = dev->data->dev_private;
1213         uint32_t handle_idx;
1214         struct mlx5_flow_handle *dev_handle;
1215
1216         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1217                        handle_idx, dev_handle, next)
1218                 flow_drv_rxq_flags_trim(dev, dev_handle);
1219 }
1220
1221 /**
1222  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
1223  *
1224  * @param dev
1225  *   Pointer to Ethernet device.
1226  */
1227 static void
1228 flow_rxq_flags_clear(struct rte_eth_dev *dev)
1229 {
1230         struct mlx5_priv *priv = dev->data->dev_private;
1231         unsigned int i;
1232
1233         for (i = 0; i != priv->rxqs_n; ++i) {
1234                 struct mlx5_rxq_ctrl *rxq_ctrl;
1235                 unsigned int j;
1236
1237                 if (!(*priv->rxqs)[i])
1238                         continue;
1239                 rxq_ctrl = container_of((*priv->rxqs)[i],
1240                                         struct mlx5_rxq_ctrl, rxq);
1241                 rxq_ctrl->flow_mark_n = 0;
1242                 rxq_ctrl->rxq.mark = 0;
1243                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
1244                         rxq_ctrl->flow_tunnels_n[j] = 0;
1245                 rxq_ctrl->rxq.tunnel = 0;
1246         }
1247 }
1248
1249 /**
1250  * Set the Rx queue dynamic metadata (mask and offset) for a flow
1251  *
1252  * @param[in] dev
1253  *   Pointer to the Ethernet device structure.
1254  */
1255 void
1256 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev)
1257 {
1258         struct mlx5_priv *priv = dev->data->dev_private;
1259         struct mlx5_rxq_data *data;
1260         unsigned int i;
1261
1262         for (i = 0; i != priv->rxqs_n; ++i) {
1263                 if (!(*priv->rxqs)[i])
1264                         continue;
1265                 data = (*priv->rxqs)[i];
1266                 if (!rte_flow_dynf_metadata_avail()) {
1267                         data->dynf_meta = 0;
1268                         data->flow_meta_mask = 0;
1269                         data->flow_meta_offset = -1;
1270                         data->flow_meta_port_mask = 0;
1271                 } else {
1272                         data->dynf_meta = 1;
1273                         data->flow_meta_mask = rte_flow_dynf_metadata_mask;
1274                         data->flow_meta_offset = rte_flow_dynf_metadata_offs;
1275                         data->flow_meta_port_mask = (uint32_t)~0;
1276                         if (priv->config.dv_xmeta_en == MLX5_XMETA_MODE_META16)
1277                                 data->flow_meta_port_mask >>= 16;
1278                 }
1279         }
1280 }
1281
1282 /*
1283  * return a pointer to the desired action in the list of actions.
1284  *
1285  * @param[in] actions
1286  *   The list of actions to search the action in.
1287  * @param[in] action
1288  *   The action to find.
1289  *
1290  * @return
1291  *   Pointer to the action in the list, if found. NULL otherwise.
1292  */
1293 const struct rte_flow_action *
1294 mlx5_flow_find_action(const struct rte_flow_action *actions,
1295                       enum rte_flow_action_type action)
1296 {
1297         if (actions == NULL)
1298                 return NULL;
1299         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
1300                 if (actions->type == action)
1301                         return actions;
1302         return NULL;
1303 }
1304
1305 /*
1306  * Validate the flag action.
1307  *
1308  * @param[in] action_flags
1309  *   Bit-fields that holds the actions detected until now.
1310  * @param[in] attr
1311  *   Attributes of flow that includes this action.
1312  * @param[out] error
1313  *   Pointer to error structure.
1314  *
1315  * @return
1316  *   0 on success, a negative errno value otherwise and rte_errno is set.
1317  */
1318 int
1319 mlx5_flow_validate_action_flag(uint64_t action_flags,
1320                                const struct rte_flow_attr *attr,
1321                                struct rte_flow_error *error)
1322 {
1323         if (action_flags & MLX5_FLOW_ACTION_MARK)
1324                 return rte_flow_error_set(error, EINVAL,
1325                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1326                                           "can't mark and flag in same flow");
1327         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1328                 return rte_flow_error_set(error, EINVAL,
1329                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1330                                           "can't have 2 flag"
1331                                           " actions in same flow");
1332         if (attr->egress)
1333                 return rte_flow_error_set(error, ENOTSUP,
1334                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1335                                           "flag action not supported for "
1336                                           "egress");
1337         return 0;
1338 }
1339
1340 /*
1341  * Validate the mark action.
1342  *
1343  * @param[in] action
1344  *   Pointer to the queue action.
1345  * @param[in] action_flags
1346  *   Bit-fields that holds the actions detected until now.
1347  * @param[in] attr
1348  *   Attributes of flow that includes this action.
1349  * @param[out] error
1350  *   Pointer to error structure.
1351  *
1352  * @return
1353  *   0 on success, a negative errno value otherwise and rte_errno is set.
1354  */
1355 int
1356 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
1357                                uint64_t action_flags,
1358                                const struct rte_flow_attr *attr,
1359                                struct rte_flow_error *error)
1360 {
1361         const struct rte_flow_action_mark *mark = action->conf;
1362
1363         if (!mark)
1364                 return rte_flow_error_set(error, EINVAL,
1365                                           RTE_FLOW_ERROR_TYPE_ACTION,
1366                                           action,
1367                                           "configuration cannot be null");
1368         if (mark->id >= MLX5_FLOW_MARK_MAX)
1369                 return rte_flow_error_set(error, EINVAL,
1370                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1371                                           &mark->id,
1372                                           "mark id must in 0 <= id < "
1373                                           RTE_STR(MLX5_FLOW_MARK_MAX));
1374         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1375                 return rte_flow_error_set(error, EINVAL,
1376                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1377                                           "can't flag and mark in same flow");
1378         if (action_flags & MLX5_FLOW_ACTION_MARK)
1379                 return rte_flow_error_set(error, EINVAL,
1380                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1381                                           "can't have 2 mark actions in same"
1382                                           " flow");
1383         if (attr->egress)
1384                 return rte_flow_error_set(error, ENOTSUP,
1385                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1386                                           "mark action not supported for "
1387                                           "egress");
1388         return 0;
1389 }
1390
1391 /*
1392  * Validate the drop action.
1393  *
1394  * @param[in] action_flags
1395  *   Bit-fields that holds the actions detected until now.
1396  * @param[in] attr
1397  *   Attributes of flow that includes this action.
1398  * @param[out] error
1399  *   Pointer to error structure.
1400  *
1401  * @return
1402  *   0 on success, a negative errno value otherwise and rte_errno is set.
1403  */
1404 int
1405 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1406                                const struct rte_flow_attr *attr,
1407                                struct rte_flow_error *error)
1408 {
1409         if (attr->egress)
1410                 return rte_flow_error_set(error, ENOTSUP,
1411                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1412                                           "drop action not supported for "
1413                                           "egress");
1414         return 0;
1415 }
1416
1417 /*
1418  * Validate the queue action.
1419  *
1420  * @param[in] action
1421  *   Pointer to the queue action.
1422  * @param[in] action_flags
1423  *   Bit-fields that holds the actions detected until now.
1424  * @param[in] dev
1425  *   Pointer to the Ethernet device structure.
1426  * @param[in] attr
1427  *   Attributes of flow that includes this action.
1428  * @param[out] error
1429  *   Pointer to error structure.
1430  *
1431  * @return
1432  *   0 on success, a negative errno value otherwise and rte_errno is set.
1433  */
1434 int
1435 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1436                                 uint64_t action_flags,
1437                                 struct rte_eth_dev *dev,
1438                                 const struct rte_flow_attr *attr,
1439                                 struct rte_flow_error *error)
1440 {
1441         struct mlx5_priv *priv = dev->data->dev_private;
1442         const struct rte_flow_action_queue *queue = action->conf;
1443
1444         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1445                 return rte_flow_error_set(error, EINVAL,
1446                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1447                                           "can't have 2 fate actions in"
1448                                           " same flow");
1449         if (!priv->rxqs_n)
1450                 return rte_flow_error_set(error, EINVAL,
1451                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1452                                           NULL, "No Rx queues configured");
1453         if (queue->index >= priv->rxqs_n)
1454                 return rte_flow_error_set(error, EINVAL,
1455                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1456                                           &queue->index,
1457                                           "queue index out of range");
1458         if (!(*priv->rxqs)[queue->index])
1459                 return rte_flow_error_set(error, EINVAL,
1460                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1461                                           &queue->index,
1462                                           "queue is not configured");
1463         if (attr->egress)
1464                 return rte_flow_error_set(error, ENOTSUP,
1465                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1466                                           "queue action not supported for "
1467                                           "egress");
1468         return 0;
1469 }
1470
1471 /*
1472  * Validate the rss action.
1473  *
1474  * @param[in] dev
1475  *   Pointer to the Ethernet device structure.
1476  * @param[in] action
1477  *   Pointer to the queue action.
1478  * @param[out] error
1479  *   Pointer to error structure.
1480  *
1481  * @return
1482  *   0 on success, a negative errno value otherwise and rte_errno is set.
1483  */
1484 int
1485 mlx5_validate_action_rss(struct rte_eth_dev *dev,
1486                          const struct rte_flow_action *action,
1487                          struct rte_flow_error *error)
1488 {
1489         struct mlx5_priv *priv = dev->data->dev_private;
1490         const struct rte_flow_action_rss *rss = action->conf;
1491         enum mlx5_rxq_type rxq_type = MLX5_RXQ_TYPE_UNDEFINED;
1492         unsigned int i;
1493
1494         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1495             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1496                 return rte_flow_error_set(error, ENOTSUP,
1497                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1498                                           &rss->func,
1499                                           "RSS hash function not supported");
1500 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1501         if (rss->level > 2)
1502 #else
1503         if (rss->level > 1)
1504 #endif
1505                 return rte_flow_error_set(error, ENOTSUP,
1506                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1507                                           &rss->level,
1508                                           "tunnel RSS is not supported");
1509         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1510         if (rss->key_len == 0 && rss->key != NULL)
1511                 return rte_flow_error_set(error, ENOTSUP,
1512                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1513                                           &rss->key_len,
1514                                           "RSS hash key length 0");
1515         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1516                 return rte_flow_error_set(error, ENOTSUP,
1517                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1518                                           &rss->key_len,
1519                                           "RSS hash key too small");
1520         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1521                 return rte_flow_error_set(error, ENOTSUP,
1522                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1523                                           &rss->key_len,
1524                                           "RSS hash key too large");
1525         if (rss->queue_num > priv->config.ind_table_max_size)
1526                 return rte_flow_error_set(error, ENOTSUP,
1527                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1528                                           &rss->queue_num,
1529                                           "number of queues too large");
1530         if (rss->types & MLX5_RSS_HF_MASK)
1531                 return rte_flow_error_set(error, ENOTSUP,
1532                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1533                                           &rss->types,
1534                                           "some RSS protocols are not"
1535                                           " supported");
1536         if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) &&
1537             !(rss->types & ETH_RSS_IP))
1538                 return rte_flow_error_set(error, EINVAL,
1539                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1540                                           "L3 partial RSS requested but L3 RSS"
1541                                           " type not specified");
1542         if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) &&
1543             !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP)))
1544                 return rte_flow_error_set(error, EINVAL,
1545                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1546                                           "L4 partial RSS requested but L4 RSS"
1547                                           " type not specified");
1548         if (!priv->rxqs_n)
1549                 return rte_flow_error_set(error, EINVAL,
1550                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1551                                           NULL, "No Rx queues configured");
1552         if (!rss->queue_num)
1553                 return rte_flow_error_set(error, EINVAL,
1554                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1555                                           NULL, "No queues configured");
1556         for (i = 0; i != rss->queue_num; ++i) {
1557                 struct mlx5_rxq_ctrl *rxq_ctrl;
1558
1559                 if (rss->queue[i] >= priv->rxqs_n)
1560                         return rte_flow_error_set
1561                                 (error, EINVAL,
1562                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1563                                  &rss->queue[i], "queue index out of range");
1564                 if (!(*priv->rxqs)[rss->queue[i]])
1565                         return rte_flow_error_set
1566                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1567                                  &rss->queue[i], "queue is not configured");
1568                 rxq_ctrl = container_of((*priv->rxqs)[rss->queue[i]],
1569                                         struct mlx5_rxq_ctrl, rxq);
1570                 if (i == 0)
1571                         rxq_type = rxq_ctrl->type;
1572                 if (rxq_type != rxq_ctrl->type)
1573                         return rte_flow_error_set
1574                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1575                                  &rss->queue[i],
1576                                  "combining hairpin and regular RSS queues is not supported");
1577         }
1578         return 0;
1579 }
1580
1581 /*
1582  * Validate the rss action.
1583  *
1584  * @param[in] action
1585  *   Pointer to the queue action.
1586  * @param[in] action_flags
1587  *   Bit-fields that holds the actions detected until now.
1588  * @param[in] dev
1589  *   Pointer to the Ethernet device structure.
1590  * @param[in] attr
1591  *   Attributes of flow that includes this action.
1592  * @param[in] item_flags
1593  *   Items that were detected.
1594  * @param[out] error
1595  *   Pointer to error structure.
1596  *
1597  * @return
1598  *   0 on success, a negative errno value otherwise and rte_errno is set.
1599  */
1600 int
1601 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1602                               uint64_t action_flags,
1603                               struct rte_eth_dev *dev,
1604                               const struct rte_flow_attr *attr,
1605                               uint64_t item_flags,
1606                               struct rte_flow_error *error)
1607 {
1608         const struct rte_flow_action_rss *rss = action->conf;
1609         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1610         int ret;
1611
1612         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1613                 return rte_flow_error_set(error, EINVAL,
1614                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1615                                           "can't have 2 fate actions"
1616                                           " in same flow");
1617         ret = mlx5_validate_action_rss(dev, action, error);
1618         if (ret)
1619                 return ret;
1620         if (attr->egress)
1621                 return rte_flow_error_set(error, ENOTSUP,
1622                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1623                                           "rss action not supported for "
1624                                           "egress");
1625         if (rss->level > 1 && !tunnel)
1626                 return rte_flow_error_set(error, EINVAL,
1627                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1628                                           "inner RSS is not supported for "
1629                                           "non-tunnel flows");
1630         if ((item_flags & MLX5_FLOW_LAYER_ECPRI) &&
1631             !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) {
1632                 return rte_flow_error_set(error, EINVAL,
1633                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1634                                           "RSS on eCPRI is not supported now");
1635         }
1636         return 0;
1637 }
1638
1639 /*
1640  * Validate the default miss action.
1641  *
1642  * @param[in] action_flags
1643  *   Bit-fields that holds the actions detected until now.
1644  * @param[out] error
1645  *   Pointer to error structure.
1646  *
1647  * @return
1648  *   0 on success, a negative errno value otherwise and rte_errno is set.
1649  */
1650 int
1651 mlx5_flow_validate_action_default_miss(uint64_t action_flags,
1652                                 const struct rte_flow_attr *attr,
1653                                 struct rte_flow_error *error)
1654 {
1655         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1656                 return rte_flow_error_set(error, EINVAL,
1657                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1658                                           "can't have 2 fate actions in"
1659                                           " same flow");
1660         if (attr->egress)
1661                 return rte_flow_error_set(error, ENOTSUP,
1662                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1663                                           "default miss action not supported "
1664                                           "for egress");
1665         if (attr->group)
1666                 return rte_flow_error_set(error, ENOTSUP,
1667                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
1668                                           "only group 0 is supported");
1669         if (attr->transfer)
1670                 return rte_flow_error_set(error, ENOTSUP,
1671                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1672                                           NULL, "transfer is not supported");
1673         return 0;
1674 }
1675
1676 /*
1677  * Validate the count action.
1678  *
1679  * @param[in] dev
1680  *   Pointer to the Ethernet device structure.
1681  * @param[in] attr
1682  *   Attributes of flow that includes this action.
1683  * @param[out] error
1684  *   Pointer to error structure.
1685  *
1686  * @return
1687  *   0 on success, a negative errno value otherwise and rte_errno is set.
1688  */
1689 int
1690 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1691                                 const struct rte_flow_attr *attr,
1692                                 struct rte_flow_error *error)
1693 {
1694         if (attr->egress)
1695                 return rte_flow_error_set(error, ENOTSUP,
1696                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1697                                           "count action not supported for "
1698                                           "egress");
1699         return 0;
1700 }
1701
1702 /**
1703  * Verify the @p attributes will be correctly understood by the NIC and store
1704  * them in the @p flow if everything is correct.
1705  *
1706  * @param[in] dev
1707  *   Pointer to the Ethernet device structure.
1708  * @param[in] attributes
1709  *   Pointer to flow attributes
1710  * @param[out] error
1711  *   Pointer to error structure.
1712  *
1713  * @return
1714  *   0 on success, a negative errno value otherwise and rte_errno is set.
1715  */
1716 int
1717 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1718                               const struct rte_flow_attr *attributes,
1719                               struct rte_flow_error *error)
1720 {
1721         struct mlx5_priv *priv = dev->data->dev_private;
1722         uint32_t priority_max = priv->config.flow_prio - 1;
1723
1724         if (attributes->group)
1725                 return rte_flow_error_set(error, ENOTSUP,
1726                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1727                                           NULL, "groups is not supported");
1728         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
1729             attributes->priority >= priority_max)
1730                 return rte_flow_error_set(error, ENOTSUP,
1731                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1732                                           NULL, "priority out of range");
1733         if (attributes->egress)
1734                 return rte_flow_error_set(error, ENOTSUP,
1735                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1736                                           "egress is not supported");
1737         if (attributes->transfer && !priv->config.dv_esw_en)
1738                 return rte_flow_error_set(error, ENOTSUP,
1739                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1740                                           NULL, "transfer is not supported");
1741         if (!attributes->ingress)
1742                 return rte_flow_error_set(error, EINVAL,
1743                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1744                                           NULL,
1745                                           "ingress attribute is mandatory");
1746         return 0;
1747 }
1748
1749 /**
1750  * Validate ICMP6 item.
1751  *
1752  * @param[in] item
1753  *   Item specification.
1754  * @param[in] item_flags
1755  *   Bit-fields that holds the items detected until now.
1756  * @param[in] ext_vlan_sup
1757  *   Whether extended VLAN features are supported or not.
1758  * @param[out] error
1759  *   Pointer to error structure.
1760  *
1761  * @return
1762  *   0 on success, a negative errno value otherwise and rte_errno is set.
1763  */
1764 int
1765 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1766                                uint64_t item_flags,
1767                                uint8_t target_protocol,
1768                                struct rte_flow_error *error)
1769 {
1770         const struct rte_flow_item_icmp6 *mask = item->mask;
1771         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1772         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1773                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1774         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1775                                       MLX5_FLOW_LAYER_OUTER_L4;
1776         int ret;
1777
1778         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1779                 return rte_flow_error_set(error, EINVAL,
1780                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1781                                           "protocol filtering not compatible"
1782                                           " with ICMP6 layer");
1783         if (!(item_flags & l3m))
1784                 return rte_flow_error_set(error, EINVAL,
1785                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1786                                           "IPv6 is mandatory to filter on"
1787                                           " ICMP6");
1788         if (item_flags & l4m)
1789                 return rte_flow_error_set(error, EINVAL,
1790                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1791                                           "multiple L4 layers not supported");
1792         if (!mask)
1793                 mask = &rte_flow_item_icmp6_mask;
1794         ret = mlx5_flow_item_acceptable
1795                 (item, (const uint8_t *)mask,
1796                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1797                  sizeof(struct rte_flow_item_icmp6),
1798                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1799         if (ret < 0)
1800                 return ret;
1801         return 0;
1802 }
1803
1804 /**
1805  * Validate ICMP item.
1806  *
1807  * @param[in] item
1808  *   Item specification.
1809  * @param[in] item_flags
1810  *   Bit-fields that holds the items detected until now.
1811  * @param[out] error
1812  *   Pointer to error structure.
1813  *
1814  * @return
1815  *   0 on success, a negative errno value otherwise and rte_errno is set.
1816  */
1817 int
1818 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1819                              uint64_t item_flags,
1820                              uint8_t target_protocol,
1821                              struct rte_flow_error *error)
1822 {
1823         const struct rte_flow_item_icmp *mask = item->mask;
1824         const struct rte_flow_item_icmp nic_mask = {
1825                 .hdr.icmp_type = 0xff,
1826                 .hdr.icmp_code = 0xff,
1827                 .hdr.icmp_ident = RTE_BE16(0xffff),
1828                 .hdr.icmp_seq_nb = RTE_BE16(0xffff),
1829         };
1830         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1831         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1832                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1833         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1834                                       MLX5_FLOW_LAYER_OUTER_L4;
1835         int ret;
1836
1837         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1838                 return rte_flow_error_set(error, EINVAL,
1839                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1840                                           "protocol filtering not compatible"
1841                                           " with ICMP layer");
1842         if (!(item_flags & l3m))
1843                 return rte_flow_error_set(error, EINVAL,
1844                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1845                                           "IPv4 is mandatory to filter"
1846                                           " on ICMP");
1847         if (item_flags & l4m)
1848                 return rte_flow_error_set(error, EINVAL,
1849                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1850                                           "multiple L4 layers not supported");
1851         if (!mask)
1852                 mask = &nic_mask;
1853         ret = mlx5_flow_item_acceptable
1854                 (item, (const uint8_t *)mask,
1855                  (const uint8_t *)&nic_mask,
1856                  sizeof(struct rte_flow_item_icmp),
1857                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1858         if (ret < 0)
1859                 return ret;
1860         return 0;
1861 }
1862
1863 /**
1864  * Validate Ethernet item.
1865  *
1866  * @param[in] item
1867  *   Item specification.
1868  * @param[in] item_flags
1869  *   Bit-fields that holds the items detected until now.
1870  * @param[out] error
1871  *   Pointer to error structure.
1872  *
1873  * @return
1874  *   0 on success, a negative errno value otherwise and rte_errno is set.
1875  */
1876 int
1877 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1878                             uint64_t item_flags, bool ext_vlan_sup,
1879                             struct rte_flow_error *error)
1880 {
1881         const struct rte_flow_item_eth *mask = item->mask;
1882         const struct rte_flow_item_eth nic_mask = {
1883                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1884                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1885                 .type = RTE_BE16(0xffff),
1886                 .has_vlan = ext_vlan_sup ? 1 : 0,
1887         };
1888         int ret;
1889         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1890         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1891                                        MLX5_FLOW_LAYER_OUTER_L2;
1892
1893         if (item_flags & ethm)
1894                 return rte_flow_error_set(error, ENOTSUP,
1895                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1896                                           "multiple L2 layers not supported");
1897         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
1898             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
1899                 return rte_flow_error_set(error, EINVAL,
1900                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1901                                           "L2 layer should not follow "
1902                                           "L3 layers");
1903         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
1904             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
1905                 return rte_flow_error_set(error, EINVAL,
1906                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1907                                           "L2 layer should not follow VLAN");
1908         if (!mask)
1909                 mask = &rte_flow_item_eth_mask;
1910         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1911                                         (const uint8_t *)&nic_mask,
1912                                         sizeof(struct rte_flow_item_eth),
1913                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1914         return ret;
1915 }
1916
1917 /**
1918  * Validate VLAN item.
1919  *
1920  * @param[in] item
1921  *   Item specification.
1922  * @param[in] item_flags
1923  *   Bit-fields that holds the items detected until now.
1924  * @param[in] dev
1925  *   Ethernet device flow is being created on.
1926  * @param[out] error
1927  *   Pointer to error structure.
1928  *
1929  * @return
1930  *   0 on success, a negative errno value otherwise and rte_errno is set.
1931  */
1932 int
1933 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1934                              uint64_t item_flags,
1935                              struct rte_eth_dev *dev,
1936                              struct rte_flow_error *error)
1937 {
1938         const struct rte_flow_item_vlan *spec = item->spec;
1939         const struct rte_flow_item_vlan *mask = item->mask;
1940         const struct rte_flow_item_vlan nic_mask = {
1941                 .tci = RTE_BE16(UINT16_MAX),
1942                 .inner_type = RTE_BE16(UINT16_MAX),
1943         };
1944         uint16_t vlan_tag = 0;
1945         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1946         int ret;
1947         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1948                                         MLX5_FLOW_LAYER_INNER_L4) :
1949                                        (MLX5_FLOW_LAYER_OUTER_L3 |
1950                                         MLX5_FLOW_LAYER_OUTER_L4);
1951         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1952                                         MLX5_FLOW_LAYER_OUTER_VLAN;
1953
1954         if (item_flags & vlanm)
1955                 return rte_flow_error_set(error, EINVAL,
1956                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1957                                           "multiple VLAN layers not supported");
1958         else if ((item_flags & l34m) != 0)
1959                 return rte_flow_error_set(error, EINVAL,
1960                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1961                                           "VLAN cannot follow L3/L4 layer");
1962         if (!mask)
1963                 mask = &rte_flow_item_vlan_mask;
1964         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1965                                         (const uint8_t *)&nic_mask,
1966                                         sizeof(struct rte_flow_item_vlan),
1967                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1968         if (ret)
1969                 return ret;
1970         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
1971                 struct mlx5_priv *priv = dev->data->dev_private;
1972
1973                 if (priv->vmwa_context) {
1974                         /*
1975                          * Non-NULL context means we have a virtual machine
1976                          * and SR-IOV enabled, we have to create VLAN interface
1977                          * to make hypervisor to setup E-Switch vport
1978                          * context correctly. We avoid creating the multiple
1979                          * VLAN interfaces, so we cannot support VLAN tag mask.
1980                          */
1981                         return rte_flow_error_set(error, EINVAL,
1982                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1983                                                   item,
1984                                                   "VLAN tag mask is not"
1985                                                   " supported in virtual"
1986                                                   " environment");
1987                 }
1988         }
1989         if (spec) {
1990                 vlan_tag = spec->tci;
1991                 vlan_tag &= mask->tci;
1992         }
1993         /*
1994          * From verbs perspective an empty VLAN is equivalent
1995          * to a packet without VLAN layer.
1996          */
1997         if (!vlan_tag)
1998                 return rte_flow_error_set(error, EINVAL,
1999                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2000                                           item->spec,
2001                                           "VLAN cannot be empty");
2002         return 0;
2003 }
2004
2005 /**
2006  * Validate IPV4 item.
2007  *
2008  * @param[in] item
2009  *   Item specification.
2010  * @param[in] item_flags
2011  *   Bit-fields that holds the items detected until now.
2012  * @param[in] last_item
2013  *   Previous validated item in the pattern items.
2014  * @param[in] ether_type
2015  *   Type in the ethernet layer header (including dot1q).
2016  * @param[in] acc_mask
2017  *   Acceptable mask, if NULL default internal default mask
2018  *   will be used to check whether item fields are supported.
2019  * @param[in] range_accepted
2020  *   True if range of values is accepted for specific fields, false otherwise.
2021  * @param[out] error
2022  *   Pointer to error structure.
2023  *
2024  * @return
2025  *   0 on success, a negative errno value otherwise and rte_errno is set.
2026  */
2027 int
2028 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
2029                              uint64_t item_flags,
2030                              uint64_t last_item,
2031                              uint16_t ether_type,
2032                              const struct rte_flow_item_ipv4 *acc_mask,
2033                              bool range_accepted,
2034                              struct rte_flow_error *error)
2035 {
2036         const struct rte_flow_item_ipv4 *mask = item->mask;
2037         const struct rte_flow_item_ipv4 *spec = item->spec;
2038         const struct rte_flow_item_ipv4 nic_mask = {
2039                 .hdr = {
2040                         .src_addr = RTE_BE32(0xffffffff),
2041                         .dst_addr = RTE_BE32(0xffffffff),
2042                         .type_of_service = 0xff,
2043                         .next_proto_id = 0xff,
2044                 },
2045         };
2046         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2047         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2048                                       MLX5_FLOW_LAYER_OUTER_L3;
2049         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2050                                       MLX5_FLOW_LAYER_OUTER_L4;
2051         int ret;
2052         uint8_t next_proto = 0xFF;
2053         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2054                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2055                                   MLX5_FLOW_LAYER_INNER_VLAN);
2056
2057         if ((last_item & l2_vlan) && ether_type &&
2058             ether_type != RTE_ETHER_TYPE_IPV4)
2059                 return rte_flow_error_set(error, EINVAL,
2060                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2061                                           "IPv4 cannot follow L2/VLAN layer "
2062                                           "which ether type is not IPv4");
2063         if (item_flags & MLX5_FLOW_LAYER_IPIP) {
2064                 if (mask && spec)
2065                         next_proto = mask->hdr.next_proto_id &
2066                                      spec->hdr.next_proto_id;
2067                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2068                         return rte_flow_error_set(error, EINVAL,
2069                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2070                                                   item,
2071                                                   "multiple tunnel "
2072                                                   "not supported");
2073         }
2074         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
2075                 return rte_flow_error_set(error, EINVAL,
2076                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2077                                           "wrong tunnel type - IPv6 specified "
2078                                           "but IPv4 item provided");
2079         if (item_flags & l3m)
2080                 return rte_flow_error_set(error, ENOTSUP,
2081                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2082                                           "multiple L3 layers not supported");
2083         else if (item_flags & l4m)
2084                 return rte_flow_error_set(error, EINVAL,
2085                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2086                                           "L3 cannot follow an L4 layer.");
2087         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2088                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2089                 return rte_flow_error_set(error, EINVAL,
2090                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2091                                           "L3 cannot follow an NVGRE layer.");
2092         if (!mask)
2093                 mask = &rte_flow_item_ipv4_mask;
2094         else if (mask->hdr.next_proto_id != 0 &&
2095                  mask->hdr.next_proto_id != 0xff)
2096                 return rte_flow_error_set(error, EINVAL,
2097                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2098                                           "partial mask is not supported"
2099                                           " for protocol");
2100         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2101                                         acc_mask ? (const uint8_t *)acc_mask
2102                                                  : (const uint8_t *)&nic_mask,
2103                                         sizeof(struct rte_flow_item_ipv4),
2104                                         range_accepted, error);
2105         if (ret < 0)
2106                 return ret;
2107         return 0;
2108 }
2109
2110 /**
2111  * Validate IPV6 item.
2112  *
2113  * @param[in] item
2114  *   Item specification.
2115  * @param[in] item_flags
2116  *   Bit-fields that holds the items detected until now.
2117  * @param[in] last_item
2118  *   Previous validated item in the pattern items.
2119  * @param[in] ether_type
2120  *   Type in the ethernet layer header (including dot1q).
2121  * @param[in] acc_mask
2122  *   Acceptable mask, if NULL default internal default mask
2123  *   will be used to check whether item fields are supported.
2124  * @param[out] error
2125  *   Pointer to error structure.
2126  *
2127  * @return
2128  *   0 on success, a negative errno value otherwise and rte_errno is set.
2129  */
2130 int
2131 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
2132                              uint64_t item_flags,
2133                              uint64_t last_item,
2134                              uint16_t ether_type,
2135                              const struct rte_flow_item_ipv6 *acc_mask,
2136                              struct rte_flow_error *error)
2137 {
2138         const struct rte_flow_item_ipv6 *mask = item->mask;
2139         const struct rte_flow_item_ipv6 *spec = item->spec;
2140         const struct rte_flow_item_ipv6 nic_mask = {
2141                 .hdr = {
2142                         .src_addr =
2143                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2144                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2145                         .dst_addr =
2146                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2147                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2148                         .vtc_flow = RTE_BE32(0xffffffff),
2149                         .proto = 0xff,
2150                 },
2151         };
2152         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2153         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2154                                       MLX5_FLOW_LAYER_OUTER_L3;
2155         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2156                                       MLX5_FLOW_LAYER_OUTER_L4;
2157         int ret;
2158         uint8_t next_proto = 0xFF;
2159         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2160                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2161                                   MLX5_FLOW_LAYER_INNER_VLAN);
2162
2163         if ((last_item & l2_vlan) && ether_type &&
2164             ether_type != RTE_ETHER_TYPE_IPV6)
2165                 return rte_flow_error_set(error, EINVAL,
2166                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2167                                           "IPv6 cannot follow L2/VLAN layer "
2168                                           "which ether type is not IPv6");
2169         if (mask && mask->hdr.proto == UINT8_MAX && spec)
2170                 next_proto = spec->hdr.proto;
2171         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
2172                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2173                         return rte_flow_error_set(error, EINVAL,
2174                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2175                                                   item,
2176                                                   "multiple tunnel "
2177                                                   "not supported");
2178         }
2179         if (next_proto == IPPROTO_HOPOPTS  ||
2180             next_proto == IPPROTO_ROUTING  ||
2181             next_proto == IPPROTO_FRAGMENT ||
2182             next_proto == IPPROTO_ESP      ||
2183             next_proto == IPPROTO_AH       ||
2184             next_proto == IPPROTO_DSTOPTS)
2185                 return rte_flow_error_set(error, EINVAL,
2186                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2187                                           "IPv6 proto (next header) should "
2188                                           "not be set as extension header");
2189         if (item_flags & MLX5_FLOW_LAYER_IPIP)
2190                 return rte_flow_error_set(error, EINVAL,
2191                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2192                                           "wrong tunnel type - IPv4 specified "
2193                                           "but IPv6 item provided");
2194         if (item_flags & l3m)
2195                 return rte_flow_error_set(error, ENOTSUP,
2196                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2197                                           "multiple L3 layers not supported");
2198         else if (item_flags & l4m)
2199                 return rte_flow_error_set(error, EINVAL,
2200                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2201                                           "L3 cannot follow an L4 layer.");
2202         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2203                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2204                 return rte_flow_error_set(error, EINVAL,
2205                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2206                                           "L3 cannot follow an NVGRE layer.");
2207         if (!mask)
2208                 mask = &rte_flow_item_ipv6_mask;
2209         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2210                                         acc_mask ? (const uint8_t *)acc_mask
2211                                                  : (const uint8_t *)&nic_mask,
2212                                         sizeof(struct rte_flow_item_ipv6),
2213                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2214         if (ret < 0)
2215                 return ret;
2216         return 0;
2217 }
2218
2219 /**
2220  * Validate UDP item.
2221  *
2222  * @param[in] item
2223  *   Item specification.
2224  * @param[in] item_flags
2225  *   Bit-fields that holds the items detected until now.
2226  * @param[in] target_protocol
2227  *   The next protocol in the previous item.
2228  * @param[in] flow_mask
2229  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
2230  * @param[out] error
2231  *   Pointer to error structure.
2232  *
2233  * @return
2234  *   0 on success, a negative errno value otherwise and rte_errno is set.
2235  */
2236 int
2237 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
2238                             uint64_t item_flags,
2239                             uint8_t target_protocol,
2240                             struct rte_flow_error *error)
2241 {
2242         const struct rte_flow_item_udp *mask = item->mask;
2243         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2244         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2245                                       MLX5_FLOW_LAYER_OUTER_L3;
2246         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2247                                       MLX5_FLOW_LAYER_OUTER_L4;
2248         int ret;
2249
2250         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
2251                 return rte_flow_error_set(error, EINVAL,
2252                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2253                                           "protocol filtering not compatible"
2254                                           " with UDP layer");
2255         if (!(item_flags & l3m))
2256                 return rte_flow_error_set(error, EINVAL,
2257                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2258                                           "L3 is mandatory to filter on L4");
2259         if (item_flags & l4m)
2260                 return rte_flow_error_set(error, EINVAL,
2261                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2262                                           "multiple L4 layers not supported");
2263         if (!mask)
2264                 mask = &rte_flow_item_udp_mask;
2265         ret = mlx5_flow_item_acceptable
2266                 (item, (const uint8_t *)mask,
2267                  (const uint8_t *)&rte_flow_item_udp_mask,
2268                  sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2269                  error);
2270         if (ret < 0)
2271                 return ret;
2272         return 0;
2273 }
2274
2275 /**
2276  * Validate TCP item.
2277  *
2278  * @param[in] item
2279  *   Item specification.
2280  * @param[in] item_flags
2281  *   Bit-fields that holds the items detected until now.
2282  * @param[in] target_protocol
2283  *   The next protocol in the previous item.
2284  * @param[out] error
2285  *   Pointer to error structure.
2286  *
2287  * @return
2288  *   0 on success, a negative errno value otherwise and rte_errno is set.
2289  */
2290 int
2291 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
2292                             uint64_t item_flags,
2293                             uint8_t target_protocol,
2294                             const struct rte_flow_item_tcp *flow_mask,
2295                             struct rte_flow_error *error)
2296 {
2297         const struct rte_flow_item_tcp *mask = item->mask;
2298         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2299         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2300                                       MLX5_FLOW_LAYER_OUTER_L3;
2301         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2302                                       MLX5_FLOW_LAYER_OUTER_L4;
2303         int ret;
2304
2305         MLX5_ASSERT(flow_mask);
2306         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
2307                 return rte_flow_error_set(error, EINVAL,
2308                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2309                                           "protocol filtering not compatible"
2310                                           " with TCP layer");
2311         if (!(item_flags & l3m))
2312                 return rte_flow_error_set(error, EINVAL,
2313                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2314                                           "L3 is mandatory to filter on L4");
2315         if (item_flags & l4m)
2316                 return rte_flow_error_set(error, EINVAL,
2317                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2318                                           "multiple L4 layers not supported");
2319         if (!mask)
2320                 mask = &rte_flow_item_tcp_mask;
2321         ret = mlx5_flow_item_acceptable
2322                 (item, (const uint8_t *)mask,
2323                  (const uint8_t *)flow_mask,
2324                  sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2325                  error);
2326         if (ret < 0)
2327                 return ret;
2328         return 0;
2329 }
2330
2331 /**
2332  * Validate VXLAN item.
2333  *
2334  * @param[in] item
2335  *   Item specification.
2336  * @param[in] item_flags
2337  *   Bit-fields that holds the items detected until now.
2338  * @param[in] target_protocol
2339  *   The next protocol in the previous item.
2340  * @param[out] error
2341  *   Pointer to error structure.
2342  *
2343  * @return
2344  *   0 on success, a negative errno value otherwise and rte_errno is set.
2345  */
2346 int
2347 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
2348                               uint64_t item_flags,
2349                               struct rte_flow_error *error)
2350 {
2351         const struct rte_flow_item_vxlan *spec = item->spec;
2352         const struct rte_flow_item_vxlan *mask = item->mask;
2353         int ret;
2354         union vni {
2355                 uint32_t vlan_id;
2356                 uint8_t vni[4];
2357         } id = { .vlan_id = 0, };
2358
2359
2360         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2361                 return rte_flow_error_set(error, ENOTSUP,
2362                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2363                                           "multiple tunnel layers not"
2364                                           " supported");
2365         /*
2366          * Verify only UDPv4 is present as defined in
2367          * https://tools.ietf.org/html/rfc7348
2368          */
2369         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2370                 return rte_flow_error_set(error, EINVAL,
2371                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2372                                           "no outer UDP layer found");
2373         if (!mask)
2374                 mask = &rte_flow_item_vxlan_mask;
2375         ret = mlx5_flow_item_acceptable
2376                 (item, (const uint8_t *)mask,
2377                  (const uint8_t *)&rte_flow_item_vxlan_mask,
2378                  sizeof(struct rte_flow_item_vxlan),
2379                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2380         if (ret < 0)
2381                 return ret;
2382         if (spec) {
2383                 memcpy(&id.vni[1], spec->vni, 3);
2384                 memcpy(&id.vni[1], mask->vni, 3);
2385         }
2386         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2387                 return rte_flow_error_set(error, ENOTSUP,
2388                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2389                                           "VXLAN tunnel must be fully defined");
2390         return 0;
2391 }
2392
2393 /**
2394  * Validate VXLAN_GPE item.
2395  *
2396  * @param[in] item
2397  *   Item specification.
2398  * @param[in] item_flags
2399  *   Bit-fields that holds the items detected until now.
2400  * @param[in] priv
2401  *   Pointer to the private data structure.
2402  * @param[in] target_protocol
2403  *   The next protocol in the previous item.
2404  * @param[out] error
2405  *   Pointer to error structure.
2406  *
2407  * @return
2408  *   0 on success, a negative errno value otherwise and rte_errno is set.
2409  */
2410 int
2411 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
2412                                   uint64_t item_flags,
2413                                   struct rte_eth_dev *dev,
2414                                   struct rte_flow_error *error)
2415 {
2416         struct mlx5_priv *priv = dev->data->dev_private;
2417         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
2418         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
2419         int ret;
2420         union vni {
2421                 uint32_t vlan_id;
2422                 uint8_t vni[4];
2423         } id = { .vlan_id = 0, };
2424
2425         if (!priv->config.l3_vxlan_en)
2426                 return rte_flow_error_set(error, ENOTSUP,
2427                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2428                                           "L3 VXLAN is not enabled by device"
2429                                           " parameter and/or not configured in"
2430                                           " firmware");
2431         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2432                 return rte_flow_error_set(error, ENOTSUP,
2433                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2434                                           "multiple tunnel layers not"
2435                                           " supported");
2436         /*
2437          * Verify only UDPv4 is present as defined in
2438          * https://tools.ietf.org/html/rfc7348
2439          */
2440         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2441                 return rte_flow_error_set(error, EINVAL,
2442                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2443                                           "no outer UDP layer found");
2444         if (!mask)
2445                 mask = &rte_flow_item_vxlan_gpe_mask;
2446         ret = mlx5_flow_item_acceptable
2447                 (item, (const uint8_t *)mask,
2448                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
2449                  sizeof(struct rte_flow_item_vxlan_gpe),
2450                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2451         if (ret < 0)
2452                 return ret;
2453         if (spec) {
2454                 if (spec->protocol)
2455                         return rte_flow_error_set(error, ENOTSUP,
2456                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2457                                                   item,
2458                                                   "VxLAN-GPE protocol"
2459                                                   " not supported");
2460                 memcpy(&id.vni[1], spec->vni, 3);
2461                 memcpy(&id.vni[1], mask->vni, 3);
2462         }
2463         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2464                 return rte_flow_error_set(error, ENOTSUP,
2465                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2466                                           "VXLAN-GPE tunnel must be fully"
2467                                           " defined");
2468         return 0;
2469 }
2470 /**
2471  * Validate GRE Key item.
2472  *
2473  * @param[in] item
2474  *   Item specification.
2475  * @param[in] item_flags
2476  *   Bit flags to mark detected items.
2477  * @param[in] gre_item
2478  *   Pointer to gre_item
2479  * @param[out] error
2480  *   Pointer to error structure.
2481  *
2482  * @return
2483  *   0 on success, a negative errno value otherwise and rte_errno is set.
2484  */
2485 int
2486 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
2487                                 uint64_t item_flags,
2488                                 const struct rte_flow_item *gre_item,
2489                                 struct rte_flow_error *error)
2490 {
2491         const rte_be32_t *mask = item->mask;
2492         int ret = 0;
2493         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
2494         const struct rte_flow_item_gre *gre_spec;
2495         const struct rte_flow_item_gre *gre_mask;
2496
2497         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
2498                 return rte_flow_error_set(error, ENOTSUP,
2499                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2500                                           "Multiple GRE key not support");
2501         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2502                 return rte_flow_error_set(error, ENOTSUP,
2503                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2504                                           "No preceding GRE header");
2505         if (item_flags & MLX5_FLOW_LAYER_INNER)
2506                 return rte_flow_error_set(error, ENOTSUP,
2507                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2508                                           "GRE key following a wrong item");
2509         gre_mask = gre_item->mask;
2510         if (!gre_mask)
2511                 gre_mask = &rte_flow_item_gre_mask;
2512         gre_spec = gre_item->spec;
2513         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2514                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2515                 return rte_flow_error_set(error, EINVAL,
2516                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2517                                           "Key bit must be on");
2518
2519         if (!mask)
2520                 mask = &gre_key_default_mask;
2521         ret = mlx5_flow_item_acceptable
2522                 (item, (const uint8_t *)mask,
2523                  (const uint8_t *)&gre_key_default_mask,
2524                  sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2525         return ret;
2526 }
2527
2528 /**
2529  * Validate GRE item.
2530  *
2531  * @param[in] item
2532  *   Item specification.
2533  * @param[in] item_flags
2534  *   Bit flags to mark detected items.
2535  * @param[in] target_protocol
2536  *   The next protocol in the previous item.
2537  * @param[out] error
2538  *   Pointer to error structure.
2539  *
2540  * @return
2541  *   0 on success, a negative errno value otherwise and rte_errno is set.
2542  */
2543 int
2544 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2545                             uint64_t item_flags,
2546                             uint8_t target_protocol,
2547                             struct rte_flow_error *error)
2548 {
2549         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2550         const struct rte_flow_item_gre *mask = item->mask;
2551         int ret;
2552         const struct rte_flow_item_gre nic_mask = {
2553                 .c_rsvd0_ver = RTE_BE16(0xB000),
2554                 .protocol = RTE_BE16(UINT16_MAX),
2555         };
2556
2557         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2558                 return rte_flow_error_set(error, EINVAL,
2559                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2560                                           "protocol filtering not compatible"
2561                                           " with this GRE layer");
2562         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2563                 return rte_flow_error_set(error, ENOTSUP,
2564                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2565                                           "multiple tunnel layers not"
2566                                           " supported");
2567         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2568                 return rte_flow_error_set(error, ENOTSUP,
2569                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2570                                           "L3 Layer is missing");
2571         if (!mask)
2572                 mask = &rte_flow_item_gre_mask;
2573         ret = mlx5_flow_item_acceptable
2574                 (item, (const uint8_t *)mask,
2575                  (const uint8_t *)&nic_mask,
2576                  sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2577                  error);
2578         if (ret < 0)
2579                 return ret;
2580 #ifndef HAVE_MLX5DV_DR
2581 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2582         if (spec && (spec->protocol & mask->protocol))
2583                 return rte_flow_error_set(error, ENOTSUP,
2584                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2585                                           "without MPLS support the"
2586                                           " specification cannot be used for"
2587                                           " filtering");
2588 #endif
2589 #endif
2590         return 0;
2591 }
2592
2593 /**
2594  * Validate Geneve item.
2595  *
2596  * @param[in] item
2597  *   Item specification.
2598  * @param[in] itemFlags
2599  *   Bit-fields that holds the items detected until now.
2600  * @param[in] enPriv
2601  *   Pointer to the private data structure.
2602  * @param[out] error
2603  *   Pointer to error structure.
2604  *
2605  * @return
2606  *   0 on success, a negative errno value otherwise and rte_errno is set.
2607  */
2608
2609 int
2610 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2611                                uint64_t item_flags,
2612                                struct rte_eth_dev *dev,
2613                                struct rte_flow_error *error)
2614 {
2615         struct mlx5_priv *priv = dev->data->dev_private;
2616         const struct rte_flow_item_geneve *spec = item->spec;
2617         const struct rte_flow_item_geneve *mask = item->mask;
2618         int ret;
2619         uint16_t gbhdr;
2620         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2621                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2622         const struct rte_flow_item_geneve nic_mask = {
2623                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2624                 .vni = "\xff\xff\xff",
2625                 .protocol = RTE_BE16(UINT16_MAX),
2626         };
2627
2628         if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2629                 return rte_flow_error_set(error, ENOTSUP,
2630                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2631                                           "L3 Geneve is not enabled by device"
2632                                           " parameter and/or not configured in"
2633                                           " firmware");
2634         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2635                 return rte_flow_error_set(error, ENOTSUP,
2636                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2637                                           "multiple tunnel layers not"
2638                                           " supported");
2639         /*
2640          * Verify only UDPv4 is present as defined in
2641          * https://tools.ietf.org/html/rfc7348
2642          */
2643         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2644                 return rte_flow_error_set(error, EINVAL,
2645                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2646                                           "no outer UDP layer found");
2647         if (!mask)
2648                 mask = &rte_flow_item_geneve_mask;
2649         ret = mlx5_flow_item_acceptable
2650                                   (item, (const uint8_t *)mask,
2651                                    (const uint8_t *)&nic_mask,
2652                                    sizeof(struct rte_flow_item_geneve),
2653                                    MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2654         if (ret)
2655                 return ret;
2656         if (spec) {
2657                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2658                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2659                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2660                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2661                         return rte_flow_error_set(error, ENOTSUP,
2662                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2663                                                   item,
2664                                                   "Geneve protocol unsupported"
2665                                                   " fields are being used");
2666                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2667                         return rte_flow_error_set
2668                                         (error, ENOTSUP,
2669                                          RTE_FLOW_ERROR_TYPE_ITEM,
2670                                          item,
2671                                          "Unsupported Geneve options length");
2672         }
2673         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2674                 return rte_flow_error_set
2675                                     (error, ENOTSUP,
2676                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2677                                      "Geneve tunnel must be fully defined");
2678         return 0;
2679 }
2680
2681 /**
2682  * Validate Geneve TLV option item.
2683  *
2684  * @param[in] item
2685  *   Item specification.
2686  * @param[in] last_item
2687  *   Previous validated item in the pattern items.
2688  * @param[in] geneve_item
2689  *   Previous GENEVE item specification.
2690  * @param[in] dev
2691  *   Pointer to the rte_eth_dev structure.
2692  * @param[out] error
2693  *   Pointer to error structure.
2694  *
2695  * @return
2696  *   0 on success, a negative errno value otherwise and rte_errno is set.
2697  */
2698 int
2699 mlx5_flow_validate_item_geneve_opt(const struct rte_flow_item *item,
2700                                    uint64_t last_item,
2701                                    const struct rte_flow_item *geneve_item,
2702                                    struct rte_eth_dev *dev,
2703                                    struct rte_flow_error *error)
2704 {
2705         struct mlx5_priv *priv = dev->data->dev_private;
2706         struct mlx5_dev_ctx_shared *sh = priv->sh;
2707         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource;
2708         struct mlx5_hca_attr *hca_attr = &priv->config.hca_attr;
2709         uint8_t data_max_supported =
2710                         hca_attr->max_geneve_tlv_option_data_len * 4;
2711         struct mlx5_dev_config *config = &priv->config;
2712         const struct rte_flow_item_geneve *geneve_spec;
2713         const struct rte_flow_item_geneve *geneve_mask;
2714         const struct rte_flow_item_geneve_opt *spec = item->spec;
2715         const struct rte_flow_item_geneve_opt *mask = item->mask;
2716         unsigned int i;
2717         unsigned int data_len;
2718         uint8_t tlv_option_len;
2719         uint16_t optlen_m, optlen_v;
2720         const struct rte_flow_item_geneve_opt full_mask = {
2721                 .option_class = RTE_BE16(0xffff),
2722                 .option_type = 0xff,
2723                 .option_len = 0x1f,
2724         };
2725
2726         if (!mask)
2727                 mask = &rte_flow_item_geneve_opt_mask;
2728         if (!spec)
2729                 return rte_flow_error_set
2730                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2731                         "Geneve TLV opt class/type/length must be specified");
2732         if ((uint32_t)spec->option_len > MLX5_GENEVE_OPTLEN_MASK)
2733                 return rte_flow_error_set
2734                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2735                         "Geneve TLV opt length exceeeds the limit (31)");
2736         /* Check if class type and length masks are full. */
2737         if (full_mask.option_class != mask->option_class ||
2738             full_mask.option_type != mask->option_type ||
2739             full_mask.option_len != (mask->option_len & full_mask.option_len))
2740                 return rte_flow_error_set
2741                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2742                         "Geneve TLV opt class/type/length masks must be full");
2743         /* Check if length is supported */
2744         if ((uint32_t)spec->option_len >
2745                         config->hca_attr.max_geneve_tlv_option_data_len)
2746                 return rte_flow_error_set
2747                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2748                         "Geneve TLV opt length not supported");
2749         if (config->hca_attr.max_geneve_tlv_options > 1)
2750                 DRV_LOG(DEBUG,
2751                         "max_geneve_tlv_options supports more than 1 option");
2752         /* Check GENEVE item preceding. */
2753         if (!geneve_item || !(last_item & MLX5_FLOW_LAYER_GENEVE))
2754                 return rte_flow_error_set
2755                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2756                         "Geneve opt item must be preceded with Geneve item");
2757         geneve_spec = geneve_item->spec;
2758         geneve_mask = geneve_item->mask ? geneve_item->mask :
2759                                           &rte_flow_item_geneve_mask;
2760         /* Check if GENEVE TLV option size doesn't exceed option length */
2761         if (geneve_spec && (geneve_mask->ver_opt_len_o_c_rsvd0 ||
2762                             geneve_spec->ver_opt_len_o_c_rsvd0)) {
2763                 tlv_option_len = spec->option_len & mask->option_len;
2764                 optlen_v = rte_be_to_cpu_16(geneve_spec->ver_opt_len_o_c_rsvd0);
2765                 optlen_v = MLX5_GENEVE_OPTLEN_VAL(optlen_v);
2766                 optlen_m = rte_be_to_cpu_16(geneve_mask->ver_opt_len_o_c_rsvd0);
2767                 optlen_m = MLX5_GENEVE_OPTLEN_VAL(optlen_m);
2768                 if ((optlen_v & optlen_m) <= tlv_option_len)
2769                         return rte_flow_error_set
2770                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2771                                  "GENEVE TLV option length exceeds optlen");
2772         }
2773         /* Check if length is 0 or data is 0. */
2774         if (spec->data == NULL || spec->option_len == 0)
2775                 return rte_flow_error_set
2776                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2777                         "Geneve TLV opt with zero data/length not supported");
2778         /* Check not all data & mask are 0. */
2779         data_len = spec->option_len * 4;
2780         if (mask->data == NULL) {
2781                 for (i = 0; i < data_len; i++)
2782                         if (spec->data[i])
2783                                 break;
2784                 if (i == data_len)
2785                         return rte_flow_error_set(error, ENOTSUP,
2786                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2787                                 "Can't match on Geneve option data 0");
2788         } else {
2789                 for (i = 0; i < data_len; i++)
2790                         if (spec->data[i] & mask->data[i])
2791                                 break;
2792                 if (i == data_len)
2793                         return rte_flow_error_set(error, ENOTSUP,
2794                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2795                                 "Can't match on Geneve option data and mask 0");
2796                 /* Check data mask supported. */
2797                 for (i = data_max_supported; i < data_len ; i++)
2798                         if (mask->data[i])
2799                                 return rte_flow_error_set(error, ENOTSUP,
2800                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2801                                         "Data mask is of unsupported size");
2802         }
2803         /* Check GENEVE option is supported in NIC. */
2804         if (!config->hca_attr.geneve_tlv_opt)
2805                 return rte_flow_error_set
2806                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2807                         "Geneve TLV opt not supported");
2808         /* Check if we already have geneve option with different type/class. */
2809         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
2810         geneve_opt_resource = sh->geneve_tlv_option_resource;
2811         if (geneve_opt_resource != NULL)
2812                 if (geneve_opt_resource->option_class != spec->option_class ||
2813                     geneve_opt_resource->option_type != spec->option_type ||
2814                     geneve_opt_resource->length != spec->option_len) {
2815                         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
2816                         return rte_flow_error_set(error, ENOTSUP,
2817                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2818                                 "Only one Geneve TLV option supported");
2819                 }
2820         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
2821         return 0;
2822 }
2823
2824 /**
2825  * Validate MPLS item.
2826  *
2827  * @param[in] dev
2828  *   Pointer to the rte_eth_dev structure.
2829  * @param[in] item
2830  *   Item specification.
2831  * @param[in] item_flags
2832  *   Bit-fields that holds the items detected until now.
2833  * @param[in] prev_layer
2834  *   The protocol layer indicated in previous item.
2835  * @param[out] error
2836  *   Pointer to error structure.
2837  *
2838  * @return
2839  *   0 on success, a negative errno value otherwise and rte_errno is set.
2840  */
2841 int
2842 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
2843                              const struct rte_flow_item *item __rte_unused,
2844                              uint64_t item_flags __rte_unused,
2845                              uint64_t prev_layer __rte_unused,
2846                              struct rte_flow_error *error)
2847 {
2848 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2849         const struct rte_flow_item_mpls *mask = item->mask;
2850         struct mlx5_priv *priv = dev->data->dev_private;
2851         int ret;
2852
2853         if (!priv->config.mpls_en)
2854                 return rte_flow_error_set(error, ENOTSUP,
2855                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2856                                           "MPLS not supported or"
2857                                           " disabled in firmware"
2858                                           " configuration.");
2859         /* MPLS over IP, UDP, GRE is allowed */
2860         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
2861                             MLX5_FLOW_LAYER_OUTER_L4_UDP |
2862                             MLX5_FLOW_LAYER_GRE |
2863                             MLX5_FLOW_LAYER_GRE_KEY)))
2864                 return rte_flow_error_set(error, EINVAL,
2865                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2866                                           "protocol filtering not compatible"
2867                                           " with MPLS layer");
2868         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
2869         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
2870             !(item_flags & MLX5_FLOW_LAYER_GRE))
2871                 return rte_flow_error_set(error, ENOTSUP,
2872                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2873                                           "multiple tunnel layers not"
2874                                           " supported");
2875         if (!mask)
2876                 mask = &rte_flow_item_mpls_mask;
2877         ret = mlx5_flow_item_acceptable
2878                 (item, (const uint8_t *)mask,
2879                  (const uint8_t *)&rte_flow_item_mpls_mask,
2880                  sizeof(struct rte_flow_item_mpls),
2881                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2882         if (ret < 0)
2883                 return ret;
2884         return 0;
2885 #else
2886         return rte_flow_error_set(error, ENOTSUP,
2887                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
2888                                   "MPLS is not supported by Verbs, please"
2889                                   " update.");
2890 #endif
2891 }
2892
2893 /**
2894  * Validate NVGRE item.
2895  *
2896  * @param[in] item
2897  *   Item specification.
2898  * @param[in] item_flags
2899  *   Bit flags to mark detected items.
2900  * @param[in] target_protocol
2901  *   The next protocol in the previous item.
2902  * @param[out] error
2903  *   Pointer to error structure.
2904  *
2905  * @return
2906  *   0 on success, a negative errno value otherwise and rte_errno is set.
2907  */
2908 int
2909 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
2910                               uint64_t item_flags,
2911                               uint8_t target_protocol,
2912                               struct rte_flow_error *error)
2913 {
2914         const struct rte_flow_item_nvgre *mask = item->mask;
2915         int ret;
2916
2917         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2918                 return rte_flow_error_set(error, EINVAL,
2919                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2920                                           "protocol filtering not compatible"
2921                                           " with this GRE layer");
2922         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2923                 return rte_flow_error_set(error, ENOTSUP,
2924                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2925                                           "multiple tunnel layers not"
2926                                           " supported");
2927         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2928                 return rte_flow_error_set(error, ENOTSUP,
2929                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2930                                           "L3 Layer is missing");
2931         if (!mask)
2932                 mask = &rte_flow_item_nvgre_mask;
2933         ret = mlx5_flow_item_acceptable
2934                 (item, (const uint8_t *)mask,
2935                  (const uint8_t *)&rte_flow_item_nvgre_mask,
2936                  sizeof(struct rte_flow_item_nvgre),
2937                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2938         if (ret < 0)
2939                 return ret;
2940         return 0;
2941 }
2942
2943 /**
2944  * Validate eCPRI item.
2945  *
2946  * @param[in] item
2947  *   Item specification.
2948  * @param[in] item_flags
2949  *   Bit-fields that holds the items detected until now.
2950  * @param[in] last_item
2951  *   Previous validated item in the pattern items.
2952  * @param[in] ether_type
2953  *   Type in the ethernet layer header (including dot1q).
2954  * @param[in] acc_mask
2955  *   Acceptable mask, if NULL default internal default mask
2956  *   will be used to check whether item fields are supported.
2957  * @param[out] error
2958  *   Pointer to error structure.
2959  *
2960  * @return
2961  *   0 on success, a negative errno value otherwise and rte_errno is set.
2962  */
2963 int
2964 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item,
2965                               uint64_t item_flags,
2966                               uint64_t last_item,
2967                               uint16_t ether_type,
2968                               const struct rte_flow_item_ecpri *acc_mask,
2969                               struct rte_flow_error *error)
2970 {
2971         const struct rte_flow_item_ecpri *mask = item->mask;
2972         const struct rte_flow_item_ecpri nic_mask = {
2973                 .hdr = {
2974                         .common = {
2975                                 .u32 =
2976                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
2977                                         .type = 0xFF,
2978                                         }).u32),
2979                         },
2980                         .dummy[0] = 0xFFFFFFFF,
2981                 },
2982         };
2983         const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 |
2984                                         MLX5_FLOW_LAYER_OUTER_VLAN);
2985         struct rte_flow_item_ecpri mask_lo;
2986
2987         if (!(last_item & outer_l2_vlan) &&
2988             last_item != MLX5_FLOW_LAYER_OUTER_L4_UDP)
2989                 return rte_flow_error_set(error, EINVAL,
2990                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2991                                           "eCPRI can only follow L2/VLAN layer or UDP layer");
2992         if ((last_item & outer_l2_vlan) && ether_type &&
2993             ether_type != RTE_ETHER_TYPE_ECPRI)
2994                 return rte_flow_error_set(error, EINVAL,
2995                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2996                                           "eCPRI cannot follow L2/VLAN layer which ether type is not 0xAEFE");
2997         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2998                 return rte_flow_error_set(error, EINVAL,
2999                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3000                                           "eCPRI with tunnel is not supported right now");
3001         if (item_flags & MLX5_FLOW_LAYER_OUTER_L3)
3002                 return rte_flow_error_set(error, ENOTSUP,
3003                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3004                                           "multiple L3 layers not supported");
3005         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP)
3006                 return rte_flow_error_set(error, EINVAL,
3007                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3008                                           "eCPRI cannot coexist with a TCP layer");
3009         /* In specification, eCPRI could be over UDP layer. */
3010         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)
3011                 return rte_flow_error_set(error, EINVAL,
3012                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3013                                           "eCPRI over UDP layer is not yet supported right now");
3014         /* Mask for type field in common header could be zero. */
3015         if (!mask)
3016                 mask = &rte_flow_item_ecpri_mask;
3017         mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32);
3018         /* Input mask is in big-endian format. */
3019         if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff)
3020                 return rte_flow_error_set(error, EINVAL,
3021                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3022                                           "partial mask is not supported for protocol");
3023         else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0)
3024                 return rte_flow_error_set(error, EINVAL,
3025                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3026                                           "message header mask must be after a type mask");
3027         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
3028                                          acc_mask ? (const uint8_t *)acc_mask
3029                                                   : (const uint8_t *)&nic_mask,
3030                                          sizeof(struct rte_flow_item_ecpri),
3031                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3032 }
3033
3034 /**
3035  * Release resource related QUEUE/RSS action split.
3036  *
3037  * @param dev
3038  *   Pointer to Ethernet device.
3039  * @param flow
3040  *   Flow to release id's from.
3041  */
3042 static void
3043 flow_mreg_split_qrss_release(struct rte_eth_dev *dev,
3044                              struct rte_flow *flow)
3045 {
3046         struct mlx5_priv *priv = dev->data->dev_private;
3047         uint32_t handle_idx;
3048         struct mlx5_flow_handle *dev_handle;
3049
3050         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
3051                        handle_idx, dev_handle, next)
3052                 if (dev_handle->split_flow_id)
3053                         mlx5_ipool_free(priv->sh->ipool
3054                                         [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
3055                                         dev_handle->split_flow_id);
3056 }
3057
3058 static int
3059 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
3060                    const struct rte_flow_attr *attr __rte_unused,
3061                    const struct rte_flow_item items[] __rte_unused,
3062                    const struct rte_flow_action actions[] __rte_unused,
3063                    bool external __rte_unused,
3064                    int hairpin __rte_unused,
3065                    struct rte_flow_error *error)
3066 {
3067         return rte_flow_error_set(error, ENOTSUP,
3068                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3069 }
3070
3071 static struct mlx5_flow *
3072 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
3073                   const struct rte_flow_attr *attr __rte_unused,
3074                   const struct rte_flow_item items[] __rte_unused,
3075                   const struct rte_flow_action actions[] __rte_unused,
3076                   struct rte_flow_error *error)
3077 {
3078         rte_flow_error_set(error, ENOTSUP,
3079                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3080         return NULL;
3081 }
3082
3083 static int
3084 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
3085                     struct mlx5_flow *dev_flow __rte_unused,
3086                     const struct rte_flow_attr *attr __rte_unused,
3087                     const struct rte_flow_item items[] __rte_unused,
3088                     const struct rte_flow_action actions[] __rte_unused,
3089                     struct rte_flow_error *error)
3090 {
3091         return rte_flow_error_set(error, ENOTSUP,
3092                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3093 }
3094
3095 static int
3096 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
3097                 struct rte_flow *flow __rte_unused,
3098                 struct rte_flow_error *error)
3099 {
3100         return rte_flow_error_set(error, ENOTSUP,
3101                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3102 }
3103
3104 static void
3105 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
3106                  struct rte_flow *flow __rte_unused)
3107 {
3108 }
3109
3110 static void
3111 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
3112                   struct rte_flow *flow __rte_unused)
3113 {
3114 }
3115
3116 static int
3117 flow_null_query(struct rte_eth_dev *dev __rte_unused,
3118                 struct rte_flow *flow __rte_unused,
3119                 const struct rte_flow_action *actions __rte_unused,
3120                 void *data __rte_unused,
3121                 struct rte_flow_error *error)
3122 {
3123         return rte_flow_error_set(error, ENOTSUP,
3124                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3125 }
3126
3127 static int
3128 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused,
3129                       uint32_t domains __rte_unused,
3130                       uint32_t flags __rte_unused)
3131 {
3132         return 0;
3133 }
3134
3135 /* Void driver to protect from null pointer reference. */
3136 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
3137         .validate = flow_null_validate,
3138         .prepare = flow_null_prepare,
3139         .translate = flow_null_translate,
3140         .apply = flow_null_apply,
3141         .remove = flow_null_remove,
3142         .destroy = flow_null_destroy,
3143         .query = flow_null_query,
3144         .sync_domain = flow_null_sync_domain,
3145 };
3146
3147 /**
3148  * Select flow driver type according to flow attributes and device
3149  * configuration.
3150  *
3151  * @param[in] dev
3152  *   Pointer to the dev structure.
3153  * @param[in] attr
3154  *   Pointer to the flow attributes.
3155  *
3156  * @return
3157  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
3158  */
3159 static enum mlx5_flow_drv_type
3160 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
3161 {
3162         struct mlx5_priv *priv = dev->data->dev_private;
3163         /* The OS can determine first a specific flow type (DV, VERBS) */
3164         enum mlx5_flow_drv_type type = mlx5_flow_os_get_type();
3165
3166         if (type != MLX5_FLOW_TYPE_MAX)
3167                 return type;
3168         /* If no OS specific type - continue with DV/VERBS selection */
3169         if (attr->transfer && priv->config.dv_esw_en)
3170                 type = MLX5_FLOW_TYPE_DV;
3171         if (!attr->transfer)
3172                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
3173                                                  MLX5_FLOW_TYPE_VERBS;
3174         return type;
3175 }
3176
3177 #define flow_get_drv_ops(type) flow_drv_ops[type]
3178
3179 /**
3180  * Flow driver validation API. This abstracts calling driver specific functions.
3181  * The type of flow driver is determined according to flow attributes.
3182  *
3183  * @param[in] dev
3184  *   Pointer to the dev structure.
3185  * @param[in] attr
3186  *   Pointer to the flow attributes.
3187  * @param[in] items
3188  *   Pointer to the list of items.
3189  * @param[in] actions
3190  *   Pointer to the list of actions.
3191  * @param[in] external
3192  *   This flow rule is created by request external to PMD.
3193  * @param[in] hairpin
3194  *   Number of hairpin TX actions, 0 means classic flow.
3195  * @param[out] error
3196  *   Pointer to the error structure.
3197  *
3198  * @return
3199  *   0 on success, a negative errno value otherwise and rte_errno is set.
3200  */
3201 static inline int
3202 flow_drv_validate(struct rte_eth_dev *dev,
3203                   const struct rte_flow_attr *attr,
3204                   const struct rte_flow_item items[],
3205                   const struct rte_flow_action actions[],
3206                   bool external, int hairpin, struct rte_flow_error *error)
3207 {
3208         const struct mlx5_flow_driver_ops *fops;
3209         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
3210
3211         fops = flow_get_drv_ops(type);
3212         return fops->validate(dev, attr, items, actions, external,
3213                               hairpin, error);
3214 }
3215
3216 /**
3217  * Flow driver preparation API. This abstracts calling driver specific
3218  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3219  * calculates the size of memory required for device flow, allocates the memory,
3220  * initializes the device flow and returns the pointer.
3221  *
3222  * @note
3223  *   This function initializes device flow structure such as dv or verbs in
3224  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
3225  *   rest. For example, adding returning device flow to flow->dev_flow list and
3226  *   setting backward reference to the flow should be done out of this function.
3227  *   layers field is not filled either.
3228  *
3229  * @param[in] dev
3230  *   Pointer to the dev structure.
3231  * @param[in] attr
3232  *   Pointer to the flow attributes.
3233  * @param[in] items
3234  *   Pointer to the list of items.
3235  * @param[in] actions
3236  *   Pointer to the list of actions.
3237  * @param[in] flow_idx
3238  *   This memory pool index to the flow.
3239  * @param[out] error
3240  *   Pointer to the error structure.
3241  *
3242  * @return
3243  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
3244  */
3245 static inline struct mlx5_flow *
3246 flow_drv_prepare(struct rte_eth_dev *dev,
3247                  const struct rte_flow *flow,
3248                  const struct rte_flow_attr *attr,
3249                  const struct rte_flow_item items[],
3250                  const struct rte_flow_action actions[],
3251                  uint32_t flow_idx,
3252                  struct rte_flow_error *error)
3253 {
3254         const struct mlx5_flow_driver_ops *fops;
3255         enum mlx5_flow_drv_type type = flow->drv_type;
3256         struct mlx5_flow *mlx5_flow = NULL;
3257
3258         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3259         fops = flow_get_drv_ops(type);
3260         mlx5_flow = fops->prepare(dev, attr, items, actions, error);
3261         if (mlx5_flow)
3262                 mlx5_flow->flow_idx = flow_idx;
3263         return mlx5_flow;
3264 }
3265
3266 /**
3267  * Flow driver translation API. This abstracts calling driver specific
3268  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3269  * translates a generic flow into a driver flow. flow_drv_prepare() must
3270  * precede.
3271  *
3272  * @note
3273  *   dev_flow->layers could be filled as a result of parsing during translation
3274  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
3275  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
3276  *   flow->actions could be overwritten even though all the expanded dev_flows
3277  *   have the same actions.
3278  *
3279  * @param[in] dev
3280  *   Pointer to the rte dev structure.
3281  * @param[in, out] dev_flow
3282  *   Pointer to the mlx5 flow.
3283  * @param[in] attr
3284  *   Pointer to the flow attributes.
3285  * @param[in] items
3286  *   Pointer to the list of items.
3287  * @param[in] actions
3288  *   Pointer to the list of actions.
3289  * @param[out] error
3290  *   Pointer to the error structure.
3291  *
3292  * @return
3293  *   0 on success, a negative errno value otherwise and rte_errno is set.
3294  */
3295 static inline int
3296 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
3297                    const struct rte_flow_attr *attr,
3298                    const struct rte_flow_item items[],
3299                    const struct rte_flow_action actions[],
3300                    struct rte_flow_error *error)
3301 {
3302         const struct mlx5_flow_driver_ops *fops;
3303         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
3304
3305         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3306         fops = flow_get_drv_ops(type);
3307         return fops->translate(dev, dev_flow, attr, items, actions, error);
3308 }
3309
3310 /**
3311  * Flow driver apply API. This abstracts calling driver specific functions.
3312  * Parent flow (rte_flow) should have driver type (drv_type). It applies
3313  * translated driver flows on to device. flow_drv_translate() must precede.
3314  *
3315  * @param[in] dev
3316  *   Pointer to Ethernet device structure.
3317  * @param[in, out] flow
3318  *   Pointer to flow structure.
3319  * @param[out] error
3320  *   Pointer to error structure.
3321  *
3322  * @return
3323  *   0 on success, a negative errno value otherwise and rte_errno is set.
3324  */
3325 static inline int
3326 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
3327                struct rte_flow_error *error)
3328 {
3329         const struct mlx5_flow_driver_ops *fops;
3330         enum mlx5_flow_drv_type type = flow->drv_type;
3331
3332         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3333         fops = flow_get_drv_ops(type);
3334         return fops->apply(dev, flow, error);
3335 }
3336
3337 /**
3338  * Flow driver destroy API. This abstracts calling driver specific functions.
3339  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
3340  * on device and releases resources of the flow.
3341  *
3342  * @param[in] dev
3343  *   Pointer to Ethernet device.
3344  * @param[in, out] flow
3345  *   Pointer to flow structure.
3346  */
3347 static inline void
3348 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
3349 {
3350         const struct mlx5_flow_driver_ops *fops;
3351         enum mlx5_flow_drv_type type = flow->drv_type;
3352
3353         flow_mreg_split_qrss_release(dev, flow);
3354         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3355         fops = flow_get_drv_ops(type);
3356         fops->destroy(dev, flow);
3357 }
3358
3359 /**
3360  * Get RSS action from the action list.
3361  *
3362  * @param[in] actions
3363  *   Pointer to the list of actions.
3364  *
3365  * @return
3366  *   Pointer to the RSS action if exist, else return NULL.
3367  */
3368 static const struct rte_flow_action_rss*
3369 flow_get_rss_action(const struct rte_flow_action actions[])
3370 {
3371         const struct rte_flow_action_rss *rss = NULL;
3372
3373         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3374                 switch (actions->type) {
3375                 case RTE_FLOW_ACTION_TYPE_RSS:
3376                         rss = actions->conf;
3377                         break;
3378                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
3379                 {
3380                         const struct rte_flow_action_sample *sample =
3381                                                                 actions->conf;
3382                         const struct rte_flow_action *act = sample->actions;
3383                         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++)
3384                                 if (act->type == RTE_FLOW_ACTION_TYPE_RSS)
3385                                         rss = act->conf;
3386                         break;
3387                 }
3388                 default:
3389                         break;
3390                 }
3391         }
3392         return rss;
3393 }
3394
3395 /**
3396  * Get ASO age action by index.
3397  *
3398  * @param[in] dev
3399  *   Pointer to the Ethernet device structure.
3400  * @param[in] age_idx
3401  *   Index to the ASO age action.
3402  *
3403  * @return
3404  *   The specified ASO age action.
3405  */
3406 struct mlx5_aso_age_action*
3407 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx)
3408 {
3409         uint16_t pool_idx = age_idx & UINT16_MAX;
3410         uint16_t offset = (age_idx >> 16) & UINT16_MAX;
3411         struct mlx5_priv *priv = dev->data->dev_private;
3412         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
3413         struct mlx5_aso_age_pool *pool = mng->pools[pool_idx];
3414
3415         return &pool->actions[offset - 1];
3416 }
3417
3418 /* maps shared action to translated non shared in some actions array */
3419 struct mlx5_translated_shared_action {
3420         struct rte_flow_shared_action *action; /**< Shared action */
3421         int index; /**< Index in related array of rte_flow_action */
3422 };
3423
3424 /**
3425  * Translates actions of type RTE_FLOW_ACTION_TYPE_SHARED to related
3426  * non shared action if translation possible.
3427  * This functionality used to run same execution path for both shared & non
3428  * shared actions on flow create. All necessary preparations for shared
3429  * action handling should be preformed on *shared* actions list returned
3430  * from this call.
3431  *
3432  * @param[in] dev
3433  *   Pointer to Ethernet device.
3434  * @param[in] actions
3435  *   List of actions to translate.
3436  * @param[out] shared
3437  *   List to store translated shared actions.
3438  * @param[in, out] shared_n
3439  *   Size of *shared* array. On return should be updated with number of shared
3440  *   actions retrieved from the *actions* list.
3441  * @param[out] translated_actions
3442  *   List of actions where all shared actions were translated to non shared
3443  *   if possible. NULL if no translation took place.
3444  * @param[out] error
3445  *   Pointer to the error structure.
3446  *
3447  * @return
3448  *   0 on success, a negative errno value otherwise and rte_errno is set.
3449  */
3450 static int
3451 flow_shared_actions_translate(struct rte_eth_dev *dev,
3452                               const struct rte_flow_action actions[],
3453                               struct mlx5_translated_shared_action *shared,
3454                               int *shared_n,
3455                               struct rte_flow_action **translated_actions,
3456                               struct rte_flow_error *error)
3457 {
3458         struct mlx5_priv *priv = dev->data->dev_private;
3459         struct rte_flow_action *translated = NULL;
3460         size_t actions_size;
3461         int n;
3462         int copied_n = 0;
3463         struct mlx5_translated_shared_action *shared_end = NULL;
3464
3465         for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
3466                 if (actions[n].type != RTE_FLOW_ACTION_TYPE_SHARED)
3467                         continue;
3468                 if (copied_n == *shared_n) {
3469                         return rte_flow_error_set
3470                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
3471                                  NULL, "too many shared actions");
3472                 }
3473                 rte_memcpy(&shared[copied_n].action, &actions[n].conf,
3474                            sizeof(actions[n].conf));
3475                 shared[copied_n].index = n;
3476                 copied_n++;
3477         }
3478         n++;
3479         *shared_n = copied_n;
3480         if (!copied_n)
3481                 return 0;
3482         actions_size = sizeof(struct rte_flow_action) * n;
3483         translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY);
3484         if (!translated) {
3485                 rte_errno = ENOMEM;
3486                 return -ENOMEM;
3487         }
3488         memcpy(translated, actions, actions_size);
3489         for (shared_end = shared + copied_n; shared < shared_end; shared++) {
3490                 struct mlx5_shared_action_rss *shared_rss;
3491                 uint32_t act_idx = (uint32_t)(uintptr_t)shared->action;
3492                 uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
3493                 uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET)
3494                                                                            - 1);
3495
3496                 switch (type) {
3497                 case MLX5_SHARED_ACTION_TYPE_RSS:
3498                         shared_rss = mlx5_ipool_get
3499                           (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
3500                         translated[shared->index].type =
3501                                 RTE_FLOW_ACTION_TYPE_RSS;
3502                         translated[shared->index].conf =
3503                                 &shared_rss->origin;
3504                         break;
3505                 case MLX5_SHARED_ACTION_TYPE_AGE:
3506                         if (priv->sh->flow_hit_aso_en) {
3507                                 translated[shared->index].type =
3508                                         (enum rte_flow_action_type)
3509                                         MLX5_RTE_FLOW_ACTION_TYPE_AGE;
3510                                 translated[shared->index].conf =
3511                                                          (void *)(uintptr_t)idx;
3512                                 break;
3513                         }
3514                         /* Fall-through */
3515                 default:
3516                         mlx5_free(translated);
3517                         return rte_flow_error_set
3518                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
3519                                  NULL, "invalid shared action type");
3520                 }
3521         }
3522         *translated_actions = translated;
3523         return 0;
3524 }
3525
3526 /**
3527  * Get Shared RSS action from the action list.
3528  *
3529  * @param[in] dev
3530  *   Pointer to Ethernet device.
3531  * @param[in] shared
3532  *   Pointer to the list of actions.
3533  * @param[in] shared_n
3534  *   Actions list length.
3535  *
3536  * @return
3537  *   The MLX5 RSS action ID if exists, otherwise return 0.
3538  */
3539 static uint32_t
3540 flow_get_shared_rss_action(struct rte_eth_dev *dev,
3541                            struct mlx5_translated_shared_action *shared,
3542                            int shared_n)
3543 {
3544         struct mlx5_translated_shared_action *shared_end;
3545         struct mlx5_priv *priv = dev->data->dev_private;
3546         struct mlx5_shared_action_rss *shared_rss;
3547
3548
3549         for (shared_end = shared + shared_n; shared < shared_end; shared++) {
3550                 uint32_t act_idx = (uint32_t)(uintptr_t)shared->action;
3551                 uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
3552                 uint32_t idx = act_idx &
3553                                    ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1);
3554                 switch (type) {
3555                 case MLX5_SHARED_ACTION_TYPE_RSS:
3556                         shared_rss = mlx5_ipool_get
3557                                 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
3558                                                                            idx);
3559                         __atomic_add_fetch(&shared_rss->refcnt, 1,
3560                                            __ATOMIC_RELAXED);
3561                         return idx;
3562                 default:
3563                         break;
3564                 }
3565         }
3566         return 0;
3567 }
3568
3569 static unsigned int
3570 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
3571 {
3572         const struct rte_flow_item *item;
3573         unsigned int has_vlan = 0;
3574
3575         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
3576                 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
3577                         has_vlan = 1;
3578                         break;
3579                 }
3580         }
3581         if (has_vlan)
3582                 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
3583                                        MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
3584         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
3585                                MLX5_EXPANSION_ROOT_OUTER;
3586 }
3587
3588 /**
3589  *  Get layer flags from the prefix flow.
3590  *
3591  *  Some flows may be split to several subflows, the prefix subflow gets the
3592  *  match items and the suffix sub flow gets the actions.
3593  *  Some actions need the user defined match item flags to get the detail for
3594  *  the action.
3595  *  This function helps the suffix flow to get the item layer flags from prefix
3596  *  subflow.
3597  *
3598  * @param[in] dev_flow
3599  *   Pointer the created preifx subflow.
3600  *
3601  * @return
3602  *   The layers get from prefix subflow.
3603  */
3604 static inline uint64_t
3605 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
3606 {
3607         uint64_t layers = 0;
3608
3609         /*
3610          * Layers bits could be localization, but usually the compiler will
3611          * help to do the optimization work for source code.
3612          * If no decap actions, use the layers directly.
3613          */
3614         if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP))
3615                 return dev_flow->handle->layers;
3616         /* Convert L3 layers with decap action. */
3617         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
3618                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3619         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
3620                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3621         /* Convert L4 layers with decap action.  */
3622         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
3623                 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
3624         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
3625                 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
3626         return layers;
3627 }
3628
3629 /**
3630  * Get metadata split action information.
3631  *
3632  * @param[in] actions
3633  *   Pointer to the list of actions.
3634  * @param[out] qrss
3635  *   Pointer to the return pointer.
3636  * @param[out] qrss_type
3637  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
3638  *   if no QUEUE/RSS is found.
3639  * @param[out] encap_idx
3640  *   Pointer to the index of the encap action if exists, otherwise the last
3641  *   action index.
3642  *
3643  * @return
3644  *   Total number of actions.
3645  */
3646 static int
3647 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
3648                                        const struct rte_flow_action **qrss,
3649                                        int *encap_idx)
3650 {
3651         const struct rte_flow_action_raw_encap *raw_encap;
3652         int actions_n = 0;
3653         int raw_decap_idx = -1;
3654
3655         *encap_idx = -1;
3656         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3657                 switch (actions->type) {
3658                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3659                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3660                         *encap_idx = actions_n;
3661                         break;
3662                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3663                         raw_decap_idx = actions_n;
3664                         break;
3665                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3666                         raw_encap = actions->conf;
3667                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3668                                 *encap_idx = raw_decap_idx != -1 ?
3669                                                       raw_decap_idx : actions_n;
3670                         break;
3671                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3672                 case RTE_FLOW_ACTION_TYPE_RSS:
3673                         *qrss = actions;
3674                         break;
3675                 default:
3676                         break;
3677                 }
3678                 actions_n++;
3679         }
3680         if (*encap_idx == -1)
3681                 *encap_idx = actions_n;
3682         /* Count RTE_FLOW_ACTION_TYPE_END. */
3683         return actions_n + 1;
3684 }
3685
3686 /**
3687  * Check meter action from the action list.
3688  *
3689  * @param[in] actions
3690  *   Pointer to the list of actions.
3691  * @param[out] mtr
3692  *   Pointer to the meter exist flag.
3693  *
3694  * @return
3695  *   Total number of actions.
3696  */
3697 static int
3698 flow_check_meter_action(const struct rte_flow_action actions[], uint32_t *mtr)
3699 {
3700         int actions_n = 0;
3701
3702         MLX5_ASSERT(mtr);
3703         *mtr = 0;
3704         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3705                 switch (actions->type) {
3706                 case RTE_FLOW_ACTION_TYPE_METER:
3707                         *mtr = 1;
3708                         break;
3709                 default:
3710                         break;
3711                 }
3712                 actions_n++;
3713         }
3714         /* Count RTE_FLOW_ACTION_TYPE_END. */
3715         return actions_n + 1;
3716 }
3717
3718 /**
3719  * Check if the flow should be split due to hairpin.
3720  * The reason for the split is that in current HW we can't
3721  * support encap and push-vlan on Rx, so if a flow contains
3722  * these actions we move it to Tx.
3723  *
3724  * @param dev
3725  *   Pointer to Ethernet device.
3726  * @param[in] attr
3727  *   Flow rule attributes.
3728  * @param[in] actions
3729  *   Associated actions (list terminated by the END action).
3730  *
3731  * @return
3732  *   > 0 the number of actions and the flow should be split,
3733  *   0 when no split required.
3734  */
3735 static int
3736 flow_check_hairpin_split(struct rte_eth_dev *dev,
3737                          const struct rte_flow_attr *attr,
3738                          const struct rte_flow_action actions[])
3739 {
3740         int queue_action = 0;
3741         int action_n = 0;
3742         int split = 0;
3743         const struct rte_flow_action_queue *queue;
3744         const struct rte_flow_action_rss *rss;
3745         const struct rte_flow_action_raw_encap *raw_encap;
3746         const struct rte_eth_hairpin_conf *conf;
3747
3748         if (!attr->ingress)
3749                 return 0;
3750         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3751                 switch (actions->type) {
3752                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3753                         queue = actions->conf;
3754                         if (queue == NULL)
3755                                 return 0;
3756                         conf = mlx5_rxq_get_hairpin_conf(dev, queue->index);
3757                         if (conf == NULL || conf->tx_explicit != 0)
3758                                 return 0;
3759                         queue_action = 1;
3760                         action_n++;
3761                         break;
3762                 case RTE_FLOW_ACTION_TYPE_RSS:
3763                         rss = actions->conf;
3764                         if (rss == NULL || rss->queue_num == 0)
3765                                 return 0;
3766                         conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]);
3767                         if (conf == NULL || conf->tx_explicit != 0)
3768                                 return 0;
3769                         queue_action = 1;
3770                         action_n++;
3771                         break;
3772                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3773                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3774                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3775                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3776                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
3777                         split++;
3778                         action_n++;
3779                         break;
3780                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3781                         raw_encap = actions->conf;
3782                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3783                                 split++;
3784                         action_n++;
3785                         break;
3786                 default:
3787                         action_n++;
3788                         break;
3789                 }
3790         }
3791         if (split && queue_action)
3792                 return action_n;
3793         return 0;
3794 }
3795
3796 /* Declare flow create/destroy prototype in advance. */
3797 static uint32_t
3798 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
3799                  const struct rte_flow_attr *attr,
3800                  const struct rte_flow_item items[],
3801                  const struct rte_flow_action actions[],
3802                  bool external, struct rte_flow_error *error);
3803
3804 static void
3805 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
3806                   uint32_t flow_idx);
3807
3808 int
3809 flow_dv_mreg_match_cb(struct mlx5_hlist *list __rte_unused,
3810                       struct mlx5_hlist_entry *entry,
3811                       uint64_t key, void *cb_ctx __rte_unused)
3812 {
3813         struct mlx5_flow_mreg_copy_resource *mcp_res =
3814                 container_of(entry, typeof(*mcp_res), hlist_ent);
3815
3816         return mcp_res->mark_id != key;
3817 }
3818
3819 struct mlx5_hlist_entry *
3820 flow_dv_mreg_create_cb(struct mlx5_hlist *list, uint64_t key,
3821                        void *cb_ctx)
3822 {
3823         struct rte_eth_dev *dev = list->ctx;
3824         struct mlx5_priv *priv = dev->data->dev_private;
3825         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3826         struct mlx5_flow_mreg_copy_resource *mcp_res;
3827         struct rte_flow_error *error = ctx->error;
3828         uint32_t idx = 0;
3829         int ret;
3830         uint32_t mark_id = key;
3831         struct rte_flow_attr attr = {
3832                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
3833                 .ingress = 1,
3834         };
3835         struct mlx5_rte_flow_item_tag tag_spec = {
3836                 .data = mark_id,
3837         };
3838         struct rte_flow_item items[] = {
3839                 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
3840         };
3841         struct rte_flow_action_mark ftag = {
3842                 .id = mark_id,
3843         };
3844         struct mlx5_flow_action_copy_mreg cp_mreg = {
3845                 .dst = REG_B,
3846                 .src = REG_NON,
3847         };
3848         struct rte_flow_action_jump jump = {
3849                 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
3850         };
3851         struct rte_flow_action actions[] = {
3852                 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
3853         };
3854
3855         /* Fill the register fileds in the flow. */
3856         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3857         if (ret < 0)
3858                 return NULL;
3859         tag_spec.id = ret;
3860         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
3861         if (ret < 0)
3862                 return NULL;
3863         cp_mreg.src = ret;
3864         /* Provide the full width of FLAG specific value. */
3865         if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
3866                 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
3867         /* Build a new flow. */
3868         if (mark_id != MLX5_DEFAULT_COPY_ID) {
3869                 items[0] = (struct rte_flow_item){
3870                         .type = (enum rte_flow_item_type)
3871                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
3872                         .spec = &tag_spec,
3873                 };
3874                 items[1] = (struct rte_flow_item){
3875                         .type = RTE_FLOW_ITEM_TYPE_END,
3876                 };
3877                 actions[0] = (struct rte_flow_action){
3878                         .type = (enum rte_flow_action_type)
3879                                 MLX5_RTE_FLOW_ACTION_TYPE_MARK,
3880                         .conf = &ftag,
3881                 };
3882                 actions[1] = (struct rte_flow_action){
3883                         .type = (enum rte_flow_action_type)
3884                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3885                         .conf = &cp_mreg,
3886                 };
3887                 actions[2] = (struct rte_flow_action){
3888                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
3889                         .conf = &jump,
3890                 };
3891                 actions[3] = (struct rte_flow_action){
3892                         .type = RTE_FLOW_ACTION_TYPE_END,
3893                 };
3894         } else {
3895                 /* Default rule, wildcard match. */
3896                 attr.priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR;
3897                 items[0] = (struct rte_flow_item){
3898                         .type = RTE_FLOW_ITEM_TYPE_END,
3899                 };
3900                 actions[0] = (struct rte_flow_action){
3901                         .type = (enum rte_flow_action_type)
3902                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3903                         .conf = &cp_mreg,
3904                 };
3905                 actions[1] = (struct rte_flow_action){
3906                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
3907                         .conf = &jump,
3908                 };
3909                 actions[2] = (struct rte_flow_action){
3910                         .type = RTE_FLOW_ACTION_TYPE_END,
3911                 };
3912         }
3913         /* Build a new entry. */
3914         mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
3915         if (!mcp_res) {
3916                 rte_errno = ENOMEM;
3917                 return NULL;
3918         }
3919         mcp_res->idx = idx;
3920         mcp_res->mark_id = mark_id;
3921         /*
3922          * The copy Flows are not included in any list. There
3923          * ones are referenced from other Flows and can not
3924          * be applied, removed, deleted in ardbitrary order
3925          * by list traversing.
3926          */
3927         mcp_res->rix_flow = flow_list_create(dev, NULL, &attr, items,
3928                                          actions, false, error);
3929         if (!mcp_res->rix_flow) {
3930                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx);
3931                 return NULL;
3932         }
3933         return &mcp_res->hlist_ent;
3934 }
3935
3936 /**
3937  * Add a flow of copying flow metadata registers in RX_CP_TBL.
3938  *
3939  * As mark_id is unique, if there's already a registered flow for the mark_id,
3940  * return by increasing the reference counter of the resource. Otherwise, create
3941  * the resource (mcp_res) and flow.
3942  *
3943  * Flow looks like,
3944  *   - If ingress port is ANY and reg_c[1] is mark_id,
3945  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3946  *
3947  * For default flow (zero mark_id), flow is like,
3948  *   - If ingress port is ANY,
3949  *     reg_b := reg_c[0] and jump to RX_ACT_TBL.
3950  *
3951  * @param dev
3952  *   Pointer to Ethernet device.
3953  * @param mark_id
3954  *   ID of MARK action, zero means default flow for META.
3955  * @param[out] error
3956  *   Perform verbose error reporting if not NULL.
3957  *
3958  * @return
3959  *   Associated resource on success, NULL otherwise and rte_errno is set.
3960  */
3961 static struct mlx5_flow_mreg_copy_resource *
3962 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
3963                           struct rte_flow_error *error)
3964 {
3965         struct mlx5_priv *priv = dev->data->dev_private;
3966         struct mlx5_hlist_entry *entry;
3967         struct mlx5_flow_cb_ctx ctx = {
3968                 .dev = dev,
3969                 .error = error,
3970         };
3971
3972         /* Check if already registered. */
3973         MLX5_ASSERT(priv->mreg_cp_tbl);
3974         entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx);
3975         if (!entry)
3976                 return NULL;
3977         return container_of(entry, struct mlx5_flow_mreg_copy_resource,
3978                             hlist_ent);
3979 }
3980
3981 void
3982 flow_dv_mreg_remove_cb(struct mlx5_hlist *list, struct mlx5_hlist_entry *entry)
3983 {
3984         struct mlx5_flow_mreg_copy_resource *mcp_res =
3985                 container_of(entry, typeof(*mcp_res), hlist_ent);
3986         struct rte_eth_dev *dev = list->ctx;
3987         struct mlx5_priv *priv = dev->data->dev_private;
3988
3989         MLX5_ASSERT(mcp_res->rix_flow);
3990         flow_list_destroy(dev, NULL, mcp_res->rix_flow);
3991         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
3992 }
3993
3994 /**
3995  * Release flow in RX_CP_TBL.
3996  *
3997  * @param dev
3998  *   Pointer to Ethernet device.
3999  * @flow
4000  *   Parent flow for wich copying is provided.
4001  */
4002 static void
4003 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
4004                           struct rte_flow *flow)
4005 {
4006         struct mlx5_flow_mreg_copy_resource *mcp_res;
4007         struct mlx5_priv *priv = dev->data->dev_private;
4008
4009         if (!flow->rix_mreg_copy)
4010                 return;
4011         mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
4012                                  flow->rix_mreg_copy);
4013         if (!mcp_res || !priv->mreg_cp_tbl)
4014                 return;
4015         MLX5_ASSERT(mcp_res->rix_flow);
4016         mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
4017         flow->rix_mreg_copy = 0;
4018 }
4019
4020 /**
4021  * Remove the default copy action from RX_CP_TBL.
4022  *
4023  * This functions is called in the mlx5_dev_start(). No thread safe
4024  * is guaranteed.
4025  *
4026  * @param dev
4027  *   Pointer to Ethernet device.
4028  */
4029 static void
4030 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
4031 {
4032         struct mlx5_hlist_entry *entry;
4033         struct mlx5_priv *priv = dev->data->dev_private;
4034
4035         /* Check if default flow is registered. */
4036         if (!priv->mreg_cp_tbl)
4037                 return;
4038         entry = mlx5_hlist_lookup(priv->mreg_cp_tbl,
4039                                   MLX5_DEFAULT_COPY_ID, NULL);
4040         if (!entry)
4041                 return;
4042         mlx5_hlist_unregister(priv->mreg_cp_tbl, entry);
4043 }
4044
4045 /**
4046  * Add the default copy action in in RX_CP_TBL.
4047  *
4048  * This functions is called in the mlx5_dev_start(). No thread safe
4049  * is guaranteed.
4050  *
4051  * @param dev
4052  *   Pointer to Ethernet device.
4053  * @param[out] error
4054  *   Perform verbose error reporting if not NULL.
4055  *
4056  * @return
4057  *   0 for success, negative value otherwise and rte_errno is set.
4058  */
4059 static int
4060 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
4061                                   struct rte_flow_error *error)
4062 {
4063         struct mlx5_priv *priv = dev->data->dev_private;
4064         struct mlx5_flow_mreg_copy_resource *mcp_res;
4065
4066         /* Check whether extensive metadata feature is engaged. */
4067         if (!priv->config.dv_flow_en ||
4068             priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4069             !mlx5_flow_ext_mreg_supported(dev) ||
4070             !priv->sh->dv_regc0_mask)
4071                 return 0;
4072         /*
4073          * Add default mreg copy flow may be called multiple time, but
4074          * only be called once in stop. Avoid register it twice.
4075          */
4076         if (mlx5_hlist_lookup(priv->mreg_cp_tbl, MLX5_DEFAULT_COPY_ID, NULL))
4077                 return 0;
4078         mcp_res = flow_mreg_add_copy_action(dev, MLX5_DEFAULT_COPY_ID, error);
4079         if (!mcp_res)
4080                 return -rte_errno;
4081         return 0;
4082 }
4083
4084 /**
4085  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4086  *
4087  * All the flow having Q/RSS action should be split by
4088  * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
4089  * performs the following,
4090  *   - CQE->flow_tag := reg_c[1] (MARK)
4091  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4092  * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
4093  * but there should be a flow per each MARK ID set by MARK action.
4094  *
4095  * For the aforementioned reason, if there's a MARK action in flow's action
4096  * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
4097  * the MARK ID to CQE's flow_tag like,
4098  *   - If reg_c[1] is mark_id,
4099  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4100  *
4101  * For SET_META action which stores value in reg_c[0], as the destination is
4102  * also a flow metadata register (reg_b), adding a default flow is enough. Zero
4103  * MARK ID means the default flow. The default flow looks like,
4104  *   - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4105  *
4106  * @param dev
4107  *   Pointer to Ethernet device.
4108  * @param flow
4109  *   Pointer to flow structure.
4110  * @param[in] actions
4111  *   Pointer to the list of actions.
4112  * @param[out] error
4113  *   Perform verbose error reporting if not NULL.
4114  *
4115  * @return
4116  *   0 on success, negative value otherwise and rte_errno is set.
4117  */
4118 static int
4119 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
4120                             struct rte_flow *flow,
4121                             const struct rte_flow_action *actions,
4122                             struct rte_flow_error *error)
4123 {
4124         struct mlx5_priv *priv = dev->data->dev_private;
4125         struct mlx5_dev_config *config = &priv->config;
4126         struct mlx5_flow_mreg_copy_resource *mcp_res;
4127         const struct rte_flow_action_mark *mark;
4128
4129         /* Check whether extensive metadata feature is engaged. */
4130         if (!config->dv_flow_en ||
4131             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4132             !mlx5_flow_ext_mreg_supported(dev) ||
4133             !priv->sh->dv_regc0_mask)
4134                 return 0;
4135         /* Find MARK action. */
4136         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4137                 switch (actions->type) {
4138                 case RTE_FLOW_ACTION_TYPE_FLAG:
4139                         mcp_res = flow_mreg_add_copy_action
4140                                 (dev, MLX5_FLOW_MARK_DEFAULT, error);
4141                         if (!mcp_res)
4142                                 return -rte_errno;
4143                         flow->rix_mreg_copy = mcp_res->idx;
4144                         return 0;
4145                 case RTE_FLOW_ACTION_TYPE_MARK:
4146                         mark = (const struct rte_flow_action_mark *)
4147                                 actions->conf;
4148                         mcp_res =
4149                                 flow_mreg_add_copy_action(dev, mark->id, error);
4150                         if (!mcp_res)
4151                                 return -rte_errno;
4152                         flow->rix_mreg_copy = mcp_res->idx;
4153                         return 0;
4154                 default:
4155                         break;
4156                 }
4157         }
4158         return 0;
4159 }
4160
4161 #define MLX5_MAX_SPLIT_ACTIONS 24
4162 #define MLX5_MAX_SPLIT_ITEMS 24
4163
4164 /**
4165  * Split the hairpin flow.
4166  * Since HW can't support encap and push-vlan on Rx, we move these
4167  * actions to Tx.
4168  * If the count action is after the encap then we also
4169  * move the count action. in this case the count will also measure
4170  * the outer bytes.
4171  *
4172  * @param dev
4173  *   Pointer to Ethernet device.
4174  * @param[in] actions
4175  *   Associated actions (list terminated by the END action).
4176  * @param[out] actions_rx
4177  *   Rx flow actions.
4178  * @param[out] actions_tx
4179  *   Tx flow actions..
4180  * @param[out] pattern_tx
4181  *   The pattern items for the Tx flow.
4182  * @param[out] flow_id
4183  *   The flow ID connected to this flow.
4184  *
4185  * @return
4186  *   0 on success.
4187  */
4188 static int
4189 flow_hairpin_split(struct rte_eth_dev *dev,
4190                    const struct rte_flow_action actions[],
4191                    struct rte_flow_action actions_rx[],
4192                    struct rte_flow_action actions_tx[],
4193                    struct rte_flow_item pattern_tx[],
4194                    uint32_t flow_id)
4195 {
4196         const struct rte_flow_action_raw_encap *raw_encap;
4197         const struct rte_flow_action_raw_decap *raw_decap;
4198         struct mlx5_rte_flow_action_set_tag *set_tag;
4199         struct rte_flow_action *tag_action;
4200         struct mlx5_rte_flow_item_tag *tag_item;
4201         struct rte_flow_item *item;
4202         char *addr;
4203         int encap = 0;
4204
4205         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4206                 switch (actions->type) {
4207                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4208                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4209                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4210                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4211                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4212                         rte_memcpy(actions_tx, actions,
4213                                sizeof(struct rte_flow_action));
4214                         actions_tx++;
4215                         break;
4216                 case RTE_FLOW_ACTION_TYPE_COUNT:
4217                         if (encap) {
4218                                 rte_memcpy(actions_tx, actions,
4219                                            sizeof(struct rte_flow_action));
4220                                 actions_tx++;
4221                         } else {
4222                                 rte_memcpy(actions_rx, actions,
4223                                            sizeof(struct rte_flow_action));
4224                                 actions_rx++;
4225                         }
4226                         break;
4227                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4228                         raw_encap = actions->conf;
4229                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
4230                                 memcpy(actions_tx, actions,
4231                                        sizeof(struct rte_flow_action));
4232                                 actions_tx++;
4233                                 encap = 1;
4234                         } else {
4235                                 rte_memcpy(actions_rx, actions,
4236                                            sizeof(struct rte_flow_action));
4237                                 actions_rx++;
4238                         }
4239                         break;
4240                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4241                         raw_decap = actions->conf;
4242                         if (raw_decap->size < MLX5_ENCAPSULATION_DECISION_SIZE) {
4243                                 memcpy(actions_tx, actions,
4244                                        sizeof(struct rte_flow_action));
4245                                 actions_tx++;
4246                         } else {
4247                                 rte_memcpy(actions_rx, actions,
4248                                            sizeof(struct rte_flow_action));
4249                                 actions_rx++;
4250                         }
4251                         break;
4252                 default:
4253                         rte_memcpy(actions_rx, actions,
4254                                    sizeof(struct rte_flow_action));
4255                         actions_rx++;
4256                         break;
4257                 }
4258         }
4259         /* Add set meta action and end action for the Rx flow. */
4260         tag_action = actions_rx;
4261         tag_action->type = (enum rte_flow_action_type)
4262                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4263         actions_rx++;
4264         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
4265         actions_rx++;
4266         set_tag = (void *)actions_rx;
4267         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL);
4268         MLX5_ASSERT(set_tag->id > REG_NON);
4269         set_tag->data = flow_id;
4270         tag_action->conf = set_tag;
4271         /* Create Tx item list. */
4272         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
4273         addr = (void *)&pattern_tx[2];
4274         item = pattern_tx;
4275         item->type = (enum rte_flow_item_type)
4276                      MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4277         tag_item = (void *)addr;
4278         tag_item->data = flow_id;
4279         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
4280         MLX5_ASSERT(set_tag->id > REG_NON);
4281         item->spec = tag_item;
4282         addr += sizeof(struct mlx5_rte_flow_item_tag);
4283         tag_item = (void *)addr;
4284         tag_item->data = UINT32_MAX;
4285         tag_item->id = UINT16_MAX;
4286         item->mask = tag_item;
4287         item->last = NULL;
4288         item++;
4289         item->type = RTE_FLOW_ITEM_TYPE_END;
4290         return 0;
4291 }
4292
4293 /**
4294  * The last stage of splitting chain, just creates the subflow
4295  * without any modification.
4296  *
4297  * @param[in] dev
4298  *   Pointer to Ethernet device.
4299  * @param[in] flow
4300  *   Parent flow structure pointer.
4301  * @param[in, out] sub_flow
4302  *   Pointer to return the created subflow, may be NULL.
4303  * @param[in] attr
4304  *   Flow rule attributes.
4305  * @param[in] items
4306  *   Pattern specification (list terminated by the END pattern item).
4307  * @param[in] actions
4308  *   Associated actions (list terminated by the END action).
4309  * @param[in] flow_split_info
4310  *   Pointer to flow split info structure.
4311  * @param[out] error
4312  *   Perform verbose error reporting if not NULL.
4313  * @return
4314  *   0 on success, negative value otherwise
4315  */
4316 static int
4317 flow_create_split_inner(struct rte_eth_dev *dev,
4318                         struct rte_flow *flow,
4319                         struct mlx5_flow **sub_flow,
4320                         const struct rte_flow_attr *attr,
4321                         const struct rte_flow_item items[],
4322                         const struct rte_flow_action actions[],
4323                         struct mlx5_flow_split_info *flow_split_info,
4324                         struct rte_flow_error *error)
4325 {
4326         struct mlx5_flow *dev_flow;
4327
4328         dev_flow = flow_drv_prepare(dev, flow, attr, items, actions,
4329                                     flow_split_info->flow_idx, error);
4330         if (!dev_flow)
4331                 return -rte_errno;
4332         dev_flow->flow = flow;
4333         dev_flow->external = flow_split_info->external;
4334         dev_flow->skip_scale = flow_split_info->skip_scale;
4335         /* Subflow object was created, we must include one in the list. */
4336         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4337                       dev_flow->handle, next);
4338         /*
4339          * If dev_flow is as one of the suffix flow, some actions in suffix
4340          * flow may need some user defined item layer flags, and pass the
4341          * Metadate rxq mark flag to suffix flow as well.
4342          */
4343         if (flow_split_info->prefix_layers)
4344                 dev_flow->handle->layers = flow_split_info->prefix_layers;
4345         if (flow_split_info->prefix_mark)
4346                 dev_flow->handle->mark = 1;
4347         if (sub_flow)
4348                 *sub_flow = dev_flow;
4349         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
4350 }
4351
4352 /**
4353  * Split the meter flow.
4354  *
4355  * As meter flow will split to three sub flow, other than meter
4356  * action, the other actions make sense to only meter accepts
4357  * the packet. If it need to be dropped, no other additional
4358  * actions should be take.
4359  *
4360  * One kind of special action which decapsulates the L3 tunnel
4361  * header will be in the prefix sub flow, as not to take the
4362  * L3 tunnel header into account.
4363  *
4364  * @param dev
4365  *   Pointer to Ethernet device.
4366  * @param[in] items
4367  *   Pattern specification (list terminated by the END pattern item).
4368  * @param[out] sfx_items
4369  *   Suffix flow match items (list terminated by the END pattern item).
4370  * @param[in] actions
4371  *   Associated actions (list terminated by the END action).
4372  * @param[out] actions_sfx
4373  *   Suffix flow actions.
4374  * @param[out] actions_pre
4375  *   Prefix flow actions.
4376  * @param[out] pattern_sfx
4377  *   The pattern items for the suffix flow.
4378  * @param[out] tag_sfx
4379  *   Pointer to suffix flow tag.
4380  *
4381  * @return
4382  *   0 on success.
4383  */
4384 static int
4385 flow_meter_split_prep(struct rte_eth_dev *dev,
4386                  const struct rte_flow_item items[],
4387                  struct rte_flow_item sfx_items[],
4388                  const struct rte_flow_action actions[],
4389                  struct rte_flow_action actions_sfx[],
4390                  struct rte_flow_action actions_pre[])
4391 {
4392         struct mlx5_priv *priv = dev->data->dev_private;
4393         struct rte_flow_action *tag_action = NULL;
4394         struct rte_flow_item *tag_item;
4395         struct mlx5_rte_flow_action_set_tag *set_tag;
4396         struct rte_flow_error error;
4397         const struct rte_flow_action_raw_encap *raw_encap;
4398         const struct rte_flow_action_raw_decap *raw_decap;
4399         struct mlx5_rte_flow_item_tag *tag_spec;
4400         struct mlx5_rte_flow_item_tag *tag_mask;
4401         uint32_t tag_id = 0;
4402         bool copy_vlan = false;
4403
4404         /* Prepare the actions for prefix and suffix flow. */
4405         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4406                 struct rte_flow_action **action_cur = NULL;
4407
4408                 switch (actions->type) {
4409                 case RTE_FLOW_ACTION_TYPE_METER:
4410                         /* Add the extra tag action first. */
4411                         tag_action = actions_pre;
4412                         tag_action->type = (enum rte_flow_action_type)
4413                                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4414                         actions_pre++;
4415                         action_cur = &actions_pre;
4416                         break;
4417                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4418                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4419                         action_cur = &actions_pre;
4420                         break;
4421                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4422                         raw_encap = actions->conf;
4423                         if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
4424                                 action_cur = &actions_pre;
4425                         break;
4426                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4427                         raw_decap = actions->conf;
4428                         if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4429                                 action_cur = &actions_pre;
4430                         break;
4431                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4432                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4433                         copy_vlan = true;
4434                         break;
4435                 default:
4436                         break;
4437                 }
4438                 if (!action_cur)
4439                         action_cur = &actions_sfx;
4440                 memcpy(*action_cur, actions, sizeof(struct rte_flow_action));
4441                 (*action_cur)++;
4442         }
4443         /* Add end action to the actions. */
4444         actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
4445         actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
4446         actions_pre++;
4447         /* Set the tag. */
4448         set_tag = (void *)actions_pre;
4449         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
4450         mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
4451                           &tag_id);
4452         if (tag_id >= (1 << (sizeof(tag_id) * 8 - MLX5_MTR_COLOR_BITS))) {
4453                 DRV_LOG(ERR, "Port %u meter flow id exceed max limit.",
4454                         dev->data->port_id);
4455                 mlx5_ipool_free(priv->sh->ipool
4456                                 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], tag_id);
4457                 return 0;
4458         } else if (!tag_id) {
4459                 return 0;
4460         }
4461         set_tag->data = tag_id << MLX5_MTR_COLOR_BITS;
4462         assert(tag_action);
4463         tag_action->conf = set_tag;
4464         /* Prepare the suffix subflow items. */
4465         tag_item = sfx_items++;
4466         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4467                 int item_type = items->type;
4468
4469                 switch (item_type) {
4470                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4471                         memcpy(sfx_items, items, sizeof(*sfx_items));
4472                         sfx_items++;
4473                         break;
4474                 case RTE_FLOW_ITEM_TYPE_VLAN:
4475                         if (copy_vlan) {
4476                                 memcpy(sfx_items, items, sizeof(*sfx_items));
4477                                 /*
4478                                  * Convert to internal match item, it is used
4479                                  * for vlan push and set vid.
4480                                  */
4481                                 sfx_items->type = (enum rte_flow_item_type)
4482                                                   MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
4483                                 sfx_items++;
4484                         }
4485                         break;
4486                 default:
4487                         break;
4488                 }
4489         }
4490         sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
4491         sfx_items++;
4492         tag_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
4493         tag_spec->data = tag_id << MLX5_MTR_COLOR_BITS;
4494         tag_spec->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
4495         tag_mask = tag_spec + 1;
4496         tag_mask->data = 0xffffff00;
4497         tag_item->type = (enum rte_flow_item_type)
4498                          MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4499         tag_item->spec = tag_spec;
4500         tag_item->last = NULL;
4501         tag_item->mask = tag_mask;
4502         return tag_id;
4503 }
4504
4505 /**
4506  * Split action list having QUEUE/RSS for metadata register copy.
4507  *
4508  * Once Q/RSS action is detected in user's action list, the flow action
4509  * should be split in order to copy metadata registers, which will happen in
4510  * RX_CP_TBL like,
4511  *   - CQE->flow_tag := reg_c[1] (MARK)
4512  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4513  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
4514  * This is because the last action of each flow must be a terminal action
4515  * (QUEUE, RSS or DROP).
4516  *
4517  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
4518  * stored and kept in the mlx5_flow structure per each sub_flow.
4519  *
4520  * The Q/RSS action is replaced with,
4521  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
4522  * And the following JUMP action is added at the end,
4523  *   - JUMP, to RX_CP_TBL.
4524  *
4525  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
4526  * flow_create_split_metadata() routine. The flow will look like,
4527  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
4528  *
4529  * @param dev
4530  *   Pointer to Ethernet device.
4531  * @param[out] split_actions
4532  *   Pointer to store split actions to jump to CP_TBL.
4533  * @param[in] actions
4534  *   Pointer to the list of original flow actions.
4535  * @param[in] qrss
4536  *   Pointer to the Q/RSS action.
4537  * @param[in] actions_n
4538  *   Number of original actions.
4539  * @param[out] error
4540  *   Perform verbose error reporting if not NULL.
4541  *
4542  * @return
4543  *   non-zero unique flow_id on success, otherwise 0 and
4544  *   error/rte_error are set.
4545  */
4546 static uint32_t
4547 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
4548                           struct rte_flow_action *split_actions,
4549                           const struct rte_flow_action *actions,
4550                           const struct rte_flow_action *qrss,
4551                           int actions_n, struct rte_flow_error *error)
4552 {
4553         struct mlx5_priv *priv = dev->data->dev_private;
4554         struct mlx5_rte_flow_action_set_tag *set_tag;
4555         struct rte_flow_action_jump *jump;
4556         const int qrss_idx = qrss - actions;
4557         uint32_t flow_id = 0;
4558         int ret = 0;
4559
4560         /*
4561          * Given actions will be split
4562          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
4563          * - Add jump to mreg CP_TBL.
4564          * As a result, there will be one more action.
4565          */
4566         ++actions_n;
4567         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
4568         set_tag = (void *)(split_actions + actions_n);
4569         /*
4570          * If tag action is not set to void(it means we are not the meter
4571          * suffix flow), add the tag action. Since meter suffix flow already
4572          * has the tag added.
4573          */
4574         if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) {
4575                 /*
4576                  * Allocate the new subflow ID. This one is unique within
4577                  * device and not shared with representors. Otherwise,
4578                  * we would have to resolve multi-thread access synch
4579                  * issue. Each flow on the shared device is appended
4580                  * with source vport identifier, so the resulting
4581                  * flows will be unique in the shared (by master and
4582                  * representors) domain even if they have coinciding
4583                  * IDs.
4584                  */
4585                 mlx5_ipool_malloc(priv->sh->ipool
4586                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id);
4587                 if (!flow_id)
4588                         return rte_flow_error_set(error, ENOMEM,
4589                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4590                                                   NULL, "can't allocate id "
4591                                                   "for split Q/RSS subflow");
4592                 /* Internal SET_TAG action to set flow ID. */
4593                 *set_tag = (struct mlx5_rte_flow_action_set_tag){
4594                         .data = flow_id,
4595                 };
4596                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
4597                 if (ret < 0)
4598                         return ret;
4599                 set_tag->id = ret;
4600                 /* Construct new actions array. */
4601                 /* Replace QUEUE/RSS action. */
4602                 split_actions[qrss_idx] = (struct rte_flow_action){
4603                         .type = (enum rte_flow_action_type)
4604                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
4605                         .conf = set_tag,
4606                 };
4607         }
4608         /* JUMP action to jump to mreg copy table (CP_TBL). */
4609         jump = (void *)(set_tag + 1);
4610         *jump = (struct rte_flow_action_jump){
4611                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
4612         };
4613         split_actions[actions_n - 2] = (struct rte_flow_action){
4614                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
4615                 .conf = jump,
4616         };
4617         split_actions[actions_n - 1] = (struct rte_flow_action){
4618                 .type = RTE_FLOW_ACTION_TYPE_END,
4619         };
4620         return flow_id;
4621 }
4622
4623 /**
4624  * Extend the given action list for Tx metadata copy.
4625  *
4626  * Copy the given action list to the ext_actions and add flow metadata register
4627  * copy action in order to copy reg_a set by WQE to reg_c[0].
4628  *
4629  * @param[out] ext_actions
4630  *   Pointer to the extended action list.
4631  * @param[in] actions
4632  *   Pointer to the list of actions.
4633  * @param[in] actions_n
4634  *   Number of actions in the list.
4635  * @param[out] error
4636  *   Perform verbose error reporting if not NULL.
4637  * @param[in] encap_idx
4638  *   The encap action inndex.
4639  *
4640  * @return
4641  *   0 on success, negative value otherwise
4642  */
4643 static int
4644 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
4645                        struct rte_flow_action *ext_actions,
4646                        const struct rte_flow_action *actions,
4647                        int actions_n, struct rte_flow_error *error,
4648                        int encap_idx)
4649 {
4650         struct mlx5_flow_action_copy_mreg *cp_mreg =
4651                 (struct mlx5_flow_action_copy_mreg *)
4652                         (ext_actions + actions_n + 1);
4653         int ret;
4654
4655         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
4656         if (ret < 0)
4657                 return ret;
4658         cp_mreg->dst = ret;
4659         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
4660         if (ret < 0)
4661                 return ret;
4662         cp_mreg->src = ret;
4663         if (encap_idx != 0)
4664                 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
4665         if (encap_idx == actions_n - 1) {
4666                 ext_actions[actions_n - 1] = (struct rte_flow_action){
4667                         .type = (enum rte_flow_action_type)
4668                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4669                         .conf = cp_mreg,
4670                 };
4671                 ext_actions[actions_n] = (struct rte_flow_action){
4672                         .type = RTE_FLOW_ACTION_TYPE_END,
4673                 };
4674         } else {
4675                 ext_actions[encap_idx] = (struct rte_flow_action){
4676                         .type = (enum rte_flow_action_type)
4677                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4678                         .conf = cp_mreg,
4679                 };
4680                 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
4681                                 sizeof(*ext_actions) * (actions_n - encap_idx));
4682         }
4683         return 0;
4684 }
4685
4686 /**
4687  * Check the match action from the action list.
4688  *
4689  * @param[in] actions
4690  *   Pointer to the list of actions.
4691  * @param[in] attr
4692  *   Flow rule attributes.
4693  * @param[in] action
4694  *   The action to be check if exist.
4695  * @param[out] match_action_pos
4696  *   Pointer to the position of the matched action if exists, otherwise is -1.
4697  * @param[out] qrss_action_pos
4698  *   Pointer to the position of the Queue/RSS action if exists, otherwise is -1.
4699  * @param[out] modify_after_mirror
4700  *   Pointer to the flag of modify action after FDB mirroring.
4701  *
4702  * @return
4703  *   > 0 the total number of actions.
4704  *   0 if not found match action in action list.
4705  */
4706 static int
4707 flow_check_match_action(const struct rte_flow_action actions[],
4708                         const struct rte_flow_attr *attr,
4709                         enum rte_flow_action_type action,
4710                         int *match_action_pos, int *qrss_action_pos,
4711                         int *modify_after_mirror)
4712 {
4713         const struct rte_flow_action_sample *sample;
4714         int actions_n = 0;
4715         uint32_t ratio = 0;
4716         int sub_type = 0;
4717         int flag = 0;
4718         int fdb_mirror = 0;
4719
4720         *match_action_pos = -1;
4721         *qrss_action_pos = -1;
4722         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4723                 if (actions->type == action) {
4724                         flag = 1;
4725                         *match_action_pos = actions_n;
4726                 }
4727                 switch (actions->type) {
4728                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4729                 case RTE_FLOW_ACTION_TYPE_RSS:
4730                         *qrss_action_pos = actions_n;
4731                         break;
4732                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
4733                         sample = actions->conf;
4734                         ratio = sample->ratio;
4735                         sub_type = ((const struct rte_flow_action *)
4736                                         (sample->actions))->type;
4737                         if (ratio == 1 && attr->transfer)
4738                                 fdb_mirror = 1;
4739                         break;
4740                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4741                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4742                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4743                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4744                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4745                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4746                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4747                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4748                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4749                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
4750                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4751                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4752                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4753                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4754                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
4755                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
4756                 case RTE_FLOW_ACTION_TYPE_FLAG:
4757                 case RTE_FLOW_ACTION_TYPE_MARK:
4758                 case RTE_FLOW_ACTION_TYPE_SET_META:
4759                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4760                         if (fdb_mirror)
4761                                 *modify_after_mirror = 1;
4762                         break;
4763                 default:
4764                         break;
4765                 }
4766                 actions_n++;
4767         }
4768         if (flag && fdb_mirror && !*modify_after_mirror) {
4769                 /* FDB mirroring uses the destination array to implement
4770                  * instead of FLOW_SAMPLER object.
4771                  */
4772                 if (sub_type != RTE_FLOW_ACTION_TYPE_END)
4773                         flag = 0;
4774         }
4775         /* Count RTE_FLOW_ACTION_TYPE_END. */
4776         return flag ? actions_n + 1 : 0;
4777 }
4778
4779 #define SAMPLE_SUFFIX_ITEM 2
4780
4781 /**
4782  * Split the sample flow.
4783  *
4784  * As sample flow will split to two sub flow, sample flow with
4785  * sample action, the other actions will move to new suffix flow.
4786  *
4787  * Also add unique tag id with tag action in the sample flow,
4788  * the same tag id will be as match in the suffix flow.
4789  *
4790  * @param dev
4791  *   Pointer to Ethernet device.
4792  * @param[in] add_tag
4793  *   Add extra tag action flag.
4794  * @param[out] sfx_items
4795  *   Suffix flow match items (list terminated by the END pattern item).
4796  * @param[in] actions
4797  *   Associated actions (list terminated by the END action).
4798  * @param[out] actions_sfx
4799  *   Suffix flow actions.
4800  * @param[out] actions_pre
4801  *   Prefix flow actions.
4802  * @param[in] actions_n
4803  *  The total number of actions.
4804  * @param[in] sample_action_pos
4805  *   The sample action position.
4806  * @param[in] qrss_action_pos
4807  *   The Queue/RSS action position.
4808  * @param[in] jump_table
4809  *   Add extra jump action flag.
4810  * @param[out] error
4811  *   Perform verbose error reporting if not NULL.
4812  *
4813  * @return
4814  *   0 on success, or unique flow_id, a negative errno value
4815  *   otherwise and rte_errno is set.
4816  */
4817 static int
4818 flow_sample_split_prep(struct rte_eth_dev *dev,
4819                        int add_tag,
4820                        struct rte_flow_item sfx_items[],
4821                        const struct rte_flow_action actions[],
4822                        struct rte_flow_action actions_sfx[],
4823                        struct rte_flow_action actions_pre[],
4824                        int actions_n,
4825                        int sample_action_pos,
4826                        int qrss_action_pos,
4827                        int jump_table,
4828                        struct rte_flow_error *error)
4829 {
4830         struct mlx5_priv *priv = dev->data->dev_private;
4831         struct mlx5_rte_flow_action_set_tag *set_tag;
4832         struct mlx5_rte_flow_item_tag *tag_spec;
4833         struct mlx5_rte_flow_item_tag *tag_mask;
4834         struct rte_flow_action_jump *jump_action;
4835         uint32_t tag_id = 0;
4836         int index;
4837         int append_index = 0;
4838         int ret;
4839
4840         if (sample_action_pos < 0)
4841                 return rte_flow_error_set(error, EINVAL,
4842                                           RTE_FLOW_ERROR_TYPE_ACTION,
4843                                           NULL, "invalid position of sample "
4844                                           "action in list");
4845         /* Prepare the actions for prefix and suffix flow. */
4846         if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) {
4847                 index = qrss_action_pos;
4848                 /* Put the preceding the Queue/RSS action into prefix flow. */
4849                 if (index != 0)
4850                         memcpy(actions_pre, actions,
4851                                sizeof(struct rte_flow_action) * index);
4852                 /* Put others preceding the sample action into prefix flow. */
4853                 if (sample_action_pos > index + 1)
4854                         memcpy(actions_pre + index, actions + index + 1,
4855                                sizeof(struct rte_flow_action) *
4856                                (sample_action_pos - index - 1));
4857                 index = sample_action_pos - 1;
4858                 /* Put Queue/RSS action into Suffix flow. */
4859                 memcpy(actions_sfx, actions + qrss_action_pos,
4860                        sizeof(struct rte_flow_action));
4861                 actions_sfx++;
4862         } else {
4863                 index = sample_action_pos;
4864                 if (index != 0)
4865                         memcpy(actions_pre, actions,
4866                                sizeof(struct rte_flow_action) * index);
4867         }
4868         /* For CX5, add an extra tag action for NIC-RX and E-Switch ingress.
4869          * For CX6DX and above, metadata registers Cx preserve their value,
4870          * add an extra tag action for NIC-RX and E-Switch Domain.
4871          */
4872         if (add_tag) {
4873                 /* Prepare the prefix tag action. */
4874                 append_index++;
4875                 set_tag = (void *)(actions_pre + actions_n + append_index);
4876                 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error);
4877                 if (ret < 0)
4878                         return ret;
4879                 set_tag->id = ret;
4880                 mlx5_ipool_malloc(priv->sh->ipool
4881                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id);
4882                 set_tag->data = tag_id;
4883                 /* Prepare the suffix subflow items. */
4884                 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM);
4885                 tag_spec->data = tag_id;
4886                 tag_spec->id = set_tag->id;
4887                 tag_mask = tag_spec + 1;
4888                 tag_mask->data = UINT32_MAX;
4889                 sfx_items[0] = (struct rte_flow_item){
4890                         .type = (enum rte_flow_item_type)
4891                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
4892                         .spec = tag_spec,
4893                         .last = NULL,
4894                         .mask = tag_mask,
4895                 };
4896                 sfx_items[1] = (struct rte_flow_item){
4897                         .type = (enum rte_flow_item_type)
4898                                 RTE_FLOW_ITEM_TYPE_END,
4899                 };
4900                 /* Prepare the tag action in prefix subflow. */
4901                 actions_pre[index++] =
4902                         (struct rte_flow_action){
4903                         .type = (enum rte_flow_action_type)
4904                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
4905                         .conf = set_tag,
4906                 };
4907         }
4908         memcpy(actions_pre + index, actions + sample_action_pos,
4909                sizeof(struct rte_flow_action));
4910         index += 1;
4911         /* For the modify action after the sample action in E-Switch mirroring,
4912          * Add the extra jump action in prefix subflow and jump into the next
4913          * table, then do the modify action in the new table.
4914          */
4915         if (jump_table) {
4916                 /* Prepare the prefix jump action. */
4917                 append_index++;
4918                 jump_action = (void *)(actions_pre + actions_n + append_index);
4919                 jump_action->group = jump_table;
4920                 actions_pre[index++] =
4921                         (struct rte_flow_action){
4922                         .type = (enum rte_flow_action_type)
4923                                 RTE_FLOW_ACTION_TYPE_JUMP,
4924                         .conf = jump_action,
4925                 };
4926         }
4927         actions_pre[index] = (struct rte_flow_action){
4928                 .type = (enum rte_flow_action_type)
4929                         RTE_FLOW_ACTION_TYPE_END,
4930         };
4931         /* Put the actions after sample into Suffix flow. */
4932         memcpy(actions_sfx, actions + sample_action_pos + 1,
4933                sizeof(struct rte_flow_action) *
4934                (actions_n - sample_action_pos - 1));
4935         return tag_id;
4936 }
4937
4938 /**
4939  * The splitting for metadata feature.
4940  *
4941  * - Q/RSS action on NIC Rx should be split in order to pass by
4942  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
4943  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
4944  *
4945  * - All the actions on NIC Tx should have a mreg copy action to
4946  *   copy reg_a from WQE to reg_c[0].
4947  *
4948  * @param dev
4949  *   Pointer to Ethernet device.
4950  * @param[in] flow
4951  *   Parent flow structure pointer.
4952  * @param[in] attr
4953  *   Flow rule attributes.
4954  * @param[in] items
4955  *   Pattern specification (list terminated by the END pattern item).
4956  * @param[in] actions
4957  *   Associated actions (list terminated by the END action).
4958  * @param[in] flow_split_info
4959  *   Pointer to flow split info structure.
4960  * @param[out] error
4961  *   Perform verbose error reporting if not NULL.
4962  * @return
4963  *   0 on success, negative value otherwise
4964  */
4965 static int
4966 flow_create_split_metadata(struct rte_eth_dev *dev,
4967                            struct rte_flow *flow,
4968                            const struct rte_flow_attr *attr,
4969                            const struct rte_flow_item items[],
4970                            const struct rte_flow_action actions[],
4971                            struct mlx5_flow_split_info *flow_split_info,
4972                            struct rte_flow_error *error)
4973 {
4974         struct mlx5_priv *priv = dev->data->dev_private;
4975         struct mlx5_dev_config *config = &priv->config;
4976         const struct rte_flow_action *qrss = NULL;
4977         struct rte_flow_action *ext_actions = NULL;
4978         struct mlx5_flow *dev_flow = NULL;
4979         uint32_t qrss_id = 0;
4980         int mtr_sfx = 0;
4981         size_t act_size;
4982         int actions_n;
4983         int encap_idx;
4984         int ret;
4985
4986         /* Check whether extensive metadata feature is engaged. */
4987         if (!config->dv_flow_en ||
4988             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4989             !mlx5_flow_ext_mreg_supported(dev))
4990                 return flow_create_split_inner(dev, flow, NULL, attr, items,
4991                                                actions, flow_split_info, error);
4992         actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
4993                                                            &encap_idx);
4994         if (qrss) {
4995                 /* Exclude hairpin flows from splitting. */
4996                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
4997                         const struct rte_flow_action_queue *queue;
4998
4999                         queue = qrss->conf;
5000                         if (mlx5_rxq_get_type(dev, queue->index) ==
5001                             MLX5_RXQ_TYPE_HAIRPIN)
5002                                 qrss = NULL;
5003                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
5004                         const struct rte_flow_action_rss *rss;
5005
5006                         rss = qrss->conf;
5007                         if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
5008                             MLX5_RXQ_TYPE_HAIRPIN)
5009                                 qrss = NULL;
5010                 }
5011         }
5012         if (qrss) {
5013                 /* Check if it is in meter suffix table. */
5014                 mtr_sfx = attr->group == (attr->transfer ?
5015                           (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
5016                           MLX5_FLOW_TABLE_LEVEL_SUFFIX);
5017                 /*
5018                  * Q/RSS action on NIC Rx should be split in order to pass by
5019                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
5020                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
5021                  */
5022                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5023                            sizeof(struct rte_flow_action_set_tag) +
5024                            sizeof(struct rte_flow_action_jump);
5025                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5026                                           SOCKET_ID_ANY);
5027                 if (!ext_actions)
5028                         return rte_flow_error_set(error, ENOMEM,
5029                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5030                                                   NULL, "no memory to split "
5031                                                   "metadata flow");
5032                 /*
5033                  * If we are the suffix flow of meter, tag already exist.
5034                  * Set the tag action to void.
5035                  */
5036                 if (mtr_sfx)
5037                         ext_actions[qrss - actions].type =
5038                                                 RTE_FLOW_ACTION_TYPE_VOID;
5039                 else
5040                         ext_actions[qrss - actions].type =
5041                                                 (enum rte_flow_action_type)
5042                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5043                 /*
5044                  * Create the new actions list with removed Q/RSS action
5045                  * and appended set tag and jump to register copy table
5046                  * (RX_CP_TBL). We should preallocate unique tag ID here
5047                  * in advance, because it is needed for set tag action.
5048                  */
5049                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
5050                                                     qrss, actions_n, error);
5051                 if (!mtr_sfx && !qrss_id) {
5052                         ret = -rte_errno;
5053                         goto exit;
5054                 }
5055         } else if (attr->egress && !attr->transfer) {
5056                 /*
5057                  * All the actions on NIC Tx should have a metadata register
5058                  * copy action to copy reg_a from WQE to reg_c[meta]
5059                  */
5060                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5061                            sizeof(struct mlx5_flow_action_copy_mreg);
5062                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5063                                           SOCKET_ID_ANY);
5064                 if (!ext_actions)
5065                         return rte_flow_error_set(error, ENOMEM,
5066                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5067                                                   NULL, "no memory to split "
5068                                                   "metadata flow");
5069                 /* Create the action list appended with copy register. */
5070                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
5071                                              actions_n, error, encap_idx);
5072                 if (ret < 0)
5073                         goto exit;
5074         }
5075         /* Add the unmodified original or prefix subflow. */
5076         ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
5077                                       items, ext_actions ? ext_actions :
5078                                       actions, flow_split_info, error);
5079         if (ret < 0)
5080                 goto exit;
5081         MLX5_ASSERT(dev_flow);
5082         if (qrss) {
5083                 const struct rte_flow_attr q_attr = {
5084                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5085                         .ingress = 1,
5086                 };
5087                 /* Internal PMD action to set register. */
5088                 struct mlx5_rte_flow_item_tag q_tag_spec = {
5089                         .data = qrss_id,
5090                         .id = REG_NON,
5091                 };
5092                 struct rte_flow_item q_items[] = {
5093                         {
5094                                 .type = (enum rte_flow_item_type)
5095                                         MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5096                                 .spec = &q_tag_spec,
5097                                 .last = NULL,
5098                                 .mask = NULL,
5099                         },
5100                         {
5101                                 .type = RTE_FLOW_ITEM_TYPE_END,
5102                         },
5103                 };
5104                 struct rte_flow_action q_actions[] = {
5105                         {
5106                                 .type = qrss->type,
5107                                 .conf = qrss->conf,
5108                         },
5109                         {
5110                                 .type = RTE_FLOW_ACTION_TYPE_END,
5111                         },
5112                 };
5113                 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
5114
5115                 /*
5116                  * Configure the tag item only if there is no meter subflow.
5117                  * Since tag is already marked in the meter suffix subflow
5118                  * we can just use the meter suffix items as is.
5119                  */
5120                 if (qrss_id) {
5121                         /* Not meter subflow. */
5122                         MLX5_ASSERT(!mtr_sfx);
5123                         /*
5124                          * Put unique id in prefix flow due to it is destroyed
5125                          * after suffix flow and id will be freed after there
5126                          * is no actual flows with this id and identifier
5127                          * reallocation becomes possible (for example, for
5128                          * other flows in other threads).
5129                          */
5130                         dev_flow->handle->split_flow_id = qrss_id;
5131                         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
5132                                                    error);
5133                         if (ret < 0)
5134                                 goto exit;
5135                         q_tag_spec.id = ret;
5136                 }
5137                 dev_flow = NULL;
5138                 /* Add suffix subflow to execute Q/RSS. */
5139                 flow_split_info->prefix_layers = layers;
5140                 flow_split_info->prefix_mark = 0;
5141                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5142                                               &q_attr, mtr_sfx ? items :
5143                                               q_items, q_actions,
5144                                               flow_split_info, error);
5145                 if (ret < 0)
5146                         goto exit;
5147                 /* qrss ID should be freed if failed. */
5148                 qrss_id = 0;
5149                 MLX5_ASSERT(dev_flow);
5150         }
5151
5152 exit:
5153         /*
5154          * We do not destroy the partially created sub_flows in case of error.
5155          * These ones are included into parent flow list and will be destroyed
5156          * by flow_drv_destroy.
5157          */
5158         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
5159                         qrss_id);
5160         mlx5_free(ext_actions);
5161         return ret;
5162 }
5163
5164 /**
5165  * The splitting for meter feature.
5166  *
5167  * - The meter flow will be split to two flows as prefix and
5168  *   suffix flow. The packets make sense only it pass the prefix
5169  *   meter action.
5170  *
5171  * - Reg_C_5 is used for the packet to match betweend prefix and
5172  *   suffix flow.
5173  *
5174  * @param dev
5175  *   Pointer to Ethernet device.
5176  * @param[in] flow
5177  *   Parent flow structure pointer.
5178  * @param[in] attr
5179  *   Flow rule attributes.
5180  * @param[in] items
5181  *   Pattern specification (list terminated by the END pattern item).
5182  * @param[in] actions
5183  *   Associated actions (list terminated by the END action).
5184  * @param[in] flow_split_info
5185  *   Pointer to flow split info structure.
5186  * @param[out] error
5187  *   Perform verbose error reporting if not NULL.
5188  * @return
5189  *   0 on success, negative value otherwise
5190  */
5191 static int
5192 flow_create_split_meter(struct rte_eth_dev *dev,
5193                         struct rte_flow *flow,
5194                         const struct rte_flow_attr *attr,
5195                         const struct rte_flow_item items[],
5196                         const struct rte_flow_action actions[],
5197                         struct mlx5_flow_split_info *flow_split_info,
5198                         struct rte_flow_error *error)
5199 {
5200         struct mlx5_priv *priv = dev->data->dev_private;
5201         struct rte_flow_action *sfx_actions = NULL;
5202         struct rte_flow_action *pre_actions = NULL;
5203         struct rte_flow_item *sfx_items = NULL;
5204         struct mlx5_flow *dev_flow = NULL;
5205         struct rte_flow_attr sfx_attr = *attr;
5206         uint32_t mtr = 0;
5207         uint32_t mtr_tag_id = 0;
5208         size_t act_size;
5209         size_t item_size;
5210         int actions_n = 0;
5211         int ret;
5212
5213         if (priv->mtr_en)
5214                 actions_n = flow_check_meter_action(actions, &mtr);
5215         if (mtr) {
5216                 /* The five prefix actions: meter, decap, encap, tag, end. */
5217                 act_size = sizeof(struct rte_flow_action) * (actions_n + 5) +
5218                            sizeof(struct mlx5_rte_flow_action_set_tag);
5219                 /* tag, vlan, port id, end. */
5220 #define METER_SUFFIX_ITEM 4
5221                 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
5222                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
5223                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size),
5224                                           0, SOCKET_ID_ANY);
5225                 if (!sfx_actions)
5226                         return rte_flow_error_set(error, ENOMEM,
5227                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5228                                                   NULL, "no memory to split "
5229                                                   "meter flow");
5230                 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
5231                              act_size);
5232                 pre_actions = sfx_actions + actions_n;
5233                 mtr_tag_id = flow_meter_split_prep(dev, items, sfx_items,
5234                                                    actions, sfx_actions,
5235                                                    pre_actions);
5236                 if (!mtr_tag_id) {
5237                         ret = -rte_errno;
5238                         goto exit;
5239                 }
5240                 /* Add the prefix subflow. */
5241                 flow_split_info->prefix_mark = 0;
5242                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5243                                               attr, items, pre_actions,
5244                                               flow_split_info, error);
5245                 if (ret) {
5246                         ret = -rte_errno;
5247                         goto exit;
5248                 }
5249                 dev_flow->handle->split_flow_id = mtr_tag_id;
5250                 /* Setting the sfx group atrr. */
5251                 sfx_attr.group = sfx_attr.transfer ?
5252                                 (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
5253                                  MLX5_FLOW_TABLE_LEVEL_SUFFIX;
5254                 flow_split_info->prefix_layers =
5255                                 flow_get_prefix_layer_flags(dev_flow);
5256                 flow_split_info->prefix_mark = dev_flow->handle->mark;
5257         }
5258         /* Add the prefix subflow. */
5259         ret = flow_create_split_metadata(dev, flow,
5260                                          &sfx_attr, sfx_items ?
5261                                          sfx_items : items,
5262                                          sfx_actions ? sfx_actions : actions,
5263                                          flow_split_info, error);
5264 exit:
5265         if (sfx_actions)
5266                 mlx5_free(sfx_actions);
5267         return ret;
5268 }
5269
5270 /**
5271  * The splitting for sample feature.
5272  *
5273  * Once Sample action is detected in the action list, the flow actions should
5274  * be split into prefix sub flow and suffix sub flow.
5275  *
5276  * The original items remain in the prefix sub flow, all actions preceding the
5277  * sample action and the sample action itself will be copied to the prefix
5278  * sub flow, the actions following the sample action will be copied to the
5279  * suffix sub flow, Queue action always be located in the suffix sub flow.
5280  *
5281  * In order to make the packet from prefix sub flow matches with suffix sub
5282  * flow, an extra tag action be added into prefix sub flow, and the suffix sub
5283  * flow uses tag item with the unique flow id.
5284  *
5285  * @param dev
5286  *   Pointer to Ethernet device.
5287  * @param[in] flow
5288  *   Parent flow structure pointer.
5289  * @param[in] attr
5290  *   Flow rule attributes.
5291  * @param[in] items
5292  *   Pattern specification (list terminated by the END pattern item).
5293  * @param[in] actions
5294  *   Associated actions (list terminated by the END action).
5295  * @param[in] flow_split_info
5296  *   Pointer to flow split info structure.
5297  * @param[out] error
5298  *   Perform verbose error reporting if not NULL.
5299  * @return
5300  *   0 on success, negative value otherwise
5301  */
5302 static int
5303 flow_create_split_sample(struct rte_eth_dev *dev,
5304                          struct rte_flow *flow,
5305                          const struct rte_flow_attr *attr,
5306                          const struct rte_flow_item items[],
5307                          const struct rte_flow_action actions[],
5308                          struct mlx5_flow_split_info *flow_split_info,
5309                          struct rte_flow_error *error)
5310 {
5311         struct mlx5_priv *priv = dev->data->dev_private;
5312         struct rte_flow_action *sfx_actions = NULL;
5313         struct rte_flow_action *pre_actions = NULL;
5314         struct rte_flow_item *sfx_items = NULL;
5315         struct mlx5_flow *dev_flow = NULL;
5316         struct rte_flow_attr sfx_attr = *attr;
5317 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5318         struct mlx5_flow_dv_sample_resource *sample_res;
5319         struct mlx5_flow_tbl_data_entry *sfx_tbl_data;
5320         struct mlx5_flow_tbl_resource *sfx_tbl;
5321 #endif
5322         size_t act_size;
5323         size_t item_size;
5324         uint32_t fdb_tx = 0;
5325         int32_t tag_id = 0;
5326         int actions_n = 0;
5327         int sample_action_pos;
5328         int qrss_action_pos;
5329         int add_tag = 0;
5330         int modify_after_mirror = 0;
5331         uint16_t jump_table = 0;
5332         const uint32_t next_ft_step = 1;
5333         int ret = 0;
5334
5335         if (priv->sampler_en)
5336                 actions_n = flow_check_match_action(actions, attr,
5337                                         RTE_FLOW_ACTION_TYPE_SAMPLE,
5338                                         &sample_action_pos, &qrss_action_pos,
5339                                         &modify_after_mirror);
5340         if (actions_n) {
5341                 /* The prefix actions must includes sample, tag, end. */
5342                 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1)
5343                            + sizeof(struct mlx5_rte_flow_action_set_tag);
5344                 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM +
5345                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
5346                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size +
5347                                           item_size), 0, SOCKET_ID_ANY);
5348                 if (!sfx_actions)
5349                         return rte_flow_error_set(error, ENOMEM,
5350                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5351                                                   NULL, "no memory to split "
5352                                                   "sample flow");
5353                 /* The representor_id is -1 for uplink. */
5354                 fdb_tx = (attr->transfer && priv->representor_id != -1);
5355                 /*
5356                  * When reg_c_preserve is set, metadata registers Cx preserve
5357                  * their value even through packet duplication.
5358                  */
5359                 add_tag = (!fdb_tx || priv->config.hca_attr.reg_c_preserve);
5360                 if (add_tag)
5361                         sfx_items = (struct rte_flow_item *)((char *)sfx_actions
5362                                         + act_size);
5363                 if (modify_after_mirror)
5364                         jump_table = attr->group * MLX5_FLOW_TABLE_FACTOR +
5365                                      next_ft_step;
5366                 pre_actions = sfx_actions + actions_n;
5367                 tag_id = flow_sample_split_prep(dev, add_tag, sfx_items,
5368                                                 actions, sfx_actions,
5369                                                 pre_actions, actions_n,
5370                                                 sample_action_pos,
5371                                                 qrss_action_pos, jump_table,
5372                                                 error);
5373                 if (tag_id < 0 || (add_tag && !tag_id)) {
5374                         ret = -rte_errno;
5375                         goto exit;
5376                 }
5377                 if (modify_after_mirror)
5378                         flow_split_info->skip_scale =
5379                                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
5380                 /* Add the prefix subflow. */
5381                 ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
5382                                               items, pre_actions,
5383                                               flow_split_info, error);
5384                 if (ret) {
5385                         ret = -rte_errno;
5386                         goto exit;
5387                 }
5388                 dev_flow->handle->split_flow_id = tag_id;
5389 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5390                 if (!modify_after_mirror) {
5391                         /* Set the sfx group attr. */
5392                         sample_res = (struct mlx5_flow_dv_sample_resource *)
5393                                                 dev_flow->dv.sample_res;
5394                         sfx_tbl = (struct mlx5_flow_tbl_resource *)
5395                                                 sample_res->normal_path_tbl;
5396                         sfx_tbl_data = container_of(sfx_tbl,
5397                                                 struct mlx5_flow_tbl_data_entry,
5398                                                 tbl);
5399                         sfx_attr.group = sfx_attr.transfer ?
5400                                                 (sfx_tbl_data->table_id - 1) :
5401                                                 sfx_tbl_data->table_id;
5402                 } else {
5403                         MLX5_ASSERT(attr->transfer);
5404                         sfx_attr.group = jump_table;
5405                 }
5406                 flow_split_info->prefix_layers =
5407                                 flow_get_prefix_layer_flags(dev_flow);
5408                 flow_split_info->prefix_mark = dev_flow->handle->mark;
5409                 /* Suffix group level already be scaled with factor, set
5410                  * MLX5_SCALE_FLOW_GROUP_BIT of skip_scale to 1 to avoid scale
5411                  * again in translation.
5412                  */
5413                 flow_split_info->skip_scale = 1 << MLX5_SCALE_FLOW_GROUP_BIT;
5414 #endif
5415         }
5416         /* Add the suffix subflow. */
5417         ret = flow_create_split_meter(dev, flow, &sfx_attr,
5418                                       sfx_items ? sfx_items : items,
5419                                       sfx_actions ? sfx_actions : actions,
5420                                       flow_split_info, error);
5421 exit:
5422         if (sfx_actions)
5423                 mlx5_free(sfx_actions);
5424         return ret;
5425 }
5426
5427 /**
5428  * Split the flow to subflow set. The splitters might be linked
5429  * in the chain, like this:
5430  * flow_create_split_outer() calls:
5431  *   flow_create_split_meter() calls:
5432  *     flow_create_split_metadata(meter_subflow_0) calls:
5433  *       flow_create_split_inner(metadata_subflow_0)
5434  *       flow_create_split_inner(metadata_subflow_1)
5435  *       flow_create_split_inner(metadata_subflow_2)
5436  *     flow_create_split_metadata(meter_subflow_1) calls:
5437  *       flow_create_split_inner(metadata_subflow_0)
5438  *       flow_create_split_inner(metadata_subflow_1)
5439  *       flow_create_split_inner(metadata_subflow_2)
5440  *
5441  * This provide flexible way to add new levels of flow splitting.
5442  * The all of successfully created subflows are included to the
5443  * parent flow dev_flow list.
5444  *
5445  * @param dev
5446  *   Pointer to Ethernet device.
5447  * @param[in] flow
5448  *   Parent flow structure pointer.
5449  * @param[in] attr
5450  *   Flow rule attributes.
5451  * @param[in] items
5452  *   Pattern specification (list terminated by the END pattern item).
5453  * @param[in] actions
5454  *   Associated actions (list terminated by the END action).
5455  * @param[in] flow_split_info
5456  *   Pointer to flow split info structure.
5457  * @param[out] error
5458  *   Perform verbose error reporting if not NULL.
5459  * @return
5460  *   0 on success, negative value otherwise
5461  */
5462 static int
5463 flow_create_split_outer(struct rte_eth_dev *dev,
5464                         struct rte_flow *flow,
5465                         const struct rte_flow_attr *attr,
5466                         const struct rte_flow_item items[],
5467                         const struct rte_flow_action actions[],
5468                         struct mlx5_flow_split_info *flow_split_info,
5469                         struct rte_flow_error *error)
5470 {
5471         int ret;
5472
5473         ret = flow_create_split_sample(dev, flow, attr, items,
5474                                        actions, flow_split_info, error);
5475         MLX5_ASSERT(ret <= 0);
5476         return ret;
5477 }
5478
5479 static struct mlx5_flow_tunnel *
5480 flow_tunnel_from_rule(struct rte_eth_dev *dev,
5481                       const struct rte_flow_attr *attr,
5482                       const struct rte_flow_item items[],
5483                       const struct rte_flow_action actions[])
5484 {
5485         struct mlx5_flow_tunnel *tunnel;
5486
5487 #pragma GCC diagnostic push
5488 #pragma GCC diagnostic ignored "-Wcast-qual"
5489         if (is_flow_tunnel_match_rule(dev, attr, items, actions))
5490                 tunnel = (struct mlx5_flow_tunnel *)items[0].spec;
5491         else if (is_flow_tunnel_steer_rule(dev, attr, items, actions))
5492                 tunnel = (struct mlx5_flow_tunnel *)actions[0].conf;
5493         else
5494                 tunnel = NULL;
5495 #pragma GCC diagnostic pop
5496
5497         return tunnel;
5498 }
5499
5500 /**
5501  * Adjust flow RSS workspace if needed.
5502  *
5503  * @param wks
5504  *   Pointer to thread flow work space.
5505  * @param rss_desc
5506  *   Pointer to RSS descriptor.
5507  * @param[in] nrssq_num
5508  *   New RSS queue number.
5509  *
5510  * @return
5511  *   0 on success, -1 otherwise and rte_errno is set.
5512  */
5513 static int
5514 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks,
5515                           struct mlx5_flow_rss_desc *rss_desc,
5516                           uint32_t nrssq_num)
5517 {
5518         if (likely(nrssq_num <= wks->rssq_num))
5519                 return 0;
5520         rss_desc->queue = realloc(rss_desc->queue,
5521                           sizeof(*rss_desc->queue) * RTE_ALIGN(nrssq_num, 2));
5522         if (!rss_desc->queue) {
5523                 rte_errno = ENOMEM;
5524                 return -1;
5525         }
5526         wks->rssq_num = RTE_ALIGN(nrssq_num, 2);
5527         return 0;
5528 }
5529
5530 /**
5531  * Create a flow and add it to @p list.
5532  *
5533  * @param dev
5534  *   Pointer to Ethernet device.
5535  * @param list
5536  *   Pointer to a TAILQ flow list. If this parameter NULL,
5537  *   no list insertion occurred, flow is just created,
5538  *   this is caller's responsibility to track the
5539  *   created flow.
5540  * @param[in] attr
5541  *   Flow rule attributes.
5542  * @param[in] items
5543  *   Pattern specification (list terminated by the END pattern item).
5544  * @param[in] actions
5545  *   Associated actions (list terminated by the END action).
5546  * @param[in] external
5547  *   This flow rule is created by request external to PMD.
5548  * @param[out] error
5549  *   Perform verbose error reporting if not NULL.
5550  *
5551  * @return
5552  *   A flow index on success, 0 otherwise and rte_errno is set.
5553  */
5554 static uint32_t
5555 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
5556                  const struct rte_flow_attr *attr,
5557                  const struct rte_flow_item items[],
5558                  const struct rte_flow_action original_actions[],
5559                  bool external, struct rte_flow_error *error)
5560 {
5561         struct mlx5_priv *priv = dev->data->dev_private;
5562         struct rte_flow *flow = NULL;
5563         struct mlx5_flow *dev_flow;
5564         const struct rte_flow_action_rss *rss = NULL;
5565         struct mlx5_translated_shared_action
5566                 shared_actions[MLX5_MAX_SHARED_ACTIONS];
5567         int shared_actions_n = MLX5_MAX_SHARED_ACTIONS;
5568         union {
5569                 struct mlx5_flow_expand_rss buf;
5570                 uint8_t buffer[2048];
5571         } expand_buffer;
5572         union {
5573                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
5574                 uint8_t buffer[2048];
5575         } actions_rx;
5576         union {
5577                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
5578                 uint8_t buffer[2048];
5579         } actions_hairpin_tx;
5580         union {
5581                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
5582                 uint8_t buffer[2048];
5583         } items_tx;
5584         struct mlx5_flow_expand_rss *buf = &expand_buffer.buf;
5585         struct mlx5_flow_rss_desc *rss_desc;
5586         const struct rte_flow_action *p_actions_rx;
5587         uint32_t i;
5588         uint32_t idx = 0;
5589         int hairpin_flow;
5590         struct rte_flow_attr attr_tx = { .priority = 0 };
5591         const struct rte_flow_action *actions;
5592         struct rte_flow_action *translated_actions = NULL;
5593         struct mlx5_flow_tunnel *tunnel;
5594         struct tunnel_default_miss_ctx default_miss_ctx = { 0, };
5595         struct mlx5_flow_workspace *wks = mlx5_flow_push_thread_workspace();
5596         struct mlx5_flow_split_info flow_split_info = {
5597                 .external = !!external,
5598                 .skip_scale = 0,
5599                 .flow_idx = 0,
5600                 .prefix_mark = 0,
5601                 .prefix_layers = 0
5602         };
5603         int ret;
5604
5605         MLX5_ASSERT(wks);
5606         rss_desc = &wks->rss_desc;
5607         ret = flow_shared_actions_translate(dev, original_actions,
5608                                             shared_actions,
5609                                             &shared_actions_n,
5610                                             &translated_actions, error);
5611         if (ret < 0) {
5612                 MLX5_ASSERT(translated_actions == NULL);
5613                 return 0;
5614         }
5615         actions = translated_actions ? translated_actions : original_actions;
5616         p_actions_rx = actions;
5617         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
5618         ret = flow_drv_validate(dev, attr, items, p_actions_rx,
5619                                 external, hairpin_flow, error);
5620         if (ret < 0)
5621                 goto error_before_hairpin_split;
5622         flow = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], &idx);
5623         if (!flow) {
5624                 rte_errno = ENOMEM;
5625                 goto error_before_hairpin_split;
5626         }
5627         if (hairpin_flow > 0) {
5628                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
5629                         rte_errno = EINVAL;
5630                         goto error_before_hairpin_split;
5631                 }
5632                 flow_hairpin_split(dev, actions, actions_rx.actions,
5633                                    actions_hairpin_tx.actions, items_tx.items,
5634                                    idx);
5635                 p_actions_rx = actions_rx.actions;
5636         }
5637         flow_split_info.flow_idx = idx;
5638         flow->drv_type = flow_get_drv_type(dev, attr);
5639         MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
5640                     flow->drv_type < MLX5_FLOW_TYPE_MAX);
5641         memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue));
5642         /* RSS Action only works on NIC RX domain */
5643         if (attr->ingress && !attr->transfer)
5644                 rss = flow_get_rss_action(p_actions_rx);
5645         if (rss) {
5646                 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num))
5647                         return 0;
5648                 /*
5649                  * The following information is required by
5650                  * mlx5_flow_hashfields_adjust() in advance.
5651                  */
5652                 rss_desc->level = rss->level;
5653                 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
5654                 rss_desc->types = !rss->types ? ETH_RSS_IP : rss->types;
5655         }
5656         flow->dev_handles = 0;
5657         if (rss && rss->types) {
5658                 unsigned int graph_root;
5659
5660                 graph_root = find_graph_root(items, rss->level);
5661                 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
5662                                            items, rss->types,
5663                                            mlx5_support_expansion, graph_root);
5664                 MLX5_ASSERT(ret > 0 &&
5665                        (unsigned int)ret < sizeof(expand_buffer.buffer));
5666         } else {
5667                 buf->entries = 1;
5668                 buf->entry[0].pattern = (void *)(uintptr_t)items;
5669         }
5670         rss_desc->shared_rss = flow_get_shared_rss_action(dev, shared_actions,
5671                                                       shared_actions_n);
5672         for (i = 0; i < buf->entries; ++i) {
5673                 /* Initialize flow split data. */
5674                 flow_split_info.prefix_layers = 0;
5675                 flow_split_info.prefix_mark = 0;
5676                 flow_split_info.skip_scale = 0;
5677                 /*
5678                  * The splitter may create multiple dev_flows,
5679                  * depending on configuration. In the simplest
5680                  * case it just creates unmodified original flow.
5681                  */
5682                 ret = flow_create_split_outer(dev, flow, attr,
5683                                               buf->entry[i].pattern,
5684                                               p_actions_rx, &flow_split_info,
5685                                               error);
5686                 if (ret < 0)
5687                         goto error;
5688                 if (is_flow_tunnel_steer_rule(dev, attr,
5689                                               buf->entry[i].pattern,
5690                                               p_actions_rx)) {
5691                         ret = flow_tunnel_add_default_miss(dev, flow, attr,
5692                                                            p_actions_rx,
5693                                                            idx,
5694                                                            &default_miss_ctx,
5695                                                            error);
5696                         if (ret < 0) {
5697                                 mlx5_free(default_miss_ctx.queue);
5698                                 goto error;
5699                         }
5700                 }
5701         }
5702         /* Create the tx flow. */
5703         if (hairpin_flow) {
5704                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
5705                 attr_tx.ingress = 0;
5706                 attr_tx.egress = 1;
5707                 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
5708                                          actions_hairpin_tx.actions,
5709                                          idx, error);
5710                 if (!dev_flow)
5711                         goto error;
5712                 dev_flow->flow = flow;
5713                 dev_flow->external = 0;
5714                 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
5715                               dev_flow->handle, next);
5716                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
5717                                          items_tx.items,
5718                                          actions_hairpin_tx.actions, error);
5719                 if (ret < 0)
5720                         goto error;
5721         }
5722         /*
5723          * Update the metadata register copy table. If extensive
5724          * metadata feature is enabled and registers are supported
5725          * we might create the extra rte_flow for each unique
5726          * MARK/FLAG action ID.
5727          *
5728          * The table is updated for ingress Flows only, because
5729          * the egress Flows belong to the different device and
5730          * copy table should be updated in peer NIC Rx domain.
5731          */
5732         if (attr->ingress &&
5733             (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
5734                 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
5735                 if (ret)
5736                         goto error;
5737         }
5738         /*
5739          * If the flow is external (from application) OR device is started,
5740          * OR mreg discover, then apply immediately.
5741          */
5742         if (external || dev->data->dev_started ||
5743             (attr->group == MLX5_FLOW_MREG_CP_TABLE_GROUP &&
5744              attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)) {
5745                 ret = flow_drv_apply(dev, flow, error);
5746                 if (ret < 0)
5747                         goto error;
5748         }
5749         if (list) {
5750                 rte_spinlock_lock(&priv->flow_list_lock);
5751                 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list, idx,
5752                              flow, next);
5753                 rte_spinlock_unlock(&priv->flow_list_lock);
5754         }
5755         flow_rxq_flags_set(dev, flow);
5756         rte_free(translated_actions);
5757         tunnel = flow_tunnel_from_rule(dev, attr, items, actions);
5758         if (tunnel) {
5759                 flow->tunnel = 1;
5760                 flow->tunnel_id = tunnel->tunnel_id;
5761                 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED);
5762                 mlx5_free(default_miss_ctx.queue);
5763         }
5764         mlx5_flow_pop_thread_workspace();
5765         return idx;
5766 error:
5767         MLX5_ASSERT(flow);
5768         ret = rte_errno; /* Save rte_errno before cleanup. */
5769         flow_mreg_del_copy_action(dev, flow);
5770         flow_drv_destroy(dev, flow);
5771         if (rss_desc->shared_rss)
5772                 __atomic_sub_fetch(&((struct mlx5_shared_action_rss *)
5773                         mlx5_ipool_get
5774                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
5775                         rss_desc->shared_rss))->refcnt, 1, __ATOMIC_RELAXED);
5776         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], idx);
5777         rte_errno = ret; /* Restore rte_errno. */
5778         ret = rte_errno;
5779         rte_errno = ret;
5780         mlx5_flow_pop_thread_workspace();
5781 error_before_hairpin_split:
5782         rte_free(translated_actions);
5783         return 0;
5784 }
5785
5786 /**
5787  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
5788  * incoming packets to table 1.
5789  *
5790  * Other flow rules, requested for group n, will be created in
5791  * e-switch table n+1.
5792  * Jump action to e-switch group n will be created to group n+1.
5793  *
5794  * Used when working in switchdev mode, to utilise advantages of table 1
5795  * and above.
5796  *
5797  * @param dev
5798  *   Pointer to Ethernet device.
5799  *
5800  * @return
5801  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
5802  */
5803 struct rte_flow *
5804 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
5805 {
5806         const struct rte_flow_attr attr = {
5807                 .group = 0,
5808                 .priority = 0,
5809                 .ingress = 1,
5810                 .egress = 0,
5811                 .transfer = 1,
5812         };
5813         const struct rte_flow_item pattern = {
5814                 .type = RTE_FLOW_ITEM_TYPE_END,
5815         };
5816         struct rte_flow_action_jump jump = {
5817                 .group = 1,
5818         };
5819         const struct rte_flow_action actions[] = {
5820                 {
5821                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
5822                         .conf = &jump,
5823                 },
5824                 {
5825                         .type = RTE_FLOW_ACTION_TYPE_END,
5826                 },
5827         };
5828         struct mlx5_priv *priv = dev->data->dev_private;
5829         struct rte_flow_error error;
5830
5831         return (void *)(uintptr_t)flow_list_create(dev, &priv->ctrl_flows,
5832                                                    &attr, &pattern,
5833                                                    actions, false, &error);
5834 }
5835
5836 /**
5837  * Validate a flow supported by the NIC.
5838  *
5839  * @see rte_flow_validate()
5840  * @see rte_flow_ops
5841  */
5842 int
5843 mlx5_flow_validate(struct rte_eth_dev *dev,
5844                    const struct rte_flow_attr *attr,
5845                    const struct rte_flow_item items[],
5846                    const struct rte_flow_action original_actions[],
5847                    struct rte_flow_error *error)
5848 {
5849         int hairpin_flow;
5850         struct mlx5_translated_shared_action
5851                 shared_actions[MLX5_MAX_SHARED_ACTIONS];
5852         int shared_actions_n = MLX5_MAX_SHARED_ACTIONS;
5853         const struct rte_flow_action *actions;
5854         struct rte_flow_action *translated_actions = NULL;
5855         int ret = flow_shared_actions_translate(dev, original_actions,
5856                                                 shared_actions,
5857                                                 &shared_actions_n,
5858                                                 &translated_actions, error);
5859
5860         if (ret)
5861                 return ret;
5862         actions = translated_actions ? translated_actions : original_actions;
5863         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
5864         ret = flow_drv_validate(dev, attr, items, actions,
5865                                 true, hairpin_flow, error);
5866         rte_free(translated_actions);
5867         return ret;
5868 }
5869
5870 /**
5871  * Create a flow.
5872  *
5873  * @see rte_flow_create()
5874  * @see rte_flow_ops
5875  */
5876 struct rte_flow *
5877 mlx5_flow_create(struct rte_eth_dev *dev,
5878                  const struct rte_flow_attr *attr,
5879                  const struct rte_flow_item items[],
5880                  const struct rte_flow_action actions[],
5881                  struct rte_flow_error *error)
5882 {
5883         struct mlx5_priv *priv = dev->data->dev_private;
5884
5885         /*
5886          * If the device is not started yet, it is not allowed to created a
5887          * flow from application. PMD default flows and traffic control flows
5888          * are not affected.
5889          */
5890         if (unlikely(!dev->data->dev_started)) {
5891                 DRV_LOG(DEBUG, "port %u is not started when "
5892                         "inserting a flow", dev->data->port_id);
5893                 rte_flow_error_set(error, ENODEV,
5894                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5895                                    NULL,
5896                                    "port not started");
5897                 return NULL;
5898         }
5899
5900         return (void *)(uintptr_t)flow_list_create(dev, &priv->flows,
5901                                   attr, items, actions, true, error);
5902 }
5903
5904 /**
5905  * Destroy a flow in a list.
5906  *
5907  * @param dev
5908  *   Pointer to Ethernet device.
5909  * @param list
5910  *   Pointer to the Indexed flow list. If this parameter NULL,
5911  *   there is no flow removal from the list. Be noted that as
5912  *   flow is add to the indexed list, memory of the indexed
5913  *   list points to maybe changed as flow destroyed.
5914  * @param[in] flow_idx
5915  *   Index of flow to destroy.
5916  */
5917 static void
5918 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
5919                   uint32_t flow_idx)
5920 {
5921         struct mlx5_priv *priv = dev->data->dev_private;
5922         struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
5923                                                [MLX5_IPOOL_RTE_FLOW], flow_idx);
5924
5925         if (!flow)
5926                 return;
5927         /*
5928          * Update RX queue flags only if port is started, otherwise it is
5929          * already clean.
5930          */
5931         if (dev->data->dev_started)
5932                 flow_rxq_flags_trim(dev, flow);
5933         flow_drv_destroy(dev, flow);
5934         if (list) {
5935                 rte_spinlock_lock(&priv->flow_list_lock);
5936                 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list,
5937                              flow_idx, flow, next);
5938                 rte_spinlock_unlock(&priv->flow_list_lock);
5939         }
5940         if (flow->tunnel) {
5941                 struct mlx5_flow_tunnel *tunnel;
5942
5943                 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id);
5944                 RTE_VERIFY(tunnel);
5945                 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
5946                         mlx5_flow_tunnel_free(dev, tunnel);
5947         }
5948         flow_mreg_del_copy_action(dev, flow);
5949         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], flow_idx);
5950 }
5951
5952 /**
5953  * Destroy all flows.
5954  *
5955  * @param dev
5956  *   Pointer to Ethernet device.
5957  * @param list
5958  *   Pointer to the Indexed flow list.
5959  * @param active
5960  *   If flushing is called avtively.
5961  */
5962 void
5963 mlx5_flow_list_flush(struct rte_eth_dev *dev, uint32_t *list, bool active)
5964 {
5965         uint32_t num_flushed = 0;
5966
5967         while (*list) {
5968                 flow_list_destroy(dev, list, *list);
5969                 num_flushed++;
5970         }
5971         if (active) {
5972                 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
5973                         dev->data->port_id, num_flushed);
5974         }
5975 }
5976
5977 /**
5978  * Stop all default actions for flows.
5979  *
5980  * @param dev
5981  *   Pointer to Ethernet device.
5982  */
5983 void
5984 mlx5_flow_stop_default(struct rte_eth_dev *dev)
5985 {
5986         flow_mreg_del_default_copy_action(dev);
5987         flow_rxq_flags_clear(dev);
5988 }
5989
5990 /**
5991  * Start all default actions for flows.
5992  *
5993  * @param dev
5994  *   Pointer to Ethernet device.
5995  * @return
5996  *   0 on success, a negative errno value otherwise and rte_errno is set.
5997  */
5998 int
5999 mlx5_flow_start_default(struct rte_eth_dev *dev)
6000 {
6001         struct rte_flow_error error;
6002
6003         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
6004         return flow_mreg_add_default_copy_action(dev, &error);
6005 }
6006
6007 /**
6008  * Release key of thread specific flow workspace data.
6009  */
6010 void
6011 flow_release_workspace(void *data)
6012 {
6013         struct mlx5_flow_workspace *wks = data;
6014         struct mlx5_flow_workspace *next;
6015
6016         while (wks) {
6017                 next = wks->next;
6018                 free(wks->rss_desc.queue);
6019                 free(wks);
6020                 wks = next;
6021         }
6022 }
6023
6024 /**
6025  * Get thread specific current flow workspace.
6026  *
6027  * @return pointer to thread specific flow workspace data, NULL on error.
6028  */
6029 struct mlx5_flow_workspace*
6030 mlx5_flow_get_thread_workspace(void)
6031 {
6032         struct mlx5_flow_workspace *data;
6033
6034         data = mlx5_flow_os_get_specific_workspace();
6035         MLX5_ASSERT(data && data->inuse);
6036         if (!data || !data->inuse)
6037                 DRV_LOG(ERR, "flow workspace not initialized.");
6038         return data;
6039 }
6040
6041 /**
6042  * Allocate and init new flow workspace.
6043  *
6044  * @return pointer to flow workspace data, NULL on error.
6045  */
6046 static struct mlx5_flow_workspace*
6047 flow_alloc_thread_workspace(void)
6048 {
6049         struct mlx5_flow_workspace *data = calloc(1, sizeof(*data));
6050
6051         if (!data) {
6052                 DRV_LOG(ERR, "Failed to allocate flow workspace "
6053                         "memory.");
6054                 return NULL;
6055         }
6056         data->rss_desc.queue = calloc(1,
6057                         sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM);
6058         if (!data->rss_desc.queue)
6059                 goto err;
6060         data->rssq_num = MLX5_RSSQ_DEFAULT_NUM;
6061         return data;
6062 err:
6063         if (data->rss_desc.queue)
6064                 free(data->rss_desc.queue);
6065         free(data);
6066         return NULL;
6067 }
6068
6069 /**
6070  * Get new thread specific flow workspace.
6071  *
6072  * If current workspace inuse, create new one and set as current.
6073  *
6074  * @return pointer to thread specific flow workspace data, NULL on error.
6075  */
6076 static struct mlx5_flow_workspace*
6077 mlx5_flow_push_thread_workspace(void)
6078 {
6079         struct mlx5_flow_workspace *curr;
6080         struct mlx5_flow_workspace *data;
6081
6082         curr = mlx5_flow_os_get_specific_workspace();
6083         if (!curr) {
6084                 data = flow_alloc_thread_workspace();
6085                 if (!data)
6086                         return NULL;
6087         } else if (!curr->inuse) {
6088                 data = curr;
6089         } else if (curr->next) {
6090                 data = curr->next;
6091         } else {
6092                 data = flow_alloc_thread_workspace();
6093                 if (!data)
6094                         return NULL;
6095                 curr->next = data;
6096                 data->prev = curr;
6097         }
6098         data->inuse = 1;
6099         data->flow_idx = 0;
6100         /* Set as current workspace */
6101         if (mlx5_flow_os_set_specific_workspace(data))
6102                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6103         return data;
6104 }
6105
6106 /**
6107  * Close current thread specific flow workspace.
6108  *
6109  * If previous workspace available, set it as current.
6110  *
6111  * @return pointer to thread specific flow workspace data, NULL on error.
6112  */
6113 static void
6114 mlx5_flow_pop_thread_workspace(void)
6115 {
6116         struct mlx5_flow_workspace *data = mlx5_flow_get_thread_workspace();
6117
6118         if (!data)
6119                 return;
6120         if (!data->inuse) {
6121                 DRV_LOG(ERR, "Failed to close unused flow workspace.");
6122                 return;
6123         }
6124         data->inuse = 0;
6125         if (!data->prev)
6126                 return;
6127         if (mlx5_flow_os_set_specific_workspace(data->prev))
6128                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6129 }
6130
6131 /**
6132  * Verify the flow list is empty
6133  *
6134  * @param dev
6135  *  Pointer to Ethernet device.
6136  *
6137  * @return the number of flows not released.
6138  */
6139 int
6140 mlx5_flow_verify(struct rte_eth_dev *dev)
6141 {
6142         struct mlx5_priv *priv = dev->data->dev_private;
6143         struct rte_flow *flow;
6144         uint32_t idx;
6145         int ret = 0;
6146
6147         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], priv->flows, idx,
6148                       flow, next) {
6149                 DRV_LOG(DEBUG, "port %u flow %p still referenced",
6150                         dev->data->port_id, (void *)flow);
6151                 ++ret;
6152         }
6153         return ret;
6154 }
6155
6156 /**
6157  * Enable default hairpin egress flow.
6158  *
6159  * @param dev
6160  *   Pointer to Ethernet device.
6161  * @param queue
6162  *   The queue index.
6163  *
6164  * @return
6165  *   0 on success, a negative errno value otherwise and rte_errno is set.
6166  */
6167 int
6168 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
6169                             uint32_t queue)
6170 {
6171         struct mlx5_priv *priv = dev->data->dev_private;
6172         const struct rte_flow_attr attr = {
6173                 .egress = 1,
6174                 .priority = 0,
6175         };
6176         struct mlx5_rte_flow_item_tx_queue queue_spec = {
6177                 .queue = queue,
6178         };
6179         struct mlx5_rte_flow_item_tx_queue queue_mask = {
6180                 .queue = UINT32_MAX,
6181         };
6182         struct rte_flow_item items[] = {
6183                 {
6184                         .type = (enum rte_flow_item_type)
6185                                 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
6186                         .spec = &queue_spec,
6187                         .last = NULL,
6188                         .mask = &queue_mask,
6189                 },
6190                 {
6191                         .type = RTE_FLOW_ITEM_TYPE_END,
6192                 },
6193         };
6194         struct rte_flow_action_jump jump = {
6195                 .group = MLX5_HAIRPIN_TX_TABLE,
6196         };
6197         struct rte_flow_action actions[2];
6198         uint32_t flow_idx;
6199         struct rte_flow_error error;
6200
6201         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
6202         actions[0].conf = &jump;
6203         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
6204         flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6205                                 &attr, items, actions, false, &error);
6206         if (!flow_idx) {
6207                 DRV_LOG(DEBUG,
6208                         "Failed to create ctrl flow: rte_errno(%d),"
6209                         " type(%d), message(%s)",
6210                         rte_errno, error.type,
6211                         error.message ? error.message : " (no stated reason)");
6212                 return -rte_errno;
6213         }
6214         return 0;
6215 }
6216
6217 /**
6218  * Enable a control flow configured from the control plane.
6219  *
6220  * @param dev
6221  *   Pointer to Ethernet device.
6222  * @param eth_spec
6223  *   An Ethernet flow spec to apply.
6224  * @param eth_mask
6225  *   An Ethernet flow mask to apply.
6226  * @param vlan_spec
6227  *   A VLAN flow spec to apply.
6228  * @param vlan_mask
6229  *   A VLAN flow mask to apply.
6230  *
6231  * @return
6232  *   0 on success, a negative errno value otherwise and rte_errno is set.
6233  */
6234 int
6235 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
6236                     struct rte_flow_item_eth *eth_spec,
6237                     struct rte_flow_item_eth *eth_mask,
6238                     struct rte_flow_item_vlan *vlan_spec,
6239                     struct rte_flow_item_vlan *vlan_mask)
6240 {
6241         struct mlx5_priv *priv = dev->data->dev_private;
6242         const struct rte_flow_attr attr = {
6243                 .ingress = 1,
6244                 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
6245         };
6246         struct rte_flow_item items[] = {
6247                 {
6248                         .type = RTE_FLOW_ITEM_TYPE_ETH,
6249                         .spec = eth_spec,
6250                         .last = NULL,
6251                         .mask = eth_mask,
6252                 },
6253                 {
6254                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
6255                                               RTE_FLOW_ITEM_TYPE_END,
6256                         .spec = vlan_spec,
6257                         .last = NULL,
6258                         .mask = vlan_mask,
6259                 },
6260                 {
6261                         .type = RTE_FLOW_ITEM_TYPE_END,
6262                 },
6263         };
6264         uint16_t queue[priv->reta_idx_n];
6265         struct rte_flow_action_rss action_rss = {
6266                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
6267                 .level = 0,
6268                 .types = priv->rss_conf.rss_hf,
6269                 .key_len = priv->rss_conf.rss_key_len,
6270                 .queue_num = priv->reta_idx_n,
6271                 .key = priv->rss_conf.rss_key,
6272                 .queue = queue,
6273         };
6274         struct rte_flow_action actions[] = {
6275                 {
6276                         .type = RTE_FLOW_ACTION_TYPE_RSS,
6277                         .conf = &action_rss,
6278                 },
6279                 {
6280                         .type = RTE_FLOW_ACTION_TYPE_END,
6281                 },
6282         };
6283         uint32_t flow_idx;
6284         struct rte_flow_error error;
6285         unsigned int i;
6286
6287         if (!priv->reta_idx_n || !priv->rxqs_n) {
6288                 return 0;
6289         }
6290         if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
6291                 action_rss.types = 0;
6292         for (i = 0; i != priv->reta_idx_n; ++i)
6293                 queue[i] = (*priv->reta_idx)[i];
6294         flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6295                                 &attr, items, actions, false, &error);
6296         if (!flow_idx)
6297                 return -rte_errno;
6298         return 0;
6299 }
6300
6301 /**
6302  * Enable a flow control configured from the control plane.
6303  *
6304  * @param dev
6305  *   Pointer to Ethernet device.
6306  * @param eth_spec
6307  *   An Ethernet flow spec to apply.
6308  * @param eth_mask
6309  *   An Ethernet flow mask to apply.
6310  *
6311  * @return
6312  *   0 on success, a negative errno value otherwise and rte_errno is set.
6313  */
6314 int
6315 mlx5_ctrl_flow(struct rte_eth_dev *dev,
6316                struct rte_flow_item_eth *eth_spec,
6317                struct rte_flow_item_eth *eth_mask)
6318 {
6319         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
6320 }
6321
6322 /**
6323  * Create default miss flow rule matching lacp traffic
6324  *
6325  * @param dev
6326  *   Pointer to Ethernet device.
6327  * @param eth_spec
6328  *   An Ethernet flow spec to apply.
6329  *
6330  * @return
6331  *   0 on success, a negative errno value otherwise and rte_errno is set.
6332  */
6333 int
6334 mlx5_flow_lacp_miss(struct rte_eth_dev *dev)
6335 {
6336         struct mlx5_priv *priv = dev->data->dev_private;
6337         /*
6338          * The LACP matching is done by only using ether type since using
6339          * a multicast dst mac causes kernel to give low priority to this flow.
6340          */
6341         static const struct rte_flow_item_eth lacp_spec = {
6342                 .type = RTE_BE16(0x8809),
6343         };
6344         static const struct rte_flow_item_eth lacp_mask = {
6345                 .type = 0xffff,
6346         };
6347         const struct rte_flow_attr attr = {
6348                 .ingress = 1,
6349         };
6350         struct rte_flow_item items[] = {
6351                 {
6352                         .type = RTE_FLOW_ITEM_TYPE_ETH,
6353                         .spec = &lacp_spec,
6354                         .mask = &lacp_mask,
6355                 },
6356                 {
6357                         .type = RTE_FLOW_ITEM_TYPE_END,
6358                 },
6359         };
6360         struct rte_flow_action actions[] = {
6361                 {
6362                         .type = (enum rte_flow_action_type)
6363                                 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS,
6364                 },
6365                 {
6366                         .type = RTE_FLOW_ACTION_TYPE_END,
6367                 },
6368         };
6369         struct rte_flow_error error;
6370         uint32_t flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6371                                 &attr, items, actions, false, &error);
6372
6373         if (!flow_idx)
6374                 return -rte_errno;
6375         return 0;
6376 }
6377
6378 /**
6379  * Destroy a flow.
6380  *
6381  * @see rte_flow_destroy()
6382  * @see rte_flow_ops
6383  */
6384 int
6385 mlx5_flow_destroy(struct rte_eth_dev *dev,
6386                   struct rte_flow *flow,
6387                   struct rte_flow_error *error __rte_unused)
6388 {
6389         struct mlx5_priv *priv = dev->data->dev_private;
6390
6391         flow_list_destroy(dev, &priv->flows, (uintptr_t)(void *)flow);
6392         return 0;
6393 }
6394
6395 /**
6396  * Destroy all flows.
6397  *
6398  * @see rte_flow_flush()
6399  * @see rte_flow_ops
6400  */
6401 int
6402 mlx5_flow_flush(struct rte_eth_dev *dev,
6403                 struct rte_flow_error *error __rte_unused)
6404 {
6405         struct mlx5_priv *priv = dev->data->dev_private;
6406
6407         mlx5_flow_list_flush(dev, &priv->flows, false);
6408         return 0;
6409 }
6410
6411 /**
6412  * Isolated mode.
6413  *
6414  * @see rte_flow_isolate()
6415  * @see rte_flow_ops
6416  */
6417 int
6418 mlx5_flow_isolate(struct rte_eth_dev *dev,
6419                   int enable,
6420                   struct rte_flow_error *error)
6421 {
6422         struct mlx5_priv *priv = dev->data->dev_private;
6423
6424         if (dev->data->dev_started) {
6425                 rte_flow_error_set(error, EBUSY,
6426                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6427                                    NULL,
6428                                    "port must be stopped first");
6429                 return -rte_errno;
6430         }
6431         priv->isolated = !!enable;
6432         if (enable)
6433                 dev->dev_ops = &mlx5_dev_ops_isolate;
6434         else
6435                 dev->dev_ops = &mlx5_dev_ops;
6436
6437         dev->rx_descriptor_status = mlx5_rx_descriptor_status;
6438         dev->tx_descriptor_status = mlx5_tx_descriptor_status;
6439
6440         return 0;
6441 }
6442
6443 /**
6444  * Query a flow.
6445  *
6446  * @see rte_flow_query()
6447  * @see rte_flow_ops
6448  */
6449 static int
6450 flow_drv_query(struct rte_eth_dev *dev,
6451                uint32_t flow_idx,
6452                const struct rte_flow_action *actions,
6453                void *data,
6454                struct rte_flow_error *error)
6455 {
6456         struct mlx5_priv *priv = dev->data->dev_private;
6457         const struct mlx5_flow_driver_ops *fops;
6458         struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
6459                                                [MLX5_IPOOL_RTE_FLOW],
6460                                                flow_idx);
6461         enum mlx5_flow_drv_type ftype;
6462
6463         if (!flow) {
6464                 return rte_flow_error_set(error, ENOENT,
6465                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6466                           NULL,
6467                           "invalid flow handle");
6468         }
6469         ftype = flow->drv_type;
6470         MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
6471         fops = flow_get_drv_ops(ftype);
6472
6473         return fops->query(dev, flow, actions, data, error);
6474 }
6475
6476 /**
6477  * Query a flow.
6478  *
6479  * @see rte_flow_query()
6480  * @see rte_flow_ops
6481  */
6482 int
6483 mlx5_flow_query(struct rte_eth_dev *dev,
6484                 struct rte_flow *flow,
6485                 const struct rte_flow_action *actions,
6486                 void *data,
6487                 struct rte_flow_error *error)
6488 {
6489         int ret;
6490
6491         ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data,
6492                              error);
6493         if (ret < 0)
6494                 return ret;
6495         return 0;
6496 }
6497
6498 /**
6499  * Manage filter operations.
6500  *
6501  * @param dev
6502  *   Pointer to Ethernet device structure.
6503  * @param filter_type
6504  *   Filter type.
6505  * @param filter_op
6506  *   Operation to perform.
6507  * @param arg
6508  *   Pointer to operation-specific structure.
6509  *
6510  * @return
6511  *   0 on success, a negative errno value otherwise and rte_errno is set.
6512  */
6513 int
6514 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
6515                      enum rte_filter_type filter_type,
6516                      enum rte_filter_op filter_op,
6517                      void *arg)
6518 {
6519         switch (filter_type) {
6520         case RTE_ETH_FILTER_GENERIC:
6521                 if (filter_op != RTE_ETH_FILTER_GET) {
6522                         rte_errno = EINVAL;
6523                         return -rte_errno;
6524                 }
6525                 *(const void **)arg = &mlx5_flow_ops;
6526                 return 0;
6527         default:
6528                 DRV_LOG(ERR, "port %u filter type (%d) not supported",
6529                         dev->data->port_id, filter_type);
6530                 rte_errno = ENOTSUP;
6531                 return -rte_errno;
6532         }
6533         return 0;
6534 }
6535
6536 /**
6537  * Create the needed meter and suffix tables.
6538  *
6539  * @param[in] dev
6540  *   Pointer to Ethernet device.
6541  * @param[in] fm
6542  *   Pointer to the flow meter.
6543  *
6544  * @return
6545  *   Pointer to table set on success, NULL otherwise.
6546  */
6547 struct mlx5_meter_domains_infos *
6548 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
6549                           const struct mlx5_flow_meter *fm)
6550 {
6551         const struct mlx5_flow_driver_ops *fops;
6552
6553         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6554         return fops->create_mtr_tbls(dev, fm);
6555 }
6556
6557 /**
6558  * Destroy the meter table set.
6559  *
6560  * @param[in] dev
6561  *   Pointer to Ethernet device.
6562  * @param[in] tbl
6563  *   Pointer to the meter table set.
6564  *
6565  * @return
6566  *   0 on success.
6567  */
6568 int
6569 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
6570                            struct mlx5_meter_domains_infos *tbls)
6571 {
6572         const struct mlx5_flow_driver_ops *fops;
6573
6574         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6575         return fops->destroy_mtr_tbls(dev, tbls);
6576 }
6577
6578 /**
6579  * Create policer rules.
6580  *
6581  * @param[in] dev
6582  *   Pointer to Ethernet device.
6583  * @param[in] fm
6584  *   Pointer to flow meter structure.
6585  * @param[in] attr
6586  *   Pointer to flow attributes.
6587  *
6588  * @return
6589  *   0 on success, -1 otherwise.
6590  */
6591 int
6592 mlx5_flow_create_policer_rules(struct rte_eth_dev *dev,
6593                                struct mlx5_flow_meter *fm,
6594                                const struct rte_flow_attr *attr)
6595 {
6596         const struct mlx5_flow_driver_ops *fops;
6597
6598         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6599         return fops->create_policer_rules(dev, fm, attr);
6600 }
6601
6602 /**
6603  * Destroy policer rules.
6604  *
6605  * @param[in] fm
6606  *   Pointer to flow meter structure.
6607  * @param[in] attr
6608  *   Pointer to flow attributes.
6609  *
6610  * @return
6611  *   0 on success, -1 otherwise.
6612  */
6613 int
6614 mlx5_flow_destroy_policer_rules(struct rte_eth_dev *dev,
6615                                 struct mlx5_flow_meter *fm,
6616                                 const struct rte_flow_attr *attr)
6617 {
6618         const struct mlx5_flow_driver_ops *fops;
6619
6620         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6621         return fops->destroy_policer_rules(dev, fm, attr);
6622 }
6623
6624 /**
6625  * Allocate a counter.
6626  *
6627  * @param[in] dev
6628  *   Pointer to Ethernet device structure.
6629  *
6630  * @return
6631  *   Index to allocated counter  on success, 0 otherwise.
6632  */
6633 uint32_t
6634 mlx5_counter_alloc(struct rte_eth_dev *dev)
6635 {
6636         const struct mlx5_flow_driver_ops *fops;
6637         struct rte_flow_attr attr = { .transfer = 0 };
6638
6639         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
6640                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6641                 return fops->counter_alloc(dev);
6642         }
6643         DRV_LOG(ERR,
6644                 "port %u counter allocate is not supported.",
6645                  dev->data->port_id);
6646         return 0;
6647 }
6648
6649 /**
6650  * Free a counter.
6651  *
6652  * @param[in] dev
6653  *   Pointer to Ethernet device structure.
6654  * @param[in] cnt
6655  *   Index to counter to be free.
6656  */
6657 void
6658 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
6659 {
6660         const struct mlx5_flow_driver_ops *fops;
6661         struct rte_flow_attr attr = { .transfer = 0 };
6662
6663         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
6664                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6665                 fops->counter_free(dev, cnt);
6666                 return;
6667         }
6668         DRV_LOG(ERR,
6669                 "port %u counter free is not supported.",
6670                  dev->data->port_id);
6671 }
6672
6673 /**
6674  * Query counter statistics.
6675  *
6676  * @param[in] dev
6677  *   Pointer to Ethernet device structure.
6678  * @param[in] cnt
6679  *   Index to counter to query.
6680  * @param[in] clear
6681  *   Set to clear counter statistics.
6682  * @param[out] pkts
6683  *   The counter hits packets number to save.
6684  * @param[out] bytes
6685  *   The counter hits bytes number to save.
6686  *
6687  * @return
6688  *   0 on success, a negative errno value otherwise.
6689  */
6690 int
6691 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
6692                    bool clear, uint64_t *pkts, uint64_t *bytes)
6693 {
6694         const struct mlx5_flow_driver_ops *fops;
6695         struct rte_flow_attr attr = { .transfer = 0 };
6696
6697         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
6698                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6699                 return fops->counter_query(dev, cnt, clear, pkts, bytes);
6700         }
6701         DRV_LOG(ERR,
6702                 "port %u counter query is not supported.",
6703                  dev->data->port_id);
6704         return -ENOTSUP;
6705 }
6706
6707 /**
6708  * Allocate a new memory for the counter values wrapped by all the needed
6709  * management.
6710  *
6711  * @param[in] sh
6712  *   Pointer to mlx5_dev_ctx_shared object.
6713  *
6714  * @return
6715  *   0 on success, a negative errno value otherwise.
6716  */
6717 static int
6718 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh)
6719 {
6720         struct mlx5_devx_mkey_attr mkey_attr;
6721         struct mlx5_counter_stats_mem_mng *mem_mng;
6722         volatile struct flow_counter_stats *raw_data;
6723         int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES;
6724         int size = (sizeof(struct flow_counter_stats) *
6725                         MLX5_COUNTERS_PER_POOL +
6726                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
6727                         sizeof(struct mlx5_counter_stats_mem_mng);
6728         size_t pgsize = rte_mem_page_size();
6729         uint8_t *mem;
6730         int i;
6731
6732         if (pgsize == (size_t)-1) {
6733                 DRV_LOG(ERR, "Failed to get mem page size");
6734                 rte_errno = ENOMEM;
6735                 return -ENOMEM;
6736         }
6737         mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY);
6738         if (!mem) {
6739                 rte_errno = ENOMEM;
6740                 return -ENOMEM;
6741         }
6742         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
6743         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
6744         mem_mng->umem = mlx5_os_umem_reg(sh->ctx, mem, size,
6745                                                  IBV_ACCESS_LOCAL_WRITE);
6746         if (!mem_mng->umem) {
6747                 rte_errno = errno;
6748                 mlx5_free(mem);
6749                 return -rte_errno;
6750         }
6751         mkey_attr.addr = (uintptr_t)mem;
6752         mkey_attr.size = size;
6753         mkey_attr.umem_id = mlx5_os_get_umem_id(mem_mng->umem);
6754         mkey_attr.pd = sh->pdn;
6755         mkey_attr.log_entity_size = 0;
6756         mkey_attr.pg_access = 0;
6757         mkey_attr.klm_array = NULL;
6758         mkey_attr.klm_num = 0;
6759         mkey_attr.relaxed_ordering_write = sh->cmng.relaxed_ordering_write;
6760         mkey_attr.relaxed_ordering_read = sh->cmng.relaxed_ordering_read;
6761         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
6762         if (!mem_mng->dm) {
6763                 mlx5_os_umem_dereg(mem_mng->umem);
6764                 rte_errno = errno;
6765                 mlx5_free(mem);
6766                 return -rte_errno;
6767         }
6768         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
6769         raw_data = (volatile struct flow_counter_stats *)mem;
6770         for (i = 0; i < raws_n; ++i) {
6771                 mem_mng->raws[i].mem_mng = mem_mng;
6772                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
6773         }
6774         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
6775                 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws,
6776                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i,
6777                                  next);
6778         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
6779         sh->cmng.mem_mng = mem_mng;
6780         return 0;
6781 }
6782
6783 /**
6784  * Set the statistic memory to the new counter pool.
6785  *
6786  * @param[in] sh
6787  *   Pointer to mlx5_dev_ctx_shared object.
6788  * @param[in] pool
6789  *   Pointer to the pool to set the statistic memory.
6790  *
6791  * @return
6792  *   0 on success, a negative errno value otherwise.
6793  */
6794 static int
6795 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh,
6796                                struct mlx5_flow_counter_pool *pool)
6797 {
6798         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
6799         /* Resize statistic memory once used out. */
6800         if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) &&
6801             mlx5_flow_create_counter_stat_mem_mng(sh)) {
6802                 DRV_LOG(ERR, "Cannot resize counter stat mem.");
6803                 return -1;
6804         }
6805         rte_spinlock_lock(&pool->sl);
6806         pool->raw = cmng->mem_mng->raws + pool->index %
6807                     MLX5_CNT_CONTAINER_RESIZE;
6808         rte_spinlock_unlock(&pool->sl);
6809         pool->raw_hw = NULL;
6810         return 0;
6811 }
6812
6813 #define MLX5_POOL_QUERY_FREQ_US 1000000
6814
6815 /**
6816  * Set the periodic procedure for triggering asynchronous batch queries for all
6817  * the counter pools.
6818  *
6819  * @param[in] sh
6820  *   Pointer to mlx5_dev_ctx_shared object.
6821  */
6822 void
6823 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh)
6824 {
6825         uint32_t pools_n, us;
6826
6827         pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED);
6828         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
6829         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
6830         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
6831                 sh->cmng.query_thread_on = 0;
6832                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
6833         } else {
6834                 sh->cmng.query_thread_on = 1;
6835         }
6836 }
6837
6838 /**
6839  * The periodic procedure for triggering asynchronous batch queries for all the
6840  * counter pools. This function is probably called by the host thread.
6841  *
6842  * @param[in] arg
6843  *   The parameter for the alarm process.
6844  */
6845 void
6846 mlx5_flow_query_alarm(void *arg)
6847 {
6848         struct mlx5_dev_ctx_shared *sh = arg;
6849         int ret;
6850         uint16_t pool_index = sh->cmng.pool_index;
6851         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
6852         struct mlx5_flow_counter_pool *pool;
6853         uint16_t n_valid;
6854
6855         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
6856                 goto set_alarm;
6857         rte_spinlock_lock(&cmng->pool_update_sl);
6858         pool = cmng->pools[pool_index];
6859         n_valid = cmng->n_valid;
6860         rte_spinlock_unlock(&cmng->pool_update_sl);
6861         /* Set the statistic memory to the new created pool. */
6862         if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool)))
6863                 goto set_alarm;
6864         if (pool->raw_hw)
6865                 /* There is a pool query in progress. */
6866                 goto set_alarm;
6867         pool->raw_hw =
6868                 LIST_FIRST(&sh->cmng.free_stat_raws);
6869         if (!pool->raw_hw)
6870                 /* No free counter statistics raw memory. */
6871                 goto set_alarm;
6872         /*
6873          * Identify the counters released between query trigger and query
6874          * handle more efficiently. The counter released in this gap period
6875          * should wait for a new round of query as the new arrived packets
6876          * will not be taken into account.
6877          */
6878         pool->query_gen++;
6879         ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0,
6880                                                MLX5_COUNTERS_PER_POOL,
6881                                                NULL, NULL,
6882                                                pool->raw_hw->mem_mng->dm->id,
6883                                                (void *)(uintptr_t)
6884                                                pool->raw_hw->data,
6885                                                sh->devx_comp,
6886                                                (uint64_t)(uintptr_t)pool);
6887         if (ret) {
6888                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
6889                         " %d", pool->min_dcs->id);
6890                 pool->raw_hw = NULL;
6891                 goto set_alarm;
6892         }
6893         LIST_REMOVE(pool->raw_hw, next);
6894         sh->cmng.pending_queries++;
6895         pool_index++;
6896         if (pool_index >= n_valid)
6897                 pool_index = 0;
6898 set_alarm:
6899         sh->cmng.pool_index = pool_index;
6900         mlx5_set_query_alarm(sh);
6901 }
6902
6903 /**
6904  * Check and callback event for new aged flow in the counter pool
6905  *
6906  * @param[in] sh
6907  *   Pointer to mlx5_dev_ctx_shared object.
6908  * @param[in] pool
6909  *   Pointer to Current counter pool.
6910  */
6911 static void
6912 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh,
6913                    struct mlx5_flow_counter_pool *pool)
6914 {
6915         struct mlx5_priv *priv;
6916         struct mlx5_flow_counter *cnt;
6917         struct mlx5_age_info *age_info;
6918         struct mlx5_age_param *age_param;
6919         struct mlx5_counter_stats_raw *cur = pool->raw_hw;
6920         struct mlx5_counter_stats_raw *prev = pool->raw;
6921         const uint64_t curr_time = MLX5_CURR_TIME_SEC;
6922         const uint32_t time_delta = curr_time - pool->time_of_last_age_check;
6923         uint16_t expected = AGE_CANDIDATE;
6924         uint32_t i;
6925
6926         pool->time_of_last_age_check = curr_time;
6927         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
6928                 cnt = MLX5_POOL_GET_CNT(pool, i);
6929                 age_param = MLX5_CNT_TO_AGE(cnt);
6930                 if (__atomic_load_n(&age_param->state,
6931                                     __ATOMIC_RELAXED) != AGE_CANDIDATE)
6932                         continue;
6933                 if (cur->data[i].hits != prev->data[i].hits) {
6934                         __atomic_store_n(&age_param->sec_since_last_hit, 0,
6935                                          __ATOMIC_RELAXED);
6936                         continue;
6937                 }
6938                 if (__atomic_add_fetch(&age_param->sec_since_last_hit,
6939                                        time_delta,
6940                                        __ATOMIC_RELAXED) <= age_param->timeout)
6941                         continue;
6942                 /**
6943                  * Hold the lock first, or if between the
6944                  * state AGE_TMOUT and tailq operation the
6945                  * release happened, the release procedure
6946                  * may delete a non-existent tailq node.
6947                  */
6948                 priv = rte_eth_devices[age_param->port_id].data->dev_private;
6949                 age_info = GET_PORT_AGE_INFO(priv);
6950                 rte_spinlock_lock(&age_info->aged_sl);
6951                 if (__atomic_compare_exchange_n(&age_param->state, &expected,
6952                                                 AGE_TMOUT, false,
6953                                                 __ATOMIC_RELAXED,
6954                                                 __ATOMIC_RELAXED)) {
6955                         TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next);
6956                         MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW);
6957                 }
6958                 rte_spinlock_unlock(&age_info->aged_sl);
6959         }
6960         mlx5_age_event_prepare(sh);
6961 }
6962
6963 /**
6964  * Handler for the HW respond about ready values from an asynchronous batch
6965  * query. This function is probably called by the host thread.
6966  *
6967  * @param[in] sh
6968  *   The pointer to the shared device context.
6969  * @param[in] async_id
6970  *   The Devx async ID.
6971  * @param[in] status
6972  *   The status of the completion.
6973  */
6974 void
6975 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
6976                                   uint64_t async_id, int status)
6977 {
6978         struct mlx5_flow_counter_pool *pool =
6979                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
6980         struct mlx5_counter_stats_raw *raw_to_free;
6981         uint8_t query_gen = pool->query_gen ^ 1;
6982         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
6983         enum mlx5_counter_type cnt_type =
6984                 pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6985                                 MLX5_COUNTER_TYPE_ORIGIN;
6986
6987         if (unlikely(status)) {
6988                 raw_to_free = pool->raw_hw;
6989         } else {
6990                 raw_to_free = pool->raw;
6991                 if (pool->is_aged)
6992                         mlx5_flow_aging_check(sh, pool);
6993                 rte_spinlock_lock(&pool->sl);
6994                 pool->raw = pool->raw_hw;
6995                 rte_spinlock_unlock(&pool->sl);
6996                 /* Be sure the new raw counters data is updated in memory. */
6997                 rte_io_wmb();
6998                 if (!TAILQ_EMPTY(&pool->counters[query_gen])) {
6999                         rte_spinlock_lock(&cmng->csl[cnt_type]);
7000                         TAILQ_CONCAT(&cmng->counters[cnt_type],
7001                                      &pool->counters[query_gen], next);
7002                         rte_spinlock_unlock(&cmng->csl[cnt_type]);
7003                 }
7004         }
7005         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
7006         pool->raw_hw = NULL;
7007         sh->cmng.pending_queries--;
7008 }
7009
7010 static int
7011 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table,
7012                     const struct flow_grp_info *grp_info,
7013                     struct rte_flow_error *error)
7014 {
7015         if (grp_info->transfer && grp_info->external &&
7016             grp_info->fdb_def_rule) {
7017                 if (group == UINT32_MAX)
7018                         return rte_flow_error_set
7019                                                 (error, EINVAL,
7020                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
7021                                                  NULL,
7022                                                  "group index not supported");
7023                 *table = group + 1;
7024         } else {
7025                 *table = group;
7026         }
7027         DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table);
7028         return 0;
7029 }
7030
7031 /**
7032  * Translate the rte_flow group index to HW table value.
7033  *
7034  * If tunnel offload is disabled, all group ids converted to flow table
7035  * id using the standard method.
7036  * If tunnel offload is enabled, group id can be converted using the
7037  * standard or tunnel conversion method. Group conversion method
7038  * selection depends on flags in `grp_info` parameter:
7039  * - Internal (grp_info.external == 0) groups conversion uses the
7040  *   standard method.
7041  * - Group ids in JUMP action converted with the tunnel conversion.
7042  * - Group id in rule attribute conversion depends on a rule type and
7043  *   group id value:
7044  *   ** non zero group attributes converted with the tunnel method
7045  *   ** zero group attribute in non-tunnel rule is converted using the
7046  *      standard method - there's only one root table
7047  *   ** zero group attribute in steer tunnel rule is converted with the
7048  *      standard method - single root table
7049  *   ** zero group attribute in match tunnel rule is a special OvS
7050  *      case: that value is used for portability reasons. That group
7051  *      id is converted with the tunnel conversion method.
7052  *
7053  * @param[in] dev
7054  *   Port device
7055  * @param[in] tunnel
7056  *   PMD tunnel offload object
7057  * @param[in] group
7058  *   rte_flow group index value.
7059  * @param[out] table
7060  *   HW table value.
7061  * @param[in] grp_info
7062  *   flags used for conversion
7063  * @param[out] error
7064  *   Pointer to error structure.
7065  *
7066  * @return
7067  *   0 on success, a negative errno value otherwise and rte_errno is set.
7068  */
7069 int
7070 mlx5_flow_group_to_table(struct rte_eth_dev *dev,
7071                          const struct mlx5_flow_tunnel *tunnel,
7072                          uint32_t group, uint32_t *table,
7073                          const struct flow_grp_info *grp_info,
7074                          struct rte_flow_error *error)
7075 {
7076         int ret;
7077         bool standard_translation;
7078
7079         if (!grp_info->skip_scale && grp_info->external &&
7080             group < MLX5_MAX_TABLES_EXTERNAL)
7081                 group *= MLX5_FLOW_TABLE_FACTOR;
7082         if (is_tunnel_offload_active(dev)) {
7083                 standard_translation = !grp_info->external ||
7084                                         grp_info->std_tbl_fix;
7085         } else {
7086                 standard_translation = true;
7087         }
7088         DRV_LOG(DEBUG,
7089                 "port %u group=%u transfer=%d external=%d fdb_def_rule=%d translate=%s",
7090                 dev->data->port_id, group, grp_info->transfer,
7091                 grp_info->external, grp_info->fdb_def_rule,
7092                 standard_translation ? "STANDARD" : "TUNNEL");
7093         if (standard_translation)
7094                 ret = flow_group_to_table(dev->data->port_id, group, table,
7095                                           grp_info, error);
7096         else
7097                 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group,
7098                                                       table, error);
7099
7100         return ret;
7101 }
7102
7103 /**
7104  * Discover availability of metadata reg_c's.
7105  *
7106  * Iteratively use test flows to check availability.
7107  *
7108  * @param[in] dev
7109  *   Pointer to the Ethernet device structure.
7110  *
7111  * @return
7112  *   0 on success, a negative errno value otherwise and rte_errno is set.
7113  */
7114 int
7115 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
7116 {
7117         struct mlx5_priv *priv = dev->data->dev_private;
7118         struct mlx5_dev_config *config = &priv->config;
7119         enum modify_reg idx;
7120         int n = 0;
7121
7122         /* reg_c[0] and reg_c[1] are reserved. */
7123         config->flow_mreg_c[n++] = REG_C_0;
7124         config->flow_mreg_c[n++] = REG_C_1;
7125         /* Discover availability of other reg_c's. */
7126         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
7127                 struct rte_flow_attr attr = {
7128                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
7129                         .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
7130                         .ingress = 1,
7131                 };
7132                 struct rte_flow_item items[] = {
7133                         [0] = {
7134                                 .type = RTE_FLOW_ITEM_TYPE_END,
7135                         },
7136                 };
7137                 struct rte_flow_action actions[] = {
7138                         [0] = {
7139                                 .type = (enum rte_flow_action_type)
7140                                         MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
7141                                 .conf = &(struct mlx5_flow_action_copy_mreg){
7142                                         .src = REG_C_1,
7143                                         .dst = idx,
7144                                 },
7145                         },
7146                         [1] = {
7147                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
7148                                 .conf = &(struct rte_flow_action_jump){
7149                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
7150                                 },
7151                         },
7152                         [2] = {
7153                                 .type = RTE_FLOW_ACTION_TYPE_END,
7154                         },
7155                 };
7156                 uint32_t flow_idx;
7157                 struct rte_flow *flow;
7158                 struct rte_flow_error error;
7159
7160                 if (!config->dv_flow_en)
7161                         break;
7162                 /* Create internal flow, validation skips copy action. */
7163                 flow_idx = flow_list_create(dev, NULL, &attr, items,
7164                                             actions, false, &error);
7165                 flow = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW],
7166                                       flow_idx);
7167                 if (!flow)
7168                         continue;
7169                 config->flow_mreg_c[n++] = idx;
7170                 flow_list_destroy(dev, NULL, flow_idx);
7171         }
7172         for (; n < MLX5_MREG_C_NUM; ++n)
7173                 config->flow_mreg_c[n] = REG_NON;
7174         return 0;
7175 }
7176
7177 /**
7178  * Dump flow raw hw data to file
7179  *
7180  * @param[in] dev
7181  *    The pointer to Ethernet device.
7182  * @param[in] file
7183  *   A pointer to a file for output.
7184  * @param[out] error
7185  *   Perform verbose error reporting if not NULL. PMDs initialize this
7186  *   structure in case of error only.
7187  * @return
7188  *   0 on success, a nagative value otherwise.
7189  */
7190 int
7191 mlx5_flow_dev_dump(struct rte_eth_dev *dev,
7192                    FILE *file,
7193                    struct rte_flow_error *error __rte_unused)
7194 {
7195         struct mlx5_priv *priv = dev->data->dev_private;
7196         struct mlx5_dev_ctx_shared *sh = priv->sh;
7197
7198         if (!priv->config.dv_flow_en) {
7199                 if (fputs("device dv flow disabled\n", file) <= 0)
7200                         return -errno;
7201                 return -ENOTSUP;
7202         }
7203         return mlx5_devx_cmd_flow_dump(sh->fdb_domain, sh->rx_domain,
7204                                        sh->tx_domain, file);
7205 }
7206
7207 /**
7208  * Get aged-out flows.
7209  *
7210  * @param[in] dev
7211  *   Pointer to the Ethernet device structure.
7212  * @param[in] context
7213  *   The address of an array of pointers to the aged-out flows contexts.
7214  * @param[in] nb_countexts
7215  *   The length of context array pointers.
7216  * @param[out] error
7217  *   Perform verbose error reporting if not NULL. Initialized in case of
7218  *   error only.
7219  *
7220  * @return
7221  *   how many contexts get in success, otherwise negative errno value.
7222  *   if nb_contexts is 0, return the amount of all aged contexts.
7223  *   if nb_contexts is not 0 , return the amount of aged flows reported
7224  *   in the context array.
7225  */
7226 int
7227 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
7228                         uint32_t nb_contexts, struct rte_flow_error *error)
7229 {
7230         const struct mlx5_flow_driver_ops *fops;
7231         struct rte_flow_attr attr = { .transfer = 0 };
7232
7233         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7234                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7235                 return fops->get_aged_flows(dev, contexts, nb_contexts,
7236                                                     error);
7237         }
7238         DRV_LOG(ERR,
7239                 "port %u get aged flows is not supported.",
7240                  dev->data->port_id);
7241         return -ENOTSUP;
7242 }
7243
7244 /* Wrapper for driver action_validate op callback */
7245 static int
7246 flow_drv_action_validate(struct rte_eth_dev *dev,
7247                          const struct rte_flow_shared_action_conf *conf,
7248                          const struct rte_flow_action *action,
7249                          const struct mlx5_flow_driver_ops *fops,
7250                          struct rte_flow_error *error)
7251 {
7252         static const char err_msg[] = "shared action validation unsupported";
7253
7254         if (!fops->action_validate) {
7255                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7256                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7257                                    NULL, err_msg);
7258                 return -rte_errno;
7259         }
7260         return fops->action_validate(dev, conf, action, error);
7261 }
7262
7263 /**
7264  * Destroys the shared action by handle.
7265  *
7266  * @param dev
7267  *   Pointer to Ethernet device structure.
7268  * @param[in] action
7269  *   Handle for the shared action to be destroyed.
7270  * @param[out] error
7271  *   Perform verbose error reporting if not NULL. PMDs initialize this
7272  *   structure in case of error only.
7273  *
7274  * @return
7275  *   0 on success, a negative errno value otherwise and rte_errno is set.
7276  *
7277  * @note: wrapper for driver action_create op callback.
7278  */
7279 static int
7280 mlx5_shared_action_destroy(struct rte_eth_dev *dev,
7281                            struct rte_flow_shared_action *action,
7282                            struct rte_flow_error *error)
7283 {
7284         static const char err_msg[] = "shared action destruction unsupported";
7285         struct rte_flow_attr attr = { .transfer = 0 };
7286         const struct mlx5_flow_driver_ops *fops =
7287                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7288
7289         if (!fops->action_destroy) {
7290                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7291                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7292                                    NULL, err_msg);
7293                 return -rte_errno;
7294         }
7295         return fops->action_destroy(dev, action, error);
7296 }
7297
7298 /* Wrapper for driver action_destroy op callback */
7299 static int
7300 flow_drv_action_update(struct rte_eth_dev *dev,
7301                        struct rte_flow_shared_action *action,
7302                        const void *action_conf,
7303                        const struct mlx5_flow_driver_ops *fops,
7304                        struct rte_flow_error *error)
7305 {
7306         static const char err_msg[] = "shared action update unsupported";
7307
7308         if (!fops->action_update) {
7309                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7310                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7311                                    NULL, err_msg);
7312                 return -rte_errno;
7313         }
7314         return fops->action_update(dev, action, action_conf, error);
7315 }
7316
7317 /* Wrapper for driver action_destroy op callback */
7318 static int
7319 flow_drv_action_query(struct rte_eth_dev *dev,
7320                       const struct rte_flow_shared_action *action,
7321                       void *data,
7322                       const struct mlx5_flow_driver_ops *fops,
7323                       struct rte_flow_error *error)
7324 {
7325         static const char err_msg[] = "shared action query unsupported";
7326
7327         if (!fops->action_query) {
7328                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7329                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7330                                    NULL, err_msg);
7331                 return -rte_errno;
7332         }
7333         return fops->action_query(dev, action, data, error);
7334 }
7335
7336 /**
7337  * Create shared action for reuse in multiple flow rules.
7338  *
7339  * @param dev
7340  *   Pointer to Ethernet device structure.
7341  * @param[in] action
7342  *   Action configuration for shared action creation.
7343  * @param[out] error
7344  *   Perform verbose error reporting if not NULL. PMDs initialize this
7345  *   structure in case of error only.
7346  * @return
7347  *   A valid handle in case of success, NULL otherwise and rte_errno is set.
7348  */
7349 static struct rte_flow_shared_action *
7350 mlx5_shared_action_create(struct rte_eth_dev *dev,
7351                           const struct rte_flow_shared_action_conf *conf,
7352                           const struct rte_flow_action *action,
7353                           struct rte_flow_error *error)
7354 {
7355         static const char err_msg[] = "shared action creation unsupported";
7356         struct rte_flow_attr attr = { .transfer = 0 };
7357         const struct mlx5_flow_driver_ops *fops =
7358                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7359
7360         if (flow_drv_action_validate(dev, conf, action, fops, error))
7361                 return NULL;
7362         if (!fops->action_create) {
7363                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7364                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7365                                    NULL, err_msg);
7366                 return NULL;
7367         }
7368         return fops->action_create(dev, conf, action, error);
7369 }
7370
7371 /**
7372  * Updates inplace the shared action configuration pointed by *action* handle
7373  * with the configuration provided as *action* argument.
7374  * The update of the shared action configuration effects all flow rules reusing
7375  * the action via handle.
7376  *
7377  * @param dev
7378  *   Pointer to Ethernet device structure.
7379  * @param[in] shared_action
7380  *   Handle for the shared action to be updated.
7381  * @param[in] action
7382  *   Action specification used to modify the action pointed by handle.
7383  *   *action* should be of same type with the action pointed by the *action*
7384  *   handle argument, otherwise considered as invalid.
7385  * @param[out] error
7386  *   Perform verbose error reporting if not NULL. PMDs initialize this
7387  *   structure in case of error only.
7388  *
7389  * @return
7390  *   0 on success, a negative errno value otherwise and rte_errno is set.
7391  */
7392 static int
7393 mlx5_shared_action_update(struct rte_eth_dev *dev,
7394                 struct rte_flow_shared_action *shared_action,
7395                 const struct rte_flow_action *action,
7396                 struct rte_flow_error *error)
7397 {
7398         struct rte_flow_attr attr = { .transfer = 0 };
7399         const struct mlx5_flow_driver_ops *fops =
7400                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7401         int ret;
7402
7403         ret = flow_drv_action_validate(dev, NULL, action, fops, error);
7404         if (ret)
7405                 return ret;
7406         return flow_drv_action_update(dev, shared_action, action->conf, fops,
7407                                       error);
7408 }
7409
7410 /**
7411  * Query the shared action by handle.
7412  *
7413  * This function allows retrieving action-specific data such as counters.
7414  * Data is gathered by special action which may be present/referenced in
7415  * more than one flow rule definition.
7416  *
7417  * \see RTE_FLOW_ACTION_TYPE_COUNT
7418  *
7419  * @param dev
7420  *   Pointer to Ethernet device structure.
7421  * @param[in] action
7422  *   Handle for the shared action to query.
7423  * @param[in, out] data
7424  *   Pointer to storage for the associated query data type.
7425  * @param[out] error
7426  *   Perform verbose error reporting if not NULL. PMDs initialize this
7427  *   structure in case of error only.
7428  *
7429  * @return
7430  *   0 on success, a negative errno value otherwise and rte_errno is set.
7431  */
7432 static int
7433 mlx5_shared_action_query(struct rte_eth_dev *dev,
7434                          const struct rte_flow_shared_action *action,
7435                          void *data,
7436                          struct rte_flow_error *error)
7437 {
7438         struct rte_flow_attr attr = { .transfer = 0 };
7439         const struct mlx5_flow_driver_ops *fops =
7440                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7441
7442         return flow_drv_action_query(dev, action, data, fops, error);
7443 }
7444
7445 /**
7446  * Destroy all shared actions.
7447  *
7448  * @param dev
7449  *   Pointer to Ethernet device.
7450  *
7451  * @return
7452  *   0 on success, a negative errno value otherwise and rte_errno is set.
7453  */
7454 int
7455 mlx5_shared_action_flush(struct rte_eth_dev *dev)
7456 {
7457         struct rte_flow_error error;
7458         struct mlx5_priv *priv = dev->data->dev_private;
7459         struct mlx5_shared_action_rss *shared_rss;
7460         int ret = 0;
7461         uint32_t idx;
7462
7463         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
7464                       priv->rss_shared_actions, idx, shared_rss, next) {
7465                 ret |= mlx5_shared_action_destroy(dev,
7466                        (struct rte_flow_shared_action *)(uintptr_t)idx, &error);
7467         }
7468         return ret;
7469 }
7470
7471 #ifndef HAVE_MLX5DV_DR
7472 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1))
7473 #else
7474 #define MLX5_DOMAIN_SYNC_FLOW \
7475         (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW)
7476 #endif
7477
7478 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
7479 {
7480         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
7481         const struct mlx5_flow_driver_ops *fops;
7482         int ret;
7483         struct rte_flow_attr attr = { .transfer = 0 };
7484
7485         fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7486         ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW);
7487         if (ret > 0)
7488                 ret = -ret;
7489         return ret;
7490 }
7491
7492 /**
7493  * tunnel offload functionalilty is defined for DV environment only
7494  */
7495 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
7496 __extension__
7497 union tunnel_offload_mark {
7498         uint32_t val;
7499         struct {
7500                 uint32_t app_reserve:8;
7501                 uint32_t table_id:15;
7502                 uint32_t transfer:1;
7503                 uint32_t _unused_:8;
7504         };
7505 };
7506
7507 static bool
7508 mlx5_access_tunnel_offload_db
7509         (struct rte_eth_dev *dev,
7510          bool (*match)(struct rte_eth_dev *,
7511                        struct mlx5_flow_tunnel *, const void *),
7512          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
7513          void (*miss)(struct rte_eth_dev *, void *),
7514          void *ctx, bool lock_op);
7515
7516 static int
7517 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
7518                              struct rte_flow *flow,
7519                              const struct rte_flow_attr *attr,
7520                              const struct rte_flow_action *app_actions,
7521                              uint32_t flow_idx,
7522                              struct tunnel_default_miss_ctx *ctx,
7523                              struct rte_flow_error *error)
7524 {
7525         struct mlx5_priv *priv = dev->data->dev_private;
7526         struct mlx5_flow *dev_flow;
7527         struct rte_flow_attr miss_attr = *attr;
7528         const struct mlx5_flow_tunnel *tunnel = app_actions[0].conf;
7529         const struct rte_flow_item miss_items[2] = {
7530                 {
7531                         .type = RTE_FLOW_ITEM_TYPE_ETH,
7532                         .spec = NULL,
7533                         .last = NULL,
7534                         .mask = NULL
7535                 },
7536                 {
7537                         .type = RTE_FLOW_ITEM_TYPE_END,
7538                         .spec = NULL,
7539                         .last = NULL,
7540                         .mask = NULL
7541                 }
7542         };
7543         union tunnel_offload_mark mark_id;
7544         struct rte_flow_action_mark miss_mark;
7545         struct rte_flow_action miss_actions[3] = {
7546                 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark },
7547                 [2] = { .type = RTE_FLOW_ACTION_TYPE_END,  .conf = NULL }
7548         };
7549         const struct rte_flow_action_jump *jump_data;
7550         uint32_t i, flow_table = 0; /* prevent compilation warning */
7551         struct flow_grp_info grp_info = {
7552                 .external = 1,
7553                 .transfer = attr->transfer,
7554                 .fdb_def_rule = !!priv->fdb_def_rule,
7555                 .std_tbl_fix = 0,
7556         };
7557         int ret;
7558
7559         if (!attr->transfer) {
7560                 uint32_t q_size;
7561
7562                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS;
7563                 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]);
7564                 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size,
7565                                          0, SOCKET_ID_ANY);
7566                 if (!ctx->queue)
7567                         return rte_flow_error_set
7568                                 (error, ENOMEM,
7569                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
7570                                 NULL, "invalid default miss RSS");
7571                 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT,
7572                 ctx->action_rss.level = 0,
7573                 ctx->action_rss.types = priv->rss_conf.rss_hf,
7574                 ctx->action_rss.key_len = priv->rss_conf.rss_key_len,
7575                 ctx->action_rss.queue_num = priv->reta_idx_n,
7576                 ctx->action_rss.key = priv->rss_conf.rss_key,
7577                 ctx->action_rss.queue = ctx->queue;
7578                 if (!priv->reta_idx_n || !priv->rxqs_n)
7579                         return rte_flow_error_set
7580                                 (error, EINVAL,
7581                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
7582                                 NULL, "invalid port configuration");
7583                 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
7584                         ctx->action_rss.types = 0;
7585                 for (i = 0; i != priv->reta_idx_n; ++i)
7586                         ctx->queue[i] = (*priv->reta_idx)[i];
7587         } else {
7588                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP;
7589                 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP;
7590         }
7591         miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw;
7592         for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++);
7593         jump_data = app_actions->conf;
7594         miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY;
7595         miss_attr.group = jump_data->group;
7596         ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group,
7597                                        &flow_table, &grp_info, error);
7598         if (ret)
7599                 return rte_flow_error_set(error, EINVAL,
7600                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
7601                                           NULL, "invalid tunnel id");
7602         mark_id.app_reserve = 0;
7603         mark_id.table_id = tunnel_flow_tbl_to_id(flow_table);
7604         mark_id.transfer = !!attr->transfer;
7605         mark_id._unused_ = 0;
7606         miss_mark.id = mark_id.val;
7607         dev_flow = flow_drv_prepare(dev, flow, &miss_attr,
7608                                     miss_items, miss_actions, flow_idx, error);
7609         if (!dev_flow)
7610                 return -rte_errno;
7611         dev_flow->flow = flow;
7612         dev_flow->external = true;
7613         dev_flow->tunnel = tunnel;
7614         /* Subflow object was created, we must include one in the list. */
7615         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
7616                       dev_flow->handle, next);
7617         DRV_LOG(DEBUG,
7618                 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u",
7619                 dev->data->port_id, tunnel->app_tunnel.type,
7620                 tunnel->tunnel_id, miss_attr.priority, miss_attr.group);
7621         ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items,
7622                                   miss_actions, error);
7623         if (!ret)
7624                 ret = flow_mreg_update_copy_table(dev, flow, miss_actions,
7625                                                   error);
7626
7627         return ret;
7628 }
7629
7630 static const struct mlx5_flow_tbl_data_entry  *
7631 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark)
7632 {
7633         struct mlx5_priv *priv = dev->data->dev_private;
7634         struct mlx5_dev_ctx_shared *sh = priv->sh;
7635         struct mlx5_hlist_entry *he;
7636         union tunnel_offload_mark mbits = { .val = mark };
7637         union mlx5_flow_tbl_key table_key = {
7638                 {
7639                         .table_id = tunnel_id_to_flow_tbl(mbits.table_id),
7640                         .dummy = 0,
7641                         .domain = !!mbits.transfer,
7642                         .direction = 0,
7643                 }
7644         };
7645         he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, NULL);
7646         return he ?
7647                container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL;
7648 }
7649
7650 static void
7651 mlx5_flow_tunnel_grp2tbl_remove_cb(struct mlx5_hlist *list,
7652                                    struct mlx5_hlist_entry *entry)
7653 {
7654         struct mlx5_dev_ctx_shared *sh = list->ctx;
7655         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
7656
7657         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
7658                         tunnel_flow_tbl_to_id(tte->flow_table));
7659         mlx5_free(tte);
7660 }
7661
7662 static int
7663 mlx5_flow_tunnel_grp2tbl_match_cb(struct mlx5_hlist *list __rte_unused,
7664                                   struct mlx5_hlist_entry *entry,
7665                                   uint64_t key, void *cb_ctx __rte_unused)
7666 {
7667         union tunnel_tbl_key tbl = {
7668                 .val = key,
7669         };
7670         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
7671
7672         return tbl.tunnel_id != tte->tunnel_id || tbl.group != tte->group;
7673 }
7674
7675 static struct mlx5_hlist_entry *
7676 mlx5_flow_tunnel_grp2tbl_create_cb(struct mlx5_hlist *list, uint64_t key,
7677                                    void *ctx __rte_unused)
7678 {
7679         struct mlx5_dev_ctx_shared *sh = list->ctx;
7680         struct tunnel_tbl_entry *tte;
7681         union tunnel_tbl_key tbl = {
7682                 .val = key,
7683         };
7684
7685         tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
7686                           sizeof(*tte), 0,
7687                           SOCKET_ID_ANY);
7688         if (!tte)
7689                 goto err;
7690         mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
7691                           &tte->flow_table);
7692         if (tte->flow_table >= MLX5_MAX_TABLES) {
7693                 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.",
7694                         tte->flow_table);
7695                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
7696                                 tte->flow_table);
7697                 goto err;
7698         } else if (!tte->flow_table) {
7699                 goto err;
7700         }
7701         tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table);
7702         tte->tunnel_id = tbl.tunnel_id;
7703         tte->group = tbl.group;
7704         return &tte->hash;
7705 err:
7706         if (tte)
7707                 mlx5_free(tte);
7708         return NULL;
7709 }
7710
7711 static uint32_t
7712 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
7713                                 const struct mlx5_flow_tunnel *tunnel,
7714                                 uint32_t group, uint32_t *table,
7715                                 struct rte_flow_error *error)
7716 {
7717         struct mlx5_hlist_entry *he;
7718         struct tunnel_tbl_entry *tte;
7719         union tunnel_tbl_key key = {
7720                 .tunnel_id = tunnel ? tunnel->tunnel_id : 0,
7721                 .group = group
7722         };
7723         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
7724         struct mlx5_hlist *group_hash;
7725
7726         group_hash = tunnel ? tunnel->groups : thub->groups;
7727         he = mlx5_hlist_register(group_hash, key.val, NULL);
7728         if (!he)
7729                 return rte_flow_error_set(error, EINVAL,
7730                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
7731                                           NULL,
7732                                           "tunnel group index not supported");
7733         tte = container_of(he, typeof(*tte), hash);
7734         *table = tte->flow_table;
7735         DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x",
7736                 dev->data->port_id, key.tunnel_id, group, *table);
7737         return 0;
7738 }
7739
7740 static void
7741 mlx5_flow_tunnel_free(struct rte_eth_dev *dev,
7742                       struct mlx5_flow_tunnel *tunnel)
7743 {
7744         struct mlx5_priv *priv = dev->data->dev_private;
7745         struct mlx5_indexed_pool *ipool;
7746
7747         DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x",
7748                 dev->data->port_id, tunnel->tunnel_id);
7749         LIST_REMOVE(tunnel, chain);
7750         mlx5_hlist_destroy(tunnel->groups);
7751         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
7752         mlx5_ipool_free(ipool, tunnel->tunnel_id);
7753 }
7754
7755 static bool
7756 mlx5_access_tunnel_offload_db
7757         (struct rte_eth_dev *dev,
7758          bool (*match)(struct rte_eth_dev *,
7759                        struct mlx5_flow_tunnel *, const void *),
7760          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
7761          void (*miss)(struct rte_eth_dev *, void *),
7762          void *ctx, bool lock_op)
7763 {
7764         bool verdict = false;
7765         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
7766         struct mlx5_flow_tunnel *tunnel;
7767
7768         rte_spinlock_lock(&thub->sl);
7769         LIST_FOREACH(tunnel, &thub->tunnels, chain) {
7770                 verdict = match(dev, tunnel, (const void *)ctx);
7771                 if (verdict)
7772                         break;
7773         }
7774         if (!lock_op)
7775                 rte_spinlock_unlock(&thub->sl);
7776         if (verdict && hit)
7777                 hit(dev, tunnel, ctx);
7778         if (!verdict && miss)
7779                 miss(dev, ctx);
7780         if (lock_op)
7781                 rte_spinlock_unlock(&thub->sl);
7782
7783         return verdict;
7784 }
7785
7786 struct tunnel_db_find_tunnel_id_ctx {
7787         uint32_t tunnel_id;
7788         struct mlx5_flow_tunnel *tunnel;
7789 };
7790
7791 static bool
7792 find_tunnel_id_match(struct rte_eth_dev *dev,
7793                      struct mlx5_flow_tunnel *tunnel, const void *x)
7794 {
7795         const struct tunnel_db_find_tunnel_id_ctx *ctx = x;
7796
7797         RTE_SET_USED(dev);
7798         return tunnel->tunnel_id == ctx->tunnel_id;
7799 }
7800
7801 static void
7802 find_tunnel_id_hit(struct rte_eth_dev *dev,
7803                    struct mlx5_flow_tunnel *tunnel, void *x)
7804 {
7805         struct tunnel_db_find_tunnel_id_ctx *ctx = x;
7806         RTE_SET_USED(dev);
7807         ctx->tunnel = tunnel;
7808 }
7809
7810 static struct mlx5_flow_tunnel *
7811 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id)
7812 {
7813         struct tunnel_db_find_tunnel_id_ctx ctx = {
7814                 .tunnel_id = id,
7815         };
7816
7817         mlx5_access_tunnel_offload_db(dev, find_tunnel_id_match,
7818                                       find_tunnel_id_hit, NULL, &ctx, true);
7819
7820         return ctx.tunnel;
7821 }
7822
7823 static struct mlx5_flow_tunnel *
7824 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev,
7825                           const struct rte_flow_tunnel *app_tunnel)
7826 {
7827         struct mlx5_priv *priv = dev->data->dev_private;
7828         struct mlx5_indexed_pool *ipool;
7829         struct mlx5_flow_tunnel *tunnel;
7830         uint32_t id;
7831
7832         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
7833         tunnel = mlx5_ipool_zmalloc(ipool, &id);
7834         if (!tunnel)
7835                 return NULL;
7836         if (id >= MLX5_MAX_TUNNELS) {
7837                 mlx5_ipool_free(ipool, id);
7838                 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id);
7839                 return NULL;
7840         }
7841         tunnel->groups = mlx5_hlist_create("tunnel groups", 1024, 0, 0,
7842                                            mlx5_flow_tunnel_grp2tbl_create_cb,
7843                                            mlx5_flow_tunnel_grp2tbl_match_cb,
7844                                            mlx5_flow_tunnel_grp2tbl_remove_cb);
7845         if (!tunnel->groups) {
7846                 mlx5_ipool_free(ipool, id);
7847                 return NULL;
7848         }
7849         tunnel->groups->ctx = priv->sh;
7850         /* initiate new PMD tunnel */
7851         memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel));
7852         tunnel->tunnel_id = id;
7853         tunnel->action.type = (typeof(tunnel->action.type))
7854                               MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET;
7855         tunnel->action.conf = tunnel;
7856         tunnel->item.type = (typeof(tunnel->item.type))
7857                             MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL;
7858         tunnel->item.spec = tunnel;
7859         tunnel->item.last = NULL;
7860         tunnel->item.mask = NULL;
7861
7862         DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x",
7863                 dev->data->port_id, tunnel->tunnel_id);
7864
7865         return tunnel;
7866 }
7867
7868 struct tunnel_db_get_tunnel_ctx {
7869         const struct rte_flow_tunnel *app_tunnel;
7870         struct mlx5_flow_tunnel *tunnel;
7871 };
7872
7873 static bool get_tunnel_match(struct rte_eth_dev *dev,
7874                              struct mlx5_flow_tunnel *tunnel, const void *x)
7875 {
7876         const struct tunnel_db_get_tunnel_ctx *ctx = x;
7877
7878         RTE_SET_USED(dev);
7879         return !memcmp(ctx->app_tunnel, &tunnel->app_tunnel,
7880                        sizeof(*ctx->app_tunnel));
7881 }
7882
7883 static void get_tunnel_hit(struct rte_eth_dev *dev,
7884                            struct mlx5_flow_tunnel *tunnel, void *x)
7885 {
7886         /* called under tunnel spinlock protection */
7887         struct tunnel_db_get_tunnel_ctx *ctx = x;
7888
7889         RTE_SET_USED(dev);
7890         tunnel->refctn++;
7891         ctx->tunnel = tunnel;
7892 }
7893
7894 static void get_tunnel_miss(struct rte_eth_dev *dev, void *x)
7895 {
7896         /* called under tunnel spinlock protection */
7897         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
7898         struct tunnel_db_get_tunnel_ctx *ctx = x;
7899
7900         rte_spinlock_unlock(&thub->sl);
7901         ctx->tunnel = mlx5_flow_tunnel_allocate(dev, ctx->app_tunnel);
7902         ctx->tunnel->refctn = 1;
7903         rte_spinlock_lock(&thub->sl);
7904         if (ctx->tunnel)
7905                 LIST_INSERT_HEAD(&thub->tunnels, ctx->tunnel, chain);
7906 }
7907
7908
7909 static int
7910 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
7911                      const struct rte_flow_tunnel *app_tunnel,
7912                      struct mlx5_flow_tunnel **tunnel)
7913 {
7914         struct tunnel_db_get_tunnel_ctx ctx = {
7915                 .app_tunnel = app_tunnel,
7916         };
7917
7918         mlx5_access_tunnel_offload_db(dev, get_tunnel_match, get_tunnel_hit,
7919                                       get_tunnel_miss, &ctx, true);
7920         *tunnel = ctx.tunnel;
7921         return ctx.tunnel ? 0 : -ENOMEM;
7922 }
7923
7924 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id)
7925 {
7926         struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
7927
7928         if (!thub)
7929                 return;
7930         if (!LIST_EMPTY(&thub->tunnels))
7931                 DRV_LOG(WARNING, "port %u tunnels present", port_id);
7932         mlx5_hlist_destroy(thub->groups);
7933         mlx5_free(thub);
7934 }
7935
7936 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh)
7937 {
7938         int err;
7939         struct mlx5_flow_tunnel_hub *thub;
7940
7941         thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub),
7942                            0, SOCKET_ID_ANY);
7943         if (!thub)
7944                 return -ENOMEM;
7945         LIST_INIT(&thub->tunnels);
7946         rte_spinlock_init(&thub->sl);
7947         thub->groups = mlx5_hlist_create("flow groups",
7948                                          rte_align32pow2(MLX5_MAX_TABLES), 0,
7949                                          0, mlx5_flow_tunnel_grp2tbl_create_cb,
7950                                          mlx5_flow_tunnel_grp2tbl_match_cb,
7951                                          mlx5_flow_tunnel_grp2tbl_remove_cb);
7952         if (!thub->groups) {
7953                 err = -rte_errno;
7954                 goto err;
7955         }
7956         thub->groups->ctx = sh;
7957         sh->tunnel_hub = thub;
7958
7959         return 0;
7960
7961 err:
7962         if (thub->groups)
7963                 mlx5_hlist_destroy(thub->groups);
7964         if (thub)
7965                 mlx5_free(thub);
7966         return err;
7967 }
7968
7969 static inline bool
7970 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev,
7971                           struct rte_flow_tunnel *tunnel,
7972                           const char *err_msg)
7973 {
7974         err_msg = NULL;
7975         if (!is_tunnel_offload_active(dev)) {
7976                 err_msg = "tunnel offload was not activated";
7977                 goto out;
7978         } else if (!tunnel) {
7979                 err_msg = "no application tunnel";
7980                 goto out;
7981         }
7982
7983         switch (tunnel->type) {
7984         default:
7985                 err_msg = "unsupported tunnel type";
7986                 goto out;
7987         case RTE_FLOW_ITEM_TYPE_VXLAN:
7988                 break;
7989         }
7990
7991 out:
7992         return !err_msg;
7993 }
7994
7995 static int
7996 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
7997                     struct rte_flow_tunnel *app_tunnel,
7998                     struct rte_flow_action **actions,
7999                     uint32_t *num_of_actions,
8000                     struct rte_flow_error *error)
8001 {
8002         int ret;
8003         struct mlx5_flow_tunnel *tunnel;
8004         const char *err_msg = NULL;
8005         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
8006
8007         if (!verdict)
8008                 return rte_flow_error_set(error, EINVAL,
8009                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
8010                                           err_msg);
8011         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
8012         if (ret < 0) {
8013                 return rte_flow_error_set(error, ret,
8014                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
8015                                           "failed to initialize pmd tunnel");
8016         }
8017         *actions = &tunnel->action;
8018         *num_of_actions = 1;
8019         return 0;
8020 }
8021
8022 static int
8023 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
8024                        struct rte_flow_tunnel *app_tunnel,
8025                        struct rte_flow_item **items,
8026                        uint32_t *num_of_items,
8027                        struct rte_flow_error *error)
8028 {
8029         int ret;
8030         struct mlx5_flow_tunnel *tunnel;
8031         const char *err_msg = NULL;
8032         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
8033
8034         if (!verdict)
8035                 return rte_flow_error_set(error, EINVAL,
8036                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
8037                                           err_msg);
8038         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
8039         if (ret < 0) {
8040                 return rte_flow_error_set(error, ret,
8041                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
8042                                           "failed to initialize pmd tunnel");
8043         }
8044         *items = &tunnel->item;
8045         *num_of_items = 1;
8046         return 0;
8047 }
8048
8049 struct tunnel_db_element_release_ctx {
8050         struct rte_flow_item *items;
8051         struct rte_flow_action *actions;
8052         uint32_t num_elements;
8053         struct rte_flow_error *error;
8054         int ret;
8055 };
8056
8057 static bool
8058 tunnel_element_release_match(struct rte_eth_dev *dev,
8059                              struct mlx5_flow_tunnel *tunnel, const void *x)
8060 {
8061         const struct tunnel_db_element_release_ctx *ctx = x;
8062
8063         RTE_SET_USED(dev);
8064         if (ctx->num_elements != 1)
8065                 return false;
8066         else if (ctx->items)
8067                 return ctx->items == &tunnel->item;
8068         else if (ctx->actions)
8069                 return ctx->actions == &tunnel->action;
8070
8071         return false;
8072 }
8073
8074 static void
8075 tunnel_element_release_hit(struct rte_eth_dev *dev,
8076                            struct mlx5_flow_tunnel *tunnel, void *x)
8077 {
8078         struct tunnel_db_element_release_ctx *ctx = x;
8079         ctx->ret = 0;
8080         if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
8081                 mlx5_flow_tunnel_free(dev, tunnel);
8082 }
8083
8084 static void
8085 tunnel_element_release_miss(struct rte_eth_dev *dev, void *x)
8086 {
8087         struct tunnel_db_element_release_ctx *ctx = x;
8088         RTE_SET_USED(dev);
8089         ctx->ret = rte_flow_error_set(ctx->error, EINVAL,
8090                                       RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
8091                                       "invalid argument");
8092 }
8093
8094 static int
8095 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
8096                        struct rte_flow_item *pmd_items,
8097                        uint32_t num_items, struct rte_flow_error *err)
8098 {
8099         struct tunnel_db_element_release_ctx ctx = {
8100                 .items = pmd_items,
8101                 .actions = NULL,
8102                 .num_elements = num_items,
8103                 .error = err,
8104         };
8105
8106         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
8107                                       tunnel_element_release_hit,
8108                                       tunnel_element_release_miss, &ctx, false);
8109
8110         return ctx.ret;
8111 }
8112
8113 static int
8114 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
8115                          struct rte_flow_action *pmd_actions,
8116                          uint32_t num_actions, struct rte_flow_error *err)
8117 {
8118         struct tunnel_db_element_release_ctx ctx = {
8119                 .items = NULL,
8120                 .actions = pmd_actions,
8121                 .num_elements = num_actions,
8122                 .error = err,
8123         };
8124
8125         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
8126                                       tunnel_element_release_hit,
8127                                       tunnel_element_release_miss, &ctx, false);
8128
8129         return ctx.ret;
8130 }
8131
8132 static int
8133 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
8134                                   struct rte_mbuf *m,
8135                                   struct rte_flow_restore_info *info,
8136                                   struct rte_flow_error *err)
8137 {
8138         uint64_t ol_flags = m->ol_flags;
8139         const struct mlx5_flow_tbl_data_entry *tble;
8140         const uint64_t mask = PKT_RX_FDIR | PKT_RX_FDIR_ID;
8141
8142         if (!is_tunnel_offload_active(dev)) {
8143                 info->flags = 0;
8144                 return 0;
8145         }
8146
8147         if ((ol_flags & mask) != mask)
8148                 goto err;
8149         tble = tunnel_mark_decode(dev, m->hash.fdir.hi);
8150         if (!tble) {
8151                 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x",
8152                         dev->data->port_id, m->hash.fdir.hi);
8153                 goto err;
8154         }
8155         MLX5_ASSERT(tble->tunnel);
8156         memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel));
8157         info->group_id = tble->group_id;
8158         info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL |
8159                       RTE_FLOW_RESTORE_INFO_GROUP_ID |
8160                       RTE_FLOW_RESTORE_INFO_ENCAPSULATED;
8161
8162         return 0;
8163
8164 err:
8165         return rte_flow_error_set(err, EINVAL,
8166                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8167                                   "failed to get restore info");
8168 }
8169
8170 #else /* HAVE_IBV_FLOW_DV_SUPPORT */
8171 static int
8172 mlx5_flow_tunnel_decap_set(__rte_unused struct rte_eth_dev *dev,
8173                            __rte_unused struct rte_flow_tunnel *app_tunnel,
8174                            __rte_unused struct rte_flow_action **actions,
8175                            __rte_unused uint32_t *num_of_actions,
8176                            __rte_unused struct rte_flow_error *error)
8177 {
8178         return -ENOTSUP;
8179 }
8180
8181 static int
8182 mlx5_flow_tunnel_match(__rte_unused struct rte_eth_dev *dev,
8183                        __rte_unused struct rte_flow_tunnel *app_tunnel,
8184                        __rte_unused struct rte_flow_item **items,
8185                        __rte_unused uint32_t *num_of_items,
8186                        __rte_unused struct rte_flow_error *error)
8187 {
8188         return -ENOTSUP;
8189 }
8190
8191 static int
8192 mlx5_flow_tunnel_item_release(__rte_unused struct rte_eth_dev *dev,
8193                               __rte_unused struct rte_flow_item *pmd_items,
8194                               __rte_unused uint32_t num_items,
8195                               __rte_unused struct rte_flow_error *err)
8196 {
8197         return -ENOTSUP;
8198 }
8199
8200 static int
8201 mlx5_flow_tunnel_action_release(__rte_unused struct rte_eth_dev *dev,
8202                                 __rte_unused struct rte_flow_action *pmd_action,
8203                                 __rte_unused uint32_t num_actions,
8204                                 __rte_unused struct rte_flow_error *err)
8205 {
8206         return -ENOTSUP;
8207 }
8208
8209 static int
8210 mlx5_flow_tunnel_get_restore_info(__rte_unused struct rte_eth_dev *dev,
8211                                   __rte_unused struct rte_mbuf *m,
8212                                   __rte_unused struct rte_flow_restore_info *i,
8213                                   __rte_unused struct rte_flow_error *err)
8214 {
8215         return -ENOTSUP;
8216 }
8217
8218 static int
8219 flow_tunnel_add_default_miss(__rte_unused struct rte_eth_dev *dev,
8220                              __rte_unused struct rte_flow *flow,
8221                              __rte_unused const struct rte_flow_attr *attr,
8222                              __rte_unused const struct rte_flow_action *actions,
8223                              __rte_unused uint32_t flow_idx,
8224                              __rte_unused struct tunnel_default_miss_ctx *ctx,
8225                              __rte_unused struct rte_flow_error *error)
8226 {
8227         return -ENOTSUP;
8228 }
8229
8230 static struct mlx5_flow_tunnel *
8231 mlx5_find_tunnel_id(__rte_unused struct rte_eth_dev *dev,
8232                     __rte_unused uint32_t id)
8233 {
8234         return NULL;
8235 }
8236
8237 static void
8238 mlx5_flow_tunnel_free(__rte_unused struct rte_eth_dev *dev,
8239                       __rte_unused struct mlx5_flow_tunnel *tunnel)
8240 {
8241 }
8242
8243 static uint32_t
8244 tunnel_flow_group_to_flow_table(__rte_unused struct rte_eth_dev *dev,
8245                                 __rte_unused const struct mlx5_flow_tunnel *t,
8246                                 __rte_unused uint32_t group,
8247                                 __rte_unused uint32_t *table,
8248                                 struct rte_flow_error *error)
8249 {
8250         return rte_flow_error_set(error, ENOTSUP,
8251                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8252                                   "tunnel offload requires DV support");
8253 }
8254
8255 void
8256 mlx5_release_tunnel_hub(__rte_unused struct mlx5_dev_ctx_shared *sh,
8257                         __rte_unused  uint16_t port_id)
8258 {
8259 }
8260 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
8261