drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <stdbool.h>
  10 #include <sys/queue.h>
  11
  12 #include <rte_common.h>
  13 #include <rte_ether.h>
  14 #include <ethdev_driver.h>
  15 #include <rte_eal_paging.h>
  16 #include <rte_flow.h>
  17 #include <rte_cycles.h>
  18 #include <rte_flow_driver.h>
  19 #include <rte_malloc.h>
  20 #include <rte_ip.h>
  21
  22 #include <mlx5_glue.h>
  23 #include <mlx5_devx_cmds.h>
  24 #include <mlx5_prm.h>
  25 #include <mlx5_malloc.h>
  26
  27 #include "mlx5_defs.h"
  28 #include "mlx5.h"
  29 #include "mlx5_flow.h"
  30 #include "mlx5_flow_os.h"
  31 #include "mlx5_rx.h"
  32 #include "mlx5_tx.h"
  33 #include "mlx5_common_os.h"
  34 #include "rte_pmd_mlx5.h"
  35
  36 struct tunnel_default_miss_ctx {
  37         uint16_t *queue;
  38         __extension__
  39         union {
  40                 struct rte_flow_action_rss action_rss;
  41                 struct rte_flow_action_queue miss_queue;
  42                 struct rte_flow_action_jump miss_jump;
  43                 uint8_t raw[0];
  44         };
  45 };
  46
  47 static int
  48 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
  49                              struct rte_flow *flow,
  50                              const struct rte_flow_attr *attr,
  51                              const struct rte_flow_action *app_actions,
  52                              uint32_t flow_idx,
  53                              const struct mlx5_flow_tunnel *tunnel,
  54                              struct tunnel_default_miss_ctx *ctx,
  55                              struct rte_flow_error *error);
  56 static struct mlx5_flow_tunnel *
  57 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id);
  58 static void
  59 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel);
  60 static uint32_t
  61 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
  62                                 const struct mlx5_flow_tunnel *tunnel,
  63                                 uint32_t group, uint32_t *table,
  64                                 struct rte_flow_error *error);
  65
  66 static struct mlx5_flow_workspace *mlx5_flow_push_thread_workspace(void);
  67 static void mlx5_flow_pop_thread_workspace(void);
  68
  69
  70 /** Device flow drivers. */
  71 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  72
  73 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  74
  75 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  76         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  77 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  78         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  79 #endif
  80         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  81         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  82 };
  83
  84 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */
  85 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \
  86         (const int []){ \
  87                 __VA_ARGS__, 0, \
  88         }
  89
  90 /** Node object of input graph for mlx5_flow_expand_rss(). */
  91 struct mlx5_flow_expand_node {
  92         const int *const next;
  93         /**<
  94          * List of next node indexes. Index 0 is interpreted as a terminator.
  95          */
  96         const enum rte_flow_item_type type;
  97         /**< Pattern item type of current node. */
  98         uint64_t rss_types;
  99         /**<
 100          * RSS types bit-field associated with this node
 101          * (see ETH_RSS_* definitions).
 102          */
 103         uint8_t optional;
 104         /**< optional expand field. Default 0 to expand, 1 not go deeper. */
 105 };
 106
 107 /** Object returned by mlx5_flow_expand_rss(). */
 108 struct mlx5_flow_expand_rss {
 109         uint32_t entries;
 110         /**< Number of entries @p patterns and @p priorities. */
 111         struct {
 112                 struct rte_flow_item *pattern; /**< Expanded pattern array. */
 113                 uint32_t priority; /**< Priority offset for each expansion. */
 114         } entry[];
 115 };
 116
 117 static void
 118 mlx5_dbg__print_pattern(const struct rte_flow_item *item);
 119
 120 static bool
 121 mlx5_flow_is_rss_expandable_item(const struct rte_flow_item *item)
 122 {
 123         switch (item->type) {
 124         case RTE_FLOW_ITEM_TYPE_ETH:
 125         case RTE_FLOW_ITEM_TYPE_VLAN:
 126         case RTE_FLOW_ITEM_TYPE_IPV4:
 127         case RTE_FLOW_ITEM_TYPE_IPV6:
 128         case RTE_FLOW_ITEM_TYPE_UDP:
 129         case RTE_FLOW_ITEM_TYPE_TCP:
 130         case RTE_FLOW_ITEM_TYPE_VXLAN:
 131         case RTE_FLOW_ITEM_TYPE_NVGRE:
 132         case RTE_FLOW_ITEM_TYPE_GRE:
 133         case RTE_FLOW_ITEM_TYPE_GENEVE:
 134         case RTE_FLOW_ITEM_TYPE_MPLS:
 135                 return true;
 136         default:
 137                 break;
 138         }
 139         return false;
 140 }
 141
 142 static enum rte_flow_item_type
 143 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item)
 144 {
 145         enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID;
 146         uint16_t ether_type = 0;
 147         uint16_t ether_type_m;
 148         uint8_t ip_next_proto = 0;
 149         uint8_t ip_next_proto_m;
 150
 151         if (item == NULL || item->spec == NULL)
 152                 return ret;
 153         switch (item->type) {
 154         case RTE_FLOW_ITEM_TYPE_ETH:
 155                 if (item->mask)
 156                         ether_type_m = ((const struct rte_flow_item_eth *)
 157                                                 (item->mask))->type;
 158                 else
 159                         ether_type_m = rte_flow_item_eth_mask.type;
 160                 if (ether_type_m != RTE_BE16(0xFFFF))
 161                         break;
 162                 ether_type = ((const struct rte_flow_item_eth *)
 163                                 (item->spec))->type;
 164                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 165                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 166                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 167                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 168                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 169                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 170                 else
 171                         ret = RTE_FLOW_ITEM_TYPE_END;
 172                 break;
 173         case RTE_FLOW_ITEM_TYPE_VLAN:
 174                 if (item->mask)
 175                         ether_type_m = ((const struct rte_flow_item_vlan *)
 176                                                 (item->mask))->inner_type;
 177                 else
 178                         ether_type_m = rte_flow_item_vlan_mask.inner_type;
 179                 if (ether_type_m != RTE_BE16(0xFFFF))
 180                         break;
 181                 ether_type = ((const struct rte_flow_item_vlan *)
 182                                 (item->spec))->inner_type;
 183                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 184                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 185                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 186                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 187                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 188                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 189                 else
 190                         ret = RTE_FLOW_ITEM_TYPE_END;
 191                 break;
 192         case RTE_FLOW_ITEM_TYPE_IPV4:
 193                 if (item->mask)
 194                         ip_next_proto_m = ((const struct rte_flow_item_ipv4 *)
 195                                         (item->mask))->hdr.next_proto_id;
 196                 else
 197                         ip_next_proto_m =
 198                                 rte_flow_item_ipv4_mask.hdr.next_proto_id;
 199                 if (ip_next_proto_m != 0xFF)
 200                         break;
 201                 ip_next_proto = ((const struct rte_flow_item_ipv4 *)
 202                                 (item->spec))->hdr.next_proto_id;
 203                 if (ip_next_proto == IPPROTO_UDP)
 204                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 205                 else if (ip_next_proto == IPPROTO_TCP)
 206                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 207                 else if (ip_next_proto == IPPROTO_IP)
 208                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 209                 else if (ip_next_proto == IPPROTO_IPV6)
 210                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 211                 else
 212                         ret = RTE_FLOW_ITEM_TYPE_END;
 213                 break;
 214         case RTE_FLOW_ITEM_TYPE_IPV6:
 215                 if (item->mask)
 216                         ip_next_proto_m = ((const struct rte_flow_item_ipv6 *)
 217                                                 (item->mask))->hdr.proto;
 218                 else
 219                         ip_next_proto_m =
 220                                 rte_flow_item_ipv6_mask.hdr.proto;
 221                 if (ip_next_proto_m != 0xFF)
 222                         break;
 223                 ip_next_proto = ((const struct rte_flow_item_ipv6 *)
 224                                 (item->spec))->hdr.proto;
 225                 if (ip_next_proto == IPPROTO_UDP)
 226                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 227                 else if (ip_next_proto == IPPROTO_TCP)
 228                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 229                 else if (ip_next_proto == IPPROTO_IP)
 230                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 231                 else if (ip_next_proto == IPPROTO_IPV6)
 232                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 233                 else
 234                         ret = RTE_FLOW_ITEM_TYPE_END;
 235                 break;
 236         default:
 237                 ret = RTE_FLOW_ITEM_TYPE_VOID;
 238                 break;
 239         }
 240         return ret;
 241 }
 242
 243 #define MLX5_RSS_EXP_ELT_N 16
 244
 245 /**
 246  * Expand RSS flows into several possible flows according to the RSS hash
 247  * fields requested and the driver capabilities.
 248  *
 249  * @param[out] buf
 250  *   Buffer to store the result expansion.
 251  * @param[in] size
 252  *   Buffer size in bytes. If 0, @p buf can be NULL.
 253  * @param[in] pattern
 254  *   User flow pattern.
 255  * @param[in] types
 256  *   RSS types to expand (see ETH_RSS_* definitions).
 257  * @param[in] graph
 258  *   Input graph to expand @p pattern according to @p types.
 259  * @param[in] graph_root_index
 260  *   Index of root node in @p graph, typically 0.
 261  *
 262  * @return
 263  *   A positive value representing the size of @p buf in bytes regardless of
 264  *   @p size on success, a negative errno value otherwise and rte_errno is
 265  *   set, the following errors are defined:
 266  *
 267  *   -E2BIG: graph-depth @p graph is too deep.
 268  *   -EINVAL: @p size has not enough space for expanded pattern.
 269  */
 270 static int
 271 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,
 272                      const struct rte_flow_item *pattern, uint64_t types,
 273                      const struct mlx5_flow_expand_node graph[],
 274                      int graph_root_index)
 275 {
 276         const struct rte_flow_item *item;
 277         const struct mlx5_flow_expand_node *node = &graph[graph_root_index];
 278         const int *next_node;
 279         const int *stack[MLX5_RSS_EXP_ELT_N];
 280         int stack_pos = 0;
 281         struct rte_flow_item flow_items[MLX5_RSS_EXP_ELT_N];
 282         unsigned int i;
 283         size_t lsize;
 284         size_t user_pattern_size = 0;
 285         void *addr = NULL;
 286         const struct mlx5_flow_expand_node *next = NULL;
 287         struct rte_flow_item missed_item;
 288         int missed = 0;
 289         int elt = 0;
 290         const struct rte_flow_item *last_item = NULL;
 291
 292         memset(&missed_item, 0, sizeof(missed_item));
 293         lsize = offsetof(struct mlx5_flow_expand_rss, entry) +
 294                 MLX5_RSS_EXP_ELT_N * sizeof(buf->entry[0]);
 295         if (lsize > size)
 296                 return -EINVAL;
 297         buf->entry[0].priority = 0;
 298         buf->entry[0].pattern = (void *)&buf->entry[MLX5_RSS_EXP_ELT_N];
 299         buf->entries = 0;
 300         addr = buf->entry[0].pattern;
 301         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 302                 if (!mlx5_flow_is_rss_expandable_item(item)) {
 303                         user_pattern_size += sizeof(*item);
 304                         continue;
 305                 }
 306                 last_item = item;
 307                 for (i = 0; node->next && node->next[i]; ++i) {
 308                         next = &graph[node->next[i]];
 309                         if (next->type == item->type)
 310                                 break;
 311                 }
 312                 if (next)
 313                         node = next;
 314                 user_pattern_size += sizeof(*item);
 315         }
 316         user_pattern_size += sizeof(*item); /* Handle END item. */
 317         lsize += user_pattern_size;
 318         if (lsize > size)
 319                 return -EINVAL;
 320         /* Copy the user pattern in the first entry of the buffer. */
 321         rte_memcpy(addr, pattern, user_pattern_size);
 322         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 323         buf->entries = 1;
 324         /* Start expanding. */
 325         memset(flow_items, 0, sizeof(flow_items));
 326         user_pattern_size -= sizeof(*item);
 327         /*
 328          * Check if the last valid item has spec set, need complete pattern,
 329          * and the pattern can be used for expansion.
 330          */
 331         missed_item.type = mlx5_flow_expand_rss_item_complete(last_item);
 332         if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) {
 333                 /* Item type END indicates expansion is not required. */
 334                 return lsize;
 335         }
 336         if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) {
 337                 next = NULL;
 338                 missed = 1;
 339                 for (i = 0; node->next && node->next[i]; ++i) {
 340                         next = &graph[node->next[i]];
 341                         if (next->type == missed_item.type) {
 342                                 flow_items[0].type = missed_item.type;
 343                                 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 344                                 break;
 345                         }
 346                         next = NULL;
 347                 }
 348         }
 349         if (next && missed) {
 350                 elt = 2; /* missed item + item end. */
 351                 node = next;
 352                 lsize += elt * sizeof(*item) + user_pattern_size;
 353                 if (lsize > size)
 354                         return -EINVAL;
 355                 if (node->rss_types & types) {
 356                         buf->entry[buf->entries].priority = 1;
 357                         buf->entry[buf->entries].pattern = addr;
 358                         buf->entries++;
 359                         rte_memcpy(addr, buf->entry[0].pattern,
 360                                    user_pattern_size);
 361                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 362                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 363                         addr = (void *)(((uintptr_t)addr) +
 364                                         elt * sizeof(*item));
 365                 }
 366         }
 367         memset(flow_items, 0, sizeof(flow_items));
 368         next_node = node->next;
 369         stack[stack_pos] = next_node;
 370         node = next_node ? &graph[*next_node] : NULL;
 371         while (node) {
 372                 flow_items[stack_pos].type = node->type;
 373                 if (node->rss_types & types) {
 374                         size_t n;
 375                         /*
 376                          * compute the number of items to copy from the
 377                          * expansion and copy it.
 378                          * When the stack_pos is 0, there are 1 element in it,
 379                          * plus the addition END item.
 380                          */
 381                         elt = stack_pos + 2;
 382                         flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END;
 383                         lsize += elt * sizeof(*item) + user_pattern_size;
 384                         if (lsize > size)
 385                                 return -EINVAL;
 386                         n = elt * sizeof(*item);
 387                         buf->entry[buf->entries].priority =
 388                                 stack_pos + 1 + missed;
 389                         buf->entry[buf->entries].pattern = addr;
 390                         buf->entries++;
 391                         rte_memcpy(addr, buf->entry[0].pattern,
 392                                    user_pattern_size);
 393                         addr = (void *)(((uintptr_t)addr) +
 394                                         user_pattern_size);
 395                         rte_memcpy(addr, &missed_item,
 396                                    missed * sizeof(*item));
 397                         addr = (void *)(((uintptr_t)addr) +
 398                                 missed * sizeof(*item));
 399                         rte_memcpy(addr, flow_items, n);
 400                         addr = (void *)(((uintptr_t)addr) + n);
 401                 }
 402                 /* Go deeper. */
 403                 if (!node->optional && node->next) {
 404                         next_node = node->next;
 405                         if (stack_pos++ == MLX5_RSS_EXP_ELT_N) {
 406                                 rte_errno = E2BIG;
 407                                 return -rte_errno;
 408                         }
 409                         stack[stack_pos] = next_node;
 410                 } else if (*(next_node + 1)) {
 411                         /* Follow up with the next possibility. */
 412                         ++next_node;
 413                 } else {
 414                         /* Move to the next path. */
 415                         if (stack_pos)
 416                                 next_node = stack[--stack_pos];
 417                         next_node++;
 418                         stack[stack_pos] = next_node;
 419                 }
 420                 node = *next_node ? &graph[*next_node] : NULL;
 421         };
 422         return lsize;
 423 }
 424
 425 enum mlx5_expansion {
 426         MLX5_EXPANSION_ROOT,
 427         MLX5_EXPANSION_ROOT_OUTER,
 428         MLX5_EXPANSION_ROOT_ETH_VLAN,
 429         MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
 430         MLX5_EXPANSION_OUTER_ETH,
 431         MLX5_EXPANSION_OUTER_ETH_VLAN,
 432         MLX5_EXPANSION_OUTER_VLAN,
 433         MLX5_EXPANSION_OUTER_IPV4,
 434         MLX5_EXPANSION_OUTER_IPV4_UDP,
 435         MLX5_EXPANSION_OUTER_IPV4_TCP,
 436         MLX5_EXPANSION_OUTER_IPV6,
 437         MLX5_EXPANSION_OUTER_IPV6_UDP,
 438         MLX5_EXPANSION_OUTER_IPV6_TCP,
 439         MLX5_EXPANSION_VXLAN,
 440         MLX5_EXPANSION_VXLAN_GPE,
 441         MLX5_EXPANSION_GRE,
 442         MLX5_EXPANSION_NVGRE,
 443         MLX5_EXPANSION_GRE_KEY,
 444         MLX5_EXPANSION_MPLS,
 445         MLX5_EXPANSION_ETH,
 446         MLX5_EXPANSION_ETH_VLAN,
 447         MLX5_EXPANSION_VLAN,
 448         MLX5_EXPANSION_IPV4,
 449         MLX5_EXPANSION_IPV4_UDP,
 450         MLX5_EXPANSION_IPV4_TCP,
 451         MLX5_EXPANSION_IPV6,
 452         MLX5_EXPANSION_IPV6_UDP,
 453         MLX5_EXPANSION_IPV6_TCP,
 454 };
 455
 456 /** Supported expansion of items. */
 457 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
 458         [MLX5_EXPANSION_ROOT] = {
 459                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 460                                                   MLX5_EXPANSION_IPV4,
 461                                                   MLX5_EXPANSION_IPV6),
 462                 .type = RTE_FLOW_ITEM_TYPE_END,
 463         },
 464         [MLX5_EXPANSION_ROOT_OUTER] = {
 465                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
 466                                                   MLX5_EXPANSION_OUTER_IPV4,
 467                                                   MLX5_EXPANSION_OUTER_IPV6),
 468                 .type = RTE_FLOW_ITEM_TYPE_END,
 469         },
 470         [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
 471                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
 472                 .type = RTE_FLOW_ITEM_TYPE_END,
 473         },
 474         [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
 475                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 476                                                 (MLX5_EXPANSION_OUTER_ETH_VLAN),
 477                 .type = RTE_FLOW_ITEM_TYPE_END,
 478         },
 479         [MLX5_EXPANSION_OUTER_ETH] = {
 480                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 481                                                   MLX5_EXPANSION_OUTER_IPV6),
 482                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 483                 .rss_types = 0,
 484         },
 485         [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
 486                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 487                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 488                 .rss_types = 0,
 489         },
 490         [MLX5_EXPANSION_OUTER_VLAN] = {
 491                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 492                                                   MLX5_EXPANSION_OUTER_IPV6),
 493                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 494         },
 495         [MLX5_EXPANSION_OUTER_IPV4] = {
 496                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 497                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 498                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 499                          MLX5_EXPANSION_GRE,
 500                          MLX5_EXPANSION_NVGRE,
 501                          MLX5_EXPANSION_IPV4,
 502                          MLX5_EXPANSION_IPV6),
 503                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 504                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 505                         ETH_RSS_NONFRAG_IPV4_OTHER,
 506         },
 507         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 508                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 509                                                   MLX5_EXPANSION_VXLAN_GPE,
 510                                                   MLX5_EXPANSION_MPLS),
 511                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 512                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 513         },
 514         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 515                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 516                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 517         },
 518         [MLX5_EXPANSION_OUTER_IPV6] = {
 519                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 520                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 521                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 522                          MLX5_EXPANSION_IPV4,
 523                          MLX5_EXPANSION_IPV6,
 524                          MLX5_EXPANSION_GRE,
 525                          MLX5_EXPANSION_NVGRE),
 526                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 527                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 528                         ETH_RSS_NONFRAG_IPV6_OTHER,
 529         },
 530         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 531                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 532                                                   MLX5_EXPANSION_VXLAN_GPE,
 533                                                   MLX5_EXPANSION_MPLS),
 534                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 535                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 536         },
 537         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 538                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 539                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 540         },
 541         [MLX5_EXPANSION_VXLAN] = {
 542                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 543                                                   MLX5_EXPANSION_IPV4,
 544                                                   MLX5_EXPANSION_IPV6),
 545                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 546         },
 547         [MLX5_EXPANSION_VXLAN_GPE] = {
 548                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 549                                                   MLX5_EXPANSION_IPV4,
 550                                                   MLX5_EXPANSION_IPV6),
 551                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 552         },
 553         [MLX5_EXPANSION_GRE] = {
 554                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 555                                                   MLX5_EXPANSION_IPV6,
 556                                                   MLX5_EXPANSION_GRE_KEY,
 557                                                   MLX5_EXPANSION_MPLS),
 558                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 559         },
 560         [MLX5_EXPANSION_GRE_KEY] = {
 561                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 562                                                   MLX5_EXPANSION_IPV6,
 563                                                   MLX5_EXPANSION_MPLS),
 564                 .type = RTE_FLOW_ITEM_TYPE_GRE_KEY,
 565                 .optional = 1,
 566         },
 567         [MLX5_EXPANSION_NVGRE] = {
 568                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
 569                 .type = RTE_FLOW_ITEM_TYPE_NVGRE,
 570         },
 571         [MLX5_EXPANSION_MPLS] = {
 572                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 573                                                   MLX5_EXPANSION_IPV6,
 574                                                   MLX5_EXPANSION_ETH),
 575                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 576         },
 577         [MLX5_EXPANSION_ETH] = {
 578                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 579                                                   MLX5_EXPANSION_IPV6),
 580                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 581         },
 582         [MLX5_EXPANSION_ETH_VLAN] = {
 583                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 584                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 585         },
 586         [MLX5_EXPANSION_VLAN] = {
 587                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 588                                                   MLX5_EXPANSION_IPV6),
 589                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 590         },
 591         [MLX5_EXPANSION_IPV4] = {
 592                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 593                                                   MLX5_EXPANSION_IPV4_TCP),
 594                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 595                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 596                         ETH_RSS_NONFRAG_IPV4_OTHER,
 597         },
 598         [MLX5_EXPANSION_IPV4_UDP] = {
 599                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 600                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 601         },
 602         [MLX5_EXPANSION_IPV4_TCP] = {
 603                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 604                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 605         },
 606         [MLX5_EXPANSION_IPV6] = {
 607                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 608                                                   MLX5_EXPANSION_IPV6_TCP),
 609                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 610                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 611                         ETH_RSS_NONFRAG_IPV6_OTHER,
 612         },
 613         [MLX5_EXPANSION_IPV6_UDP] = {
 614                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 615                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 616         },
 617         [MLX5_EXPANSION_IPV6_TCP] = {
 618                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 619                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 620         },
 621 };
 622
 623 static struct rte_flow_action_handle *
 624 mlx5_action_handle_create(struct rte_eth_dev *dev,
 625                           const struct rte_flow_indir_action_conf *conf,
 626                           const struct rte_flow_action *action,
 627                           struct rte_flow_error *error);
 628 static int mlx5_action_handle_destroy
 629                                 (struct rte_eth_dev *dev,
 630                                  struct rte_flow_action_handle *handle,
 631                                  struct rte_flow_error *error);
 632 static int mlx5_action_handle_update
 633                                 (struct rte_eth_dev *dev,
 634                                  struct rte_flow_action_handle *handle,
 635                                  const void *update,
 636                                  struct rte_flow_error *error);
 637 static int mlx5_action_handle_query
 638                                 (struct rte_eth_dev *dev,
 639                                  const struct rte_flow_action_handle *handle,
 640                                  void *data,
 641                                  struct rte_flow_error *error);
 642 static int
 643 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
 644                     struct rte_flow_tunnel *app_tunnel,
 645                     struct rte_flow_action **actions,
 646                     uint32_t *num_of_actions,
 647                     struct rte_flow_error *error);
 648 static int
 649 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
 650                        struct rte_flow_tunnel *app_tunnel,
 651                        struct rte_flow_item **items,
 652                        uint32_t *num_of_items,
 653                        struct rte_flow_error *error);
 654 static int
 655 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
 656                               struct rte_flow_item *pmd_items,
 657                               uint32_t num_items, struct rte_flow_error *err);
 658 static int
 659 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
 660                                 struct rte_flow_action *pmd_actions,
 661                                 uint32_t num_actions,
 662                                 struct rte_flow_error *err);
 663 static int
 664 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
 665                                   struct rte_mbuf *m,
 666                                   struct rte_flow_restore_info *info,
 667                                   struct rte_flow_error *err);
 668
 669 static const struct rte_flow_ops mlx5_flow_ops = {
 670         .validate = mlx5_flow_validate,
 671         .create = mlx5_flow_create,
 672         .destroy = mlx5_flow_destroy,
 673         .flush = mlx5_flow_flush,
 674         .isolate = mlx5_flow_isolate,
 675         .query = mlx5_flow_query,
 676         .dev_dump = mlx5_flow_dev_dump,
 677         .get_aged_flows = mlx5_flow_get_aged_flows,
 678         .action_handle_create = mlx5_action_handle_create,
 679         .action_handle_destroy = mlx5_action_handle_destroy,
 680         .action_handle_update = mlx5_action_handle_update,
 681         .action_handle_query = mlx5_action_handle_query,
 682         .tunnel_decap_set = mlx5_flow_tunnel_decap_set,
 683         .tunnel_match = mlx5_flow_tunnel_match,
 684         .tunnel_action_decap_release = mlx5_flow_tunnel_action_release,
 685         .tunnel_item_release = mlx5_flow_tunnel_item_release,
 686         .get_restore_info = mlx5_flow_tunnel_get_restore_info,
 687 };
 688
 689 /* Tunnel information. */
 690 struct mlx5_flow_tunnel_info {
 691         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 692         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 693 };
 694
 695 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 696         {
 697                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 698                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 699         },
 700         {
 701                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
 702                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
 703         },
 704         {
 705                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 706                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 707         },
 708         {
 709                 .tunnel = MLX5_FLOW_LAYER_GRE,
 710                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 711         },
 712         {
 713                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 714                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 715         },
 716         {
 717                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 718                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 719         },
 720         {
 721                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 722                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 723         },
 724         {
 725                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 726                 .ptype = RTE_PTYPE_TUNNEL_IP,
 727         },
 728         {
 729                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 730                 .ptype = RTE_PTYPE_TUNNEL_IP,
 731         },
 732         {
 733                 .tunnel = MLX5_FLOW_LAYER_GTP,
 734                 .ptype = RTE_PTYPE_TUNNEL_GTPU,
 735         },
 736 };
 737
 738
 739
 740 /**
 741  * Translate tag ID to register.
 742  *
 743  * @param[in] dev
 744  *   Pointer to the Ethernet device structure.
 745  * @param[in] feature
 746  *   The feature that request the register.
 747  * @param[in] id
 748  *   The request register ID.
 749  * @param[out] error
 750  *   Error description in case of any.
 751  *
 752  * @return
 753  *   The request register on success, a negative errno
 754  *   value otherwise and rte_errno is set.
 755  */
 756 int
 757 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 758                      enum mlx5_feature_name feature,
 759                      uint32_t id,
 760                      struct rte_flow_error *error)
 761 {
 762         struct mlx5_priv *priv = dev->data->dev_private;
 763         struct mlx5_dev_config *config = &priv->config;
 764         enum modify_reg start_reg;
 765         bool skip_mtr_reg = false;
 766
 767         switch (feature) {
 768         case MLX5_HAIRPIN_RX:
 769                 return REG_B;
 770         case MLX5_HAIRPIN_TX:
 771                 return REG_A;
 772         case MLX5_METADATA_RX:
 773                 switch (config->dv_xmeta_en) {
 774                 case MLX5_XMETA_MODE_LEGACY:
 775                         return REG_B;
 776                 case MLX5_XMETA_MODE_META16:
 777                         return REG_C_0;
 778                 case MLX5_XMETA_MODE_META32:
 779                         return REG_C_1;
 780                 }
 781                 break;
 782         case MLX5_METADATA_TX:
 783                 return REG_A;
 784         case MLX5_METADATA_FDB:
 785                 switch (config->dv_xmeta_en) {
 786                 case MLX5_XMETA_MODE_LEGACY:
 787                         return REG_NON;
 788                 case MLX5_XMETA_MODE_META16:
 789                         return REG_C_0;
 790                 case MLX5_XMETA_MODE_META32:
 791                         return REG_C_1;
 792                 }
 793                 break;
 794         case MLX5_FLOW_MARK:
 795                 switch (config->dv_xmeta_en) {
 796                 case MLX5_XMETA_MODE_LEGACY:
 797                         return REG_NON;
 798                 case MLX5_XMETA_MODE_META16:
 799                         return REG_C_1;
 800                 case MLX5_XMETA_MODE_META32:
 801                         return REG_C_0;
 802                 }
 803                 break;
 804         case MLX5_MTR_ID:
 805                 /*
 806                  * If meter color and meter id share one register, flow match
 807                  * should use the meter color register for match.
 808                  */
 809                 if (priv->mtr_reg_share)
 810                         return priv->mtr_color_reg;
 811                 else
 812                         return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 813                                REG_C_3;
 814         case MLX5_MTR_COLOR:
 815         case MLX5_ASO_FLOW_HIT:
 816         case MLX5_ASO_CONNTRACK:
 817                 /* All features use the same REG_C. */
 818                 MLX5_ASSERT(priv->mtr_color_reg != REG_NON);
 819                 return priv->mtr_color_reg;
 820         case MLX5_COPY_MARK:
 821                 /*
 822                  * Metadata COPY_MARK register using is in meter suffix sub
 823                  * flow while with meter. It's safe to share the same register.
 824                  */
 825                 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
 826         case MLX5_APP_TAG:
 827                 /*
 828                  * If meter is enable, it will engage the register for color
 829                  * match and flow match. If meter color match is not using the
 830                  * REG_C_2, need to skip the REG_C_x be used by meter color
 831                  * match.
 832                  * If meter is disable, free to use all available registers.
 833                  */
 834                 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 835                             (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
 836                 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
 837                 if (id > (uint32_t)(REG_C_7 - start_reg))
 838                         return rte_flow_error_set(error, EINVAL,
 839                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 840                                                   NULL, "invalid tag id");
 841                 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON)
 842                         return rte_flow_error_set(error, ENOTSUP,
 843                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 844                                                   NULL, "unsupported tag id");
 845                 /*
 846                  * This case means meter is using the REG_C_x great than 2.
 847                  * Take care not to conflict with meter color REG_C_x.
 848                  * If the available index REG_C_y >= REG_C_x, skip the
 849                  * color register.
 850                  */
 851                 if (skip_mtr_reg && config->flow_mreg_c
 852                     [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
 853                         if (id >= (uint32_t)(REG_C_7 - start_reg))
 854                                 return rte_flow_error_set(error, EINVAL,
 855                                                        RTE_FLOW_ERROR_TYPE_ITEM,
 856                                                         NULL, "invalid tag id");
 857                         if (config->flow_mreg_c
 858                             [id + 1 + start_reg - REG_C_0] != REG_NON)
 859                                 return config->flow_mreg_c
 860                                                [id + 1 + start_reg - REG_C_0];
 861                         return rte_flow_error_set(error, ENOTSUP,
 862                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 863                                                   NULL, "unsupported tag id");
 864                 }
 865                 return config->flow_mreg_c[id + start_reg - REG_C_0];
 866         }
 867         MLX5_ASSERT(false);
 868         return rte_flow_error_set(error, EINVAL,
 869                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 870                                   NULL, "invalid feature name");
 871 }
 872
 873 /**
 874  * Check extensive flow metadata register support.
 875  *
 876  * @param dev
 877  *   Pointer to rte_eth_dev structure.
 878  *
 879  * @return
 880  *   True if device supports extensive flow metadata register, otherwise false.
 881  */
 882 bool
 883 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
 884 {
 885         struct mlx5_priv *priv = dev->data->dev_private;
 886         struct mlx5_dev_config *config = &priv->config;
 887
 888         /*
 889          * Having available reg_c can be regarded inclusively as supporting
 890          * extensive flow metadata register, which could mean,
 891          * - metadata register copy action by modify header.
 892          * - 16 modify header actions is supported.
 893          * - reg_c's are preserved across different domain (FDB and NIC) on
 894          *   packet loopback by flow lookup miss.
 895          */
 896         return config->flow_mreg_c[2] != REG_NON;
 897 }
 898
 899 /**
 900  * Get the lowest priority.
 901  *
 902  * @param[in] dev
 903  *   Pointer to the Ethernet device structure.
 904  * @param[in] attributes
 905  *   Pointer to device flow rule attributes.
 906  *
 907  * @return
 908  *   The value of lowest priority of flow.
 909  */
 910 uint32_t
 911 mlx5_get_lowest_priority(struct rte_eth_dev *dev,
 912                           const struct rte_flow_attr *attr)
 913 {
 914         struct mlx5_priv *priv = dev->data->dev_private;
 915
 916         if (!attr->group && !attr->transfer)
 917                 return priv->config.flow_prio - 2;
 918         return MLX5_NON_ROOT_FLOW_MAX_PRIO - 1;
 919 }
 920
 921 /**
 922  * Calculate matcher priority of the flow.
 923  *
 924  * @param[in] dev
 925  *   Pointer to the Ethernet device structure.
 926  * @param[in] attr
 927  *   Pointer to device flow rule attributes.
 928  * @param[in] subpriority
 929  *   The priority based on the items.
 930  * @return
 931  *   The matcher priority of the flow.
 932  */
 933 uint16_t
 934 mlx5_get_matcher_priority(struct rte_eth_dev *dev,
 935                           const struct rte_flow_attr *attr,
 936                           uint32_t subpriority)
 937 {
 938         uint16_t priority = (uint16_t)attr->priority;
 939         struct mlx5_priv *priv = dev->data->dev_private;
 940
 941         if (!attr->group && !attr->transfer) {
 942                 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
 943                         priority = priv->config.flow_prio - 1;
 944                 return mlx5_os_flow_adjust_priority(dev, priority, subpriority);
 945         }
 946         if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
 947                 priority = MLX5_NON_ROOT_FLOW_MAX_PRIO;
 948         return priority * 3 + subpriority;
 949 }
 950
 951 /**
 952  * Verify the @p item specifications (spec, last, mask) are compatible with the
 953  * NIC capabilities.
 954  *
 955  * @param[in] item
 956  *   Item specification.
 957  * @param[in] mask
 958  *   @p item->mask or flow default bit-masks.
 959  * @param[in] nic_mask
 960  *   Bit-masks covering supported fields by the NIC to compare with user mask.
 961  * @param[in] size
 962  *   Bit-masks size in bytes.
 963  * @param[in] range_accepted
 964  *   True if range of values is accepted for specific fields, false otherwise.
 965  * @param[out] error
 966  *   Pointer to error structure.
 967  *
 968  * @return
 969  *   0 on success, a negative errno value otherwise and rte_errno is set.
 970  */
 971 int
 972 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
 973                           const uint8_t *mask,
 974                           const uint8_t *nic_mask,
 975                           unsigned int size,
 976                           bool range_accepted,
 977                           struct rte_flow_error *error)
 978 {
 979         unsigned int i;
 980
 981         MLX5_ASSERT(nic_mask);
 982         for (i = 0; i < size; ++i)
 983                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
 984                         return rte_flow_error_set(error, ENOTSUP,
 985                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 986                                                   item,
 987                                                   "mask enables non supported"
 988                                                   " bits");
 989         if (!item->spec && (item->mask || item->last))
 990                 return rte_flow_error_set(error, EINVAL,
 991                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
 992                                           "mask/last without a spec is not"
 993                                           " supported");
 994         if (item->spec && item->last && !range_accepted) {
 995                 uint8_t spec[size];
 996                 uint8_t last[size];
 997                 unsigned int i;
 998                 int ret;
 999
1000                 for (i = 0; i < size; ++i) {
1001                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
1002                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
1003                 }
1004                 ret = memcmp(spec, last, size);
1005                 if (ret != 0)
1006                         return rte_flow_error_set(error, EINVAL,
1007                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1008                                                   item,
1009                                                   "range is not valid");
1010         }
1011         return 0;
1012 }
1013
1014 /**
1015  * Adjust the hash fields according to the @p flow information.
1016  *
1017  * @param[in] dev_flow.
1018  *   Pointer to the mlx5_flow.
1019  * @param[in] tunnel
1020  *   1 when the hash field is for a tunnel item.
1021  * @param[in] layer_types
1022  *   ETH_RSS_* types.
1023  * @param[in] hash_fields
1024  *   Item hash fields.
1025  *
1026  * @return
1027  *   The hash fields that should be used.
1028  */
1029 uint64_t
1030 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc,
1031                             int tunnel __rte_unused, uint64_t layer_types,
1032                             uint64_t hash_fields)
1033 {
1034 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1035         int rss_request_inner = rss_desc->level >= 2;
1036
1037         /* Check RSS hash level for tunnel. */
1038         if (tunnel && rss_request_inner)
1039                 hash_fields |= IBV_RX_HASH_INNER;
1040         else if (tunnel || rss_request_inner)
1041                 return 0;
1042 #endif
1043         /* Check if requested layer matches RSS hash fields. */
1044         if (!(rss_desc->types & layer_types))
1045                 return 0;
1046         return hash_fields;
1047 }
1048
1049 /**
1050  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
1051  * if several tunnel rules are used on this queue, the tunnel ptype will be
1052  * cleared.
1053  *
1054  * @param rxq_ctrl
1055  *   Rx queue to update.
1056  */
1057 static void
1058 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
1059 {
1060         unsigned int i;
1061         uint32_t tunnel_ptype = 0;
1062
1063         /* Look up for the ptype to use. */
1064         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
1065                 if (!rxq_ctrl->flow_tunnels_n[i])
1066                         continue;
1067                 if (!tunnel_ptype) {
1068                         tunnel_ptype = tunnels_info[i].ptype;
1069                 } else {
1070                         tunnel_ptype = 0;
1071                         break;
1072                 }
1073         }
1074         rxq_ctrl->rxq.tunnel = tunnel_ptype;
1075 }
1076
1077 /**
1078  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
1079  * flow.
1080  *
1081  * @param[in] dev
1082  *   Pointer to the Ethernet device structure.
1083  * @param[in] dev_handle
1084  *   Pointer to device flow handle structure.
1085  */
1086 void
1087 flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
1088                        struct mlx5_flow_handle *dev_handle)
1089 {
1090         struct mlx5_priv *priv = dev->data->dev_private;
1091         const int mark = dev_handle->mark;
1092         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1093         struct mlx5_ind_table_obj *ind_tbl = NULL;
1094         unsigned int i;
1095
1096         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1097                 struct mlx5_hrxq *hrxq;
1098
1099                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1100                               dev_handle->rix_hrxq);
1101                 if (hrxq)
1102                         ind_tbl = hrxq->ind_table;
1103         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1104                 struct mlx5_shared_action_rss *shared_rss;
1105
1106                 shared_rss = mlx5_ipool_get
1107                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1108                          dev_handle->rix_srss);
1109                 if (shared_rss)
1110                         ind_tbl = shared_rss->ind_tbl;
1111         }
1112         if (!ind_tbl)
1113                 return;
1114         for (i = 0; i != ind_tbl->queues_n; ++i) {
1115                 int idx = ind_tbl->queues[i];
1116                 struct mlx5_rxq_ctrl *rxq_ctrl =
1117                         container_of((*priv->rxqs)[idx],
1118                                      struct mlx5_rxq_ctrl, rxq);
1119
1120                 /*
1121                  * To support metadata register copy on Tx loopback,
1122                  * this must be always enabled (metadata may arive
1123                  * from other port - not from local flows only.
1124                  */
1125                 if (priv->config.dv_flow_en &&
1126                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1127                     mlx5_flow_ext_mreg_supported(dev)) {
1128                         rxq_ctrl->rxq.mark = 1;
1129                         rxq_ctrl->flow_mark_n = 1;
1130                 } else if (mark) {
1131                         rxq_ctrl->rxq.mark = 1;
1132                         rxq_ctrl->flow_mark_n++;
1133                 }
1134                 if (tunnel) {
1135                         unsigned int j;
1136
1137                         /* Increase the counter matching the flow. */
1138                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1139                                 if ((tunnels_info[j].tunnel &
1140                                      dev_handle->layers) ==
1141                                     tunnels_info[j].tunnel) {
1142                                         rxq_ctrl->flow_tunnels_n[j]++;
1143                                         break;
1144                                 }
1145                         }
1146                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1147                 }
1148         }
1149 }
1150
1151 /**
1152  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
1153  *
1154  * @param[in] dev
1155  *   Pointer to the Ethernet device structure.
1156  * @param[in] flow
1157  *   Pointer to flow structure.
1158  */
1159 static void
1160 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
1161 {
1162         struct mlx5_priv *priv = dev->data->dev_private;
1163         uint32_t handle_idx;
1164         struct mlx5_flow_handle *dev_handle;
1165
1166         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1167                        handle_idx, dev_handle, next)
1168                 flow_drv_rxq_flags_set(dev, dev_handle);
1169 }
1170
1171 /**
1172  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1173  * device flow if no other flow uses it with the same kind of request.
1174  *
1175  * @param dev
1176  *   Pointer to Ethernet device.
1177  * @param[in] dev_handle
1178  *   Pointer to the device flow handle structure.
1179  */
1180 static void
1181 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev,
1182                         struct mlx5_flow_handle *dev_handle)
1183 {
1184         struct mlx5_priv *priv = dev->data->dev_private;
1185         const int mark = dev_handle->mark;
1186         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1187         struct mlx5_ind_table_obj *ind_tbl = NULL;
1188         unsigned int i;
1189
1190         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1191                 struct mlx5_hrxq *hrxq;
1192
1193                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1194                               dev_handle->rix_hrxq);
1195                 if (hrxq)
1196                         ind_tbl = hrxq->ind_table;
1197         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1198                 struct mlx5_shared_action_rss *shared_rss;
1199
1200                 shared_rss = mlx5_ipool_get
1201                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1202                          dev_handle->rix_srss);
1203                 if (shared_rss)
1204                         ind_tbl = shared_rss->ind_tbl;
1205         }
1206         if (!ind_tbl)
1207                 return;
1208         MLX5_ASSERT(dev->data->dev_started);
1209         for (i = 0; i != ind_tbl->queues_n; ++i) {
1210                 int idx = ind_tbl->queues[i];
1211                 struct mlx5_rxq_ctrl *rxq_ctrl =
1212                         container_of((*priv->rxqs)[idx],
1213                                      struct mlx5_rxq_ctrl, rxq);
1214
1215                 if (priv->config.dv_flow_en &&
1216                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1217                     mlx5_flow_ext_mreg_supported(dev)) {
1218                         rxq_ctrl->rxq.mark = 1;
1219                         rxq_ctrl->flow_mark_n = 1;
1220                 } else if (mark) {
1221                         rxq_ctrl->flow_mark_n--;
1222                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
1223                 }
1224                 if (tunnel) {
1225                         unsigned int j;
1226
1227                         /* Decrease the counter matching the flow. */
1228                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1229                                 if ((tunnels_info[j].tunnel &
1230                                      dev_handle->layers) ==
1231                                     tunnels_info[j].tunnel) {
1232                                         rxq_ctrl->flow_tunnels_n[j]--;
1233                                         break;
1234                                 }
1235                         }
1236                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1237                 }
1238         }
1239 }
1240
1241 /**
1242  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1243  * @p flow if no other flow uses it with the same kind of request.
1244  *
1245  * @param dev
1246  *   Pointer to Ethernet device.
1247  * @param[in] flow
1248  *   Pointer to the flow.
1249  */
1250 static void
1251 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
1252 {
1253         struct mlx5_priv *priv = dev->data->dev_private;
1254         uint32_t handle_idx;
1255         struct mlx5_flow_handle *dev_handle;
1256
1257         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1258                        handle_idx, dev_handle, next)
1259                 flow_drv_rxq_flags_trim(dev, dev_handle);
1260 }
1261
1262 /**
1263  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
1264  *
1265  * @param dev
1266  *   Pointer to Ethernet device.
1267  */
1268 static void
1269 flow_rxq_flags_clear(struct rte_eth_dev *dev)
1270 {
1271         struct mlx5_priv *priv = dev->data->dev_private;
1272         unsigned int i;
1273
1274         for (i = 0; i != priv->rxqs_n; ++i) {
1275                 struct mlx5_rxq_ctrl *rxq_ctrl;
1276                 unsigned int j;
1277
1278                 if (!(*priv->rxqs)[i])
1279                         continue;
1280                 rxq_ctrl = container_of((*priv->rxqs)[i],
1281                                         struct mlx5_rxq_ctrl, rxq);
1282                 rxq_ctrl->flow_mark_n = 0;
1283                 rxq_ctrl->rxq.mark = 0;
1284                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
1285                         rxq_ctrl->flow_tunnels_n[j] = 0;
1286                 rxq_ctrl->rxq.tunnel = 0;
1287         }
1288 }
1289
1290 /**
1291  * Set the Rx queue dynamic metadata (mask and offset) for a flow
1292  *
1293  * @param[in] dev
1294  *   Pointer to the Ethernet device structure.
1295  */
1296 void
1297 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev)
1298 {
1299         struct mlx5_priv *priv = dev->data->dev_private;
1300         struct mlx5_rxq_data *data;
1301         unsigned int i;
1302
1303         for (i = 0; i != priv->rxqs_n; ++i) {
1304                 if (!(*priv->rxqs)[i])
1305                         continue;
1306                 data = (*priv->rxqs)[i];
1307                 if (!rte_flow_dynf_metadata_avail()) {
1308                         data->dynf_meta = 0;
1309                         data->flow_meta_mask = 0;
1310                         data->flow_meta_offset = -1;
1311                         data->flow_meta_port_mask = 0;
1312                 } else {
1313                         data->dynf_meta = 1;
1314                         data->flow_meta_mask = rte_flow_dynf_metadata_mask;
1315                         data->flow_meta_offset = rte_flow_dynf_metadata_offs;
1316                         data->flow_meta_port_mask = (uint32_t)~0;
1317                         if (priv->config.dv_xmeta_en == MLX5_XMETA_MODE_META16)
1318                                 data->flow_meta_port_mask >>= 16;
1319                 }
1320         }
1321 }
1322
1323 /*
1324  * return a pointer to the desired action in the list of actions.
1325  *
1326  * @param[in] actions
1327  *   The list of actions to search the action in.
1328  * @param[in] action
1329  *   The action to find.
1330  *
1331  * @return
1332  *   Pointer to the action in the list, if found. NULL otherwise.
1333  */
1334 const struct rte_flow_action *
1335 mlx5_flow_find_action(const struct rte_flow_action *actions,
1336                       enum rte_flow_action_type action)
1337 {
1338         if (actions == NULL)
1339                 return NULL;
1340         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
1341                 if (actions->type == action)
1342                         return actions;
1343         return NULL;
1344 }
1345
1346 /*
1347  * Validate the flag action.
1348  *
1349  * @param[in] action_flags
1350  *   Bit-fields that holds the actions detected until now.
1351  * @param[in] attr
1352  *   Attributes of flow that includes this action.
1353  * @param[out] error
1354  *   Pointer to error structure.
1355  *
1356  * @return
1357  *   0 on success, a negative errno value otherwise and rte_errno is set.
1358  */
1359 int
1360 mlx5_flow_validate_action_flag(uint64_t action_flags,
1361                                const struct rte_flow_attr *attr,
1362                                struct rte_flow_error *error)
1363 {
1364         if (action_flags & MLX5_FLOW_ACTION_MARK)
1365                 return rte_flow_error_set(error, EINVAL,
1366                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1367                                           "can't mark and flag in same flow");
1368         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1369                 return rte_flow_error_set(error, EINVAL,
1370                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1371                                           "can't have 2 flag"
1372                                           " actions in same flow");
1373         if (attr->egress)
1374                 return rte_flow_error_set(error, ENOTSUP,
1375                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1376                                           "flag action not supported for "
1377                                           "egress");
1378         return 0;
1379 }
1380
1381 /*
1382  * Validate the mark action.
1383  *
1384  * @param[in] action
1385  *   Pointer to the queue action.
1386  * @param[in] action_flags
1387  *   Bit-fields that holds the actions detected until now.
1388  * @param[in] attr
1389  *   Attributes of flow that includes this action.
1390  * @param[out] error
1391  *   Pointer to error structure.
1392  *
1393  * @return
1394  *   0 on success, a negative errno value otherwise and rte_errno is set.
1395  */
1396 int
1397 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
1398                                uint64_t action_flags,
1399                                const struct rte_flow_attr *attr,
1400                                struct rte_flow_error *error)
1401 {
1402         const struct rte_flow_action_mark *mark = action->conf;
1403
1404         if (!mark)
1405                 return rte_flow_error_set(error, EINVAL,
1406                                           RTE_FLOW_ERROR_TYPE_ACTION,
1407                                           action,
1408                                           "configuration cannot be null");
1409         if (mark->id >= MLX5_FLOW_MARK_MAX)
1410                 return rte_flow_error_set(error, EINVAL,
1411                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1412                                           &mark->id,
1413                                           "mark id must in 0 <= id < "
1414                                           RTE_STR(MLX5_FLOW_MARK_MAX));
1415         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1416                 return rte_flow_error_set(error, EINVAL,
1417                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1418                                           "can't flag and mark in same flow");
1419         if (action_flags & MLX5_FLOW_ACTION_MARK)
1420                 return rte_flow_error_set(error, EINVAL,
1421                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1422                                           "can't have 2 mark actions in same"
1423                                           " flow");
1424         if (attr->egress)
1425                 return rte_flow_error_set(error, ENOTSUP,
1426                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1427                                           "mark action not supported for "
1428                                           "egress");
1429         return 0;
1430 }
1431
1432 /*
1433  * Validate the drop action.
1434  *
1435  * @param[in] action_flags
1436  *   Bit-fields that holds the actions detected until now.
1437  * @param[in] attr
1438  *   Attributes of flow that includes this action.
1439  * @param[out] error
1440  *   Pointer to error structure.
1441  *
1442  * @return
1443  *   0 on success, a negative errno value otherwise and rte_errno is set.
1444  */
1445 int
1446 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1447                                const struct rte_flow_attr *attr,
1448                                struct rte_flow_error *error)
1449 {
1450         if (attr->egress)
1451                 return rte_flow_error_set(error, ENOTSUP,
1452                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1453                                           "drop action not supported for "
1454                                           "egress");
1455         return 0;
1456 }
1457
1458 /*
1459  * Validate the queue action.
1460  *
1461  * @param[in] action
1462  *   Pointer to the queue action.
1463  * @param[in] action_flags
1464  *   Bit-fields that holds the actions detected until now.
1465  * @param[in] dev
1466  *   Pointer to the Ethernet device structure.
1467  * @param[in] attr
1468  *   Attributes of flow that includes this action.
1469  * @param[out] error
1470  *   Pointer to error structure.
1471  *
1472  * @return
1473  *   0 on success, a negative errno value otherwise and rte_errno is set.
1474  */
1475 int
1476 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1477                                 uint64_t action_flags,
1478                                 struct rte_eth_dev *dev,
1479                                 const struct rte_flow_attr *attr,
1480                                 struct rte_flow_error *error)
1481 {
1482         struct mlx5_priv *priv = dev->data->dev_private;
1483         const struct rte_flow_action_queue *queue = action->conf;
1484
1485         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1486                 return rte_flow_error_set(error, EINVAL,
1487                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1488                                           "can't have 2 fate actions in"
1489                                           " same flow");
1490         if (!priv->rxqs_n)
1491                 return rte_flow_error_set(error, EINVAL,
1492                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1493                                           NULL, "No Rx queues configured");
1494         if (queue->index >= priv->rxqs_n)
1495                 return rte_flow_error_set(error, EINVAL,
1496                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1497                                           &queue->index,
1498                                           "queue index out of range");
1499         if (!(*priv->rxqs)[queue->index])
1500                 return rte_flow_error_set(error, EINVAL,
1501                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1502                                           &queue->index,
1503                                           "queue is not configured");
1504         if (attr->egress)
1505                 return rte_flow_error_set(error, ENOTSUP,
1506                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1507                                           "queue action not supported for "
1508                                           "egress");
1509         return 0;
1510 }
1511
1512 /*
1513  * Validate the rss action.
1514  *
1515  * @param[in] dev
1516  *   Pointer to the Ethernet device structure.
1517  * @param[in] action
1518  *   Pointer to the queue action.
1519  * @param[out] error
1520  *   Pointer to error structure.
1521  *
1522  * @return
1523  *   0 on success, a negative errno value otherwise and rte_errno is set.
1524  */
1525 int
1526 mlx5_validate_action_rss(struct rte_eth_dev *dev,
1527                          const struct rte_flow_action *action,
1528                          struct rte_flow_error *error)
1529 {
1530         struct mlx5_priv *priv = dev->data->dev_private;
1531         const struct rte_flow_action_rss *rss = action->conf;
1532         enum mlx5_rxq_type rxq_type = MLX5_RXQ_TYPE_UNDEFINED;
1533         unsigned int i;
1534
1535         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1536             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1537                 return rte_flow_error_set(error, ENOTSUP,
1538                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1539                                           &rss->func,
1540                                           "RSS hash function not supported");
1541 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1542         if (rss->level > 2)
1543 #else
1544         if (rss->level > 1)
1545 #endif
1546                 return rte_flow_error_set(error, ENOTSUP,
1547                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1548                                           &rss->level,
1549                                           "tunnel RSS is not supported");
1550         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1551         if (rss->key_len == 0 && rss->key != NULL)
1552                 return rte_flow_error_set(error, ENOTSUP,
1553                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1554                                           &rss->key_len,
1555                                           "RSS hash key length 0");
1556         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1557                 return rte_flow_error_set(error, ENOTSUP,
1558                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1559                                           &rss->key_len,
1560                                           "RSS hash key too small");
1561         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1562                 return rte_flow_error_set(error, ENOTSUP,
1563                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1564                                           &rss->key_len,
1565                                           "RSS hash key too large");
1566         if (rss->queue_num > priv->config.ind_table_max_size)
1567                 return rte_flow_error_set(error, ENOTSUP,
1568                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1569                                           &rss->queue_num,
1570                                           "number of queues too large");
1571         if (rss->types & MLX5_RSS_HF_MASK)
1572                 return rte_flow_error_set(error, ENOTSUP,
1573                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1574                                           &rss->types,
1575                                           "some RSS protocols are not"
1576                                           " supported");
1577         if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) &&
1578             !(rss->types & ETH_RSS_IP))
1579                 return rte_flow_error_set(error, EINVAL,
1580                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1581                                           "L3 partial RSS requested but L3 RSS"
1582                                           " type not specified");
1583         if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) &&
1584             !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP)))
1585                 return rte_flow_error_set(error, EINVAL,
1586                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1587                                           "L4 partial RSS requested but L4 RSS"
1588                                           " type not specified");
1589         if (!priv->rxqs_n)
1590                 return rte_flow_error_set(error, EINVAL,
1591                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1592                                           NULL, "No Rx queues configured");
1593         if (!rss->queue_num)
1594                 return rte_flow_error_set(error, EINVAL,
1595                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1596                                           NULL, "No queues configured");
1597         for (i = 0; i != rss->queue_num; ++i) {
1598                 struct mlx5_rxq_ctrl *rxq_ctrl;
1599
1600                 if (rss->queue[i] >= priv->rxqs_n)
1601                         return rte_flow_error_set
1602                                 (error, EINVAL,
1603                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1604                                  &rss->queue[i], "queue index out of range");
1605                 if (!(*priv->rxqs)[rss->queue[i]])
1606                         return rte_flow_error_set
1607                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1608                                  &rss->queue[i], "queue is not configured");
1609                 rxq_ctrl = container_of((*priv->rxqs)[rss->queue[i]],
1610                                         struct mlx5_rxq_ctrl, rxq);
1611                 if (i == 0)
1612                         rxq_type = rxq_ctrl->type;
1613                 if (rxq_type != rxq_ctrl->type)
1614                         return rte_flow_error_set
1615                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1616                                  &rss->queue[i],
1617                                  "combining hairpin and regular RSS queues is not supported");
1618         }
1619         return 0;
1620 }
1621
1622 /*
1623  * Validate the rss action.
1624  *
1625  * @param[in] action
1626  *   Pointer to the queue action.
1627  * @param[in] action_flags
1628  *   Bit-fields that holds the actions detected until now.
1629  * @param[in] dev
1630  *   Pointer to the Ethernet device structure.
1631  * @param[in] attr
1632  *   Attributes of flow that includes this action.
1633  * @param[in] item_flags
1634  *   Items that were detected.
1635  * @param[out] error
1636  *   Pointer to error structure.
1637  *
1638  * @return
1639  *   0 on success, a negative errno value otherwise and rte_errno is set.
1640  */
1641 int
1642 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1643                               uint64_t action_flags,
1644                               struct rte_eth_dev *dev,
1645                               const struct rte_flow_attr *attr,
1646                               uint64_t item_flags,
1647                               struct rte_flow_error *error)
1648 {
1649         const struct rte_flow_action_rss *rss = action->conf;
1650         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1651         int ret;
1652
1653         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1654                 return rte_flow_error_set(error, EINVAL,
1655                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1656                                           "can't have 2 fate actions"
1657                                           " in same flow");
1658         ret = mlx5_validate_action_rss(dev, action, error);
1659         if (ret)
1660                 return ret;
1661         if (attr->egress)
1662                 return rte_flow_error_set(error, ENOTSUP,
1663                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1664                                           "rss action not supported for "
1665                                           "egress");
1666         if (rss->level > 1 && !tunnel)
1667                 return rte_flow_error_set(error, EINVAL,
1668                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1669                                           "inner RSS is not supported for "
1670                                           "non-tunnel flows");
1671         if ((item_flags & MLX5_FLOW_LAYER_ECPRI) &&
1672             !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) {
1673                 return rte_flow_error_set(error, EINVAL,
1674                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1675                                           "RSS on eCPRI is not supported now");
1676         }
1677         if ((item_flags & MLX5_FLOW_LAYER_MPLS) &&
1678             !(item_flags &
1679               (MLX5_FLOW_LAYER_INNER_L2 | MLX5_FLOW_LAYER_INNER_L3)) &&
1680             rss->level > 1)
1681                 return rte_flow_error_set(error, EINVAL,
1682                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
1683                                           "MPLS inner RSS needs to specify inner L2/L3 items after MPLS in pattern");
1684         return 0;
1685 }
1686
1687 /*
1688  * Validate the default miss action.
1689  *
1690  * @param[in] action_flags
1691  *   Bit-fields that holds the actions detected until now.
1692  * @param[out] error
1693  *   Pointer to error structure.
1694  *
1695  * @return
1696  *   0 on success, a negative errno value otherwise and rte_errno is set.
1697  */
1698 int
1699 mlx5_flow_validate_action_default_miss(uint64_t action_flags,
1700                                 const struct rte_flow_attr *attr,
1701                                 struct rte_flow_error *error)
1702 {
1703         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1704                 return rte_flow_error_set(error, EINVAL,
1705                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1706                                           "can't have 2 fate actions in"
1707                                           " same flow");
1708         if (attr->egress)
1709                 return rte_flow_error_set(error, ENOTSUP,
1710                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1711                                           "default miss action not supported "
1712                                           "for egress");
1713         if (attr->group)
1714                 return rte_flow_error_set(error, ENOTSUP,
1715                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
1716                                           "only group 0 is supported");
1717         if (attr->transfer)
1718                 return rte_flow_error_set(error, ENOTSUP,
1719                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1720                                           NULL, "transfer is not supported");
1721         return 0;
1722 }
1723
1724 /*
1725  * Validate the count action.
1726  *
1727  * @param[in] dev
1728  *   Pointer to the Ethernet device structure.
1729  * @param[in] attr
1730  *   Attributes of flow that includes this action.
1731  * @param[out] error
1732  *   Pointer to error structure.
1733  *
1734  * @return
1735  *   0 on success, a negative errno value otherwise and rte_errno is set.
1736  */
1737 int
1738 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1739                                 const struct rte_flow_attr *attr,
1740                                 struct rte_flow_error *error)
1741 {
1742         if (attr->egress)
1743                 return rte_flow_error_set(error, ENOTSUP,
1744                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1745                                           "count action not supported for "
1746                                           "egress");
1747         return 0;
1748 }
1749
1750 /*
1751  * Validate the ASO CT action.
1752  *
1753  * @param[in] dev
1754  *   Pointer to the Ethernet device structure.
1755  * @param[in] conntrack
1756  *   Pointer to the CT action profile.
1757  * @param[out] error
1758  *   Pointer to error structure.
1759  *
1760  * @return
1761  *   0 on success, a negative errno value otherwise and rte_errno is set.
1762  */
1763 int
1764 mlx5_validate_action_ct(struct rte_eth_dev *dev,
1765                         const struct rte_flow_action_conntrack *conntrack,
1766                         struct rte_flow_error *error)
1767 {
1768         RTE_SET_USED(dev);
1769
1770         if (conntrack->state > RTE_FLOW_CONNTRACK_STATE_TIME_WAIT)
1771                 return rte_flow_error_set(error, EINVAL,
1772                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1773                                           "Invalid CT state");
1774         if (conntrack->last_index > RTE_FLOW_CONNTRACK_FLAG_RST)
1775                 return rte_flow_error_set(error, EINVAL,
1776                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1777                                           "Invalid last TCP packet flag");
1778         return 0;
1779 }
1780
1781 /**
1782  * Verify the @p attributes will be correctly understood by the NIC and store
1783  * them in the @p flow if everything is correct.
1784  *
1785  * @param[in] dev
1786  *   Pointer to the Ethernet device structure.
1787  * @param[in] attributes
1788  *   Pointer to flow attributes
1789  * @param[out] error
1790  *   Pointer to error structure.
1791  *
1792  * @return
1793  *   0 on success, a negative errno value otherwise and rte_errno is set.
1794  */
1795 int
1796 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1797                               const struct rte_flow_attr *attributes,
1798                               struct rte_flow_error *error)
1799 {
1800         struct mlx5_priv *priv = dev->data->dev_private;
1801         uint32_t priority_max = priv->config.flow_prio - 1;
1802
1803         if (attributes->group)
1804                 return rte_flow_error_set(error, ENOTSUP,
1805                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1806                                           NULL, "groups is not supported");
1807         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
1808             attributes->priority >= priority_max)
1809                 return rte_flow_error_set(error, ENOTSUP,
1810                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1811                                           NULL, "priority out of range");
1812         if (attributes->egress)
1813                 return rte_flow_error_set(error, ENOTSUP,
1814                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1815                                           "egress is not supported");
1816         if (attributes->transfer && !priv->config.dv_esw_en)
1817                 return rte_flow_error_set(error, ENOTSUP,
1818                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1819                                           NULL, "transfer is not supported");
1820         if (!attributes->ingress)
1821                 return rte_flow_error_set(error, EINVAL,
1822                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1823                                           NULL,
1824                                           "ingress attribute is mandatory");
1825         return 0;
1826 }
1827
1828 /**
1829  * Validate ICMP6 item.
1830  *
1831  * @param[in] item
1832  *   Item specification.
1833  * @param[in] item_flags
1834  *   Bit-fields that holds the items detected until now.
1835  * @param[in] ext_vlan_sup
1836  *   Whether extended VLAN features are supported or not.
1837  * @param[out] error
1838  *   Pointer to error structure.
1839  *
1840  * @return
1841  *   0 on success, a negative errno value otherwise and rte_errno is set.
1842  */
1843 int
1844 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1845                                uint64_t item_flags,
1846                                uint8_t target_protocol,
1847                                struct rte_flow_error *error)
1848 {
1849         const struct rte_flow_item_icmp6 *mask = item->mask;
1850         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1851         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1852                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1853         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1854                                       MLX5_FLOW_LAYER_OUTER_L4;
1855         int ret;
1856
1857         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1858                 return rte_flow_error_set(error, EINVAL,
1859                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1860                                           "protocol filtering not compatible"
1861                                           " with ICMP6 layer");
1862         if (!(item_flags & l3m))
1863                 return rte_flow_error_set(error, EINVAL,
1864                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1865                                           "IPv6 is mandatory to filter on"
1866                                           " ICMP6");
1867         if (item_flags & l4m)
1868                 return rte_flow_error_set(error, EINVAL,
1869                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1870                                           "multiple L4 layers not supported");
1871         if (!mask)
1872                 mask = &rte_flow_item_icmp6_mask;
1873         ret = mlx5_flow_item_acceptable
1874                 (item, (const uint8_t *)mask,
1875                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1876                  sizeof(struct rte_flow_item_icmp6),
1877                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1878         if (ret < 0)
1879                 return ret;
1880         return 0;
1881 }
1882
1883 /**
1884  * Validate ICMP item.
1885  *
1886  * @param[in] item
1887  *   Item specification.
1888  * @param[in] item_flags
1889  *   Bit-fields that holds the items detected until now.
1890  * @param[out] error
1891  *   Pointer to error structure.
1892  *
1893  * @return
1894  *   0 on success, a negative errno value otherwise and rte_errno is set.
1895  */
1896 int
1897 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1898                              uint64_t item_flags,
1899                              uint8_t target_protocol,
1900                              struct rte_flow_error *error)
1901 {
1902         const struct rte_flow_item_icmp *mask = item->mask;
1903         const struct rte_flow_item_icmp nic_mask = {
1904                 .hdr.icmp_type = 0xff,
1905                 .hdr.icmp_code = 0xff,
1906                 .hdr.icmp_ident = RTE_BE16(0xffff),
1907                 .hdr.icmp_seq_nb = RTE_BE16(0xffff),
1908         };
1909         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1910         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1911                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1912         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1913                                       MLX5_FLOW_LAYER_OUTER_L4;
1914         int ret;
1915
1916         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1917                 return rte_flow_error_set(error, EINVAL,
1918                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1919                                           "protocol filtering not compatible"
1920                                           " with ICMP layer");
1921         if (!(item_flags & l3m))
1922                 return rte_flow_error_set(error, EINVAL,
1923                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1924                                           "IPv4 is mandatory to filter"
1925                                           " on ICMP");
1926         if (item_flags & l4m)
1927                 return rte_flow_error_set(error, EINVAL,
1928                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1929                                           "multiple L4 layers not supported");
1930         if (!mask)
1931                 mask = &nic_mask;
1932         ret = mlx5_flow_item_acceptable
1933                 (item, (const uint8_t *)mask,
1934                  (const uint8_t *)&nic_mask,
1935                  sizeof(struct rte_flow_item_icmp),
1936                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1937         if (ret < 0)
1938                 return ret;
1939         return 0;
1940 }
1941
1942 /**
1943  * Validate Ethernet item.
1944  *
1945  * @param[in] item
1946  *   Item specification.
1947  * @param[in] item_flags
1948  *   Bit-fields that holds the items detected until now.
1949  * @param[out] error
1950  *   Pointer to error structure.
1951  *
1952  * @return
1953  *   0 on success, a negative errno value otherwise and rte_errno is set.
1954  */
1955 int
1956 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1957                             uint64_t item_flags, bool ext_vlan_sup,
1958                             struct rte_flow_error *error)
1959 {
1960         const struct rte_flow_item_eth *mask = item->mask;
1961         const struct rte_flow_item_eth nic_mask = {
1962                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1963                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1964                 .type = RTE_BE16(0xffff),
1965                 .has_vlan = ext_vlan_sup ? 1 : 0,
1966         };
1967         int ret;
1968         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1969         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1970                                        MLX5_FLOW_LAYER_OUTER_L2;
1971
1972         if (item_flags & ethm)
1973                 return rte_flow_error_set(error, ENOTSUP,
1974                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1975                                           "multiple L2 layers not supported");
1976         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
1977             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
1978                 return rte_flow_error_set(error, EINVAL,
1979                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1980                                           "L2 layer should not follow "
1981                                           "L3 layers");
1982         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
1983             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
1984                 return rte_flow_error_set(error, EINVAL,
1985                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1986                                           "L2 layer should not follow VLAN");
1987         if (!mask)
1988                 mask = &rte_flow_item_eth_mask;
1989         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1990                                         (const uint8_t *)&nic_mask,
1991                                         sizeof(struct rte_flow_item_eth),
1992                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1993         return ret;
1994 }
1995
1996 /**
1997  * Validate VLAN item.
1998  *
1999  * @param[in] item
2000  *   Item specification.
2001  * @param[in] item_flags
2002  *   Bit-fields that holds the items detected until now.
2003  * @param[in] dev
2004  *   Ethernet device flow is being created on.
2005  * @param[out] error
2006  *   Pointer to error structure.
2007  *
2008  * @return
2009  *   0 on success, a negative errno value otherwise and rte_errno is set.
2010  */
2011 int
2012 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
2013                              uint64_t item_flags,
2014                              struct rte_eth_dev *dev,
2015                              struct rte_flow_error *error)
2016 {
2017         const struct rte_flow_item_vlan *spec = item->spec;
2018         const struct rte_flow_item_vlan *mask = item->mask;
2019         const struct rte_flow_item_vlan nic_mask = {
2020                 .tci = RTE_BE16(UINT16_MAX),
2021                 .inner_type = RTE_BE16(UINT16_MAX),
2022         };
2023         uint16_t vlan_tag = 0;
2024         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2025         int ret;
2026         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2027                                         MLX5_FLOW_LAYER_INNER_L4) :
2028                                        (MLX5_FLOW_LAYER_OUTER_L3 |
2029                                         MLX5_FLOW_LAYER_OUTER_L4);
2030         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2031                                         MLX5_FLOW_LAYER_OUTER_VLAN;
2032
2033         if (item_flags & vlanm)
2034                 return rte_flow_error_set(error, EINVAL,
2035                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2036                                           "multiple VLAN layers not supported");
2037         else if ((item_flags & l34m) != 0)
2038                 return rte_flow_error_set(error, EINVAL,
2039                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2040                                           "VLAN cannot follow L3/L4 layer");
2041         if (!mask)
2042                 mask = &rte_flow_item_vlan_mask;
2043         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2044                                         (const uint8_t *)&nic_mask,
2045                                         sizeof(struct rte_flow_item_vlan),
2046                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2047         if (ret)
2048                 return ret;
2049         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2050                 struct mlx5_priv *priv = dev->data->dev_private;
2051
2052                 if (priv->vmwa_context) {
2053                         /*
2054                          * Non-NULL context means we have a virtual machine
2055                          * and SR-IOV enabled, we have to create VLAN interface
2056                          * to make hypervisor to setup E-Switch vport
2057                          * context correctly. We avoid creating the multiple
2058                          * VLAN interfaces, so we cannot support VLAN tag mask.
2059                          */
2060                         return rte_flow_error_set(error, EINVAL,
2061                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2062                                                   item,
2063                                                   "VLAN tag mask is not"
2064                                                   " supported in virtual"
2065                                                   " environment");
2066                 }
2067         }
2068         if (spec) {
2069                 vlan_tag = spec->tci;
2070                 vlan_tag &= mask->tci;
2071         }
2072         /*
2073          * From verbs perspective an empty VLAN is equivalent
2074          * to a packet without VLAN layer.
2075          */
2076         if (!vlan_tag)
2077                 return rte_flow_error_set(error, EINVAL,
2078                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2079                                           item->spec,
2080                                           "VLAN cannot be empty");
2081         return 0;
2082 }
2083
2084 /**
2085  * Validate IPV4 item.
2086  *
2087  * @param[in] item
2088  *   Item specification.
2089  * @param[in] item_flags
2090  *   Bit-fields that holds the items detected until now.
2091  * @param[in] last_item
2092  *   Previous validated item in the pattern items.
2093  * @param[in] ether_type
2094  *   Type in the ethernet layer header (including dot1q).
2095  * @param[in] acc_mask
2096  *   Acceptable mask, if NULL default internal default mask
2097  *   will be used to check whether item fields are supported.
2098  * @param[in] range_accepted
2099  *   True if range of values is accepted for specific fields, false otherwise.
2100  * @param[out] error
2101  *   Pointer to error structure.
2102  *
2103  * @return
2104  *   0 on success, a negative errno value otherwise and rte_errno is set.
2105  */
2106 int
2107 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
2108                              uint64_t item_flags,
2109                              uint64_t last_item,
2110                              uint16_t ether_type,
2111                              const struct rte_flow_item_ipv4 *acc_mask,
2112                              bool range_accepted,
2113                              struct rte_flow_error *error)
2114 {
2115         const struct rte_flow_item_ipv4 *mask = item->mask;
2116         const struct rte_flow_item_ipv4 *spec = item->spec;
2117         const struct rte_flow_item_ipv4 nic_mask = {
2118                 .hdr = {
2119                         .src_addr = RTE_BE32(0xffffffff),
2120                         .dst_addr = RTE_BE32(0xffffffff),
2121                         .type_of_service = 0xff,
2122                         .next_proto_id = 0xff,
2123                 },
2124         };
2125         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2126         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2127                                       MLX5_FLOW_LAYER_OUTER_L3;
2128         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2129                                       MLX5_FLOW_LAYER_OUTER_L4;
2130         int ret;
2131         uint8_t next_proto = 0xFF;
2132         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2133                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2134                                   MLX5_FLOW_LAYER_INNER_VLAN);
2135
2136         if ((last_item & l2_vlan) && ether_type &&
2137             ether_type != RTE_ETHER_TYPE_IPV4)
2138                 return rte_flow_error_set(error, EINVAL,
2139                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2140                                           "IPv4 cannot follow L2/VLAN layer "
2141                                           "which ether type is not IPv4");
2142         if (item_flags & MLX5_FLOW_LAYER_TUNNEL) {
2143                 if (mask && spec)
2144                         next_proto = mask->hdr.next_proto_id &
2145                                      spec->hdr.next_proto_id;
2146                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2147                         return rte_flow_error_set(error, EINVAL,
2148                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2149                                                   item,
2150                                                   "multiple tunnel "
2151                                                   "not supported");
2152         }
2153         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
2154                 return rte_flow_error_set(error, EINVAL,
2155                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2156                                           "wrong tunnel type - IPv6 specified "
2157                                           "but IPv4 item provided");
2158         if (item_flags & l3m)
2159                 return rte_flow_error_set(error, ENOTSUP,
2160                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2161                                           "multiple L3 layers not supported");
2162         else if (item_flags & l4m)
2163                 return rte_flow_error_set(error, EINVAL,
2164                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2165                                           "L3 cannot follow an L4 layer.");
2166         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2167                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2168                 return rte_flow_error_set(error, EINVAL,
2169                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2170                                           "L3 cannot follow an NVGRE layer.");
2171         if (!mask)
2172                 mask = &rte_flow_item_ipv4_mask;
2173         else if (mask->hdr.next_proto_id != 0 &&
2174                  mask->hdr.next_proto_id != 0xff)
2175                 return rte_flow_error_set(error, EINVAL,
2176                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2177                                           "partial mask is not supported"
2178                                           " for protocol");
2179         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2180                                         acc_mask ? (const uint8_t *)acc_mask
2181                                                  : (const uint8_t *)&nic_mask,
2182                                         sizeof(struct rte_flow_item_ipv4),
2183                                         range_accepted, error);
2184         if (ret < 0)
2185                 return ret;
2186         return 0;
2187 }
2188
2189 /**
2190  * Validate IPV6 item.
2191  *
2192  * @param[in] item
2193  *   Item specification.
2194  * @param[in] item_flags
2195  *   Bit-fields that holds the items detected until now.
2196  * @param[in] last_item
2197  *   Previous validated item in the pattern items.
2198  * @param[in] ether_type
2199  *   Type in the ethernet layer header (including dot1q).
2200  * @param[in] acc_mask
2201  *   Acceptable mask, if NULL default internal default mask
2202  *   will be used to check whether item fields are supported.
2203  * @param[out] error
2204  *   Pointer to error structure.
2205  *
2206  * @return
2207  *   0 on success, a negative errno value otherwise and rte_errno is set.
2208  */
2209 int
2210 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
2211                              uint64_t item_flags,
2212                              uint64_t last_item,
2213                              uint16_t ether_type,
2214                              const struct rte_flow_item_ipv6 *acc_mask,
2215                              struct rte_flow_error *error)
2216 {
2217         const struct rte_flow_item_ipv6 *mask = item->mask;
2218         const struct rte_flow_item_ipv6 *spec = item->spec;
2219         const struct rte_flow_item_ipv6 nic_mask = {
2220                 .hdr = {
2221                         .src_addr =
2222                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2223                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2224                         .dst_addr =
2225                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2226                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2227                         .vtc_flow = RTE_BE32(0xffffffff),
2228                         .proto = 0xff,
2229                 },
2230         };
2231         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2232         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2233                                       MLX5_FLOW_LAYER_OUTER_L3;
2234         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2235                                       MLX5_FLOW_LAYER_OUTER_L4;
2236         int ret;
2237         uint8_t next_proto = 0xFF;
2238         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2239                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2240                                   MLX5_FLOW_LAYER_INNER_VLAN);
2241
2242         if ((last_item & l2_vlan) && ether_type &&
2243             ether_type != RTE_ETHER_TYPE_IPV6)
2244                 return rte_flow_error_set(error, EINVAL,
2245                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2246                                           "IPv6 cannot follow L2/VLAN layer "
2247                                           "which ether type is not IPv6");
2248         if (mask && mask->hdr.proto == UINT8_MAX && spec)
2249                 next_proto = spec->hdr.proto;
2250         if (item_flags & MLX5_FLOW_LAYER_TUNNEL) {
2251                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2252                         return rte_flow_error_set(error, EINVAL,
2253                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2254                                                   item,
2255                                                   "multiple tunnel "
2256                                                   "not supported");
2257         }
2258         if (next_proto == IPPROTO_HOPOPTS  ||
2259             next_proto == IPPROTO_ROUTING  ||
2260             next_proto == IPPROTO_FRAGMENT ||
2261             next_proto == IPPROTO_ESP      ||
2262             next_proto == IPPROTO_AH       ||
2263             next_proto == IPPROTO_DSTOPTS)
2264                 return rte_flow_error_set(error, EINVAL,
2265                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2266                                           "IPv6 proto (next header) should "
2267                                           "not be set as extension header");
2268         if (item_flags & MLX5_FLOW_LAYER_IPIP)
2269                 return rte_flow_error_set(error, EINVAL,
2270                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2271                                           "wrong tunnel type - IPv4 specified "
2272                                           "but IPv6 item provided");
2273         if (item_flags & l3m)
2274                 return rte_flow_error_set(error, ENOTSUP,
2275                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2276                                           "multiple L3 layers not supported");
2277         else if (item_flags & l4m)
2278                 return rte_flow_error_set(error, EINVAL,
2279                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2280                                           "L3 cannot follow an L4 layer.");
2281         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2282                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2283                 return rte_flow_error_set(error, EINVAL,
2284                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2285                                           "L3 cannot follow an NVGRE layer.");
2286         if (!mask)
2287                 mask = &rte_flow_item_ipv6_mask;
2288         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2289                                         acc_mask ? (const uint8_t *)acc_mask
2290                                                  : (const uint8_t *)&nic_mask,
2291                                         sizeof(struct rte_flow_item_ipv6),
2292                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2293         if (ret < 0)
2294                 return ret;
2295         return 0;
2296 }
2297
2298 /**
2299  * Validate UDP item.
2300  *
2301  * @param[in] item
2302  *   Item specification.
2303  * @param[in] item_flags
2304  *   Bit-fields that holds the items detected until now.
2305  * @param[in] target_protocol
2306  *   The next protocol in the previous item.
2307  * @param[in] flow_mask
2308  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
2309  * @param[out] error
2310  *   Pointer to error structure.
2311  *
2312  * @return
2313  *   0 on success, a negative errno value otherwise and rte_errno is set.
2314  */
2315 int
2316 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
2317                             uint64_t item_flags,
2318                             uint8_t target_protocol,
2319                             struct rte_flow_error *error)
2320 {
2321         const struct rte_flow_item_udp *mask = item->mask;
2322         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2323         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2324                                       MLX5_FLOW_LAYER_OUTER_L3;
2325         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2326                                       MLX5_FLOW_LAYER_OUTER_L4;
2327         int ret;
2328
2329         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
2330                 return rte_flow_error_set(error, EINVAL,
2331                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2332                                           "protocol filtering not compatible"
2333                                           " with UDP layer");
2334         if (!(item_flags & l3m))
2335                 return rte_flow_error_set(error, EINVAL,
2336                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2337                                           "L3 is mandatory to filter on L4");
2338         if (item_flags & l4m)
2339                 return rte_flow_error_set(error, EINVAL,
2340                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2341                                           "multiple L4 layers not supported");
2342         if (!mask)
2343                 mask = &rte_flow_item_udp_mask;
2344         ret = mlx5_flow_item_acceptable
2345                 (item, (const uint8_t *)mask,
2346                  (const uint8_t *)&rte_flow_item_udp_mask,
2347                  sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2348                  error);
2349         if (ret < 0)
2350                 return ret;
2351         return 0;
2352 }
2353
2354 /**
2355  * Validate TCP item.
2356  *
2357  * @param[in] item
2358  *   Item specification.
2359  * @param[in] item_flags
2360  *   Bit-fields that holds the items detected until now.
2361  * @param[in] target_protocol
2362  *   The next protocol in the previous item.
2363  * @param[out] error
2364  *   Pointer to error structure.
2365  *
2366  * @return
2367  *   0 on success, a negative errno value otherwise and rte_errno is set.
2368  */
2369 int
2370 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
2371                             uint64_t item_flags,
2372                             uint8_t target_protocol,
2373                             const struct rte_flow_item_tcp *flow_mask,
2374                             struct rte_flow_error *error)
2375 {
2376         const struct rte_flow_item_tcp *mask = item->mask;
2377         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2378         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2379                                       MLX5_FLOW_LAYER_OUTER_L3;
2380         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2381                                       MLX5_FLOW_LAYER_OUTER_L4;
2382         int ret;
2383
2384         MLX5_ASSERT(flow_mask);
2385         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
2386                 return rte_flow_error_set(error, EINVAL,
2387                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2388                                           "protocol filtering not compatible"
2389                                           " with TCP layer");
2390         if (!(item_flags & l3m))
2391                 return rte_flow_error_set(error, EINVAL,
2392                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2393                                           "L3 is mandatory to filter on L4");
2394         if (item_flags & l4m)
2395                 return rte_flow_error_set(error, EINVAL,
2396                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2397                                           "multiple L4 layers not supported");
2398         if (!mask)
2399                 mask = &rte_flow_item_tcp_mask;
2400         ret = mlx5_flow_item_acceptable
2401                 (item, (const uint8_t *)mask,
2402                  (const uint8_t *)flow_mask,
2403                  sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2404                  error);
2405         if (ret < 0)
2406                 return ret;
2407         return 0;
2408 }
2409
2410 /**
2411  * Validate VXLAN item.
2412  *
2413  * @param[in] dev
2414  *   Pointer to the Ethernet device structure.
2415  * @param[in] item
2416  *   Item specification.
2417  * @param[in] item_flags
2418  *   Bit-fields that holds the items detected until now.
2419  * @param[in] attr
2420  *   Flow rule attributes.
2421  * @param[out] error
2422  *   Pointer to error structure.
2423  *
2424  * @return
2425  *   0 on success, a negative errno value otherwise and rte_errno is set.
2426  */
2427 int
2428 mlx5_flow_validate_item_vxlan(struct rte_eth_dev *dev,
2429                               const struct rte_flow_item *item,
2430                               uint64_t item_flags,
2431                               const struct rte_flow_attr *attr,
2432                               struct rte_flow_error *error)
2433 {
2434         const struct rte_flow_item_vxlan *spec = item->spec;
2435         const struct rte_flow_item_vxlan *mask = item->mask;
2436         int ret;
2437         struct mlx5_priv *priv = dev->data->dev_private;
2438         union vni {
2439                 uint32_t vlan_id;
2440                 uint8_t vni[4];
2441         } id = { .vlan_id = 0, };
2442         const struct rte_flow_item_vxlan nic_mask = {
2443                 .vni = "\xff\xff\xff",
2444                 .rsvd1 = 0xff,
2445         };
2446         const struct rte_flow_item_vxlan *valid_mask;
2447
2448         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2449                 return rte_flow_error_set(error, ENOTSUP,
2450                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2451                                           "multiple tunnel layers not"
2452                                           " supported");
2453         valid_mask = &rte_flow_item_vxlan_mask;
2454         /*
2455          * Verify only UDPv4 is present as defined in
2456          * https://tools.ietf.org/html/rfc7348
2457          */
2458         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2459                 return rte_flow_error_set(error, EINVAL,
2460                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2461                                           "no outer UDP layer found");
2462         if (!mask)
2463                 mask = &rte_flow_item_vxlan_mask;
2464         /* FDB domain & NIC domain non-zero group */
2465         if ((attr->transfer || attr->group) && priv->sh->misc5_cap)
2466                 valid_mask = &nic_mask;
2467         /* Group zero in NIC domain */
2468         if (!attr->group && !attr->transfer && priv->sh->tunnel_header_0_1)
2469                 valid_mask = &nic_mask;
2470         ret = mlx5_flow_item_acceptable
2471                 (item, (const uint8_t *)mask,
2472                  (const uint8_t *)valid_mask,
2473                  sizeof(struct rte_flow_item_vxlan),
2474                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2475         if (ret < 0)
2476                 return ret;
2477         if (spec) {
2478                 memcpy(&id.vni[1], spec->vni, 3);
2479                 memcpy(&id.vni[1], mask->vni, 3);
2480         }
2481         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2482                 return rte_flow_error_set(error, ENOTSUP,
2483                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2484                                           "VXLAN tunnel must be fully defined");
2485         return 0;
2486 }
2487
2488 /**
2489  * Validate VXLAN_GPE item.
2490  *
2491  * @param[in] item
2492  *   Item specification.
2493  * @param[in] item_flags
2494  *   Bit-fields that holds the items detected until now.
2495  * @param[in] priv
2496  *   Pointer to the private data structure.
2497  * @param[in] target_protocol
2498  *   The next protocol in the previous item.
2499  * @param[out] error
2500  *   Pointer to error structure.
2501  *
2502  * @return
2503  *   0 on success, a negative errno value otherwise and rte_errno is set.
2504  */
2505 int
2506 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
2507                                   uint64_t item_flags,
2508                                   struct rte_eth_dev *dev,
2509                                   struct rte_flow_error *error)
2510 {
2511         struct mlx5_priv *priv = dev->data->dev_private;
2512         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
2513         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
2514         int ret;
2515         union vni {
2516                 uint32_t vlan_id;
2517                 uint8_t vni[4];
2518         } id = { .vlan_id = 0, };
2519
2520         if (!priv->config.l3_vxlan_en)
2521                 return rte_flow_error_set(error, ENOTSUP,
2522                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2523                                           "L3 VXLAN is not enabled by device"
2524                                           " parameter and/or not configured in"
2525                                           " firmware");
2526         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2527                 return rte_flow_error_set(error, ENOTSUP,
2528                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2529                                           "multiple tunnel layers not"
2530                                           " supported");
2531         /*
2532          * Verify only UDPv4 is present as defined in
2533          * https://tools.ietf.org/html/rfc7348
2534          */
2535         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2536                 return rte_flow_error_set(error, EINVAL,
2537                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2538                                           "no outer UDP layer found");
2539         if (!mask)
2540                 mask = &rte_flow_item_vxlan_gpe_mask;
2541         ret = mlx5_flow_item_acceptable
2542                 (item, (const uint8_t *)mask,
2543                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
2544                  sizeof(struct rte_flow_item_vxlan_gpe),
2545                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2546         if (ret < 0)
2547                 return ret;
2548         if (spec) {
2549                 if (spec->protocol)
2550                         return rte_flow_error_set(error, ENOTSUP,
2551                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2552                                                   item,
2553                                                   "VxLAN-GPE protocol"
2554                                                   " not supported");
2555                 memcpy(&id.vni[1], spec->vni, 3);
2556                 memcpy(&id.vni[1], mask->vni, 3);
2557         }
2558         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2559                 return rte_flow_error_set(error, ENOTSUP,
2560                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2561                                           "VXLAN-GPE tunnel must be fully"
2562                                           " defined");
2563         return 0;
2564 }
2565 /**
2566  * Validate GRE Key item.
2567  *
2568  * @param[in] item
2569  *   Item specification.
2570  * @param[in] item_flags
2571  *   Bit flags to mark detected items.
2572  * @param[in] gre_item
2573  *   Pointer to gre_item
2574  * @param[out] error
2575  *   Pointer to error structure.
2576  *
2577  * @return
2578  *   0 on success, a negative errno value otherwise and rte_errno is set.
2579  */
2580 int
2581 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
2582                                 uint64_t item_flags,
2583                                 const struct rte_flow_item *gre_item,
2584                                 struct rte_flow_error *error)
2585 {
2586         const rte_be32_t *mask = item->mask;
2587         int ret = 0;
2588         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
2589         const struct rte_flow_item_gre *gre_spec;
2590         const struct rte_flow_item_gre *gre_mask;
2591
2592         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
2593                 return rte_flow_error_set(error, ENOTSUP,
2594                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2595                                           "Multiple GRE key not support");
2596         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2597                 return rte_flow_error_set(error, ENOTSUP,
2598                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2599                                           "No preceding GRE header");
2600         if (item_flags & MLX5_FLOW_LAYER_INNER)
2601                 return rte_flow_error_set(error, ENOTSUP,
2602                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2603                                           "GRE key following a wrong item");
2604         gre_mask = gre_item->mask;
2605         if (!gre_mask)
2606                 gre_mask = &rte_flow_item_gre_mask;
2607         gre_spec = gre_item->spec;
2608         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2609                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2610                 return rte_flow_error_set(error, EINVAL,
2611                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2612                                           "Key bit must be on");
2613
2614         if (!mask)
2615                 mask = &gre_key_default_mask;
2616         ret = mlx5_flow_item_acceptable
2617                 (item, (const uint8_t *)mask,
2618                  (const uint8_t *)&gre_key_default_mask,
2619                  sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2620         return ret;
2621 }
2622
2623 /**
2624  * Validate GRE item.
2625  *
2626  * @param[in] item
2627  *   Item specification.
2628  * @param[in] item_flags
2629  *   Bit flags to mark detected items.
2630  * @param[in] target_protocol
2631  *   The next protocol in the previous item.
2632  * @param[out] error
2633  *   Pointer to error structure.
2634  *
2635  * @return
2636  *   0 on success, a negative errno value otherwise and rte_errno is set.
2637  */
2638 int
2639 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2640                             uint64_t item_flags,
2641                             uint8_t target_protocol,
2642                             struct rte_flow_error *error)
2643 {
2644         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2645         const struct rte_flow_item_gre *mask = item->mask;
2646         int ret;
2647         const struct rte_flow_item_gre nic_mask = {
2648                 .c_rsvd0_ver = RTE_BE16(0xB000),
2649                 .protocol = RTE_BE16(UINT16_MAX),
2650         };
2651
2652         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2653                 return rte_flow_error_set(error, EINVAL,
2654                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2655                                           "protocol filtering not compatible"
2656                                           " with this GRE layer");
2657         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2658                 return rte_flow_error_set(error, ENOTSUP,
2659                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2660                                           "multiple tunnel layers not"
2661                                           " supported");
2662         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2663                 return rte_flow_error_set(error, ENOTSUP,
2664                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2665                                           "L3 Layer is missing");
2666         if (!mask)
2667                 mask = &rte_flow_item_gre_mask;
2668         ret = mlx5_flow_item_acceptable
2669                 (item, (const uint8_t *)mask,
2670                  (const uint8_t *)&nic_mask,
2671                  sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2672                  error);
2673         if (ret < 0)
2674                 return ret;
2675 #ifndef HAVE_MLX5DV_DR
2676 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2677         if (spec && (spec->protocol & mask->protocol))
2678                 return rte_flow_error_set(error, ENOTSUP,
2679                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2680                                           "without MPLS support the"
2681                                           " specification cannot be used for"
2682                                           " filtering");
2683 #endif
2684 #endif
2685         return 0;
2686 }
2687
2688 /**
2689  * Validate Geneve item.
2690  *
2691  * @param[in] item
2692  *   Item specification.
2693  * @param[in] itemFlags
2694  *   Bit-fields that holds the items detected until now.
2695  * @param[in] enPriv
2696  *   Pointer to the private data structure.
2697  * @param[out] error
2698  *   Pointer to error structure.
2699  *
2700  * @return
2701  *   0 on success, a negative errno value otherwise and rte_errno is set.
2702  */
2703
2704 int
2705 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2706                                uint64_t item_flags,
2707                                struct rte_eth_dev *dev,
2708                                struct rte_flow_error *error)
2709 {
2710         struct mlx5_priv *priv = dev->data->dev_private;
2711         const struct rte_flow_item_geneve *spec = item->spec;
2712         const struct rte_flow_item_geneve *mask = item->mask;
2713         int ret;
2714         uint16_t gbhdr;
2715         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2716                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2717         const struct rte_flow_item_geneve nic_mask = {
2718                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2719                 .vni = "\xff\xff\xff",
2720                 .protocol = RTE_BE16(UINT16_MAX),
2721         };
2722
2723         if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2724                 return rte_flow_error_set(error, ENOTSUP,
2725                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2726                                           "L3 Geneve is not enabled by device"
2727                                           " parameter and/or not configured in"
2728                                           " firmware");
2729         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2730                 return rte_flow_error_set(error, ENOTSUP,
2731                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2732                                           "multiple tunnel layers not"
2733                                           " supported");
2734         /*
2735          * Verify only UDPv4 is present as defined in
2736          * https://tools.ietf.org/html/rfc7348
2737          */
2738         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2739                 return rte_flow_error_set(error, EINVAL,
2740                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2741                                           "no outer UDP layer found");
2742         if (!mask)
2743                 mask = &rte_flow_item_geneve_mask;
2744         ret = mlx5_flow_item_acceptable
2745                                   (item, (const uint8_t *)mask,
2746                                    (const uint8_t *)&nic_mask,
2747                                    sizeof(struct rte_flow_item_geneve),
2748                                    MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2749         if (ret)
2750                 return ret;
2751         if (spec) {
2752                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2753                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2754                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2755                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2756                         return rte_flow_error_set(error, ENOTSUP,
2757                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2758                                                   item,
2759                                                   "Geneve protocol unsupported"
2760                                                   " fields are being used");
2761                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2762                         return rte_flow_error_set
2763                                         (error, ENOTSUP,
2764                                          RTE_FLOW_ERROR_TYPE_ITEM,
2765                                          item,
2766                                          "Unsupported Geneve options length");
2767         }
2768         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2769                 return rte_flow_error_set
2770                                     (error, ENOTSUP,
2771                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2772                                      "Geneve tunnel must be fully defined");
2773         return 0;
2774 }
2775
2776 /**
2777  * Validate Geneve TLV option item.
2778  *
2779  * @param[in] item
2780  *   Item specification.
2781  * @param[in] last_item
2782  *   Previous validated item in the pattern items.
2783  * @param[in] geneve_item
2784  *   Previous GENEVE item specification.
2785  * @param[in] dev
2786  *   Pointer to the rte_eth_dev structure.
2787  * @param[out] error
2788  *   Pointer to error structure.
2789  *
2790  * @return
2791  *   0 on success, a negative errno value otherwise and rte_errno is set.
2792  */
2793 int
2794 mlx5_flow_validate_item_geneve_opt(const struct rte_flow_item *item,
2795                                    uint64_t last_item,
2796                                    const struct rte_flow_item *geneve_item,
2797                                    struct rte_eth_dev *dev,
2798                                    struct rte_flow_error *error)
2799 {
2800         struct mlx5_priv *priv = dev->data->dev_private;
2801         struct mlx5_dev_ctx_shared *sh = priv->sh;
2802         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource;
2803         struct mlx5_hca_attr *hca_attr = &priv->config.hca_attr;
2804         uint8_t data_max_supported =
2805                         hca_attr->max_geneve_tlv_option_data_len * 4;
2806         struct mlx5_dev_config *config = &priv->config;
2807         const struct rte_flow_item_geneve *geneve_spec;
2808         const struct rte_flow_item_geneve *geneve_mask;
2809         const struct rte_flow_item_geneve_opt *spec = item->spec;
2810         const struct rte_flow_item_geneve_opt *mask = item->mask;
2811         unsigned int i;
2812         unsigned int data_len;
2813         uint8_t tlv_option_len;
2814         uint16_t optlen_m, optlen_v;
2815         const struct rte_flow_item_geneve_opt full_mask = {
2816                 .option_class = RTE_BE16(0xffff),
2817                 .option_type = 0xff,
2818                 .option_len = 0x1f,
2819         };
2820
2821         if (!mask)
2822                 mask = &rte_flow_item_geneve_opt_mask;
2823         if (!spec)
2824                 return rte_flow_error_set
2825                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2826                         "Geneve TLV opt class/type/length must be specified");
2827         if ((uint32_t)spec->option_len > MLX5_GENEVE_OPTLEN_MASK)
2828                 return rte_flow_error_set
2829                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2830                         "Geneve TLV opt length exceeeds the limit (31)");
2831         /* Check if class type and length masks are full. */
2832         if (full_mask.option_class != mask->option_class ||
2833             full_mask.option_type != mask->option_type ||
2834             full_mask.option_len != (mask->option_len & full_mask.option_len))
2835                 return rte_flow_error_set
2836                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2837                         "Geneve TLV opt class/type/length masks must be full");
2838         /* Check if length is supported */
2839         if ((uint32_t)spec->option_len >
2840                         config->hca_attr.max_geneve_tlv_option_data_len)
2841                 return rte_flow_error_set
2842                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2843                         "Geneve TLV opt length not supported");
2844         if (config->hca_attr.max_geneve_tlv_options > 1)
2845                 DRV_LOG(DEBUG,
2846                         "max_geneve_tlv_options supports more than 1 option");
2847         /* Check GENEVE item preceding. */
2848         if (!geneve_item || !(last_item & MLX5_FLOW_LAYER_GENEVE))
2849                 return rte_flow_error_set
2850                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2851                         "Geneve opt item must be preceded with Geneve item");
2852         geneve_spec = geneve_item->spec;
2853         geneve_mask = geneve_item->mask ? geneve_item->mask :
2854                                           &rte_flow_item_geneve_mask;
2855         /* Check if GENEVE TLV option size doesn't exceed option length */
2856         if (geneve_spec && (geneve_mask->ver_opt_len_o_c_rsvd0 ||
2857                             geneve_spec->ver_opt_len_o_c_rsvd0)) {
2858                 tlv_option_len = spec->option_len & mask->option_len;
2859                 optlen_v = rte_be_to_cpu_16(geneve_spec->ver_opt_len_o_c_rsvd0);
2860                 optlen_v = MLX5_GENEVE_OPTLEN_VAL(optlen_v);
2861                 optlen_m = rte_be_to_cpu_16(geneve_mask->ver_opt_len_o_c_rsvd0);
2862                 optlen_m = MLX5_GENEVE_OPTLEN_VAL(optlen_m);
2863                 if ((optlen_v & optlen_m) <= tlv_option_len)
2864                         return rte_flow_error_set
2865                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2866                                  "GENEVE TLV option length exceeds optlen");
2867         }
2868         /* Check if length is 0 or data is 0. */
2869         if (spec->data == NULL || spec->option_len == 0)
2870                 return rte_flow_error_set
2871                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2872                         "Geneve TLV opt with zero data/length not supported");
2873         /* Check not all data & mask are 0. */
2874         data_len = spec->option_len * 4;
2875         if (mask->data == NULL) {
2876                 for (i = 0; i < data_len; i++)
2877                         if (spec->data[i])
2878                                 break;
2879                 if (i == data_len)
2880                         return rte_flow_error_set(error, ENOTSUP,
2881                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2882                                 "Can't match on Geneve option data 0");
2883         } else {
2884                 for (i = 0; i < data_len; i++)
2885                         if (spec->data[i] & mask->data[i])
2886                                 break;
2887                 if (i == data_len)
2888                         return rte_flow_error_set(error, ENOTSUP,
2889                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2890                                 "Can't match on Geneve option data and mask 0");
2891                 /* Check data mask supported. */
2892                 for (i = data_max_supported; i < data_len ; i++)
2893                         if (mask->data[i])
2894                                 return rte_flow_error_set(error, ENOTSUP,
2895                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2896                                         "Data mask is of unsupported size");
2897         }
2898         /* Check GENEVE option is supported in NIC. */
2899         if (!config->hca_attr.geneve_tlv_opt)
2900                 return rte_flow_error_set
2901                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2902                         "Geneve TLV opt not supported");
2903         /* Check if we already have geneve option with different type/class. */
2904         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
2905         geneve_opt_resource = sh->geneve_tlv_option_resource;
2906         if (geneve_opt_resource != NULL)
2907                 if (geneve_opt_resource->option_class != spec->option_class ||
2908                     geneve_opt_resource->option_type != spec->option_type ||
2909                     geneve_opt_resource->length != spec->option_len) {
2910                         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
2911                         return rte_flow_error_set(error, ENOTSUP,
2912                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2913                                 "Only one Geneve TLV option supported");
2914                 }
2915         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
2916         return 0;
2917 }
2918
2919 /**
2920  * Validate MPLS item.
2921  *
2922  * @param[in] dev
2923  *   Pointer to the rte_eth_dev structure.
2924  * @param[in] item
2925  *   Item specification.
2926  * @param[in] item_flags
2927  *   Bit-fields that holds the items detected until now.
2928  * @param[in] prev_layer
2929  *   The protocol layer indicated in previous item.
2930  * @param[out] error
2931  *   Pointer to error structure.
2932  *
2933  * @return
2934  *   0 on success, a negative errno value otherwise and rte_errno is set.
2935  */
2936 int
2937 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
2938                              const struct rte_flow_item *item __rte_unused,
2939                              uint64_t item_flags __rte_unused,
2940                              uint64_t prev_layer __rte_unused,
2941                              struct rte_flow_error *error)
2942 {
2943 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2944         const struct rte_flow_item_mpls *mask = item->mask;
2945         struct mlx5_priv *priv = dev->data->dev_private;
2946         int ret;
2947
2948         if (!priv->config.mpls_en)
2949                 return rte_flow_error_set(error, ENOTSUP,
2950                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2951                                           "MPLS not supported or"
2952                                           " disabled in firmware"
2953                                           " configuration.");
2954         /* MPLS over UDP, GRE is allowed */
2955         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L4_UDP |
2956                             MLX5_FLOW_LAYER_GRE |
2957                             MLX5_FLOW_LAYER_GRE_KEY)))
2958                 return rte_flow_error_set(error, EINVAL,
2959                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2960                                           "protocol filtering not compatible"
2961                                           " with MPLS layer");
2962         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
2963         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
2964             !(item_flags & MLX5_FLOW_LAYER_GRE))
2965                 return rte_flow_error_set(error, ENOTSUP,
2966                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2967                                           "multiple tunnel layers not"
2968                                           " supported");
2969         if (!mask)
2970                 mask = &rte_flow_item_mpls_mask;
2971         ret = mlx5_flow_item_acceptable
2972                 (item, (const uint8_t *)mask,
2973                  (const uint8_t *)&rte_flow_item_mpls_mask,
2974                  sizeof(struct rte_flow_item_mpls),
2975                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2976         if (ret < 0)
2977                 return ret;
2978         return 0;
2979 #else
2980         return rte_flow_error_set(error, ENOTSUP,
2981                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
2982                                   "MPLS is not supported by Verbs, please"
2983                                   " update.");
2984 #endif
2985 }
2986
2987 /**
2988  * Validate NVGRE item.
2989  *
2990  * @param[in] item
2991  *   Item specification.
2992  * @param[in] item_flags
2993  *   Bit flags to mark detected items.
2994  * @param[in] target_protocol
2995  *   The next protocol in the previous item.
2996  * @param[out] error
2997  *   Pointer to error structure.
2998  *
2999  * @return
3000  *   0 on success, a negative errno value otherwise and rte_errno is set.
3001  */
3002 int
3003 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
3004                               uint64_t item_flags,
3005                               uint8_t target_protocol,
3006                               struct rte_flow_error *error)
3007 {
3008         const struct rte_flow_item_nvgre *mask = item->mask;
3009         int ret;
3010
3011         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
3012                 return rte_flow_error_set(error, EINVAL,
3013                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3014                                           "protocol filtering not compatible"
3015                                           " with this GRE layer");
3016         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3017                 return rte_flow_error_set(error, ENOTSUP,
3018                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3019                                           "multiple tunnel layers not"
3020                                           " supported");
3021         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
3022                 return rte_flow_error_set(error, ENOTSUP,
3023                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3024                                           "L3 Layer is missing");
3025         if (!mask)
3026                 mask = &rte_flow_item_nvgre_mask;
3027         ret = mlx5_flow_item_acceptable
3028                 (item, (const uint8_t *)mask,
3029                  (const uint8_t *)&rte_flow_item_nvgre_mask,
3030                  sizeof(struct rte_flow_item_nvgre),
3031                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3032         if (ret < 0)
3033                 return ret;
3034         return 0;
3035 }
3036
3037 /**
3038  * Validate eCPRI item.
3039  *
3040  * @param[in] item
3041  *   Item specification.
3042  * @param[in] item_flags
3043  *   Bit-fields that holds the items detected until now.
3044  * @param[in] last_item
3045  *   Previous validated item in the pattern items.
3046  * @param[in] ether_type
3047  *   Type in the ethernet layer header (including dot1q).
3048  * @param[in] acc_mask
3049  *   Acceptable mask, if NULL default internal default mask
3050  *   will be used to check whether item fields are supported.
3051  * @param[out] error
3052  *   Pointer to error structure.
3053  *
3054  * @return
3055  *   0 on success, a negative errno value otherwise and rte_errno is set.
3056  */
3057 int
3058 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item,
3059                               uint64_t item_flags,
3060                               uint64_t last_item,
3061                               uint16_t ether_type,
3062                               const struct rte_flow_item_ecpri *acc_mask,
3063                               struct rte_flow_error *error)
3064 {
3065         const struct rte_flow_item_ecpri *mask = item->mask;
3066         const struct rte_flow_item_ecpri nic_mask = {
3067                 .hdr = {
3068                         .common = {
3069                                 .u32 =
3070                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
3071                                         .type = 0xFF,
3072                                         }).u32),
3073                         },
3074                         .dummy[0] = 0xFFFFFFFF,
3075                 },
3076         };
3077         const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 |
3078                                         MLX5_FLOW_LAYER_OUTER_VLAN);
3079         struct rte_flow_item_ecpri mask_lo;
3080
3081         if (!(last_item & outer_l2_vlan) &&
3082             last_item != MLX5_FLOW_LAYER_OUTER_L4_UDP)
3083                 return rte_flow_error_set(error, EINVAL,
3084                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3085                                           "eCPRI can only follow L2/VLAN layer or UDP layer");
3086         if ((last_item & outer_l2_vlan) && ether_type &&
3087             ether_type != RTE_ETHER_TYPE_ECPRI)
3088                 return rte_flow_error_set(error, EINVAL,
3089                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3090                                           "eCPRI cannot follow L2/VLAN layer which ether type is not 0xAEFE");
3091         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3092                 return rte_flow_error_set(error, EINVAL,
3093                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3094                                           "eCPRI with tunnel is not supported right now");
3095         if (item_flags & MLX5_FLOW_LAYER_OUTER_L3)
3096                 return rte_flow_error_set(error, ENOTSUP,
3097                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3098                                           "multiple L3 layers not supported");
3099         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP)
3100                 return rte_flow_error_set(error, EINVAL,
3101                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3102                                           "eCPRI cannot coexist with a TCP layer");
3103         /* In specification, eCPRI could be over UDP layer. */
3104         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)
3105                 return rte_flow_error_set(error, EINVAL,
3106                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3107                                           "eCPRI over UDP layer is not yet supported right now");
3108         /* Mask for type field in common header could be zero. */
3109         if (!mask)
3110                 mask = &rte_flow_item_ecpri_mask;
3111         mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32);
3112         /* Input mask is in big-endian format. */
3113         if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff)
3114                 return rte_flow_error_set(error, EINVAL,
3115                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3116                                           "partial mask is not supported for protocol");
3117         else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0)
3118                 return rte_flow_error_set(error, EINVAL,
3119                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3120                                           "message header mask must be after a type mask");
3121         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
3122                                          acc_mask ? (const uint8_t *)acc_mask
3123                                                   : (const uint8_t *)&nic_mask,
3124                                          sizeof(struct rte_flow_item_ecpri),
3125                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3126 }
3127
3128 /**
3129  * Release resource related QUEUE/RSS action split.
3130  *
3131  * @param dev
3132  *   Pointer to Ethernet device.
3133  * @param flow
3134  *   Flow to release id's from.
3135  */
3136 static void
3137 flow_mreg_split_qrss_release(struct rte_eth_dev *dev,
3138                              struct rte_flow *flow)
3139 {
3140         struct mlx5_priv *priv = dev->data->dev_private;
3141         uint32_t handle_idx;
3142         struct mlx5_flow_handle *dev_handle;
3143
3144         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
3145                        handle_idx, dev_handle, next)
3146                 if (dev_handle->split_flow_id &&
3147                     !dev_handle->is_meter_flow_id)
3148                         mlx5_ipool_free(priv->sh->ipool
3149                                         [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
3150                                         dev_handle->split_flow_id);
3151 }
3152
3153 static int
3154 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
3155                    const struct rte_flow_attr *attr __rte_unused,
3156                    const struct rte_flow_item items[] __rte_unused,
3157                    const struct rte_flow_action actions[] __rte_unused,
3158                    bool external __rte_unused,
3159                    int hairpin __rte_unused,
3160                    struct rte_flow_error *error)
3161 {
3162         return rte_flow_error_set(error, ENOTSUP,
3163                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3164 }
3165
3166 static struct mlx5_flow *
3167 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
3168                   const struct rte_flow_attr *attr __rte_unused,
3169                   const struct rte_flow_item items[] __rte_unused,
3170                   const struct rte_flow_action actions[] __rte_unused,
3171                   struct rte_flow_error *error)
3172 {
3173         rte_flow_error_set(error, ENOTSUP,
3174                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3175         return NULL;
3176 }
3177
3178 static int
3179 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
3180                     struct mlx5_flow *dev_flow __rte_unused,
3181                     const struct rte_flow_attr *attr __rte_unused,
3182                     const struct rte_flow_item items[] __rte_unused,
3183                     const struct rte_flow_action actions[] __rte_unused,
3184                     struct rte_flow_error *error)
3185 {
3186         return rte_flow_error_set(error, ENOTSUP,
3187                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3188 }
3189
3190 static int
3191 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
3192                 struct rte_flow *flow __rte_unused,
3193                 struct rte_flow_error *error)
3194 {
3195         return rte_flow_error_set(error, ENOTSUP,
3196                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3197 }
3198
3199 static void
3200 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
3201                  struct rte_flow *flow __rte_unused)
3202 {
3203 }
3204
3205 static void
3206 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
3207                   struct rte_flow *flow __rte_unused)
3208 {
3209 }
3210
3211 static int
3212 flow_null_query(struct rte_eth_dev *dev __rte_unused,
3213                 struct rte_flow *flow __rte_unused,
3214                 const struct rte_flow_action *actions __rte_unused,
3215                 void *data __rte_unused,
3216                 struct rte_flow_error *error)
3217 {
3218         return rte_flow_error_set(error, ENOTSUP,
3219                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3220 }
3221
3222 static int
3223 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused,
3224                       uint32_t domains __rte_unused,
3225                       uint32_t flags __rte_unused)
3226 {
3227         return 0;
3228 }
3229
3230 /* Void driver to protect from null pointer reference. */
3231 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
3232         .validate = flow_null_validate,
3233         .prepare = flow_null_prepare,
3234         .translate = flow_null_translate,
3235         .apply = flow_null_apply,
3236         .remove = flow_null_remove,
3237         .destroy = flow_null_destroy,
3238         .query = flow_null_query,
3239         .sync_domain = flow_null_sync_domain,
3240 };
3241
3242 /**
3243  * Select flow driver type according to flow attributes and device
3244  * configuration.
3245  *
3246  * @param[in] dev
3247  *   Pointer to the dev structure.
3248  * @param[in] attr
3249  *   Pointer to the flow attributes.
3250  *
3251  * @return
3252  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
3253  */
3254 static enum mlx5_flow_drv_type
3255 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
3256 {
3257         struct mlx5_priv *priv = dev->data->dev_private;
3258         /* The OS can determine first a specific flow type (DV, VERBS) */
3259         enum mlx5_flow_drv_type type = mlx5_flow_os_get_type();
3260
3261         if (type != MLX5_FLOW_TYPE_MAX)
3262                 return type;
3263         /* If no OS specific type - continue with DV/VERBS selection */
3264         if (attr->transfer && priv->config.dv_esw_en)
3265                 type = MLX5_FLOW_TYPE_DV;
3266         if (!attr->transfer)
3267                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
3268                                                  MLX5_FLOW_TYPE_VERBS;
3269         return type;
3270 }
3271
3272 #define flow_get_drv_ops(type) flow_drv_ops[type]
3273
3274 /**
3275  * Flow driver validation API. This abstracts calling driver specific functions.
3276  * The type of flow driver is determined according to flow attributes.
3277  *
3278  * @param[in] dev
3279  *   Pointer to the dev structure.
3280  * @param[in] attr
3281  *   Pointer to the flow attributes.
3282  * @param[in] items
3283  *   Pointer to the list of items.
3284  * @param[in] actions
3285  *   Pointer to the list of actions.
3286  * @param[in] external
3287  *   This flow rule is created by request external to PMD.
3288  * @param[in] hairpin
3289  *   Number of hairpin TX actions, 0 means classic flow.
3290  * @param[out] error
3291  *   Pointer to the error structure.
3292  *
3293  * @return
3294  *   0 on success, a negative errno value otherwise and rte_errno is set.
3295  */
3296 static inline int
3297 flow_drv_validate(struct rte_eth_dev *dev,
3298                   const struct rte_flow_attr *attr,
3299                   const struct rte_flow_item items[],
3300                   const struct rte_flow_action actions[],
3301                   bool external, int hairpin, struct rte_flow_error *error)
3302 {
3303         const struct mlx5_flow_driver_ops *fops;
3304         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
3305
3306         fops = flow_get_drv_ops(type);
3307         return fops->validate(dev, attr, items, actions, external,
3308                               hairpin, error);
3309 }
3310
3311 /**
3312  * Flow driver preparation API. This abstracts calling driver specific
3313  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3314  * calculates the size of memory required for device flow, allocates the memory,
3315  * initializes the device flow and returns the pointer.
3316  *
3317  * @note
3318  *   This function initializes device flow structure such as dv or verbs in
3319  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
3320  *   rest. For example, adding returning device flow to flow->dev_flow list and
3321  *   setting backward reference to the flow should be done out of this function.
3322  *   layers field is not filled either.
3323  *
3324  * @param[in] dev
3325  *   Pointer to the dev structure.
3326  * @param[in] attr
3327  *   Pointer to the flow attributes.
3328  * @param[in] items
3329  *   Pointer to the list of items.
3330  * @param[in] actions
3331  *   Pointer to the list of actions.
3332  * @param[in] flow_idx
3333  *   This memory pool index to the flow.
3334  * @param[out] error
3335  *   Pointer to the error structure.
3336  *
3337  * @return
3338  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
3339  */
3340 static inline struct mlx5_flow *
3341 flow_drv_prepare(struct rte_eth_dev *dev,
3342                  const struct rte_flow *flow,
3343                  const struct rte_flow_attr *attr,
3344                  const struct rte_flow_item items[],
3345                  const struct rte_flow_action actions[],
3346                  uint32_t flow_idx,
3347                  struct rte_flow_error *error)
3348 {
3349         const struct mlx5_flow_driver_ops *fops;
3350         enum mlx5_flow_drv_type type = flow->drv_type;
3351         struct mlx5_flow *mlx5_flow = NULL;
3352
3353         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3354         fops = flow_get_drv_ops(type);
3355         mlx5_flow = fops->prepare(dev, attr, items, actions, error);
3356         if (mlx5_flow)
3357                 mlx5_flow->flow_idx = flow_idx;
3358         return mlx5_flow;
3359 }
3360
3361 /**
3362  * Flow driver translation API. This abstracts calling driver specific
3363  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3364  * translates a generic flow into a driver flow. flow_drv_prepare() must
3365  * precede.
3366  *
3367  * @note
3368  *   dev_flow->layers could be filled as a result of parsing during translation
3369  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
3370  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
3371  *   flow->actions could be overwritten even though all the expanded dev_flows
3372  *   have the same actions.
3373  *
3374  * @param[in] dev
3375  *   Pointer to the rte dev structure.
3376  * @param[in, out] dev_flow
3377  *   Pointer to the mlx5 flow.
3378  * @param[in] attr
3379  *   Pointer to the flow attributes.
3380  * @param[in] items
3381  *   Pointer to the list of items.
3382  * @param[in] actions
3383  *   Pointer to the list of actions.
3384  * @param[out] error
3385  *   Pointer to the error structure.
3386  *
3387  * @return
3388  *   0 on success, a negative errno value otherwise and rte_errno is set.
3389  */
3390 static inline int
3391 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
3392                    const struct rte_flow_attr *attr,
3393                    const struct rte_flow_item items[],
3394                    const struct rte_flow_action actions[],
3395                    struct rte_flow_error *error)
3396 {
3397         const struct mlx5_flow_driver_ops *fops;
3398         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
3399
3400         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3401         fops = flow_get_drv_ops(type);
3402         return fops->translate(dev, dev_flow, attr, items, actions, error);
3403 }
3404
3405 /**
3406  * Flow driver apply API. This abstracts calling driver specific functions.
3407  * Parent flow (rte_flow) should have driver type (drv_type). It applies
3408  * translated driver flows on to device. flow_drv_translate() must precede.
3409  *
3410  * @param[in] dev
3411  *   Pointer to Ethernet device structure.
3412  * @param[in, out] flow
3413  *   Pointer to flow structure.
3414  * @param[out] error
3415  *   Pointer to error structure.
3416  *
3417  * @return
3418  *   0 on success, a negative errno value otherwise and rte_errno is set.
3419  */
3420 static inline int
3421 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
3422                struct rte_flow_error *error)
3423 {
3424         const struct mlx5_flow_driver_ops *fops;
3425         enum mlx5_flow_drv_type type = flow->drv_type;
3426
3427         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3428         fops = flow_get_drv_ops(type);
3429         return fops->apply(dev, flow, error);
3430 }
3431
3432 /**
3433  * Flow driver destroy API. This abstracts calling driver specific functions.
3434  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
3435  * on device and releases resources of the flow.
3436  *
3437  * @param[in] dev
3438  *   Pointer to Ethernet device.
3439  * @param[in, out] flow
3440  *   Pointer to flow structure.
3441  */
3442 static inline void
3443 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
3444 {
3445         const struct mlx5_flow_driver_ops *fops;
3446         enum mlx5_flow_drv_type type = flow->drv_type;
3447
3448         flow_mreg_split_qrss_release(dev, flow);
3449         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3450         fops = flow_get_drv_ops(type);
3451         fops->destroy(dev, flow);
3452 }
3453
3454 /**
3455  * Flow driver find RSS policy tbl API. This abstracts calling driver
3456  * specific functions. Parent flow (rte_flow) should have driver
3457  * type (drv_type). It will find the RSS policy table that has the rss_desc.
3458  *
3459  * @param[in] dev
3460  *   Pointer to Ethernet device.
3461  * @param[in, out] flow
3462  *   Pointer to flow structure.
3463  * @param[in] policy
3464  *   Pointer to meter policy table.
3465  * @param[in] rss_desc
3466  *   Pointer to rss_desc
3467  */
3468 static struct mlx5_flow_meter_sub_policy *
3469 flow_drv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
3470                 struct rte_flow *flow,
3471                 struct mlx5_flow_meter_policy *policy,
3472                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
3473 {
3474         const struct mlx5_flow_driver_ops *fops;
3475         enum mlx5_flow_drv_type type = flow->drv_type;
3476
3477         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3478         fops = flow_get_drv_ops(type);
3479         return fops->meter_sub_policy_rss_prepare(dev, policy, rss_desc);
3480 }
3481
3482 /**
3483  * Flow driver color tag rule API. This abstracts calling driver
3484  * specific functions. Parent flow (rte_flow) should have driver
3485  * type (drv_type). It will create the color tag rules in hierarchy meter.
3486  *
3487  * @param[in] dev
3488  *   Pointer to Ethernet device.
3489  * @param[in, out] flow
3490  *   Pointer to flow structure.
3491  * @param[in] fm
3492  *   Pointer to flow meter structure.
3493  * @param[in] src_port
3494  *   The src port this extra rule should use.
3495  * @param[in] item
3496  *   The src port id match item.
3497  * @param[out] error
3498  *   Pointer to error structure.
3499  */
3500 static int
3501 flow_drv_mtr_hierarchy_rule_create(struct rte_eth_dev *dev,
3502                 struct rte_flow *flow,
3503                 struct mlx5_flow_meter_info *fm,
3504                 int32_t src_port,
3505                 const struct rte_flow_item *item,
3506                 struct rte_flow_error *error)
3507 {
3508         const struct mlx5_flow_driver_ops *fops;
3509         enum mlx5_flow_drv_type type = flow->drv_type;
3510
3511         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3512         fops = flow_get_drv_ops(type);
3513         return fops->meter_hierarchy_rule_create(dev, fm,
3514                                                 src_port, item, error);
3515 }
3516
3517 /**
3518  * Get RSS action from the action list.
3519  *
3520  * @param[in] dev
3521  *   Pointer to Ethernet device.
3522  * @param[in] actions
3523  *   Pointer to the list of actions.
3524  * @param[in] flow
3525  *   Parent flow structure pointer.
3526  *
3527  * @return
3528  *   Pointer to the RSS action if exist, else return NULL.
3529  */
3530 static const struct rte_flow_action_rss*
3531 flow_get_rss_action(struct rte_eth_dev *dev,
3532                     const struct rte_flow_action actions[])
3533 {
3534         struct mlx5_priv *priv = dev->data->dev_private;
3535         const struct rte_flow_action_rss *rss = NULL;
3536
3537         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3538                 switch (actions->type) {
3539                 case RTE_FLOW_ACTION_TYPE_RSS:
3540                         rss = actions->conf;
3541                         break;
3542                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
3543                 {
3544                         const struct rte_flow_action_sample *sample =
3545                                                                 actions->conf;
3546                         const struct rte_flow_action *act = sample->actions;
3547                         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++)
3548                                 if (act->type == RTE_FLOW_ACTION_TYPE_RSS)
3549                                         rss = act->conf;
3550                         break;
3551                 }
3552                 case RTE_FLOW_ACTION_TYPE_METER:
3553                 {
3554                         uint32_t mtr_idx;
3555                         struct mlx5_flow_meter_info *fm;
3556                         struct mlx5_flow_meter_policy *policy;
3557                         const struct rte_flow_action_meter *mtr = actions->conf;
3558
3559                         fm = mlx5_flow_meter_find(priv, mtr->mtr_id, &mtr_idx);
3560                         if (fm && !fm->def_policy) {
3561                                 policy = mlx5_flow_meter_policy_find(dev,
3562                                                 fm->policy_id, NULL);
3563                                 MLX5_ASSERT(policy);
3564                                 if (policy->is_hierarchy) {
3565                                         policy =
3566                                 mlx5_flow_meter_hierarchy_get_final_policy(dev,
3567                                                                         policy);
3568                                         if (!policy)
3569                                                 return NULL;
3570                                 }
3571                                 if (policy->is_rss)
3572                                         rss =
3573                                 policy->act_cnt[RTE_COLOR_GREEN].rss->conf;
3574                         }
3575                         break;
3576                 }
3577                 default:
3578                         break;
3579                 }
3580         }
3581         return rss;
3582 }
3583
3584 /**
3585  * Get ASO age action by index.
3586  *
3587  * @param[in] dev
3588  *   Pointer to the Ethernet device structure.
3589  * @param[in] age_idx
3590  *   Index to the ASO age action.
3591  *
3592  * @return
3593  *   The specified ASO age action.
3594  */
3595 struct mlx5_aso_age_action*
3596 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx)
3597 {
3598         uint16_t pool_idx = age_idx & UINT16_MAX;
3599         uint16_t offset = (age_idx >> 16) & UINT16_MAX;
3600         struct mlx5_priv *priv = dev->data->dev_private;
3601         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
3602         struct mlx5_aso_age_pool *pool = mng->pools[pool_idx];
3603
3604         return &pool->actions[offset - 1];
3605 }
3606
3607 /* maps indirect action to translated direct in some actions array */
3608 struct mlx5_translated_action_handle {
3609         struct rte_flow_action_handle *action; /**< Indirect action handle. */
3610         int index; /**< Index in related array of rte_flow_action. */
3611 };
3612
3613 /**
3614  * Translates actions of type RTE_FLOW_ACTION_TYPE_INDIRECT to related
3615  * direct action if translation possible.
3616  * This functionality used to run same execution path for both direct and
3617  * indirect actions on flow create. All necessary preparations for indirect
3618  * action handling should be performed on *handle* actions list returned
3619  * from this call.
3620  *
3621  * @param[in] dev
3622  *   Pointer to Ethernet device.
3623  * @param[in] actions
3624  *   List of actions to translate.
3625  * @param[out] handle
3626  *   List to store translated indirect action object handles.
3627  * @param[in, out] indir_n
3628  *   Size of *handle* array. On return should be updated with number of
3629  *   indirect actions retrieved from the *actions* list.
3630  * @param[out] translated_actions
3631  *   List of actions where all indirect actions were translated to direct
3632  *   if possible. NULL if no translation took place.
3633  * @param[out] error
3634  *   Pointer to the error structure.
3635  *
3636  * @return
3637  *   0 on success, a negative errno value otherwise and rte_errno is set.
3638  */
3639 static int
3640 flow_action_handles_translate(struct rte_eth_dev *dev,
3641                               const struct rte_flow_action actions[],
3642                               struct mlx5_translated_action_handle *handle,
3643                               int *indir_n,
3644                               struct rte_flow_action **translated_actions,
3645                               struct rte_flow_error *error)
3646 {
3647         struct mlx5_priv *priv = dev->data->dev_private;
3648         struct rte_flow_action *translated = NULL;
3649         size_t actions_size;
3650         int n;
3651         int copied_n = 0;
3652         struct mlx5_translated_action_handle *handle_end = NULL;
3653
3654         for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
3655                 if (actions[n].type != RTE_FLOW_ACTION_TYPE_INDIRECT)
3656                         continue;
3657                 if (copied_n == *indir_n) {
3658                         return rte_flow_error_set
3659                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
3660                                  NULL, "too many shared actions");
3661                 }
3662                 rte_memcpy(&handle[copied_n].action, &actions[n].conf,
3663                            sizeof(actions[n].conf));
3664                 handle[copied_n].index = n;
3665                 copied_n++;
3666         }
3667         n++;
3668         *indir_n = copied_n;
3669         if (!copied_n)
3670                 return 0;
3671         actions_size = sizeof(struct rte_flow_action) * n;
3672         translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY);
3673         if (!translated) {
3674                 rte_errno = ENOMEM;
3675                 return -ENOMEM;
3676         }
3677         memcpy(translated, actions, actions_size);
3678         for (handle_end = handle + copied_n; handle < handle_end; handle++) {
3679                 struct mlx5_shared_action_rss *shared_rss;
3680                 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
3681                 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
3682                 uint32_t idx = act_idx &
3683                                ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
3684
3685                 switch (type) {
3686                 case MLX5_INDIRECT_ACTION_TYPE_RSS:
3687                         shared_rss = mlx5_ipool_get
3688                           (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
3689                         translated[handle->index].type =
3690                                 RTE_FLOW_ACTION_TYPE_RSS;
3691                         translated[handle->index].conf =
3692                                 &shared_rss->origin;
3693                         break;
3694                 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
3695                         translated[handle->index].type =
3696                                                 (enum rte_flow_action_type)
3697                                                 MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
3698                         translated[handle->index].conf = (void *)(uintptr_t)idx;
3699                         break;
3700                 case MLX5_INDIRECT_ACTION_TYPE_AGE:
3701                         if (priv->sh->flow_hit_aso_en) {
3702                                 translated[handle->index].type =
3703                                         (enum rte_flow_action_type)
3704                                         MLX5_RTE_FLOW_ACTION_TYPE_AGE;
3705                                 translated[handle->index].conf =
3706                                                          (void *)(uintptr_t)idx;
3707                                 break;
3708                         }
3709                         /* Fall-through */
3710                 case MLX5_INDIRECT_ACTION_TYPE_CT:
3711                         if (priv->sh->ct_aso_en) {
3712                                 translated[handle->index].type =
3713                                         RTE_FLOW_ACTION_TYPE_CONNTRACK;
3714                                 translated[handle->index].conf =
3715                                                          (void *)(uintptr_t)idx;
3716                                 break;
3717                         }
3718                         /* Fall-through */
3719                 default:
3720                         mlx5_free(translated);
3721                         return rte_flow_error_set
3722                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
3723                                  NULL, "invalid indirect action type");
3724                 }
3725         }
3726         *translated_actions = translated;
3727         return 0;
3728 }
3729
3730 /**
3731  * Get Shared RSS action from the action list.
3732  *
3733  * @param[in] dev
3734  *   Pointer to Ethernet device.
3735  * @param[in] shared
3736  *   Pointer to the list of actions.
3737  * @param[in] shared_n
3738  *   Actions list length.
3739  *
3740  * @return
3741  *   The MLX5 RSS action ID if exists, otherwise return 0.
3742  */
3743 static uint32_t
3744 flow_get_shared_rss_action(struct rte_eth_dev *dev,
3745                            struct mlx5_translated_action_handle *handle,
3746                            int shared_n)
3747 {
3748         struct mlx5_translated_action_handle *handle_end;
3749         struct mlx5_priv *priv = dev->data->dev_private;
3750         struct mlx5_shared_action_rss *shared_rss;
3751
3752
3753         for (handle_end = handle + shared_n; handle < handle_end; handle++) {
3754                 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
3755                 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
3756                 uint32_t idx = act_idx &
3757                                ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
3758                 switch (type) {
3759                 case MLX5_INDIRECT_ACTION_TYPE_RSS:
3760                         shared_rss = mlx5_ipool_get
3761                                 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
3762                                                                            idx);
3763                         __atomic_add_fetch(&shared_rss->refcnt, 1,
3764                                            __ATOMIC_RELAXED);
3765                         return idx;
3766                 default:
3767                         break;
3768                 }
3769         }
3770         return 0;
3771 }
3772
3773 static unsigned int
3774 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
3775 {
3776         const struct rte_flow_item *item;
3777         unsigned int has_vlan = 0;
3778
3779         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
3780                 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
3781                         has_vlan = 1;
3782                         break;
3783                 }
3784         }
3785         if (has_vlan)
3786                 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
3787                                        MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
3788         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
3789                                MLX5_EXPANSION_ROOT_OUTER;
3790 }
3791
3792 /**
3793  *  Get layer flags from the prefix flow.
3794  *
3795  *  Some flows may be split to several subflows, the prefix subflow gets the
3796  *  match items and the suffix sub flow gets the actions.
3797  *  Some actions need the user defined match item flags to get the detail for
3798  *  the action.
3799  *  This function helps the suffix flow to get the item layer flags from prefix
3800  *  subflow.
3801  *
3802  * @param[in] dev_flow
3803  *   Pointer the created preifx subflow.
3804  *
3805  * @return
3806  *   The layers get from prefix subflow.
3807  */
3808 static inline uint64_t
3809 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
3810 {
3811         uint64_t layers = 0;
3812
3813         /*
3814          * Layers bits could be localization, but usually the compiler will
3815          * help to do the optimization work for source code.
3816          * If no decap actions, use the layers directly.
3817          */
3818         if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP))
3819                 return dev_flow->handle->layers;
3820         /* Convert L3 layers with decap action. */
3821         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
3822                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3823         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
3824                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3825         /* Convert L4 layers with decap action.  */
3826         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
3827                 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
3828         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
3829                 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
3830         return layers;
3831 }
3832
3833 /**
3834  * Get metadata split action information.
3835  *
3836  * @param[in] actions
3837  *   Pointer to the list of actions.
3838  * @param[out] qrss
3839  *   Pointer to the return pointer.
3840  * @param[out] qrss_type
3841  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
3842  *   if no QUEUE/RSS is found.
3843  * @param[out] encap_idx
3844  *   Pointer to the index of the encap action if exists, otherwise the last
3845  *   action index.
3846  *
3847  * @return
3848  *   Total number of actions.
3849  */
3850 static int
3851 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
3852                                        const struct rte_flow_action **qrss,
3853                                        int *encap_idx)
3854 {
3855         const struct rte_flow_action_raw_encap *raw_encap;
3856         int actions_n = 0;
3857         int raw_decap_idx = -1;
3858
3859         *encap_idx = -1;
3860         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3861                 switch (actions->type) {
3862                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3863                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3864                         *encap_idx = actions_n;
3865                         break;
3866                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3867                         raw_decap_idx = actions_n;
3868                         break;
3869                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3870                         raw_encap = actions->conf;
3871                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3872                                 *encap_idx = raw_decap_idx != -1 ?
3873                                                       raw_decap_idx : actions_n;
3874                         break;
3875                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3876                 case RTE_FLOW_ACTION_TYPE_RSS:
3877                         *qrss = actions;
3878                         break;
3879                 default:
3880                         break;
3881                 }
3882                 actions_n++;
3883         }
3884         if (*encap_idx == -1)
3885                 *encap_idx = actions_n;
3886         /* Count RTE_FLOW_ACTION_TYPE_END. */
3887         return actions_n + 1;
3888 }
3889
3890 /**
3891  * Check if the action will change packet.
3892  *
3893  * @param dev
3894  *   Pointer to Ethernet device.
3895  * @param[in] type
3896  *   action type.
3897  *
3898  * @return
3899  *   true if action will change packet, false otherwise.
3900  */
3901 static bool flow_check_modify_action_type(struct rte_eth_dev *dev,
3902                                           enum rte_flow_action_type type)
3903 {
3904         struct mlx5_priv *priv = dev->data->dev_private;
3905
3906         switch (type) {
3907         case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
3908         case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
3909         case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
3910         case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
3911         case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
3912         case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
3913         case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
3914         case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
3915         case RTE_FLOW_ACTION_TYPE_DEC_TTL:
3916         case RTE_FLOW_ACTION_TYPE_SET_TTL:
3917         case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
3918         case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
3919         case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
3920         case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
3921         case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
3922         case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
3923         case RTE_FLOW_ACTION_TYPE_SET_META:
3924         case RTE_FLOW_ACTION_TYPE_SET_TAG:
3925         case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
3926         case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3927         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3928         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
3929         case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3930         case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
3931         case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3932         case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
3933         case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3934         case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3935         case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
3936                 return true;
3937         case RTE_FLOW_ACTION_TYPE_FLAG:
3938         case RTE_FLOW_ACTION_TYPE_MARK:
3939                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
3940                         return true;
3941                 else
3942                         return false;
3943         default:
3944                 return false;
3945         }
3946 }
3947
3948 /**
3949  * Check meter action from the action list.
3950  *
3951  * @param dev
3952  *   Pointer to Ethernet device.
3953  * @param[in] actions
3954  *   Pointer to the list of actions.
3955  * @param[out] has_mtr
3956  *   Pointer to the meter exist flag.
3957  * @param[out] has_modify
3958  *   Pointer to the flag showing there's packet change action.
3959  * @param[out] meter_id
3960  *   Pointer to the meter id.
3961  *
3962  * @return
3963  *   Total number of actions.
3964  */
3965 static int
3966 flow_check_meter_action(struct rte_eth_dev *dev,
3967                         const struct rte_flow_action actions[],
3968                         bool *has_mtr, bool *has_modify, uint32_t *meter_id)
3969 {
3970         const struct rte_flow_action_meter *mtr = NULL;
3971         int actions_n = 0;
3972
3973         MLX5_ASSERT(has_mtr);
3974         *has_mtr = false;
3975         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3976                 switch (actions->type) {
3977                 case RTE_FLOW_ACTION_TYPE_METER:
3978                         mtr = actions->conf;
3979                         *meter_id = mtr->mtr_id;
3980                         *has_mtr = true;
3981                         break;
3982                 default:
3983                         break;
3984                 }
3985                 if (!*has_mtr)
3986                         *has_modify |= flow_check_modify_action_type(dev,
3987                                                                 actions->type);
3988                 actions_n++;
3989         }
3990         /* Count RTE_FLOW_ACTION_TYPE_END. */
3991         return actions_n + 1;
3992 }
3993
3994 /**
3995  * Check if the flow should be split due to hairpin.
3996  * The reason for the split is that in current HW we can't
3997  * support encap and push-vlan on Rx, so if a flow contains
3998  * these actions we move it to Tx.
3999  *
4000  * @param dev
4001  *   Pointer to Ethernet device.
4002  * @param[in] attr
4003  *   Flow rule attributes.
4004  * @param[in] actions
4005  *   Associated actions (list terminated by the END action).
4006  *
4007  * @return
4008  *   > 0 the number of actions and the flow should be split,
4009  *   0 when no split required.
4010  */
4011 static int
4012 flow_check_hairpin_split(struct rte_eth_dev *dev,
4013                          const struct rte_flow_attr *attr,
4014                          const struct rte_flow_action actions[])
4015 {
4016         int queue_action = 0;
4017         int action_n = 0;
4018         int split = 0;
4019         const struct rte_flow_action_queue *queue;
4020         const struct rte_flow_action_rss *rss;
4021         const struct rte_flow_action_raw_encap *raw_encap;
4022         const struct rte_eth_hairpin_conf *conf;
4023
4024         if (!attr->ingress)
4025                 return 0;
4026         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4027                 switch (actions->type) {
4028                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4029                         queue = actions->conf;
4030                         if (queue == NULL)
4031                                 return 0;
4032                         conf = mlx5_rxq_get_hairpin_conf(dev, queue->index);
4033                         if (conf == NULL || conf->tx_explicit != 0)
4034                                 return 0;
4035                         queue_action = 1;
4036                         action_n++;
4037                         break;
4038                 case RTE_FLOW_ACTION_TYPE_RSS:
4039                         rss = actions->conf;
4040                         if (rss == NULL || rss->queue_num == 0)
4041                                 return 0;
4042                         conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]);
4043                         if (conf == NULL || conf->tx_explicit != 0)
4044                                 return 0;
4045                         queue_action = 1;
4046                         action_n++;
4047                         break;
4048                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4049                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4050                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4051                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4052                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4053                         split++;
4054                         action_n++;
4055                         break;
4056                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4057                         raw_encap = actions->conf;
4058                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4059                                 split++;
4060                         action_n++;
4061                         break;
4062                 default:
4063                         action_n++;
4064                         break;
4065                 }
4066         }
4067         if (split && queue_action)
4068                 return action_n;
4069         return 0;
4070 }
4071
4072 /* Declare flow create/destroy prototype in advance. */
4073 static uint32_t
4074 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
4075                  const struct rte_flow_attr *attr,
4076                  const struct rte_flow_item items[],
4077                  const struct rte_flow_action actions[],
4078                  bool external, struct rte_flow_error *error);
4079
4080 static void
4081 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
4082                   uint32_t flow_idx);
4083
4084 int
4085 flow_dv_mreg_match_cb(struct mlx5_hlist *list __rte_unused,
4086                       struct mlx5_hlist_entry *entry,
4087                       uint64_t key, void *cb_ctx __rte_unused)
4088 {
4089         struct mlx5_flow_mreg_copy_resource *mcp_res =
4090                 container_of(entry, typeof(*mcp_res), hlist_ent);
4091
4092         return mcp_res->mark_id != key;
4093 }
4094
4095 struct mlx5_hlist_entry *
4096 flow_dv_mreg_create_cb(struct mlx5_hlist *list, uint64_t key,
4097                        void *cb_ctx)
4098 {
4099         struct rte_eth_dev *dev = list->ctx;
4100         struct mlx5_priv *priv = dev->data->dev_private;
4101         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4102         struct mlx5_flow_mreg_copy_resource *mcp_res;
4103         struct rte_flow_error *error = ctx->error;
4104         uint32_t idx = 0;
4105         int ret;
4106         uint32_t mark_id = key;
4107         struct rte_flow_attr attr = {
4108                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
4109                 .ingress = 1,
4110         };
4111         struct mlx5_rte_flow_item_tag tag_spec = {
4112                 .data = mark_id,
4113         };
4114         struct rte_flow_item items[] = {
4115                 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
4116         };
4117         struct rte_flow_action_mark ftag = {
4118                 .id = mark_id,
4119         };
4120         struct mlx5_flow_action_copy_mreg cp_mreg = {
4121                 .dst = REG_B,
4122                 .src = REG_NON,
4123         };
4124         struct rte_flow_action_jump jump = {
4125                 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
4126         };
4127         struct rte_flow_action actions[] = {
4128                 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
4129         };
4130
4131         /* Fill the register fileds in the flow. */
4132         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
4133         if (ret < 0)
4134                 return NULL;
4135         tag_spec.id = ret;
4136         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
4137         if (ret < 0)
4138                 return NULL;
4139         cp_mreg.src = ret;
4140         /* Provide the full width of FLAG specific value. */
4141         if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
4142                 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
4143         /* Build a new flow. */
4144         if (mark_id != MLX5_DEFAULT_COPY_ID) {
4145                 items[0] = (struct rte_flow_item){
4146                         .type = (enum rte_flow_item_type)
4147                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
4148                         .spec = &tag_spec,
4149                 };
4150                 items[1] = (struct rte_flow_item){
4151                         .type = RTE_FLOW_ITEM_TYPE_END,
4152                 };
4153                 actions[0] = (struct rte_flow_action){
4154                         .type = (enum rte_flow_action_type)
4155                                 MLX5_RTE_FLOW_ACTION_TYPE_MARK,
4156                         .conf = &ftag,
4157                 };
4158                 actions[1] = (struct rte_flow_action){
4159                         .type = (enum rte_flow_action_type)
4160                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4161                         .conf = &cp_mreg,
4162                 };
4163                 actions[2] = (struct rte_flow_action){
4164                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4165                         .conf = &jump,
4166                 };
4167                 actions[3] = (struct rte_flow_action){
4168                         .type = RTE_FLOW_ACTION_TYPE_END,
4169                 };
4170         } else {
4171                 /* Default rule, wildcard match. */
4172                 attr.priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR;
4173                 items[0] = (struct rte_flow_item){
4174                         .type = RTE_FLOW_ITEM_TYPE_END,
4175                 };
4176                 actions[0] = (struct rte_flow_action){
4177                         .type = (enum rte_flow_action_type)
4178                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4179                         .conf = &cp_mreg,
4180                 };
4181                 actions[1] = (struct rte_flow_action){
4182                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4183                         .conf = &jump,
4184                 };
4185                 actions[2] = (struct rte_flow_action){
4186                         .type = RTE_FLOW_ACTION_TYPE_END,
4187                 };
4188         }
4189         /* Build a new entry. */
4190         mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
4191         if (!mcp_res) {
4192                 rte_errno = ENOMEM;
4193                 return NULL;
4194         }
4195         mcp_res->idx = idx;
4196         mcp_res->mark_id = mark_id;
4197         /*
4198          * The copy Flows are not included in any list. There
4199          * ones are referenced from other Flows and can not
4200          * be applied, removed, deleted in ardbitrary order
4201          * by list traversing.
4202          */
4203         mcp_res->rix_flow = flow_list_create(dev, NULL, &attr, items,
4204                                          actions, false, error);
4205         if (!mcp_res->rix_flow) {
4206                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx);
4207                 return NULL;
4208         }
4209         return &mcp_res->hlist_ent;
4210 }
4211
4212 /**
4213  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4214  *
4215  * As mark_id is unique, if there's already a registered flow for the mark_id,
4216  * return by increasing the reference counter of the resource. Otherwise, create
4217  * the resource (mcp_res) and flow.
4218  *
4219  * Flow looks like,
4220  *   - If ingress port is ANY and reg_c[1] is mark_id,
4221  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4222  *
4223  * For default flow (zero mark_id), flow is like,
4224  *   - If ingress port is ANY,
4225  *     reg_b := reg_c[0] and jump to RX_ACT_TBL.
4226  *
4227  * @param dev
4228  *   Pointer to Ethernet device.
4229  * @param mark_id
4230  *   ID of MARK action, zero means default flow for META.
4231  * @param[out] error
4232  *   Perform verbose error reporting if not NULL.
4233  *
4234  * @return
4235  *   Associated resource on success, NULL otherwise and rte_errno is set.
4236  */
4237 static struct mlx5_flow_mreg_copy_resource *
4238 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
4239                           struct rte_flow_error *error)
4240 {
4241         struct mlx5_priv *priv = dev->data->dev_private;
4242         struct mlx5_hlist_entry *entry;
4243         struct mlx5_flow_cb_ctx ctx = {
4244                 .dev = dev,
4245                 .error = error,
4246         };
4247
4248         /* Check if already registered. */
4249         MLX5_ASSERT(priv->mreg_cp_tbl);
4250         entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx);
4251         if (!entry)
4252                 return NULL;
4253         return container_of(entry, struct mlx5_flow_mreg_copy_resource,
4254                             hlist_ent);
4255 }
4256
4257 void
4258 flow_dv_mreg_remove_cb(struct mlx5_hlist *list, struct mlx5_hlist_entry *entry)
4259 {
4260         struct mlx5_flow_mreg_copy_resource *mcp_res =
4261                 container_of(entry, typeof(*mcp_res), hlist_ent);
4262         struct rte_eth_dev *dev = list->ctx;
4263         struct mlx5_priv *priv = dev->data->dev_private;
4264
4265         MLX5_ASSERT(mcp_res->rix_flow);
4266         flow_list_destroy(dev, NULL, mcp_res->rix_flow);
4267         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4268 }
4269
4270 /**
4271  * Release flow in RX_CP_TBL.
4272  *
4273  * @param dev
4274  *   Pointer to Ethernet device.
4275  * @flow
4276  *   Parent flow for wich copying is provided.
4277  */
4278 static void
4279 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
4280                           struct rte_flow *flow)
4281 {
4282         struct mlx5_flow_mreg_copy_resource *mcp_res;
4283         struct mlx5_priv *priv = dev->data->dev_private;
4284
4285         if (!flow->rix_mreg_copy)
4286                 return;
4287         mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
4288                                  flow->rix_mreg_copy);
4289         if (!mcp_res || !priv->mreg_cp_tbl)
4290                 return;
4291         MLX5_ASSERT(mcp_res->rix_flow);
4292         mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
4293         flow->rix_mreg_copy = 0;
4294 }
4295
4296 /**
4297  * Remove the default copy action from RX_CP_TBL.
4298  *
4299  * This functions is called in the mlx5_dev_start(). No thread safe
4300  * is guaranteed.
4301  *
4302  * @param dev
4303  *   Pointer to Ethernet device.
4304  */
4305 static void
4306 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
4307 {
4308         struct mlx5_hlist_entry *entry;
4309         struct mlx5_priv *priv = dev->data->dev_private;
4310
4311         /* Check if default flow is registered. */
4312         if (!priv->mreg_cp_tbl)
4313                 return;
4314         entry = mlx5_hlist_lookup(priv->mreg_cp_tbl,
4315                                   MLX5_DEFAULT_COPY_ID, NULL);
4316         if (!entry)
4317                 return;
4318         mlx5_hlist_unregister(priv->mreg_cp_tbl, entry);
4319 }
4320
4321 /**
4322  * Add the default copy action in in RX_CP_TBL.
4323  *
4324  * This functions is called in the mlx5_dev_start(). No thread safe
4325  * is guaranteed.
4326  *
4327  * @param dev
4328  *   Pointer to Ethernet device.
4329  * @param[out] error
4330  *   Perform verbose error reporting if not NULL.
4331  *
4332  * @return
4333  *   0 for success, negative value otherwise and rte_errno is set.
4334  */
4335 static int
4336 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
4337                                   struct rte_flow_error *error)
4338 {
4339         struct mlx5_priv *priv = dev->data->dev_private;
4340         struct mlx5_flow_mreg_copy_resource *mcp_res;
4341
4342         /* Check whether extensive metadata feature is engaged. */
4343         if (!priv->config.dv_flow_en ||
4344             priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4345             !mlx5_flow_ext_mreg_supported(dev) ||
4346             !priv->sh->dv_regc0_mask)
4347                 return 0;
4348         /*
4349          * Add default mreg copy flow may be called multiple time, but
4350          * only be called once in stop. Avoid register it twice.
4351          */
4352         if (mlx5_hlist_lookup(priv->mreg_cp_tbl, MLX5_DEFAULT_COPY_ID, NULL))
4353                 return 0;
4354         mcp_res = flow_mreg_add_copy_action(dev, MLX5_DEFAULT_COPY_ID, error);
4355         if (!mcp_res)
4356                 return -rte_errno;
4357         return 0;
4358 }
4359
4360 /**
4361  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4362  *
4363  * All the flow having Q/RSS action should be split by
4364  * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
4365  * performs the following,
4366  *   - CQE->flow_tag := reg_c[1] (MARK)
4367  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4368  * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
4369  * but there should be a flow per each MARK ID set by MARK action.
4370  *
4371  * For the aforementioned reason, if there's a MARK action in flow's action
4372  * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
4373  * the MARK ID to CQE's flow_tag like,
4374  *   - If reg_c[1] is mark_id,
4375  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4376  *
4377  * For SET_META action which stores value in reg_c[0], as the destination is
4378  * also a flow metadata register (reg_b), adding a default flow is enough. Zero
4379  * MARK ID means the default flow. The default flow looks like,
4380  *   - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4381  *
4382  * @param dev
4383  *   Pointer to Ethernet device.
4384  * @param flow
4385  *   Pointer to flow structure.
4386  * @param[in] actions
4387  *   Pointer to the list of actions.
4388  * @param[out] error
4389  *   Perform verbose error reporting if not NULL.
4390  *
4391  * @return
4392  *   0 on success, negative value otherwise and rte_errno is set.
4393  */
4394 static int
4395 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
4396                             struct rte_flow *flow,
4397                             const struct rte_flow_action *actions,
4398                             struct rte_flow_error *error)
4399 {
4400         struct mlx5_priv *priv = dev->data->dev_private;
4401         struct mlx5_dev_config *config = &priv->config;
4402         struct mlx5_flow_mreg_copy_resource *mcp_res;
4403         const struct rte_flow_action_mark *mark;
4404
4405         /* Check whether extensive metadata feature is engaged. */
4406         if (!config->dv_flow_en ||
4407             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4408             !mlx5_flow_ext_mreg_supported(dev) ||
4409             !priv->sh->dv_regc0_mask)
4410                 return 0;
4411         /* Find MARK action. */
4412         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4413                 switch (actions->type) {
4414                 case RTE_FLOW_ACTION_TYPE_FLAG:
4415                         mcp_res = flow_mreg_add_copy_action
4416                                 (dev, MLX5_FLOW_MARK_DEFAULT, error);
4417                         if (!mcp_res)
4418                                 return -rte_errno;
4419                         flow->rix_mreg_copy = mcp_res->idx;
4420                         return 0;
4421                 case RTE_FLOW_ACTION_TYPE_MARK:
4422                         mark = (const struct rte_flow_action_mark *)
4423                                 actions->conf;
4424                         mcp_res =
4425                                 flow_mreg_add_copy_action(dev, mark->id, error);
4426                         if (!mcp_res)
4427                                 return -rte_errno;
4428                         flow->rix_mreg_copy = mcp_res->idx;
4429                         return 0;
4430                 default:
4431                         break;
4432                 }
4433         }
4434         return 0;
4435 }
4436
4437 #define MLX5_MAX_SPLIT_ACTIONS 24
4438 #define MLX5_MAX_SPLIT_ITEMS 24
4439
4440 /**
4441  * Split the hairpin flow.
4442  * Since HW can't support encap and push-vlan on Rx, we move these
4443  * actions to Tx.
4444  * If the count action is after the encap then we also
4445  * move the count action. in this case the count will also measure
4446  * the outer bytes.
4447  *
4448  * @param dev
4449  *   Pointer to Ethernet device.
4450  * @param[in] actions
4451  *   Associated actions (list terminated by the END action).
4452  * @param[out] actions_rx
4453  *   Rx flow actions.
4454  * @param[out] actions_tx
4455  *   Tx flow actions..
4456  * @param[out] pattern_tx
4457  *   The pattern items for the Tx flow.
4458  * @param[out] flow_id
4459  *   The flow ID connected to this flow.
4460  *
4461  * @return
4462  *   0 on success.
4463  */
4464 static int
4465 flow_hairpin_split(struct rte_eth_dev *dev,
4466                    const struct rte_flow_action actions[],
4467                    struct rte_flow_action actions_rx[],
4468                    struct rte_flow_action actions_tx[],
4469                    struct rte_flow_item pattern_tx[],
4470                    uint32_t flow_id)
4471 {
4472         const struct rte_flow_action_raw_encap *raw_encap;
4473         const struct rte_flow_action_raw_decap *raw_decap;
4474         struct mlx5_rte_flow_action_set_tag *set_tag;
4475         struct rte_flow_action *tag_action;
4476         struct mlx5_rte_flow_item_tag *tag_item;
4477         struct rte_flow_item *item;
4478         char *addr;
4479         int encap = 0;
4480
4481         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4482                 switch (actions->type) {
4483                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4484                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4485                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4486                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4487                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4488                         rte_memcpy(actions_tx, actions,
4489                                sizeof(struct rte_flow_action));
4490                         actions_tx++;
4491                         break;
4492                 case RTE_FLOW_ACTION_TYPE_COUNT:
4493                         if (encap) {
4494                                 rte_memcpy(actions_tx, actions,
4495                                            sizeof(struct rte_flow_action));
4496                                 actions_tx++;
4497                         } else {
4498                                 rte_memcpy(actions_rx, actions,
4499                                            sizeof(struct rte_flow_action));
4500                                 actions_rx++;
4501                         }
4502                         break;
4503                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4504                         raw_encap = actions->conf;
4505                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
4506                                 memcpy(actions_tx, actions,
4507                                        sizeof(struct rte_flow_action));
4508                                 actions_tx++;
4509                                 encap = 1;
4510                         } else {
4511                                 rte_memcpy(actions_rx, actions,
4512                                            sizeof(struct rte_flow_action));
4513                                 actions_rx++;
4514                         }
4515                         break;
4516                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4517                         raw_decap = actions->conf;
4518                         if (raw_decap->size < MLX5_ENCAPSULATION_DECISION_SIZE) {
4519                                 memcpy(actions_tx, actions,
4520                                        sizeof(struct rte_flow_action));
4521                                 actions_tx++;
4522                         } else {
4523                                 rte_memcpy(actions_rx, actions,
4524                                            sizeof(struct rte_flow_action));
4525                                 actions_rx++;
4526                         }
4527                         break;
4528                 default:
4529                         rte_memcpy(actions_rx, actions,
4530                                    sizeof(struct rte_flow_action));
4531                         actions_rx++;
4532                         break;
4533                 }
4534         }
4535         /* Add set meta action and end action for the Rx flow. */
4536         tag_action = actions_rx;
4537         tag_action->type = (enum rte_flow_action_type)
4538                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4539         actions_rx++;
4540         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
4541         actions_rx++;
4542         set_tag = (void *)actions_rx;
4543         *set_tag = (struct mlx5_rte_flow_action_set_tag) {
4544                 .id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL),
4545                 .data = flow_id,
4546         };
4547         MLX5_ASSERT(set_tag->id > REG_NON);
4548         tag_action->conf = set_tag;
4549         /* Create Tx item list. */
4550         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
4551         addr = (void *)&pattern_tx[2];
4552         item = pattern_tx;
4553         item->type = (enum rte_flow_item_type)
4554                      MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4555         tag_item = (void *)addr;
4556         tag_item->data = flow_id;
4557         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
4558         MLX5_ASSERT(set_tag->id > REG_NON);
4559         item->spec = tag_item;
4560         addr += sizeof(struct mlx5_rte_flow_item_tag);
4561         tag_item = (void *)addr;
4562         tag_item->data = UINT32_MAX;
4563         tag_item->id = UINT16_MAX;
4564         item->mask = tag_item;
4565         item->last = NULL;
4566         item++;
4567         item->type = RTE_FLOW_ITEM_TYPE_END;
4568         return 0;
4569 }
4570
4571 /**
4572  * The last stage of splitting chain, just creates the subflow
4573  * without any modification.
4574  *
4575  * @param[in] dev
4576  *   Pointer to Ethernet device.
4577  * @param[in] flow
4578  *   Parent flow structure pointer.
4579  * @param[in, out] sub_flow
4580  *   Pointer to return the created subflow, may be NULL.
4581  * @param[in] attr
4582  *   Flow rule attributes.
4583  * @param[in] items
4584  *   Pattern specification (list terminated by the END pattern item).
4585  * @param[in] actions
4586  *   Associated actions (list terminated by the END action).
4587  * @param[in] flow_split_info
4588  *   Pointer to flow split info structure.
4589  * @param[out] error
4590  *   Perform verbose error reporting if not NULL.
4591  * @return
4592  *   0 on success, negative value otherwise
4593  */
4594 static int
4595 flow_create_split_inner(struct rte_eth_dev *dev,
4596                         struct rte_flow *flow,
4597                         struct mlx5_flow **sub_flow,
4598                         const struct rte_flow_attr *attr,
4599                         const struct rte_flow_item items[],
4600                         const struct rte_flow_action actions[],
4601                         struct mlx5_flow_split_info *flow_split_info,
4602                         struct rte_flow_error *error)
4603 {
4604         struct mlx5_flow *dev_flow;
4605
4606         dev_flow = flow_drv_prepare(dev, flow, attr, items, actions,
4607                                     flow_split_info->flow_idx, error);
4608         if (!dev_flow)
4609                 return -rte_errno;
4610         dev_flow->flow = flow;
4611         dev_flow->external = flow_split_info->external;
4612         dev_flow->skip_scale = flow_split_info->skip_scale;
4613         /* Subflow object was created, we must include one in the list. */
4614         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4615                       dev_flow->handle, next);
4616         /*
4617          * If dev_flow is as one of the suffix flow, some actions in suffix
4618          * flow may need some user defined item layer flags, and pass the
4619          * Metadate rxq mark flag to suffix flow as well.
4620          */
4621         if (flow_split_info->prefix_layers)
4622                 dev_flow->handle->layers = flow_split_info->prefix_layers;
4623         if (flow_split_info->prefix_mark)
4624                 dev_flow->handle->mark = 1;
4625         if (sub_flow)
4626                 *sub_flow = dev_flow;
4627 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
4628         dev_flow->dv.table_id = flow_split_info->table_id;
4629 #endif
4630         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
4631 }
4632
4633 /**
4634  * Get the sub policy of a meter.
4635  *
4636  * @param[in] dev
4637  *   Pointer to Ethernet device.
4638  * @param[in] flow
4639  *   Parent flow structure pointer.
4640  * @param wks
4641  *   Pointer to thread flow work space.
4642  * @param[in] attr
4643  *   Flow rule attributes.
4644  * @param[in] items
4645  *   Pattern specification (list terminated by the END pattern item).
4646  * @param[out] error
4647  *   Perform verbose error reporting if not NULL.
4648  *
4649  * @return
4650  *   Pointer to the meter sub policy, NULL otherwise and rte_errno is set.
4651  */
4652 static struct mlx5_flow_meter_sub_policy *
4653 get_meter_sub_policy(struct rte_eth_dev *dev,
4654                      struct rte_flow *flow,
4655                      struct mlx5_flow_workspace *wks,
4656                      const struct rte_flow_attr *attr,
4657                      const struct rte_flow_item items[],
4658                      struct rte_flow_error *error)
4659 {
4660         struct mlx5_flow_meter_policy *policy;
4661         struct mlx5_flow_meter_policy *final_policy;
4662         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
4663
4664         policy = wks->policy;
4665         final_policy = policy->is_hierarchy ? wks->final_policy : policy;
4666         if (final_policy->is_rss || final_policy->is_queue) {
4667                 struct mlx5_flow_rss_desc rss_desc_v[MLX5_MTR_RTE_COLORS];
4668                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS] = {0};
4669                 uint32_t i;
4670
4671                 /**
4672                  * This is a tmp dev_flow,
4673                  * no need to register any matcher for it in translate.
4674                  */
4675                 wks->skip_matcher_reg = 1;
4676                 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
4677                         struct mlx5_flow dev_flow = {0};
4678                         struct mlx5_flow_handle dev_handle = { {0} };
4679
4680                         if (final_policy->is_rss) {
4681                                 const void *rss_act =
4682                                         final_policy->act_cnt[i].rss->conf;
4683                                 struct rte_flow_action rss_actions[2] = {
4684                                         [0] = {
4685                                         .type = RTE_FLOW_ACTION_TYPE_RSS,
4686                                         .conf = rss_act
4687                                         },
4688                                         [1] = {
4689                                         .type = RTE_FLOW_ACTION_TYPE_END,
4690                                         .conf = NULL
4691                                         }
4692                                 };
4693
4694                                 dev_flow.handle = &dev_handle;
4695                                 dev_flow.ingress = attr->ingress;
4696                                 dev_flow.flow = flow;
4697                                 dev_flow.external = 0;
4698 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
4699                                 dev_flow.dv.transfer = attr->transfer;
4700 #endif
4701                                 /**
4702                                  * Translate RSS action to get rss hash fields.
4703                                  */
4704                                 if (flow_drv_translate(dev, &dev_flow, attr,
4705                                                 items, rss_actions, error))
4706                                         goto exit;
4707                                 rss_desc_v[i] = wks->rss_desc;
4708                                 rss_desc_v[i].key_len = MLX5_RSS_HASH_KEY_LEN;
4709                                 rss_desc_v[i].hash_fields =
4710                                                 dev_flow.hash_fields;
4711                                 rss_desc_v[i].queue_num =
4712                                                 rss_desc_v[i].hash_fields ?
4713                                                 rss_desc_v[i].queue_num : 1;
4714                                 rss_desc_v[i].tunnel =
4715                                         !!(dev_flow.handle->layers &
4716                                         MLX5_FLOW_LAYER_TUNNEL);
4717                         } else {
4718                                 /* This is queue action. */
4719                                 rss_desc_v[i] = wks->rss_desc;
4720                                 rss_desc_v[i].key_len = 0;
4721                                 rss_desc_v[i].hash_fields = 0;
4722                                 rss_desc_v[i].queue =
4723                                         &final_policy->act_cnt[i].queue;
4724                                 rss_desc_v[i].queue_num = 1;
4725                         }
4726                         rss_desc[i] = &rss_desc_v[i];
4727                 }
4728                 sub_policy = flow_drv_meter_sub_policy_rss_prepare(dev,
4729                                                 flow, policy, rss_desc);
4730         } else {
4731                 enum mlx5_meter_domain mtr_domain =
4732                         attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
4733                                 attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
4734                                         MLX5_MTR_DOMAIN_INGRESS;
4735                 sub_policy = policy->sub_policys[mtr_domain][0];
4736         }
4737         if (!sub_policy) {
4738                 rte_flow_error_set(error, EINVAL,
4739                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4740                         "Failed to get meter sub-policy.");
4741                 goto exit;
4742         }
4743 exit:
4744         return sub_policy;
4745 }
4746
4747 /**
4748  * Split the meter flow.
4749  *
4750  * As meter flow will split to three sub flow, other than meter
4751  * action, the other actions make sense to only meter accepts
4752  * the packet. If it need to be dropped, no other additional
4753  * actions should be take.
4754  *
4755  * One kind of special action which decapsulates the L3 tunnel
4756  * header will be in the prefix sub flow, as not to take the
4757  * L3 tunnel header into account.
4758  *
4759  * @param[in] dev
4760  *   Pointer to Ethernet device.
4761  * @param[in] flow
4762  *   Parent flow structure pointer.
4763  * @param wks
4764  *   Pointer to thread flow work space.
4765  * @param[in] attr
4766  *   Flow rule attributes.
4767  * @param[in] items
4768  *   Pattern specification (list terminated by the END pattern item).
4769  * @param[out] sfx_items
4770  *   Suffix flow match items (list terminated by the END pattern item).
4771  * @param[in] actions
4772  *   Associated actions (list terminated by the END action).
4773  * @param[out] actions_sfx
4774  *   Suffix flow actions.
4775  * @param[out] actions_pre
4776  *   Prefix flow actions.
4777  * @param[out] mtr_flow_id
4778  *   Pointer to meter flow id.
4779  * @param[out] error
4780  *   Perform verbose error reporting if not NULL.
4781  *
4782  * @return
4783  *   0 on success, a negative errno value otherwise and rte_errno is set.
4784  */
4785 static int
4786 flow_meter_split_prep(struct rte_eth_dev *dev,
4787                       struct rte_flow *flow,
4788                       struct mlx5_flow_workspace *wks,
4789                       const struct rte_flow_attr *attr,
4790                       const struct rte_flow_item items[],
4791                       struct rte_flow_item sfx_items[],
4792                       const struct rte_flow_action actions[],
4793                       struct rte_flow_action actions_sfx[],
4794                       struct rte_flow_action actions_pre[],
4795                       uint32_t *mtr_flow_id,
4796                       struct rte_flow_error *error)
4797 {
4798         struct mlx5_priv *priv = dev->data->dev_private;
4799         struct mlx5_flow_meter_info *fm = wks->fm;
4800         struct rte_flow_action *tag_action = NULL;
4801         struct rte_flow_item *tag_item;
4802         struct mlx5_rte_flow_action_set_tag *set_tag;
4803         const struct rte_flow_action_raw_encap *raw_encap;
4804         const struct rte_flow_action_raw_decap *raw_decap;
4805         struct mlx5_rte_flow_item_tag *tag_item_spec;
4806         struct mlx5_rte_flow_item_tag *tag_item_mask;
4807         uint32_t tag_id = 0;
4808         struct rte_flow_item *vlan_item_dst = NULL;
4809         const struct rte_flow_item *vlan_item_src = NULL;
4810         struct rte_flow_action *hw_mtr_action;
4811         struct rte_flow_action *action_pre_head = NULL;
4812         int32_t flow_src_port = priv->representor_id;
4813         bool mtr_first;
4814         uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
4815         uint8_t mtr_reg_bits = priv->mtr_reg_share ?
4816                                 MLX5_MTR_IDLE_BITS_IN_COLOR_REG : MLX5_REG_BITS;
4817         uint32_t flow_id = 0;
4818         uint32_t flow_id_reversed = 0;
4819         uint8_t flow_id_bits = 0;
4820         int shift;
4821
4822         /* Prepare the suffix subflow items. */
4823         tag_item = sfx_items++;
4824         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4825                 struct mlx5_priv *port_priv;
4826                 const struct rte_flow_item_port_id *pid_v;
4827                 int item_type = items->type;
4828
4829                 switch (item_type) {
4830                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4831                         pid_v = items->spec;
4832                         MLX5_ASSERT(pid_v);
4833                         port_priv = mlx5_port_to_eswitch_info(pid_v->id, false);
4834                         if (!port_priv)
4835                                 return rte_flow_error_set(error,
4836                                                 rte_errno,
4837                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
4838                                                 pid_v,
4839                                                 "Failed to get port info.");
4840                         flow_src_port = port_priv->representor_id;
4841                         if (!fm->def_policy && wks->policy->is_hierarchy &&
4842                             flow_src_port != priv->representor_id) {
4843                                 if (flow_drv_mtr_hierarchy_rule_create(dev,
4844                                                                 flow, fm,
4845                                                                 flow_src_port,
4846                                                                 items,
4847                                                                 error))
4848                                         return -rte_errno;
4849                         }
4850                         memcpy(sfx_items, items, sizeof(*sfx_items));
4851                         sfx_items++;
4852                         break;
4853                 case RTE_FLOW_ITEM_TYPE_VLAN:
4854                         /* Determine if copy vlan item below. */
4855                         vlan_item_src = items;
4856                         vlan_item_dst = sfx_items++;
4857                         vlan_item_dst->type = RTE_FLOW_ITEM_TYPE_VOID;
4858                         break;
4859                 default:
4860                         break;
4861                 }
4862         }
4863         sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
4864         sfx_items++;
4865         mtr_first = priv->sh->meter_aso_en &&
4866                 (attr->egress || (attr->transfer && flow_src_port != UINT16_MAX));
4867         /* For ASO meter, meter must be before tag in TX direction. */
4868         if (mtr_first) {
4869                 action_pre_head = actions_pre++;
4870                 /* Leave space for tag action. */
4871                 tag_action = actions_pre++;
4872         }
4873         /* Prepare the actions for prefix and suffix flow. */
4874         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4875                 struct rte_flow_action *action_cur = NULL;
4876
4877                 switch (actions->type) {
4878                 case RTE_FLOW_ACTION_TYPE_METER:
4879                         if (mtr_first) {
4880                                 action_cur = action_pre_head;
4881                         } else {
4882                                 /* Leave space for tag action. */
4883                                 tag_action = actions_pre++;
4884                                 action_cur = actions_pre++;
4885                         }
4886                         break;
4887                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4888                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4889                         action_cur = actions_pre++;
4890                         break;
4891                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4892                         raw_encap = actions->conf;
4893                         if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
4894                                 action_cur = actions_pre++;
4895                         break;
4896                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4897                         raw_decap = actions->conf;
4898                         if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4899                                 action_cur = actions_pre++;
4900                         break;
4901                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4902                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4903                         if (vlan_item_dst && vlan_item_src) {
4904                                 memcpy(vlan_item_dst, vlan_item_src,
4905                                         sizeof(*vlan_item_dst));
4906                                 /*
4907                                  * Convert to internal match item, it is used
4908                                  * for vlan push and set vid.
4909                                  */
4910                                 vlan_item_dst->type = (enum rte_flow_item_type)
4911                                                 MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
4912                         }
4913                         break;
4914                 default:
4915                         break;
4916                 }
4917                 if (!action_cur)
4918                         action_cur = (fm->def_policy) ?
4919                                         actions_sfx++ : actions_pre++;
4920                 memcpy(action_cur, actions, sizeof(struct rte_flow_action));
4921         }
4922         /* Add end action to the actions. */
4923         actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
4924         if (priv->sh->meter_aso_en) {
4925                 /**
4926                  * For ASO meter, need to add an extra jump action explicitly,
4927                  * to jump from meter to policer table.
4928                  */
4929                 struct mlx5_flow_meter_sub_policy *sub_policy;
4930                 struct mlx5_flow_tbl_data_entry *tbl_data;
4931
4932                 if (!fm->def_policy) {
4933                         sub_policy = get_meter_sub_policy(dev, flow, wks,
4934                                                           attr, items, error);
4935                         if (!sub_policy)
4936                                 return -rte_errno;
4937                 } else {
4938                         enum mlx5_meter_domain mtr_domain =
4939                         attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
4940                                 attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
4941                                         MLX5_MTR_DOMAIN_INGRESS;
4942
4943                         sub_policy =
4944                         &priv->sh->mtrmng->def_policy[mtr_domain]->sub_policy;
4945                 }
4946                 tbl_data = container_of(sub_policy->tbl_rsc,
4947                                         struct mlx5_flow_tbl_data_entry, tbl);
4948                 hw_mtr_action = actions_pre++;
4949                 hw_mtr_action->type = (enum rte_flow_action_type)
4950                                       MLX5_RTE_FLOW_ACTION_TYPE_JUMP;
4951                 hw_mtr_action->conf = tbl_data->jump.action;
4952         }
4953         actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
4954         actions_pre++;
4955         if (!tag_action)
4956                 return rte_flow_error_set(error, ENOMEM,
4957                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4958                                         "No tag action space.");
4959         if (!mtr_flow_id) {
4960                 tag_action->type = RTE_FLOW_ACTION_TYPE_VOID;
4961                 goto exit;
4962         }
4963         /* Only default-policy Meter creates mtr flow id. */
4964         if (fm->def_policy) {
4965                 mlx5_ipool_malloc(fm->flow_ipool, &tag_id);
4966                 if (!tag_id)
4967                         return rte_flow_error_set(error, ENOMEM,
4968                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4969                                         "Failed to allocate meter flow id.");
4970                 flow_id = tag_id - 1;
4971                 flow_id_bits = (!flow_id) ? 1 :
4972                                 (MLX5_REG_BITS - __builtin_clz(flow_id));
4973                 if ((flow_id_bits + priv->sh->mtrmng->max_mtr_bits) >
4974                     mtr_reg_bits) {
4975                         mlx5_ipool_free(fm->flow_ipool, tag_id);
4976                         return rte_flow_error_set(error, EINVAL,
4977                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4978                                         "Meter flow id exceeds max limit.");
4979                 }
4980                 if (flow_id_bits > priv->sh->mtrmng->max_mtr_flow_bits)
4981                         priv->sh->mtrmng->max_mtr_flow_bits = flow_id_bits;
4982         }
4983         /* Build tag actions and items for meter_id/meter flow_id. */
4984         set_tag = (struct mlx5_rte_flow_action_set_tag *)actions_pre;
4985         tag_item_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
4986         tag_item_mask = tag_item_spec + 1;
4987         /* Both flow_id and meter_id share the same register. */
4988         *set_tag = (struct mlx5_rte_flow_action_set_tag) {
4989                 .id = (enum modify_reg)mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
4990                                                             0, error),
4991                 .offset = mtr_id_offset,
4992                 .length = mtr_reg_bits,
4993                 .data = flow->meter,
4994         };
4995         /*
4996          * The color Reg bits used by flow_id are growing from
4997          * msb to lsb, so must do bit reverse for flow_id val in RegC.
4998          */
4999         for (shift = 0; shift < flow_id_bits; shift++)
5000                 flow_id_reversed = (flow_id_reversed << 1) |
5001                                 ((flow_id >> shift) & 0x1);
5002         set_tag->data |=
5003                 flow_id_reversed << (mtr_reg_bits - flow_id_bits);
5004         tag_item_spec->id = set_tag->id;
5005         tag_item_spec->data = set_tag->data << mtr_id_offset;
5006         tag_item_mask->data = UINT32_MAX << mtr_id_offset;
5007         tag_action->type = (enum rte_flow_action_type)
5008                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5009         tag_action->conf = set_tag;
5010         tag_item->type = (enum rte_flow_item_type)
5011                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG;
5012         tag_item->spec = tag_item_spec;
5013         tag_item->last = NULL;
5014         tag_item->mask = tag_item_mask;
5015 exit:
5016         if (mtr_flow_id)
5017                 *mtr_flow_id = tag_id;
5018         return 0;
5019 }
5020
5021 /**
5022  * Split action list having QUEUE/RSS for metadata register copy.
5023  *
5024  * Once Q/RSS action is detected in user's action list, the flow action
5025  * should be split in order to copy metadata registers, which will happen in
5026  * RX_CP_TBL like,
5027  *   - CQE->flow_tag := reg_c[1] (MARK)
5028  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
5029  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
5030  * This is because the last action of each flow must be a terminal action
5031  * (QUEUE, RSS or DROP).
5032  *
5033  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
5034  * stored and kept in the mlx5_flow structure per each sub_flow.
5035  *
5036  * The Q/RSS action is replaced with,
5037  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
5038  * And the following JUMP action is added at the end,
5039  *   - JUMP, to RX_CP_TBL.
5040  *
5041  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
5042  * flow_create_split_metadata() routine. The flow will look like,
5043  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
5044  *
5045  * @param dev
5046  *   Pointer to Ethernet device.
5047  * @param[out] split_actions
5048  *   Pointer to store split actions to jump to CP_TBL.
5049  * @param[in] actions
5050  *   Pointer to the list of original flow actions.
5051  * @param[in] qrss
5052  *   Pointer to the Q/RSS action.
5053  * @param[in] actions_n
5054  *   Number of original actions.
5055  * @param[out] error
5056  *   Perform verbose error reporting if not NULL.
5057  *
5058  * @return
5059  *   non-zero unique flow_id on success, otherwise 0 and
5060  *   error/rte_error are set.
5061  */
5062 static uint32_t
5063 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
5064                           struct rte_flow_action *split_actions,
5065                           const struct rte_flow_action *actions,
5066                           const struct rte_flow_action *qrss,
5067                           int actions_n, struct rte_flow_error *error)
5068 {
5069         struct mlx5_priv *priv = dev->data->dev_private;
5070         struct mlx5_rte_flow_action_set_tag *set_tag;
5071         struct rte_flow_action_jump *jump;
5072         const int qrss_idx = qrss - actions;
5073         uint32_t flow_id = 0;
5074         int ret = 0;
5075
5076         /*
5077          * Given actions will be split
5078          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
5079          * - Add jump to mreg CP_TBL.
5080          * As a result, there will be one more action.
5081          */
5082         ++actions_n;
5083         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
5084         set_tag = (void *)(split_actions + actions_n);
5085         /*
5086          * If tag action is not set to void(it means we are not the meter
5087          * suffix flow), add the tag action. Since meter suffix flow already
5088          * has the tag added.
5089          */
5090         if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) {
5091                 /*
5092                  * Allocate the new subflow ID. This one is unique within
5093                  * device and not shared with representors. Otherwise,
5094                  * we would have to resolve multi-thread access synch
5095                  * issue. Each flow on the shared device is appended
5096                  * with source vport identifier, so the resulting
5097                  * flows will be unique in the shared (by master and
5098                  * representors) domain even if they have coinciding
5099                  * IDs.
5100                  */
5101                 mlx5_ipool_malloc(priv->sh->ipool
5102                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id);
5103                 if (!flow_id)
5104                         return rte_flow_error_set(error, ENOMEM,
5105                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5106                                                   NULL, "can't allocate id "
5107                                                   "for split Q/RSS subflow");
5108                 /* Internal SET_TAG action to set flow ID. */
5109                 *set_tag = (struct mlx5_rte_flow_action_set_tag){
5110                         .data = flow_id,
5111                 };
5112                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
5113                 if (ret < 0)
5114                         return ret;
5115                 set_tag->id = ret;
5116                 /* Construct new actions array. */
5117                 /* Replace QUEUE/RSS action. */
5118                 split_actions[qrss_idx] = (struct rte_flow_action){
5119                         .type = (enum rte_flow_action_type)
5120                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5121                         .conf = set_tag,
5122                 };
5123         }
5124         /* JUMP action to jump to mreg copy table (CP_TBL). */
5125         jump = (void *)(set_tag + 1);
5126         *jump = (struct rte_flow_action_jump){
5127                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
5128         };
5129         split_actions[actions_n - 2] = (struct rte_flow_action){
5130                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
5131                 .conf = jump,
5132         };
5133         split_actions[actions_n - 1] = (struct rte_flow_action){
5134                 .type = RTE_FLOW_ACTION_TYPE_END,
5135         };
5136         return flow_id;
5137 }
5138
5139 /**
5140  * Extend the given action list for Tx metadata copy.
5141  *
5142  * Copy the given action list to the ext_actions and add flow metadata register
5143  * copy action in order to copy reg_a set by WQE to reg_c[0].
5144  *
5145  * @param[out] ext_actions
5146  *   Pointer to the extended action list.
5147  * @param[in] actions
5148  *   Pointer to the list of actions.
5149  * @param[in] actions_n
5150  *   Number of actions in the list.
5151  * @param[out] error
5152  *   Perform verbose error reporting if not NULL.
5153  * @param[in] encap_idx
5154  *   The encap action inndex.
5155  *
5156  * @return
5157  *   0 on success, negative value otherwise
5158  */
5159 static int
5160 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
5161                        struct rte_flow_action *ext_actions,
5162                        const struct rte_flow_action *actions,
5163                        int actions_n, struct rte_flow_error *error,
5164                        int encap_idx)
5165 {
5166         struct mlx5_flow_action_copy_mreg *cp_mreg =
5167                 (struct mlx5_flow_action_copy_mreg *)
5168                         (ext_actions + actions_n + 1);
5169         int ret;
5170
5171         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
5172         if (ret < 0)
5173                 return ret;
5174         cp_mreg->dst = ret;
5175         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
5176         if (ret < 0)
5177                 return ret;
5178         cp_mreg->src = ret;
5179         if (encap_idx != 0)
5180                 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
5181         if (encap_idx == actions_n - 1) {
5182                 ext_actions[actions_n - 1] = (struct rte_flow_action){
5183                         .type = (enum rte_flow_action_type)
5184                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5185                         .conf = cp_mreg,
5186                 };
5187                 ext_actions[actions_n] = (struct rte_flow_action){
5188                         .type = RTE_FLOW_ACTION_TYPE_END,
5189                 };
5190         } else {
5191                 ext_actions[encap_idx] = (struct rte_flow_action){
5192                         .type = (enum rte_flow_action_type)
5193                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5194                         .conf = cp_mreg,
5195                 };
5196                 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
5197                                 sizeof(*ext_actions) * (actions_n - encap_idx));
5198         }
5199         return 0;
5200 }
5201
5202 /**
5203  * Check the match action from the action list.
5204  *
5205  * @param[in] actions
5206  *   Pointer to the list of actions.
5207  * @param[in] attr
5208  *   Flow rule attributes.
5209  * @param[in] action
5210  *   The action to be check if exist.
5211  * @param[out] match_action_pos
5212  *   Pointer to the position of the matched action if exists, otherwise is -1.
5213  * @param[out] qrss_action_pos
5214  *   Pointer to the position of the Queue/RSS action if exists, otherwise is -1.
5215  * @param[out] modify_after_mirror
5216  *   Pointer to the flag of modify action after FDB mirroring.
5217  *
5218  * @return
5219  *   > 0 the total number of actions.
5220  *   0 if not found match action in action list.
5221  */
5222 static int
5223 flow_check_match_action(const struct rte_flow_action actions[],
5224                         const struct rte_flow_attr *attr,
5225                         enum rte_flow_action_type action,
5226                         int *match_action_pos, int *qrss_action_pos,
5227                         int *modify_after_mirror)
5228 {
5229         const struct rte_flow_action_sample *sample;
5230         int actions_n = 0;
5231         uint32_t ratio = 0;
5232         int sub_type = 0;
5233         int flag = 0;
5234         int fdb_mirror = 0;
5235
5236         *match_action_pos = -1;
5237         *qrss_action_pos = -1;
5238         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5239                 if (actions->type == action) {
5240                         flag = 1;
5241                         *match_action_pos = actions_n;
5242                 }
5243                 switch (actions->type) {
5244                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5245                 case RTE_FLOW_ACTION_TYPE_RSS:
5246                         *qrss_action_pos = actions_n;
5247                         break;
5248                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
5249                         sample = actions->conf;
5250                         ratio = sample->ratio;
5251                         sub_type = ((const struct rte_flow_action *)
5252                                         (sample->actions))->type;
5253                         if (ratio == 1 && attr->transfer)
5254                                 fdb_mirror = 1;
5255                         break;
5256                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
5257                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
5258                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
5259                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
5260                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
5261                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
5262                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
5263                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
5264                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
5265                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
5266                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5267                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5268                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5269                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5270                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5271                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5272                 case RTE_FLOW_ACTION_TYPE_FLAG:
5273                 case RTE_FLOW_ACTION_TYPE_MARK:
5274                 case RTE_FLOW_ACTION_TYPE_SET_META:
5275                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
5276                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
5277                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5278                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5279                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
5280                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5281                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5282                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5283                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
5284                 case RTE_FLOW_ACTION_TYPE_METER:
5285                         if (fdb_mirror)
5286                                 *modify_after_mirror = 1;
5287                         break;
5288                 default:
5289                         break;
5290                 }
5291                 actions_n++;
5292         }
5293         if (flag && fdb_mirror && !*modify_after_mirror) {
5294                 /* FDB mirroring uses the destination array to implement
5295                  * instead of FLOW_SAMPLER object.
5296                  */
5297                 if (sub_type != RTE_FLOW_ACTION_TYPE_END)
5298                         flag = 0;
5299         }
5300         /* Count RTE_FLOW_ACTION_TYPE_END. */
5301         return flag ? actions_n + 1 : 0;
5302 }
5303
5304 #define SAMPLE_SUFFIX_ITEM 2
5305
5306 /**
5307  * Split the sample flow.
5308  *
5309  * As sample flow will split to two sub flow, sample flow with
5310  * sample action, the other actions will move to new suffix flow.
5311  *
5312  * Also add unique tag id with tag action in the sample flow,
5313  * the same tag id will be as match in the suffix flow.
5314  *
5315  * @param dev
5316  *   Pointer to Ethernet device.
5317  * @param[in] add_tag
5318  *   Add extra tag action flag.
5319  * @param[out] sfx_items
5320  *   Suffix flow match items (list terminated by the END pattern item).
5321  * @param[in] actions
5322  *   Associated actions (list terminated by the END action).
5323  * @param[out] actions_sfx
5324  *   Suffix flow actions.
5325  * @param[out] actions_pre
5326  *   Prefix flow actions.
5327  * @param[in] actions_n
5328  *  The total number of actions.
5329  * @param[in] sample_action_pos
5330  *   The sample action position.
5331  * @param[in] qrss_action_pos
5332  *   The Queue/RSS action position.
5333  * @param[in] jump_table
5334  *   Add extra jump action flag.
5335  * @param[out] error
5336  *   Perform verbose error reporting if not NULL.
5337  *
5338  * @return
5339  *   0 on success, or unique flow_id, a negative errno value
5340  *   otherwise and rte_errno is set.
5341  */
5342 static int
5343 flow_sample_split_prep(struct rte_eth_dev *dev,
5344                        int add_tag,
5345                        struct rte_flow_item sfx_items[],
5346                        const struct rte_flow_action actions[],
5347                        struct rte_flow_action actions_sfx[],
5348                        struct rte_flow_action actions_pre[],
5349                        int actions_n,
5350                        int sample_action_pos,
5351                        int qrss_action_pos,
5352                        int jump_table,
5353                        struct rte_flow_error *error)
5354 {
5355         struct mlx5_priv *priv = dev->data->dev_private;
5356         struct mlx5_rte_flow_action_set_tag *set_tag;
5357         struct mlx5_rte_flow_item_tag *tag_spec;
5358         struct mlx5_rte_flow_item_tag *tag_mask;
5359         struct rte_flow_action_jump *jump_action;
5360         uint32_t tag_id = 0;
5361         int index;
5362         int append_index = 0;
5363         int ret;
5364
5365         if (sample_action_pos < 0)
5366                 return rte_flow_error_set(error, EINVAL,
5367                                           RTE_FLOW_ERROR_TYPE_ACTION,
5368                                           NULL, "invalid position of sample "
5369                                           "action in list");
5370         /* Prepare the actions for prefix and suffix flow. */
5371         if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) {
5372                 index = qrss_action_pos;
5373                 /* Put the preceding the Queue/RSS action into prefix flow. */
5374                 if (index != 0)
5375                         memcpy(actions_pre, actions,
5376                                sizeof(struct rte_flow_action) * index);
5377                 /* Put others preceding the sample action into prefix flow. */
5378                 if (sample_action_pos > index + 1)
5379                         memcpy(actions_pre + index, actions + index + 1,
5380                                sizeof(struct rte_flow_action) *
5381                                (sample_action_pos - index - 1));
5382                 index = sample_action_pos - 1;
5383                 /* Put Queue/RSS action into Suffix flow. */
5384                 memcpy(actions_sfx, actions + qrss_action_pos,
5385                        sizeof(struct rte_flow_action));
5386                 actions_sfx++;
5387         } else {
5388                 index = sample_action_pos;
5389                 if (index != 0)
5390                         memcpy(actions_pre, actions,
5391                                sizeof(struct rte_flow_action) * index);
5392         }
5393         /* For CX5, add an extra tag action for NIC-RX and E-Switch ingress.
5394          * For CX6DX and above, metadata registers Cx preserve their value,
5395          * add an extra tag action for NIC-RX and E-Switch Domain.
5396          */
5397         if (add_tag) {
5398                 /* Prepare the prefix tag action. */
5399                 append_index++;
5400                 set_tag = (void *)(actions_pre + actions_n + append_index);
5401                 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error);
5402                 if (ret < 0)
5403                         return ret;
5404                 mlx5_ipool_malloc(priv->sh->ipool
5405                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id);
5406                 *set_tag = (struct mlx5_rte_flow_action_set_tag) {
5407                         .id = ret,
5408                         .data = tag_id,
5409                 };
5410                 /* Prepare the suffix subflow items. */
5411                 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM);
5412                 tag_spec->data = tag_id;
5413                 tag_spec->id = set_tag->id;
5414                 tag_mask = tag_spec + 1;
5415                 tag_mask->data = UINT32_MAX;
5416                 sfx_items[0] = (struct rte_flow_item){
5417                         .type = (enum rte_flow_item_type)
5418                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5419                         .spec = tag_spec,
5420                         .last = NULL,
5421                         .mask = tag_mask,
5422                 };
5423                 sfx_items[1] = (struct rte_flow_item){
5424                         .type = (enum rte_flow_item_type)
5425                                 RTE_FLOW_ITEM_TYPE_END,
5426                 };
5427                 /* Prepare the tag action in prefix subflow. */
5428                 actions_pre[index++] =
5429                         (struct rte_flow_action){
5430                         .type = (enum rte_flow_action_type)
5431                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5432                         .conf = set_tag,
5433                 };
5434         }
5435         memcpy(actions_pre + index, actions + sample_action_pos,
5436                sizeof(struct rte_flow_action));
5437         index += 1;
5438         /* For the modify action after the sample action in E-Switch mirroring,
5439          * Add the extra jump action in prefix subflow and jump into the next
5440          * table, then do the modify action in the new table.
5441          */
5442         if (jump_table) {
5443                 /* Prepare the prefix jump action. */
5444                 append_index++;
5445                 jump_action = (void *)(actions_pre + actions_n + append_index);
5446                 jump_action->group = jump_table;
5447                 actions_pre[index++] =
5448                         (struct rte_flow_action){
5449                         .type = (enum rte_flow_action_type)
5450                                 RTE_FLOW_ACTION_TYPE_JUMP,
5451                         .conf = jump_action,
5452                 };
5453         }
5454         actions_pre[index] = (struct rte_flow_action){
5455                 .type = (enum rte_flow_action_type)
5456                         RTE_FLOW_ACTION_TYPE_END,
5457         };
5458         /* Put the actions after sample into Suffix flow. */
5459         memcpy(actions_sfx, actions + sample_action_pos + 1,
5460                sizeof(struct rte_flow_action) *
5461                (actions_n - sample_action_pos - 1));
5462         return tag_id;
5463 }
5464
5465 /**
5466  * The splitting for metadata feature.
5467  *
5468  * - Q/RSS action on NIC Rx should be split in order to pass by
5469  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
5470  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
5471  *
5472  * - All the actions on NIC Tx should have a mreg copy action to
5473  *   copy reg_a from WQE to reg_c[0].
5474  *
5475  * @param dev
5476  *   Pointer to Ethernet device.
5477  * @param[in] flow
5478  *   Parent flow structure pointer.
5479  * @param[in] attr
5480  *   Flow rule attributes.
5481  * @param[in] items
5482  *   Pattern specification (list terminated by the END pattern item).
5483  * @param[in] actions
5484  *   Associated actions (list terminated by the END action).
5485  * @param[in] flow_split_info
5486  *   Pointer to flow split info structure.
5487  * @param[out] error
5488  *   Perform verbose error reporting if not NULL.
5489  * @return
5490  *   0 on success, negative value otherwise
5491  */
5492 static int
5493 flow_create_split_metadata(struct rte_eth_dev *dev,
5494                            struct rte_flow *flow,
5495                            const struct rte_flow_attr *attr,
5496                            const struct rte_flow_item items[],
5497                            const struct rte_flow_action actions[],
5498                            struct mlx5_flow_split_info *flow_split_info,
5499                            struct rte_flow_error *error)
5500 {
5501         struct mlx5_priv *priv = dev->data->dev_private;
5502         struct mlx5_dev_config *config = &priv->config;
5503         const struct rte_flow_action *qrss = NULL;
5504         struct rte_flow_action *ext_actions = NULL;
5505         struct mlx5_flow *dev_flow = NULL;
5506         uint32_t qrss_id = 0;
5507         int mtr_sfx = 0;
5508         size_t act_size;
5509         int actions_n;
5510         int encap_idx;
5511         int ret;
5512
5513         /* Check whether extensive metadata feature is engaged. */
5514         if (!config->dv_flow_en ||
5515             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
5516             !mlx5_flow_ext_mreg_supported(dev))
5517                 return flow_create_split_inner(dev, flow, NULL, attr, items,
5518                                                actions, flow_split_info, error);
5519         actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
5520                                                            &encap_idx);
5521         if (qrss) {
5522                 /* Exclude hairpin flows from splitting. */
5523                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
5524                         const struct rte_flow_action_queue *queue;
5525
5526                         queue = qrss->conf;
5527                         if (mlx5_rxq_get_type(dev, queue->index) ==
5528                             MLX5_RXQ_TYPE_HAIRPIN)
5529                                 qrss = NULL;
5530                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
5531                         const struct rte_flow_action_rss *rss;
5532
5533                         rss = qrss->conf;
5534                         if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
5535                             MLX5_RXQ_TYPE_HAIRPIN)
5536                                 qrss = NULL;
5537                 }
5538         }
5539         if (qrss) {
5540                 /* Check if it is in meter suffix table. */
5541                 mtr_sfx = attr->group == (attr->transfer ?
5542                           (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
5543                           MLX5_FLOW_TABLE_LEVEL_METER);
5544                 /*
5545                  * Q/RSS action on NIC Rx should be split in order to pass by
5546                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
5547                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
5548                  */
5549                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5550                            sizeof(struct rte_flow_action_set_tag) +
5551                            sizeof(struct rte_flow_action_jump);
5552                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5553                                           SOCKET_ID_ANY);
5554                 if (!ext_actions)
5555                         return rte_flow_error_set(error, ENOMEM,
5556                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5557                                                   NULL, "no memory to split "
5558                                                   "metadata flow");
5559                 /*
5560                  * If we are the suffix flow of meter, tag already exist.
5561                  * Set the tag action to void.
5562                  */
5563                 if (mtr_sfx)
5564                         ext_actions[qrss - actions].type =
5565                                                 RTE_FLOW_ACTION_TYPE_VOID;
5566                 else
5567                         ext_actions[qrss - actions].type =
5568                                                 (enum rte_flow_action_type)
5569                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5570                 /*
5571                  * Create the new actions list with removed Q/RSS action
5572                  * and appended set tag and jump to register copy table
5573                  * (RX_CP_TBL). We should preallocate unique tag ID here
5574                  * in advance, because it is needed for set tag action.
5575                  */
5576                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
5577                                                     qrss, actions_n, error);
5578                 if (!mtr_sfx && !qrss_id) {
5579                         ret = -rte_errno;
5580                         goto exit;
5581                 }
5582         } else if (attr->egress && !attr->transfer) {
5583                 /*
5584                  * All the actions on NIC Tx should have a metadata register
5585                  * copy action to copy reg_a from WQE to reg_c[meta]
5586                  */
5587                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5588                            sizeof(struct mlx5_flow_action_copy_mreg);
5589                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5590                                           SOCKET_ID_ANY);
5591                 if (!ext_actions)
5592                         return rte_flow_error_set(error, ENOMEM,
5593                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5594                                                   NULL, "no memory to split "
5595                                                   "metadata flow");
5596                 /* Create the action list appended with copy register. */
5597                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
5598                                              actions_n, error, encap_idx);
5599                 if (ret < 0)
5600                         goto exit;
5601         }
5602         /* Add the unmodified original or prefix subflow. */
5603         ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
5604                                       items, ext_actions ? ext_actions :
5605                                       actions, flow_split_info, error);
5606         if (ret < 0)
5607                 goto exit;
5608         MLX5_ASSERT(dev_flow);
5609         if (qrss) {
5610                 const struct rte_flow_attr q_attr = {
5611                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5612                         .ingress = 1,
5613                 };
5614                 /* Internal PMD action to set register. */
5615                 struct mlx5_rte_flow_item_tag q_tag_spec = {
5616                         .data = qrss_id,
5617                         .id = REG_NON,
5618                 };
5619                 struct rte_flow_item q_items[] = {
5620                         {
5621                                 .type = (enum rte_flow_item_type)
5622                                         MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5623                                 .spec = &q_tag_spec,
5624                                 .last = NULL,
5625                                 .mask = NULL,
5626                         },
5627                         {
5628                                 .type = RTE_FLOW_ITEM_TYPE_END,
5629                         },
5630                 };
5631                 struct rte_flow_action q_actions[] = {
5632                         {
5633                                 .type = qrss->type,
5634                                 .conf = qrss->conf,
5635                         },
5636                         {
5637                                 .type = RTE_FLOW_ACTION_TYPE_END,
5638                         },
5639                 };
5640                 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
5641
5642                 /*
5643                  * Configure the tag item only if there is no meter subflow.
5644                  * Since tag is already marked in the meter suffix subflow
5645                  * we can just use the meter suffix items as is.
5646                  */
5647                 if (qrss_id) {
5648                         /* Not meter subflow. */
5649                         MLX5_ASSERT(!mtr_sfx);
5650                         /*
5651                          * Put unique id in prefix flow due to it is destroyed
5652                          * after suffix flow and id will be freed after there
5653                          * is no actual flows with this id and identifier
5654                          * reallocation becomes possible (for example, for
5655                          * other flows in other threads).
5656                          */
5657                         dev_flow->handle->split_flow_id = qrss_id;
5658                         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
5659                                                    error);
5660                         if (ret < 0)
5661                                 goto exit;
5662                         q_tag_spec.id = ret;
5663                 }
5664                 dev_flow = NULL;
5665                 /* Add suffix subflow to execute Q/RSS. */
5666                 flow_split_info->prefix_layers = layers;
5667                 flow_split_info->prefix_mark = 0;
5668                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5669                                               &q_attr, mtr_sfx ? items :
5670                                               q_items, q_actions,
5671                                               flow_split_info, error);
5672                 if (ret < 0)
5673                         goto exit;
5674                 /* qrss ID should be freed if failed. */
5675                 qrss_id = 0;
5676                 MLX5_ASSERT(dev_flow);
5677         }
5678
5679 exit:
5680         /*
5681          * We do not destroy the partially created sub_flows in case of error.
5682          * These ones are included into parent flow list and will be destroyed
5683          * by flow_drv_destroy.
5684          */
5685         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
5686                         qrss_id);
5687         mlx5_free(ext_actions);
5688         return ret;
5689 }
5690
5691 /**
5692  * Create meter internal drop flow with the original pattern.
5693  *
5694  * @param dev
5695  *   Pointer to Ethernet device.
5696  * @param[in] flow
5697  *   Parent flow structure pointer.
5698  * @param[in] attr
5699  *   Flow rule attributes.
5700  * @param[in] items
5701  *   Pattern specification (list terminated by the END pattern item).
5702  * @param[in] flow_split_info
5703  *   Pointer to flow split info structure.
5704  * @param[in] fm
5705  *   Pointer to flow meter structure.
5706  * @param[out] error
5707  *   Perform verbose error reporting if not NULL.
5708  * @return
5709  *   0 on success, negative value otherwise
5710  */
5711 static uint32_t
5712 flow_meter_create_drop_flow_with_org_pattern(struct rte_eth_dev *dev,
5713                         struct rte_flow *flow,
5714                         const struct rte_flow_attr *attr,
5715                         const struct rte_flow_item items[],
5716                         struct mlx5_flow_split_info *flow_split_info,
5717                         struct mlx5_flow_meter_info *fm,
5718                         struct rte_flow_error *error)
5719 {
5720         struct mlx5_flow *dev_flow = NULL;
5721         struct rte_flow_attr drop_attr = *attr;
5722         struct rte_flow_action drop_actions[3];
5723         struct mlx5_flow_split_info drop_split_info = *flow_split_info;
5724
5725         MLX5_ASSERT(fm->drop_cnt);
5726         drop_actions[0].type =
5727                 (enum rte_flow_action_type)MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
5728         drop_actions[0].conf = (void *)(uintptr_t)fm->drop_cnt;
5729         drop_actions[1].type = RTE_FLOW_ACTION_TYPE_DROP;
5730         drop_actions[1].conf = NULL;
5731         drop_actions[2].type = RTE_FLOW_ACTION_TYPE_END;
5732         drop_actions[2].conf = NULL;
5733         drop_split_info.external = false;
5734         drop_split_info.skip_scale |= 1 << MLX5_SCALE_FLOW_GROUP_BIT;
5735         drop_split_info.table_id = MLX5_MTR_TABLE_ID_DROP;
5736         drop_attr.group = MLX5_FLOW_TABLE_LEVEL_METER;
5737         return flow_create_split_inner(dev, flow, &dev_flow,
5738                                 &drop_attr, items, drop_actions,
5739                                 &drop_split_info, error);
5740 }
5741
5742 /**
5743  * The splitting for meter feature.
5744  *
5745  * - The meter flow will be split to two flows as prefix and
5746  *   suffix flow. The packets make sense only it pass the prefix
5747  *   meter action.
5748  *
5749  * - Reg_C_5 is used for the packet to match betweend prefix and
5750  *   suffix flow.
5751  *
5752  * @param dev
5753  *   Pointer to Ethernet device.
5754  * @param[in] flow
5755  *   Parent flow structure pointer.
5756  * @param[in] attr
5757  *   Flow rule attributes.
5758  * @param[in] items
5759  *   Pattern specification (list terminated by the END pattern item).
5760  * @param[in] actions
5761  *   Associated actions (list terminated by the END action).
5762  * @param[in] flow_split_info
5763  *   Pointer to flow split info structure.
5764  * @param[out] error
5765  *   Perform verbose error reporting if not NULL.
5766  * @return
5767  *   0 on success, negative value otherwise
5768  */
5769 static int
5770 flow_create_split_meter(struct rte_eth_dev *dev,
5771                         struct rte_flow *flow,
5772                         const struct rte_flow_attr *attr,
5773                         const struct rte_flow_item items[],
5774                         const struct rte_flow_action actions[],
5775                         struct mlx5_flow_split_info *flow_split_info,
5776                         struct rte_flow_error *error)
5777 {
5778         struct mlx5_priv *priv = dev->data->dev_private;
5779         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
5780         struct rte_flow_action *sfx_actions = NULL;
5781         struct rte_flow_action *pre_actions = NULL;
5782         struct rte_flow_item *sfx_items = NULL;
5783         struct mlx5_flow *dev_flow = NULL;
5784         struct rte_flow_attr sfx_attr = *attr;
5785         struct mlx5_flow_meter_info *fm = NULL;
5786         uint8_t skip_scale_restore;
5787         bool has_mtr = false;
5788         bool has_modify = false;
5789         bool set_mtr_reg = true;
5790         bool is_mtr_hierarchy = false;
5791         uint32_t meter_id = 0;
5792         uint32_t mtr_idx = 0;
5793         uint32_t mtr_flow_id = 0;
5794         size_t act_size;
5795         size_t item_size;
5796         int actions_n = 0;
5797         int ret = 0;
5798
5799         if (priv->mtr_en)
5800                 actions_n = flow_check_meter_action(dev, actions, &has_mtr,
5801                                                     &has_modify, &meter_id);
5802         if (has_mtr) {
5803                 if (flow->meter) {
5804                         fm = flow_dv_meter_find_by_idx(priv, flow->meter);
5805                         if (!fm)
5806                                 return rte_flow_error_set(error, EINVAL,
5807                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5808                                                 NULL, "Meter not found.");
5809                 } else {
5810                         fm = mlx5_flow_meter_find(priv, meter_id, &mtr_idx);
5811                         if (!fm)
5812                                 return rte_flow_error_set(error, EINVAL,
5813                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5814                                                 NULL, "Meter not found.");
5815                         ret = mlx5_flow_meter_attach(priv, fm,
5816                                                      &sfx_attr, error);
5817                         if (ret)
5818                                 return -rte_errno;
5819                         flow->meter = mtr_idx;
5820                 }
5821                 MLX5_ASSERT(wks);
5822                 wks->fm = fm;
5823                 if (!fm->def_policy) {
5824                         wks->policy = mlx5_flow_meter_policy_find(dev,
5825                                                                   fm->policy_id,
5826                                                                   NULL);
5827                         MLX5_ASSERT(wks->policy);
5828                         if (wks->policy->is_hierarchy) {
5829                                 wks->final_policy =
5830                                 mlx5_flow_meter_hierarchy_get_final_policy(dev,
5831                                                                 wks->policy);
5832                                 if (!wks->final_policy)
5833                                         return rte_flow_error_set(error,
5834                                         EINVAL,
5835                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5836                                 "Failed to find terminal policy of hierarchy.");
5837                                 is_mtr_hierarchy = true;
5838                         }
5839                 }
5840                 /*
5841                  * If it isn't default-policy Meter, and
5842                  * 1. There's no action in flow to change
5843                  *    packet (modify/encap/decap etc.), OR
5844                  * 2. No drop count needed for this meter.
5845                  * 3. It's not meter hierarchy.
5846                  * Then no need to use regC to save meter id anymore.
5847                  */
5848                 if (!fm->def_policy && !is_mtr_hierarchy &&
5849                     (!has_modify || !fm->drop_cnt))
5850                         set_mtr_reg = false;
5851                 /* Prefix actions: meter, decap, encap, tag, jump, end. */
5852                 act_size = sizeof(struct rte_flow_action) * (actions_n + 6) +
5853                            sizeof(struct mlx5_rte_flow_action_set_tag);
5854                 /* Suffix items: tag, vlan, port id, end. */
5855 #define METER_SUFFIX_ITEM 4
5856                 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
5857                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
5858                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size),
5859                                           0, SOCKET_ID_ANY);
5860                 if (!sfx_actions)
5861                         return rte_flow_error_set(error, ENOMEM,
5862                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5863                                                   NULL, "no memory to split "
5864                                                   "meter flow");
5865                 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
5866                              act_size);
5867                 /* There's no suffix flow for meter of non-default policy. */
5868                 if (!fm->def_policy)
5869                         pre_actions = sfx_actions + 1;
5870                 else
5871                         pre_actions = sfx_actions + actions_n;
5872                 ret = flow_meter_split_prep(dev, flow, wks, &sfx_attr,
5873                                             items, sfx_items, actions,
5874                                             sfx_actions, pre_actions,
5875                                             (set_mtr_reg ? &mtr_flow_id : NULL),
5876                                             error);
5877                 if (ret) {
5878                         ret = -rte_errno;
5879                         goto exit;
5880                 }
5881                 /* Add the prefix subflow. */
5882                 flow_split_info->prefix_mark = 0;
5883                 skip_scale_restore = flow_split_info->skip_scale;
5884                 flow_split_info->skip_scale |=
5885                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
5886                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5887                                               attr, items, pre_actions,
5888                                               flow_split_info, error);
5889                 flow_split_info->skip_scale = skip_scale_restore;
5890                 if (ret) {
5891                         if (mtr_flow_id)
5892                                 mlx5_ipool_free(fm->flow_ipool, mtr_flow_id);
5893                         ret = -rte_errno;
5894                         goto exit;
5895                 }
5896                 if (mtr_flow_id) {
5897                         dev_flow->handle->split_flow_id = mtr_flow_id;
5898                         dev_flow->handle->is_meter_flow_id = 1;
5899                 }
5900                 if (!fm->def_policy) {
5901                         if (!set_mtr_reg && fm->drop_cnt)
5902                                 ret =
5903                         flow_meter_create_drop_flow_with_org_pattern(dev, flow,
5904                                                         &sfx_attr, items,
5905                                                         flow_split_info,
5906                                                         fm, error);
5907                         goto exit;
5908                 }
5909                 /* Setting the sfx group atrr. */
5910                 sfx_attr.group = sfx_attr.transfer ?
5911                                 (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
5912                                  MLX5_FLOW_TABLE_LEVEL_METER;
5913                 flow_split_info->prefix_layers =
5914                                 flow_get_prefix_layer_flags(dev_flow);
5915                 flow_split_info->prefix_mark = dev_flow->handle->mark;
5916                 flow_split_info->table_id = MLX5_MTR_TABLE_ID_SUFFIX;
5917         }
5918         /* Add the prefix subflow. */
5919         ret = flow_create_split_metadata(dev, flow,
5920                                          &sfx_attr, sfx_items ?
5921                                          sfx_items : items,
5922                                          sfx_actions ? sfx_actions : actions,
5923                                          flow_split_info, error);
5924 exit:
5925         if (sfx_actions)
5926                 mlx5_free(sfx_actions);
5927         return ret;
5928 }
5929
5930 /**
5931  * The splitting for sample feature.
5932  *
5933  * Once Sample action is detected in the action list, the flow actions should
5934  * be split into prefix sub flow and suffix sub flow.
5935  *
5936  * The original items remain in the prefix sub flow, all actions preceding the
5937  * sample action and the sample action itself will be copied to the prefix
5938  * sub flow, the actions following the sample action will be copied to the
5939  * suffix sub flow, Queue action always be located in the suffix sub flow.
5940  *
5941  * In order to make the packet from prefix sub flow matches with suffix sub
5942  * flow, an extra tag action be added into prefix sub flow, and the suffix sub
5943  * flow uses tag item with the unique flow id.
5944  *
5945  * @param dev
5946  *   Pointer to Ethernet device.
5947  * @param[in] flow
5948  *   Parent flow structure pointer.
5949  * @param[in] attr
5950  *   Flow rule attributes.
5951  * @param[in] items
5952  *   Pattern specification (list terminated by the END pattern item).
5953  * @param[in] actions
5954  *   Associated actions (list terminated by the END action).
5955  * @param[in] flow_split_info
5956  *   Pointer to flow split info structure.
5957  * @param[out] error
5958  *   Perform verbose error reporting if not NULL.
5959  * @return
5960  *   0 on success, negative value otherwise
5961  */
5962 static int
5963 flow_create_split_sample(struct rte_eth_dev *dev,
5964                          struct rte_flow *flow,
5965                          const struct rte_flow_attr *attr,
5966                          const struct rte_flow_item items[],
5967                          const struct rte_flow_action actions[],
5968                          struct mlx5_flow_split_info *flow_split_info,
5969                          struct rte_flow_error *error)
5970 {
5971         struct mlx5_priv *priv = dev->data->dev_private;
5972         struct rte_flow_action *sfx_actions = NULL;
5973         struct rte_flow_action *pre_actions = NULL;
5974         struct rte_flow_item *sfx_items = NULL;
5975         struct mlx5_flow *dev_flow = NULL;
5976         struct rte_flow_attr sfx_attr = *attr;
5977 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5978         struct mlx5_flow_dv_sample_resource *sample_res;
5979         struct mlx5_flow_tbl_data_entry *sfx_tbl_data;
5980         struct mlx5_flow_tbl_resource *sfx_tbl;
5981 #endif
5982         size_t act_size;
5983         size_t item_size;
5984         uint32_t fdb_tx = 0;
5985         int32_t tag_id = 0;
5986         int actions_n = 0;
5987         int sample_action_pos;
5988         int qrss_action_pos;
5989         int add_tag = 0;
5990         int modify_after_mirror = 0;
5991         uint16_t jump_table = 0;
5992         const uint32_t next_ft_step = 1;
5993         int ret = 0;
5994
5995         if (priv->sampler_en)
5996                 actions_n = flow_check_match_action(actions, attr,
5997                                         RTE_FLOW_ACTION_TYPE_SAMPLE,
5998                                         &sample_action_pos, &qrss_action_pos,
5999                                         &modify_after_mirror);
6000         if (actions_n) {
6001                 /* The prefix actions must includes sample, tag, end. */
6002                 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1)
6003                            + sizeof(struct mlx5_rte_flow_action_set_tag);
6004                 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM +
6005                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
6006                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size +
6007                                           item_size), 0, SOCKET_ID_ANY);
6008                 if (!sfx_actions)
6009                         return rte_flow_error_set(error, ENOMEM,
6010                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6011                                                   NULL, "no memory to split "
6012                                                   "sample flow");
6013                 /* The representor_id is UINT16_MAX for uplink. */
6014                 fdb_tx = (attr->transfer && priv->representor_id != UINT16_MAX);
6015                 /*
6016                  * When reg_c_preserve is set, metadata registers Cx preserve
6017                  * their value even through packet duplication.
6018                  */
6019                 add_tag = (!fdb_tx || priv->config.hca_attr.reg_c_preserve);
6020                 if (add_tag)
6021                         sfx_items = (struct rte_flow_item *)((char *)sfx_actions
6022                                         + act_size);
6023                 if (modify_after_mirror)
6024                         jump_table = attr->group * MLX5_FLOW_TABLE_FACTOR +
6025                                      next_ft_step;
6026                 pre_actions = sfx_actions + actions_n;
6027                 tag_id = flow_sample_split_prep(dev, add_tag, sfx_items,
6028                                                 actions, sfx_actions,
6029                                                 pre_actions, actions_n,
6030                                                 sample_action_pos,
6031                                                 qrss_action_pos, jump_table,
6032                                                 error);
6033                 if (tag_id < 0 || (add_tag && !tag_id)) {
6034                         ret = -rte_errno;
6035                         goto exit;
6036                 }
6037                 if (modify_after_mirror)
6038                         flow_split_info->skip_scale =
6039                                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
6040                 /* Add the prefix subflow. */
6041                 ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
6042                                               items, pre_actions,
6043                                               flow_split_info, error);
6044                 if (ret) {
6045                         ret = -rte_errno;
6046                         goto exit;
6047                 }
6048                 dev_flow->handle->split_flow_id = tag_id;
6049 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
6050                 if (!modify_after_mirror) {
6051                         /* Set the sfx group attr. */
6052                         sample_res = (struct mlx5_flow_dv_sample_resource *)
6053                                                 dev_flow->dv.sample_res;
6054                         sfx_tbl = (struct mlx5_flow_tbl_resource *)
6055                                                 sample_res->normal_path_tbl;
6056                         sfx_tbl_data = container_of(sfx_tbl,
6057                                                 struct mlx5_flow_tbl_data_entry,
6058                                                 tbl);
6059                         sfx_attr.group = sfx_attr.transfer ?
6060                         (sfx_tbl_data->level - 1) : sfx_tbl_data->level;
6061                 } else {
6062                         MLX5_ASSERT(attr->transfer);
6063                         sfx_attr.group = jump_table;
6064                 }
6065                 flow_split_info->prefix_layers =
6066                                 flow_get_prefix_layer_flags(dev_flow);
6067                 flow_split_info->prefix_mark = dev_flow->handle->mark;
6068                 /* Suffix group level already be scaled with factor, set
6069                  * MLX5_SCALE_FLOW_GROUP_BIT of skip_scale to 1 to avoid scale
6070                  * again in translation.
6071                  */
6072                 flow_split_info->skip_scale = 1 << MLX5_SCALE_FLOW_GROUP_BIT;
6073 #endif
6074         }
6075         /* Add the suffix subflow. */
6076         ret = flow_create_split_meter(dev, flow, &sfx_attr,
6077                                       sfx_items ? sfx_items : items,
6078                                       sfx_actions ? sfx_actions : actions,
6079                                       flow_split_info, error);
6080 exit:
6081         if (sfx_actions)
6082                 mlx5_free(sfx_actions);
6083         return ret;
6084 }
6085
6086 /**
6087  * Split the flow to subflow set. The splitters might be linked
6088  * in the chain, like this:
6089  * flow_create_split_outer() calls:
6090  *   flow_create_split_meter() calls:
6091  *     flow_create_split_metadata(meter_subflow_0) calls:
6092  *       flow_create_split_inner(metadata_subflow_0)
6093  *       flow_create_split_inner(metadata_subflow_1)
6094  *       flow_create_split_inner(metadata_subflow_2)
6095  *     flow_create_split_metadata(meter_subflow_1) calls:
6096  *       flow_create_split_inner(metadata_subflow_0)
6097  *       flow_create_split_inner(metadata_subflow_1)
6098  *       flow_create_split_inner(metadata_subflow_2)
6099  *
6100  * This provide flexible way to add new levels of flow splitting.
6101  * The all of successfully created subflows are included to the
6102  * parent flow dev_flow list.
6103  *
6104  * @param dev
6105  *   Pointer to Ethernet device.
6106  * @param[in] flow
6107  *   Parent flow structure pointer.
6108  * @param[in] attr
6109  *   Flow rule attributes.
6110  * @param[in] items
6111  *   Pattern specification (list terminated by the END pattern item).
6112  * @param[in] actions
6113  *   Associated actions (list terminated by the END action).
6114  * @param[in] flow_split_info
6115  *   Pointer to flow split info structure.
6116  * @param[out] error
6117  *   Perform verbose error reporting if not NULL.
6118  * @return
6119  *   0 on success, negative value otherwise
6120  */
6121 static int
6122 flow_create_split_outer(struct rte_eth_dev *dev,
6123                         struct rte_flow *flow,
6124                         const struct rte_flow_attr *attr,
6125                         const struct rte_flow_item items[],
6126                         const struct rte_flow_action actions[],
6127                         struct mlx5_flow_split_info *flow_split_info,
6128                         struct rte_flow_error *error)
6129 {
6130         int ret;
6131
6132         ret = flow_create_split_sample(dev, flow, attr, items,
6133                                        actions, flow_split_info, error);
6134         MLX5_ASSERT(ret <= 0);
6135         return ret;
6136 }
6137
6138 static inline struct mlx5_flow_tunnel *
6139 flow_tunnel_from_rule(const struct mlx5_flow *flow)
6140 {
6141         struct mlx5_flow_tunnel *tunnel;
6142
6143 #pragma GCC diagnostic push
6144 #pragma GCC diagnostic ignored "-Wcast-qual"
6145         tunnel = (typeof(tunnel))flow->tunnel;
6146 #pragma GCC diagnostic pop
6147
6148         return tunnel;
6149 }
6150
6151 /**
6152  * Adjust flow RSS workspace if needed.
6153  *
6154  * @param wks
6155  *   Pointer to thread flow work space.
6156  * @param rss_desc
6157  *   Pointer to RSS descriptor.
6158  * @param[in] nrssq_num
6159  *   New RSS queue number.
6160  *
6161  * @return
6162  *   0 on success, -1 otherwise and rte_errno is set.
6163  */
6164 static int
6165 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks,
6166                           struct mlx5_flow_rss_desc *rss_desc,
6167                           uint32_t nrssq_num)
6168 {
6169         if (likely(nrssq_num <= wks->rssq_num))
6170                 return 0;
6171         rss_desc->queue = realloc(rss_desc->queue,
6172                           sizeof(*rss_desc->queue) * RTE_ALIGN(nrssq_num, 2));
6173         if (!rss_desc->queue) {
6174                 rte_errno = ENOMEM;
6175                 return -1;
6176         }
6177         wks->rssq_num = RTE_ALIGN(nrssq_num, 2);
6178         return 0;
6179 }
6180
6181 /**
6182  * Create a flow and add it to @p list.
6183  *
6184  * @param dev
6185  *   Pointer to Ethernet device.
6186  * @param list
6187  *   Pointer to a TAILQ flow list. If this parameter NULL,
6188  *   no list insertion occurred, flow is just created,
6189  *   this is caller's responsibility to track the
6190  *   created flow.
6191  * @param[in] attr
6192  *   Flow rule attributes.
6193  * @param[in] items
6194  *   Pattern specification (list terminated by the END pattern item).
6195  * @param[in] actions
6196  *   Associated actions (list terminated by the END action).
6197  * @param[in] external
6198  *   This flow rule is created by request external to PMD.
6199  * @param[out] error
6200  *   Perform verbose error reporting if not NULL.
6201  *
6202  * @return
6203  *   A flow index on success, 0 otherwise and rte_errno is set.
6204  */
6205 static uint32_t
6206 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
6207                  const struct rte_flow_attr *attr,
6208                  const struct rte_flow_item items[],
6209                  const struct rte_flow_action original_actions[],
6210                  bool external, struct rte_flow_error *error)
6211 {
6212         struct mlx5_priv *priv = dev->data->dev_private;
6213         struct rte_flow *flow = NULL;
6214         struct mlx5_flow *dev_flow;
6215         const struct rte_flow_action_rss *rss = NULL;
6216         struct mlx5_translated_action_handle
6217                 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6218         int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6219         union {
6220                 struct mlx5_flow_expand_rss buf;
6221                 uint8_t buffer[2048];
6222         } expand_buffer;
6223         union {
6224                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6225                 uint8_t buffer[2048];
6226         } actions_rx;
6227         union {
6228                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6229                 uint8_t buffer[2048];
6230         } actions_hairpin_tx;
6231         union {
6232                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
6233                 uint8_t buffer[2048];
6234         } items_tx;
6235         struct mlx5_flow_expand_rss *buf = &expand_buffer.buf;
6236         struct mlx5_flow_rss_desc *rss_desc;
6237         const struct rte_flow_action *p_actions_rx;
6238         uint32_t i;
6239         uint32_t idx = 0;
6240         int hairpin_flow;
6241         struct rte_flow_attr attr_tx = { .priority = 0 };
6242         const struct rte_flow_action *actions;
6243         struct rte_flow_action *translated_actions = NULL;
6244         struct mlx5_flow_tunnel *tunnel;
6245         struct tunnel_default_miss_ctx default_miss_ctx = { 0, };
6246         struct mlx5_flow_workspace *wks = mlx5_flow_push_thread_workspace();
6247         struct mlx5_flow_split_info flow_split_info = {
6248                 .external = !!external,
6249                 .skip_scale = 0,
6250                 .flow_idx = 0,
6251                 .prefix_mark = 0,
6252                 .prefix_layers = 0,
6253                 .table_id = 0
6254         };
6255         int ret;
6256
6257         MLX5_ASSERT(wks);
6258         rss_desc = &wks->rss_desc;
6259         ret = flow_action_handles_translate(dev, original_actions,
6260                                             indir_actions,
6261                                             &indir_actions_n,
6262                                             &translated_actions, error);
6263         if (ret < 0) {
6264                 MLX5_ASSERT(translated_actions == NULL);
6265                 return 0;
6266         }
6267         actions = translated_actions ? translated_actions : original_actions;
6268         p_actions_rx = actions;
6269         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6270         ret = flow_drv_validate(dev, attr, items, p_actions_rx,
6271                                 external, hairpin_flow, error);
6272         if (ret < 0)
6273                 goto error_before_hairpin_split;
6274         flow = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], &idx);
6275         if (!flow) {
6276                 rte_errno = ENOMEM;
6277                 goto error_before_hairpin_split;
6278         }
6279         if (hairpin_flow > 0) {
6280                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
6281                         rte_errno = EINVAL;
6282                         goto error_before_hairpin_split;
6283                 }
6284                 flow_hairpin_split(dev, actions, actions_rx.actions,
6285                                    actions_hairpin_tx.actions, items_tx.items,
6286                                    idx);
6287                 p_actions_rx = actions_rx.actions;
6288         }
6289         flow_split_info.flow_idx = idx;
6290         flow->drv_type = flow_get_drv_type(dev, attr);
6291         MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
6292                     flow->drv_type < MLX5_FLOW_TYPE_MAX);
6293         memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue));
6294         /* RSS Action only works on NIC RX domain */
6295         if (attr->ingress && !attr->transfer)
6296                 rss = flow_get_rss_action(dev, p_actions_rx);
6297         if (rss) {
6298                 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num))
6299                         return 0;
6300                 /*
6301                  * The following information is required by
6302                  * mlx5_flow_hashfields_adjust() in advance.
6303                  */
6304                 rss_desc->level = rss->level;
6305                 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
6306                 rss_desc->types = !rss->types ? ETH_RSS_IP : rss->types;
6307         }
6308         flow->dev_handles = 0;
6309         if (rss && rss->types) {
6310                 unsigned int graph_root;
6311
6312                 graph_root = find_graph_root(items, rss->level);
6313                 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
6314                                            items, rss->types,
6315                                            mlx5_support_expansion, graph_root);
6316                 MLX5_ASSERT(ret > 0 &&
6317                        (unsigned int)ret < sizeof(expand_buffer.buffer));
6318                 if (rte_log_can_log(mlx5_logtype, RTE_LOG_DEBUG)) {
6319                         for (i = 0; i < buf->entries; ++i)
6320                                 mlx5_dbg__print_pattern(buf->entry[i].pattern);
6321                 }
6322         } else {
6323                 buf->entries = 1;
6324                 buf->entry[0].pattern = (void *)(uintptr_t)items;
6325         }
6326         rss_desc->shared_rss = flow_get_shared_rss_action(dev, indir_actions,
6327                                                       indir_actions_n);
6328         for (i = 0; i < buf->entries; ++i) {
6329                 /* Initialize flow split data. */
6330                 flow_split_info.prefix_layers = 0;
6331                 flow_split_info.prefix_mark = 0;
6332                 flow_split_info.skip_scale = 0;
6333                 /*
6334                  * The splitter may create multiple dev_flows,
6335                  * depending on configuration. In the simplest
6336                  * case it just creates unmodified original flow.
6337                  */
6338                 ret = flow_create_split_outer(dev, flow, attr,
6339                                               buf->entry[i].pattern,
6340                                               p_actions_rx, &flow_split_info,
6341                                               error);
6342                 if (ret < 0)
6343                         goto error;
6344                 if (is_flow_tunnel_steer_rule(wks->flows[0].tof_type)) {
6345                         ret = flow_tunnel_add_default_miss(dev, flow, attr,
6346                                                            p_actions_rx,
6347                                                            idx,
6348                                                            wks->flows[0].tunnel,
6349                                                            &default_miss_ctx,
6350                                                            error);
6351                         if (ret < 0) {
6352                                 mlx5_free(default_miss_ctx.queue);
6353                                 goto error;
6354                         }
6355                 }
6356         }
6357         /* Create the tx flow. */
6358         if (hairpin_flow) {
6359                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
6360                 attr_tx.ingress = 0;
6361                 attr_tx.egress = 1;
6362                 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
6363                                          actions_hairpin_tx.actions,
6364                                          idx, error);
6365                 if (!dev_flow)
6366                         goto error;
6367                 dev_flow->flow = flow;
6368                 dev_flow->external = 0;
6369                 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
6370                               dev_flow->handle, next);
6371                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
6372                                          items_tx.items,
6373                                          actions_hairpin_tx.actions, error);
6374                 if (ret < 0)
6375                         goto error;
6376         }
6377         /*
6378          * Update the metadata register copy table. If extensive
6379          * metadata feature is enabled and registers are supported
6380          * we might create the extra rte_flow for each unique
6381          * MARK/FLAG action ID.
6382          *
6383          * The table is updated for ingress Flows only, because
6384          * the egress Flows belong to the different device and
6385          * copy table should be updated in peer NIC Rx domain.
6386          */
6387         if (attr->ingress &&
6388             (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
6389                 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
6390                 if (ret)
6391                         goto error;
6392         }
6393         /*
6394          * If the flow is external (from application) OR device is started,
6395          * OR mreg discover, then apply immediately.
6396          */
6397         if (external || dev->data->dev_started ||
6398             (attr->group == MLX5_FLOW_MREG_CP_TABLE_GROUP &&
6399              attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)) {
6400                 ret = flow_drv_apply(dev, flow, error);
6401                 if (ret < 0)
6402                         goto error;
6403         }
6404         if (list) {
6405                 rte_spinlock_lock(&priv->flow_list_lock);
6406                 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list, idx,
6407                              flow, next);
6408                 rte_spinlock_unlock(&priv->flow_list_lock);
6409         }
6410         flow_rxq_flags_set(dev, flow);
6411         rte_free(translated_actions);
6412         tunnel = flow_tunnel_from_rule(wks->flows);
6413         if (tunnel) {
6414                 flow->tunnel = 1;
6415                 flow->tunnel_id = tunnel->tunnel_id;
6416                 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED);
6417                 mlx5_free(default_miss_ctx.queue);
6418         }
6419         mlx5_flow_pop_thread_workspace();
6420         return idx;
6421 error:
6422         MLX5_ASSERT(flow);
6423         ret = rte_errno; /* Save rte_errno before cleanup. */
6424         flow_mreg_del_copy_action(dev, flow);
6425         flow_drv_destroy(dev, flow);
6426         if (rss_desc->shared_rss)
6427                 __atomic_sub_fetch(&((struct mlx5_shared_action_rss *)
6428                         mlx5_ipool_get
6429                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
6430                         rss_desc->shared_rss))->refcnt, 1, __ATOMIC_RELAXED);
6431         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], idx);
6432         rte_errno = ret; /* Restore rte_errno. */
6433         ret = rte_errno;
6434         rte_errno = ret;
6435         mlx5_flow_pop_thread_workspace();
6436 error_before_hairpin_split:
6437         rte_free(translated_actions);
6438         return 0;
6439 }
6440
6441 /**
6442  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
6443  * incoming packets to table 1.
6444  *
6445  * Other flow rules, requested for group n, will be created in
6446  * e-switch table n+1.
6447  * Jump action to e-switch group n will be created to group n+1.
6448  *
6449  * Used when working in switchdev mode, to utilise advantages of table 1
6450  * and above.
6451  *
6452  * @param dev
6453  *   Pointer to Ethernet device.
6454  *
6455  * @return
6456  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
6457  */
6458 struct rte_flow *
6459 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
6460 {
6461         const struct rte_flow_attr attr = {
6462                 .group = 0,
6463                 .priority = 0,
6464                 .ingress = 1,
6465                 .egress = 0,
6466                 .transfer = 1,
6467         };
6468         const struct rte_flow_item pattern = {
6469                 .type = RTE_FLOW_ITEM_TYPE_END,
6470         };
6471         struct rte_flow_action_jump jump = {
6472                 .group = 1,
6473         };
6474         const struct rte_flow_action actions[] = {
6475                 {
6476                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
6477                         .conf = &jump,
6478                 },
6479                 {
6480                         .type = RTE_FLOW_ACTION_TYPE_END,
6481                 },
6482         };
6483         struct mlx5_priv *priv = dev->data->dev_private;
6484         struct rte_flow_error error;
6485
6486         return (void *)(uintptr_t)flow_list_create(dev, &priv->ctrl_flows,
6487                                                    &attr, &pattern,
6488                                                    actions, false, &error);
6489 }
6490
6491 /**
6492  * Validate a flow supported by the NIC.
6493  *
6494  * @see rte_flow_validate()
6495  * @see rte_flow_ops
6496  */
6497 int
6498 mlx5_flow_validate(struct rte_eth_dev *dev,
6499                    const struct rte_flow_attr *attr,
6500                    const struct rte_flow_item items[],
6501                    const struct rte_flow_action original_actions[],
6502                    struct rte_flow_error *error)
6503 {
6504         int hairpin_flow;
6505         struct mlx5_translated_action_handle
6506                 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6507         int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6508         const struct rte_flow_action *actions;
6509         struct rte_flow_action *translated_actions = NULL;
6510         int ret = flow_action_handles_translate(dev, original_actions,
6511                                                 indir_actions,
6512                                                 &indir_actions_n,
6513                                                 &translated_actions, error);
6514
6515         if (ret)
6516                 return ret;
6517         actions = translated_actions ? translated_actions : original_actions;
6518         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6519         ret = flow_drv_validate(dev, attr, items, actions,
6520                                 true, hairpin_flow, error);
6521         rte_free(translated_actions);
6522         return ret;
6523 }
6524
6525 /**
6526  * Create a flow.
6527  *
6528  * @see rte_flow_create()
6529  * @see rte_flow_ops
6530  */
6531 struct rte_flow *
6532 mlx5_flow_create(struct rte_eth_dev *dev,
6533                  const struct rte_flow_attr *attr,
6534                  const struct rte_flow_item items[],
6535                  const struct rte_flow_action actions[],
6536                  struct rte_flow_error *error)
6537 {
6538         struct mlx5_priv *priv = dev->data->dev_private;
6539
6540         /*
6541          * If the device is not started yet, it is not allowed to created a
6542          * flow from application. PMD default flows and traffic control flows
6543          * are not affected.
6544          */
6545         if (unlikely(!dev->data->dev_started)) {
6546                 DRV_LOG(DEBUG, "port %u is not started when "
6547                         "inserting a flow", dev->data->port_id);
6548                 rte_flow_error_set(error, ENODEV,
6549                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6550                                    NULL,
6551                                    "port not started");
6552                 return NULL;
6553         }
6554
6555         return (void *)(uintptr_t)flow_list_create(dev, &priv->flows,
6556                                   attr, items, actions, true, error);
6557 }
6558
6559 /**
6560  * Destroy a flow in a list.
6561  *
6562  * @param dev
6563  *   Pointer to Ethernet device.
6564  * @param list
6565  *   Pointer to the Indexed flow list. If this parameter NULL,
6566  *   there is no flow removal from the list. Be noted that as
6567  *   flow is add to the indexed list, memory of the indexed
6568  *   list points to maybe changed as flow destroyed.
6569  * @param[in] flow_idx
6570  *   Index of flow to destroy.
6571  */
6572 static void
6573 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
6574                   uint32_t flow_idx)
6575 {
6576         struct mlx5_priv *priv = dev->data->dev_private;
6577         struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
6578                                                [MLX5_IPOOL_RTE_FLOW], flow_idx);
6579
6580         if (!flow)
6581                 return;
6582         /*
6583          * Update RX queue flags only if port is started, otherwise it is
6584          * already clean.
6585          */
6586         if (dev->data->dev_started)
6587                 flow_rxq_flags_trim(dev, flow);
6588         flow_drv_destroy(dev, flow);
6589         if (list) {
6590                 rte_spinlock_lock(&priv->flow_list_lock);
6591                 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list,
6592                              flow_idx, flow, next);
6593                 rte_spinlock_unlock(&priv->flow_list_lock);
6594         }
6595         if (flow->tunnel) {
6596                 struct mlx5_flow_tunnel *tunnel;
6597
6598                 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id);
6599                 RTE_VERIFY(tunnel);
6600                 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
6601                         mlx5_flow_tunnel_free(dev, tunnel);
6602         }
6603         flow_mreg_del_copy_action(dev, flow);
6604         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], flow_idx);
6605 }
6606
6607 /**
6608  * Destroy all flows.
6609  *
6610  * @param dev
6611  *   Pointer to Ethernet device.
6612  * @param list
6613  *   Pointer to the Indexed flow list.
6614  * @param active
6615  *   If flushing is called avtively.
6616  */
6617 void
6618 mlx5_flow_list_flush(struct rte_eth_dev *dev, uint32_t *list, bool active)
6619 {
6620         uint32_t num_flushed = 0;
6621
6622         while (*list) {
6623                 flow_list_destroy(dev, list, *list);
6624                 num_flushed++;
6625         }
6626         if (active) {
6627                 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
6628                         dev->data->port_id, num_flushed);
6629         }
6630 }
6631
6632 /**
6633  * Stop all default actions for flows.
6634  *
6635  * @param dev
6636  *   Pointer to Ethernet device.
6637  */
6638 void
6639 mlx5_flow_stop_default(struct rte_eth_dev *dev)
6640 {
6641         flow_mreg_del_default_copy_action(dev);
6642         flow_rxq_flags_clear(dev);
6643 }
6644
6645 /**
6646  * Start all default actions for flows.
6647  *
6648  * @param dev
6649  *   Pointer to Ethernet device.
6650  * @return
6651  *   0 on success, a negative errno value otherwise and rte_errno is set.
6652  */
6653 int
6654 mlx5_flow_start_default(struct rte_eth_dev *dev)
6655 {
6656         struct rte_flow_error error;
6657
6658         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
6659         return flow_mreg_add_default_copy_action(dev, &error);
6660 }
6661
6662 /**
6663  * Release key of thread specific flow workspace data.
6664  */
6665 void
6666 flow_release_workspace(void *data)
6667 {
6668         struct mlx5_flow_workspace *wks = data;
6669         struct mlx5_flow_workspace *next;
6670
6671         while (wks) {
6672                 next = wks->next;
6673                 free(wks->rss_desc.queue);
6674                 free(wks);
6675                 wks = next;
6676         }
6677 }
6678
6679 /**
6680  * Get thread specific current flow workspace.
6681  *
6682  * @return pointer to thread specific flow workspace data, NULL on error.
6683  */
6684 struct mlx5_flow_workspace*
6685 mlx5_flow_get_thread_workspace(void)
6686 {
6687         struct mlx5_flow_workspace *data;
6688
6689         data = mlx5_flow_os_get_specific_workspace();
6690         MLX5_ASSERT(data && data->inuse);
6691         if (!data || !data->inuse)
6692                 DRV_LOG(ERR, "flow workspace not initialized.");
6693         return data;
6694 }
6695
6696 /**
6697  * Allocate and init new flow workspace.
6698  *
6699  * @return pointer to flow workspace data, NULL on error.
6700  */
6701 static struct mlx5_flow_workspace*
6702 flow_alloc_thread_workspace(void)
6703 {
6704         struct mlx5_flow_workspace *data = calloc(1, sizeof(*data));
6705
6706         if (!data) {
6707                 DRV_LOG(ERR, "Failed to allocate flow workspace "
6708                         "memory.");
6709                 return NULL;
6710         }
6711         data->rss_desc.queue = calloc(1,
6712                         sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM);
6713         if (!data->rss_desc.queue)
6714                 goto err;
6715         data->rssq_num = MLX5_RSSQ_DEFAULT_NUM;
6716         return data;
6717 err:
6718         if (data->rss_desc.queue)
6719                 free(data->rss_desc.queue);
6720         free(data);
6721         return NULL;
6722 }
6723
6724 /**
6725  * Get new thread specific flow workspace.
6726  *
6727  * If current workspace inuse, create new one and set as current.
6728  *
6729  * @return pointer to thread specific flow workspace data, NULL on error.
6730  */
6731 static struct mlx5_flow_workspace*
6732 mlx5_flow_push_thread_workspace(void)
6733 {
6734         struct mlx5_flow_workspace *curr;
6735         struct mlx5_flow_workspace *data;
6736
6737         curr = mlx5_flow_os_get_specific_workspace();
6738         if (!curr) {
6739                 data = flow_alloc_thread_workspace();
6740                 if (!data)
6741                         return NULL;
6742         } else if (!curr->inuse) {
6743                 data = curr;
6744         } else if (curr->next) {
6745                 data = curr->next;
6746         } else {
6747                 data = flow_alloc_thread_workspace();
6748                 if (!data)
6749                         return NULL;
6750                 curr->next = data;
6751                 data->prev = curr;
6752         }
6753         data->inuse = 1;
6754         data->flow_idx = 0;
6755         /* Set as current workspace */
6756         if (mlx5_flow_os_set_specific_workspace(data))
6757                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6758         return data;
6759 }
6760
6761 /**
6762  * Close current thread specific flow workspace.
6763  *
6764  * If previous workspace available, set it as current.
6765  *
6766  * @return pointer to thread specific flow workspace data, NULL on error.
6767  */
6768 static void
6769 mlx5_flow_pop_thread_workspace(void)
6770 {
6771         struct mlx5_flow_workspace *data = mlx5_flow_get_thread_workspace();
6772
6773         if (!data)
6774                 return;
6775         if (!data->inuse) {
6776                 DRV_LOG(ERR, "Failed to close unused flow workspace.");
6777                 return;
6778         }
6779         data->inuse = 0;
6780         if (!data->prev)
6781                 return;
6782         if (mlx5_flow_os_set_specific_workspace(data->prev))
6783                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6784 }
6785
6786 /**
6787  * Verify the flow list is empty
6788  *
6789  * @param dev
6790  *  Pointer to Ethernet device.
6791  *
6792  * @return the number of flows not released.
6793  */
6794 int
6795 mlx5_flow_verify(struct rte_eth_dev *dev)
6796 {
6797         struct mlx5_priv *priv = dev->data->dev_private;
6798         struct rte_flow *flow;
6799         uint32_t idx;
6800         int ret = 0;
6801
6802         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], priv->flows, idx,
6803                       flow, next) {
6804                 DRV_LOG(DEBUG, "port %u flow %p still referenced",
6805                         dev->data->port_id, (void *)flow);
6806                 ++ret;
6807         }
6808         return ret;
6809 }
6810
6811 /**
6812  * Enable default hairpin egress flow.
6813  *
6814  * @param dev
6815  *   Pointer to Ethernet device.
6816  * @param queue
6817  *   The queue index.
6818  *
6819  * @return
6820  *   0 on success, a negative errno value otherwise and rte_errno is set.
6821  */
6822 int
6823 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
6824                             uint32_t queue)
6825 {
6826         struct mlx5_priv *priv = dev->data->dev_private;
6827         const struct rte_flow_attr attr = {
6828                 .egress = 1,
6829                 .priority = 0,
6830         };
6831         struct mlx5_rte_flow_item_tx_queue queue_spec = {
6832                 .queue = queue,
6833         };
6834         struct mlx5_rte_flow_item_tx_queue queue_mask = {
6835                 .queue = UINT32_MAX,
6836         };
6837         struct rte_flow_item items[] = {
6838                 {
6839                         .type = (enum rte_flow_item_type)
6840                                 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
6841                         .spec = &queue_spec,
6842                         .last = NULL,
6843                         .mask = &queue_mask,
6844                 },
6845                 {
6846                         .type = RTE_FLOW_ITEM_TYPE_END,
6847                 },
6848         };
6849         struct rte_flow_action_jump jump = {
6850                 .group = MLX5_HAIRPIN_TX_TABLE,
6851         };
6852         struct rte_flow_action actions[2];
6853         uint32_t flow_idx;
6854         struct rte_flow_error error;
6855
6856         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
6857         actions[0].conf = &jump;
6858         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
6859         flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6860                                 &attr, items, actions, false, &error);
6861         if (!flow_idx) {
6862                 DRV_LOG(DEBUG,
6863                         "Failed to create ctrl flow: rte_errno(%d),"
6864                         " type(%d), message(%s)",
6865                         rte_errno, error.type,
6866                         error.message ? error.message : " (no stated reason)");
6867                 return -rte_errno;
6868         }
6869         return 0;
6870 }
6871
6872 /**
6873  * Enable a control flow configured from the control plane.
6874  *
6875  * @param dev
6876  *   Pointer to Ethernet device.
6877  * @param eth_spec
6878  *   An Ethernet flow spec to apply.
6879  * @param eth_mask
6880  *   An Ethernet flow mask to apply.
6881  * @param vlan_spec
6882  *   A VLAN flow spec to apply.
6883  * @param vlan_mask
6884  *   A VLAN flow mask to apply.
6885  *
6886  * @return
6887  *   0 on success, a negative errno value otherwise and rte_errno is set.
6888  */
6889 int
6890 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
6891                     struct rte_flow_item_eth *eth_spec,
6892                     struct rte_flow_item_eth *eth_mask,
6893                     struct rte_flow_item_vlan *vlan_spec,
6894                     struct rte_flow_item_vlan *vlan_mask)
6895 {
6896         struct mlx5_priv *priv = dev->data->dev_private;
6897         const struct rte_flow_attr attr = {
6898                 .ingress = 1,
6899                 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
6900         };
6901         struct rte_flow_item items[] = {
6902                 {
6903                         .type = RTE_FLOW_ITEM_TYPE_ETH,
6904                         .spec = eth_spec,
6905                         .last = NULL,
6906                         .mask = eth_mask,
6907                 },
6908                 {
6909                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
6910                                               RTE_FLOW_ITEM_TYPE_END,
6911                         .spec = vlan_spec,
6912                         .last = NULL,
6913                         .mask = vlan_mask,
6914                 },
6915                 {
6916                         .type = RTE_FLOW_ITEM_TYPE_END,
6917                 },
6918         };
6919         uint16_t queue[priv->reta_idx_n];
6920         struct rte_flow_action_rss action_rss = {
6921                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
6922                 .level = 0,
6923                 .types = priv->rss_conf.rss_hf,
6924                 .key_len = priv->rss_conf.rss_key_len,
6925                 .queue_num = priv->reta_idx_n,
6926                 .key = priv->rss_conf.rss_key,
6927                 .queue = queue,
6928         };
6929         struct rte_flow_action actions[] = {
6930                 {
6931                         .type = RTE_FLOW_ACTION_TYPE_RSS,
6932                         .conf = &action_rss,
6933                 },
6934                 {
6935                         .type = RTE_FLOW_ACTION_TYPE_END,
6936                 },
6937         };
6938         uint32_t flow_idx;
6939         struct rte_flow_error error;
6940         unsigned int i;
6941
6942         if (!priv->reta_idx_n || !priv->rxqs_n) {
6943                 return 0;
6944         }
6945         if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
6946                 action_rss.types = 0;
6947         for (i = 0; i != priv->reta_idx_n; ++i)
6948                 queue[i] = (*priv->reta_idx)[i];
6949         flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6950                                 &attr, items, actions, false, &error);
6951         if (!flow_idx)
6952                 return -rte_errno;
6953         return 0;
6954 }
6955
6956 /**
6957  * Enable a flow control configured from the control plane.
6958  *
6959  * @param dev
6960  *   Pointer to Ethernet device.
6961  * @param eth_spec
6962  *   An Ethernet flow spec to apply.
6963  * @param eth_mask
6964  *   An Ethernet flow mask to apply.
6965  *
6966  * @return
6967  *   0 on success, a negative errno value otherwise and rte_errno is set.
6968  */
6969 int
6970 mlx5_ctrl_flow(struct rte_eth_dev *dev,
6971                struct rte_flow_item_eth *eth_spec,
6972                struct rte_flow_item_eth *eth_mask)
6973 {
6974         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
6975 }
6976
6977 /**
6978  * Create default miss flow rule matching lacp traffic
6979  *
6980  * @param dev
6981  *   Pointer to Ethernet device.
6982  * @param eth_spec
6983  *   An Ethernet flow spec to apply.
6984  *
6985  * @return
6986  *   0 on success, a negative errno value otherwise and rte_errno is set.
6987  */
6988 int
6989 mlx5_flow_lacp_miss(struct rte_eth_dev *dev)
6990 {
6991         struct mlx5_priv *priv = dev->data->dev_private;
6992         /*
6993          * The LACP matching is done by only using ether type since using
6994          * a multicast dst mac causes kernel to give low priority to this flow.
6995          */
6996         static const struct rte_flow_item_eth lacp_spec = {
6997                 .type = RTE_BE16(0x8809),
6998         };
6999         static const struct rte_flow_item_eth lacp_mask = {
7000                 .type = 0xffff,
7001         };
7002         const struct rte_flow_attr attr = {
7003                 .ingress = 1,
7004         };
7005         struct rte_flow_item items[] = {
7006                 {
7007                         .type = RTE_FLOW_ITEM_TYPE_ETH,
7008                         .spec = &lacp_spec,
7009                         .mask = &lacp_mask,
7010                 },
7011                 {
7012                         .type = RTE_FLOW_ITEM_TYPE_END,
7013                 },
7014         };
7015         struct rte_flow_action actions[] = {
7016                 {
7017                         .type = (enum rte_flow_action_type)
7018                                 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS,
7019                 },
7020                 {
7021                         .type = RTE_FLOW_ACTION_TYPE_END,
7022                 },
7023         };
7024         struct rte_flow_error error;
7025         uint32_t flow_idx = flow_list_create(dev, &priv->ctrl_flows,
7026                                 &attr, items, actions, false, &error);
7027
7028         if (!flow_idx)
7029                 return -rte_errno;
7030         return 0;
7031 }
7032
7033 /**
7034  * Destroy a flow.
7035  *
7036  * @see rte_flow_destroy()
7037  * @see rte_flow_ops
7038  */
7039 int
7040 mlx5_flow_destroy(struct rte_eth_dev *dev,
7041                   struct rte_flow *flow,
7042                   struct rte_flow_error *error __rte_unused)
7043 {
7044         struct mlx5_priv *priv = dev->data->dev_private;
7045
7046         flow_list_destroy(dev, &priv->flows, (uintptr_t)(void *)flow);
7047         return 0;
7048 }
7049
7050 /**
7051  * Destroy all flows.
7052  *
7053  * @see rte_flow_flush()
7054  * @see rte_flow_ops
7055  */
7056 int
7057 mlx5_flow_flush(struct rte_eth_dev *dev,
7058                 struct rte_flow_error *error __rte_unused)
7059 {
7060         struct mlx5_priv *priv = dev->data->dev_private;
7061
7062         mlx5_flow_list_flush(dev, &priv->flows, false);
7063         return 0;
7064 }
7065
7066 /**
7067  * Isolated mode.
7068  *
7069  * @see rte_flow_isolate()
7070  * @see rte_flow_ops
7071  */
7072 int
7073 mlx5_flow_isolate(struct rte_eth_dev *dev,
7074                   int enable,
7075                   struct rte_flow_error *error)
7076 {
7077         struct mlx5_priv *priv = dev->data->dev_private;
7078
7079         if (dev->data->dev_started) {
7080                 rte_flow_error_set(error, EBUSY,
7081                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7082                                    NULL,
7083                                    "port must be stopped first");
7084                 return -rte_errno;
7085         }
7086         priv->isolated = !!enable;
7087         if (enable)
7088                 dev->dev_ops = &mlx5_dev_ops_isolate;
7089         else
7090                 dev->dev_ops = &mlx5_dev_ops;
7091
7092         dev->rx_descriptor_status = mlx5_rx_descriptor_status;
7093         dev->tx_descriptor_status = mlx5_tx_descriptor_status;
7094
7095         return 0;
7096 }
7097
7098 /**
7099  * Query a flow.
7100  *
7101  * @see rte_flow_query()
7102  * @see rte_flow_ops
7103  */
7104 static int
7105 flow_drv_query(struct rte_eth_dev *dev,
7106                uint32_t flow_idx,
7107                const struct rte_flow_action *actions,
7108                void *data,
7109                struct rte_flow_error *error)
7110 {
7111         struct mlx5_priv *priv = dev->data->dev_private;
7112         const struct mlx5_flow_driver_ops *fops;
7113         struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
7114                                                [MLX5_IPOOL_RTE_FLOW],
7115                                                flow_idx);
7116         enum mlx5_flow_drv_type ftype;
7117
7118         if (!flow) {
7119                 return rte_flow_error_set(error, ENOENT,
7120                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7121                           NULL,
7122                           "invalid flow handle");
7123         }
7124         ftype = flow->drv_type;
7125         MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
7126         fops = flow_get_drv_ops(ftype);
7127
7128         return fops->query(dev, flow, actions, data, error);
7129 }
7130
7131 /**
7132  * Query a flow.
7133  *
7134  * @see rte_flow_query()
7135  * @see rte_flow_ops
7136  */
7137 int
7138 mlx5_flow_query(struct rte_eth_dev *dev,
7139                 struct rte_flow *flow,
7140                 const struct rte_flow_action *actions,
7141                 void *data,
7142                 struct rte_flow_error *error)
7143 {
7144         int ret;
7145
7146         ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data,
7147                              error);
7148         if (ret < 0)
7149                 return ret;
7150         return 0;
7151 }
7152
7153 /**
7154  * Get rte_flow callbacks.
7155  *
7156  * @param dev
7157  *   Pointer to Ethernet device structure.
7158  * @param ops
7159  *   Pointer to operation-specific structure.
7160  *
7161  * @return 0
7162  */
7163 int
7164 mlx5_flow_ops_get(struct rte_eth_dev *dev __rte_unused,
7165                   const struct rte_flow_ops **ops)
7166 {
7167         *ops = &mlx5_flow_ops;
7168         return 0;
7169 }
7170
7171 /**
7172  * Validate meter policy actions.
7173  * Dispatcher for action type specific validation.
7174  *
7175  * @param[in] dev
7176  *   Pointer to the Ethernet device structure.
7177  * @param[in] action
7178  *   The meter policy action object to validate.
7179  * @param[in] attr
7180  *   Attributes of flow to determine steering domain.
7181  * @param[out] is_rss
7182  *   Is RSS or not.
7183  * @param[out] domain_bitmap
7184  *   Domain bitmap.
7185  * @param[out] is_def_policy
7186  *   Is default policy or not.
7187  * @param[out] error
7188  *   Perform verbose error reporting if not NULL. Initialized in case of
7189  *   error only.
7190  *
7191  * @return
7192  *   0 on success, otherwise negative errno value.
7193  */
7194 int
7195 mlx5_flow_validate_mtr_acts(struct rte_eth_dev *dev,
7196                         const struct rte_flow_action *actions[RTE_COLORS],
7197                         struct rte_flow_attr *attr,
7198                         bool *is_rss,
7199                         uint8_t *domain_bitmap,
7200                         bool *is_def_policy,
7201                         struct rte_mtr_error *error)
7202 {
7203         const struct mlx5_flow_driver_ops *fops;
7204
7205         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7206         return fops->validate_mtr_acts(dev, actions, attr,
7207                         is_rss, domain_bitmap, is_def_policy, error);
7208 }
7209
7210 /**
7211  * Destroy the meter table set.
7212  *
7213  * @param[in] dev
7214  *   Pointer to Ethernet device.
7215  * @param[in] mtr_policy
7216  *   Meter policy struct.
7217  */
7218 void
7219 mlx5_flow_destroy_mtr_acts(struct rte_eth_dev *dev,
7220                       struct mlx5_flow_meter_policy *mtr_policy)
7221 {
7222         const struct mlx5_flow_driver_ops *fops;
7223
7224         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7225         fops->destroy_mtr_acts(dev, mtr_policy);
7226 }
7227
7228 /**
7229  * Create policy action, lock free,
7230  * (mutex should be acquired by caller).
7231  * Dispatcher for action type specific call.
7232  *
7233  * @param[in] dev
7234  *   Pointer to the Ethernet device structure.
7235  * @param[in] mtr_policy
7236  *   Meter policy struct.
7237  * @param[in] action
7238  *   Action specification used to create meter actions.
7239  * @param[out] error
7240  *   Perform verbose error reporting if not NULL. Initialized in case of
7241  *   error only.
7242  *
7243  * @return
7244  *   0 on success, otherwise negative errno value.
7245  */
7246 int
7247 mlx5_flow_create_mtr_acts(struct rte_eth_dev *dev,
7248                       struct mlx5_flow_meter_policy *mtr_policy,
7249                       const struct rte_flow_action *actions[RTE_COLORS],
7250                       struct rte_mtr_error *error)
7251 {
7252         const struct mlx5_flow_driver_ops *fops;
7253
7254         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7255         return fops->create_mtr_acts(dev, mtr_policy, actions, error);
7256 }
7257
7258 /**
7259  * Create policy rules, lock free,
7260  * (mutex should be acquired by caller).
7261  * Dispatcher for action type specific call.
7262  *
7263  * @param[in] dev
7264  *   Pointer to the Ethernet device structure.
7265  * @param[in] mtr_policy
7266  *   Meter policy struct.
7267  *
7268  * @return
7269  *   0 on success, -1 otherwise.
7270  */
7271 int
7272 mlx5_flow_create_policy_rules(struct rte_eth_dev *dev,
7273                              struct mlx5_flow_meter_policy *mtr_policy)
7274 {
7275         const struct mlx5_flow_driver_ops *fops;
7276
7277         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7278         return fops->create_policy_rules(dev, mtr_policy);
7279 }
7280
7281 /**
7282  * Destroy policy rules, lock free,
7283  * (mutex should be acquired by caller).
7284  * Dispatcher for action type specific call.
7285  *
7286  * @param[in] dev
7287  *   Pointer to the Ethernet device structure.
7288  * @param[in] mtr_policy
7289  *   Meter policy struct.
7290  */
7291 void
7292 mlx5_flow_destroy_policy_rules(struct rte_eth_dev *dev,
7293                              struct mlx5_flow_meter_policy *mtr_policy)
7294 {
7295         const struct mlx5_flow_driver_ops *fops;
7296
7297         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7298         fops->destroy_policy_rules(dev, mtr_policy);
7299 }
7300
7301 /**
7302  * Destroy the default policy table set.
7303  *
7304  * @param[in] dev
7305  *   Pointer to Ethernet device.
7306  */
7307 void
7308 mlx5_flow_destroy_def_policy(struct rte_eth_dev *dev)
7309 {
7310         const struct mlx5_flow_driver_ops *fops;
7311
7312         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7313         fops->destroy_def_policy(dev);
7314 }
7315
7316 /**
7317  * Destroy the default policy table set.
7318  *
7319  * @param[in] dev
7320  *   Pointer to Ethernet device.
7321  *
7322  * @return
7323  *   0 on success, -1 otherwise.
7324  */
7325 int
7326 mlx5_flow_create_def_policy(struct rte_eth_dev *dev)
7327 {
7328         const struct mlx5_flow_driver_ops *fops;
7329
7330         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7331         return fops->create_def_policy(dev);
7332 }
7333
7334 /**
7335  * Create the needed meter and suffix tables.
7336  *
7337  * @param[in] dev
7338  *   Pointer to Ethernet device.
7339  *
7340  * @return
7341  *   0 on success, -1 otherwise.
7342  */
7343 int
7344 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
7345                         struct mlx5_flow_meter_info *fm,
7346                         uint32_t mtr_idx,
7347                         uint8_t domain_bitmap)
7348 {
7349         const struct mlx5_flow_driver_ops *fops;
7350
7351         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7352         return fops->create_mtr_tbls(dev, fm, mtr_idx, domain_bitmap);
7353 }
7354
7355 /**
7356  * Destroy the meter table set.
7357  *
7358  * @param[in] dev
7359  *   Pointer to Ethernet device.
7360  * @param[in] tbl
7361  *   Pointer to the meter table set.
7362  */
7363 void
7364 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
7365                            struct mlx5_flow_meter_info *fm)
7366 {
7367         const struct mlx5_flow_driver_ops *fops;
7368
7369         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7370         fops->destroy_mtr_tbls(dev, fm);
7371 }
7372
7373 /**
7374  * Destroy the global meter drop table.
7375  *
7376  * @param[in] dev
7377  *   Pointer to Ethernet device.
7378  */
7379 void
7380 mlx5_flow_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
7381 {
7382         const struct mlx5_flow_driver_ops *fops;
7383
7384         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7385         fops->destroy_mtr_drop_tbls(dev);
7386 }
7387
7388 /**
7389  * Destroy the sub policy table with RX queue.
7390  *
7391  * @param[in] dev
7392  *   Pointer to Ethernet device.
7393  * @param[in] mtr_policy
7394  *   Pointer to meter policy table.
7395  */
7396 void
7397 mlx5_flow_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
7398                 struct mlx5_flow_meter_policy *mtr_policy)
7399 {
7400         const struct mlx5_flow_driver_ops *fops;
7401
7402         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7403         fops->destroy_sub_policy_with_rxq(dev, mtr_policy);
7404 }
7405
7406 /**
7407  * Allocate the needed aso flow meter id.
7408  *
7409  * @param[in] dev
7410  *   Pointer to Ethernet device.
7411  *
7412  * @return
7413  *   Index to aso flow meter on success, NULL otherwise.
7414  */
7415 uint32_t
7416 mlx5_flow_mtr_alloc(struct rte_eth_dev *dev)
7417 {
7418         const struct mlx5_flow_driver_ops *fops;
7419
7420         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7421         return fops->create_meter(dev);
7422 }
7423
7424 /**
7425  * Free the aso flow meter id.
7426  *
7427  * @param[in] dev
7428  *   Pointer to Ethernet device.
7429  * @param[in] mtr_idx
7430  *  Index to aso flow meter to be free.
7431  *
7432  * @return
7433  *   0 on success.
7434  */
7435 void
7436 mlx5_flow_mtr_free(struct rte_eth_dev *dev, uint32_t mtr_idx)
7437 {
7438         const struct mlx5_flow_driver_ops *fops;
7439
7440         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7441         fops->free_meter(dev, mtr_idx);
7442 }
7443
7444 /**
7445  * Allocate a counter.
7446  *
7447  * @param[in] dev
7448  *   Pointer to Ethernet device structure.
7449  *
7450  * @return
7451  *   Index to allocated counter  on success, 0 otherwise.
7452  */
7453 uint32_t
7454 mlx5_counter_alloc(struct rte_eth_dev *dev)
7455 {
7456         const struct mlx5_flow_driver_ops *fops;
7457         struct rte_flow_attr attr = { .transfer = 0 };
7458
7459         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7460                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7461                 return fops->counter_alloc(dev);
7462         }
7463         DRV_LOG(ERR,
7464                 "port %u counter allocate is not supported.",
7465                  dev->data->port_id);
7466         return 0;
7467 }
7468
7469 /**
7470  * Free a counter.
7471  *
7472  * @param[in] dev
7473  *   Pointer to Ethernet device structure.
7474  * @param[in] cnt
7475  *   Index to counter to be free.
7476  */
7477 void
7478 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
7479 {
7480         const struct mlx5_flow_driver_ops *fops;
7481         struct rte_flow_attr attr = { .transfer = 0 };
7482
7483         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7484                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7485                 fops->counter_free(dev, cnt);
7486                 return;
7487         }
7488         DRV_LOG(ERR,
7489                 "port %u counter free is not supported.",
7490                  dev->data->port_id);
7491 }
7492
7493 /**
7494  * Query counter statistics.
7495  *
7496  * @param[in] dev
7497  *   Pointer to Ethernet device structure.
7498  * @param[in] cnt
7499  *   Index to counter to query.
7500  * @param[in] clear
7501  *   Set to clear counter statistics.
7502  * @param[out] pkts
7503  *   The counter hits packets number to save.
7504  * @param[out] bytes
7505  *   The counter hits bytes number to save.
7506  *
7507  * @return
7508  *   0 on success, a negative errno value otherwise.
7509  */
7510 int
7511 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
7512                    bool clear, uint64_t *pkts, uint64_t *bytes)
7513 {
7514         const struct mlx5_flow_driver_ops *fops;
7515         struct rte_flow_attr attr = { .transfer = 0 };
7516
7517         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7518                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7519                 return fops->counter_query(dev, cnt, clear, pkts, bytes);
7520         }
7521         DRV_LOG(ERR,
7522                 "port %u counter query is not supported.",
7523                  dev->data->port_id);
7524         return -ENOTSUP;
7525 }
7526
7527 /**
7528  * Allocate a new memory for the counter values wrapped by all the needed
7529  * management.
7530  *
7531  * @param[in] sh
7532  *   Pointer to mlx5_dev_ctx_shared object.
7533  *
7534  * @return
7535  *   0 on success, a negative errno value otherwise.
7536  */
7537 static int
7538 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh)
7539 {
7540         struct mlx5_devx_mkey_attr mkey_attr;
7541         struct mlx5_counter_stats_mem_mng *mem_mng;
7542         volatile struct flow_counter_stats *raw_data;
7543         int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES;
7544         int size = (sizeof(struct flow_counter_stats) *
7545                         MLX5_COUNTERS_PER_POOL +
7546                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
7547                         sizeof(struct mlx5_counter_stats_mem_mng);
7548         size_t pgsize = rte_mem_page_size();
7549         uint8_t *mem;
7550         int i;
7551
7552         if (pgsize == (size_t)-1) {
7553                 DRV_LOG(ERR, "Failed to get mem page size");
7554                 rte_errno = ENOMEM;
7555                 return -ENOMEM;
7556         }
7557         mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY);
7558         if (!mem) {
7559                 rte_errno = ENOMEM;
7560                 return -ENOMEM;
7561         }
7562         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
7563         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
7564         mem_mng->umem = mlx5_os_umem_reg(sh->ctx, mem, size,
7565                                                  IBV_ACCESS_LOCAL_WRITE);
7566         if (!mem_mng->umem) {
7567                 rte_errno = errno;
7568                 mlx5_free(mem);
7569                 return -rte_errno;
7570         }
7571         memset(&mkey_attr, 0, sizeof(mkey_attr));
7572         mkey_attr.addr = (uintptr_t)mem;
7573         mkey_attr.size = size;
7574         mkey_attr.umem_id = mlx5_os_get_umem_id(mem_mng->umem);
7575         mkey_attr.pd = sh->pdn;
7576         mkey_attr.relaxed_ordering_write = sh->cmng.relaxed_ordering_write;
7577         mkey_attr.relaxed_ordering_read = sh->cmng.relaxed_ordering_read;
7578         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
7579         if (!mem_mng->dm) {
7580                 mlx5_os_umem_dereg(mem_mng->umem);
7581                 rte_errno = errno;
7582                 mlx5_free(mem);
7583                 return -rte_errno;
7584         }
7585         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
7586         raw_data = (volatile struct flow_counter_stats *)mem;
7587         for (i = 0; i < raws_n; ++i) {
7588                 mem_mng->raws[i].mem_mng = mem_mng;
7589                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
7590         }
7591         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
7592                 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws,
7593                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i,
7594                                  next);
7595         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
7596         sh->cmng.mem_mng = mem_mng;
7597         return 0;
7598 }
7599
7600 /**
7601  * Set the statistic memory to the new counter pool.
7602  *
7603  * @param[in] sh
7604  *   Pointer to mlx5_dev_ctx_shared object.
7605  * @param[in] pool
7606  *   Pointer to the pool to set the statistic memory.
7607  *
7608  * @return
7609  *   0 on success, a negative errno value otherwise.
7610  */
7611 static int
7612 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh,
7613                                struct mlx5_flow_counter_pool *pool)
7614 {
7615         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7616         /* Resize statistic memory once used out. */
7617         if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) &&
7618             mlx5_flow_create_counter_stat_mem_mng(sh)) {
7619                 DRV_LOG(ERR, "Cannot resize counter stat mem.");
7620                 return -1;
7621         }
7622         rte_spinlock_lock(&pool->sl);
7623         pool->raw = cmng->mem_mng->raws + pool->index %
7624                     MLX5_CNT_CONTAINER_RESIZE;
7625         rte_spinlock_unlock(&pool->sl);
7626         pool->raw_hw = NULL;
7627         return 0;
7628 }
7629
7630 #define MLX5_POOL_QUERY_FREQ_US 1000000
7631
7632 /**
7633  * Set the periodic procedure for triggering asynchronous batch queries for all
7634  * the counter pools.
7635  *
7636  * @param[in] sh
7637  *   Pointer to mlx5_dev_ctx_shared object.
7638  */
7639 void
7640 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh)
7641 {
7642         uint32_t pools_n, us;
7643
7644         pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED);
7645         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
7646         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
7647         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
7648                 sh->cmng.query_thread_on = 0;
7649                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
7650         } else {
7651                 sh->cmng.query_thread_on = 1;
7652         }
7653 }
7654
7655 /**
7656  * The periodic procedure for triggering asynchronous batch queries for all the
7657  * counter pools. This function is probably called by the host thread.
7658  *
7659  * @param[in] arg
7660  *   The parameter for the alarm process.
7661  */
7662 void
7663 mlx5_flow_query_alarm(void *arg)
7664 {
7665         struct mlx5_dev_ctx_shared *sh = arg;
7666         int ret;
7667         uint16_t pool_index = sh->cmng.pool_index;
7668         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7669         struct mlx5_flow_counter_pool *pool;
7670         uint16_t n_valid;
7671
7672         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
7673                 goto set_alarm;
7674         rte_spinlock_lock(&cmng->pool_update_sl);
7675         pool = cmng->pools[pool_index];
7676         n_valid = cmng->n_valid;
7677         rte_spinlock_unlock(&cmng->pool_update_sl);
7678         /* Set the statistic memory to the new created pool. */
7679         if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool)))
7680                 goto set_alarm;
7681         if (pool->raw_hw)
7682                 /* There is a pool query in progress. */
7683                 goto set_alarm;
7684         pool->raw_hw =
7685                 LIST_FIRST(&sh->cmng.free_stat_raws);
7686         if (!pool->raw_hw)
7687                 /* No free counter statistics raw memory. */
7688                 goto set_alarm;
7689         /*
7690          * Identify the counters released between query trigger and query
7691          * handle more efficiently. The counter released in this gap period
7692          * should wait for a new round of query as the new arrived packets
7693          * will not be taken into account.
7694          */
7695         pool->query_gen++;
7696         ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0,
7697                                                MLX5_COUNTERS_PER_POOL,
7698                                                NULL, NULL,
7699                                                pool->raw_hw->mem_mng->dm->id,
7700                                                (void *)(uintptr_t)
7701                                                pool->raw_hw->data,
7702                                                sh->devx_comp,
7703                                                (uint64_t)(uintptr_t)pool);
7704         if (ret) {
7705                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
7706                         " %d", pool->min_dcs->id);
7707                 pool->raw_hw = NULL;
7708                 goto set_alarm;
7709         }
7710         LIST_REMOVE(pool->raw_hw, next);
7711         sh->cmng.pending_queries++;
7712         pool_index++;
7713         if (pool_index >= n_valid)
7714                 pool_index = 0;
7715 set_alarm:
7716         sh->cmng.pool_index = pool_index;
7717         mlx5_set_query_alarm(sh);
7718 }
7719
7720 /**
7721  * Check and callback event for new aged flow in the counter pool
7722  *
7723  * @param[in] sh
7724  *   Pointer to mlx5_dev_ctx_shared object.
7725  * @param[in] pool
7726  *   Pointer to Current counter pool.
7727  */
7728 static void
7729 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh,
7730                    struct mlx5_flow_counter_pool *pool)
7731 {
7732         struct mlx5_priv *priv;
7733         struct mlx5_flow_counter *cnt;
7734         struct mlx5_age_info *age_info;
7735         struct mlx5_age_param *age_param;
7736         struct mlx5_counter_stats_raw *cur = pool->raw_hw;
7737         struct mlx5_counter_stats_raw *prev = pool->raw;
7738         const uint64_t curr_time = MLX5_CURR_TIME_SEC;
7739         const uint32_t time_delta = curr_time - pool->time_of_last_age_check;
7740         uint16_t expected = AGE_CANDIDATE;
7741         uint32_t i;
7742
7743         pool->time_of_last_age_check = curr_time;
7744         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
7745                 cnt = MLX5_POOL_GET_CNT(pool, i);
7746                 age_param = MLX5_CNT_TO_AGE(cnt);
7747                 if (__atomic_load_n(&age_param->state,
7748                                     __ATOMIC_RELAXED) != AGE_CANDIDATE)
7749                         continue;
7750                 if (cur->data[i].hits != prev->data[i].hits) {
7751                         __atomic_store_n(&age_param->sec_since_last_hit, 0,
7752                                          __ATOMIC_RELAXED);
7753                         continue;
7754                 }
7755                 if (__atomic_add_fetch(&age_param->sec_since_last_hit,
7756                                        time_delta,
7757                                        __ATOMIC_RELAXED) <= age_param->timeout)
7758                         continue;
7759                 /**
7760                  * Hold the lock first, or if between the
7761                  * state AGE_TMOUT and tailq operation the
7762                  * release happened, the release procedure
7763                  * may delete a non-existent tailq node.
7764                  */
7765                 priv = rte_eth_devices[age_param->port_id].data->dev_private;
7766                 age_info = GET_PORT_AGE_INFO(priv);
7767                 rte_spinlock_lock(&age_info->aged_sl);
7768                 if (__atomic_compare_exchange_n(&age_param->state, &expected,
7769                                                 AGE_TMOUT, false,
7770                                                 __ATOMIC_RELAXED,
7771                                                 __ATOMIC_RELAXED)) {
7772                         TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next);
7773                         MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW);
7774                 }
7775                 rte_spinlock_unlock(&age_info->aged_sl);
7776         }
7777         mlx5_age_event_prepare(sh);
7778 }
7779
7780 /**
7781  * Handler for the HW respond about ready values from an asynchronous batch
7782  * query. This function is probably called by the host thread.
7783  *
7784  * @param[in] sh
7785  *   The pointer to the shared device context.
7786  * @param[in] async_id
7787  *   The Devx async ID.
7788  * @param[in] status
7789  *   The status of the completion.
7790  */
7791 void
7792 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
7793                                   uint64_t async_id, int status)
7794 {
7795         struct mlx5_flow_counter_pool *pool =
7796                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
7797         struct mlx5_counter_stats_raw *raw_to_free;
7798         uint8_t query_gen = pool->query_gen ^ 1;
7799         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7800         enum mlx5_counter_type cnt_type =
7801                 pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
7802                                 MLX5_COUNTER_TYPE_ORIGIN;
7803
7804         if (unlikely(status)) {
7805                 raw_to_free = pool->raw_hw;
7806         } else {
7807                 raw_to_free = pool->raw;
7808                 if (pool->is_aged)
7809                         mlx5_flow_aging_check(sh, pool);
7810                 rte_spinlock_lock(&pool->sl);
7811                 pool->raw = pool->raw_hw;
7812                 rte_spinlock_unlock(&pool->sl);
7813                 /* Be sure the new raw counters data is updated in memory. */
7814                 rte_io_wmb();
7815                 if (!TAILQ_EMPTY(&pool->counters[query_gen])) {
7816                         rte_spinlock_lock(&cmng->csl[cnt_type]);
7817                         TAILQ_CONCAT(&cmng->counters[cnt_type],
7818                                      &pool->counters[query_gen], next);
7819                         rte_spinlock_unlock(&cmng->csl[cnt_type]);
7820                 }
7821         }
7822         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
7823         pool->raw_hw = NULL;
7824         sh->cmng.pending_queries--;
7825 }
7826
7827 static int
7828 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table,
7829                     const struct flow_grp_info *grp_info,
7830                     struct rte_flow_error *error)
7831 {
7832         if (grp_info->transfer && grp_info->external &&
7833             grp_info->fdb_def_rule) {
7834                 if (group == UINT32_MAX)
7835                         return rte_flow_error_set
7836                                                 (error, EINVAL,
7837                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
7838                                                  NULL,
7839                                                  "group index not supported");
7840                 *table = group + 1;
7841         } else {
7842                 *table = group;
7843         }
7844         DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table);
7845         return 0;
7846 }
7847
7848 /**
7849  * Translate the rte_flow group index to HW table value.
7850  *
7851  * If tunnel offload is disabled, all group ids converted to flow table
7852  * id using the standard method.
7853  * If tunnel offload is enabled, group id can be converted using the
7854  * standard or tunnel conversion method. Group conversion method
7855  * selection depends on flags in `grp_info` parameter:
7856  * - Internal (grp_info.external == 0) groups conversion uses the
7857  *   standard method.
7858  * - Group ids in JUMP action converted with the tunnel conversion.
7859  * - Group id in rule attribute conversion depends on a rule type and
7860  *   group id value:
7861  *   ** non zero group attributes converted with the tunnel method
7862  *   ** zero group attribute in non-tunnel rule is converted using the
7863  *      standard method - there's only one root table
7864  *   ** zero group attribute in steer tunnel rule is converted with the
7865  *      standard method - single root table
7866  *   ** zero group attribute in match tunnel rule is a special OvS
7867  *      case: that value is used for portability reasons. That group
7868  *      id is converted with the tunnel conversion method.
7869  *
7870  * @param[in] dev
7871  *   Port device
7872  * @param[in] tunnel
7873  *   PMD tunnel offload object
7874  * @param[in] group
7875  *   rte_flow group index value.
7876  * @param[out] table
7877  *   HW table value.
7878  * @param[in] grp_info
7879  *   flags used for conversion
7880  * @param[out] error
7881  *   Pointer to error structure.
7882  *
7883  * @return
7884  *   0 on success, a negative errno value otherwise and rte_errno is set.
7885  */
7886 int
7887 mlx5_flow_group_to_table(struct rte_eth_dev *dev,
7888                          const struct mlx5_flow_tunnel *tunnel,
7889                          uint32_t group, uint32_t *table,
7890                          const struct flow_grp_info *grp_info,
7891                          struct rte_flow_error *error)
7892 {
7893         int ret;
7894         bool standard_translation;
7895
7896         if (!grp_info->skip_scale && grp_info->external &&
7897             group < MLX5_MAX_TABLES_EXTERNAL)
7898                 group *= MLX5_FLOW_TABLE_FACTOR;
7899         if (is_tunnel_offload_active(dev)) {
7900                 standard_translation = !grp_info->external ||
7901                                         grp_info->std_tbl_fix;
7902         } else {
7903                 standard_translation = true;
7904         }
7905         DRV_LOG(DEBUG,
7906                 "port %u group=%u transfer=%d external=%d fdb_def_rule=%d translate=%s",
7907                 dev->data->port_id, group, grp_info->transfer,
7908                 grp_info->external, grp_info->fdb_def_rule,
7909                 standard_translation ? "STANDARD" : "TUNNEL");
7910         if (standard_translation)
7911                 ret = flow_group_to_table(dev->data->port_id, group, table,
7912                                           grp_info, error);
7913         else
7914                 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group,
7915                                                       table, error);
7916
7917         return ret;
7918 }
7919
7920 /**
7921  * Discover availability of metadata reg_c's.
7922  *
7923  * Iteratively use test flows to check availability.
7924  *
7925  * @param[in] dev
7926  *   Pointer to the Ethernet device structure.
7927  *
7928  * @return
7929  *   0 on success, a negative errno value otherwise and rte_errno is set.
7930  */
7931 int
7932 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
7933 {
7934         struct mlx5_priv *priv = dev->data->dev_private;
7935         struct mlx5_dev_config *config = &priv->config;
7936         enum modify_reg idx;
7937         int n = 0;
7938
7939         /* reg_c[0] and reg_c[1] are reserved. */
7940         config->flow_mreg_c[n++] = REG_C_0;
7941         config->flow_mreg_c[n++] = REG_C_1;
7942         /* Discover availability of other reg_c's. */
7943         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
7944                 struct rte_flow_attr attr = {
7945                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
7946                         .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
7947                         .ingress = 1,
7948                 };
7949                 struct rte_flow_item items[] = {
7950                         [0] = {
7951                                 .type = RTE_FLOW_ITEM_TYPE_END,
7952                         },
7953                 };
7954                 struct rte_flow_action actions[] = {
7955                         [0] = {
7956                                 .type = (enum rte_flow_action_type)
7957                                         MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
7958                                 .conf = &(struct mlx5_flow_action_copy_mreg){
7959                                         .src = REG_C_1,
7960                                         .dst = idx,
7961                                 },
7962                         },
7963                         [1] = {
7964                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
7965                                 .conf = &(struct rte_flow_action_jump){
7966                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
7967                                 },
7968                         },
7969                         [2] = {
7970                                 .type = RTE_FLOW_ACTION_TYPE_END,
7971                         },
7972                 };
7973                 uint32_t flow_idx;
7974                 struct rte_flow *flow;
7975                 struct rte_flow_error error;
7976
7977                 if (!config->dv_flow_en)
7978                         break;
7979                 /* Create internal flow, validation skips copy action. */
7980                 flow_idx = flow_list_create(dev, NULL, &attr, items,
7981                                             actions, false, &error);
7982                 flow = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW],
7983                                       flow_idx);
7984                 if (!flow)
7985                         continue;
7986                 config->flow_mreg_c[n++] = idx;
7987                 flow_list_destroy(dev, NULL, flow_idx);
7988         }
7989         for (; n < MLX5_MREG_C_NUM; ++n)
7990                 config->flow_mreg_c[n] = REG_NON;
7991         return 0;
7992 }
7993
7994 int
7995 save_dump_file(const uint8_t *data, uint32_t size,
7996         uint32_t type, uint32_t id, void *arg, FILE *file)
7997 {
7998         char line[BUF_SIZE];
7999         uint32_t out = 0;
8000         uint32_t k;
8001         uint32_t actions_num;
8002         struct rte_flow_query_count *count;
8003
8004         memset(line, 0, BUF_SIZE);
8005         switch (type) {
8006         case DR_DUMP_REC_TYPE_PMD_MODIFY_HDR:
8007                 actions_num = *(uint32_t *)(arg);
8008                 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%x,%d,",
8009                                 type, id, actions_num);
8010                 break;
8011         case DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT:
8012                 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%x,",
8013                                 type, id);
8014                 break;
8015         case DR_DUMP_REC_TYPE_PMD_COUNTER:
8016                 count = (struct rte_flow_query_count *)arg;
8017                 fprintf(file, "%d,0x%x,%" PRIu64 ",%" PRIu64 "\n", type,
8018                                 id, count->hits, count->bytes);
8019                 return 0;
8020         default:
8021                 return -1;
8022         }
8023
8024         for (k = 0; k < size; k++) {
8025                 /* Make sure we do not overrun the line buffer length. */
8026                 if (out >= BUF_SIZE - 4) {
8027                         line[out] = '\0';
8028                         break;
8029                 }
8030                 out += snprintf(line + out, BUF_SIZE - out, "%02x",
8031                                 (data[k]) & 0xff);
8032         }
8033         fprintf(file, "%s\n", line);
8034         return 0;
8035 }
8036
8037 int
8038 mlx5_flow_query_counter(struct rte_eth_dev *dev, struct rte_flow *flow,
8039         struct rte_flow_query_count *count, struct rte_flow_error *error)
8040 {
8041         struct rte_flow_action action[2];
8042         enum mlx5_flow_drv_type ftype;
8043         const struct mlx5_flow_driver_ops *fops;
8044
8045         if (!flow) {
8046                 return rte_flow_error_set(error, ENOENT,
8047                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8048                                 NULL,
8049                                 "invalid flow handle");
8050         }
8051         action[0].type = RTE_FLOW_ACTION_TYPE_COUNT;
8052         action[1].type = RTE_FLOW_ACTION_TYPE_END;
8053         if (flow->counter) {
8054                 memset(count, 0, sizeof(struct rte_flow_query_count));
8055                 ftype = (enum mlx5_flow_drv_type)(flow->drv_type);
8056                 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN &&
8057                                                 ftype < MLX5_FLOW_TYPE_MAX);
8058                 fops = flow_get_drv_ops(ftype);
8059                 return fops->query(dev, flow, action, count, error);
8060         }
8061         return -1;
8062 }
8063
8064 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8065 /**
8066  * Dump flow ipool data to file
8067  *
8068  * @param[in] dev
8069  *   The pointer to Ethernet device.
8070  * @param[in] file
8071  *   A pointer to a file for output.
8072  * @param[out] error
8073  *   Perform verbose error reporting if not NULL. PMDs initialize this
8074  *   structure in case of error only.
8075  * @return
8076  *   0 on success, a negative value otherwise.
8077  */
8078 int
8079 mlx5_flow_dev_dump_ipool(struct rte_eth_dev *dev,
8080         struct rte_flow *flow, FILE *file,
8081         struct rte_flow_error *error)
8082 {
8083         struct mlx5_priv *priv = dev->data->dev_private;
8084         struct mlx5_flow_dv_modify_hdr_resource  *modify_hdr;
8085         struct mlx5_flow_dv_encap_decap_resource *encap_decap;
8086         uint32_t handle_idx;
8087         struct mlx5_flow_handle *dh;
8088         struct rte_flow_query_count count;
8089         uint32_t actions_num;
8090         const uint8_t *data;
8091         size_t size;
8092         uint32_t id;
8093         uint32_t type;
8094
8095         if (!flow) {
8096                 return rte_flow_error_set(error, ENOENT,
8097                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8098                         NULL,
8099                         "invalid flow handle");
8100         }
8101         handle_idx = flow->dev_handles;
8102         while (handle_idx) {
8103                 dh = mlx5_ipool_get(priv->sh->ipool
8104                         [MLX5_IPOOL_MLX5_FLOW], handle_idx);
8105                 if (!dh)
8106                         continue;
8107                 handle_idx = dh->next.next;
8108                 id = (uint32_t)(uintptr_t)dh->drv_flow;
8109
8110                 /* query counter */
8111                 type = DR_DUMP_REC_TYPE_PMD_COUNTER;
8112                 if (!mlx5_flow_query_counter(dev, flow, &count, error))
8113                         save_dump_file(NULL, 0, type,
8114                                         id, (void *)&count, file);
8115
8116                 /* Get modify_hdr and encap_decap buf from ipools. */
8117                 encap_decap = NULL;
8118                 modify_hdr = dh->dvh.modify_hdr;
8119
8120                 if (dh->dvh.rix_encap_decap) {
8121                         encap_decap = mlx5_ipool_get(priv->sh->ipool
8122                                                 [MLX5_IPOOL_DECAP_ENCAP],
8123                                                 dh->dvh.rix_encap_decap);
8124                 }
8125                 if (modify_hdr) {
8126                         data = (const uint8_t *)modify_hdr->actions;
8127                         size = (size_t)(modify_hdr->actions_num) * 8;
8128                         actions_num = modify_hdr->actions_num;
8129                         type = DR_DUMP_REC_TYPE_PMD_MODIFY_HDR;
8130                         save_dump_file(data, size, type, id,
8131                                         (void *)(&actions_num), file);
8132                 }
8133                 if (encap_decap) {
8134                         data = encap_decap->buf;
8135                         size = encap_decap->size;
8136                         type = DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT;
8137                         save_dump_file(data, size, type,
8138                                                 id, NULL, file);
8139                 }
8140         }
8141         return 0;
8142 }
8143 #endif
8144
8145 /**
8146  * Dump flow raw hw data to file
8147  *
8148  * @param[in] dev
8149  *    The pointer to Ethernet device.
8150  * @param[in] file
8151  *   A pointer to a file for output.
8152  * @param[out] error
8153  *   Perform verbose error reporting if not NULL. PMDs initialize this
8154  *   structure in case of error only.
8155  * @return
8156  *   0 on success, a nagative value otherwise.
8157  */
8158 int
8159 mlx5_flow_dev_dump(struct rte_eth_dev *dev, struct rte_flow *flow_idx,
8160                    FILE *file,
8161                    struct rte_flow_error *error __rte_unused)
8162 {
8163         struct mlx5_priv *priv = dev->data->dev_private;
8164         struct mlx5_dev_ctx_shared *sh = priv->sh;
8165         uint32_t handle_idx;
8166         int ret;
8167         struct mlx5_flow_handle *dh;
8168         struct rte_flow *flow;
8169 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8170         uint32_t idx;
8171 #endif
8172
8173         if (!priv->config.dv_flow_en) {
8174                 if (fputs("device dv flow disabled\n", file) <= 0)
8175                         return -errno;
8176                 return -ENOTSUP;
8177         }
8178
8179         /* dump all */
8180         if (!flow_idx) {
8181 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8182                 ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW],
8183                                                 priv->flows, idx, flow, next)
8184                         mlx5_flow_dev_dump_ipool(dev, flow, file, error);
8185 #endif
8186                 return mlx5_devx_cmd_flow_dump(sh->fdb_domain,
8187                                         sh->rx_domain,
8188                                         sh->tx_domain, file);
8189         }
8190         /* dump one */
8191         flow = mlx5_ipool_get(priv->sh->ipool
8192                         [MLX5_IPOOL_RTE_FLOW], (uintptr_t)(void *)flow_idx);
8193         if (!flow)
8194                 return -ENOENT;
8195
8196 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8197         mlx5_flow_dev_dump_ipool(dev, flow, file, error);
8198 #endif
8199         handle_idx = flow->dev_handles;
8200         while (handle_idx) {
8201                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
8202                                 handle_idx);
8203                 if (!dh)
8204                         return -ENOENT;
8205                 if (dh->drv_flow) {
8206                         ret = mlx5_devx_cmd_flow_single_dump(dh->drv_flow,
8207                                         file);
8208                         if (ret)
8209                                 return -ENOENT;
8210                 }
8211                 handle_idx = dh->next.next;
8212         }
8213         return 0;
8214 }
8215
8216 /**
8217  * Get aged-out flows.
8218  *
8219  * @param[in] dev
8220  *   Pointer to the Ethernet device structure.
8221  * @param[in] context
8222  *   The address of an array of pointers to the aged-out flows contexts.
8223  * @param[in] nb_countexts
8224  *   The length of context array pointers.
8225  * @param[out] error
8226  *   Perform verbose error reporting if not NULL. Initialized in case of
8227  *   error only.
8228  *
8229  * @return
8230  *   how many contexts get in success, otherwise negative errno value.
8231  *   if nb_contexts is 0, return the amount of all aged contexts.
8232  *   if nb_contexts is not 0 , return the amount of aged flows reported
8233  *   in the context array.
8234  */
8235 int
8236 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
8237                         uint32_t nb_contexts, struct rte_flow_error *error)
8238 {
8239         const struct mlx5_flow_driver_ops *fops;
8240         struct rte_flow_attr attr = { .transfer = 0 };
8241
8242         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
8243                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
8244                 return fops->get_aged_flows(dev, contexts, nb_contexts,
8245                                                     error);
8246         }
8247         DRV_LOG(ERR,
8248                 "port %u get aged flows is not supported.",
8249                  dev->data->port_id);
8250         return -ENOTSUP;
8251 }
8252
8253 /* Wrapper for driver action_validate op callback */
8254 static int
8255 flow_drv_action_validate(struct rte_eth_dev *dev,
8256                          const struct rte_flow_indir_action_conf *conf,
8257                          const struct rte_flow_action *action,
8258                          const struct mlx5_flow_driver_ops *fops,
8259                          struct rte_flow_error *error)
8260 {
8261         static const char err_msg[] = "indirect action validation unsupported";
8262
8263         if (!fops->action_validate) {
8264                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8265                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8266                                    NULL, err_msg);
8267                 return -rte_errno;
8268         }
8269         return fops->action_validate(dev, conf, action, error);
8270 }
8271
8272 /**
8273  * Destroys the shared action by handle.
8274  *
8275  * @param dev
8276  *   Pointer to Ethernet device structure.
8277  * @param[in] handle
8278  *   Handle for the indirect action object to be destroyed.
8279  * @param[out] error
8280  *   Perform verbose error reporting if not NULL. PMDs initialize this
8281  *   structure in case of error only.
8282  *
8283  * @return
8284  *   0 on success, a negative errno value otherwise and rte_errno is set.
8285  *
8286  * @note: wrapper for driver action_create op callback.
8287  */
8288 static int
8289 mlx5_action_handle_destroy(struct rte_eth_dev *dev,
8290                            struct rte_flow_action_handle *handle,
8291                            struct rte_flow_error *error)
8292 {
8293         static const char err_msg[] = "indirect action destruction unsupported";
8294         struct rte_flow_attr attr = { .transfer = 0 };
8295         const struct mlx5_flow_driver_ops *fops =
8296                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8297
8298         if (!fops->action_destroy) {
8299                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8300                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8301                                    NULL, err_msg);
8302                 return -rte_errno;
8303         }
8304         return fops->action_destroy(dev, handle, error);
8305 }
8306
8307 /* Wrapper for driver action_destroy op callback */
8308 static int
8309 flow_drv_action_update(struct rte_eth_dev *dev,
8310                        struct rte_flow_action_handle *handle,
8311                        const void *update,
8312                        const struct mlx5_flow_driver_ops *fops,
8313                        struct rte_flow_error *error)
8314 {
8315         static const char err_msg[] = "indirect action update unsupported";
8316
8317         if (!fops->action_update) {
8318                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8319                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8320                                    NULL, err_msg);
8321                 return -rte_errno;
8322         }
8323         return fops->action_update(dev, handle, update, error);
8324 }
8325
8326 /* Wrapper for driver action_destroy op callback */
8327 static int
8328 flow_drv_action_query(struct rte_eth_dev *dev,
8329                       const struct rte_flow_action_handle *handle,
8330                       void *data,
8331                       const struct mlx5_flow_driver_ops *fops,
8332                       struct rte_flow_error *error)
8333 {
8334         static const char err_msg[] = "indirect action query unsupported";
8335
8336         if (!fops->action_query) {
8337                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8338                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8339                                    NULL, err_msg);
8340                 return -rte_errno;
8341         }
8342         return fops->action_query(dev, handle, data, error);
8343 }
8344
8345 /**
8346  * Create indirect action for reuse in multiple flow rules.
8347  *
8348  * @param dev
8349  *   Pointer to Ethernet device structure.
8350  * @param conf
8351  *   Pointer to indirect action object configuration.
8352  * @param[in] action
8353  *   Action configuration for indirect action object creation.
8354  * @param[out] error
8355  *   Perform verbose error reporting if not NULL. PMDs initialize this
8356  *   structure in case of error only.
8357  * @return
8358  *   A valid handle in case of success, NULL otherwise and rte_errno is set.
8359  */
8360 static struct rte_flow_action_handle *
8361 mlx5_action_handle_create(struct rte_eth_dev *dev,
8362                           const struct rte_flow_indir_action_conf *conf,
8363                           const struct rte_flow_action *action,
8364                           struct rte_flow_error *error)
8365 {
8366         static const char err_msg[] = "indirect action creation unsupported";
8367         struct rte_flow_attr attr = { .transfer = 0 };
8368         const struct mlx5_flow_driver_ops *fops =
8369                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8370
8371         if (flow_drv_action_validate(dev, conf, action, fops, error))
8372                 return NULL;
8373         if (!fops->action_create) {
8374                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8375                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8376                                    NULL, err_msg);
8377                 return NULL;
8378         }
8379         return fops->action_create(dev, conf, action, error);
8380 }
8381
8382 /**
8383  * Updates inplace the indirect action configuration pointed by *handle*
8384  * with the configuration provided as *update* argument.
8385  * The update of the indirect action configuration effects all flow rules
8386  * reusing the action via handle.
8387  *
8388  * @param dev
8389  *   Pointer to Ethernet device structure.
8390  * @param[in] handle
8391  *   Handle for the indirect action to be updated.
8392  * @param[in] update
8393  *   Action specification used to modify the action pointed by handle.
8394  *   *update* could be of same type with the action pointed by the *handle*
8395  *   handle argument, or some other structures like a wrapper, depending on
8396  *   the indirect action type.
8397  * @param[out] error
8398  *   Perform verbose error reporting if not NULL. PMDs initialize this
8399  *   structure in case of error only.
8400  *
8401  * @return
8402  *   0 on success, a negative errno value otherwise and rte_errno is set.
8403  */
8404 static int
8405 mlx5_action_handle_update(struct rte_eth_dev *dev,
8406                 struct rte_flow_action_handle *handle,
8407                 const void *update,
8408                 struct rte_flow_error *error)
8409 {
8410         struct rte_flow_attr attr = { .transfer = 0 };
8411         const struct mlx5_flow_driver_ops *fops =
8412                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8413         int ret;
8414
8415         ret = flow_drv_action_validate(dev, NULL,
8416                         (const struct rte_flow_action *)update, fops, error);
8417         if (ret)
8418                 return ret;
8419         return flow_drv_action_update(dev, handle, update, fops,
8420                                       error);
8421 }
8422
8423 /**
8424  * Query the indirect action by handle.
8425  *
8426  * This function allows retrieving action-specific data such as counters.
8427  * Data is gathered by special action which may be present/referenced in
8428  * more than one flow rule definition.
8429  *
8430  * see @RTE_FLOW_ACTION_TYPE_COUNT
8431  *
8432  * @param dev
8433  *   Pointer to Ethernet device structure.
8434  * @param[in] handle
8435  *   Handle for the indirect action to query.
8436  * @param[in, out] data
8437  *   Pointer to storage for the associated query data type.
8438  * @param[out] error
8439  *   Perform verbose error reporting if not NULL. PMDs initialize this
8440  *   structure in case of error only.
8441  *
8442  * @return
8443  *   0 on success, a negative errno value otherwise and rte_errno is set.
8444  */
8445 static int
8446 mlx5_action_handle_query(struct rte_eth_dev *dev,
8447                          const struct rte_flow_action_handle *handle,
8448                          void *data,
8449                          struct rte_flow_error *error)
8450 {
8451         struct rte_flow_attr attr = { .transfer = 0 };
8452         const struct mlx5_flow_driver_ops *fops =
8453                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8454
8455         return flow_drv_action_query(dev, handle, data, fops, error);
8456 }
8457
8458 /**
8459  * Destroy all indirect actions (shared RSS).
8460  *
8461  * @param dev
8462  *   Pointer to Ethernet device.
8463  *
8464  * @return
8465  *   0 on success, a negative errno value otherwise and rte_errno is set.
8466  */
8467 int
8468 mlx5_action_handle_flush(struct rte_eth_dev *dev)
8469 {
8470         struct rte_flow_error error;
8471         struct mlx5_priv *priv = dev->data->dev_private;
8472         struct mlx5_shared_action_rss *shared_rss;
8473         int ret = 0;
8474         uint32_t idx;
8475
8476         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
8477                       priv->rss_shared_actions, idx, shared_rss, next) {
8478                 ret |= mlx5_action_handle_destroy(dev,
8479                        (struct rte_flow_action_handle *)(uintptr_t)idx, &error);
8480         }
8481         return ret;
8482 }
8483
8484 #ifndef HAVE_MLX5DV_DR
8485 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1))
8486 #else
8487 #define MLX5_DOMAIN_SYNC_FLOW \
8488         (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW)
8489 #endif
8490
8491 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
8492 {
8493         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
8494         const struct mlx5_flow_driver_ops *fops;
8495         int ret;
8496         struct rte_flow_attr attr = { .transfer = 0 };
8497
8498         fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8499         ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW);
8500         if (ret > 0)
8501                 ret = -ret;
8502         return ret;
8503 }
8504
8505 const struct mlx5_flow_tunnel *
8506 mlx5_get_tof(const struct rte_flow_item *item,
8507              const struct rte_flow_action *action,
8508              enum mlx5_tof_rule_type *rule_type)
8509 {
8510         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
8511                 if (item->type == (typeof(item->type))
8512                                   MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL) {
8513                         *rule_type = MLX5_TUNNEL_OFFLOAD_MATCH_RULE;
8514                         return flow_items_to_tunnel(item);
8515                 }
8516         }
8517         for (; action->conf != RTE_FLOW_ACTION_TYPE_END; action++) {
8518                 if (action->type == (typeof(action->type))
8519                                     MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET) {
8520                         *rule_type = MLX5_TUNNEL_OFFLOAD_SET_RULE;
8521                         return flow_actions_to_tunnel(action);
8522                 }
8523         }
8524         return NULL;
8525 }
8526
8527 /**
8528  * tunnel offload functionalilty is defined for DV environment only
8529  */
8530 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8531 __extension__
8532 union tunnel_offload_mark {
8533         uint32_t val;
8534         struct {
8535                 uint32_t app_reserve:8;
8536                 uint32_t table_id:15;
8537                 uint32_t transfer:1;
8538                 uint32_t _unused_:8;
8539         };
8540 };
8541
8542 static bool
8543 mlx5_access_tunnel_offload_db
8544         (struct rte_eth_dev *dev,
8545          bool (*match)(struct rte_eth_dev *,
8546                        struct mlx5_flow_tunnel *, const void *),
8547          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
8548          void (*miss)(struct rte_eth_dev *, void *),
8549          void *ctx, bool lock_op);
8550
8551 static int
8552 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
8553                              struct rte_flow *flow,
8554                              const struct rte_flow_attr *attr,
8555                              const struct rte_flow_action *app_actions,
8556                              uint32_t flow_idx,
8557                              const struct mlx5_flow_tunnel *tunnel,
8558                              struct tunnel_default_miss_ctx *ctx,
8559                              struct rte_flow_error *error)
8560 {
8561         struct mlx5_priv *priv = dev->data->dev_private;
8562         struct mlx5_flow *dev_flow;
8563         struct rte_flow_attr miss_attr = *attr;
8564         const struct rte_flow_item miss_items[2] = {
8565                 {
8566                         .type = RTE_FLOW_ITEM_TYPE_ETH,
8567                         .spec = NULL,
8568                         .last = NULL,
8569                         .mask = NULL
8570                 },
8571                 {
8572                         .type = RTE_FLOW_ITEM_TYPE_END,
8573                         .spec = NULL,
8574                         .last = NULL,
8575                         .mask = NULL
8576                 }
8577         };
8578         union tunnel_offload_mark mark_id;
8579         struct rte_flow_action_mark miss_mark;
8580         struct rte_flow_action miss_actions[3] = {
8581                 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark },
8582                 [2] = { .type = RTE_FLOW_ACTION_TYPE_END,  .conf = NULL }
8583         };
8584         const struct rte_flow_action_jump *jump_data;
8585         uint32_t i, flow_table = 0; /* prevent compilation warning */
8586         struct flow_grp_info grp_info = {
8587                 .external = 1,
8588                 .transfer = attr->transfer,
8589                 .fdb_def_rule = !!priv->fdb_def_rule,
8590                 .std_tbl_fix = 0,
8591         };
8592         int ret;
8593
8594         if (!attr->transfer) {
8595                 uint32_t q_size;
8596
8597                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS;
8598                 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]);
8599                 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size,
8600                                          0, SOCKET_ID_ANY);
8601                 if (!ctx->queue)
8602                         return rte_flow_error_set
8603                                 (error, ENOMEM,
8604                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
8605                                 NULL, "invalid default miss RSS");
8606                 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT,
8607                 ctx->action_rss.level = 0,
8608                 ctx->action_rss.types = priv->rss_conf.rss_hf,
8609                 ctx->action_rss.key_len = priv->rss_conf.rss_key_len,
8610                 ctx->action_rss.queue_num = priv->reta_idx_n,
8611                 ctx->action_rss.key = priv->rss_conf.rss_key,
8612                 ctx->action_rss.queue = ctx->queue;
8613                 if (!priv->reta_idx_n || !priv->rxqs_n)
8614                         return rte_flow_error_set
8615                                 (error, EINVAL,
8616                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
8617                                 NULL, "invalid port configuration");
8618                 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
8619                         ctx->action_rss.types = 0;
8620                 for (i = 0; i != priv->reta_idx_n; ++i)
8621                         ctx->queue[i] = (*priv->reta_idx)[i];
8622         } else {
8623                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP;
8624                 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP;
8625         }
8626         miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw;
8627         for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++);
8628         jump_data = app_actions->conf;
8629         miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY;
8630         miss_attr.group = jump_data->group;
8631         ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group,
8632                                        &flow_table, &grp_info, error);
8633         if (ret)
8634                 return rte_flow_error_set(error, EINVAL,
8635                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
8636                                           NULL, "invalid tunnel id");
8637         mark_id.app_reserve = 0;
8638         mark_id.table_id = tunnel_flow_tbl_to_id(flow_table);
8639         mark_id.transfer = !!attr->transfer;
8640         mark_id._unused_ = 0;
8641         miss_mark.id = mark_id.val;
8642         dev_flow = flow_drv_prepare(dev, flow, &miss_attr,
8643                                     miss_items, miss_actions, flow_idx, error);
8644         if (!dev_flow)
8645                 return -rte_errno;
8646         dev_flow->flow = flow;
8647         dev_flow->external = true;
8648         dev_flow->tunnel = tunnel;
8649         dev_flow->tof_type = MLX5_TUNNEL_OFFLOAD_MISS_RULE;
8650         /* Subflow object was created, we must include one in the list. */
8651         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
8652                       dev_flow->handle, next);
8653         DRV_LOG(DEBUG,
8654                 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u",
8655                 dev->data->port_id, tunnel->app_tunnel.type,
8656                 tunnel->tunnel_id, miss_attr.priority, miss_attr.group);
8657         ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items,
8658                                   miss_actions, error);
8659         if (!ret)
8660                 ret = flow_mreg_update_copy_table(dev, flow, miss_actions,
8661                                                   error);
8662
8663         return ret;
8664 }
8665
8666 static const struct mlx5_flow_tbl_data_entry  *
8667 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark)
8668 {
8669         struct mlx5_priv *priv = dev->data->dev_private;
8670         struct mlx5_dev_ctx_shared *sh = priv->sh;
8671         struct mlx5_hlist_entry *he;
8672         union tunnel_offload_mark mbits = { .val = mark };
8673         union mlx5_flow_tbl_key table_key = {
8674                 {
8675                         .level = tunnel_id_to_flow_tbl(mbits.table_id),
8676                         .id = 0,
8677                         .reserved = 0,
8678                         .dummy = 0,
8679                         .is_fdb = !!mbits.transfer,
8680                         .is_egress = 0,
8681                 }
8682         };
8683         he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, NULL);
8684         return he ?
8685                container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL;
8686 }
8687
8688 static void
8689 mlx5_flow_tunnel_grp2tbl_remove_cb(struct mlx5_hlist *list,
8690                                    struct mlx5_hlist_entry *entry)
8691 {
8692         struct mlx5_dev_ctx_shared *sh = list->ctx;
8693         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
8694
8695         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
8696                         tunnel_flow_tbl_to_id(tte->flow_table));
8697         mlx5_free(tte);
8698 }
8699
8700 static int
8701 mlx5_flow_tunnel_grp2tbl_match_cb(struct mlx5_hlist *list __rte_unused,
8702                                   struct mlx5_hlist_entry *entry,
8703                                   uint64_t key, void *cb_ctx __rte_unused)
8704 {
8705         union tunnel_tbl_key tbl = {
8706                 .val = key,
8707         };
8708         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
8709
8710         return tbl.tunnel_id != tte->tunnel_id || tbl.group != tte->group;
8711 }
8712
8713 static struct mlx5_hlist_entry *
8714 mlx5_flow_tunnel_grp2tbl_create_cb(struct mlx5_hlist *list, uint64_t key,
8715                                    void *ctx __rte_unused)
8716 {
8717         struct mlx5_dev_ctx_shared *sh = list->ctx;
8718         struct tunnel_tbl_entry *tte;
8719         union tunnel_tbl_key tbl = {
8720                 .val = key,
8721         };
8722
8723         tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
8724                           sizeof(*tte), 0,
8725                           SOCKET_ID_ANY);
8726         if (!tte)
8727                 goto err;
8728         mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
8729                           &tte->flow_table);
8730         if (tte->flow_table >= MLX5_MAX_TABLES) {
8731                 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.",
8732                         tte->flow_table);
8733                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
8734                                 tte->flow_table);
8735                 goto err;
8736         } else if (!tte->flow_table) {
8737                 goto err;
8738         }
8739         tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table);
8740         tte->tunnel_id = tbl.tunnel_id;
8741         tte->group = tbl.group;
8742         return &tte->hash;
8743 err:
8744         if (tte)
8745                 mlx5_free(tte);
8746         return NULL;
8747 }
8748
8749 static uint32_t
8750 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
8751                                 const struct mlx5_flow_tunnel *tunnel,
8752                                 uint32_t group, uint32_t *table,
8753                                 struct rte_flow_error *error)
8754 {
8755         struct mlx5_hlist_entry *he;
8756         struct tunnel_tbl_entry *tte;
8757         union tunnel_tbl_key key = {
8758                 .tunnel_id = tunnel ? tunnel->tunnel_id : 0,
8759                 .group = group
8760         };
8761         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8762         struct mlx5_hlist *group_hash;
8763
8764         group_hash = tunnel ? tunnel->groups : thub->groups;
8765         he = mlx5_hlist_register(group_hash, key.val, NULL);
8766         if (!he)
8767                 return rte_flow_error_set(error, EINVAL,
8768                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
8769                                           NULL,
8770                                           "tunnel group index not supported");
8771         tte = container_of(he, typeof(*tte), hash);
8772         *table = tte->flow_table;
8773         DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x",
8774                 dev->data->port_id, key.tunnel_id, group, *table);
8775         return 0;
8776 }
8777
8778 static void
8779 mlx5_flow_tunnel_free(struct rte_eth_dev *dev,
8780                       struct mlx5_flow_tunnel *tunnel)
8781 {
8782         struct mlx5_priv *priv = dev->data->dev_private;
8783         struct mlx5_indexed_pool *ipool;
8784
8785         DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x",
8786                 dev->data->port_id, tunnel->tunnel_id);
8787         LIST_REMOVE(tunnel, chain);
8788         mlx5_hlist_destroy(tunnel->groups);
8789         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
8790         mlx5_ipool_free(ipool, tunnel->tunnel_id);
8791 }
8792
8793 static bool
8794 mlx5_access_tunnel_offload_db
8795         (struct rte_eth_dev *dev,
8796          bool (*match)(struct rte_eth_dev *,
8797                        struct mlx5_flow_tunnel *, const void *),
8798          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
8799          void (*miss)(struct rte_eth_dev *, void *),
8800          void *ctx, bool lock_op)
8801 {
8802         bool verdict = false;
8803         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8804         struct mlx5_flow_tunnel *tunnel;
8805
8806         rte_spinlock_lock(&thub->sl);
8807         LIST_FOREACH(tunnel, &thub->tunnels, chain) {
8808                 verdict = match(dev, tunnel, (const void *)ctx);
8809                 if (verdict)
8810                         break;
8811         }
8812         if (!lock_op)
8813                 rte_spinlock_unlock(&thub->sl);
8814         if (verdict && hit)
8815                 hit(dev, tunnel, ctx);
8816         if (!verdict && miss)
8817                 miss(dev, ctx);
8818         if (lock_op)
8819                 rte_spinlock_unlock(&thub->sl);
8820
8821         return verdict;
8822 }
8823
8824 struct tunnel_db_find_tunnel_id_ctx {
8825         uint32_t tunnel_id;
8826         struct mlx5_flow_tunnel *tunnel;
8827 };
8828
8829 static bool
8830 find_tunnel_id_match(struct rte_eth_dev *dev,
8831                      struct mlx5_flow_tunnel *tunnel, const void *x)
8832 {
8833         const struct tunnel_db_find_tunnel_id_ctx *ctx = x;
8834
8835         RTE_SET_USED(dev);
8836         return tunnel->tunnel_id == ctx->tunnel_id;
8837 }
8838
8839 static void
8840 find_tunnel_id_hit(struct rte_eth_dev *dev,
8841                    struct mlx5_flow_tunnel *tunnel, void *x)
8842 {
8843         struct tunnel_db_find_tunnel_id_ctx *ctx = x;
8844         RTE_SET_USED(dev);
8845         ctx->tunnel = tunnel;
8846 }
8847
8848 static struct mlx5_flow_tunnel *
8849 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id)
8850 {
8851         struct tunnel_db_find_tunnel_id_ctx ctx = {
8852                 .tunnel_id = id,
8853         };
8854
8855         mlx5_access_tunnel_offload_db(dev, find_tunnel_id_match,
8856                                       find_tunnel_id_hit, NULL, &ctx, true);
8857
8858         return ctx.tunnel;
8859 }
8860
8861 static struct mlx5_flow_tunnel *
8862 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev,
8863                           const struct rte_flow_tunnel *app_tunnel)
8864 {
8865         struct mlx5_priv *priv = dev->data->dev_private;
8866         struct mlx5_indexed_pool *ipool;
8867         struct mlx5_flow_tunnel *tunnel;
8868         uint32_t id;
8869
8870         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
8871         tunnel = mlx5_ipool_zmalloc(ipool, &id);
8872         if (!tunnel)
8873                 return NULL;
8874         if (id >= MLX5_MAX_TUNNELS) {
8875                 mlx5_ipool_free(ipool, id);
8876                 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id);
8877                 return NULL;
8878         }
8879         tunnel->groups = mlx5_hlist_create("tunnel groups", 1024, 0, 0,
8880                                            mlx5_flow_tunnel_grp2tbl_create_cb,
8881                                            mlx5_flow_tunnel_grp2tbl_match_cb,
8882                                            mlx5_flow_tunnel_grp2tbl_remove_cb);
8883         if (!tunnel->groups) {
8884                 mlx5_ipool_free(ipool, id);
8885                 return NULL;
8886         }
8887         tunnel->groups->ctx = priv->sh;
8888         /* initiate new PMD tunnel */
8889         memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel));
8890         tunnel->tunnel_id = id;
8891         tunnel->action.type = (typeof(tunnel->action.type))
8892                               MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET;
8893         tunnel->action.conf = tunnel;
8894         tunnel->item.type = (typeof(tunnel->item.type))
8895                             MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL;
8896         tunnel->item.spec = tunnel;
8897         tunnel->item.last = NULL;
8898         tunnel->item.mask = NULL;
8899
8900         DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x",
8901                 dev->data->port_id, tunnel->tunnel_id);
8902
8903         return tunnel;
8904 }
8905
8906 struct tunnel_db_get_tunnel_ctx {
8907         const struct rte_flow_tunnel *app_tunnel;
8908         struct mlx5_flow_tunnel *tunnel;
8909 };
8910
8911 static bool get_tunnel_match(struct rte_eth_dev *dev,
8912                              struct mlx5_flow_tunnel *tunnel, const void *x)
8913 {
8914         const struct tunnel_db_get_tunnel_ctx *ctx = x;
8915
8916         RTE_SET_USED(dev);
8917         return !memcmp(ctx->app_tunnel, &tunnel->app_tunnel,
8918                        sizeof(*ctx->app_tunnel));
8919 }
8920
8921 static void get_tunnel_hit(struct rte_eth_dev *dev,
8922                            struct mlx5_flow_tunnel *tunnel, void *x)
8923 {
8924         /* called under tunnel spinlock protection */
8925         struct tunnel_db_get_tunnel_ctx *ctx = x;
8926
8927         RTE_SET_USED(dev);
8928         tunnel->refctn++;
8929         ctx->tunnel = tunnel;
8930 }
8931
8932 static void get_tunnel_miss(struct rte_eth_dev *dev, void *x)
8933 {
8934         /* called under tunnel spinlock protection */
8935         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
8936         struct tunnel_db_get_tunnel_ctx *ctx = x;
8937
8938         rte_spinlock_unlock(&thub->sl);
8939         ctx->tunnel = mlx5_flow_tunnel_allocate(dev, ctx->app_tunnel);
8940         rte_spinlock_lock(&thub->sl);
8941         if (ctx->tunnel) {
8942                 ctx->tunnel->refctn = 1;
8943                 LIST_INSERT_HEAD(&thub->tunnels, ctx->tunnel, chain);
8944         }
8945 }
8946
8947
8948 static int
8949 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
8950                      const struct rte_flow_tunnel *app_tunnel,
8951                      struct mlx5_flow_tunnel **tunnel)
8952 {
8953         struct tunnel_db_get_tunnel_ctx ctx = {
8954                 .app_tunnel = app_tunnel,
8955         };
8956
8957         mlx5_access_tunnel_offload_db(dev, get_tunnel_match, get_tunnel_hit,
8958                                       get_tunnel_miss, &ctx, true);
8959         *tunnel = ctx.tunnel;
8960         return ctx.tunnel ? 0 : -ENOMEM;
8961 }
8962
8963 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id)
8964 {
8965         struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
8966
8967         if (!thub)
8968                 return;
8969         if (!LIST_EMPTY(&thub->tunnels))
8970                 DRV_LOG(WARNING, "port %u tunnels present", port_id);
8971         mlx5_hlist_destroy(thub->groups);
8972         mlx5_free(thub);
8973 }
8974
8975 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh)
8976 {
8977         int err;
8978         struct mlx5_flow_tunnel_hub *thub;
8979
8980         thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub),
8981                            0, SOCKET_ID_ANY);
8982         if (!thub)
8983                 return -ENOMEM;
8984         LIST_INIT(&thub->tunnels);
8985         rte_spinlock_init(&thub->sl);
8986         thub->groups = mlx5_hlist_create("flow groups",
8987                                          rte_align32pow2(MLX5_MAX_TABLES), 0,
8988                                          0, mlx5_flow_tunnel_grp2tbl_create_cb,
8989                                          mlx5_flow_tunnel_grp2tbl_match_cb,
8990                                          mlx5_flow_tunnel_grp2tbl_remove_cb);
8991         if (!thub->groups) {
8992                 err = -rte_errno;
8993                 goto err;
8994         }
8995         thub->groups->ctx = sh;
8996         sh->tunnel_hub = thub;
8997
8998         return 0;
8999
9000 err:
9001         if (thub->groups)
9002                 mlx5_hlist_destroy(thub->groups);
9003         if (thub)
9004                 mlx5_free(thub);
9005         return err;
9006 }
9007
9008 static inline bool
9009 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev,
9010                           struct rte_flow_tunnel *tunnel,
9011                           const char *err_msg)
9012 {
9013         err_msg = NULL;
9014         if (!is_tunnel_offload_active(dev)) {
9015                 err_msg = "tunnel offload was not activated";
9016                 goto out;
9017         } else if (!tunnel) {
9018                 err_msg = "no application tunnel";
9019                 goto out;
9020         }
9021
9022         switch (tunnel->type) {
9023         default:
9024                 err_msg = "unsupported tunnel type";
9025                 goto out;
9026         case RTE_FLOW_ITEM_TYPE_VXLAN:
9027                 break;
9028         }
9029
9030 out:
9031         return !err_msg;
9032 }
9033
9034 static int
9035 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
9036                     struct rte_flow_tunnel *app_tunnel,
9037                     struct rte_flow_action **actions,
9038                     uint32_t *num_of_actions,
9039                     struct rte_flow_error *error)
9040 {
9041         int ret;
9042         struct mlx5_flow_tunnel *tunnel;
9043         const char *err_msg = NULL;
9044         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
9045
9046         if (!verdict)
9047                 return rte_flow_error_set(error, EINVAL,
9048                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9049                                           err_msg);
9050         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
9051         if (ret < 0) {
9052                 return rte_flow_error_set(error, ret,
9053                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9054                                           "failed to initialize pmd tunnel");
9055         }
9056         *actions = &tunnel->action;
9057         *num_of_actions = 1;
9058         return 0;
9059 }
9060
9061 static int
9062 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
9063                        struct rte_flow_tunnel *app_tunnel,
9064                        struct rte_flow_item **items,
9065                        uint32_t *num_of_items,
9066                        struct rte_flow_error *error)
9067 {
9068         int ret;
9069         struct mlx5_flow_tunnel *tunnel;
9070         const char *err_msg = NULL;
9071         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
9072
9073         if (!verdict)
9074                 return rte_flow_error_set(error, EINVAL,
9075                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9076                                           err_msg);
9077         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
9078         if (ret < 0) {
9079                 return rte_flow_error_set(error, ret,
9080                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9081                                           "failed to initialize pmd tunnel");
9082         }
9083         *items = &tunnel->item;
9084         *num_of_items = 1;
9085         return 0;
9086 }
9087
9088 struct tunnel_db_element_release_ctx {
9089         struct rte_flow_item *items;
9090         struct rte_flow_action *actions;
9091         uint32_t num_elements;
9092         struct rte_flow_error *error;
9093         int ret;
9094 };
9095
9096 static bool
9097 tunnel_element_release_match(struct rte_eth_dev *dev,
9098                              struct mlx5_flow_tunnel *tunnel, const void *x)
9099 {
9100         const struct tunnel_db_element_release_ctx *ctx = x;
9101
9102         RTE_SET_USED(dev);
9103         if (ctx->num_elements != 1)
9104                 return false;
9105         else if (ctx->items)
9106                 return ctx->items == &tunnel->item;
9107         else if (ctx->actions)
9108                 return ctx->actions == &tunnel->action;
9109
9110         return false;
9111 }
9112
9113 static void
9114 tunnel_element_release_hit(struct rte_eth_dev *dev,
9115                            struct mlx5_flow_tunnel *tunnel, void *x)
9116 {
9117         struct tunnel_db_element_release_ctx *ctx = x;
9118         ctx->ret = 0;
9119         if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
9120                 mlx5_flow_tunnel_free(dev, tunnel);
9121 }
9122
9123 static void
9124 tunnel_element_release_miss(struct rte_eth_dev *dev, void *x)
9125 {
9126         struct tunnel_db_element_release_ctx *ctx = x;
9127         RTE_SET_USED(dev);
9128         ctx->ret = rte_flow_error_set(ctx->error, EINVAL,
9129                                       RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9130                                       "invalid argument");
9131 }
9132
9133 static int
9134 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
9135                        struct rte_flow_item *pmd_items,
9136                        uint32_t num_items, struct rte_flow_error *err)
9137 {
9138         struct tunnel_db_element_release_ctx ctx = {
9139                 .items = pmd_items,
9140                 .actions = NULL,
9141                 .num_elements = num_items,
9142                 .error = err,
9143         };
9144
9145         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
9146                                       tunnel_element_release_hit,
9147                                       tunnel_element_release_miss, &ctx, false);
9148
9149         return ctx.ret;
9150 }
9151
9152 static int
9153 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
9154                          struct rte_flow_action *pmd_actions,
9155                          uint32_t num_actions, struct rte_flow_error *err)
9156 {
9157         struct tunnel_db_element_release_ctx ctx = {
9158                 .items = NULL,
9159                 .actions = pmd_actions,
9160                 .num_elements = num_actions,
9161                 .error = err,
9162         };
9163
9164         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
9165                                       tunnel_element_release_hit,
9166                                       tunnel_element_release_miss, &ctx, false);
9167
9168         return ctx.ret;
9169 }
9170
9171 static int
9172 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
9173                                   struct rte_mbuf *m,
9174                                   struct rte_flow_restore_info *info,
9175                                   struct rte_flow_error *err)
9176 {
9177         uint64_t ol_flags = m->ol_flags;
9178         const struct mlx5_flow_tbl_data_entry *tble;
9179         const uint64_t mask = PKT_RX_FDIR | PKT_RX_FDIR_ID;
9180
9181         if (!is_tunnel_offload_active(dev)) {
9182                 info->flags = 0;
9183                 return 0;
9184         }
9185
9186         if ((ol_flags & mask) != mask)
9187                 goto err;
9188         tble = tunnel_mark_decode(dev, m->hash.fdir.hi);
9189         if (!tble) {
9190                 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x",
9191                         dev->data->port_id, m->hash.fdir.hi);
9192                 goto err;
9193         }
9194         MLX5_ASSERT(tble->tunnel);
9195         memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel));
9196         info->group_id = tble->group_id;
9197         info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL |
9198                       RTE_FLOW_RESTORE_INFO_GROUP_ID |
9199                       RTE_FLOW_RESTORE_INFO_ENCAPSULATED;
9200
9201         return 0;
9202
9203 err:
9204         return rte_flow_error_set(err, EINVAL,
9205                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9206                                   "failed to get restore info");
9207 }
9208
9209 #else /* HAVE_IBV_FLOW_DV_SUPPORT */
9210 static int
9211 mlx5_flow_tunnel_decap_set(__rte_unused struct rte_eth_dev *dev,
9212                            __rte_unused struct rte_flow_tunnel *app_tunnel,
9213                            __rte_unused struct rte_flow_action **actions,
9214                            __rte_unused uint32_t *num_of_actions,
9215                            __rte_unused struct rte_flow_error *error)
9216 {
9217         return -ENOTSUP;
9218 }
9219
9220 static int
9221 mlx5_flow_tunnel_match(__rte_unused struct rte_eth_dev *dev,
9222                        __rte_unused struct rte_flow_tunnel *app_tunnel,
9223                        __rte_unused struct rte_flow_item **items,
9224                        __rte_unused uint32_t *num_of_items,
9225                        __rte_unused struct rte_flow_error *error)
9226 {
9227         return -ENOTSUP;
9228 }
9229
9230 static int
9231 mlx5_flow_tunnel_item_release(__rte_unused struct rte_eth_dev *dev,
9232                               __rte_unused struct rte_flow_item *pmd_items,
9233                               __rte_unused uint32_t num_items,
9234                               __rte_unused struct rte_flow_error *err)
9235 {
9236         return -ENOTSUP;
9237 }
9238
9239 static int
9240 mlx5_flow_tunnel_action_release(__rte_unused struct rte_eth_dev *dev,
9241                                 __rte_unused struct rte_flow_action *pmd_action,
9242                                 __rte_unused uint32_t num_actions,
9243                                 __rte_unused struct rte_flow_error *err)
9244 {
9245         return -ENOTSUP;
9246 }
9247
9248 static int
9249 mlx5_flow_tunnel_get_restore_info(__rte_unused struct rte_eth_dev *dev,
9250                                   __rte_unused struct rte_mbuf *m,
9251                                   __rte_unused struct rte_flow_restore_info *i,
9252                                   __rte_unused struct rte_flow_error *err)
9253 {
9254         return -ENOTSUP;
9255 }
9256
9257 static int
9258 flow_tunnel_add_default_miss(__rte_unused struct rte_eth_dev *dev,
9259                              __rte_unused struct rte_flow *flow,
9260                              __rte_unused const struct rte_flow_attr *attr,
9261                              __rte_unused const struct rte_flow_action *actions,
9262                              __rte_unused uint32_t flow_idx,
9263                              __rte_unused const struct mlx5_flow_tunnel *tunnel,
9264                              __rte_unused struct tunnel_default_miss_ctx *ctx,
9265                              __rte_unused struct rte_flow_error *error)
9266 {
9267         return -ENOTSUP;
9268 }
9269
9270 static struct mlx5_flow_tunnel *
9271 mlx5_find_tunnel_id(__rte_unused struct rte_eth_dev *dev,
9272                     __rte_unused uint32_t id)
9273 {
9274         return NULL;
9275 }
9276
9277 static void
9278 mlx5_flow_tunnel_free(__rte_unused struct rte_eth_dev *dev,
9279                       __rte_unused struct mlx5_flow_tunnel *tunnel)
9280 {
9281 }
9282
9283 static uint32_t
9284 tunnel_flow_group_to_flow_table(__rte_unused struct rte_eth_dev *dev,
9285                                 __rte_unused const struct mlx5_flow_tunnel *t,
9286                                 __rte_unused uint32_t group,
9287                                 __rte_unused uint32_t *table,
9288                                 struct rte_flow_error *error)
9289 {
9290         return rte_flow_error_set(error, ENOTSUP,
9291                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9292                                   "tunnel offload requires DV support");
9293 }
9294
9295 void
9296 mlx5_release_tunnel_hub(__rte_unused struct mlx5_dev_ctx_shared *sh,
9297                         __rte_unused  uint16_t port_id)
9298 {
9299 }
9300 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
9301
9302 static void
9303 mlx5_dbg__print_pattern(const struct rte_flow_item *item)
9304 {
9305         int ret;
9306         struct rte_flow_error error;
9307
9308         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
9309                 char *item_name;
9310                 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ITEM_NAME_PTR, &item_name,
9311                                     sizeof(item_name),
9312                                     (void *)(uintptr_t)item->type, &error);
9313                 if (ret > 0)
9314                         printf("%s ", item_name);
9315                 else
9316                         printf("%d\n", (int)item->type);
9317         }
9318         printf("END\n");
9319 }