drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <netinet/in.h>
   7 #include <sys/queue.h>
   8 #include <stdalign.h>
   9 #include <stdint.h>
  10 #include <string.h>
  11 #include <stdbool.h>
  12
  13 #include <rte_common.h>
  14 #include <rte_ether.h>
  15 #include <rte_ethdev_driver.h>
  16 #include <rte_eal_paging.h>
  17 #include <rte_flow.h>
  18 #include <rte_cycles.h>
  19 #include <rte_flow_driver.h>
  20 #include <rte_malloc.h>
  21 #include <rte_ip.h>
  22
  23 #include <mlx5_glue.h>
  24 #include <mlx5_devx_cmds.h>
  25 #include <mlx5_prm.h>
  26 #include <mlx5_malloc.h>
  27
  28 #include "mlx5_defs.h"
  29 #include "mlx5.h"
  30 #include "mlx5_flow.h"
  31 #include "mlx5_flow_os.h"
  32 #include "mlx5_rxtx.h"
  33 #include "mlx5_common_os.h"
  34 #include "rte_pmd_mlx5.h"
  35
  36 static struct mlx5_flow_tunnel *
  37 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id);
  38 static void
  39 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel);
  40 static const struct mlx5_flow_tbl_data_entry  *
  41 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark);
  42 static int
  43 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
  44                      const struct rte_flow_tunnel *app_tunnel,
  45                      struct mlx5_flow_tunnel **tunnel);
  46
  47
  48 /** Device flow drivers. */
  49 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  50
  51 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  52
  53 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  54         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  55 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  56         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  57 #endif
  58         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  59         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  60 };
  61
  62 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */
  63 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \
  64         (const int []){ \
  65                 __VA_ARGS__, 0, \
  66         }
  67
  68 /** Node object of input graph for mlx5_flow_expand_rss(). */
  69 struct mlx5_flow_expand_node {
  70         const int *const next;
  71         /**<
  72          * List of next node indexes. Index 0 is interpreted as a terminator.
  73          */
  74         const enum rte_flow_item_type type;
  75         /**< Pattern item type of current node. */
  76         uint64_t rss_types;
  77         /**<
  78          * RSS types bit-field associated with this node
  79          * (see ETH_RSS_* definitions).
  80          */
  81 };
  82
  83 /** Object returned by mlx5_flow_expand_rss(). */
  84 struct mlx5_flow_expand_rss {
  85         uint32_t entries;
  86         /**< Number of entries @p patterns and @p priorities. */
  87         struct {
  88                 struct rte_flow_item *pattern; /**< Expanded pattern array. */
  89                 uint32_t priority; /**< Priority offset for each expansion. */
  90         } entry[];
  91 };
  92
  93 static enum rte_flow_item_type
  94 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item)
  95 {
  96         enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID;
  97         uint16_t ether_type = 0;
  98         uint16_t ether_type_m;
  99         uint8_t ip_next_proto = 0;
 100         uint8_t ip_next_proto_m;
 101
 102         if (item == NULL || item->spec == NULL)
 103                 return ret;
 104         switch (item->type) {
 105         case RTE_FLOW_ITEM_TYPE_ETH:
 106                 if (item->mask)
 107                         ether_type_m = ((const struct rte_flow_item_eth *)
 108                                                 (item->mask))->type;
 109                 else
 110                         ether_type_m = rte_flow_item_eth_mask.type;
 111                 if (ether_type_m != RTE_BE16(0xFFFF))
 112                         break;
 113                 ether_type = ((const struct rte_flow_item_eth *)
 114                                 (item->spec))->type;
 115                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 116                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 117                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 118                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 119                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 120                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 121                 else
 122                         ret = RTE_FLOW_ITEM_TYPE_END;
 123                 break;
 124         case RTE_FLOW_ITEM_TYPE_VLAN:
 125                 if (item->mask)
 126                         ether_type_m = ((const struct rte_flow_item_vlan *)
 127                                                 (item->mask))->inner_type;
 128                 else
 129                         ether_type_m = rte_flow_item_vlan_mask.inner_type;
 130                 if (ether_type_m != RTE_BE16(0xFFFF))
 131                         break;
 132                 ether_type = ((const struct rte_flow_item_vlan *)
 133                                 (item->spec))->inner_type;
 134                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 135                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 136                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 137                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 138                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 139                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 140                 else
 141                         ret = RTE_FLOW_ITEM_TYPE_END;
 142                 break;
 143         case RTE_FLOW_ITEM_TYPE_IPV4:
 144                 if (item->mask)
 145                         ip_next_proto_m = ((const struct rte_flow_item_ipv4 *)
 146                                         (item->mask))->hdr.next_proto_id;
 147                 else
 148                         ip_next_proto_m =
 149                                 rte_flow_item_ipv4_mask.hdr.next_proto_id;
 150                 if (ip_next_proto_m != 0xFF)
 151                         break;
 152                 ip_next_proto = ((const struct rte_flow_item_ipv4 *)
 153                                 (item->spec))->hdr.next_proto_id;
 154                 if (ip_next_proto == IPPROTO_UDP)
 155                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 156                 else if (ip_next_proto == IPPROTO_TCP)
 157                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 158                 else if (ip_next_proto == IPPROTO_IP)
 159                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 160                 else if (ip_next_proto == IPPROTO_IPV6)
 161                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 162                 else
 163                         ret = RTE_FLOW_ITEM_TYPE_END;
 164                 break;
 165         case RTE_FLOW_ITEM_TYPE_IPV6:
 166                 if (item->mask)
 167                         ip_next_proto_m = ((const struct rte_flow_item_ipv6 *)
 168                                                 (item->mask))->hdr.proto;
 169                 else
 170                         ip_next_proto_m =
 171                                 rte_flow_item_ipv6_mask.hdr.proto;
 172                 if (ip_next_proto_m != 0xFF)
 173                         break;
 174                 ip_next_proto = ((const struct rte_flow_item_ipv6 *)
 175                                 (item->spec))->hdr.proto;
 176                 if (ip_next_proto == IPPROTO_UDP)
 177                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 178                 else if (ip_next_proto == IPPROTO_TCP)
 179                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 180                 else if (ip_next_proto == IPPROTO_IP)
 181                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 182                 else if (ip_next_proto == IPPROTO_IPV6)
 183                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 184                 else
 185                         ret = RTE_FLOW_ITEM_TYPE_END;
 186                 break;
 187         default:
 188                 ret = RTE_FLOW_ITEM_TYPE_VOID;
 189                 break;
 190         }
 191         return ret;
 192 }
 193
 194 /**
 195  * Expand RSS flows into several possible flows according to the RSS hash
 196  * fields requested and the driver capabilities.
 197  *
 198  * @param[out] buf
 199  *   Buffer to store the result expansion.
 200  * @param[in] size
 201  *   Buffer size in bytes. If 0, @p buf can be NULL.
 202  * @param[in] pattern
 203  *   User flow pattern.
 204  * @param[in] types
 205  *   RSS types to expand (see ETH_RSS_* definitions).
 206  * @param[in] graph
 207  *   Input graph to expand @p pattern according to @p types.
 208  * @param[in] graph_root_index
 209  *   Index of root node in @p graph, typically 0.
 210  *
 211  * @return
 212  *   A positive value representing the size of @p buf in bytes regardless of
 213  *   @p size on success, a negative errno value otherwise and rte_errno is
 214  *   set, the following errors are defined:
 215  *
 216  *   -E2BIG: graph-depth @p graph is too deep.
 217  */
 218 static int
 219 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,
 220                      const struct rte_flow_item *pattern, uint64_t types,
 221                      const struct mlx5_flow_expand_node graph[],
 222                      int graph_root_index)
 223 {
 224         const int elt_n = 8;
 225         const struct rte_flow_item *item;
 226         const struct mlx5_flow_expand_node *node = &graph[graph_root_index];
 227         const int *next_node;
 228         const int *stack[elt_n];
 229         int stack_pos = 0;
 230         struct rte_flow_item flow_items[elt_n];
 231         unsigned int i;
 232         size_t lsize;
 233         size_t user_pattern_size = 0;
 234         void *addr = NULL;
 235         const struct mlx5_flow_expand_node *next = NULL;
 236         struct rte_flow_item missed_item;
 237         int missed = 0;
 238         int elt = 0;
 239         const struct rte_flow_item *last_item = NULL;
 240
 241         memset(&missed_item, 0, sizeof(missed_item));
 242         lsize = offsetof(struct mlx5_flow_expand_rss, entry) +
 243                 elt_n * sizeof(buf->entry[0]);
 244         if (lsize <= size) {
 245                 buf->entry[0].priority = 0;
 246                 buf->entry[0].pattern = (void *)&buf->entry[elt_n];
 247                 buf->entries = 0;
 248                 addr = buf->entry[0].pattern;
 249         }
 250         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 251                 if (item->type != RTE_FLOW_ITEM_TYPE_VOID)
 252                         last_item = item;
 253                 for (i = 0; node->next && node->next[i]; ++i) {
 254                         next = &graph[node->next[i]];
 255                         if (next->type == item->type)
 256                                 break;
 257                 }
 258                 if (next)
 259                         node = next;
 260                 user_pattern_size += sizeof(*item);
 261         }
 262         user_pattern_size += sizeof(*item); /* Handle END item. */
 263         lsize += user_pattern_size;
 264         /* Copy the user pattern in the first entry of the buffer. */
 265         if (lsize <= size) {
 266                 rte_memcpy(addr, pattern, user_pattern_size);
 267                 addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 268                 buf->entries = 1;
 269         }
 270         /* Start expanding. */
 271         memset(flow_items, 0, sizeof(flow_items));
 272         user_pattern_size -= sizeof(*item);
 273         /*
 274          * Check if the last valid item has spec set, need complete pattern,
 275          * and the pattern can be used for expansion.
 276          */
 277         missed_item.type = mlx5_flow_expand_rss_item_complete(last_item);
 278         if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) {
 279                 /* Item type END indicates expansion is not required. */
 280                 return lsize;
 281         }
 282         if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) {
 283                 next = NULL;
 284                 missed = 1;
 285                 for (i = 0; node->next && node->next[i]; ++i) {
 286                         next = &graph[node->next[i]];
 287                         if (next->type == missed_item.type) {
 288                                 flow_items[0].type = missed_item.type;
 289                                 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 290                                 break;
 291                         }
 292                         next = NULL;
 293                 }
 294         }
 295         if (next && missed) {
 296                 elt = 2; /* missed item + item end. */
 297                 node = next;
 298                 lsize += elt * sizeof(*item) + user_pattern_size;
 299                 if ((node->rss_types & types) && lsize <= size) {
 300                         buf->entry[buf->entries].priority = 1;
 301                         buf->entry[buf->entries].pattern = addr;
 302                         buf->entries++;
 303                         rte_memcpy(addr, buf->entry[0].pattern,
 304                                    user_pattern_size);
 305                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 306                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 307                         addr = (void *)(((uintptr_t)addr) +
 308                                         elt * sizeof(*item));
 309                 }
 310         }
 311         memset(flow_items, 0, sizeof(flow_items));
 312         next_node = node->next;
 313         stack[stack_pos] = next_node;
 314         node = next_node ? &graph[*next_node] : NULL;
 315         while (node) {
 316                 flow_items[stack_pos].type = node->type;
 317                 if (node->rss_types & types) {
 318                         /*
 319                          * compute the number of items to copy from the
 320                          * expansion and copy it.
 321                          * When the stack_pos is 0, there are 1 element in it,
 322                          * plus the addition END item.
 323                          */
 324                         elt = stack_pos + 2;
 325                         flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END;
 326                         lsize += elt * sizeof(*item) + user_pattern_size;
 327                         if (lsize <= size) {
 328                                 size_t n = elt * sizeof(*item);
 329
 330                                 buf->entry[buf->entries].priority =
 331                                         stack_pos + 1 + missed;
 332                                 buf->entry[buf->entries].pattern = addr;
 333                                 buf->entries++;
 334                                 rte_memcpy(addr, buf->entry[0].pattern,
 335                                            user_pattern_size);
 336                                 addr = (void *)(((uintptr_t)addr) +
 337                                                 user_pattern_size);
 338                                 rte_memcpy(addr, &missed_item,
 339                                            missed * sizeof(*item));
 340                                 addr = (void *)(((uintptr_t)addr) +
 341                                         missed * sizeof(*item));
 342                                 rte_memcpy(addr, flow_items, n);
 343                                 addr = (void *)(((uintptr_t)addr) + n);
 344                         }
 345                 }
 346                 /* Go deeper. */
 347                 if (node->next) {
 348                         next_node = node->next;
 349                         if (stack_pos++ == elt_n) {
 350                                 rte_errno = E2BIG;
 351                                 return -rte_errno;
 352                         }
 353                         stack[stack_pos] = next_node;
 354                 } else if (*(next_node + 1)) {
 355                         /* Follow up with the next possibility. */
 356                         ++next_node;
 357                 } else {
 358                         /* Move to the next path. */
 359                         if (stack_pos)
 360                                 next_node = stack[--stack_pos];
 361                         next_node++;
 362                         stack[stack_pos] = next_node;
 363                 }
 364                 node = *next_node ? &graph[*next_node] : NULL;
 365         };
 366         /* no expanded flows but we have missed item, create one rule for it */
 367         if (buf->entries == 1 && missed != 0) {
 368                 elt = 2;
 369                 lsize += elt * sizeof(*item) + user_pattern_size;
 370                 if (lsize <= size) {
 371                         buf->entry[buf->entries].priority = 1;
 372                         buf->entry[buf->entries].pattern = addr;
 373                         buf->entries++;
 374                         flow_items[0].type = missed_item.type;
 375                         flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 376                         rte_memcpy(addr, buf->entry[0].pattern,
 377                                    user_pattern_size);
 378                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 379                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 380                         addr = (void *)(((uintptr_t)addr) +
 381                                         elt * sizeof(*item));
 382                 }
 383         }
 384         return lsize;
 385 }
 386
 387 enum mlx5_expansion {
 388         MLX5_EXPANSION_ROOT,
 389         MLX5_EXPANSION_ROOT_OUTER,
 390         MLX5_EXPANSION_ROOT_ETH_VLAN,
 391         MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
 392         MLX5_EXPANSION_OUTER_ETH,
 393         MLX5_EXPANSION_OUTER_ETH_VLAN,
 394         MLX5_EXPANSION_OUTER_VLAN,
 395         MLX5_EXPANSION_OUTER_IPV4,
 396         MLX5_EXPANSION_OUTER_IPV4_UDP,
 397         MLX5_EXPANSION_OUTER_IPV4_TCP,
 398         MLX5_EXPANSION_OUTER_IPV6,
 399         MLX5_EXPANSION_OUTER_IPV6_UDP,
 400         MLX5_EXPANSION_OUTER_IPV6_TCP,
 401         MLX5_EXPANSION_VXLAN,
 402         MLX5_EXPANSION_VXLAN_GPE,
 403         MLX5_EXPANSION_GRE,
 404         MLX5_EXPANSION_MPLS,
 405         MLX5_EXPANSION_ETH,
 406         MLX5_EXPANSION_ETH_VLAN,
 407         MLX5_EXPANSION_VLAN,
 408         MLX5_EXPANSION_IPV4,
 409         MLX5_EXPANSION_IPV4_UDP,
 410         MLX5_EXPANSION_IPV4_TCP,
 411         MLX5_EXPANSION_IPV6,
 412         MLX5_EXPANSION_IPV6_UDP,
 413         MLX5_EXPANSION_IPV6_TCP,
 414 };
 415
 416 /** Supported expansion of items. */
 417 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
 418         [MLX5_EXPANSION_ROOT] = {
 419                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 420                                                   MLX5_EXPANSION_IPV4,
 421                                                   MLX5_EXPANSION_IPV6),
 422                 .type = RTE_FLOW_ITEM_TYPE_END,
 423         },
 424         [MLX5_EXPANSION_ROOT_OUTER] = {
 425                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
 426                                                   MLX5_EXPANSION_OUTER_IPV4,
 427                                                   MLX5_EXPANSION_OUTER_IPV6),
 428                 .type = RTE_FLOW_ITEM_TYPE_END,
 429         },
 430         [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
 431                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
 432                 .type = RTE_FLOW_ITEM_TYPE_END,
 433         },
 434         [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
 435                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 436                                                 (MLX5_EXPANSION_OUTER_ETH_VLAN),
 437                 .type = RTE_FLOW_ITEM_TYPE_END,
 438         },
 439         [MLX5_EXPANSION_OUTER_ETH] = {
 440                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 441                                                   MLX5_EXPANSION_OUTER_IPV6,
 442                                                   MLX5_EXPANSION_MPLS),
 443                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 444                 .rss_types = 0,
 445         },
 446         [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
 447                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 448                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 449                 .rss_types = 0,
 450         },
 451         [MLX5_EXPANSION_OUTER_VLAN] = {
 452                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 453                                                   MLX5_EXPANSION_OUTER_IPV6),
 454                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 455         },
 456         [MLX5_EXPANSION_OUTER_IPV4] = {
 457                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 458                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 459                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 460                          MLX5_EXPANSION_GRE,
 461                          MLX5_EXPANSION_IPV4,
 462                          MLX5_EXPANSION_IPV6),
 463                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 464                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 465                         ETH_RSS_NONFRAG_IPV4_OTHER,
 466         },
 467         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 468                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 469                                                   MLX5_EXPANSION_VXLAN_GPE),
 470                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 471                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 472         },
 473         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 474                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 475                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 476         },
 477         [MLX5_EXPANSION_OUTER_IPV6] = {
 478                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 479                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 480                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 481                          MLX5_EXPANSION_IPV4,
 482                          MLX5_EXPANSION_IPV6),
 483                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 484                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 485                         ETH_RSS_NONFRAG_IPV6_OTHER,
 486         },
 487         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 488                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 489                                                   MLX5_EXPANSION_VXLAN_GPE),
 490                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 491                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 492         },
 493         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 494                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 495                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 496         },
 497         [MLX5_EXPANSION_VXLAN] = {
 498                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 499                                                   MLX5_EXPANSION_IPV4,
 500                                                   MLX5_EXPANSION_IPV6),
 501                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 502         },
 503         [MLX5_EXPANSION_VXLAN_GPE] = {
 504                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 505                                                   MLX5_EXPANSION_IPV4,
 506                                                   MLX5_EXPANSION_IPV6),
 507                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 508         },
 509         [MLX5_EXPANSION_GRE] = {
 510                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4),
 511                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 512         },
 513         [MLX5_EXPANSION_MPLS] = {
 514                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 515                                                   MLX5_EXPANSION_IPV6),
 516                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 517         },
 518         [MLX5_EXPANSION_ETH] = {
 519                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 520                                                   MLX5_EXPANSION_IPV6),
 521                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 522         },
 523         [MLX5_EXPANSION_ETH_VLAN] = {
 524                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 525                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 526         },
 527         [MLX5_EXPANSION_VLAN] = {
 528                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 529                                                   MLX5_EXPANSION_IPV6),
 530                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 531         },
 532         [MLX5_EXPANSION_IPV4] = {
 533                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 534                                                   MLX5_EXPANSION_IPV4_TCP),
 535                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 536                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 537                         ETH_RSS_NONFRAG_IPV4_OTHER,
 538         },
 539         [MLX5_EXPANSION_IPV4_UDP] = {
 540                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 541                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 542         },
 543         [MLX5_EXPANSION_IPV4_TCP] = {
 544                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 545                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 546         },
 547         [MLX5_EXPANSION_IPV6] = {
 548                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 549                                                   MLX5_EXPANSION_IPV6_TCP),
 550                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 551                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 552                         ETH_RSS_NONFRAG_IPV6_OTHER,
 553         },
 554         [MLX5_EXPANSION_IPV6_UDP] = {
 555                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 556                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 557         },
 558         [MLX5_EXPANSION_IPV6_TCP] = {
 559                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 560                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 561         },
 562 };
 563
 564 static struct rte_flow_shared_action *
 565 mlx5_shared_action_create(struct rte_eth_dev *dev,
 566                           const struct rte_flow_shared_action_conf *conf,
 567                           const struct rte_flow_action *action,
 568                           struct rte_flow_error *error);
 569 static int mlx5_shared_action_destroy
 570                                 (struct rte_eth_dev *dev,
 571                                  struct rte_flow_shared_action *shared_action,
 572                                  struct rte_flow_error *error);
 573 static int mlx5_shared_action_update
 574                                 (struct rte_eth_dev *dev,
 575                                  struct rte_flow_shared_action *shared_action,
 576                                  const struct rte_flow_action *action,
 577                                  struct rte_flow_error *error);
 578 static int mlx5_shared_action_query
 579                                 (struct rte_eth_dev *dev,
 580                                  const struct rte_flow_shared_action *action,
 581                                  void *data,
 582                                  struct rte_flow_error *error);
 583 static inline bool
 584 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev,
 585                           struct rte_flow_tunnel *tunnel,
 586                           const char *err_msg)
 587 {
 588         err_msg = NULL;
 589         if (!is_tunnel_offload_active(dev)) {
 590                 err_msg = "tunnel offload was not activated";
 591                 goto out;
 592         } else if (!tunnel) {
 593                 err_msg = "no application tunnel";
 594                 goto out;
 595         }
 596
 597         switch (tunnel->type) {
 598         default:
 599                 err_msg = "unsupported tunnel type";
 600                 goto out;
 601         case RTE_FLOW_ITEM_TYPE_VXLAN:
 602                 break;
 603         }
 604
 605 out:
 606         return !err_msg;
 607 }
 608
 609
 610 static int
 611 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
 612                     struct rte_flow_tunnel *app_tunnel,
 613                     struct rte_flow_action **actions,
 614                     uint32_t *num_of_actions,
 615                     struct rte_flow_error *error)
 616 {
 617         int ret;
 618         struct mlx5_flow_tunnel *tunnel;
 619         const char *err_msg = NULL;
 620         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
 621
 622         if (!verdict)
 623                 return rte_flow_error_set(error, EINVAL,
 624                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
 625                                           err_msg);
 626         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
 627         if (ret < 0) {
 628                 return rte_flow_error_set(error, ret,
 629                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
 630                                           "failed to initialize pmd tunnel");
 631         }
 632         *actions = &tunnel->action;
 633         *num_of_actions = 1;
 634         return 0;
 635 }
 636
 637 static int
 638 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
 639                        struct rte_flow_tunnel *app_tunnel,
 640                        struct rte_flow_item **items,
 641                        uint32_t *num_of_items,
 642                        struct rte_flow_error *error)
 643 {
 644         int ret;
 645         struct mlx5_flow_tunnel *tunnel;
 646         const char *err_msg = NULL;
 647         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
 648
 649         if (!verdict)
 650                 return rte_flow_error_set(error, EINVAL,
 651                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
 652                                           err_msg);
 653         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
 654         if (ret < 0) {
 655                 return rte_flow_error_set(error, ret,
 656                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
 657                                           "failed to initialize pmd tunnel");
 658         }
 659         *items = &tunnel->item;
 660         *num_of_items = 1;
 661         return 0;
 662 }
 663
 664 static int
 665 mlx5_flow_item_release(struct rte_eth_dev *dev,
 666                        struct rte_flow_item *pmd_items,
 667                        uint32_t num_items, struct rte_flow_error *err)
 668 {
 669         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
 670         struct mlx5_flow_tunnel *tun;
 671
 672         rte_spinlock_lock(&thub->sl);
 673         LIST_FOREACH(tun, &thub->tunnels, chain) {
 674                 if (&tun->item == pmd_items) {
 675                         LIST_REMOVE(tun, chain);
 676                         break;
 677                 }
 678         }
 679         rte_spinlock_unlock(&thub->sl);
 680         if (!tun || num_items != 1)
 681                 return rte_flow_error_set(err, EINVAL,
 682                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
 683                                           "invalid argument");
 684         if (!__atomic_sub_fetch(&tun->refctn, 1, __ATOMIC_RELAXED))
 685                 mlx5_flow_tunnel_free(dev, tun);
 686         return 0;
 687 }
 688
 689 static int
 690 mlx5_flow_action_release(struct rte_eth_dev *dev,
 691                          struct rte_flow_action *pmd_actions,
 692                          uint32_t num_actions, struct rte_flow_error *err)
 693 {
 694         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
 695         struct mlx5_flow_tunnel *tun;
 696
 697         rte_spinlock_lock(&thub->sl);
 698         LIST_FOREACH(tun, &thub->tunnels, chain) {
 699                 if (&tun->action == pmd_actions) {
 700                         LIST_REMOVE(tun, chain);
 701                         break;
 702                 }
 703         }
 704         rte_spinlock_unlock(&thub->sl);
 705         if (!tun || num_actions != 1)
 706                 return rte_flow_error_set(err, EINVAL,
 707                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
 708                                           "invalid argument");
 709         if (!__atomic_sub_fetch(&tun->refctn, 1, __ATOMIC_RELAXED))
 710                 mlx5_flow_tunnel_free(dev, tun);
 711
 712         return 0;
 713 }
 714
 715 static int
 716 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
 717                                   struct rte_mbuf *m,
 718                                   struct rte_flow_restore_info *info,
 719                                   struct rte_flow_error *err)
 720 {
 721         uint64_t ol_flags = m->ol_flags;
 722         const struct mlx5_flow_tbl_data_entry *tble;
 723         const uint64_t mask = PKT_RX_FDIR | PKT_RX_FDIR_ID;
 724
 725         if ((ol_flags & mask) != mask)
 726                 goto err;
 727         tble = tunnel_mark_decode(dev, m->hash.fdir.hi);
 728         if (!tble) {
 729                 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x",
 730                         dev->data->port_id, m->hash.fdir.hi);
 731                 goto err;
 732         }
 733         MLX5_ASSERT(tble->tunnel);
 734         memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel));
 735         info->group_id = tble->group_id;
 736         info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL |
 737                       RTE_FLOW_RESTORE_INFO_GROUP_ID |
 738                       RTE_FLOW_RESTORE_INFO_ENCAPSULATED;
 739
 740         return 0;
 741
 742 err:
 743         return rte_flow_error_set(err, EINVAL,
 744                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
 745                                   "failed to get restore info");
 746 }
 747
 748 static const struct rte_flow_ops mlx5_flow_ops = {
 749         .validate = mlx5_flow_validate,
 750         .create = mlx5_flow_create,
 751         .destroy = mlx5_flow_destroy,
 752         .flush = mlx5_flow_flush,
 753         .isolate = mlx5_flow_isolate,
 754         .query = mlx5_flow_query,
 755         .dev_dump = mlx5_flow_dev_dump,
 756         .get_aged_flows = mlx5_flow_get_aged_flows,
 757         .shared_action_create = mlx5_shared_action_create,
 758         .shared_action_destroy = mlx5_shared_action_destroy,
 759         .shared_action_update = mlx5_shared_action_update,
 760         .shared_action_query = mlx5_shared_action_query,
 761         .tunnel_decap_set = mlx5_flow_tunnel_decap_set,
 762         .tunnel_match = mlx5_flow_tunnel_match,
 763         .tunnel_action_decap_release = mlx5_flow_action_release,
 764         .tunnel_item_release = mlx5_flow_item_release,
 765         .get_restore_info = mlx5_flow_tunnel_get_restore_info,
 766 };
 767
 768 /* Tunnel information. */
 769 struct mlx5_flow_tunnel_info {
 770         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 771         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 772 };
 773
 774 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 775         {
 776                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 777                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 778         },
 779         {
 780                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
 781                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
 782         },
 783         {
 784                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 785                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 786         },
 787         {
 788                 .tunnel = MLX5_FLOW_LAYER_GRE,
 789                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 790         },
 791         {
 792                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 793                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 794         },
 795         {
 796                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 797                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 798         },
 799         {
 800                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 801                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 802         },
 803         {
 804                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 805                 .ptype = RTE_PTYPE_TUNNEL_IP,
 806         },
 807         {
 808                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 809                 .ptype = RTE_PTYPE_TUNNEL_IP,
 810         },
 811         {
 812                 .tunnel = MLX5_FLOW_LAYER_GTP,
 813                 .ptype = RTE_PTYPE_TUNNEL_GTPU,
 814         },
 815 };
 816
 817 /* Key of thread specific flow workspace data. */
 818 static pthread_key_t key_workspace;
 819
 820 /* Thread specific flow workspace data once initialization data. */
 821 static pthread_once_t key_workspace_init;
 822
 823
 824 /**
 825  * Translate tag ID to register.
 826  *
 827  * @param[in] dev
 828  *   Pointer to the Ethernet device structure.
 829  * @param[in] feature
 830  *   The feature that request the register.
 831  * @param[in] id
 832  *   The request register ID.
 833  * @param[out] error
 834  *   Error description in case of any.
 835  *
 836  * @return
 837  *   The request register on success, a negative errno
 838  *   value otherwise and rte_errno is set.
 839  */
 840 int
 841 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 842                      enum mlx5_feature_name feature,
 843                      uint32_t id,
 844                      struct rte_flow_error *error)
 845 {
 846         struct mlx5_priv *priv = dev->data->dev_private;
 847         struct mlx5_dev_config *config = &priv->config;
 848         enum modify_reg start_reg;
 849         bool skip_mtr_reg = false;
 850
 851         switch (feature) {
 852         case MLX5_HAIRPIN_RX:
 853                 return REG_B;
 854         case MLX5_HAIRPIN_TX:
 855                 return REG_A;
 856         case MLX5_METADATA_RX:
 857                 switch (config->dv_xmeta_en) {
 858                 case MLX5_XMETA_MODE_LEGACY:
 859                         return REG_B;
 860                 case MLX5_XMETA_MODE_META16:
 861                         return REG_C_0;
 862                 case MLX5_XMETA_MODE_META32:
 863                         return REG_C_1;
 864                 }
 865                 break;
 866         case MLX5_METADATA_TX:
 867                 return REG_A;
 868         case MLX5_METADATA_FDB:
 869                 switch (config->dv_xmeta_en) {
 870                 case MLX5_XMETA_MODE_LEGACY:
 871                         return REG_NON;
 872                 case MLX5_XMETA_MODE_META16:
 873                         return REG_C_0;
 874                 case MLX5_XMETA_MODE_META32:
 875                         return REG_C_1;
 876                 }
 877                 break;
 878         case MLX5_FLOW_MARK:
 879                 switch (config->dv_xmeta_en) {
 880                 case MLX5_XMETA_MODE_LEGACY:
 881                         return REG_NON;
 882                 case MLX5_XMETA_MODE_META16:
 883                         return REG_C_1;
 884                 case MLX5_XMETA_MODE_META32:
 885                         return REG_C_0;
 886                 }
 887                 break;
 888         case MLX5_MTR_SFX:
 889                 /*
 890                  * If meter color and flow match share one register, flow match
 891                  * should use the meter color register for match.
 892                  */
 893                 if (priv->mtr_reg_share)
 894                         return priv->mtr_color_reg;
 895                 else
 896                         return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 897                                REG_C_3;
 898         case MLX5_MTR_COLOR:
 899                 MLX5_ASSERT(priv->mtr_color_reg != REG_NON);
 900                 return priv->mtr_color_reg;
 901         case MLX5_COPY_MARK:
 902                 /*
 903                  * Metadata COPY_MARK register using is in meter suffix sub
 904                  * flow while with meter. It's safe to share the same register.
 905                  */
 906                 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
 907         case MLX5_APP_TAG:
 908                 /*
 909                  * If meter is enable, it will engage the register for color
 910                  * match and flow match. If meter color match is not using the
 911                  * REG_C_2, need to skip the REG_C_x be used by meter color
 912                  * match.
 913                  * If meter is disable, free to use all available registers.
 914                  */
 915                 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 916                             (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
 917                 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
 918                 if (id > (REG_C_7 - start_reg))
 919                         return rte_flow_error_set(error, EINVAL,
 920                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 921                                                   NULL, "invalid tag id");
 922                 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON)
 923                         return rte_flow_error_set(error, ENOTSUP,
 924                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 925                                                   NULL, "unsupported tag id");
 926                 /*
 927                  * This case means meter is using the REG_C_x great than 2.
 928                  * Take care not to conflict with meter color REG_C_x.
 929                  * If the available index REG_C_y >= REG_C_x, skip the
 930                  * color register.
 931                  */
 932                 if (skip_mtr_reg && config->flow_mreg_c
 933                     [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
 934                         if (id >= (REG_C_7 - start_reg))
 935                                 return rte_flow_error_set(error, EINVAL,
 936                                                        RTE_FLOW_ERROR_TYPE_ITEM,
 937                                                         NULL, "invalid tag id");
 938                         if (config->flow_mreg_c
 939                             [id + 1 + start_reg - REG_C_0] != REG_NON)
 940                                 return config->flow_mreg_c
 941                                                [id + 1 + start_reg - REG_C_0];
 942                         return rte_flow_error_set(error, ENOTSUP,
 943                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 944                                                   NULL, "unsupported tag id");
 945                 }
 946                 return config->flow_mreg_c[id + start_reg - REG_C_0];
 947         }
 948         MLX5_ASSERT(false);
 949         return rte_flow_error_set(error, EINVAL,
 950                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 951                                   NULL, "invalid feature name");
 952 }
 953
 954 /**
 955  * Check extensive flow metadata register support.
 956  *
 957  * @param dev
 958  *   Pointer to rte_eth_dev structure.
 959  *
 960  * @return
 961  *   True if device supports extensive flow metadata register, otherwise false.
 962  */
 963 bool
 964 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
 965 {
 966         struct mlx5_priv *priv = dev->data->dev_private;
 967         struct mlx5_dev_config *config = &priv->config;
 968
 969         /*
 970          * Having available reg_c can be regarded inclusively as supporting
 971          * extensive flow metadata register, which could mean,
 972          * - metadata register copy action by modify header.
 973          * - 16 modify header actions is supported.
 974          * - reg_c's are preserved across different domain (FDB and NIC) on
 975          *   packet loopback by flow lookup miss.
 976          */
 977         return config->flow_mreg_c[2] != REG_NON;
 978 }
 979
 980 /**
 981  * Verify the @p item specifications (spec, last, mask) are compatible with the
 982  * NIC capabilities.
 983  *
 984  * @param[in] item
 985  *   Item specification.
 986  * @param[in] mask
 987  *   @p item->mask or flow default bit-masks.
 988  * @param[in] nic_mask
 989  *   Bit-masks covering supported fields by the NIC to compare with user mask.
 990  * @param[in] size
 991  *   Bit-masks size in bytes.
 992  * @param[in] range_accepted
 993  *   True if range of values is accepted for specific fields, false otherwise.
 994  * @param[out] error
 995  *   Pointer to error structure.
 996  *
 997  * @return
 998  *   0 on success, a negative errno value otherwise and rte_errno is set.
 999  */
1000 int
1001 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
1002                           const uint8_t *mask,
1003                           const uint8_t *nic_mask,
1004                           unsigned int size,
1005                           bool range_accepted,
1006                           struct rte_flow_error *error)
1007 {
1008         unsigned int i;
1009
1010         MLX5_ASSERT(nic_mask);
1011         for (i = 0; i < size; ++i)
1012                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
1013                         return rte_flow_error_set(error, ENOTSUP,
1014                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1015                                                   item,
1016                                                   "mask enables non supported"
1017                                                   " bits");
1018         if (!item->spec && (item->mask || item->last))
1019                 return rte_flow_error_set(error, EINVAL,
1020                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1021                                           "mask/last without a spec is not"
1022                                           " supported");
1023         if (item->spec && item->last && !range_accepted) {
1024                 uint8_t spec[size];
1025                 uint8_t last[size];
1026                 unsigned int i;
1027                 int ret;
1028
1029                 for (i = 0; i < size; ++i) {
1030                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
1031                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
1032                 }
1033                 ret = memcmp(spec, last, size);
1034                 if (ret != 0)
1035                         return rte_flow_error_set(error, EINVAL,
1036                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1037                                                   item,
1038                                                   "range is not valid");
1039         }
1040         return 0;
1041 }
1042
1043 /**
1044  * Adjust the hash fields according to the @p flow information.
1045  *
1046  * @param[in] dev_flow.
1047  *   Pointer to the mlx5_flow.
1048  * @param[in] tunnel
1049  *   1 when the hash field is for a tunnel item.
1050  * @param[in] layer_types
1051  *   ETH_RSS_* types.
1052  * @param[in] hash_fields
1053  *   Item hash fields.
1054  *
1055  * @return
1056  *   The hash fields that should be used.
1057  */
1058 uint64_t
1059 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc,
1060                             int tunnel __rte_unused, uint64_t layer_types,
1061                             uint64_t hash_fields)
1062 {
1063 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1064         int rss_request_inner = rss_desc->level >= 2;
1065
1066         /* Check RSS hash level for tunnel. */
1067         if (tunnel && rss_request_inner)
1068                 hash_fields |= IBV_RX_HASH_INNER;
1069         else if (tunnel || rss_request_inner)
1070                 return 0;
1071 #endif
1072         /* Check if requested layer matches RSS hash fields. */
1073         if (!(rss_desc->types & layer_types))
1074                 return 0;
1075         return hash_fields;
1076 }
1077
1078 /**
1079  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
1080  * if several tunnel rules are used on this queue, the tunnel ptype will be
1081  * cleared.
1082  *
1083  * @param rxq_ctrl
1084  *   Rx queue to update.
1085  */
1086 static void
1087 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
1088 {
1089         unsigned int i;
1090         uint32_t tunnel_ptype = 0;
1091
1092         /* Look up for the ptype to use. */
1093         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
1094                 if (!rxq_ctrl->flow_tunnels_n[i])
1095                         continue;
1096                 if (!tunnel_ptype) {
1097                         tunnel_ptype = tunnels_info[i].ptype;
1098                 } else {
1099                         tunnel_ptype = 0;
1100                         break;
1101                 }
1102         }
1103         rxq_ctrl->rxq.tunnel = tunnel_ptype;
1104 }
1105
1106 /**
1107  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
1108  * flow.
1109  *
1110  * @param[in] dev
1111  *   Pointer to the Ethernet device structure.
1112  * @param[in] dev_handle
1113  *   Pointer to device flow handle structure.
1114  */
1115 static void
1116 flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
1117                        struct mlx5_flow_handle *dev_handle)
1118 {
1119         struct mlx5_priv *priv = dev->data->dev_private;
1120         const int mark = dev_handle->mark;
1121         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1122         struct mlx5_hrxq *hrxq;
1123         unsigned int i;
1124
1125         if (dev_handle->fate_action != MLX5_FLOW_FATE_QUEUE)
1126                 return;
1127         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1128                               dev_handle->rix_hrxq);
1129         if (!hrxq)
1130                 return;
1131         for (i = 0; i != hrxq->ind_table->queues_n; ++i) {
1132                 int idx = hrxq->ind_table->queues[i];
1133                 struct mlx5_rxq_ctrl *rxq_ctrl =
1134                         container_of((*priv->rxqs)[idx],
1135                                      struct mlx5_rxq_ctrl, rxq);
1136
1137                 /*
1138                  * To support metadata register copy on Tx loopback,
1139                  * this must be always enabled (metadata may arive
1140                  * from other port - not from local flows only.
1141                  */
1142                 if (priv->config.dv_flow_en &&
1143                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1144                     mlx5_flow_ext_mreg_supported(dev)) {
1145                         rxq_ctrl->rxq.mark = 1;
1146                         rxq_ctrl->flow_mark_n = 1;
1147                 } else if (mark) {
1148                         rxq_ctrl->rxq.mark = 1;
1149                         rxq_ctrl->flow_mark_n++;
1150                 }
1151                 if (tunnel) {
1152                         unsigned int j;
1153
1154                         /* Increase the counter matching the flow. */
1155                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1156                                 if ((tunnels_info[j].tunnel &
1157                                      dev_handle->layers) ==
1158                                     tunnels_info[j].tunnel) {
1159                                         rxq_ctrl->flow_tunnels_n[j]++;
1160                                         break;
1161                                 }
1162                         }
1163                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1164                 }
1165         }
1166 }
1167
1168 /**
1169  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
1170  *
1171  * @param[in] dev
1172  *   Pointer to the Ethernet device structure.
1173  * @param[in] flow
1174  *   Pointer to flow structure.
1175  */
1176 static void
1177 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
1178 {
1179         struct mlx5_priv *priv = dev->data->dev_private;
1180         uint32_t handle_idx;
1181         struct mlx5_flow_handle *dev_handle;
1182
1183         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1184                        handle_idx, dev_handle, next)
1185                 flow_drv_rxq_flags_set(dev, dev_handle);
1186 }
1187
1188 /**
1189  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1190  * device flow if no other flow uses it with the same kind of request.
1191  *
1192  * @param dev
1193  *   Pointer to Ethernet device.
1194  * @param[in] dev_handle
1195  *   Pointer to the device flow handle structure.
1196  */
1197 static void
1198 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev,
1199                         struct mlx5_flow_handle *dev_handle)
1200 {
1201         struct mlx5_priv *priv = dev->data->dev_private;
1202         const int mark = dev_handle->mark;
1203         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1204         struct mlx5_hrxq *hrxq;
1205         unsigned int i;
1206
1207         if (dev_handle->fate_action != MLX5_FLOW_FATE_QUEUE)
1208                 return;
1209         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1210                               dev_handle->rix_hrxq);
1211         if (!hrxq)
1212                 return;
1213         MLX5_ASSERT(dev->data->dev_started);
1214         for (i = 0; i != hrxq->ind_table->queues_n; ++i) {
1215                 int idx = hrxq->ind_table->queues[i];
1216                 struct mlx5_rxq_ctrl *rxq_ctrl =
1217                         container_of((*priv->rxqs)[idx],
1218                                      struct mlx5_rxq_ctrl, rxq);
1219
1220                 if (priv->config.dv_flow_en &&
1221                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1222                     mlx5_flow_ext_mreg_supported(dev)) {
1223                         rxq_ctrl->rxq.mark = 1;
1224                         rxq_ctrl->flow_mark_n = 1;
1225                 } else if (mark) {
1226                         rxq_ctrl->flow_mark_n--;
1227                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
1228                 }
1229                 if (tunnel) {
1230                         unsigned int j;
1231
1232                         /* Decrease the counter matching the flow. */
1233                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1234                                 if ((tunnels_info[j].tunnel &
1235                                      dev_handle->layers) ==
1236                                     tunnels_info[j].tunnel) {
1237                                         rxq_ctrl->flow_tunnels_n[j]--;
1238                                         break;
1239                                 }
1240                         }
1241                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1242                 }
1243         }
1244 }
1245
1246 /**
1247  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1248  * @p flow if no other flow uses it with the same kind of request.
1249  *
1250  * @param dev
1251  *   Pointer to Ethernet device.
1252  * @param[in] flow
1253  *   Pointer to the flow.
1254  */
1255 static void
1256 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
1257 {
1258         struct mlx5_priv *priv = dev->data->dev_private;
1259         uint32_t handle_idx;
1260         struct mlx5_flow_handle *dev_handle;
1261
1262         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1263                        handle_idx, dev_handle, next)
1264                 flow_drv_rxq_flags_trim(dev, dev_handle);
1265 }
1266
1267 /**
1268  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
1269  *
1270  * @param dev
1271  *   Pointer to Ethernet device.
1272  */
1273 static void
1274 flow_rxq_flags_clear(struct rte_eth_dev *dev)
1275 {
1276         struct mlx5_priv *priv = dev->data->dev_private;
1277         unsigned int i;
1278
1279         for (i = 0; i != priv->rxqs_n; ++i) {
1280                 struct mlx5_rxq_ctrl *rxq_ctrl;
1281                 unsigned int j;
1282
1283                 if (!(*priv->rxqs)[i])
1284                         continue;
1285                 rxq_ctrl = container_of((*priv->rxqs)[i],
1286                                         struct mlx5_rxq_ctrl, rxq);
1287                 rxq_ctrl->flow_mark_n = 0;
1288                 rxq_ctrl->rxq.mark = 0;
1289                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
1290                         rxq_ctrl->flow_tunnels_n[j] = 0;
1291                 rxq_ctrl->rxq.tunnel = 0;
1292         }
1293 }
1294
1295 /**
1296  * Set the Rx queue dynamic metadata (mask and offset) for a flow
1297  *
1298  * @param[in] dev
1299  *   Pointer to the Ethernet device structure.
1300  */
1301 void
1302 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev)
1303 {
1304         struct mlx5_priv *priv = dev->data->dev_private;
1305         struct mlx5_rxq_data *data;
1306         unsigned int i;
1307
1308         for (i = 0; i != priv->rxqs_n; ++i) {
1309                 if (!(*priv->rxqs)[i])
1310                         continue;
1311                 data = (*priv->rxqs)[i];
1312                 if (!rte_flow_dynf_metadata_avail()) {
1313                         data->dynf_meta = 0;
1314                         data->flow_meta_mask = 0;
1315                         data->flow_meta_offset = -1;
1316                 } else {
1317                         data->dynf_meta = 1;
1318                         data->flow_meta_mask = rte_flow_dynf_metadata_mask;
1319                         data->flow_meta_offset = rte_flow_dynf_metadata_offs;
1320                 }
1321         }
1322 }
1323
1324 /*
1325  * return a pointer to the desired action in the list of actions.
1326  *
1327  * @param[in] actions
1328  *   The list of actions to search the action in.
1329  * @param[in] action
1330  *   The action to find.
1331  *
1332  * @return
1333  *   Pointer to the action in the list, if found. NULL otherwise.
1334  */
1335 const struct rte_flow_action *
1336 mlx5_flow_find_action(const struct rte_flow_action *actions,
1337                       enum rte_flow_action_type action)
1338 {
1339         if (actions == NULL)
1340                 return NULL;
1341         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
1342                 if (actions->type == action)
1343                         return actions;
1344         return NULL;
1345 }
1346
1347 /*
1348  * Validate the flag action.
1349  *
1350  * @param[in] action_flags
1351  *   Bit-fields that holds the actions detected until now.
1352  * @param[in] attr
1353  *   Attributes of flow that includes this action.
1354  * @param[out] error
1355  *   Pointer to error structure.
1356  *
1357  * @return
1358  *   0 on success, a negative errno value otherwise and rte_errno is set.
1359  */
1360 int
1361 mlx5_flow_validate_action_flag(uint64_t action_flags,
1362                                const struct rte_flow_attr *attr,
1363                                struct rte_flow_error *error)
1364 {
1365         if (action_flags & MLX5_FLOW_ACTION_MARK)
1366                 return rte_flow_error_set(error, EINVAL,
1367                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1368                                           "can't mark and flag in same flow");
1369         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1370                 return rte_flow_error_set(error, EINVAL,
1371                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1372                                           "can't have 2 flag"
1373                                           " actions in same flow");
1374         if (attr->egress)
1375                 return rte_flow_error_set(error, ENOTSUP,
1376                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1377                                           "flag action not supported for "
1378                                           "egress");
1379         return 0;
1380 }
1381
1382 /*
1383  * Validate the mark action.
1384  *
1385  * @param[in] action
1386  *   Pointer to the queue action.
1387  * @param[in] action_flags
1388  *   Bit-fields that holds the actions detected until now.
1389  * @param[in] attr
1390  *   Attributes of flow that includes this action.
1391  * @param[out] error
1392  *   Pointer to error structure.
1393  *
1394  * @return
1395  *   0 on success, a negative errno value otherwise and rte_errno is set.
1396  */
1397 int
1398 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
1399                                uint64_t action_flags,
1400                                const struct rte_flow_attr *attr,
1401                                struct rte_flow_error *error)
1402 {
1403         const struct rte_flow_action_mark *mark = action->conf;
1404
1405         if (!mark)
1406                 return rte_flow_error_set(error, EINVAL,
1407                                           RTE_FLOW_ERROR_TYPE_ACTION,
1408                                           action,
1409                                           "configuration cannot be null");
1410         if (mark->id >= MLX5_FLOW_MARK_MAX)
1411                 return rte_flow_error_set(error, EINVAL,
1412                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1413                                           &mark->id,
1414                                           "mark id must in 0 <= id < "
1415                                           RTE_STR(MLX5_FLOW_MARK_MAX));
1416         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1417                 return rte_flow_error_set(error, EINVAL,
1418                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1419                                           "can't flag and mark in same flow");
1420         if (action_flags & MLX5_FLOW_ACTION_MARK)
1421                 return rte_flow_error_set(error, EINVAL,
1422                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1423                                           "can't have 2 mark actions in same"
1424                                           " flow");
1425         if (attr->egress)
1426                 return rte_flow_error_set(error, ENOTSUP,
1427                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1428                                           "mark action not supported for "
1429                                           "egress");
1430         return 0;
1431 }
1432
1433 /*
1434  * Validate the drop action.
1435  *
1436  * @param[in] action_flags
1437  *   Bit-fields that holds the actions detected until now.
1438  * @param[in] attr
1439  *   Attributes of flow that includes this action.
1440  * @param[out] error
1441  *   Pointer to error structure.
1442  *
1443  * @return
1444  *   0 on success, a negative errno value otherwise and rte_errno is set.
1445  */
1446 int
1447 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1448                                const struct rte_flow_attr *attr,
1449                                struct rte_flow_error *error)
1450 {
1451         if (attr->egress)
1452                 return rte_flow_error_set(error, ENOTSUP,
1453                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1454                                           "drop action not supported for "
1455                                           "egress");
1456         return 0;
1457 }
1458
1459 /*
1460  * Validate the queue action.
1461  *
1462  * @param[in] action
1463  *   Pointer to the queue action.
1464  * @param[in] action_flags
1465  *   Bit-fields that holds the actions detected until now.
1466  * @param[in] dev
1467  *   Pointer to the Ethernet device structure.
1468  * @param[in] attr
1469  *   Attributes of flow that includes this action.
1470  * @param[out] error
1471  *   Pointer to error structure.
1472  *
1473  * @return
1474  *   0 on success, a negative errno value otherwise and rte_errno is set.
1475  */
1476 int
1477 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1478                                 uint64_t action_flags,
1479                                 struct rte_eth_dev *dev,
1480                                 const struct rte_flow_attr *attr,
1481                                 struct rte_flow_error *error)
1482 {
1483         struct mlx5_priv *priv = dev->data->dev_private;
1484         const struct rte_flow_action_queue *queue = action->conf;
1485
1486         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1487                 return rte_flow_error_set(error, EINVAL,
1488                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1489                                           "can't have 2 fate actions in"
1490                                           " same flow");
1491         if (!priv->rxqs_n)
1492                 return rte_flow_error_set(error, EINVAL,
1493                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1494                                           NULL, "No Rx queues configured");
1495         if (queue->index >= priv->rxqs_n)
1496                 return rte_flow_error_set(error, EINVAL,
1497                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1498                                           &queue->index,
1499                                           "queue index out of range");
1500         if (!(*priv->rxqs)[queue->index])
1501                 return rte_flow_error_set(error, EINVAL,
1502                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1503                                           &queue->index,
1504                                           "queue is not configured");
1505         if (attr->egress)
1506                 return rte_flow_error_set(error, ENOTSUP,
1507                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1508                                           "queue action not supported for "
1509                                           "egress");
1510         return 0;
1511 }
1512
1513 /*
1514  * Validate the rss action.
1515  *
1516  * @param[in] dev
1517  *   Pointer to the Ethernet device structure.
1518  * @param[in] action
1519  *   Pointer to the queue action.
1520  * @param[out] error
1521  *   Pointer to error structure.
1522  *
1523  * @return
1524  *   0 on success, a negative errno value otherwise and rte_errno is set.
1525  */
1526 int
1527 mlx5_validate_action_rss(struct rte_eth_dev *dev,
1528                          const struct rte_flow_action *action,
1529                          struct rte_flow_error *error)
1530 {
1531         struct mlx5_priv *priv = dev->data->dev_private;
1532         const struct rte_flow_action_rss *rss = action->conf;
1533         unsigned int i;
1534
1535         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1536             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1537                 return rte_flow_error_set(error, ENOTSUP,
1538                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1539                                           &rss->func,
1540                                           "RSS hash function not supported");
1541 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1542         if (rss->level > 2)
1543 #else
1544         if (rss->level > 1)
1545 #endif
1546                 return rte_flow_error_set(error, ENOTSUP,
1547                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1548                                           &rss->level,
1549                                           "tunnel RSS is not supported");
1550         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1551         if (rss->key_len == 0 && rss->key != NULL)
1552                 return rte_flow_error_set(error, ENOTSUP,
1553                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1554                                           &rss->key_len,
1555                                           "RSS hash key length 0");
1556         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1557                 return rte_flow_error_set(error, ENOTSUP,
1558                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1559                                           &rss->key_len,
1560                                           "RSS hash key too small");
1561         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1562                 return rte_flow_error_set(error, ENOTSUP,
1563                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1564                                           &rss->key_len,
1565                                           "RSS hash key too large");
1566         if (rss->queue_num > priv->config.ind_table_max_size)
1567                 return rte_flow_error_set(error, ENOTSUP,
1568                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1569                                           &rss->queue_num,
1570                                           "number of queues too large");
1571         if (rss->types & MLX5_RSS_HF_MASK)
1572                 return rte_flow_error_set(error, ENOTSUP,
1573                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1574                                           &rss->types,
1575                                           "some RSS protocols are not"
1576                                           " supported");
1577         if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) &&
1578             !(rss->types & ETH_RSS_IP))
1579                 return rte_flow_error_set(error, EINVAL,
1580                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1581                                           "L3 partial RSS requested but L3 RSS"
1582                                           " type not specified");
1583         if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) &&
1584             !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP)))
1585                 return rte_flow_error_set(error, EINVAL,
1586                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1587                                           "L4 partial RSS requested but L4 RSS"
1588                                           " type not specified");
1589         if (!priv->rxqs_n)
1590                 return rte_flow_error_set(error, EINVAL,
1591                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1592                                           NULL, "No Rx queues configured");
1593         if (!rss->queue_num)
1594                 return rte_flow_error_set(error, EINVAL,
1595                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1596                                           NULL, "No queues configured");
1597         for (i = 0; i != rss->queue_num; ++i) {
1598                 if (rss->queue[i] >= priv->rxqs_n)
1599                         return rte_flow_error_set
1600                                 (error, EINVAL,
1601                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1602                                  &rss->queue[i], "queue index out of range");
1603                 if (!(*priv->rxqs)[rss->queue[i]])
1604                         return rte_flow_error_set
1605                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1606                                  &rss->queue[i], "queue is not configured");
1607         }
1608         return 0;
1609 }
1610
1611 /*
1612  * Validate the rss action.
1613  *
1614  * @param[in] action
1615  *   Pointer to the queue action.
1616  * @param[in] action_flags
1617  *   Bit-fields that holds the actions detected until now.
1618  * @param[in] dev
1619  *   Pointer to the Ethernet device structure.
1620  * @param[in] attr
1621  *   Attributes of flow that includes this action.
1622  * @param[in] item_flags
1623  *   Items that were detected.
1624  * @param[out] error
1625  *   Pointer to error structure.
1626  *
1627  * @return
1628  *   0 on success, a negative errno value otherwise and rte_errno is set.
1629  */
1630 int
1631 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1632                               uint64_t action_flags,
1633                               struct rte_eth_dev *dev,
1634                               const struct rte_flow_attr *attr,
1635                               uint64_t item_flags,
1636                               struct rte_flow_error *error)
1637 {
1638         const struct rte_flow_action_rss *rss = action->conf;
1639         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1640         int ret;
1641
1642         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1643                 return rte_flow_error_set(error, EINVAL,
1644                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1645                                           "can't have 2 fate actions"
1646                                           " in same flow");
1647         ret = mlx5_validate_action_rss(dev, action, error);
1648         if (ret)
1649                 return ret;
1650         if (attr->egress)
1651                 return rte_flow_error_set(error, ENOTSUP,
1652                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1653                                           "rss action not supported for "
1654                                           "egress");
1655         if (rss->level > 1 && !tunnel)
1656                 return rte_flow_error_set(error, EINVAL,
1657                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1658                                           "inner RSS is not supported for "
1659                                           "non-tunnel flows");
1660         if ((item_flags & MLX5_FLOW_LAYER_ECPRI) &&
1661             !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) {
1662                 return rte_flow_error_set(error, EINVAL,
1663                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1664                                           "RSS on eCPRI is not supported now");
1665         }
1666         return 0;
1667 }
1668
1669 /*
1670  * Validate the default miss action.
1671  *
1672  * @param[in] action_flags
1673  *   Bit-fields that holds the actions detected until now.
1674  * @param[out] error
1675  *   Pointer to error structure.
1676  *
1677  * @return
1678  *   0 on success, a negative errno value otherwise and rte_errno is set.
1679  */
1680 int
1681 mlx5_flow_validate_action_default_miss(uint64_t action_flags,
1682                                 const struct rte_flow_attr *attr,
1683                                 struct rte_flow_error *error)
1684 {
1685         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1686                 return rte_flow_error_set(error, EINVAL,
1687                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1688                                           "can't have 2 fate actions in"
1689                                           " same flow");
1690         if (attr->egress)
1691                 return rte_flow_error_set(error, ENOTSUP,
1692                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1693                                           "default miss action not supported "
1694                                           "for egress");
1695         if (attr->group)
1696                 return rte_flow_error_set(error, ENOTSUP,
1697                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
1698                                           "only group 0 is supported");
1699         if (attr->transfer)
1700                 return rte_flow_error_set(error, ENOTSUP,
1701                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1702                                           NULL, "transfer is not supported");
1703         return 0;
1704 }
1705
1706 /*
1707  * Validate the count action.
1708  *
1709  * @param[in] dev
1710  *   Pointer to the Ethernet device structure.
1711  * @param[in] attr
1712  *   Attributes of flow that includes this action.
1713  * @param[out] error
1714  *   Pointer to error structure.
1715  *
1716  * @return
1717  *   0 on success, a negative errno value otherwise and rte_errno is set.
1718  */
1719 int
1720 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1721                                 const struct rte_flow_attr *attr,
1722                                 struct rte_flow_error *error)
1723 {
1724         if (attr->egress)
1725                 return rte_flow_error_set(error, ENOTSUP,
1726                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1727                                           "count action not supported for "
1728                                           "egress");
1729         return 0;
1730 }
1731
1732 /**
1733  * Verify the @p attributes will be correctly understood by the NIC and store
1734  * them in the @p flow if everything is correct.
1735  *
1736  * @param[in] dev
1737  *   Pointer to the Ethernet device structure.
1738  * @param[in] attributes
1739  *   Pointer to flow attributes
1740  * @param[out] error
1741  *   Pointer to error structure.
1742  *
1743  * @return
1744  *   0 on success, a negative errno value otherwise and rte_errno is set.
1745  */
1746 int
1747 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1748                               const struct rte_flow_attr *attributes,
1749                               struct rte_flow_error *error)
1750 {
1751         struct mlx5_priv *priv = dev->data->dev_private;
1752         uint32_t priority_max = priv->config.flow_prio - 1;
1753
1754         if (attributes->group)
1755                 return rte_flow_error_set(error, ENOTSUP,
1756                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1757                                           NULL, "groups is not supported");
1758         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
1759             attributes->priority >= priority_max)
1760                 return rte_flow_error_set(error, ENOTSUP,
1761                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1762                                           NULL, "priority out of range");
1763         if (attributes->egress)
1764                 return rte_flow_error_set(error, ENOTSUP,
1765                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1766                                           "egress is not supported");
1767         if (attributes->transfer && !priv->config.dv_esw_en)
1768                 return rte_flow_error_set(error, ENOTSUP,
1769                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1770                                           NULL, "transfer is not supported");
1771         if (!attributes->ingress)
1772                 return rte_flow_error_set(error, EINVAL,
1773                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1774                                           NULL,
1775                                           "ingress attribute is mandatory");
1776         return 0;
1777 }
1778
1779 /**
1780  * Validate ICMP6 item.
1781  *
1782  * @param[in] item
1783  *   Item specification.
1784  * @param[in] item_flags
1785  *   Bit-fields that holds the items detected until now.
1786  * @param[in] ext_vlan_sup
1787  *   Whether extended VLAN features are supported or not.
1788  * @param[out] error
1789  *   Pointer to error structure.
1790  *
1791  * @return
1792  *   0 on success, a negative errno value otherwise and rte_errno is set.
1793  */
1794 int
1795 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1796                                uint64_t item_flags,
1797                                uint8_t target_protocol,
1798                                struct rte_flow_error *error)
1799 {
1800         const struct rte_flow_item_icmp6 *mask = item->mask;
1801         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1802         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1803                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1804         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1805                                       MLX5_FLOW_LAYER_OUTER_L4;
1806         int ret;
1807
1808         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1809                 return rte_flow_error_set(error, EINVAL,
1810                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1811                                           "protocol filtering not compatible"
1812                                           " with ICMP6 layer");
1813         if (!(item_flags & l3m))
1814                 return rte_flow_error_set(error, EINVAL,
1815                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1816                                           "IPv6 is mandatory to filter on"
1817                                           " ICMP6");
1818         if (item_flags & l4m)
1819                 return rte_flow_error_set(error, EINVAL,
1820                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1821                                           "multiple L4 layers not supported");
1822         if (!mask)
1823                 mask = &rte_flow_item_icmp6_mask;
1824         ret = mlx5_flow_item_acceptable
1825                 (item, (const uint8_t *)mask,
1826                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1827                  sizeof(struct rte_flow_item_icmp6),
1828                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1829         if (ret < 0)
1830                 return ret;
1831         return 0;
1832 }
1833
1834 /**
1835  * Validate ICMP item.
1836  *
1837  * @param[in] item
1838  *   Item specification.
1839  * @param[in] item_flags
1840  *   Bit-fields that holds the items detected until now.
1841  * @param[out] error
1842  *   Pointer to error structure.
1843  *
1844  * @return
1845  *   0 on success, a negative errno value otherwise and rte_errno is set.
1846  */
1847 int
1848 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1849                              uint64_t item_flags,
1850                              uint8_t target_protocol,
1851                              struct rte_flow_error *error)
1852 {
1853         const struct rte_flow_item_icmp *mask = item->mask;
1854         const struct rte_flow_item_icmp nic_mask = {
1855                 .hdr.icmp_type = 0xff,
1856                 .hdr.icmp_code = 0xff,
1857                 .hdr.icmp_ident = RTE_BE16(0xffff),
1858                 .hdr.icmp_seq_nb = RTE_BE16(0xffff),
1859         };
1860         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1861         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1862                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1863         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1864                                       MLX5_FLOW_LAYER_OUTER_L4;
1865         int ret;
1866
1867         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1868                 return rte_flow_error_set(error, EINVAL,
1869                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1870                                           "protocol filtering not compatible"
1871                                           " with ICMP layer");
1872         if (!(item_flags & l3m))
1873                 return rte_flow_error_set(error, EINVAL,
1874                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1875                                           "IPv4 is mandatory to filter"
1876                                           " on ICMP");
1877         if (item_flags & l4m)
1878                 return rte_flow_error_set(error, EINVAL,
1879                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1880                                           "multiple L4 layers not supported");
1881         if (!mask)
1882                 mask = &nic_mask;
1883         ret = mlx5_flow_item_acceptable
1884                 (item, (const uint8_t *)mask,
1885                  (const uint8_t *)&nic_mask,
1886                  sizeof(struct rte_flow_item_icmp),
1887                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1888         if (ret < 0)
1889                 return ret;
1890         return 0;
1891 }
1892
1893 /**
1894  * Validate Ethernet item.
1895  *
1896  * @param[in] item
1897  *   Item specification.
1898  * @param[in] item_flags
1899  *   Bit-fields that holds the items detected until now.
1900  * @param[out] error
1901  *   Pointer to error structure.
1902  *
1903  * @return
1904  *   0 on success, a negative errno value otherwise and rte_errno is set.
1905  */
1906 int
1907 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1908                             uint64_t item_flags, bool ext_vlan_sup,
1909                             struct rte_flow_error *error)
1910 {
1911         const struct rte_flow_item_eth *mask = item->mask;
1912         const struct rte_flow_item_eth nic_mask = {
1913                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1914                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1915                 .type = RTE_BE16(0xffff),
1916                 .has_vlan = ext_vlan_sup ? 1 : 0,
1917         };
1918         int ret;
1919         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1920         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1921                                        MLX5_FLOW_LAYER_OUTER_L2;
1922
1923         if (item_flags & ethm)
1924                 return rte_flow_error_set(error, ENOTSUP,
1925                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1926                                           "multiple L2 layers not supported");
1927         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
1928             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
1929                 return rte_flow_error_set(error, EINVAL,
1930                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1931                                           "L2 layer should not follow "
1932                                           "L3 layers");
1933         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
1934             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
1935                 return rte_flow_error_set(error, EINVAL,
1936                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1937                                           "L2 layer should not follow VLAN");
1938         if (!mask)
1939                 mask = &rte_flow_item_eth_mask;
1940         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1941                                         (const uint8_t *)&nic_mask,
1942                                         sizeof(struct rte_flow_item_eth),
1943                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1944         return ret;
1945 }
1946
1947 /**
1948  * Validate VLAN item.
1949  *
1950  * @param[in] item
1951  *   Item specification.
1952  * @param[in] item_flags
1953  *   Bit-fields that holds the items detected until now.
1954  * @param[in] dev
1955  *   Ethernet device flow is being created on.
1956  * @param[out] error
1957  *   Pointer to error structure.
1958  *
1959  * @return
1960  *   0 on success, a negative errno value otherwise and rte_errno is set.
1961  */
1962 int
1963 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1964                              uint64_t item_flags,
1965                              struct rte_eth_dev *dev,
1966                              struct rte_flow_error *error)
1967 {
1968         const struct rte_flow_item_vlan *spec = item->spec;
1969         const struct rte_flow_item_vlan *mask = item->mask;
1970         const struct rte_flow_item_vlan nic_mask = {
1971                 .tci = RTE_BE16(UINT16_MAX),
1972                 .inner_type = RTE_BE16(UINT16_MAX),
1973         };
1974         uint16_t vlan_tag = 0;
1975         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1976         int ret;
1977         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1978                                         MLX5_FLOW_LAYER_INNER_L4) :
1979                                        (MLX5_FLOW_LAYER_OUTER_L3 |
1980                                         MLX5_FLOW_LAYER_OUTER_L4);
1981         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1982                                         MLX5_FLOW_LAYER_OUTER_VLAN;
1983
1984         if (item_flags & vlanm)
1985                 return rte_flow_error_set(error, EINVAL,
1986                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1987                                           "multiple VLAN layers not supported");
1988         else if ((item_flags & l34m) != 0)
1989                 return rte_flow_error_set(error, EINVAL,
1990                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1991                                           "VLAN cannot follow L3/L4 layer");
1992         if (!mask)
1993                 mask = &rte_flow_item_vlan_mask;
1994         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1995                                         (const uint8_t *)&nic_mask,
1996                                         sizeof(struct rte_flow_item_vlan),
1997                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1998         if (ret)
1999                 return ret;
2000         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2001                 struct mlx5_priv *priv = dev->data->dev_private;
2002
2003                 if (priv->vmwa_context) {
2004                         /*
2005                          * Non-NULL context means we have a virtual machine
2006                          * and SR-IOV enabled, we have to create VLAN interface
2007                          * to make hypervisor to setup E-Switch vport
2008                          * context correctly. We avoid creating the multiple
2009                          * VLAN interfaces, so we cannot support VLAN tag mask.
2010                          */
2011                         return rte_flow_error_set(error, EINVAL,
2012                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2013                                                   item,
2014                                                   "VLAN tag mask is not"
2015                                                   " supported in virtual"
2016                                                   " environment");
2017                 }
2018         }
2019         if (spec) {
2020                 vlan_tag = spec->tci;
2021                 vlan_tag &= mask->tci;
2022         }
2023         /*
2024          * From verbs perspective an empty VLAN is equivalent
2025          * to a packet without VLAN layer.
2026          */
2027         if (!vlan_tag)
2028                 return rte_flow_error_set(error, EINVAL,
2029                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2030                                           item->spec,
2031                                           "VLAN cannot be empty");
2032         return 0;
2033 }
2034
2035 /**
2036  * Validate IPV4 item.
2037  *
2038  * @param[in] item
2039  *   Item specification.
2040  * @param[in] item_flags
2041  *   Bit-fields that holds the items detected until now.
2042  * @param[in] last_item
2043  *   Previous validated item in the pattern items.
2044  * @param[in] ether_type
2045  *   Type in the ethernet layer header (including dot1q).
2046  * @param[in] acc_mask
2047  *   Acceptable mask, if NULL default internal default mask
2048  *   will be used to check whether item fields are supported.
2049  * @param[in] range_accepted
2050  *   True if range of values is accepted for specific fields, false otherwise.
2051  * @param[out] error
2052  *   Pointer to error structure.
2053  *
2054  * @return
2055  *   0 on success, a negative errno value otherwise and rte_errno is set.
2056  */
2057 int
2058 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
2059                              uint64_t item_flags,
2060                              uint64_t last_item,
2061                              uint16_t ether_type,
2062                              const struct rte_flow_item_ipv4 *acc_mask,
2063                              bool range_accepted,
2064                              struct rte_flow_error *error)
2065 {
2066         const struct rte_flow_item_ipv4 *mask = item->mask;
2067         const struct rte_flow_item_ipv4 *spec = item->spec;
2068         const struct rte_flow_item_ipv4 nic_mask = {
2069                 .hdr = {
2070                         .src_addr = RTE_BE32(0xffffffff),
2071                         .dst_addr = RTE_BE32(0xffffffff),
2072                         .type_of_service = 0xff,
2073                         .next_proto_id = 0xff,
2074                 },
2075         };
2076         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2077         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2078                                       MLX5_FLOW_LAYER_OUTER_L3;
2079         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2080                                       MLX5_FLOW_LAYER_OUTER_L4;
2081         int ret;
2082         uint8_t next_proto = 0xFF;
2083         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2084                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2085                                   MLX5_FLOW_LAYER_INNER_VLAN);
2086
2087         if ((last_item & l2_vlan) && ether_type &&
2088             ether_type != RTE_ETHER_TYPE_IPV4)
2089                 return rte_flow_error_set(error, EINVAL,
2090                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2091                                           "IPv4 cannot follow L2/VLAN layer "
2092                                           "which ether type is not IPv4");
2093         if (item_flags & MLX5_FLOW_LAYER_IPIP) {
2094                 if (mask && spec)
2095                         next_proto = mask->hdr.next_proto_id &
2096                                      spec->hdr.next_proto_id;
2097                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2098                         return rte_flow_error_set(error, EINVAL,
2099                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2100                                                   item,
2101                                                   "multiple tunnel "
2102                                                   "not supported");
2103         }
2104         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
2105                 return rte_flow_error_set(error, EINVAL,
2106                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2107                                           "wrong tunnel type - IPv6 specified "
2108                                           "but IPv4 item provided");
2109         if (item_flags & l3m)
2110                 return rte_flow_error_set(error, ENOTSUP,
2111                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2112                                           "multiple L3 layers not supported");
2113         else if (item_flags & l4m)
2114                 return rte_flow_error_set(error, EINVAL,
2115                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2116                                           "L3 cannot follow an L4 layer.");
2117         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2118                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2119                 return rte_flow_error_set(error, EINVAL,
2120                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2121                                           "L3 cannot follow an NVGRE layer.");
2122         if (!mask)
2123                 mask = &rte_flow_item_ipv4_mask;
2124         else if (mask->hdr.next_proto_id != 0 &&
2125                  mask->hdr.next_proto_id != 0xff)
2126                 return rte_flow_error_set(error, EINVAL,
2127                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2128                                           "partial mask is not supported"
2129                                           " for protocol");
2130         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2131                                         acc_mask ? (const uint8_t *)acc_mask
2132                                                  : (const uint8_t *)&nic_mask,
2133                                         sizeof(struct rte_flow_item_ipv4),
2134                                         range_accepted, error);
2135         if (ret < 0)
2136                 return ret;
2137         return 0;
2138 }
2139
2140 /**
2141  * Validate IPV6 item.
2142  *
2143  * @param[in] item
2144  *   Item specification.
2145  * @param[in] item_flags
2146  *   Bit-fields that holds the items detected until now.
2147  * @param[in] last_item
2148  *   Previous validated item in the pattern items.
2149  * @param[in] ether_type
2150  *   Type in the ethernet layer header (including dot1q).
2151  * @param[in] acc_mask
2152  *   Acceptable mask, if NULL default internal default mask
2153  *   will be used to check whether item fields are supported.
2154  * @param[out] error
2155  *   Pointer to error structure.
2156  *
2157  * @return
2158  *   0 on success, a negative errno value otherwise and rte_errno is set.
2159  */
2160 int
2161 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
2162                              uint64_t item_flags,
2163                              uint64_t last_item,
2164                              uint16_t ether_type,
2165                              const struct rte_flow_item_ipv6 *acc_mask,
2166                              struct rte_flow_error *error)
2167 {
2168         const struct rte_flow_item_ipv6 *mask = item->mask;
2169         const struct rte_flow_item_ipv6 *spec = item->spec;
2170         const struct rte_flow_item_ipv6 nic_mask = {
2171                 .hdr = {
2172                         .src_addr =
2173                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2174                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2175                         .dst_addr =
2176                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2177                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2178                         .vtc_flow = RTE_BE32(0xffffffff),
2179                         .proto = 0xff,
2180                 },
2181         };
2182         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2183         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2184                                       MLX5_FLOW_LAYER_OUTER_L3;
2185         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2186                                       MLX5_FLOW_LAYER_OUTER_L4;
2187         int ret;
2188         uint8_t next_proto = 0xFF;
2189         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2190                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2191                                   MLX5_FLOW_LAYER_INNER_VLAN);
2192
2193         if ((last_item & l2_vlan) && ether_type &&
2194             ether_type != RTE_ETHER_TYPE_IPV6)
2195                 return rte_flow_error_set(error, EINVAL,
2196                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2197                                           "IPv6 cannot follow L2/VLAN layer "
2198                                           "which ether type is not IPv6");
2199         if (mask && mask->hdr.proto == UINT8_MAX && spec)
2200                 next_proto = spec->hdr.proto;
2201         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
2202                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2203                         return rte_flow_error_set(error, EINVAL,
2204                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2205                                                   item,
2206                                                   "multiple tunnel "
2207                                                   "not supported");
2208         }
2209         if (next_proto == IPPROTO_HOPOPTS  ||
2210             next_proto == IPPROTO_ROUTING  ||
2211             next_proto == IPPROTO_FRAGMENT ||
2212             next_proto == IPPROTO_ESP      ||
2213             next_proto == IPPROTO_AH       ||
2214             next_proto == IPPROTO_DSTOPTS)
2215                 return rte_flow_error_set(error, EINVAL,
2216                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2217                                           "IPv6 proto (next header) should "
2218                                           "not be set as extension header");
2219         if (item_flags & MLX5_FLOW_LAYER_IPIP)
2220                 return rte_flow_error_set(error, EINVAL,
2221                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2222                                           "wrong tunnel type - IPv4 specified "
2223                                           "but IPv6 item provided");
2224         if (item_flags & l3m)
2225                 return rte_flow_error_set(error, ENOTSUP,
2226                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2227                                           "multiple L3 layers not supported");
2228         else if (item_flags & l4m)
2229                 return rte_flow_error_set(error, EINVAL,
2230                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2231                                           "L3 cannot follow an L4 layer.");
2232         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2233                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2234                 return rte_flow_error_set(error, EINVAL,
2235                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2236                                           "L3 cannot follow an NVGRE layer.");
2237         if (!mask)
2238                 mask = &rte_flow_item_ipv6_mask;
2239         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2240                                         acc_mask ? (const uint8_t *)acc_mask
2241                                                  : (const uint8_t *)&nic_mask,
2242                                         sizeof(struct rte_flow_item_ipv6),
2243                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2244         if (ret < 0)
2245                 return ret;
2246         return 0;
2247 }
2248
2249 /**
2250  * Validate UDP item.
2251  *
2252  * @param[in] item
2253  *   Item specification.
2254  * @param[in] item_flags
2255  *   Bit-fields that holds the items detected until now.
2256  * @param[in] target_protocol
2257  *   The next protocol in the previous item.
2258  * @param[in] flow_mask
2259  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
2260  * @param[out] error
2261  *   Pointer to error structure.
2262  *
2263  * @return
2264  *   0 on success, a negative errno value otherwise and rte_errno is set.
2265  */
2266 int
2267 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
2268                             uint64_t item_flags,
2269                             uint8_t target_protocol,
2270                             struct rte_flow_error *error)
2271 {
2272         const struct rte_flow_item_udp *mask = item->mask;
2273         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2274         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2275                                       MLX5_FLOW_LAYER_OUTER_L3;
2276         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2277                                       MLX5_FLOW_LAYER_OUTER_L4;
2278         int ret;
2279
2280         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
2281                 return rte_flow_error_set(error, EINVAL,
2282                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2283                                           "protocol filtering not compatible"
2284                                           " with UDP layer");
2285         if (!(item_flags & l3m))
2286                 return rte_flow_error_set(error, EINVAL,
2287                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2288                                           "L3 is mandatory to filter on L4");
2289         if (item_flags & l4m)
2290                 return rte_flow_error_set(error, EINVAL,
2291                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2292                                           "multiple L4 layers not supported");
2293         if (!mask)
2294                 mask = &rte_flow_item_udp_mask;
2295         ret = mlx5_flow_item_acceptable
2296                 (item, (const uint8_t *)mask,
2297                  (const uint8_t *)&rte_flow_item_udp_mask,
2298                  sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2299                  error);
2300         if (ret < 0)
2301                 return ret;
2302         return 0;
2303 }
2304
2305 /**
2306  * Validate TCP item.
2307  *
2308  * @param[in] item
2309  *   Item specification.
2310  * @param[in] item_flags
2311  *   Bit-fields that holds the items detected until now.
2312  * @param[in] target_protocol
2313  *   The next protocol in the previous item.
2314  * @param[out] error
2315  *   Pointer to error structure.
2316  *
2317  * @return
2318  *   0 on success, a negative errno value otherwise and rte_errno is set.
2319  */
2320 int
2321 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
2322                             uint64_t item_flags,
2323                             uint8_t target_protocol,
2324                             const struct rte_flow_item_tcp *flow_mask,
2325                             struct rte_flow_error *error)
2326 {
2327         const struct rte_flow_item_tcp *mask = item->mask;
2328         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2329         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2330                                       MLX5_FLOW_LAYER_OUTER_L3;
2331         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2332                                       MLX5_FLOW_LAYER_OUTER_L4;
2333         int ret;
2334
2335         MLX5_ASSERT(flow_mask);
2336         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
2337                 return rte_flow_error_set(error, EINVAL,
2338                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2339                                           "protocol filtering not compatible"
2340                                           " with TCP layer");
2341         if (!(item_flags & l3m))
2342                 return rte_flow_error_set(error, EINVAL,
2343                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2344                                           "L3 is mandatory to filter on L4");
2345         if (item_flags & l4m)
2346                 return rte_flow_error_set(error, EINVAL,
2347                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2348                                           "multiple L4 layers not supported");
2349         if (!mask)
2350                 mask = &rte_flow_item_tcp_mask;
2351         ret = mlx5_flow_item_acceptable
2352                 (item, (const uint8_t *)mask,
2353                  (const uint8_t *)flow_mask,
2354                  sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2355                  error);
2356         if (ret < 0)
2357                 return ret;
2358         return 0;
2359 }
2360
2361 /**
2362  * Validate VXLAN item.
2363  *
2364  * @param[in] item
2365  *   Item specification.
2366  * @param[in] item_flags
2367  *   Bit-fields that holds the items detected until now.
2368  * @param[in] target_protocol
2369  *   The next protocol in the previous item.
2370  * @param[out] error
2371  *   Pointer to error structure.
2372  *
2373  * @return
2374  *   0 on success, a negative errno value otherwise and rte_errno is set.
2375  */
2376 int
2377 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
2378                               uint64_t item_flags,
2379                               struct rte_flow_error *error)
2380 {
2381         const struct rte_flow_item_vxlan *spec = item->spec;
2382         const struct rte_flow_item_vxlan *mask = item->mask;
2383         int ret;
2384         union vni {
2385                 uint32_t vlan_id;
2386                 uint8_t vni[4];
2387         } id = { .vlan_id = 0, };
2388
2389
2390         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2391                 return rte_flow_error_set(error, ENOTSUP,
2392                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2393                                           "multiple tunnel layers not"
2394                                           " supported");
2395         /*
2396          * Verify only UDPv4 is present as defined in
2397          * https://tools.ietf.org/html/rfc7348
2398          */
2399         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2400                 return rte_flow_error_set(error, EINVAL,
2401                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2402                                           "no outer UDP layer found");
2403         if (!mask)
2404                 mask = &rte_flow_item_vxlan_mask;
2405         ret = mlx5_flow_item_acceptable
2406                 (item, (const uint8_t *)mask,
2407                  (const uint8_t *)&rte_flow_item_vxlan_mask,
2408                  sizeof(struct rte_flow_item_vxlan),
2409                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2410         if (ret < 0)
2411                 return ret;
2412         if (spec) {
2413                 memcpy(&id.vni[1], spec->vni, 3);
2414                 memcpy(&id.vni[1], mask->vni, 3);
2415         }
2416         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2417                 return rte_flow_error_set(error, ENOTSUP,
2418                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2419                                           "VXLAN tunnel must be fully defined");
2420         return 0;
2421 }
2422
2423 /**
2424  * Validate VXLAN_GPE item.
2425  *
2426  * @param[in] item
2427  *   Item specification.
2428  * @param[in] item_flags
2429  *   Bit-fields that holds the items detected until now.
2430  * @param[in] priv
2431  *   Pointer to the private data structure.
2432  * @param[in] target_protocol
2433  *   The next protocol in the previous item.
2434  * @param[out] error
2435  *   Pointer to error structure.
2436  *
2437  * @return
2438  *   0 on success, a negative errno value otherwise and rte_errno is set.
2439  */
2440 int
2441 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
2442                                   uint64_t item_flags,
2443                                   struct rte_eth_dev *dev,
2444                                   struct rte_flow_error *error)
2445 {
2446         struct mlx5_priv *priv = dev->data->dev_private;
2447         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
2448         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
2449         int ret;
2450         union vni {
2451                 uint32_t vlan_id;
2452                 uint8_t vni[4];
2453         } id = { .vlan_id = 0, };
2454
2455         if (!priv->config.l3_vxlan_en)
2456                 return rte_flow_error_set(error, ENOTSUP,
2457                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2458                                           "L3 VXLAN is not enabled by device"
2459                                           " parameter and/or not configured in"
2460                                           " firmware");
2461         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2462                 return rte_flow_error_set(error, ENOTSUP,
2463                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2464                                           "multiple tunnel layers not"
2465                                           " supported");
2466         /*
2467          * Verify only UDPv4 is present as defined in
2468          * https://tools.ietf.org/html/rfc7348
2469          */
2470         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2471                 return rte_flow_error_set(error, EINVAL,
2472                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2473                                           "no outer UDP layer found");
2474         if (!mask)
2475                 mask = &rte_flow_item_vxlan_gpe_mask;
2476         ret = mlx5_flow_item_acceptable
2477                 (item, (const uint8_t *)mask,
2478                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
2479                  sizeof(struct rte_flow_item_vxlan_gpe),
2480                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2481         if (ret < 0)
2482                 return ret;
2483         if (spec) {
2484                 if (spec->protocol)
2485                         return rte_flow_error_set(error, ENOTSUP,
2486                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2487                                                   item,
2488                                                   "VxLAN-GPE protocol"
2489                                                   " not supported");
2490                 memcpy(&id.vni[1], spec->vni, 3);
2491                 memcpy(&id.vni[1], mask->vni, 3);
2492         }
2493         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2494                 return rte_flow_error_set(error, ENOTSUP,
2495                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2496                                           "VXLAN-GPE tunnel must be fully"
2497                                           " defined");
2498         return 0;
2499 }
2500 /**
2501  * Validate GRE Key item.
2502  *
2503  * @param[in] item
2504  *   Item specification.
2505  * @param[in] item_flags
2506  *   Bit flags to mark detected items.
2507  * @param[in] gre_item
2508  *   Pointer to gre_item
2509  * @param[out] error
2510  *   Pointer to error structure.
2511  *
2512  * @return
2513  *   0 on success, a negative errno value otherwise and rte_errno is set.
2514  */
2515 int
2516 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
2517                                 uint64_t item_flags,
2518                                 const struct rte_flow_item *gre_item,
2519                                 struct rte_flow_error *error)
2520 {
2521         const rte_be32_t *mask = item->mask;
2522         int ret = 0;
2523         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
2524         const struct rte_flow_item_gre *gre_spec;
2525         const struct rte_flow_item_gre *gre_mask;
2526
2527         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
2528                 return rte_flow_error_set(error, ENOTSUP,
2529                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2530                                           "Multiple GRE key not support");
2531         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2532                 return rte_flow_error_set(error, ENOTSUP,
2533                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2534                                           "No preceding GRE header");
2535         if (item_flags & MLX5_FLOW_LAYER_INNER)
2536                 return rte_flow_error_set(error, ENOTSUP,
2537                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2538                                           "GRE key following a wrong item");
2539         gre_mask = gre_item->mask;
2540         if (!gre_mask)
2541                 gre_mask = &rte_flow_item_gre_mask;
2542         gre_spec = gre_item->spec;
2543         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2544                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2545                 return rte_flow_error_set(error, EINVAL,
2546                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2547                                           "Key bit must be on");
2548
2549         if (!mask)
2550                 mask = &gre_key_default_mask;
2551         ret = mlx5_flow_item_acceptable
2552                 (item, (const uint8_t *)mask,
2553                  (const uint8_t *)&gre_key_default_mask,
2554                  sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2555         return ret;
2556 }
2557
2558 /**
2559  * Validate GRE item.
2560  *
2561  * @param[in] item
2562  *   Item specification.
2563  * @param[in] item_flags
2564  *   Bit flags to mark detected items.
2565  * @param[in] target_protocol
2566  *   The next protocol in the previous item.
2567  * @param[out] error
2568  *   Pointer to error structure.
2569  *
2570  * @return
2571  *   0 on success, a negative errno value otherwise and rte_errno is set.
2572  */
2573 int
2574 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2575                             uint64_t item_flags,
2576                             uint8_t target_protocol,
2577                             struct rte_flow_error *error)
2578 {
2579         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2580         const struct rte_flow_item_gre *mask = item->mask;
2581         int ret;
2582         const struct rte_flow_item_gre nic_mask = {
2583                 .c_rsvd0_ver = RTE_BE16(0xB000),
2584                 .protocol = RTE_BE16(UINT16_MAX),
2585         };
2586
2587         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2588                 return rte_flow_error_set(error, EINVAL,
2589                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2590                                           "protocol filtering not compatible"
2591                                           " with this GRE layer");
2592         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2593                 return rte_flow_error_set(error, ENOTSUP,
2594                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2595                                           "multiple tunnel layers not"
2596                                           " supported");
2597         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2598                 return rte_flow_error_set(error, ENOTSUP,
2599                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2600                                           "L3 Layer is missing");
2601         if (!mask)
2602                 mask = &rte_flow_item_gre_mask;
2603         ret = mlx5_flow_item_acceptable
2604                 (item, (const uint8_t *)mask,
2605                  (const uint8_t *)&nic_mask,
2606                  sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2607                  error);
2608         if (ret < 0)
2609                 return ret;
2610 #ifndef HAVE_MLX5DV_DR
2611 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2612         if (spec && (spec->protocol & mask->protocol))
2613                 return rte_flow_error_set(error, ENOTSUP,
2614                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2615                                           "without MPLS support the"
2616                                           " specification cannot be used for"
2617                                           " filtering");
2618 #endif
2619 #endif
2620         return 0;
2621 }
2622
2623 /**
2624  * Validate Geneve item.
2625  *
2626  * @param[in] item
2627  *   Item specification.
2628  * @param[in] itemFlags
2629  *   Bit-fields that holds the items detected until now.
2630  * @param[in] enPriv
2631  *   Pointer to the private data structure.
2632  * @param[out] error
2633  *   Pointer to error structure.
2634  *
2635  * @return
2636  *   0 on success, a negative errno value otherwise and rte_errno is set.
2637  */
2638
2639 int
2640 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2641                                uint64_t item_flags,
2642                                struct rte_eth_dev *dev,
2643                                struct rte_flow_error *error)
2644 {
2645         struct mlx5_priv *priv = dev->data->dev_private;
2646         const struct rte_flow_item_geneve *spec = item->spec;
2647         const struct rte_flow_item_geneve *mask = item->mask;
2648         int ret;
2649         uint16_t gbhdr;
2650         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2651                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2652         const struct rte_flow_item_geneve nic_mask = {
2653                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2654                 .vni = "\xff\xff\xff",
2655                 .protocol = RTE_BE16(UINT16_MAX),
2656         };
2657
2658         if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2659                 return rte_flow_error_set(error, ENOTSUP,
2660                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2661                                           "L3 Geneve is not enabled by device"
2662                                           " parameter and/or not configured in"
2663                                           " firmware");
2664         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2665                 return rte_flow_error_set(error, ENOTSUP,
2666                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2667                                           "multiple tunnel layers not"
2668                                           " supported");
2669         /*
2670          * Verify only UDPv4 is present as defined in
2671          * https://tools.ietf.org/html/rfc7348
2672          */
2673         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2674                 return rte_flow_error_set(error, EINVAL,
2675                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2676                                           "no outer UDP layer found");
2677         if (!mask)
2678                 mask = &rte_flow_item_geneve_mask;
2679         ret = mlx5_flow_item_acceptable
2680                                   (item, (const uint8_t *)mask,
2681                                    (const uint8_t *)&nic_mask,
2682                                    sizeof(struct rte_flow_item_geneve),
2683                                    MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2684         if (ret)
2685                 return ret;
2686         if (spec) {
2687                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2688                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2689                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2690                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2691                         return rte_flow_error_set(error, ENOTSUP,
2692                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2693                                                   item,
2694                                                   "Geneve protocol unsupported"
2695                                                   " fields are being used");
2696                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2697                         return rte_flow_error_set
2698                                         (error, ENOTSUP,
2699                                          RTE_FLOW_ERROR_TYPE_ITEM,
2700                                          item,
2701                                          "Unsupported Geneve options length");
2702         }
2703         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2704                 return rte_flow_error_set
2705                                     (error, ENOTSUP,
2706                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2707                                      "Geneve tunnel must be fully defined");
2708         return 0;
2709 }
2710
2711 /**
2712  * Validate MPLS item.
2713  *
2714  * @param[in] dev
2715  *   Pointer to the rte_eth_dev structure.
2716  * @param[in] item
2717  *   Item specification.
2718  * @param[in] item_flags
2719  *   Bit-fields that holds the items detected until now.
2720  * @param[in] prev_layer
2721  *   The protocol layer indicated in previous item.
2722  * @param[out] error
2723  *   Pointer to error structure.
2724  *
2725  * @return
2726  *   0 on success, a negative errno value otherwise and rte_errno is set.
2727  */
2728 int
2729 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
2730                              const struct rte_flow_item *item __rte_unused,
2731                              uint64_t item_flags __rte_unused,
2732                              uint64_t prev_layer __rte_unused,
2733                              struct rte_flow_error *error)
2734 {
2735 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2736         const struct rte_flow_item_mpls *mask = item->mask;
2737         struct mlx5_priv *priv = dev->data->dev_private;
2738         int ret;
2739
2740         if (!priv->config.mpls_en)
2741                 return rte_flow_error_set(error, ENOTSUP,
2742                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2743                                           "MPLS not supported or"
2744                                           " disabled in firmware"
2745                                           " configuration.");
2746         /* MPLS over IP, UDP, GRE is allowed */
2747         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
2748                             MLX5_FLOW_LAYER_OUTER_L4_UDP |
2749                             MLX5_FLOW_LAYER_GRE)))
2750                 return rte_flow_error_set(error, EINVAL,
2751                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2752                                           "protocol filtering not compatible"
2753                                           " with MPLS layer");
2754         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
2755         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
2756             !(item_flags & MLX5_FLOW_LAYER_GRE))
2757                 return rte_flow_error_set(error, ENOTSUP,
2758                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2759                                           "multiple tunnel layers not"
2760                                           " supported");
2761         if (!mask)
2762                 mask = &rte_flow_item_mpls_mask;
2763         ret = mlx5_flow_item_acceptable
2764                 (item, (const uint8_t *)mask,
2765                  (const uint8_t *)&rte_flow_item_mpls_mask,
2766                  sizeof(struct rte_flow_item_mpls),
2767                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2768         if (ret < 0)
2769                 return ret;
2770         return 0;
2771 #else
2772         return rte_flow_error_set(error, ENOTSUP,
2773                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
2774                                   "MPLS is not supported by Verbs, please"
2775                                   " update.");
2776 #endif
2777 }
2778
2779 /**
2780  * Validate NVGRE item.
2781  *
2782  * @param[in] item
2783  *   Item specification.
2784  * @param[in] item_flags
2785  *   Bit flags to mark detected items.
2786  * @param[in] target_protocol
2787  *   The next protocol in the previous item.
2788  * @param[out] error
2789  *   Pointer to error structure.
2790  *
2791  * @return
2792  *   0 on success, a negative errno value otherwise and rte_errno is set.
2793  */
2794 int
2795 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
2796                               uint64_t item_flags,
2797                               uint8_t target_protocol,
2798                               struct rte_flow_error *error)
2799 {
2800         const struct rte_flow_item_nvgre *mask = item->mask;
2801         int ret;
2802
2803         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2804                 return rte_flow_error_set(error, EINVAL,
2805                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2806                                           "protocol filtering not compatible"
2807                                           " with this GRE layer");
2808         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2809                 return rte_flow_error_set(error, ENOTSUP,
2810                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2811                                           "multiple tunnel layers not"
2812                                           " supported");
2813         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2814                 return rte_flow_error_set(error, ENOTSUP,
2815                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2816                                           "L3 Layer is missing");
2817         if (!mask)
2818                 mask = &rte_flow_item_nvgre_mask;
2819         ret = mlx5_flow_item_acceptable
2820                 (item, (const uint8_t *)mask,
2821                  (const uint8_t *)&rte_flow_item_nvgre_mask,
2822                  sizeof(struct rte_flow_item_nvgre),
2823                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2824         if (ret < 0)
2825                 return ret;
2826         return 0;
2827 }
2828
2829 /**
2830  * Validate eCPRI item.
2831  *
2832  * @param[in] item
2833  *   Item specification.
2834  * @param[in] item_flags
2835  *   Bit-fields that holds the items detected until now.
2836  * @param[in] last_item
2837  *   Previous validated item in the pattern items.
2838  * @param[in] ether_type
2839  *   Type in the ethernet layer header (including dot1q).
2840  * @param[in] acc_mask
2841  *   Acceptable mask, if NULL default internal default mask
2842  *   will be used to check whether item fields are supported.
2843  * @param[out] error
2844  *   Pointer to error structure.
2845  *
2846  * @return
2847  *   0 on success, a negative errno value otherwise and rte_errno is set.
2848  */
2849 int
2850 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item,
2851                               uint64_t item_flags,
2852                               uint64_t last_item,
2853                               uint16_t ether_type,
2854                               const struct rte_flow_item_ecpri *acc_mask,
2855                               struct rte_flow_error *error)
2856 {
2857         const struct rte_flow_item_ecpri *mask = item->mask;
2858         const struct rte_flow_item_ecpri nic_mask = {
2859                 .hdr = {
2860                         .common = {
2861                                 .u32 =
2862                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
2863                                         .type = 0xFF,
2864                                         }).u32),
2865                         },
2866                         .dummy[0] = 0xFFFFFFFF,
2867                 },
2868         };
2869         const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 |
2870                                         MLX5_FLOW_LAYER_OUTER_VLAN);
2871         struct rte_flow_item_ecpri mask_lo;
2872
2873         if ((last_item & outer_l2_vlan) && ether_type &&
2874             ether_type != RTE_ETHER_TYPE_ECPRI)
2875                 return rte_flow_error_set(error, EINVAL,
2876                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2877                                           "eCPRI cannot follow L2/VLAN layer "
2878                                           "which ether type is not 0xAEFE.");
2879         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2880                 return rte_flow_error_set(error, EINVAL,
2881                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2882                                           "eCPRI with tunnel is not supported "
2883                                           "right now.");
2884         if (item_flags & MLX5_FLOW_LAYER_OUTER_L3)
2885                 return rte_flow_error_set(error, ENOTSUP,
2886                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2887                                           "multiple L3 layers not supported");
2888         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP)
2889                 return rte_flow_error_set(error, EINVAL,
2890                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2891                                           "eCPRI cannot follow a TCP layer.");
2892         /* In specification, eCPRI could be over UDP layer. */
2893         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)
2894                 return rte_flow_error_set(error, EINVAL,
2895                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2896                                           "eCPRI over UDP layer is not yet "
2897                                           "supported right now.");
2898         /* Mask for type field in common header could be zero. */
2899         if (!mask)
2900                 mask = &rte_flow_item_ecpri_mask;
2901         mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32);
2902         /* Input mask is in big-endian format. */
2903         if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff)
2904                 return rte_flow_error_set(error, EINVAL,
2905                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2906                                           "partial mask is not supported "
2907                                           "for protocol");
2908         else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0)
2909                 return rte_flow_error_set(error, EINVAL,
2910                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2911                                           "message header mask must be after "
2912                                           "a type mask");
2913         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2914                                          acc_mask ? (const uint8_t *)acc_mask
2915                                                   : (const uint8_t *)&nic_mask,
2916                                          sizeof(struct rte_flow_item_ecpri),
2917                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2918 }
2919
2920 /**
2921  * Release resource related QUEUE/RSS action split.
2922  *
2923  * @param dev
2924  *   Pointer to Ethernet device.
2925  * @param flow
2926  *   Flow to release id's from.
2927  */
2928 static void
2929 flow_mreg_split_qrss_release(struct rte_eth_dev *dev,
2930                              struct rte_flow *flow)
2931 {
2932         struct mlx5_priv *priv = dev->data->dev_private;
2933         uint32_t handle_idx;
2934         struct mlx5_flow_handle *dev_handle;
2935
2936         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
2937                        handle_idx, dev_handle, next)
2938                 if (dev_handle->split_flow_id)
2939                         mlx5_ipool_free(priv->sh->ipool
2940                                         [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
2941                                         dev_handle->split_flow_id);
2942 }
2943
2944 static int
2945 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
2946                    const struct rte_flow_attr *attr __rte_unused,
2947                    const struct rte_flow_item items[] __rte_unused,
2948                    const struct rte_flow_action actions[] __rte_unused,
2949                    bool external __rte_unused,
2950                    int hairpin __rte_unused,
2951                    struct rte_flow_error *error)
2952 {
2953         return rte_flow_error_set(error, ENOTSUP,
2954                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2955 }
2956
2957 static struct mlx5_flow *
2958 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
2959                   const struct rte_flow_attr *attr __rte_unused,
2960                   const struct rte_flow_item items[] __rte_unused,
2961                   const struct rte_flow_action actions[] __rte_unused,
2962                   struct rte_flow_error *error)
2963 {
2964         rte_flow_error_set(error, ENOTSUP,
2965                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2966         return NULL;
2967 }
2968
2969 static int
2970 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
2971                     struct mlx5_flow *dev_flow __rte_unused,
2972                     const struct rte_flow_attr *attr __rte_unused,
2973                     const struct rte_flow_item items[] __rte_unused,
2974                     const struct rte_flow_action actions[] __rte_unused,
2975                     struct rte_flow_error *error)
2976 {
2977         return rte_flow_error_set(error, ENOTSUP,
2978                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2979 }
2980
2981 static int
2982 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
2983                 struct rte_flow *flow __rte_unused,
2984                 struct rte_flow_error *error)
2985 {
2986         return rte_flow_error_set(error, ENOTSUP,
2987                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2988 }
2989
2990 static void
2991 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
2992                  struct rte_flow *flow __rte_unused)
2993 {
2994 }
2995
2996 static void
2997 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
2998                   struct rte_flow *flow __rte_unused)
2999 {
3000 }
3001
3002 static int
3003 flow_null_query(struct rte_eth_dev *dev __rte_unused,
3004                 struct rte_flow *flow __rte_unused,
3005                 const struct rte_flow_action *actions __rte_unused,
3006                 void *data __rte_unused,
3007                 struct rte_flow_error *error)
3008 {
3009         return rte_flow_error_set(error, ENOTSUP,
3010                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3011 }
3012
3013 static int
3014 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused,
3015                       uint32_t domains __rte_unused,
3016                       uint32_t flags __rte_unused)
3017 {
3018         return 0;
3019 }
3020
3021 /* Void driver to protect from null pointer reference. */
3022 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
3023         .validate = flow_null_validate,
3024         .prepare = flow_null_prepare,
3025         .translate = flow_null_translate,
3026         .apply = flow_null_apply,
3027         .remove = flow_null_remove,
3028         .destroy = flow_null_destroy,
3029         .query = flow_null_query,
3030         .sync_domain = flow_null_sync_domain,
3031 };
3032
3033 /**
3034  * Select flow driver type according to flow attributes and device
3035  * configuration.
3036  *
3037  * @param[in] dev
3038  *   Pointer to the dev structure.
3039  * @param[in] attr
3040  *   Pointer to the flow attributes.
3041  *
3042  * @return
3043  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
3044  */
3045 static enum mlx5_flow_drv_type
3046 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
3047 {
3048         struct mlx5_priv *priv = dev->data->dev_private;
3049         /* The OS can determine first a specific flow type (DV, VERBS) */
3050         enum mlx5_flow_drv_type type = mlx5_flow_os_get_type();
3051
3052         if (type != MLX5_FLOW_TYPE_MAX)
3053                 return type;
3054         /* If no OS specific type - continue with DV/VERBS selection */
3055         if (attr->transfer && priv->config.dv_esw_en)
3056                 type = MLX5_FLOW_TYPE_DV;
3057         if (!attr->transfer)
3058                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
3059                                                  MLX5_FLOW_TYPE_VERBS;
3060         return type;
3061 }
3062
3063 #define flow_get_drv_ops(type) flow_drv_ops[type]
3064
3065 /**
3066  * Flow driver validation API. This abstracts calling driver specific functions.
3067  * The type of flow driver is determined according to flow attributes.
3068  *
3069  * @param[in] dev
3070  *   Pointer to the dev structure.
3071  * @param[in] attr
3072  *   Pointer to the flow attributes.
3073  * @param[in] items
3074  *   Pointer to the list of items.
3075  * @param[in] actions
3076  *   Pointer to the list of actions.
3077  * @param[in] external
3078  *   This flow rule is created by request external to PMD.
3079  * @param[in] hairpin
3080  *   Number of hairpin TX actions, 0 means classic flow.
3081  * @param[out] error
3082  *   Pointer to the error structure.
3083  *
3084  * @return
3085  *   0 on success, a negative errno value otherwise and rte_errno is set.
3086  */
3087 static inline int
3088 flow_drv_validate(struct rte_eth_dev *dev,
3089                   const struct rte_flow_attr *attr,
3090                   const struct rte_flow_item items[],
3091                   const struct rte_flow_action actions[],
3092                   bool external, int hairpin, struct rte_flow_error *error)
3093 {
3094         const struct mlx5_flow_driver_ops *fops;
3095         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
3096
3097         fops = flow_get_drv_ops(type);
3098         return fops->validate(dev, attr, items, actions, external,
3099                               hairpin, error);
3100 }
3101
3102 /**
3103  * Flow driver preparation API. This abstracts calling driver specific
3104  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3105  * calculates the size of memory required for device flow, allocates the memory,
3106  * initializes the device flow and returns the pointer.
3107  *
3108  * @note
3109  *   This function initializes device flow structure such as dv or verbs in
3110  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
3111  *   rest. For example, adding returning device flow to flow->dev_flow list and
3112  *   setting backward reference to the flow should be done out of this function.
3113  *   layers field is not filled either.
3114  *
3115  * @param[in] dev
3116  *   Pointer to the dev structure.
3117  * @param[in] attr
3118  *   Pointer to the flow attributes.
3119  * @param[in] items
3120  *   Pointer to the list of items.
3121  * @param[in] actions
3122  *   Pointer to the list of actions.
3123  * @param[in] flow_idx
3124  *   This memory pool index to the flow.
3125  * @param[out] error
3126  *   Pointer to the error structure.
3127  *
3128  * @return
3129  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
3130  */
3131 static inline struct mlx5_flow *
3132 flow_drv_prepare(struct rte_eth_dev *dev,
3133                  const struct rte_flow *flow,
3134                  const struct rte_flow_attr *attr,
3135                  const struct rte_flow_item items[],
3136                  const struct rte_flow_action actions[],
3137                  uint32_t flow_idx,
3138                  struct rte_flow_error *error)
3139 {
3140         const struct mlx5_flow_driver_ops *fops;
3141         enum mlx5_flow_drv_type type = flow->drv_type;
3142         struct mlx5_flow *mlx5_flow = NULL;
3143
3144         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3145         fops = flow_get_drv_ops(type);
3146         mlx5_flow = fops->prepare(dev, attr, items, actions, error);
3147         if (mlx5_flow)
3148                 mlx5_flow->flow_idx = flow_idx;
3149         return mlx5_flow;
3150 }
3151
3152 /**
3153  * Flow driver translation API. This abstracts calling driver specific
3154  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3155  * translates a generic flow into a driver flow. flow_drv_prepare() must
3156  * precede.
3157  *
3158  * @note
3159  *   dev_flow->layers could be filled as a result of parsing during translation
3160  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
3161  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
3162  *   flow->actions could be overwritten even though all the expanded dev_flows
3163  *   have the same actions.
3164  *
3165  * @param[in] dev
3166  *   Pointer to the rte dev structure.
3167  * @param[in, out] dev_flow
3168  *   Pointer to the mlx5 flow.
3169  * @param[in] attr
3170  *   Pointer to the flow attributes.
3171  * @param[in] items
3172  *   Pointer to the list of items.
3173  * @param[in] actions
3174  *   Pointer to the list of actions.
3175  * @param[out] error
3176  *   Pointer to the error structure.
3177  *
3178  * @return
3179  *   0 on success, a negative errno value otherwise and rte_errno is set.
3180  */
3181 static inline int
3182 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
3183                    const struct rte_flow_attr *attr,
3184                    const struct rte_flow_item items[],
3185                    const struct rte_flow_action actions[],
3186                    struct rte_flow_error *error)
3187 {
3188         const struct mlx5_flow_driver_ops *fops;
3189         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
3190
3191         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3192         fops = flow_get_drv_ops(type);
3193         return fops->translate(dev, dev_flow, attr, items, actions, error);
3194 }
3195
3196 /**
3197  * Flow driver apply API. This abstracts calling driver specific functions.
3198  * Parent flow (rte_flow) should have driver type (drv_type). It applies
3199  * translated driver flows on to device. flow_drv_translate() must precede.
3200  *
3201  * @param[in] dev
3202  *   Pointer to Ethernet device structure.
3203  * @param[in, out] flow
3204  *   Pointer to flow structure.
3205  * @param[out] error
3206  *   Pointer to error structure.
3207  *
3208  * @return
3209  *   0 on success, a negative errno value otherwise and rte_errno is set.
3210  */
3211 static inline int
3212 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
3213                struct rte_flow_error *error)
3214 {
3215         const struct mlx5_flow_driver_ops *fops;
3216         enum mlx5_flow_drv_type type = flow->drv_type;
3217
3218         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3219         fops = flow_get_drv_ops(type);
3220         return fops->apply(dev, flow, error);
3221 }
3222
3223 /**
3224  * Flow driver destroy API. This abstracts calling driver specific functions.
3225  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
3226  * on device and releases resources of the flow.
3227  *
3228  * @param[in] dev
3229  *   Pointer to Ethernet device.
3230  * @param[in, out] flow
3231  *   Pointer to flow structure.
3232  */
3233 static inline void
3234 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
3235 {
3236         const struct mlx5_flow_driver_ops *fops;
3237         enum mlx5_flow_drv_type type = flow->drv_type;
3238
3239         flow_mreg_split_qrss_release(dev, flow);
3240         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3241         fops = flow_get_drv_ops(type);
3242         fops->destroy(dev, flow);
3243 }
3244
3245 /**
3246  * Get RSS action from the action list.
3247  *
3248  * @param[in] actions
3249  *   Pointer to the list of actions.
3250  *
3251  * @return
3252  *   Pointer to the RSS action if exist, else return NULL.
3253  */
3254 static const struct rte_flow_action_rss*
3255 flow_get_rss_action(const struct rte_flow_action actions[])
3256 {
3257         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3258                 switch (actions->type) {
3259                 case RTE_FLOW_ACTION_TYPE_RSS:
3260                         return (const struct rte_flow_action_rss *)
3261                                actions->conf;
3262                 default:
3263                         break;
3264                 }
3265         }
3266         return NULL;
3267 }
3268
3269 /**
3270  * Get ASO age action by index.
3271  *
3272  * @param[in] dev
3273  *   Pointer to the Ethernet device structure.
3274  * @param[in] age_idx
3275  *   Index to the ASO age action.
3276  *
3277  * @return
3278  *   The specified ASO age action.
3279  */
3280 struct mlx5_aso_age_action*
3281 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx)
3282 {
3283         uint16_t pool_idx = age_idx & UINT16_MAX;
3284         uint16_t offset = (age_idx >> 16) & UINT16_MAX;
3285         struct mlx5_priv *priv = dev->data->dev_private;
3286         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
3287         struct mlx5_aso_age_pool *pool = mng->pools[pool_idx];
3288
3289         return &pool->actions[offset - 1];
3290 }
3291
3292 /* maps shared action to translated non shared in some actions array */
3293 struct mlx5_translated_shared_action {
3294         struct rte_flow_shared_action *action; /**< Shared action */
3295         int index; /**< Index in related array of rte_flow_action */
3296 };
3297
3298 /**
3299  * Translates actions of type RTE_FLOW_ACTION_TYPE_SHARED to related
3300  * non shared action if translation possible.
3301  * This functionality used to run same execution path for both shared & non
3302  * shared actions on flow create. All necessary preparations for shared
3303  * action handling should be preformed on *shared* actions list returned
3304  * from this call.
3305  *
3306  * @param[in] dev
3307  *   Pointer to Ethernet device.
3308  * @param[in] actions
3309  *   List of actions to translate.
3310  * @param[out] shared
3311  *   List to store translated shared actions.
3312  * @param[in, out] shared_n
3313  *   Size of *shared* array. On return should be updated with number of shared
3314  *   actions retrieved from the *actions* list.
3315  * @param[out] translated_actions
3316  *   List of actions where all shared actions were translated to non shared
3317  *   if possible. NULL if no translation took place.
3318  * @param[out] error
3319  *   Pointer to the error structure.
3320  *
3321  * @return
3322  *   0 on success, a negative errno value otherwise and rte_errno is set.
3323  */
3324 static int
3325 flow_shared_actions_translate(struct rte_eth_dev *dev,
3326                               const struct rte_flow_action actions[],
3327                               struct mlx5_translated_shared_action *shared,
3328                               int *shared_n,
3329                               struct rte_flow_action **translated_actions,
3330                               struct rte_flow_error *error)
3331 {
3332         struct mlx5_priv *priv = dev->data->dev_private;
3333         struct rte_flow_action *translated = NULL;
3334         size_t actions_size;
3335         int n;
3336         int copied_n = 0;
3337         struct mlx5_translated_shared_action *shared_end = NULL;
3338
3339         for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
3340                 if (actions[n].type != RTE_FLOW_ACTION_TYPE_SHARED)
3341                         continue;
3342                 if (copied_n == *shared_n) {
3343                         return rte_flow_error_set
3344                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
3345                                  NULL, "too many shared actions");
3346                 }
3347                 rte_memcpy(&shared[copied_n].action, &actions[n].conf,
3348                            sizeof(actions[n].conf));
3349                 shared[copied_n].index = n;
3350                 copied_n++;
3351         }
3352         n++;
3353         *shared_n = copied_n;
3354         if (!copied_n)
3355                 return 0;
3356         actions_size = sizeof(struct rte_flow_action) * n;
3357         translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY);
3358         if (!translated) {
3359                 rte_errno = ENOMEM;
3360                 return -ENOMEM;
3361         }
3362         memcpy(translated, actions, actions_size);
3363         for (shared_end = shared + copied_n; shared < shared_end; shared++) {
3364                 struct mlx5_shared_action_rss *shared_rss;
3365                 uint32_t act_idx = (uint32_t)(uintptr_t)shared->action;
3366                 uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
3367                 uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET)
3368                                                                            - 1);
3369
3370                 switch (type) {
3371                 case MLX5_SHARED_ACTION_TYPE_RSS:
3372                         shared_rss = mlx5_ipool_get
3373                           (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
3374                         translated[shared->index].type =
3375                                 RTE_FLOW_ACTION_TYPE_RSS;
3376                         translated[shared->index].conf =
3377                                 &shared_rss->origin;
3378                         break;
3379                 case MLX5_SHARED_ACTION_TYPE_AGE:
3380                         if (priv->sh->flow_hit_aso_en) {
3381                                 translated[shared->index].type =
3382                                         (enum rte_flow_action_type)
3383                                         MLX5_RTE_FLOW_ACTION_TYPE_AGE;
3384                                 translated[shared->index].conf =
3385                                                          (void *)(uintptr_t)idx;
3386                                 break;
3387                         }
3388                         /* Fall-through */
3389                 default:
3390                         mlx5_free(translated);
3391                         return rte_flow_error_set
3392                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
3393                                  NULL, "invalid shared action type");
3394                 }
3395         }
3396         *translated_actions = translated;
3397         return 0;
3398 }
3399
3400 /**
3401  * Get Shared RSS action from the action list.
3402  *
3403  * @param[in] dev
3404  *   Pointer to Ethernet device.
3405  * @param[in] shared
3406  *   Pointer to the list of actions.
3407  * @param[in] shared_n
3408  *   Actions list length.
3409  *
3410  * @return
3411  *   The MLX5 RSS action ID if exists, otherwise return 0.
3412  */
3413 static uint32_t
3414 flow_get_shared_rss_action(struct rte_eth_dev *dev,
3415                            struct mlx5_translated_shared_action *shared,
3416                            int shared_n)
3417 {
3418         struct mlx5_translated_shared_action *shared_end;
3419         struct mlx5_priv *priv = dev->data->dev_private;
3420         struct mlx5_shared_action_rss *shared_rss;
3421
3422
3423         for (shared_end = shared + shared_n; shared < shared_end; shared++) {
3424                 uint32_t act_idx = (uint32_t)(uintptr_t)shared->action;
3425                 uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
3426                 uint32_t idx = act_idx &
3427                                    ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1);
3428                 switch (type) {
3429                 case MLX5_SHARED_ACTION_TYPE_RSS:
3430                         shared_rss = mlx5_ipool_get
3431                                 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
3432                                                                            idx);
3433                         __atomic_add_fetch(&shared_rss->refcnt, 1,
3434                                            __ATOMIC_RELAXED);
3435                         return idx;
3436                 default:
3437                         break;
3438                 }
3439         }
3440         return 0;
3441 }
3442
3443 static unsigned int
3444 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
3445 {
3446         const struct rte_flow_item *item;
3447         unsigned int has_vlan = 0;
3448
3449         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
3450                 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
3451                         has_vlan = 1;
3452                         break;
3453                 }
3454         }
3455         if (has_vlan)
3456                 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
3457                                        MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
3458         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
3459                                MLX5_EXPANSION_ROOT_OUTER;
3460 }
3461
3462 /**
3463  *  Get layer flags from the prefix flow.
3464  *
3465  *  Some flows may be split to several subflows, the prefix subflow gets the
3466  *  match items and the suffix sub flow gets the actions.
3467  *  Some actions need the user defined match item flags to get the detail for
3468  *  the action.
3469  *  This function helps the suffix flow to get the item layer flags from prefix
3470  *  subflow.
3471  *
3472  * @param[in] dev_flow
3473  *   Pointer the created preifx subflow.
3474  *
3475  * @return
3476  *   The layers get from prefix subflow.
3477  */
3478 static inline uint64_t
3479 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
3480 {
3481         uint64_t layers = 0;
3482
3483         /*
3484          * Layers bits could be localization, but usually the compiler will
3485          * help to do the optimization work for source code.
3486          * If no decap actions, use the layers directly.
3487          */
3488         if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP))
3489                 return dev_flow->handle->layers;
3490         /* Convert L3 layers with decap action. */
3491         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
3492                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3493         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
3494                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3495         /* Convert L4 layers with decap action.  */
3496         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
3497                 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
3498         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
3499                 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
3500         return layers;
3501 }
3502
3503 /**
3504  * Get metadata split action information.
3505  *
3506  * @param[in] actions
3507  *   Pointer to the list of actions.
3508  * @param[out] qrss
3509  *   Pointer to the return pointer.
3510  * @param[out] qrss_type
3511  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
3512  *   if no QUEUE/RSS is found.
3513  * @param[out] encap_idx
3514  *   Pointer to the index of the encap action if exists, otherwise the last
3515  *   action index.
3516  *
3517  * @return
3518  *   Total number of actions.
3519  */
3520 static int
3521 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
3522                                        const struct rte_flow_action **qrss,
3523                                        int *encap_idx)
3524 {
3525         const struct rte_flow_action_raw_encap *raw_encap;
3526         int actions_n = 0;
3527         int raw_decap_idx = -1;
3528
3529         *encap_idx = -1;
3530         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3531                 switch (actions->type) {
3532                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3533                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3534                         *encap_idx = actions_n;
3535                         break;
3536                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3537                         raw_decap_idx = actions_n;
3538                         break;
3539                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3540                         raw_encap = actions->conf;
3541                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3542                                 *encap_idx = raw_decap_idx != -1 ?
3543                                                       raw_decap_idx : actions_n;
3544                         break;
3545                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3546                 case RTE_FLOW_ACTION_TYPE_RSS:
3547                         *qrss = actions;
3548                         break;
3549                 default:
3550                         break;
3551                 }
3552                 actions_n++;
3553         }
3554         if (*encap_idx == -1)
3555                 *encap_idx = actions_n;
3556         /* Count RTE_FLOW_ACTION_TYPE_END. */
3557         return actions_n + 1;
3558 }
3559
3560 /**
3561  * Check meter action from the action list.
3562  *
3563  * @param[in] actions
3564  *   Pointer to the list of actions.
3565  * @param[out] mtr
3566  *   Pointer to the meter exist flag.
3567  *
3568  * @return
3569  *   Total number of actions.
3570  */
3571 static int
3572 flow_check_meter_action(const struct rte_flow_action actions[], uint32_t *mtr)
3573 {
3574         int actions_n = 0;
3575
3576         MLX5_ASSERT(mtr);
3577         *mtr = 0;
3578         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3579                 switch (actions->type) {
3580                 case RTE_FLOW_ACTION_TYPE_METER:
3581                         *mtr = 1;
3582                         break;
3583                 default:
3584                         break;
3585                 }
3586                 actions_n++;
3587         }
3588         /* Count RTE_FLOW_ACTION_TYPE_END. */
3589         return actions_n + 1;
3590 }
3591
3592 /**
3593  * Check if the flow should be split due to hairpin.
3594  * The reason for the split is that in current HW we can't
3595  * support encap and push-vlan on Rx, so if a flow contains
3596  * these actions we move it to Tx.
3597  *
3598  * @param dev
3599  *   Pointer to Ethernet device.
3600  * @param[in] attr
3601  *   Flow rule attributes.
3602  * @param[in] actions
3603  *   Associated actions (list terminated by the END action).
3604  *
3605  * @return
3606  *   > 0 the number of actions and the flow should be split,
3607  *   0 when no split required.
3608  */
3609 static int
3610 flow_check_hairpin_split(struct rte_eth_dev *dev,
3611                          const struct rte_flow_attr *attr,
3612                          const struct rte_flow_action actions[])
3613 {
3614         int queue_action = 0;
3615         int action_n = 0;
3616         int split = 0;
3617         const struct rte_flow_action_queue *queue;
3618         const struct rte_flow_action_rss *rss;
3619         const struct rte_flow_action_raw_encap *raw_encap;
3620         const struct rte_eth_hairpin_conf *conf;
3621
3622         if (!attr->ingress)
3623                 return 0;
3624         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3625                 switch (actions->type) {
3626                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3627                         queue = actions->conf;
3628                         if (queue == NULL)
3629                                 return 0;
3630                         conf = mlx5_rxq_get_hairpin_conf(dev, queue->index);
3631                         if (conf != NULL && !!conf->tx_explicit)
3632                                 return 0;
3633                         queue_action = 1;
3634                         action_n++;
3635                         break;
3636                 case RTE_FLOW_ACTION_TYPE_RSS:
3637                         rss = actions->conf;
3638                         if (rss == NULL || rss->queue_num == 0)
3639                                 return 0;
3640                         conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]);
3641                         if (conf != NULL && !!conf->tx_explicit)
3642                                 return 0;
3643                         queue_action = 1;
3644                         action_n++;
3645                         break;
3646                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3647                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3648                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3649                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3650                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
3651                         split++;
3652                         action_n++;
3653                         break;
3654                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3655                         raw_encap = actions->conf;
3656                         if (raw_encap->size >
3657                             (sizeof(struct rte_flow_item_eth) +
3658                              sizeof(struct rte_flow_item_ipv4)))
3659                                 split++;
3660                         action_n++;
3661                         break;
3662                 default:
3663                         action_n++;
3664                         break;
3665                 }
3666         }
3667         if (split && queue_action)
3668                 return action_n;
3669         return 0;
3670 }
3671
3672 /* Declare flow create/destroy prototype in advance. */
3673 static uint32_t
3674 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
3675                  const struct rte_flow_attr *attr,
3676                  const struct rte_flow_item items[],
3677                  const struct rte_flow_action actions[],
3678                  bool external, struct rte_flow_error *error);
3679
3680 static void
3681 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
3682                   uint32_t flow_idx);
3683
3684 struct mlx5_hlist_entry *
3685 flow_dv_mreg_create_cb(struct mlx5_hlist *list, uint64_t key,
3686                        void *cb_ctx)
3687 {
3688         struct rte_eth_dev *dev = list->ctx;
3689         struct mlx5_priv *priv = dev->data->dev_private;
3690         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3691         struct mlx5_flow_mreg_copy_resource *mcp_res;
3692         struct rte_flow_error *error = ctx->error;
3693         uint32_t idx = 0;
3694         int ret;
3695         uint32_t mark_id = key;
3696         struct rte_flow_attr attr = {
3697                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
3698                 .ingress = 1,
3699         };
3700         struct mlx5_rte_flow_item_tag tag_spec = {
3701                 .data = mark_id,
3702         };
3703         struct rte_flow_item items[] = {
3704                 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
3705         };
3706         struct rte_flow_action_mark ftag = {
3707                 .id = mark_id,
3708         };
3709         struct mlx5_flow_action_copy_mreg cp_mreg = {
3710                 .dst = REG_B,
3711                 .src = REG_NON,
3712         };
3713         struct rte_flow_action_jump jump = {
3714                 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
3715         };
3716         struct rte_flow_action actions[] = {
3717                 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
3718         };
3719
3720         /* Fill the register fileds in the flow. */
3721         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3722         if (ret < 0)
3723                 return NULL;
3724         tag_spec.id = ret;
3725         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
3726         if (ret < 0)
3727                 return NULL;
3728         cp_mreg.src = ret;
3729         /* Provide the full width of FLAG specific value. */
3730         if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
3731                 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
3732         /* Build a new flow. */
3733         if (mark_id != MLX5_DEFAULT_COPY_ID) {
3734                 items[0] = (struct rte_flow_item){
3735                         .type = (enum rte_flow_item_type)
3736                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
3737                         .spec = &tag_spec,
3738                 };
3739                 items[1] = (struct rte_flow_item){
3740                         .type = RTE_FLOW_ITEM_TYPE_END,
3741                 };
3742                 actions[0] = (struct rte_flow_action){
3743                         .type = (enum rte_flow_action_type)
3744                                 MLX5_RTE_FLOW_ACTION_TYPE_MARK,
3745                         .conf = &ftag,
3746                 };
3747                 actions[1] = (struct rte_flow_action){
3748                         .type = (enum rte_flow_action_type)
3749                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3750                         .conf = &cp_mreg,
3751                 };
3752                 actions[2] = (struct rte_flow_action){
3753                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
3754                         .conf = &jump,
3755                 };
3756                 actions[3] = (struct rte_flow_action){
3757                         .type = RTE_FLOW_ACTION_TYPE_END,
3758                 };
3759         } else {
3760                 /* Default rule, wildcard match. */
3761                 attr.priority = MLX5_FLOW_PRIO_RSVD;
3762                 items[0] = (struct rte_flow_item){
3763                         .type = RTE_FLOW_ITEM_TYPE_END,
3764                 };
3765                 actions[0] = (struct rte_flow_action){
3766                         .type = (enum rte_flow_action_type)
3767                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3768                         .conf = &cp_mreg,
3769                 };
3770                 actions[1] = (struct rte_flow_action){
3771                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
3772                         .conf = &jump,
3773                 };
3774                 actions[2] = (struct rte_flow_action){
3775                         .type = RTE_FLOW_ACTION_TYPE_END,
3776                 };
3777         }
3778         /* Build a new entry. */
3779         mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
3780         if (!mcp_res) {
3781                 rte_errno = ENOMEM;
3782                 return NULL;
3783         }
3784         mcp_res->idx = idx;
3785         /*
3786          * The copy Flows are not included in any list. There
3787          * ones are referenced from other Flows and can not
3788          * be applied, removed, deleted in ardbitrary order
3789          * by list traversing.
3790          */
3791         mcp_res->rix_flow = flow_list_create(dev, NULL, &attr, items,
3792                                          actions, false, error);
3793         if (!mcp_res->rix_flow) {
3794                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx);
3795                 return NULL;
3796         }
3797         return &mcp_res->hlist_ent;
3798 }
3799
3800 /**
3801  * Add a flow of copying flow metadata registers in RX_CP_TBL.
3802  *
3803  * As mark_id is unique, if there's already a registered flow for the mark_id,
3804  * return by increasing the reference counter of the resource. Otherwise, create
3805  * the resource (mcp_res) and flow.
3806  *
3807  * Flow looks like,
3808  *   - If ingress port is ANY and reg_c[1] is mark_id,
3809  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3810  *
3811  * For default flow (zero mark_id), flow is like,
3812  *   - If ingress port is ANY,
3813  *     reg_b := reg_c[0] and jump to RX_ACT_TBL.
3814  *
3815  * @param dev
3816  *   Pointer to Ethernet device.
3817  * @param mark_id
3818  *   ID of MARK action, zero means default flow for META.
3819  * @param[out] error
3820  *   Perform verbose error reporting if not NULL.
3821  *
3822  * @return
3823  *   Associated resource on success, NULL otherwise and rte_errno is set.
3824  */
3825 static struct mlx5_flow_mreg_copy_resource *
3826 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
3827                           struct rte_flow_error *error)
3828 {
3829         struct mlx5_priv *priv = dev->data->dev_private;
3830         struct mlx5_hlist_entry *entry;
3831         struct mlx5_flow_cb_ctx ctx = {
3832                 .dev = dev,
3833                 .error = error,
3834         };
3835
3836         /* Check if already registered. */
3837         MLX5_ASSERT(priv->mreg_cp_tbl);
3838         entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx);
3839         if (!entry)
3840                 return NULL;
3841         return container_of(entry, struct mlx5_flow_mreg_copy_resource,
3842                             hlist_ent);
3843 }
3844
3845 void
3846 flow_dv_mreg_remove_cb(struct mlx5_hlist *list, struct mlx5_hlist_entry *entry)
3847 {
3848         struct mlx5_flow_mreg_copy_resource *mcp_res =
3849                 container_of(entry, typeof(*mcp_res), hlist_ent);
3850         struct rte_eth_dev *dev = list->ctx;
3851         struct mlx5_priv *priv = dev->data->dev_private;
3852
3853         MLX5_ASSERT(mcp_res->rix_flow);
3854         flow_list_destroy(dev, NULL, mcp_res->rix_flow);
3855         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
3856 }
3857
3858 /**
3859  * Release flow in RX_CP_TBL.
3860  *
3861  * @param dev
3862  *   Pointer to Ethernet device.
3863  * @flow
3864  *   Parent flow for wich copying is provided.
3865  */
3866 static void
3867 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
3868                           struct rte_flow *flow)
3869 {
3870         struct mlx5_flow_mreg_copy_resource *mcp_res;
3871         struct mlx5_priv *priv = dev->data->dev_private;
3872
3873         if (!flow->rix_mreg_copy)
3874                 return;
3875         mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
3876                                  flow->rix_mreg_copy);
3877         if (!mcp_res || !priv->mreg_cp_tbl)
3878                 return;
3879         MLX5_ASSERT(mcp_res->rix_flow);
3880         mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
3881         flow->rix_mreg_copy = 0;
3882 }
3883
3884 /**
3885  * Remove the default copy action from RX_CP_TBL.
3886  *
3887  * This functions is called in the mlx5_dev_start(). No thread safe
3888  * is guaranteed.
3889  *
3890  * @param dev
3891  *   Pointer to Ethernet device.
3892  */
3893 static void
3894 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
3895 {
3896         struct mlx5_hlist_entry *entry;
3897         struct mlx5_priv *priv = dev->data->dev_private;
3898
3899         /* Check if default flow is registered. */
3900         if (!priv->mreg_cp_tbl)
3901                 return;
3902         entry = mlx5_hlist_lookup(priv->mreg_cp_tbl,
3903                                   MLX5_DEFAULT_COPY_ID, NULL);
3904         if (!entry)
3905                 return;
3906         mlx5_hlist_unregister(priv->mreg_cp_tbl, entry);
3907 }
3908
3909 /**
3910  * Add the default copy action in in RX_CP_TBL.
3911  *
3912  * This functions is called in the mlx5_dev_start(). No thread safe
3913  * is guaranteed.
3914  *
3915  * @param dev
3916  *   Pointer to Ethernet device.
3917  * @param[out] error
3918  *   Perform verbose error reporting if not NULL.
3919  *
3920  * @return
3921  *   0 for success, negative value otherwise and rte_errno is set.
3922  */
3923 static int
3924 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
3925                                   struct rte_flow_error *error)
3926 {
3927         struct mlx5_priv *priv = dev->data->dev_private;
3928         struct mlx5_flow_mreg_copy_resource *mcp_res;
3929
3930         /* Check whether extensive metadata feature is engaged. */
3931         if (!priv->config.dv_flow_en ||
3932             priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3933             !mlx5_flow_ext_mreg_supported(dev) ||
3934             !priv->sh->dv_regc0_mask)
3935                 return 0;
3936         /*
3937          * Add default mreg copy flow may be called multiple time, but
3938          * only be called once in stop. Avoid register it twice.
3939          */
3940         if (mlx5_hlist_lookup(priv->mreg_cp_tbl, MLX5_DEFAULT_COPY_ID, NULL))
3941                 return 0;
3942         mcp_res = flow_mreg_add_copy_action(dev, MLX5_DEFAULT_COPY_ID, error);
3943         if (!mcp_res)
3944                 return -rte_errno;
3945         return 0;
3946 }
3947
3948 /**
3949  * Add a flow of copying flow metadata registers in RX_CP_TBL.
3950  *
3951  * All the flow having Q/RSS action should be split by
3952  * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
3953  * performs the following,
3954  *   - CQE->flow_tag := reg_c[1] (MARK)
3955  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
3956  * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
3957  * but there should be a flow per each MARK ID set by MARK action.
3958  *
3959  * For the aforementioned reason, if there's a MARK action in flow's action
3960  * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
3961  * the MARK ID to CQE's flow_tag like,
3962  *   - If reg_c[1] is mark_id,
3963  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3964  *
3965  * For SET_META action which stores value in reg_c[0], as the destination is
3966  * also a flow metadata register (reg_b), adding a default flow is enough. Zero
3967  * MARK ID means the default flow. The default flow looks like,
3968  *   - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3969  *
3970  * @param dev
3971  *   Pointer to Ethernet device.
3972  * @param flow
3973  *   Pointer to flow structure.
3974  * @param[in] actions
3975  *   Pointer to the list of actions.
3976  * @param[out] error
3977  *   Perform verbose error reporting if not NULL.
3978  *
3979  * @return
3980  *   0 on success, negative value otherwise and rte_errno is set.
3981  */
3982 static int
3983 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
3984                             struct rte_flow *flow,
3985                             const struct rte_flow_action *actions,
3986                             struct rte_flow_error *error)
3987 {
3988         struct mlx5_priv *priv = dev->data->dev_private;
3989         struct mlx5_dev_config *config = &priv->config;
3990         struct mlx5_flow_mreg_copy_resource *mcp_res;
3991         const struct rte_flow_action_mark *mark;
3992
3993         /* Check whether extensive metadata feature is engaged. */
3994         if (!config->dv_flow_en ||
3995             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3996             !mlx5_flow_ext_mreg_supported(dev) ||
3997             !priv->sh->dv_regc0_mask)
3998                 return 0;
3999         /* Find MARK action. */
4000         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4001                 switch (actions->type) {
4002                 case RTE_FLOW_ACTION_TYPE_FLAG:
4003                         mcp_res = flow_mreg_add_copy_action
4004                                 (dev, MLX5_FLOW_MARK_DEFAULT, error);
4005                         if (!mcp_res)
4006                                 return -rte_errno;
4007                         flow->rix_mreg_copy = mcp_res->idx;
4008                         return 0;
4009                 case RTE_FLOW_ACTION_TYPE_MARK:
4010                         mark = (const struct rte_flow_action_mark *)
4011                                 actions->conf;
4012                         mcp_res =
4013                                 flow_mreg_add_copy_action(dev, mark->id, error);
4014                         if (!mcp_res)
4015                                 return -rte_errno;
4016                         flow->rix_mreg_copy = mcp_res->idx;
4017                         return 0;
4018                 default:
4019                         break;
4020                 }
4021         }
4022         return 0;
4023 }
4024
4025 #define MLX5_MAX_SPLIT_ACTIONS 24
4026 #define MLX5_MAX_SPLIT_ITEMS 24
4027
4028 /**
4029  * Split the hairpin flow.
4030  * Since HW can't support encap and push-vlan on Rx, we move these
4031  * actions to Tx.
4032  * If the count action is after the encap then we also
4033  * move the count action. in this case the count will also measure
4034  * the outer bytes.
4035  *
4036  * @param dev
4037  *   Pointer to Ethernet device.
4038  * @param[in] actions
4039  *   Associated actions (list terminated by the END action).
4040  * @param[out] actions_rx
4041  *   Rx flow actions.
4042  * @param[out] actions_tx
4043  *   Tx flow actions..
4044  * @param[out] pattern_tx
4045  *   The pattern items for the Tx flow.
4046  * @param[out] flow_id
4047  *   The flow ID connected to this flow.
4048  *
4049  * @return
4050  *   0 on success.
4051  */
4052 static int
4053 flow_hairpin_split(struct rte_eth_dev *dev,
4054                    const struct rte_flow_action actions[],
4055                    struct rte_flow_action actions_rx[],
4056                    struct rte_flow_action actions_tx[],
4057                    struct rte_flow_item pattern_tx[],
4058                    uint32_t flow_id)
4059 {
4060         const struct rte_flow_action_raw_encap *raw_encap;
4061         const struct rte_flow_action_raw_decap *raw_decap;
4062         struct mlx5_rte_flow_action_set_tag *set_tag;
4063         struct rte_flow_action *tag_action;
4064         struct mlx5_rte_flow_item_tag *tag_item;
4065         struct rte_flow_item *item;
4066         char *addr;
4067         int encap = 0;
4068
4069         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4070                 switch (actions->type) {
4071                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4072                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4073                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4074                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4075                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4076                         rte_memcpy(actions_tx, actions,
4077                                sizeof(struct rte_flow_action));
4078                         actions_tx++;
4079                         break;
4080                 case RTE_FLOW_ACTION_TYPE_COUNT:
4081                         if (encap) {
4082                                 rte_memcpy(actions_tx, actions,
4083                                            sizeof(struct rte_flow_action));
4084                                 actions_tx++;
4085                         } else {
4086                                 rte_memcpy(actions_rx, actions,
4087                                            sizeof(struct rte_flow_action));
4088                                 actions_rx++;
4089                         }
4090                         break;
4091                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4092                         raw_encap = actions->conf;
4093                         if (raw_encap->size >
4094                             (sizeof(struct rte_flow_item_eth) +
4095                              sizeof(struct rte_flow_item_ipv4))) {
4096                                 memcpy(actions_tx, actions,
4097                                        sizeof(struct rte_flow_action));
4098                                 actions_tx++;
4099                                 encap = 1;
4100                         } else {
4101                                 rte_memcpy(actions_rx, actions,
4102                                            sizeof(struct rte_flow_action));
4103                                 actions_rx++;
4104                         }
4105                         break;
4106                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4107                         raw_decap = actions->conf;
4108                         if (raw_decap->size <
4109                             (sizeof(struct rte_flow_item_eth) +
4110                              sizeof(struct rte_flow_item_ipv4))) {
4111                                 memcpy(actions_tx, actions,
4112                                        sizeof(struct rte_flow_action));
4113                                 actions_tx++;
4114                         } else {
4115                                 rte_memcpy(actions_rx, actions,
4116                                            sizeof(struct rte_flow_action));
4117                                 actions_rx++;
4118                         }
4119                         break;
4120                 default:
4121                         rte_memcpy(actions_rx, actions,
4122                                    sizeof(struct rte_flow_action));
4123                         actions_rx++;
4124                         break;
4125                 }
4126         }
4127         /* Add set meta action and end action for the Rx flow. */
4128         tag_action = actions_rx;
4129         tag_action->type = (enum rte_flow_action_type)
4130                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4131         actions_rx++;
4132         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
4133         actions_rx++;
4134         set_tag = (void *)actions_rx;
4135         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL);
4136         MLX5_ASSERT(set_tag->id > REG_NON);
4137         set_tag->data = flow_id;
4138         tag_action->conf = set_tag;
4139         /* Create Tx item list. */
4140         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
4141         addr = (void *)&pattern_tx[2];
4142         item = pattern_tx;
4143         item->type = (enum rte_flow_item_type)
4144                      MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4145         tag_item = (void *)addr;
4146         tag_item->data = flow_id;
4147         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
4148         MLX5_ASSERT(set_tag->id > REG_NON);
4149         item->spec = tag_item;
4150         addr += sizeof(struct mlx5_rte_flow_item_tag);
4151         tag_item = (void *)addr;
4152         tag_item->data = UINT32_MAX;
4153         tag_item->id = UINT16_MAX;
4154         item->mask = tag_item;
4155         item->last = NULL;
4156         item++;
4157         item->type = RTE_FLOW_ITEM_TYPE_END;
4158         return 0;
4159 }
4160
4161 __extension__
4162 union tunnel_offload_mark {
4163         uint32_t val;
4164         struct {
4165                 uint32_t app_reserve:8;
4166                 uint32_t table_id:15;
4167                 uint32_t transfer:1;
4168                 uint32_t _unused_:8;
4169         };
4170 };
4171
4172 struct tunnel_default_miss_ctx {
4173         uint16_t *queue;
4174         __extension__
4175         union {
4176                 struct rte_flow_action_rss action_rss;
4177                 struct rte_flow_action_queue miss_queue;
4178                 struct rte_flow_action_jump miss_jump;
4179                 uint8_t raw[0];
4180         };
4181 };
4182
4183 static int
4184 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
4185                              struct rte_flow *flow,
4186                              const struct rte_flow_attr *attr,
4187                              const struct rte_flow_action *app_actions,
4188                              uint32_t flow_idx,
4189                              struct tunnel_default_miss_ctx *ctx,
4190                              struct rte_flow_error *error)
4191 {
4192         struct mlx5_priv *priv = dev->data->dev_private;
4193         struct mlx5_flow *dev_flow;
4194         struct rte_flow_attr miss_attr = *attr;
4195         const struct mlx5_flow_tunnel *tunnel = app_actions[0].conf;
4196         const struct rte_flow_item miss_items[2] = {
4197                 {
4198                         .type = RTE_FLOW_ITEM_TYPE_ETH,
4199                         .spec = NULL,
4200                         .last = NULL,
4201                         .mask = NULL
4202                 },
4203                 {
4204                         .type = RTE_FLOW_ITEM_TYPE_END,
4205                         .spec = NULL,
4206                         .last = NULL,
4207                         .mask = NULL
4208                 }
4209         };
4210         union tunnel_offload_mark mark_id;
4211         struct rte_flow_action_mark miss_mark;
4212         struct rte_flow_action miss_actions[3] = {
4213                 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark },
4214                 [2] = { .type = RTE_FLOW_ACTION_TYPE_END,  .conf = NULL }
4215         };
4216         const struct rte_flow_action_jump *jump_data;
4217         uint32_t i, flow_table = 0; /* prevent compilation warning */
4218         struct flow_grp_info grp_info = {
4219                 .external = 1,
4220                 .transfer = attr->transfer,
4221                 .fdb_def_rule = !!priv->fdb_def_rule,
4222                 .std_tbl_fix = 0,
4223         };
4224         int ret;
4225
4226         if (!attr->transfer) {
4227                 uint32_t q_size;
4228
4229                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS;
4230                 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]);
4231                 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size,
4232                                          0, SOCKET_ID_ANY);
4233                 if (!ctx->queue)
4234                         return rte_flow_error_set
4235                                 (error, ENOMEM,
4236                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4237                                 NULL, "invalid default miss RSS");
4238                 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT,
4239                 ctx->action_rss.level = 0,
4240                 ctx->action_rss.types = priv->rss_conf.rss_hf,
4241                 ctx->action_rss.key_len = priv->rss_conf.rss_key_len,
4242                 ctx->action_rss.queue_num = priv->reta_idx_n,
4243                 ctx->action_rss.key = priv->rss_conf.rss_key,
4244                 ctx->action_rss.queue = ctx->queue;
4245                 if (!priv->reta_idx_n || !priv->rxqs_n)
4246                         return rte_flow_error_set
4247                                 (error, EINVAL,
4248                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4249                                 NULL, "invalid port configuration");
4250                 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
4251                         ctx->action_rss.types = 0;
4252                 for (i = 0; i != priv->reta_idx_n; ++i)
4253                         ctx->queue[i] = (*priv->reta_idx)[i];
4254         } else {
4255                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP;
4256                 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP;
4257         }
4258         miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw;
4259         for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++);
4260         jump_data = app_actions->conf;
4261         miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY;
4262         miss_attr.group = jump_data->group;
4263         ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group,
4264                                        &flow_table, grp_info, error);
4265         if (ret)
4266                 return rte_flow_error_set(error, EINVAL,
4267                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4268                                           NULL, "invalid tunnel id");
4269         mark_id.app_reserve = 0;
4270         mark_id.table_id = tunnel_flow_tbl_to_id(flow_table);
4271         mark_id.transfer = !!attr->transfer;
4272         mark_id._unused_ = 0;
4273         miss_mark.id = mark_id.val;
4274         dev_flow = flow_drv_prepare(dev, flow, &miss_attr,
4275                                     miss_items, miss_actions, flow_idx, error);
4276         if (!dev_flow)
4277                 return -rte_errno;
4278         dev_flow->flow = flow;
4279         dev_flow->external = true;
4280         dev_flow->tunnel = tunnel;
4281         /* Subflow object was created, we must include one in the list. */
4282         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4283                       dev_flow->handle, next);
4284         DRV_LOG(DEBUG,
4285                 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u",
4286                 dev->data->port_id, tunnel->app_tunnel.type,
4287                 tunnel->tunnel_id, miss_attr.priority, miss_attr.group);
4288         ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items,
4289                                   miss_actions, error);
4290         if (!ret)
4291                 ret = flow_mreg_update_copy_table(dev, flow, miss_actions,
4292                                                   error);
4293
4294         return ret;
4295 }
4296
4297 /**
4298  * The last stage of splitting chain, just creates the subflow
4299  * without any modification.
4300  *
4301  * @param[in] dev
4302  *   Pointer to Ethernet device.
4303  * @param[in] flow
4304  *   Parent flow structure pointer.
4305  * @param[in, out] sub_flow
4306  *   Pointer to return the created subflow, may be NULL.
4307  * @param[in] prefix_layers
4308  *   Prefix subflow layers, may be 0.
4309  * @param[in] prefix_mark
4310  *   Prefix subflow mark flag, may be 0.
4311  * @param[in] attr
4312  *   Flow rule attributes.
4313  * @param[in] items
4314  *   Pattern specification (list terminated by the END pattern item).
4315  * @param[in] actions
4316  *   Associated actions (list terminated by the END action).
4317  * @param[in] external
4318  *   This flow rule is created by request external to PMD.
4319  * @param[in] flow_idx
4320  *   This memory pool index to the flow.
4321  * @param[out] error
4322  *   Perform verbose error reporting if not NULL.
4323  * @return
4324  *   0 on success, negative value otherwise
4325  */
4326 static int
4327 flow_create_split_inner(struct rte_eth_dev *dev,
4328                         struct rte_flow *flow,
4329                         struct mlx5_flow **sub_flow,
4330                         uint64_t prefix_layers,
4331                         uint32_t prefix_mark,
4332                         const struct rte_flow_attr *attr,
4333                         const struct rte_flow_item items[],
4334                         const struct rte_flow_action actions[],
4335                         bool external, uint32_t flow_idx,
4336                         struct rte_flow_error *error)
4337 {
4338         struct mlx5_flow *dev_flow;
4339
4340         dev_flow = flow_drv_prepare(dev, flow, attr, items, actions,
4341                 flow_idx, error);
4342         if (!dev_flow)
4343                 return -rte_errno;
4344         dev_flow->flow = flow;
4345         dev_flow->external = external;
4346         /* Subflow object was created, we must include one in the list. */
4347         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4348                       dev_flow->handle, next);
4349         /*
4350          * If dev_flow is as one of the suffix flow, some actions in suffix
4351          * flow may need some user defined item layer flags, and pass the
4352          * Metadate rxq mark flag to suffix flow as well.
4353          */
4354         if (prefix_layers)
4355                 dev_flow->handle->layers = prefix_layers;
4356         if (prefix_mark)
4357                 dev_flow->handle->mark = 1;
4358         if (sub_flow)
4359                 *sub_flow = dev_flow;
4360         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
4361 }
4362
4363 /**
4364  * Split the meter flow.
4365  *
4366  * As meter flow will split to three sub flow, other than meter
4367  * action, the other actions make sense to only meter accepts
4368  * the packet. If it need to be dropped, no other additional
4369  * actions should be take.
4370  *
4371  * One kind of special action which decapsulates the L3 tunnel
4372  * header will be in the prefix sub flow, as not to take the
4373  * L3 tunnel header into account.
4374  *
4375  * @param dev
4376  *   Pointer to Ethernet device.
4377  * @param[in] items
4378  *   Pattern specification (list terminated by the END pattern item).
4379  * @param[out] sfx_items
4380  *   Suffix flow match items (list terminated by the END pattern item).
4381  * @param[in] actions
4382  *   Associated actions (list terminated by the END action).
4383  * @param[out] actions_sfx
4384  *   Suffix flow actions.
4385  * @param[out] actions_pre
4386  *   Prefix flow actions.
4387  * @param[out] pattern_sfx
4388  *   The pattern items for the suffix flow.
4389  * @param[out] tag_sfx
4390  *   Pointer to suffix flow tag.
4391  *
4392  * @return
4393  *   0 on success.
4394  */
4395 static int
4396 flow_meter_split_prep(struct rte_eth_dev *dev,
4397                  const struct rte_flow_item items[],
4398                  struct rte_flow_item sfx_items[],
4399                  const struct rte_flow_action actions[],
4400                  struct rte_flow_action actions_sfx[],
4401                  struct rte_flow_action actions_pre[])
4402 {
4403         struct mlx5_priv *priv = dev->data->dev_private;
4404         struct rte_flow_action *tag_action = NULL;
4405         struct rte_flow_item *tag_item;
4406         struct mlx5_rte_flow_action_set_tag *set_tag;
4407         struct rte_flow_error error;
4408         const struct rte_flow_action_raw_encap *raw_encap;
4409         const struct rte_flow_action_raw_decap *raw_decap;
4410         struct mlx5_rte_flow_item_tag *tag_spec;
4411         struct mlx5_rte_flow_item_tag *tag_mask;
4412         uint32_t tag_id = 0;
4413         bool copy_vlan = false;
4414
4415         /* Prepare the actions for prefix and suffix flow. */
4416         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4417                 struct rte_flow_action **action_cur = NULL;
4418
4419                 switch (actions->type) {
4420                 case RTE_FLOW_ACTION_TYPE_METER:
4421                         /* Add the extra tag action first. */
4422                         tag_action = actions_pre;
4423                         tag_action->type = (enum rte_flow_action_type)
4424                                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4425                         actions_pre++;
4426                         action_cur = &actions_pre;
4427                         break;
4428                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4429                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4430                         action_cur = &actions_pre;
4431                         break;
4432                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4433                         raw_encap = actions->conf;
4434                         if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
4435                                 action_cur = &actions_pre;
4436                         break;
4437                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4438                         raw_decap = actions->conf;
4439                         if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4440                                 action_cur = &actions_pre;
4441                         break;
4442                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4443                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4444                         copy_vlan = true;
4445                         break;
4446                 default:
4447                         break;
4448                 }
4449                 if (!action_cur)
4450                         action_cur = &actions_sfx;
4451                 memcpy(*action_cur, actions, sizeof(struct rte_flow_action));
4452                 (*action_cur)++;
4453         }
4454         /* Add end action to the actions. */
4455         actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
4456         actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
4457         actions_pre++;
4458         /* Set the tag. */
4459         set_tag = (void *)actions_pre;
4460         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
4461         mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
4462                           &tag_id);
4463         if (tag_id >= (1 << (sizeof(tag_id) * 8 - MLX5_MTR_COLOR_BITS))) {
4464                 DRV_LOG(ERR, "Port %u meter flow id exceed max limit.",
4465                         dev->data->port_id);
4466                 mlx5_ipool_free(priv->sh->ipool
4467                                 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], tag_id);
4468                 return 0;
4469         } else if (!tag_id) {
4470                 return 0;
4471         }
4472         set_tag->data = tag_id << MLX5_MTR_COLOR_BITS;
4473         assert(tag_action);
4474         tag_action->conf = set_tag;
4475         /* Prepare the suffix subflow items. */
4476         tag_item = sfx_items++;
4477         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4478                 int item_type = items->type;
4479
4480                 switch (item_type) {
4481                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4482                         memcpy(sfx_items, items, sizeof(*sfx_items));
4483                         sfx_items++;
4484                         break;
4485                 case RTE_FLOW_ITEM_TYPE_VLAN:
4486                         if (copy_vlan) {
4487                                 memcpy(sfx_items, items, sizeof(*sfx_items));
4488                                 /*
4489                                  * Convert to internal match item, it is used
4490                                  * for vlan push and set vid.
4491                                  */
4492                                 sfx_items->type = (enum rte_flow_item_type)
4493                                                   MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
4494                                 sfx_items++;
4495                         }
4496                         break;
4497                 default:
4498                         break;
4499                 }
4500         }
4501         sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
4502         sfx_items++;
4503         tag_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
4504         tag_spec->data = tag_id << MLX5_MTR_COLOR_BITS;
4505         tag_spec->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
4506         tag_mask = tag_spec + 1;
4507         tag_mask->data = 0xffffff00;
4508         tag_item->type = (enum rte_flow_item_type)
4509                          MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4510         tag_item->spec = tag_spec;
4511         tag_item->last = NULL;
4512         tag_item->mask = tag_mask;
4513         return tag_id;
4514 }
4515
4516 /**
4517  * Split action list having QUEUE/RSS for metadata register copy.
4518  *
4519  * Once Q/RSS action is detected in user's action list, the flow action
4520  * should be split in order to copy metadata registers, which will happen in
4521  * RX_CP_TBL like,
4522  *   - CQE->flow_tag := reg_c[1] (MARK)
4523  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4524  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
4525  * This is because the last action of each flow must be a terminal action
4526  * (QUEUE, RSS or DROP).
4527  *
4528  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
4529  * stored and kept in the mlx5_flow structure per each sub_flow.
4530  *
4531  * The Q/RSS action is replaced with,
4532  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
4533  * And the following JUMP action is added at the end,
4534  *   - JUMP, to RX_CP_TBL.
4535  *
4536  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
4537  * flow_create_split_metadata() routine. The flow will look like,
4538  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
4539  *
4540  * @param dev
4541  *   Pointer to Ethernet device.
4542  * @param[out] split_actions
4543  *   Pointer to store split actions to jump to CP_TBL.
4544  * @param[in] actions
4545  *   Pointer to the list of original flow actions.
4546  * @param[in] qrss
4547  *   Pointer to the Q/RSS action.
4548  * @param[in] actions_n
4549  *   Number of original actions.
4550  * @param[out] error
4551  *   Perform verbose error reporting if not NULL.
4552  *
4553  * @return
4554  *   non-zero unique flow_id on success, otherwise 0 and
4555  *   error/rte_error are set.
4556  */
4557 static uint32_t
4558 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
4559                           struct rte_flow_action *split_actions,
4560                           const struct rte_flow_action *actions,
4561                           const struct rte_flow_action *qrss,
4562                           int actions_n, struct rte_flow_error *error)
4563 {
4564         struct mlx5_priv *priv = dev->data->dev_private;
4565         struct mlx5_rte_flow_action_set_tag *set_tag;
4566         struct rte_flow_action_jump *jump;
4567         const int qrss_idx = qrss - actions;
4568         uint32_t flow_id = 0;
4569         int ret = 0;
4570
4571         /*
4572          * Given actions will be split
4573          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
4574          * - Add jump to mreg CP_TBL.
4575          * As a result, there will be one more action.
4576          */
4577         ++actions_n;
4578         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
4579         set_tag = (void *)(split_actions + actions_n);
4580         /*
4581          * If tag action is not set to void(it means we are not the meter
4582          * suffix flow), add the tag action. Since meter suffix flow already
4583          * has the tag added.
4584          */
4585         if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) {
4586                 /*
4587                  * Allocate the new subflow ID. This one is unique within
4588                  * device and not shared with representors. Otherwise,
4589                  * we would have to resolve multi-thread access synch
4590                  * issue. Each flow on the shared device is appended
4591                  * with source vport identifier, so the resulting
4592                  * flows will be unique in the shared (by master and
4593                  * representors) domain even if they have coinciding
4594                  * IDs.
4595                  */
4596                 mlx5_ipool_malloc(priv->sh->ipool
4597                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id);
4598                 if (!flow_id)
4599                         return rte_flow_error_set(error, ENOMEM,
4600                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4601                                                   NULL, "can't allocate id "
4602                                                   "for split Q/RSS subflow");
4603                 /* Internal SET_TAG action to set flow ID. */
4604                 *set_tag = (struct mlx5_rte_flow_action_set_tag){
4605                         .data = flow_id,
4606                 };
4607                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
4608                 if (ret < 0)
4609                         return ret;
4610                 set_tag->id = ret;
4611                 /* Construct new actions array. */
4612                 /* Replace QUEUE/RSS action. */
4613                 split_actions[qrss_idx] = (struct rte_flow_action){
4614                         .type = (enum rte_flow_action_type)
4615                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
4616                         .conf = set_tag,
4617                 };
4618         }
4619         /* JUMP action to jump to mreg copy table (CP_TBL). */
4620         jump = (void *)(set_tag + 1);
4621         *jump = (struct rte_flow_action_jump){
4622                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
4623         };
4624         split_actions[actions_n - 2] = (struct rte_flow_action){
4625                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
4626                 .conf = jump,
4627         };
4628         split_actions[actions_n - 1] = (struct rte_flow_action){
4629                 .type = RTE_FLOW_ACTION_TYPE_END,
4630         };
4631         return flow_id;
4632 }
4633
4634 /**
4635  * Extend the given action list for Tx metadata copy.
4636  *
4637  * Copy the given action list to the ext_actions and add flow metadata register
4638  * copy action in order to copy reg_a set by WQE to reg_c[0].
4639  *
4640  * @param[out] ext_actions
4641  *   Pointer to the extended action list.
4642  * @param[in] actions
4643  *   Pointer to the list of actions.
4644  * @param[in] actions_n
4645  *   Number of actions in the list.
4646  * @param[out] error
4647  *   Perform verbose error reporting if not NULL.
4648  * @param[in] encap_idx
4649  *   The encap action inndex.
4650  *
4651  * @return
4652  *   0 on success, negative value otherwise
4653  */
4654 static int
4655 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
4656                        struct rte_flow_action *ext_actions,
4657                        const struct rte_flow_action *actions,
4658                        int actions_n, struct rte_flow_error *error,
4659                        int encap_idx)
4660 {
4661         struct mlx5_flow_action_copy_mreg *cp_mreg =
4662                 (struct mlx5_flow_action_copy_mreg *)
4663                         (ext_actions + actions_n + 1);
4664         int ret;
4665
4666         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
4667         if (ret < 0)
4668                 return ret;
4669         cp_mreg->dst = ret;
4670         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
4671         if (ret < 0)
4672                 return ret;
4673         cp_mreg->src = ret;
4674         if (encap_idx != 0)
4675                 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
4676         if (encap_idx == actions_n - 1) {
4677                 ext_actions[actions_n - 1] = (struct rte_flow_action){
4678                         .type = (enum rte_flow_action_type)
4679                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4680                         .conf = cp_mreg,
4681                 };
4682                 ext_actions[actions_n] = (struct rte_flow_action){
4683                         .type = RTE_FLOW_ACTION_TYPE_END,
4684                 };
4685         } else {
4686                 ext_actions[encap_idx] = (struct rte_flow_action){
4687                         .type = (enum rte_flow_action_type)
4688                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4689                         .conf = cp_mreg,
4690                 };
4691                 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
4692                                 sizeof(*ext_actions) * (actions_n - encap_idx));
4693         }
4694         return 0;
4695 }
4696
4697 /**
4698  * Check the match action from the action list.
4699  *
4700  * @param[in] actions
4701  *   Pointer to the list of actions.
4702  * @param[in] attr
4703  *   Flow rule attributes.
4704  * @param[in] action
4705  *   The action to be check if exist.
4706  * @param[out] match_action_pos
4707  *   Pointer to the position of the matched action if exists, otherwise is -1.
4708  * @param[out] qrss_action_pos
4709  *   Pointer to the position of the Queue/RSS action if exists, otherwise is -1.
4710  *
4711  * @return
4712  *   > 0 the total number of actions.
4713  *   0 if not found match action in action list.
4714  */
4715 static int
4716 flow_check_match_action(const struct rte_flow_action actions[],
4717                         const struct rte_flow_attr *attr,
4718                         enum rte_flow_action_type action,
4719                         int *match_action_pos, int *qrss_action_pos)
4720 {
4721         const struct rte_flow_action_sample *sample;
4722         int actions_n = 0;
4723         int jump_flag = 0;
4724         uint32_t ratio = 0;
4725         int sub_type = 0;
4726         int flag = 0;
4727
4728         *match_action_pos = -1;
4729         *qrss_action_pos = -1;
4730         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4731                 if (actions->type == action) {
4732                         flag = 1;
4733                         *match_action_pos = actions_n;
4734                 }
4735                 if (actions->type == RTE_FLOW_ACTION_TYPE_QUEUE ||
4736                     actions->type == RTE_FLOW_ACTION_TYPE_RSS)
4737                         *qrss_action_pos = actions_n;
4738                 if (actions->type == RTE_FLOW_ACTION_TYPE_JUMP)
4739                         jump_flag = 1;
4740                 if (actions->type == RTE_FLOW_ACTION_TYPE_SAMPLE) {
4741                         sample = actions->conf;
4742                         ratio = sample->ratio;
4743                         sub_type = ((const struct rte_flow_action *)
4744                                         (sample->actions))->type;
4745                 }
4746                 actions_n++;
4747         }
4748         if (flag && action == RTE_FLOW_ACTION_TYPE_SAMPLE && attr->transfer) {
4749                 if (ratio == 1) {
4750                         /* JUMP Action not support for Mirroring;
4751                          * Mirroring support multi-destination;
4752                          */
4753                         if (!jump_flag && sub_type != RTE_FLOW_ACTION_TYPE_END)
4754                                 flag = 0;
4755                 }
4756         }
4757         /* Count RTE_FLOW_ACTION_TYPE_END. */
4758         return flag ? actions_n + 1 : 0;
4759 }
4760
4761 #define SAMPLE_SUFFIX_ITEM 2
4762
4763 /**
4764  * Split the sample flow.
4765  *
4766  * As sample flow will split to two sub flow, sample flow with
4767  * sample action, the other actions will move to new suffix flow.
4768  *
4769  * Also add unique tag id with tag action in the sample flow,
4770  * the same tag id will be as match in the suffix flow.
4771  *
4772  * @param dev
4773  *   Pointer to Ethernet device.
4774  * @param[in] fdb_tx
4775  *   FDB egress flow flag.
4776  * @param[out] sfx_items
4777  *   Suffix flow match items (list terminated by the END pattern item).
4778  * @param[in] actions
4779  *   Associated actions (list terminated by the END action).
4780  * @param[out] actions_sfx
4781  *   Suffix flow actions.
4782  * @param[out] actions_pre
4783  *   Prefix flow actions.
4784  * @param[in] actions_n
4785  *  The total number of actions.
4786  * @param[in] sample_action_pos
4787  *   The sample action position.
4788  * @param[in] qrss_action_pos
4789  *   The Queue/RSS action position.
4790  * @param[out] error
4791  *   Perform verbose error reporting if not NULL.
4792  *
4793  * @return
4794  *   0 on success, or unique flow_id, a negative errno value
4795  *   otherwise and rte_errno is set.
4796  */
4797 static int
4798 flow_sample_split_prep(struct rte_eth_dev *dev,
4799                        uint32_t fdb_tx,
4800                        struct rte_flow_item sfx_items[],
4801                        const struct rte_flow_action actions[],
4802                        struct rte_flow_action actions_sfx[],
4803                        struct rte_flow_action actions_pre[],
4804                        int actions_n,
4805                        int sample_action_pos,
4806                        int qrss_action_pos,
4807                        struct rte_flow_error *error)
4808 {
4809         struct mlx5_priv *priv = dev->data->dev_private;
4810         struct mlx5_rte_flow_action_set_tag *set_tag;
4811         struct mlx5_rte_flow_item_tag *tag_spec;
4812         struct mlx5_rte_flow_item_tag *tag_mask;
4813         uint32_t tag_id = 0;
4814         int index;
4815         int ret;
4816
4817         if (sample_action_pos < 0)
4818                 return rte_flow_error_set(error, EINVAL,
4819                                           RTE_FLOW_ERROR_TYPE_ACTION,
4820                                           NULL, "invalid position of sample "
4821                                           "action in list");
4822         if (!fdb_tx) {
4823                 /* Prepare the prefix tag action. */
4824                 set_tag = (void *)(actions_pre + actions_n + 1);
4825                 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error);
4826                 if (ret < 0)
4827                         return ret;
4828                 set_tag->id = ret;
4829                 mlx5_ipool_malloc(priv->sh->ipool
4830                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id);
4831                 set_tag->data = tag_id;
4832                 /* Prepare the suffix subflow items. */
4833                 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM);
4834                 tag_spec->data = tag_id;
4835                 tag_spec->id = set_tag->id;
4836                 tag_mask = tag_spec + 1;
4837                 tag_mask->data = UINT32_MAX;
4838                 sfx_items[0] = (struct rte_flow_item){
4839                         .type = (enum rte_flow_item_type)
4840                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
4841                         .spec = tag_spec,
4842                         .last = NULL,
4843                         .mask = tag_mask,
4844                 };
4845                 sfx_items[1] = (struct rte_flow_item){
4846                         .type = (enum rte_flow_item_type)
4847                                 RTE_FLOW_ITEM_TYPE_END,
4848                 };
4849         }
4850         /* Prepare the actions for prefix and suffix flow. */
4851         if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) {
4852                 index = qrss_action_pos;
4853                 /* Put the preceding the Queue/RSS action into prefix flow. */
4854                 if (index != 0)
4855                         memcpy(actions_pre, actions,
4856                                sizeof(struct rte_flow_action) * index);
4857                 /* Put others preceding the sample action into prefix flow. */
4858                 if (sample_action_pos > index + 1)
4859                         memcpy(actions_pre + index, actions + index + 1,
4860                                sizeof(struct rte_flow_action) *
4861                                (sample_action_pos - index - 1));
4862                 index = sample_action_pos - 1;
4863                 /* Put Queue/RSS action into Suffix flow. */
4864                 memcpy(actions_sfx, actions + qrss_action_pos,
4865                        sizeof(struct rte_flow_action));
4866                 actions_sfx++;
4867         } else {
4868                 index = sample_action_pos;
4869                 if (index != 0)
4870                         memcpy(actions_pre, actions,
4871                                sizeof(struct rte_flow_action) * index);
4872         }
4873         /* Add the extra tag action for NIC-RX and E-Switch ingress. */
4874         if (!fdb_tx) {
4875                 actions_pre[index++] =
4876                         (struct rte_flow_action){
4877                         .type = (enum rte_flow_action_type)
4878                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
4879                         .conf = set_tag,
4880                 };
4881         }
4882         memcpy(actions_pre + index, actions + sample_action_pos,
4883                sizeof(struct rte_flow_action));
4884         index += 1;
4885         actions_pre[index] = (struct rte_flow_action){
4886                 .type = (enum rte_flow_action_type)
4887                         RTE_FLOW_ACTION_TYPE_END,
4888         };
4889         /* Put the actions after sample into Suffix flow. */
4890         memcpy(actions_sfx, actions + sample_action_pos + 1,
4891                sizeof(struct rte_flow_action) *
4892                (actions_n - sample_action_pos - 1));
4893         return tag_id;
4894 }
4895
4896 /**
4897  * The splitting for metadata feature.
4898  *
4899  * - Q/RSS action on NIC Rx should be split in order to pass by
4900  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
4901  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
4902  *
4903  * - All the actions on NIC Tx should have a mreg copy action to
4904  *   copy reg_a from WQE to reg_c[0].
4905  *
4906  * @param dev
4907  *   Pointer to Ethernet device.
4908  * @param[in] flow
4909  *   Parent flow structure pointer.
4910  * @param[in] prefix_layers
4911  *   Prefix flow layer flags.
4912  * @param[in] prefix_mark
4913  *   Prefix subflow mark flag, may be 0.
4914  * @param[in] attr
4915  *   Flow rule attributes.
4916  * @param[in] items
4917  *   Pattern specification (list terminated by the END pattern item).
4918  * @param[in] actions
4919  *   Associated actions (list terminated by the END action).
4920  * @param[in] external
4921  *   This flow rule is created by request external to PMD.
4922  * @param[in] flow_idx
4923  *   This memory pool index to the flow.
4924  * @param[out] error
4925  *   Perform verbose error reporting if not NULL.
4926  * @return
4927  *   0 on success, negative value otherwise
4928  */
4929 static int
4930 flow_create_split_metadata(struct rte_eth_dev *dev,
4931                            struct rte_flow *flow,
4932                            uint64_t prefix_layers,
4933                            uint32_t prefix_mark,
4934                            const struct rte_flow_attr *attr,
4935                            const struct rte_flow_item items[],
4936                            const struct rte_flow_action actions[],
4937                            bool external, uint32_t flow_idx,
4938                            struct rte_flow_error *error)
4939 {
4940         struct mlx5_priv *priv = dev->data->dev_private;
4941         struct mlx5_dev_config *config = &priv->config;
4942         const struct rte_flow_action *qrss = NULL;
4943         struct rte_flow_action *ext_actions = NULL;
4944         struct mlx5_flow *dev_flow = NULL;
4945         uint32_t qrss_id = 0;
4946         int mtr_sfx = 0;
4947         size_t act_size;
4948         int actions_n;
4949         int encap_idx;
4950         int ret;
4951
4952         /* Check whether extensive metadata feature is engaged. */
4953         if (!config->dv_flow_en ||
4954             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4955             !mlx5_flow_ext_mreg_supported(dev))
4956                 return flow_create_split_inner(dev, flow, NULL, prefix_layers,
4957                                                prefix_mark, attr, items,
4958                                                actions, external, flow_idx,
4959                                                error);
4960         actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
4961                                                            &encap_idx);
4962         if (qrss) {
4963                 /* Exclude hairpin flows from splitting. */
4964                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
4965                         const struct rte_flow_action_queue *queue;
4966
4967                         queue = qrss->conf;
4968                         if (mlx5_rxq_get_type(dev, queue->index) ==
4969                             MLX5_RXQ_TYPE_HAIRPIN)
4970                                 qrss = NULL;
4971                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
4972                         const struct rte_flow_action_rss *rss;
4973
4974                         rss = qrss->conf;
4975                         if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
4976                             MLX5_RXQ_TYPE_HAIRPIN)
4977                                 qrss = NULL;
4978                 }
4979         }
4980         if (qrss) {
4981                 /* Check if it is in meter suffix table. */
4982                 mtr_sfx = attr->group == (attr->transfer ?
4983                           (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
4984                           MLX5_FLOW_TABLE_LEVEL_SUFFIX);
4985                 /*
4986                  * Q/RSS action on NIC Rx should be split in order to pass by
4987                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
4988                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
4989                  */
4990                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
4991                            sizeof(struct rte_flow_action_set_tag) +
4992                            sizeof(struct rte_flow_action_jump);
4993                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
4994                                           SOCKET_ID_ANY);
4995                 if (!ext_actions)
4996                         return rte_flow_error_set(error, ENOMEM,
4997                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4998                                                   NULL, "no memory to split "
4999                                                   "metadata flow");
5000                 /*
5001                  * If we are the suffix flow of meter, tag already exist.
5002                  * Set the tag action to void.
5003                  */
5004                 if (mtr_sfx)
5005                         ext_actions[qrss - actions].type =
5006                                                 RTE_FLOW_ACTION_TYPE_VOID;
5007                 else
5008                         ext_actions[qrss - actions].type =
5009                                                 (enum rte_flow_action_type)
5010                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5011                 /*
5012                  * Create the new actions list with removed Q/RSS action
5013                  * and appended set tag and jump to register copy table
5014                  * (RX_CP_TBL). We should preallocate unique tag ID here
5015                  * in advance, because it is needed for set tag action.
5016                  */
5017                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
5018                                                     qrss, actions_n, error);
5019                 if (!mtr_sfx && !qrss_id) {
5020                         ret = -rte_errno;
5021                         goto exit;
5022                 }
5023         } else if (attr->egress && !attr->transfer) {
5024                 /*
5025                  * All the actions on NIC Tx should have a metadata register
5026                  * copy action to copy reg_a from WQE to reg_c[meta]
5027                  */
5028                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5029                            sizeof(struct mlx5_flow_action_copy_mreg);
5030                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5031                                           SOCKET_ID_ANY);
5032                 if (!ext_actions)
5033                         return rte_flow_error_set(error, ENOMEM,
5034                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5035                                                   NULL, "no memory to split "
5036                                                   "metadata flow");
5037                 /* Create the action list appended with copy register. */
5038                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
5039                                              actions_n, error, encap_idx);
5040                 if (ret < 0)
5041                         goto exit;
5042         }
5043         /* Add the unmodified original or prefix subflow. */
5044         ret = flow_create_split_inner(dev, flow, &dev_flow, prefix_layers,
5045                                       prefix_mark, attr,
5046                                       items, ext_actions ? ext_actions :
5047                                       actions, external, flow_idx, error);
5048         if (ret < 0)
5049                 goto exit;
5050         MLX5_ASSERT(dev_flow);
5051         if (qrss) {
5052                 const struct rte_flow_attr q_attr = {
5053                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5054                         .ingress = 1,
5055                 };
5056                 /* Internal PMD action to set register. */
5057                 struct mlx5_rte_flow_item_tag q_tag_spec = {
5058                         .data = qrss_id,
5059                         .id = REG_NON,
5060                 };
5061                 struct rte_flow_item q_items[] = {
5062                         {
5063                                 .type = (enum rte_flow_item_type)
5064                                         MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5065                                 .spec = &q_tag_spec,
5066                                 .last = NULL,
5067                                 .mask = NULL,
5068                         },
5069                         {
5070                                 .type = RTE_FLOW_ITEM_TYPE_END,
5071                         },
5072                 };
5073                 struct rte_flow_action q_actions[] = {
5074                         {
5075                                 .type = qrss->type,
5076                                 .conf = qrss->conf,
5077                         },
5078                         {
5079                                 .type = RTE_FLOW_ACTION_TYPE_END,
5080                         },
5081                 };
5082                 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
5083
5084                 /*
5085                  * Configure the tag item only if there is no meter subflow.
5086                  * Since tag is already marked in the meter suffix subflow
5087                  * we can just use the meter suffix items as is.
5088                  */
5089                 if (qrss_id) {
5090                         /* Not meter subflow. */
5091                         MLX5_ASSERT(!mtr_sfx);
5092                         /*
5093                          * Put unique id in prefix flow due to it is destroyed
5094                          * after suffix flow and id will be freed after there
5095                          * is no actual flows with this id and identifier
5096                          * reallocation becomes possible (for example, for
5097                          * other flows in other threads).
5098                          */
5099                         dev_flow->handle->split_flow_id = qrss_id;
5100                         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
5101                                                    error);
5102                         if (ret < 0)
5103                                 goto exit;
5104                         q_tag_spec.id = ret;
5105                 }
5106                 dev_flow = NULL;
5107                 /* Add suffix subflow to execute Q/RSS. */
5108                 ret = flow_create_split_inner(dev, flow, &dev_flow, layers, 0,
5109                                               &q_attr, mtr_sfx ? items :
5110                                               q_items, q_actions,
5111                                               external, flow_idx, error);
5112                 if (ret < 0)
5113                         goto exit;
5114                 /* qrss ID should be freed if failed. */
5115                 qrss_id = 0;
5116                 MLX5_ASSERT(dev_flow);
5117         }
5118
5119 exit:
5120         /*
5121          * We do not destroy the partially created sub_flows in case of error.
5122          * These ones are included into parent flow list and will be destroyed
5123          * by flow_drv_destroy.
5124          */
5125         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
5126                         qrss_id);
5127         mlx5_free(ext_actions);
5128         return ret;
5129 }
5130
5131 /**
5132  * The splitting for meter feature.
5133  *
5134  * - The meter flow will be split to two flows as prefix and
5135  *   suffix flow. The packets make sense only it pass the prefix
5136  *   meter action.
5137  *
5138  * - Reg_C_5 is used for the packet to match betweend prefix and
5139  *   suffix flow.
5140  *
5141  * @param dev
5142  *   Pointer to Ethernet device.
5143  * @param[in] flow
5144  *   Parent flow structure pointer.
5145  * @param[in] prefix_layers
5146  *   Prefix subflow layers, may be 0.
5147  * @param[in] prefix_mark
5148  *   Prefix subflow mark flag, may be 0.
5149  * @param[in] attr
5150  *   Flow rule attributes.
5151  * @param[in] items
5152  *   Pattern specification (list terminated by the END pattern item).
5153  * @param[in] actions
5154  *   Associated actions (list terminated by the END action).
5155  * @param[in] external
5156  *   This flow rule is created by request external to PMD.
5157  * @param[in] flow_idx
5158  *   This memory pool index to the flow.
5159  * @param[out] error
5160  *   Perform verbose error reporting if not NULL.
5161  * @return
5162  *   0 on success, negative value otherwise
5163  */
5164 static int
5165 flow_create_split_meter(struct rte_eth_dev *dev,
5166                         struct rte_flow *flow,
5167                         uint64_t prefix_layers,
5168                         uint32_t prefix_mark,
5169                         const struct rte_flow_attr *attr,
5170                         const struct rte_flow_item items[],
5171                         const struct rte_flow_action actions[],
5172                         bool external, uint32_t flow_idx,
5173                         struct rte_flow_error *error)
5174 {
5175         struct mlx5_priv *priv = dev->data->dev_private;
5176         struct rte_flow_action *sfx_actions = NULL;
5177         struct rte_flow_action *pre_actions = NULL;
5178         struct rte_flow_item *sfx_items = NULL;
5179         struct mlx5_flow *dev_flow = NULL;
5180         struct rte_flow_attr sfx_attr = *attr;
5181         uint32_t mtr = 0;
5182         uint32_t mtr_tag_id = 0;
5183         size_t act_size;
5184         size_t item_size;
5185         int actions_n = 0;
5186         int ret;
5187
5188         if (priv->mtr_en)
5189                 actions_n = flow_check_meter_action(actions, &mtr);
5190         if (mtr) {
5191                 /* The five prefix actions: meter, decap, encap, tag, end. */
5192                 act_size = sizeof(struct rte_flow_action) * (actions_n + 5) +
5193                            sizeof(struct mlx5_rte_flow_action_set_tag);
5194                 /* tag, vlan, port id, end. */
5195 #define METER_SUFFIX_ITEM 4
5196                 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
5197                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
5198                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size),
5199                                           0, SOCKET_ID_ANY);
5200                 if (!sfx_actions)
5201                         return rte_flow_error_set(error, ENOMEM,
5202                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5203                                                   NULL, "no memory to split "
5204                                                   "meter flow");
5205                 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
5206                              act_size);
5207                 pre_actions = sfx_actions + actions_n;
5208                 mtr_tag_id = flow_meter_split_prep(dev, items, sfx_items,
5209                                                    actions, sfx_actions,
5210                                                    pre_actions);
5211                 if (!mtr_tag_id) {
5212                         ret = -rte_errno;
5213                         goto exit;
5214                 }
5215                 /* Add the prefix subflow. */
5216                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5217                                               prefix_layers, 0,
5218                                               attr, items,
5219                                               pre_actions, external,
5220                                               flow_idx, error);
5221                 if (ret) {
5222                         ret = -rte_errno;
5223                         goto exit;
5224                 }
5225                 dev_flow->handle->split_flow_id = mtr_tag_id;
5226                 /* Setting the sfx group atrr. */
5227                 sfx_attr.group = sfx_attr.transfer ?
5228                                 (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
5229                                  MLX5_FLOW_TABLE_LEVEL_SUFFIX;
5230         }
5231         /* Add the prefix subflow. */
5232         ret = flow_create_split_metadata(dev, flow, dev_flow ?
5233                                          flow_get_prefix_layer_flags(dev_flow) :
5234                                          prefix_layers, dev_flow ?
5235                                          dev_flow->handle->mark : prefix_mark,
5236                                          &sfx_attr, sfx_items ?
5237                                          sfx_items : items,
5238                                          sfx_actions ? sfx_actions : actions,
5239                                          external, flow_idx, error);
5240 exit:
5241         if (sfx_actions)
5242                 mlx5_free(sfx_actions);
5243         return ret;
5244 }
5245
5246 /**
5247  * The splitting for sample feature.
5248  *
5249  * Once Sample action is detected in the action list, the flow actions should
5250  * be split into prefix sub flow and suffix sub flow.
5251  *
5252  * The original items remain in the prefix sub flow, all actions preceding the
5253  * sample action and the sample action itself will be copied to the prefix
5254  * sub flow, the actions following the sample action will be copied to the
5255  * suffix sub flow, Queue action always be located in the suffix sub flow.
5256  *
5257  * In order to make the packet from prefix sub flow matches with suffix sub
5258  * flow, an extra tag action be added into prefix sub flow, and the suffix sub
5259  * flow uses tag item with the unique flow id.
5260  *
5261  * @param dev
5262  *   Pointer to Ethernet device.
5263  * @param[in] flow
5264  *   Parent flow structure pointer.
5265  * @param[in] attr
5266  *   Flow rule attributes.
5267  * @param[in] items
5268  *   Pattern specification (list terminated by the END pattern item).
5269  * @param[in] actions
5270  *   Associated actions (list terminated by the END action).
5271  * @param[in] external
5272  *   This flow rule is created by request external to PMD.
5273  * @param[in] flow_idx
5274  *   This memory pool index to the flow.
5275  * @param[out] error
5276  *   Perform verbose error reporting if not NULL.
5277  * @return
5278  *   0 on success, negative value otherwise
5279  */
5280 static int
5281 flow_create_split_sample(struct rte_eth_dev *dev,
5282                          struct rte_flow *flow,
5283                          const struct rte_flow_attr *attr,
5284                          const struct rte_flow_item items[],
5285                          const struct rte_flow_action actions[],
5286                          bool external, uint32_t flow_idx,
5287                          struct rte_flow_error *error)
5288 {
5289         struct mlx5_priv *priv = dev->data->dev_private;
5290         struct rte_flow_action *sfx_actions = NULL;
5291         struct rte_flow_action *pre_actions = NULL;
5292         struct rte_flow_item *sfx_items = NULL;
5293         struct mlx5_flow *dev_flow = NULL;
5294         struct rte_flow_attr sfx_attr = *attr;
5295 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5296         struct mlx5_flow_dv_sample_resource *sample_res;
5297         struct mlx5_flow_tbl_data_entry *sfx_tbl_data;
5298         struct mlx5_flow_tbl_resource *sfx_tbl;
5299         union mlx5_flow_tbl_key sfx_table_key;
5300 #endif
5301         size_t act_size;
5302         size_t item_size;
5303         uint32_t fdb_tx = 0;
5304         int32_t tag_id = 0;
5305         int actions_n = 0;
5306         int sample_action_pos;
5307         int qrss_action_pos;
5308         int ret = 0;
5309
5310         if (priv->sampler_en)
5311                 actions_n = flow_check_match_action(actions, attr,
5312                                         RTE_FLOW_ACTION_TYPE_SAMPLE,
5313                                         &sample_action_pos, &qrss_action_pos);
5314         if (actions_n) {
5315                 /* The prefix actions must includes sample, tag, end. */
5316                 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1)
5317                            + sizeof(struct mlx5_rte_flow_action_set_tag);
5318                 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM +
5319                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
5320                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size +
5321                                           item_size), 0, SOCKET_ID_ANY);
5322                 if (!sfx_actions)
5323                         return rte_flow_error_set(error, ENOMEM,
5324                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5325                                                   NULL, "no memory to split "
5326                                                   "sample flow");
5327                 /* The representor_id is -1 for uplink. */
5328                 fdb_tx = (attr->transfer && priv->representor_id != -1);
5329                 if (!fdb_tx)
5330                         sfx_items = (struct rte_flow_item *)((char *)sfx_actions
5331                                         + act_size);
5332                 pre_actions = sfx_actions + actions_n;
5333                 tag_id = flow_sample_split_prep(dev, fdb_tx, sfx_items,
5334                                                 actions, sfx_actions,
5335                                                 pre_actions, actions_n,
5336                                                 sample_action_pos,
5337                                                 qrss_action_pos, error);
5338                 if (tag_id < 0 || (!fdb_tx && !tag_id)) {
5339                         ret = -rte_errno;
5340                         goto exit;
5341                 }
5342                 /* Add the prefix subflow. */
5343                 ret = flow_create_split_inner(dev, flow, &dev_flow, 0, 0, attr,
5344                                               items, pre_actions, external,
5345                                               flow_idx, error);
5346                 if (ret) {
5347                         ret = -rte_errno;
5348                         goto exit;
5349                 }
5350                 dev_flow->handle->split_flow_id = tag_id;
5351 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5352                 /* Set the sfx group attr. */
5353                 sample_res = (struct mlx5_flow_dv_sample_resource *)
5354                                         dev_flow->dv.sample_res;
5355                 sfx_tbl = (struct mlx5_flow_tbl_resource *)
5356                                         sample_res->normal_path_tbl;
5357                 sfx_tbl_data = container_of(sfx_tbl,
5358                                         struct mlx5_flow_tbl_data_entry, tbl);
5359                 sfx_table_key.v64 = sfx_tbl_data->entry.key;
5360                 sfx_attr.group = sfx_attr.transfer ?
5361                                         (sfx_table_key.table_id - 1) :
5362                                          sfx_table_key.table_id;
5363 #endif
5364         }
5365         /* Add the suffix subflow. */
5366         ret = flow_create_split_meter(dev, flow, dev_flow ?
5367                                  flow_get_prefix_layer_flags(dev_flow) : 0,
5368                                  dev_flow ? dev_flow->handle->mark : 0,
5369                                  &sfx_attr, sfx_items ? sfx_items : items,
5370                                  sfx_actions ? sfx_actions : actions,
5371                                  external, flow_idx, error);
5372 exit:
5373         if (sfx_actions)
5374                 mlx5_free(sfx_actions);
5375         return ret;
5376 }
5377
5378 /**
5379  * Split the flow to subflow set. The splitters might be linked
5380  * in the chain, like this:
5381  * flow_create_split_outer() calls:
5382  *   flow_create_split_meter() calls:
5383  *     flow_create_split_metadata(meter_subflow_0) calls:
5384  *       flow_create_split_inner(metadata_subflow_0)
5385  *       flow_create_split_inner(metadata_subflow_1)
5386  *       flow_create_split_inner(metadata_subflow_2)
5387  *     flow_create_split_metadata(meter_subflow_1) calls:
5388  *       flow_create_split_inner(metadata_subflow_0)
5389  *       flow_create_split_inner(metadata_subflow_1)
5390  *       flow_create_split_inner(metadata_subflow_2)
5391  *
5392  * This provide flexible way to add new levels of flow splitting.
5393  * The all of successfully created subflows are included to the
5394  * parent flow dev_flow list.
5395  *
5396  * @param dev
5397  *   Pointer to Ethernet device.
5398  * @param[in] flow
5399  *   Parent flow structure pointer.
5400  * @param[in] attr
5401  *   Flow rule attributes.
5402  * @param[in] items
5403  *   Pattern specification (list terminated by the END pattern item).
5404  * @param[in] actions
5405  *   Associated actions (list terminated by the END action).
5406  * @param[in] external
5407  *   This flow rule is created by request external to PMD.
5408  * @param[in] flow_idx
5409  *   This memory pool index to the flow.
5410  * @param[out] error
5411  *   Perform verbose error reporting if not NULL.
5412  * @return
5413  *   0 on success, negative value otherwise
5414  */
5415 static int
5416 flow_create_split_outer(struct rte_eth_dev *dev,
5417                         struct rte_flow *flow,
5418                         const struct rte_flow_attr *attr,
5419                         const struct rte_flow_item items[],
5420                         const struct rte_flow_action actions[],
5421                         bool external, uint32_t flow_idx,
5422                         struct rte_flow_error *error)
5423 {
5424         int ret;
5425
5426         ret = flow_create_split_sample(dev, flow, attr, items,
5427                                        actions, external, flow_idx, error);
5428         MLX5_ASSERT(ret <= 0);
5429         return ret;
5430 }
5431
5432 static struct mlx5_flow_tunnel *
5433 flow_tunnel_from_rule(struct rte_eth_dev *dev,
5434                       const struct rte_flow_attr *attr,
5435                       const struct rte_flow_item items[],
5436                       const struct rte_flow_action actions[])
5437 {
5438         struct mlx5_flow_tunnel *tunnel;
5439
5440 #pragma GCC diagnostic push
5441 #pragma GCC diagnostic ignored "-Wcast-qual"
5442         if (is_flow_tunnel_match_rule(dev, attr, items, actions))
5443                 tunnel = (struct mlx5_flow_tunnel *)items[0].spec;
5444         else if (is_flow_tunnel_steer_rule(dev, attr, items, actions))
5445                 tunnel = (struct mlx5_flow_tunnel *)actions[0].conf;
5446         else
5447                 tunnel = NULL;
5448 #pragma GCC diagnostic pop
5449
5450         return tunnel;
5451 }
5452
5453 /**
5454  * Adjust flow RSS workspace if needed.
5455  *
5456  * @param wks
5457  *   Pointer to thread flow work space.
5458  * @param rss_desc
5459  *   Pointer to RSS descriptor.
5460  * @param[in] nrssq_num
5461  *   New RSS queue number.
5462  *
5463  * @return
5464  *   0 on success, -1 otherwise and rte_errno is set.
5465  */
5466 static int
5467 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks,
5468                           struct mlx5_flow_rss_desc *rss_desc,
5469                           uint32_t nrssq_num)
5470 {
5471         bool fidx = !!wks->flow_idx;
5472
5473         if (likely(nrssq_num <= wks->rssq_num[fidx]))
5474                 return 0;
5475         rss_desc->queue = realloc(rss_desc->queue,
5476                           sizeof(rss_desc->queue[0]) * RTE_ALIGN(nrssq_num, 2));
5477         if (!rss_desc->queue) {
5478                 rte_errno = ENOMEM;
5479                 return -1;
5480         }
5481         wks->rssq_num[fidx] = RTE_ALIGN(nrssq_num, 2);
5482         return 0;
5483 }
5484
5485 /**
5486  * Create a flow and add it to @p list.
5487  *
5488  * @param dev
5489  *   Pointer to Ethernet device.
5490  * @param list
5491  *   Pointer to a TAILQ flow list. If this parameter NULL,
5492  *   no list insertion occurred, flow is just created,
5493  *   this is caller's responsibility to track the
5494  *   created flow.
5495  * @param[in] attr
5496  *   Flow rule attributes.
5497  * @param[in] items
5498  *   Pattern specification (list terminated by the END pattern item).
5499  * @param[in] actions
5500  *   Associated actions (list terminated by the END action).
5501  * @param[in] external
5502  *   This flow rule is created by request external to PMD.
5503  * @param[out] error
5504  *   Perform verbose error reporting if not NULL.
5505  *
5506  * @return
5507  *   A flow index on success, 0 otherwise and rte_errno is set.
5508  */
5509 static uint32_t
5510 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
5511                  const struct rte_flow_attr *attr,
5512                  const struct rte_flow_item items[],
5513                  const struct rte_flow_action original_actions[],
5514                  bool external, struct rte_flow_error *error)
5515 {
5516         struct mlx5_priv *priv = dev->data->dev_private;
5517         struct rte_flow *flow = NULL;
5518         struct mlx5_flow *dev_flow;
5519         const struct rte_flow_action_rss *rss;
5520         struct mlx5_translated_shared_action
5521                 shared_actions[MLX5_MAX_SHARED_ACTIONS];
5522         int shared_actions_n = MLX5_MAX_SHARED_ACTIONS;
5523         union {
5524                 struct mlx5_flow_expand_rss buf;
5525                 uint8_t buffer[2048];
5526         } expand_buffer;
5527         union {
5528                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
5529                 uint8_t buffer[2048];
5530         } actions_rx;
5531         union {
5532                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
5533                 uint8_t buffer[2048];
5534         } actions_hairpin_tx;
5535         union {
5536                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
5537                 uint8_t buffer[2048];
5538         } items_tx;
5539         struct mlx5_flow_expand_rss *buf = &expand_buffer.buf;
5540         struct mlx5_flow_rss_desc *rss_desc;
5541         const struct rte_flow_action *p_actions_rx;
5542         uint32_t i;
5543         uint32_t idx = 0;
5544         int hairpin_flow;
5545         struct rte_flow_attr attr_tx = { .priority = 0 };
5546         struct rte_flow_attr attr_factor = {0};
5547         const struct rte_flow_action *actions;
5548         struct rte_flow_action *translated_actions = NULL;
5549         struct mlx5_flow_tunnel *tunnel;
5550         struct tunnel_default_miss_ctx default_miss_ctx = { 0, };
5551         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
5552         bool fidx = !!wks->flow_idx;
5553         int ret;
5554
5555         MLX5_ASSERT(wks);
5556         rss_desc = &wks->rss_desc[fidx];
5557         ret = flow_shared_actions_translate(dev, original_actions,
5558                                             shared_actions,
5559                                             &shared_actions_n,
5560                                             &translated_actions, error);
5561         if (ret < 0) {
5562                 MLX5_ASSERT(translated_actions == NULL);
5563                 return 0;
5564         }
5565         actions = translated_actions ? translated_actions : original_actions;
5566         memcpy((void *)&attr_factor, (const void *)attr, sizeof(*attr));
5567         p_actions_rx = actions;
5568         hairpin_flow = flow_check_hairpin_split(dev, &attr_factor, actions);
5569         ret = flow_drv_validate(dev, &attr_factor, items, p_actions_rx,
5570                                 external, hairpin_flow, error);
5571         if (ret < 0)
5572                 goto error_before_hairpin_split;
5573         flow = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], &idx);
5574         if (!flow) {
5575                 rte_errno = ENOMEM;
5576                 goto error_before_hairpin_split;
5577         }
5578         if (hairpin_flow > 0) {
5579                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
5580                         rte_errno = EINVAL;
5581                         goto error_before_hairpin_split;
5582                 }
5583                 flow_hairpin_split(dev, actions, actions_rx.actions,
5584                                    actions_hairpin_tx.actions, items_tx.items,
5585                                    idx);
5586                 p_actions_rx = actions_rx.actions;
5587         }
5588         flow->drv_type = flow_get_drv_type(dev, &attr_factor);
5589         MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
5590                     flow->drv_type < MLX5_FLOW_TYPE_MAX);
5591         memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue));
5592         rss = flow_get_rss_action(p_actions_rx);
5593         if (rss) {
5594                 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num))
5595                         return 0;
5596                 /*
5597                  * The following information is required by
5598                  * mlx5_flow_hashfields_adjust() in advance.
5599                  */
5600                 rss_desc->level = rss->level;
5601                 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
5602                 rss_desc->types = !rss->types ? ETH_RSS_IP : rss->types;
5603         }
5604         flow->dev_handles = 0;
5605         if (rss && rss->types) {
5606                 unsigned int graph_root;
5607
5608                 graph_root = find_graph_root(items, rss->level);
5609                 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
5610                                            items, rss->types,
5611                                            mlx5_support_expansion, graph_root);
5612                 MLX5_ASSERT(ret > 0 &&
5613                        (unsigned int)ret < sizeof(expand_buffer.buffer));
5614         } else {
5615                 buf->entries = 1;
5616                 buf->entry[0].pattern = (void *)(uintptr_t)items;
5617         }
5618         flow->shared_rss = flow_get_shared_rss_action(dev, shared_actions,
5619                                                       shared_actions_n);
5620         /*
5621          * Record the start index when there is a nested call. All sub-flows
5622          * need to be translated before another calling.
5623          * No need to use ping-pong buffer to save memory here.
5624          */
5625         if (fidx) {
5626                 MLX5_ASSERT(!wks->flow_nested_idx);
5627                 wks->flow_nested_idx = fidx;
5628         }
5629         for (i = 0; i < buf->entries; ++i) {
5630                 /*
5631                  * The splitter may create multiple dev_flows,
5632                  * depending on configuration. In the simplest
5633                  * case it just creates unmodified original flow.
5634                  */
5635                 ret = flow_create_split_outer(dev, flow, &attr_factor,
5636                                               buf->entry[i].pattern,
5637                                               p_actions_rx, external, idx,
5638                                               error);
5639                 if (ret < 0)
5640                         goto error;
5641                 if (is_flow_tunnel_steer_rule(dev, attr,
5642                                               buf->entry[i].pattern,
5643                                               p_actions_rx)) {
5644                         ret = flow_tunnel_add_default_miss(dev, flow, attr,
5645                                                            p_actions_rx,
5646                                                            idx,
5647                                                            &default_miss_ctx,
5648                                                            error);
5649                         if (ret < 0) {
5650                                 mlx5_free(default_miss_ctx.queue);
5651                                 goto error;
5652                         }
5653                 }
5654         }
5655         /* Create the tx flow. */
5656         if (hairpin_flow) {
5657                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
5658                 attr_tx.ingress = 0;
5659                 attr_tx.egress = 1;
5660                 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
5661                                          actions_hairpin_tx.actions,
5662                                          idx, error);
5663                 if (!dev_flow)
5664                         goto error;
5665                 dev_flow->flow = flow;
5666                 dev_flow->external = 0;
5667                 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
5668                               dev_flow->handle, next);
5669                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
5670                                          items_tx.items,
5671                                          actions_hairpin_tx.actions, error);
5672                 if (ret < 0)
5673                         goto error;
5674         }
5675         /*
5676          * Update the metadata register copy table. If extensive
5677          * metadata feature is enabled and registers are supported
5678          * we might create the extra rte_flow for each unique
5679          * MARK/FLAG action ID.
5680          *
5681          * The table is updated for ingress Flows only, because
5682          * the egress Flows belong to the different device and
5683          * copy table should be updated in peer NIC Rx domain.
5684          */
5685         if (attr_factor.ingress &&
5686             (external || attr_factor.group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
5687                 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
5688                 if (ret)
5689                         goto error;
5690         }
5691         /*
5692          * If the flow is external (from application) OR device is started, then
5693          * the flow will be applied immediately.
5694          */
5695         if (external || dev->data->dev_started) {
5696                 ret = flow_drv_apply(dev, flow, error);
5697                 if (ret < 0)
5698                         goto error;
5699         }
5700         if (list) {
5701                 rte_spinlock_lock(&priv->flow_list_lock);
5702                 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list, idx,
5703                              flow, next);
5704                 rte_spinlock_unlock(&priv->flow_list_lock);
5705         }
5706         flow_rxq_flags_set(dev, flow);
5707         rte_free(translated_actions);
5708         /* Nested flow creation index recovery. */
5709         wks->flow_idx = wks->flow_nested_idx;
5710         if (wks->flow_nested_idx)
5711                 wks->flow_nested_idx = 0;
5712         tunnel = flow_tunnel_from_rule(dev, attr, items, actions);
5713         if (tunnel) {
5714                 flow->tunnel = 1;
5715                 flow->tunnel_id = tunnel->tunnel_id;
5716                 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED);
5717                 mlx5_free(default_miss_ctx.queue);
5718         }
5719         return idx;
5720 error:
5721         MLX5_ASSERT(flow);
5722         ret = rte_errno; /* Save rte_errno before cleanup. */
5723         flow_mreg_del_copy_action(dev, flow);
5724         flow_drv_destroy(dev, flow);
5725         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], idx);
5726         rte_errno = ret; /* Restore rte_errno. */
5727         ret = rte_errno;
5728         rte_errno = ret;
5729         wks->flow_idx = wks->flow_nested_idx;
5730         if (wks->flow_nested_idx)
5731                 wks->flow_nested_idx = 0;
5732 error_before_hairpin_split:
5733         rte_free(translated_actions);
5734         return 0;
5735 }
5736
5737 /**
5738  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
5739  * incoming packets to table 1.
5740  *
5741  * Other flow rules, requested for group n, will be created in
5742  * e-switch table n+1.
5743  * Jump action to e-switch group n will be created to group n+1.
5744  *
5745  * Used when working in switchdev mode, to utilise advantages of table 1
5746  * and above.
5747  *
5748  * @param dev
5749  *   Pointer to Ethernet device.
5750  *
5751  * @return
5752  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
5753  */
5754 struct rte_flow *
5755 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
5756 {
5757         const struct rte_flow_attr attr = {
5758                 .group = 0,
5759                 .priority = 0,
5760                 .ingress = 1,
5761                 .egress = 0,
5762                 .transfer = 1,
5763         };
5764         const struct rte_flow_item pattern = {
5765                 .type = RTE_FLOW_ITEM_TYPE_END,
5766         };
5767         struct rte_flow_action_jump jump = {
5768                 .group = 1,
5769         };
5770         const struct rte_flow_action actions[] = {
5771                 {
5772                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
5773                         .conf = &jump,
5774                 },
5775                 {
5776                         .type = RTE_FLOW_ACTION_TYPE_END,
5777                 },
5778         };
5779         struct mlx5_priv *priv = dev->data->dev_private;
5780         struct rte_flow_error error;
5781
5782         return (void *)(uintptr_t)flow_list_create(dev, &priv->ctrl_flows,
5783                                                    &attr, &pattern,
5784                                                    actions, false, &error);
5785 }
5786
5787 /**
5788  * Validate a flow supported by the NIC.
5789  *
5790  * @see rte_flow_validate()
5791  * @see rte_flow_ops
5792  */
5793 int
5794 mlx5_flow_validate(struct rte_eth_dev *dev,
5795                    const struct rte_flow_attr *attr,
5796                    const struct rte_flow_item items[],
5797                    const struct rte_flow_action original_actions[],
5798                    struct rte_flow_error *error)
5799 {
5800         int hairpin_flow;
5801         struct mlx5_translated_shared_action
5802                 shared_actions[MLX5_MAX_SHARED_ACTIONS];
5803         int shared_actions_n = MLX5_MAX_SHARED_ACTIONS;
5804         const struct rte_flow_action *actions;
5805         struct rte_flow_action *translated_actions = NULL;
5806         int ret = flow_shared_actions_translate(dev, original_actions,
5807                                                 shared_actions,
5808                                                 &shared_actions_n,
5809                                                 &translated_actions, error);
5810
5811         if (ret)
5812                 return ret;
5813         actions = translated_actions ? translated_actions : original_actions;
5814         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
5815         ret = flow_drv_validate(dev, attr, items, actions,
5816                                 true, hairpin_flow, error);
5817         rte_free(translated_actions);
5818         return ret;
5819 }
5820
5821 /**
5822  * Create a flow.
5823  *
5824  * @see rte_flow_create()
5825  * @see rte_flow_ops
5826  */
5827 struct rte_flow *
5828 mlx5_flow_create(struct rte_eth_dev *dev,
5829                  const struct rte_flow_attr *attr,
5830                  const struct rte_flow_item items[],
5831                  const struct rte_flow_action actions[],
5832                  struct rte_flow_error *error)
5833 {
5834         struct mlx5_priv *priv = dev->data->dev_private;
5835
5836         /*
5837          * If the device is not started yet, it is not allowed to created a
5838          * flow from application. PMD default flows and traffic control flows
5839          * are not affected.
5840          */
5841         if (unlikely(!dev->data->dev_started)) {
5842                 DRV_LOG(DEBUG, "port %u is not started when "
5843                         "inserting a flow", dev->data->port_id);
5844                 rte_flow_error_set(error, ENODEV,
5845                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5846                                    NULL,
5847                                    "port not started");
5848                 return NULL;
5849         }
5850
5851         return (void *)(uintptr_t)flow_list_create(dev, &priv->flows,
5852                                   attr, items, actions, true, error);
5853 }
5854
5855 /**
5856  * Destroy a flow in a list.
5857  *
5858  * @param dev
5859  *   Pointer to Ethernet device.
5860  * @param list
5861  *   Pointer to the Indexed flow list. If this parameter NULL,
5862  *   there is no flow removal from the list. Be noted that as
5863  *   flow is add to the indexed list, memory of the indexed
5864  *   list points to maybe changed as flow destroyed.
5865  * @param[in] flow_idx
5866  *   Index of flow to destroy.
5867  */
5868 static void
5869 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
5870                   uint32_t flow_idx)
5871 {
5872         struct mlx5_priv *priv = dev->data->dev_private;
5873         struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
5874                                                [MLX5_IPOOL_RTE_FLOW], flow_idx);
5875
5876         if (!flow)
5877                 return;
5878         /*
5879          * Update RX queue flags only if port is started, otherwise it is
5880          * already clean.
5881          */
5882         if (dev->data->dev_started)
5883                 flow_rxq_flags_trim(dev, flow);
5884         flow_drv_destroy(dev, flow);
5885         if (list) {
5886                 rte_spinlock_lock(&priv->flow_list_lock);
5887                 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list,
5888                              flow_idx, flow, next);
5889                 rte_spinlock_unlock(&priv->flow_list_lock);
5890         }
5891         flow_mreg_del_copy_action(dev, flow);
5892         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], flow_idx);
5893         if (flow->tunnel) {
5894                 struct mlx5_flow_tunnel *tunnel;
5895
5896                 rte_spinlock_lock(&mlx5_tunnel_hub(dev)->sl);
5897                 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id);
5898                 RTE_VERIFY(tunnel);
5899                 LIST_REMOVE(tunnel, chain);
5900                 rte_spinlock_unlock(&mlx5_tunnel_hub(dev)->sl);
5901                 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
5902                         mlx5_flow_tunnel_free(dev, tunnel);
5903         }
5904 }
5905
5906 /**
5907  * Destroy all flows.
5908  *
5909  * @param dev
5910  *   Pointer to Ethernet device.
5911  * @param list
5912  *   Pointer to the Indexed flow list.
5913  * @param active
5914  *   If flushing is called avtively.
5915  */
5916 void
5917 mlx5_flow_list_flush(struct rte_eth_dev *dev, uint32_t *list, bool active)
5918 {
5919         uint32_t num_flushed = 0;
5920
5921         while (*list) {
5922                 flow_list_destroy(dev, list, *list);
5923                 num_flushed++;
5924         }
5925         if (active) {
5926                 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
5927                         dev->data->port_id, num_flushed);
5928         }
5929 }
5930
5931 /**
5932  * Stop all default actions for flows.
5933  *
5934  * @param dev
5935  *   Pointer to Ethernet device.
5936  */
5937 void
5938 mlx5_flow_stop_default(struct rte_eth_dev *dev)
5939 {
5940         flow_mreg_del_default_copy_action(dev);
5941         flow_rxq_flags_clear(dev);
5942 }
5943
5944 /**
5945  * Start all default actions for flows.
5946  *
5947  * @param dev
5948  *   Pointer to Ethernet device.
5949  * @return
5950  *   0 on success, a negative errno value otherwise and rte_errno is set.
5951  */
5952 int
5953 mlx5_flow_start_default(struct rte_eth_dev *dev)
5954 {
5955         struct rte_flow_error error;
5956
5957         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
5958         return flow_mreg_add_default_copy_action(dev, &error);
5959 }
5960
5961 /**
5962  * Release key of thread specific flow workspace data.
5963  */
5964 static void
5965 flow_release_workspace(void *data)
5966 {
5967         struct mlx5_flow_workspace *wks = data;
5968
5969         if (!wks)
5970                 return;
5971         free(wks->rss_desc[0].queue);
5972         free(wks->rss_desc[1].queue);
5973         free(wks);
5974 }
5975
5976 /**
5977  * Initialize key of thread specific flow workspace data.
5978  */
5979 static void
5980 flow_alloc_workspace(void)
5981 {
5982         if (pthread_key_create(&key_workspace, flow_release_workspace))
5983                 DRV_LOG(ERR, "Can't create flow workspace data thread key.");
5984 }
5985
5986 /**
5987  * Get thread specific flow workspace.
5988  *
5989  * @return pointer to thread specific flowworkspace data, NULL on error.
5990  */
5991 struct mlx5_flow_workspace*
5992 mlx5_flow_get_thread_workspace(void)
5993 {
5994         struct mlx5_flow_workspace *data;
5995
5996         if (pthread_once(&key_workspace_init, flow_alloc_workspace)) {
5997                 DRV_LOG(ERR, "Failed to init flow workspace data thread key.");
5998                 return NULL;
5999         }
6000         data = pthread_getspecific(key_workspace);
6001         if (!data) {
6002                 data = calloc(1, sizeof(*data));
6003                 if (!data) {
6004                         DRV_LOG(ERR, "Failed to allocate flow workspace "
6005                                 "memory.");
6006                         return NULL;
6007                 }
6008                 data->rss_desc[0].queue = calloc(1,
6009                                 sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM);
6010                 if (!data->rss_desc[0].queue)
6011                         goto err;
6012                 data->rss_desc[1].queue = calloc(1,
6013                                 sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM);
6014                 if (!data->rss_desc[1].queue)
6015                         goto err;
6016                 data->rssq_num[0] = MLX5_RSSQ_DEFAULT_NUM;
6017                 data->rssq_num[1] = MLX5_RSSQ_DEFAULT_NUM;
6018                 if (pthread_setspecific(key_workspace, data)) {
6019                         DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6020                         goto err;
6021                 }
6022         }
6023         return data;
6024 err:
6025         if (data->rss_desc[0].queue)
6026                 free(data->rss_desc[0].queue);
6027         if (data->rss_desc[1].queue)
6028                 free(data->rss_desc[1].queue);
6029         free(data);
6030         return NULL;
6031 }
6032
6033 /**
6034  * Verify the flow list is empty
6035  *
6036  * @param dev
6037  *  Pointer to Ethernet device.
6038  *
6039  * @return the number of flows not released.
6040  */
6041 int
6042 mlx5_flow_verify(struct rte_eth_dev *dev)
6043 {
6044         struct mlx5_priv *priv = dev->data->dev_private;
6045         struct rte_flow *flow;
6046         uint32_t idx;
6047         int ret = 0;
6048
6049         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], priv->flows, idx,
6050                       flow, next) {
6051                 DRV_LOG(DEBUG, "port %u flow %p still referenced",
6052                         dev->data->port_id, (void *)flow);
6053                 ++ret;
6054         }
6055         return ret;
6056 }
6057
6058 /**
6059  * Enable default hairpin egress flow.
6060  *
6061  * @param dev
6062  *   Pointer to Ethernet device.
6063  * @param queue
6064  *   The queue index.
6065  *
6066  * @return
6067  *   0 on success, a negative errno value otherwise and rte_errno is set.
6068  */
6069 int
6070 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
6071                             uint32_t queue)
6072 {
6073         struct mlx5_priv *priv = dev->data->dev_private;
6074         const struct rte_flow_attr attr = {
6075                 .egress = 1,
6076                 .priority = 0,
6077         };
6078         struct mlx5_rte_flow_item_tx_queue queue_spec = {
6079                 .queue = queue,
6080         };
6081         struct mlx5_rte_flow_item_tx_queue queue_mask = {
6082                 .queue = UINT32_MAX,
6083         };
6084         struct rte_flow_item items[] = {
6085                 {
6086                         .type = (enum rte_flow_item_type)
6087                                 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
6088                         .spec = &queue_spec,
6089                         .last = NULL,
6090                         .mask = &queue_mask,
6091                 },
6092                 {
6093                         .type = RTE_FLOW_ITEM_TYPE_END,
6094                 },
6095         };
6096         struct rte_flow_action_jump jump = {
6097                 .group = MLX5_HAIRPIN_TX_TABLE,
6098         };
6099         struct rte_flow_action actions[2];
6100         uint32_t flow_idx;
6101         struct rte_flow_error error;
6102
6103         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
6104         actions[0].conf = &jump;
6105         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
6106         flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6107                                 &attr, items, actions, false, &error);
6108         if (!flow_idx) {
6109                 DRV_LOG(DEBUG,
6110                         "Failed to create ctrl flow: rte_errno(%d),"
6111                         " type(%d), message(%s)",
6112                         rte_errno, error.type,
6113                         error.message ? error.message : " (no stated reason)");
6114                 return -rte_errno;
6115         }
6116         return 0;
6117 }
6118
6119 /**
6120  * Enable a control flow configured from the control plane.
6121  *
6122  * @param dev
6123  *   Pointer to Ethernet device.
6124  * @param eth_spec
6125  *   An Ethernet flow spec to apply.
6126  * @param eth_mask
6127  *   An Ethernet flow mask to apply.
6128  * @param vlan_spec
6129  *   A VLAN flow spec to apply.
6130  * @param vlan_mask
6131  *   A VLAN flow mask to apply.
6132  *
6133  * @return
6134  *   0 on success, a negative errno value otherwise and rte_errno is set.
6135  */
6136 int
6137 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
6138                     struct rte_flow_item_eth *eth_spec,
6139                     struct rte_flow_item_eth *eth_mask,
6140                     struct rte_flow_item_vlan *vlan_spec,
6141                     struct rte_flow_item_vlan *vlan_mask)
6142 {
6143         struct mlx5_priv *priv = dev->data->dev_private;
6144         const struct rte_flow_attr attr = {
6145                 .ingress = 1,
6146                 .priority = MLX5_FLOW_PRIO_RSVD,
6147         };
6148         struct rte_flow_item items[] = {
6149                 {
6150                         .type = RTE_FLOW_ITEM_TYPE_ETH,
6151                         .spec = eth_spec,
6152                         .last = NULL,
6153                         .mask = eth_mask,
6154                 },
6155                 {
6156                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
6157                                               RTE_FLOW_ITEM_TYPE_END,
6158                         .spec = vlan_spec,
6159                         .last = NULL,
6160                         .mask = vlan_mask,
6161                 },
6162                 {
6163                         .type = RTE_FLOW_ITEM_TYPE_END,
6164                 },
6165         };
6166         uint16_t queue[priv->reta_idx_n];
6167         struct rte_flow_action_rss action_rss = {
6168                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
6169                 .level = 0,
6170                 .types = priv->rss_conf.rss_hf,
6171                 .key_len = priv->rss_conf.rss_key_len,
6172                 .queue_num = priv->reta_idx_n,
6173                 .key = priv->rss_conf.rss_key,
6174                 .queue = queue,
6175         };
6176         struct rte_flow_action actions[] = {
6177                 {
6178                         .type = RTE_FLOW_ACTION_TYPE_RSS,
6179                         .conf = &action_rss,
6180                 },
6181                 {
6182                         .type = RTE_FLOW_ACTION_TYPE_END,
6183                 },
6184         };
6185         uint32_t flow_idx;
6186         struct rte_flow_error error;
6187         unsigned int i;
6188
6189         if (!priv->reta_idx_n || !priv->rxqs_n) {
6190                 return 0;
6191         }
6192         if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
6193                 action_rss.types = 0;
6194         for (i = 0; i != priv->reta_idx_n; ++i)
6195                 queue[i] = (*priv->reta_idx)[i];
6196         flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6197                                 &attr, items, actions, false, &error);
6198         if (!flow_idx)
6199                 return -rte_errno;
6200         return 0;
6201 }
6202
6203 /**
6204  * Enable a flow control configured from the control plane.
6205  *
6206  * @param dev
6207  *   Pointer to Ethernet device.
6208  * @param eth_spec
6209  *   An Ethernet flow spec to apply.
6210  * @param eth_mask
6211  *   An Ethernet flow mask to apply.
6212  *
6213  * @return
6214  *   0 on success, a negative errno value otherwise and rte_errno is set.
6215  */
6216 int
6217 mlx5_ctrl_flow(struct rte_eth_dev *dev,
6218                struct rte_flow_item_eth *eth_spec,
6219                struct rte_flow_item_eth *eth_mask)
6220 {
6221         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
6222 }
6223
6224 /**
6225  * Create default miss flow rule matching lacp traffic
6226  *
6227  * @param dev
6228  *   Pointer to Ethernet device.
6229  * @param eth_spec
6230  *   An Ethernet flow spec to apply.
6231  *
6232  * @return
6233  *   0 on success, a negative errno value otherwise and rte_errno is set.
6234  */
6235 int
6236 mlx5_flow_lacp_miss(struct rte_eth_dev *dev)
6237 {
6238         struct mlx5_priv *priv = dev->data->dev_private;
6239         /*
6240          * The LACP matching is done by only using ether type since using
6241          * a multicast dst mac causes kernel to give low priority to this flow.
6242          */
6243         static const struct rte_flow_item_eth lacp_spec = {
6244                 .type = RTE_BE16(0x8809),
6245         };
6246         static const struct rte_flow_item_eth lacp_mask = {
6247                 .type = 0xffff,
6248         };
6249         const struct rte_flow_attr attr = {
6250                 .ingress = 1,
6251         };
6252         struct rte_flow_item items[] = {
6253                 {
6254                         .type = RTE_FLOW_ITEM_TYPE_ETH,
6255                         .spec = &lacp_spec,
6256                         .mask = &lacp_mask,
6257                 },
6258                 {
6259                         .type = RTE_FLOW_ITEM_TYPE_END,
6260                 },
6261         };
6262         struct rte_flow_action actions[] = {
6263                 {
6264                         .type = (enum rte_flow_action_type)
6265                                 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS,
6266                 },
6267                 {
6268                         .type = RTE_FLOW_ACTION_TYPE_END,
6269                 },
6270         };
6271         struct rte_flow_error error;
6272         uint32_t flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6273                                 &attr, items, actions, false, &error);
6274
6275         if (!flow_idx)
6276                 return -rte_errno;
6277         return 0;
6278 }
6279
6280 /**
6281  * Destroy a flow.
6282  *
6283  * @see rte_flow_destroy()
6284  * @see rte_flow_ops
6285  */
6286 int
6287 mlx5_flow_destroy(struct rte_eth_dev *dev,
6288                   struct rte_flow *flow,
6289                   struct rte_flow_error *error __rte_unused)
6290 {
6291         struct mlx5_priv *priv = dev->data->dev_private;
6292
6293         flow_list_destroy(dev, &priv->flows, (uintptr_t)(void *)flow);
6294         return 0;
6295 }
6296
6297 /**
6298  * Destroy all flows.
6299  *
6300  * @see rte_flow_flush()
6301  * @see rte_flow_ops
6302  */
6303 int
6304 mlx5_flow_flush(struct rte_eth_dev *dev,
6305                 struct rte_flow_error *error __rte_unused)
6306 {
6307         struct mlx5_priv *priv = dev->data->dev_private;
6308
6309         mlx5_flow_list_flush(dev, &priv->flows, false);
6310         return 0;
6311 }
6312
6313 /**
6314  * Isolated mode.
6315  *
6316  * @see rte_flow_isolate()
6317  * @see rte_flow_ops
6318  */
6319 int
6320 mlx5_flow_isolate(struct rte_eth_dev *dev,
6321                   int enable,
6322                   struct rte_flow_error *error)
6323 {
6324         struct mlx5_priv *priv = dev->data->dev_private;
6325
6326         if (dev->data->dev_started) {
6327                 rte_flow_error_set(error, EBUSY,
6328                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6329                                    NULL,
6330                                    "port must be stopped first");
6331                 return -rte_errno;
6332         }
6333         priv->isolated = !!enable;
6334         if (enable)
6335                 dev->dev_ops = &mlx5_os_dev_ops_isolate;
6336         else
6337                 dev->dev_ops = &mlx5_os_dev_ops;
6338
6339         dev->rx_descriptor_status = mlx5_rx_descriptor_status;
6340         dev->tx_descriptor_status = mlx5_tx_descriptor_status;
6341
6342         return 0;
6343 }
6344
6345 /**
6346  * Query a flow.
6347  *
6348  * @see rte_flow_query()
6349  * @see rte_flow_ops
6350  */
6351 static int
6352 flow_drv_query(struct rte_eth_dev *dev,
6353                uint32_t flow_idx,
6354                const struct rte_flow_action *actions,
6355                void *data,
6356                struct rte_flow_error *error)
6357 {
6358         struct mlx5_priv *priv = dev->data->dev_private;
6359         const struct mlx5_flow_driver_ops *fops;
6360         struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
6361                                                [MLX5_IPOOL_RTE_FLOW],
6362                                                flow_idx);
6363         enum mlx5_flow_drv_type ftype;
6364
6365         if (!flow) {
6366                 return rte_flow_error_set(error, ENOENT,
6367                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6368                           NULL,
6369                           "invalid flow handle");
6370         }
6371         ftype = flow->drv_type;
6372         MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
6373         fops = flow_get_drv_ops(ftype);
6374
6375         return fops->query(dev, flow, actions, data, error);
6376 }
6377
6378 /**
6379  * Query a flow.
6380  *
6381  * @see rte_flow_query()
6382  * @see rte_flow_ops
6383  */
6384 int
6385 mlx5_flow_query(struct rte_eth_dev *dev,
6386                 struct rte_flow *flow,
6387                 const struct rte_flow_action *actions,
6388                 void *data,
6389                 struct rte_flow_error *error)
6390 {
6391         int ret;
6392
6393         ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data,
6394                              error);
6395         if (ret < 0)
6396                 return ret;
6397         return 0;
6398 }
6399
6400 /**
6401  * Manage filter operations.
6402  *
6403  * @param dev
6404  *   Pointer to Ethernet device structure.
6405  * @param filter_type
6406  *   Filter type.
6407  * @param filter_op
6408  *   Operation to perform.
6409  * @param arg
6410  *   Pointer to operation-specific structure.
6411  *
6412  * @return
6413  *   0 on success, a negative errno value otherwise and rte_errno is set.
6414  */
6415 int
6416 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
6417                      enum rte_filter_type filter_type,
6418                      enum rte_filter_op filter_op,
6419                      void *arg)
6420 {
6421         switch (filter_type) {
6422         case RTE_ETH_FILTER_GENERIC:
6423                 if (filter_op != RTE_ETH_FILTER_GET) {
6424                         rte_errno = EINVAL;
6425                         return -rte_errno;
6426                 }
6427                 *(const void **)arg = &mlx5_flow_ops;
6428                 return 0;
6429         default:
6430                 DRV_LOG(ERR, "port %u filter type (%d) not supported",
6431                         dev->data->port_id, filter_type);
6432                 rte_errno = ENOTSUP;
6433                 return -rte_errno;
6434         }
6435         return 0;
6436 }
6437
6438 /**
6439  * Create the needed meter and suffix tables.
6440  *
6441  * @param[in] dev
6442  *   Pointer to Ethernet device.
6443  * @param[in] fm
6444  *   Pointer to the flow meter.
6445  *
6446  * @return
6447  *   Pointer to table set on success, NULL otherwise.
6448  */
6449 struct mlx5_meter_domains_infos *
6450 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
6451                           const struct mlx5_flow_meter *fm)
6452 {
6453         const struct mlx5_flow_driver_ops *fops;
6454
6455         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6456         return fops->create_mtr_tbls(dev, fm);
6457 }
6458
6459 /**
6460  * Destroy the meter table set.
6461  *
6462  * @param[in] dev
6463  *   Pointer to Ethernet device.
6464  * @param[in] tbl
6465  *   Pointer to the meter table set.
6466  *
6467  * @return
6468  *   0 on success.
6469  */
6470 int
6471 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
6472                            struct mlx5_meter_domains_infos *tbls)
6473 {
6474         const struct mlx5_flow_driver_ops *fops;
6475
6476         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6477         return fops->destroy_mtr_tbls(dev, tbls);
6478 }
6479
6480 /**
6481  * Create policer rules.
6482  *
6483  * @param[in] dev
6484  *   Pointer to Ethernet device.
6485  * @param[in] fm
6486  *   Pointer to flow meter structure.
6487  * @param[in] attr
6488  *   Pointer to flow attributes.
6489  *
6490  * @return
6491  *   0 on success, -1 otherwise.
6492  */
6493 int
6494 mlx5_flow_create_policer_rules(struct rte_eth_dev *dev,
6495                                struct mlx5_flow_meter *fm,
6496                                const struct rte_flow_attr *attr)
6497 {
6498         const struct mlx5_flow_driver_ops *fops;
6499
6500         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6501         return fops->create_policer_rules(dev, fm, attr);
6502 }
6503
6504 /**
6505  * Destroy policer rules.
6506  *
6507  * @param[in] fm
6508  *   Pointer to flow meter structure.
6509  * @param[in] attr
6510  *   Pointer to flow attributes.
6511  *
6512  * @return
6513  *   0 on success, -1 otherwise.
6514  */
6515 int
6516 mlx5_flow_destroy_policer_rules(struct rte_eth_dev *dev,
6517                                 struct mlx5_flow_meter *fm,
6518                                 const struct rte_flow_attr *attr)
6519 {
6520         const struct mlx5_flow_driver_ops *fops;
6521
6522         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6523         return fops->destroy_policer_rules(dev, fm, attr);
6524 }
6525
6526 /**
6527  * Allocate a counter.
6528  *
6529  * @param[in] dev
6530  *   Pointer to Ethernet device structure.
6531  *
6532  * @return
6533  *   Index to allocated counter  on success, 0 otherwise.
6534  */
6535 uint32_t
6536 mlx5_counter_alloc(struct rte_eth_dev *dev)
6537 {
6538         const struct mlx5_flow_driver_ops *fops;
6539         struct rte_flow_attr attr = { .transfer = 0 };
6540
6541         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
6542                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6543                 return fops->counter_alloc(dev);
6544         }
6545         DRV_LOG(ERR,
6546                 "port %u counter allocate is not supported.",
6547                  dev->data->port_id);
6548         return 0;
6549 }
6550
6551 /**
6552  * Free a counter.
6553  *
6554  * @param[in] dev
6555  *   Pointer to Ethernet device structure.
6556  * @param[in] cnt
6557  *   Index to counter to be free.
6558  */
6559 void
6560 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
6561 {
6562         const struct mlx5_flow_driver_ops *fops;
6563         struct rte_flow_attr attr = { .transfer = 0 };
6564
6565         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
6566                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6567                 fops->counter_free(dev, cnt);
6568                 return;
6569         }
6570         DRV_LOG(ERR,
6571                 "port %u counter free is not supported.",
6572                  dev->data->port_id);
6573 }
6574
6575 /**
6576  * Query counter statistics.
6577  *
6578  * @param[in] dev
6579  *   Pointer to Ethernet device structure.
6580  * @param[in] cnt
6581  *   Index to counter to query.
6582  * @param[in] clear
6583  *   Set to clear counter statistics.
6584  * @param[out] pkts
6585  *   The counter hits packets number to save.
6586  * @param[out] bytes
6587  *   The counter hits bytes number to save.
6588  *
6589  * @return
6590  *   0 on success, a negative errno value otherwise.
6591  */
6592 int
6593 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
6594                    bool clear, uint64_t *pkts, uint64_t *bytes)
6595 {
6596         const struct mlx5_flow_driver_ops *fops;
6597         struct rte_flow_attr attr = { .transfer = 0 };
6598
6599         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
6600                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6601                 return fops->counter_query(dev, cnt, clear, pkts, bytes);
6602         }
6603         DRV_LOG(ERR,
6604                 "port %u counter query is not supported.",
6605                  dev->data->port_id);
6606         return -ENOTSUP;
6607 }
6608
6609 /**
6610  * Allocate a new memory for the counter values wrapped by all the needed
6611  * management.
6612  *
6613  * @param[in] sh
6614  *   Pointer to mlx5_dev_ctx_shared object.
6615  *
6616  * @return
6617  *   0 on success, a negative errno value otherwise.
6618  */
6619 static int
6620 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh)
6621 {
6622         struct mlx5_devx_mkey_attr mkey_attr;
6623         struct mlx5_counter_stats_mem_mng *mem_mng;
6624         volatile struct flow_counter_stats *raw_data;
6625         int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES;
6626         int size = (sizeof(struct flow_counter_stats) *
6627                         MLX5_COUNTERS_PER_POOL +
6628                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
6629                         sizeof(struct mlx5_counter_stats_mem_mng);
6630         size_t pgsize = rte_mem_page_size();
6631         uint8_t *mem;
6632         int i;
6633
6634         if (pgsize == (size_t)-1) {
6635                 DRV_LOG(ERR, "Failed to get mem page size");
6636                 rte_errno = ENOMEM;
6637                 return -ENOMEM;
6638         }
6639         mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY);
6640         if (!mem) {
6641                 rte_errno = ENOMEM;
6642                 return -ENOMEM;
6643         }
6644         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
6645         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
6646         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
6647                                                  IBV_ACCESS_LOCAL_WRITE);
6648         if (!mem_mng->umem) {
6649                 rte_errno = errno;
6650                 mlx5_free(mem);
6651                 return -rte_errno;
6652         }
6653         mkey_attr.addr = (uintptr_t)mem;
6654         mkey_attr.size = size;
6655         mkey_attr.umem_id = mlx5_os_get_umem_id(mem_mng->umem);
6656         mkey_attr.pd = sh->pdn;
6657         mkey_attr.log_entity_size = 0;
6658         mkey_attr.pg_access = 0;
6659         mkey_attr.klm_array = NULL;
6660         mkey_attr.klm_num = 0;
6661         mkey_attr.relaxed_ordering = sh->cmng.relaxed_ordering;
6662         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
6663         if (!mem_mng->dm) {
6664                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
6665                 rte_errno = errno;
6666                 mlx5_free(mem);
6667                 return -rte_errno;
6668         }
6669         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
6670         raw_data = (volatile struct flow_counter_stats *)mem;
6671         for (i = 0; i < raws_n; ++i) {
6672                 mem_mng->raws[i].mem_mng = mem_mng;
6673                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
6674         }
6675         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
6676                 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws,
6677                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i,
6678                                  next);
6679         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
6680         sh->cmng.mem_mng = mem_mng;
6681         return 0;
6682 }
6683
6684 /**
6685  * Set the statistic memory to the new counter pool.
6686  *
6687  * @param[in] sh
6688  *   Pointer to mlx5_dev_ctx_shared object.
6689  * @param[in] pool
6690  *   Pointer to the pool to set the statistic memory.
6691  *
6692  * @return
6693  *   0 on success, a negative errno value otherwise.
6694  */
6695 static int
6696 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh,
6697                                struct mlx5_flow_counter_pool *pool)
6698 {
6699         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
6700         /* Resize statistic memory once used out. */
6701         if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) &&
6702             mlx5_flow_create_counter_stat_mem_mng(sh)) {
6703                 DRV_LOG(ERR, "Cannot resize counter stat mem.");
6704                 return -1;
6705         }
6706         rte_spinlock_lock(&pool->sl);
6707         pool->raw = cmng->mem_mng->raws + pool->index %
6708                     MLX5_CNT_CONTAINER_RESIZE;
6709         rte_spinlock_unlock(&pool->sl);
6710         pool->raw_hw = NULL;
6711         return 0;
6712 }
6713
6714 #define MLX5_POOL_QUERY_FREQ_US 1000000
6715
6716 /**
6717  * Set the periodic procedure for triggering asynchronous batch queries for all
6718  * the counter pools.
6719  *
6720  * @param[in] sh
6721  *   Pointer to mlx5_dev_ctx_shared object.
6722  */
6723 void
6724 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh)
6725 {
6726         uint32_t pools_n, us;
6727
6728         pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED);
6729         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
6730         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
6731         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
6732                 sh->cmng.query_thread_on = 0;
6733                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
6734         } else {
6735                 sh->cmng.query_thread_on = 1;
6736         }
6737 }
6738
6739 /**
6740  * The periodic procedure for triggering asynchronous batch queries for all the
6741  * counter pools. This function is probably called by the host thread.
6742  *
6743  * @param[in] arg
6744  *   The parameter for the alarm process.
6745  */
6746 void
6747 mlx5_flow_query_alarm(void *arg)
6748 {
6749         struct mlx5_dev_ctx_shared *sh = arg;
6750         int ret;
6751         uint16_t pool_index = sh->cmng.pool_index;
6752         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
6753         struct mlx5_flow_counter_pool *pool;
6754         uint16_t n_valid;
6755
6756         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
6757                 goto set_alarm;
6758         rte_spinlock_lock(&cmng->pool_update_sl);
6759         pool = cmng->pools[pool_index];
6760         n_valid = cmng->n_valid;
6761         rte_spinlock_unlock(&cmng->pool_update_sl);
6762         /* Set the statistic memory to the new created pool. */
6763         if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool)))
6764                 goto set_alarm;
6765         if (pool->raw_hw)
6766                 /* There is a pool query in progress. */
6767                 goto set_alarm;
6768         pool->raw_hw =
6769                 LIST_FIRST(&sh->cmng.free_stat_raws);
6770         if (!pool->raw_hw)
6771                 /* No free counter statistics raw memory. */
6772                 goto set_alarm;
6773         /*
6774          * Identify the counters released between query trigger and query
6775          * handle more efficiently. The counter released in this gap period
6776          * should wait for a new round of query as the new arrived packets
6777          * will not be taken into account.
6778          */
6779         pool->query_gen++;
6780         ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0,
6781                                                MLX5_COUNTERS_PER_POOL,
6782                                                NULL, NULL,
6783                                                pool->raw_hw->mem_mng->dm->id,
6784                                                (void *)(uintptr_t)
6785                                                pool->raw_hw->data,
6786                                                sh->devx_comp,
6787                                                (uint64_t)(uintptr_t)pool);
6788         if (ret) {
6789                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
6790                         " %d", pool->min_dcs->id);
6791                 pool->raw_hw = NULL;
6792                 goto set_alarm;
6793         }
6794         LIST_REMOVE(pool->raw_hw, next);
6795         sh->cmng.pending_queries++;
6796         pool_index++;
6797         if (pool_index >= n_valid)
6798                 pool_index = 0;
6799 set_alarm:
6800         sh->cmng.pool_index = pool_index;
6801         mlx5_set_query_alarm(sh);
6802 }
6803
6804 /**
6805  * Check and callback event for new aged flow in the counter pool
6806  *
6807  * @param[in] sh
6808  *   Pointer to mlx5_dev_ctx_shared object.
6809  * @param[in] pool
6810  *   Pointer to Current counter pool.
6811  */
6812 static void
6813 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh,
6814                    struct mlx5_flow_counter_pool *pool)
6815 {
6816         struct mlx5_priv *priv;
6817         struct mlx5_flow_counter *cnt;
6818         struct mlx5_age_info *age_info;
6819         struct mlx5_age_param *age_param;
6820         struct mlx5_counter_stats_raw *cur = pool->raw_hw;
6821         struct mlx5_counter_stats_raw *prev = pool->raw;
6822         const uint64_t curr_time = MLX5_CURR_TIME_SEC;
6823         const uint32_t time_delta = curr_time - pool->time_of_last_age_check;
6824         uint16_t expected = AGE_CANDIDATE;
6825         uint32_t i;
6826
6827         pool->time_of_last_age_check = curr_time;
6828         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
6829                 cnt = MLX5_POOL_GET_CNT(pool, i);
6830                 age_param = MLX5_CNT_TO_AGE(cnt);
6831                 if (__atomic_load_n(&age_param->state,
6832                                     __ATOMIC_RELAXED) != AGE_CANDIDATE)
6833                         continue;
6834                 if (cur->data[i].hits != prev->data[i].hits) {
6835                         __atomic_store_n(&age_param->sec_since_last_hit, 0,
6836                                          __ATOMIC_RELAXED);
6837                         continue;
6838                 }
6839                 if (__atomic_add_fetch(&age_param->sec_since_last_hit,
6840                                        time_delta,
6841                                        __ATOMIC_RELAXED) <= age_param->timeout)
6842                         continue;
6843                 /**
6844                  * Hold the lock first, or if between the
6845                  * state AGE_TMOUT and tailq operation the
6846                  * release happened, the release procedure
6847                  * may delete a non-existent tailq node.
6848                  */
6849                 priv = rte_eth_devices[age_param->port_id].data->dev_private;
6850                 age_info = GET_PORT_AGE_INFO(priv);
6851                 rte_spinlock_lock(&age_info->aged_sl);
6852                 if (__atomic_compare_exchange_n(&age_param->state, &expected,
6853                                                 AGE_TMOUT, false,
6854                                                 __ATOMIC_RELAXED,
6855                                                 __ATOMIC_RELAXED)) {
6856                         TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next);
6857                         MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW);
6858                 }
6859                 rte_spinlock_unlock(&age_info->aged_sl);
6860         }
6861         mlx5_age_event_prepare(sh);
6862 }
6863
6864 /**
6865  * Handler for the HW respond about ready values from an asynchronous batch
6866  * query. This function is probably called by the host thread.
6867  *
6868  * @param[in] sh
6869  *   The pointer to the shared device context.
6870  * @param[in] async_id
6871  *   The Devx async ID.
6872  * @param[in] status
6873  *   The status of the completion.
6874  */
6875 void
6876 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
6877                                   uint64_t async_id, int status)
6878 {
6879         struct mlx5_flow_counter_pool *pool =
6880                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
6881         struct mlx5_counter_stats_raw *raw_to_free;
6882         uint8_t query_gen = pool->query_gen ^ 1;
6883         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
6884         enum mlx5_counter_type cnt_type =
6885                 pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6886                                 MLX5_COUNTER_TYPE_ORIGIN;
6887
6888         if (unlikely(status)) {
6889                 raw_to_free = pool->raw_hw;
6890         } else {
6891                 raw_to_free = pool->raw;
6892                 if (pool->is_aged)
6893                         mlx5_flow_aging_check(sh, pool);
6894                 rte_spinlock_lock(&pool->sl);
6895                 pool->raw = pool->raw_hw;
6896                 rte_spinlock_unlock(&pool->sl);
6897                 /* Be sure the new raw counters data is updated in memory. */
6898                 rte_io_wmb();
6899                 if (!TAILQ_EMPTY(&pool->counters[query_gen])) {
6900                         rte_spinlock_lock(&cmng->csl[cnt_type]);
6901                         TAILQ_CONCAT(&cmng->counters[cnt_type],
6902                                      &pool->counters[query_gen], next);
6903                         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6904                 }
6905         }
6906         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
6907         pool->raw_hw = NULL;
6908         sh->cmng.pending_queries--;
6909 }
6910
6911 static const struct mlx5_flow_tbl_data_entry  *
6912 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark)
6913 {
6914         struct mlx5_priv *priv = dev->data->dev_private;
6915         struct mlx5_dev_ctx_shared *sh = priv->sh;
6916         struct mlx5_hlist_entry *he;
6917         union tunnel_offload_mark mbits = { .val = mark };
6918         union mlx5_flow_tbl_key table_key = {
6919                 {
6920                         .table_id = tunnel_id_to_flow_tbl(mbits.table_id),
6921                         .dummy = 0,
6922                         .domain = !!mbits.transfer,
6923                         .direction = 0,
6924                 }
6925         };
6926         he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, NULL);
6927         return he ?
6928                container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL;
6929 }
6930
6931 static void
6932 mlx5_flow_tunnel_grp2tbl_remove_cb(struct mlx5_hlist *list,
6933                                    struct mlx5_hlist_entry *entry)
6934 {
6935         struct mlx5_dev_ctx_shared *sh = list->ctx;
6936         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
6937
6938         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
6939                         tunnel_flow_tbl_to_id(tte->flow_table));
6940         mlx5_free(tte);
6941 }
6942
6943 static struct mlx5_hlist_entry *
6944 mlx5_flow_tunnel_grp2tbl_create_cb(struct mlx5_hlist *list,
6945                                    uint64_t key __rte_unused,
6946                                    void *ctx __rte_unused)
6947 {
6948         struct mlx5_dev_ctx_shared *sh = list->ctx;
6949         struct tunnel_tbl_entry *tte;
6950
6951         tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
6952                           sizeof(*tte), 0,
6953                           SOCKET_ID_ANY);
6954         if (!tte)
6955                 goto err;
6956         mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
6957                           &tte->flow_table);
6958         if (tte->flow_table >= MLX5_MAX_TABLES) {
6959                 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.",
6960                         tte->flow_table);
6961                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
6962                                 tte->flow_table);
6963                 goto err;
6964         } else if (!tte->flow_table) {
6965                 goto err;
6966         }
6967         tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table);
6968         return &tte->hash;
6969 err:
6970         if (tte)
6971                 mlx5_free(tte);
6972         return NULL;
6973 }
6974
6975 static uint32_t
6976 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
6977                                 const struct mlx5_flow_tunnel *tunnel,
6978                                 uint32_t group, uint32_t *table,
6979                                 struct rte_flow_error *error)
6980 {
6981         struct mlx5_hlist_entry *he;
6982         struct tunnel_tbl_entry *tte;
6983         union tunnel_tbl_key key = {
6984                 .tunnel_id = tunnel ? tunnel->tunnel_id : 0,
6985                 .group = group
6986         };
6987         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
6988         struct mlx5_hlist *group_hash;
6989
6990         group_hash = tunnel ? tunnel->groups : thub->groups;
6991         he = mlx5_hlist_register(group_hash, key.val, NULL);
6992         if (!he)
6993                 return rte_flow_error_set(error, EINVAL,
6994                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6995                                           NULL,
6996                                           "tunnel group index not supported");
6997         tte = container_of(he, typeof(*tte), hash);
6998         *table = tte->flow_table;
6999         DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x",
7000                 dev->data->port_id, key.tunnel_id, group, *table);
7001         return 0;
7002 }
7003
7004 static int
7005 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table,
7006                     struct flow_grp_info grp_info, struct rte_flow_error *error)
7007 {
7008         if (grp_info.transfer && grp_info.external && grp_info.fdb_def_rule) {
7009                 if (group == UINT32_MAX)
7010                         return rte_flow_error_set
7011                                                 (error, EINVAL,
7012                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
7013                                                  NULL,
7014                                                  "group index not supported");
7015                 *table = group + 1;
7016         } else {
7017                 *table = group;
7018         }
7019         DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table);
7020         return 0;
7021 }
7022
7023 /**
7024  * Translate the rte_flow group index to HW table value.
7025  *
7026  * If tunnel offload is disabled, all group ids converted to flow table
7027  * id using the standard method.
7028  * If tunnel offload is enabled, group id can be converted using the
7029  * standard or tunnel conversion method. Group conversion method
7030  * selection depends on flags in `grp_info` parameter:
7031  * - Internal (grp_info.external == 0) groups conversion uses the
7032  *   standard method.
7033  * - Group ids in JUMP action converted with the tunnel conversion.
7034  * - Group id in rule attribute conversion depends on a rule type and
7035  *   group id value:
7036  *   ** non zero group attributes converted with the tunnel method
7037  *   ** zero group attribute in non-tunnel rule is converted using the
7038  *      standard method - there's only one root table
7039  *   ** zero group attribute in steer tunnel rule is converted with the
7040  *      standard method - single root table
7041  *   ** zero group attribute in match tunnel rule is a special OvS
7042  *      case: that value is used for portability reasons. That group
7043  *      id is converted with the tunnel conversion method.
7044  *
7045  * @param[in] dev
7046  *   Port device
7047  * @param[in] tunnel
7048  *   PMD tunnel offload object
7049  * @param[in] group
7050  *   rte_flow group index value.
7051  * @param[out] table
7052  *   HW table value.
7053  * @param[in] grp_info
7054  *   flags used for conversion
7055  * @param[out] error
7056  *   Pointer to error structure.
7057  *
7058  * @return
7059  *   0 on success, a negative errno value otherwise and rte_errno is set.
7060  */
7061 int
7062 mlx5_flow_group_to_table(struct rte_eth_dev *dev,
7063                          const struct mlx5_flow_tunnel *tunnel,
7064                          uint32_t group, uint32_t *table,
7065                          struct flow_grp_info grp_info,
7066                          struct rte_flow_error *error)
7067 {
7068         int ret;
7069         bool standard_translation;
7070
7071         if (grp_info.external && group < MLX5_MAX_TABLES_EXTERNAL)
7072                 group *= MLX5_FLOW_TABLE_FACTOR;
7073         if (is_tunnel_offload_active(dev)) {
7074                 standard_translation = !grp_info.external ||
7075                                         grp_info.std_tbl_fix;
7076         } else {
7077                 standard_translation = true;
7078         }
7079         DRV_LOG(DEBUG,
7080                 "port %u group=%#x transfer=%d external=%d fdb_def_rule=%d translate=%s",
7081                 dev->data->port_id, group, grp_info.transfer,
7082                 grp_info.external, grp_info.fdb_def_rule,
7083                 standard_translation ? "STANDARD" : "TUNNEL");
7084         if (standard_translation)
7085                 ret = flow_group_to_table(dev->data->port_id, group, table,
7086                                           grp_info, error);
7087         else
7088                 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group,
7089                                                       table, error);
7090
7091         return ret;
7092 }
7093
7094 /**
7095  * Discover availability of metadata reg_c's.
7096  *
7097  * Iteratively use test flows to check availability.
7098  *
7099  * @param[in] dev
7100  *   Pointer to the Ethernet device structure.
7101  *
7102  * @return
7103  *   0 on success, a negative errno value otherwise and rte_errno is set.
7104  */
7105 int
7106 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
7107 {
7108         struct mlx5_priv *priv = dev->data->dev_private;
7109         struct mlx5_dev_config *config = &priv->config;
7110         enum modify_reg idx;
7111         int n = 0;
7112
7113         /* reg_c[0] and reg_c[1] are reserved. */
7114         config->flow_mreg_c[n++] = REG_C_0;
7115         config->flow_mreg_c[n++] = REG_C_1;
7116         /* Discover availability of other reg_c's. */
7117         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
7118                 struct rte_flow_attr attr = {
7119                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
7120                         .priority = MLX5_FLOW_PRIO_RSVD,
7121                         .ingress = 1,
7122                 };
7123                 struct rte_flow_item items[] = {
7124                         [0] = {
7125                                 .type = RTE_FLOW_ITEM_TYPE_END,
7126                         },
7127                 };
7128                 struct rte_flow_action actions[] = {
7129                         [0] = {
7130                                 .type = (enum rte_flow_action_type)
7131                                         MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
7132                                 .conf = &(struct mlx5_flow_action_copy_mreg){
7133                                         .src = REG_C_1,
7134                                         .dst = idx,
7135                                 },
7136                         },
7137                         [1] = {
7138                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
7139                                 .conf = &(struct rte_flow_action_jump){
7140                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
7141                                 },
7142                         },
7143                         [2] = {
7144                                 .type = RTE_FLOW_ACTION_TYPE_END,
7145                         },
7146                 };
7147                 uint32_t flow_idx;
7148                 struct rte_flow *flow;
7149                 struct rte_flow_error error;
7150
7151                 if (!config->dv_flow_en)
7152                         break;
7153                 /* Create internal flow, validation skips copy action. */
7154                 flow_idx = flow_list_create(dev, NULL, &attr, items,
7155                                             actions, false, &error);
7156                 flow = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW],
7157                                       flow_idx);
7158                 if (!flow)
7159                         continue;
7160                 if (dev->data->dev_started || !flow_drv_apply(dev, flow, NULL))
7161                         config->flow_mreg_c[n++] = idx;
7162                 flow_list_destroy(dev, NULL, flow_idx);
7163         }
7164         for (; n < MLX5_MREG_C_NUM; ++n)
7165                 config->flow_mreg_c[n] = REG_NON;
7166         return 0;
7167 }
7168
7169 /**
7170  * Dump flow raw hw data to file
7171  *
7172  * @param[in] dev
7173  *    The pointer to Ethernet device.
7174  * @param[in] file
7175  *   A pointer to a file for output.
7176  * @param[out] error
7177  *   Perform verbose error reporting if not NULL. PMDs initialize this
7178  *   structure in case of error only.
7179  * @return
7180  *   0 on success, a nagative value otherwise.
7181  */
7182 int
7183 mlx5_flow_dev_dump(struct rte_eth_dev *dev,
7184                    FILE *file,
7185                    struct rte_flow_error *error __rte_unused)
7186 {
7187         struct mlx5_priv *priv = dev->data->dev_private;
7188         struct mlx5_dev_ctx_shared *sh = priv->sh;
7189
7190         if (!priv->config.dv_flow_en) {
7191                 if (fputs("device dv flow disabled\n", file) <= 0)
7192                         return -errno;
7193                 return -ENOTSUP;
7194         }
7195         return mlx5_devx_cmd_flow_dump(sh->fdb_domain, sh->rx_domain,
7196                                        sh->tx_domain, file);
7197 }
7198
7199 /**
7200  * Get aged-out flows.
7201  *
7202  * @param[in] dev
7203  *   Pointer to the Ethernet device structure.
7204  * @param[in] context
7205  *   The address of an array of pointers to the aged-out flows contexts.
7206  * @param[in] nb_countexts
7207  *   The length of context array pointers.
7208  * @param[out] error
7209  *   Perform verbose error reporting if not NULL. Initialized in case of
7210  *   error only.
7211  *
7212  * @return
7213  *   how many contexts get in success, otherwise negative errno value.
7214  *   if nb_contexts is 0, return the amount of all aged contexts.
7215  *   if nb_contexts is not 0 , return the amount of aged flows reported
7216  *   in the context array.
7217  */
7218 int
7219 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
7220                         uint32_t nb_contexts, struct rte_flow_error *error)
7221 {
7222         const struct mlx5_flow_driver_ops *fops;
7223         struct rte_flow_attr attr = { .transfer = 0 };
7224
7225         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7226                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7227                 return fops->get_aged_flows(dev, contexts, nb_contexts,
7228                                                     error);
7229         }
7230         DRV_LOG(ERR,
7231                 "port %u get aged flows is not supported.",
7232                  dev->data->port_id);
7233         return -ENOTSUP;
7234 }
7235
7236 /* Wrapper for driver action_validate op callback */
7237 static int
7238 flow_drv_action_validate(struct rte_eth_dev *dev,
7239                          const struct rte_flow_shared_action_conf *conf,
7240                          const struct rte_flow_action *action,
7241                          const struct mlx5_flow_driver_ops *fops,
7242                          struct rte_flow_error *error)
7243 {
7244         static const char err_msg[] = "shared action validation unsupported";
7245
7246         if (!fops->action_validate) {
7247                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7248                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7249                                    NULL, err_msg);
7250                 return -rte_errno;
7251         }
7252         return fops->action_validate(dev, conf, action, error);
7253 }
7254
7255 /**
7256  * Destroys the shared action by handle.
7257  *
7258  * @param dev
7259  *   Pointer to Ethernet device structure.
7260  * @param[in] action
7261  *   Handle for the shared action to be destroyed.
7262  * @param[out] error
7263  *   Perform verbose error reporting if not NULL. PMDs initialize this
7264  *   structure in case of error only.
7265  *
7266  * @return
7267  *   0 on success, a negative errno value otherwise and rte_errno is set.
7268  *
7269  * @note: wrapper for driver action_create op callback.
7270  */
7271 static int
7272 mlx5_shared_action_destroy(struct rte_eth_dev *dev,
7273                            struct rte_flow_shared_action *action,
7274                            struct rte_flow_error *error)
7275 {
7276         static const char err_msg[] = "shared action destruction unsupported";
7277         struct rte_flow_attr attr = { .transfer = 0 };
7278         const struct mlx5_flow_driver_ops *fops =
7279                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7280
7281         if (!fops->action_destroy) {
7282                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7283                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7284                                    NULL, err_msg);
7285                 return -rte_errno;
7286         }
7287         return fops->action_destroy(dev, action, error);
7288 }
7289
7290 /* Wrapper for driver action_destroy op callback */
7291 static int
7292 flow_drv_action_update(struct rte_eth_dev *dev,
7293                        struct rte_flow_shared_action *action,
7294                        const void *action_conf,
7295                        const struct mlx5_flow_driver_ops *fops,
7296                        struct rte_flow_error *error)
7297 {
7298         static const char err_msg[] = "shared action update unsupported";
7299
7300         if (!fops->action_update) {
7301                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7302                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7303                                    NULL, err_msg);
7304                 return -rte_errno;
7305         }
7306         return fops->action_update(dev, action, action_conf, error);
7307 }
7308
7309 /* Wrapper for driver action_destroy op callback */
7310 static int
7311 flow_drv_action_query(struct rte_eth_dev *dev,
7312                       const struct rte_flow_shared_action *action,
7313                       void *data,
7314                       const struct mlx5_flow_driver_ops *fops,
7315                       struct rte_flow_error *error)
7316 {
7317         static const char err_msg[] = "shared action query unsupported";
7318
7319         if (!fops->action_query) {
7320                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7321                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7322                                    NULL, err_msg);
7323                 return -rte_errno;
7324         }
7325         return fops->action_query(dev, action, data, error);
7326 }
7327
7328 /**
7329  * Create shared action for reuse in multiple flow rules.
7330  *
7331  * @param dev
7332  *   Pointer to Ethernet device structure.
7333  * @param[in] action
7334  *   Action configuration for shared action creation.
7335  * @param[out] error
7336  *   Perform verbose error reporting if not NULL. PMDs initialize this
7337  *   structure in case of error only.
7338  * @return
7339  *   A valid handle in case of success, NULL otherwise and rte_errno is set.
7340  */
7341 static struct rte_flow_shared_action *
7342 mlx5_shared_action_create(struct rte_eth_dev *dev,
7343                           const struct rte_flow_shared_action_conf *conf,
7344                           const struct rte_flow_action *action,
7345                           struct rte_flow_error *error)
7346 {
7347         static const char err_msg[] = "shared action creation unsupported";
7348         struct rte_flow_attr attr = { .transfer = 0 };
7349         const struct mlx5_flow_driver_ops *fops =
7350                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7351
7352         if (flow_drv_action_validate(dev, conf, action, fops, error))
7353                 return NULL;
7354         if (!fops->action_create) {
7355                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7356                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7357                                    NULL, err_msg);
7358                 return NULL;
7359         }
7360         return fops->action_create(dev, conf, action, error);
7361 }
7362
7363 /**
7364  * Updates inplace the shared action configuration pointed by *action* handle
7365  * with the configuration provided as *action* argument.
7366  * The update of the shared action configuration effects all flow rules reusing
7367  * the action via handle.
7368  *
7369  * @param dev
7370  *   Pointer to Ethernet device structure.
7371  * @param[in] shared_action
7372  *   Handle for the shared action to be updated.
7373  * @param[in] action
7374  *   Action specification used to modify the action pointed by handle.
7375  *   *action* should be of same type with the action pointed by the *action*
7376  *   handle argument, otherwise considered as invalid.
7377  * @param[out] error
7378  *   Perform verbose error reporting if not NULL. PMDs initialize this
7379  *   structure in case of error only.
7380  *
7381  * @return
7382  *   0 on success, a negative errno value otherwise and rte_errno is set.
7383  */
7384 static int
7385 mlx5_shared_action_update(struct rte_eth_dev *dev,
7386                 struct rte_flow_shared_action *shared_action,
7387                 const struct rte_flow_action *action,
7388                 struct rte_flow_error *error)
7389 {
7390         struct rte_flow_attr attr = { .transfer = 0 };
7391         const struct mlx5_flow_driver_ops *fops =
7392                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7393         int ret;
7394
7395         ret = flow_drv_action_validate(dev, NULL, action, fops, error);
7396         if (ret)
7397                 return ret;
7398         return flow_drv_action_update(dev, shared_action, action->conf, fops,
7399                                       error);
7400 }
7401
7402 /**
7403  * Query the shared action by handle.
7404  *
7405  * This function allows retrieving action-specific data such as counters.
7406  * Data is gathered by special action which may be present/referenced in
7407  * more than one flow rule definition.
7408  *
7409  * \see RTE_FLOW_ACTION_TYPE_COUNT
7410  *
7411  * @param dev
7412  *   Pointer to Ethernet device structure.
7413  * @param[in] action
7414  *   Handle for the shared action to query.
7415  * @param[in, out] data
7416  *   Pointer to storage for the associated query data type.
7417  * @param[out] error
7418  *   Perform verbose error reporting if not NULL. PMDs initialize this
7419  *   structure in case of error only.
7420  *
7421  * @return
7422  *   0 on success, a negative errno value otherwise and rte_errno is set.
7423  */
7424 static int
7425 mlx5_shared_action_query(struct rte_eth_dev *dev,
7426                          const struct rte_flow_shared_action *action,
7427                          void *data,
7428                          struct rte_flow_error *error)
7429 {
7430         struct rte_flow_attr attr = { .transfer = 0 };
7431         const struct mlx5_flow_driver_ops *fops =
7432                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7433
7434         return flow_drv_action_query(dev, action, data, fops, error);
7435 }
7436
7437 /**
7438  * Destroy all shared actions.
7439  *
7440  * @param dev
7441  *   Pointer to Ethernet device.
7442  *
7443  * @return
7444  *   0 on success, a negative errno value otherwise and rte_errno is set.
7445  */
7446 int
7447 mlx5_shared_action_flush(struct rte_eth_dev *dev)
7448 {
7449         struct rte_flow_error error;
7450         struct mlx5_priv *priv = dev->data->dev_private;
7451         struct mlx5_shared_action_rss *action;
7452         int ret = 0;
7453         uint32_t idx;
7454
7455         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
7456                       priv->rss_shared_actions, idx, action, next) {
7457                 ret |= mlx5_shared_action_destroy(dev,
7458                        (struct rte_flow_shared_action *)(uintptr_t)idx, &error);
7459         }
7460         return ret;
7461 }
7462
7463 static void
7464 mlx5_flow_tunnel_free(struct rte_eth_dev *dev,
7465                       struct mlx5_flow_tunnel *tunnel)
7466 {
7467         struct mlx5_priv *priv = dev->data->dev_private;
7468
7469         DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x",
7470                 dev->data->port_id, tunnel->tunnel_id);
7471         RTE_VERIFY(!__atomic_load_n(&tunnel->refctn, __ATOMIC_RELAXED));
7472         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID],
7473                         tunnel->tunnel_id);
7474         mlx5_hlist_destroy(tunnel->groups);
7475         mlx5_free(tunnel);
7476 }
7477
7478 static struct mlx5_flow_tunnel *
7479 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id)
7480 {
7481         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
7482         struct mlx5_flow_tunnel *tun;
7483
7484         LIST_FOREACH(tun, &thub->tunnels, chain) {
7485                 if (tun->tunnel_id == id)
7486                         break;
7487         }
7488
7489         return tun;
7490 }
7491
7492 static struct mlx5_flow_tunnel *
7493 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev,
7494                           const struct rte_flow_tunnel *app_tunnel)
7495 {
7496         struct mlx5_priv *priv = dev->data->dev_private;
7497         struct mlx5_flow_tunnel *tunnel;
7498         uint32_t id;
7499
7500         mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
7501                           &id);
7502         if (id >= MLX5_MAX_TUNNELS) {
7503                 mlx5_ipool_free(priv->sh->ipool
7504                                 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], id);
7505                 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id);
7506                 return NULL;
7507         } else if (!id) {
7508                 return NULL;
7509         }
7510         /**
7511          * mlx5 flow tunnel is an auxlilary data structure
7512          * It's not part of IO. No need to allocate it from
7513          * huge pages pools dedicated for IO
7514          */
7515         tunnel = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*tunnel),
7516                              0, SOCKET_ID_ANY);
7517         if (!tunnel) {
7518                 mlx5_ipool_free(priv->sh->ipool
7519                                 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], id);
7520                 return NULL;
7521         }
7522         tunnel->groups = mlx5_hlist_create("tunnel groups", 1024, 0, 0,
7523                                            mlx5_flow_tunnel_grp2tbl_create_cb,
7524                                            NULL,
7525                                            mlx5_flow_tunnel_grp2tbl_remove_cb);
7526         if (!tunnel->groups) {
7527                 mlx5_ipool_free(priv->sh->ipool
7528                                 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], id);
7529                 mlx5_free(tunnel);
7530                 return NULL;
7531         }
7532         tunnel->groups->ctx = priv->sh;
7533         /* initiate new PMD tunnel */
7534         memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel));
7535         tunnel->tunnel_id = id;
7536         tunnel->action.type = (typeof(tunnel->action.type))
7537                               MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET;
7538         tunnel->action.conf = tunnel;
7539         tunnel->item.type = (typeof(tunnel->item.type))
7540                             MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL;
7541         tunnel->item.spec = tunnel;
7542         tunnel->item.last = NULL;
7543         tunnel->item.mask = NULL;
7544
7545         DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x",
7546                 dev->data->port_id, tunnel->tunnel_id);
7547
7548         return tunnel;
7549 }
7550
7551 static int
7552 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
7553                      const struct rte_flow_tunnel *app_tunnel,
7554                      struct mlx5_flow_tunnel **tunnel)
7555 {
7556         int ret;
7557         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
7558         struct mlx5_flow_tunnel *tun;
7559
7560         rte_spinlock_lock(&thub->sl);
7561         LIST_FOREACH(tun, &thub->tunnels, chain) {
7562                 if (!memcmp(app_tunnel, &tun->app_tunnel,
7563                             sizeof(*app_tunnel))) {
7564                         *tunnel = tun;
7565                         ret = 0;
7566                         break;
7567                 }
7568         }
7569         if (!tun) {
7570                 tun = mlx5_flow_tunnel_allocate(dev, app_tunnel);
7571                 if (tun) {
7572                         LIST_INSERT_HEAD(&thub->tunnels, tun, chain);
7573                         *tunnel = tun;
7574                 } else {
7575                         ret = -ENOMEM;
7576                 }
7577         }
7578         rte_spinlock_unlock(&thub->sl);
7579         if (tun)
7580                 __atomic_add_fetch(&tun->refctn, 1, __ATOMIC_RELAXED);
7581
7582         return ret;
7583 }
7584
7585 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id)
7586 {
7587         struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
7588
7589         if (!thub)
7590                 return;
7591         if (!LIST_EMPTY(&thub->tunnels))
7592                 DRV_LOG(WARNING, "port %u tunnels present\n", port_id);
7593         mlx5_hlist_destroy(thub->groups);
7594         mlx5_free(thub);
7595 }
7596
7597 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh)
7598 {
7599         int err;
7600         struct mlx5_flow_tunnel_hub *thub;
7601
7602         thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub),
7603                            0, SOCKET_ID_ANY);
7604         if (!thub)
7605                 return -ENOMEM;
7606         LIST_INIT(&thub->tunnels);
7607         rte_spinlock_init(&thub->sl);
7608         thub->groups = mlx5_hlist_create("flow groups", MLX5_MAX_TABLES, 0,
7609                                          0, mlx5_flow_tunnel_grp2tbl_create_cb,
7610                                          NULL,
7611                                          mlx5_flow_tunnel_grp2tbl_remove_cb);
7612         if (!thub->groups) {
7613                 err = -rte_errno;
7614                 goto err;
7615         }
7616         thub->groups->ctx = sh;
7617         sh->tunnel_hub = thub;
7618
7619         return 0;
7620
7621 err:
7622         if (thub->groups)
7623                 mlx5_hlist_destroy(thub->groups);
7624         if (thub)
7625                 mlx5_free(thub);
7626         return err;
7627 }
7628
7629 #ifndef HAVE_MLX5DV_DR
7630 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1))
7631 #else
7632 #define MLX5_DOMAIN_SYNC_FLOW \
7633         (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW)
7634 #endif
7635
7636 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
7637 {
7638         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
7639         const struct mlx5_flow_driver_ops *fops;
7640         int ret;
7641         struct rte_flow_attr attr = { .transfer = 0 };
7642
7643         fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7644         ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW);
7645         if (ret > 0)
7646                 ret = -ret;
7647         return ret;
7648 }